Re: [PATCH 11/24] net: cpsw: convert to streaming DMA ops

2015-03-02 Thread Jan Weitzel
On Sun, Mar 01, 2015 at 02:17:09PM +0100, Lucas Stach wrote:
 Move to the common streaming DMA ops in order to get rid of
 the direct usage of the ARM MMU functions for the cache
 maintenance.
Tested-by: Jan Weitzel j.weit...@phytec.de
 
 Signed-off-by: Lucas Stach d...@lynxeye.de
 ---
  drivers/net/cpsw.c | 11 +++
  1 file changed, 7 insertions(+), 4 deletions(-)
 
 diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c
 index 799fac8..3f8ffa0 100644
 --- a/drivers/net/cpsw.c
 +++ b/drivers/net/cpsw.c
 @@ -21,6 +21,7 @@
  #include init.h
  
  #include command.h
 +#include dma.h
  #include net.h
  #include malloc.h
  #include net.h
 @@ -32,7 +33,6 @@
  #include of_net.h
  #include of_address.h
  #include xfuncs.h
 -#include asm/mmu.h
  #include asm/system.h
  #include linux/err.h
  
 @@ -871,9 +871,9 @@ static int cpsw_send(struct eth_device *edev, void 
 *packet, int length)
  
   dev_dbg(slave-dev, %s: %i bytes @ 0x%p\n, __func__, length, packet);
  
 - dma_flush_range((ulong) packet, (ulong)packet + length);
 -
 + dma_sync_single_for_device((unsigned long)packet, length, 
 DMA_TO_DEVICE);
   ret = cpdma_submit(priv, priv-tx_chan, packet, length);
 + dma_sync_single_for_cpu((unsigned long)packet, length, DMA_TO_DEVICE);
  
   return ret;
  }
 @@ -886,8 +886,11 @@ static int cpsw_recv(struct eth_device *edev)
   int len;
  
   while (cpdma_process(priv, priv-rx_chan, buffer, len) = 0) {
 - dma_inv_range((ulong)buffer, (ulong)buffer + len);
 + dma_sync_single_for_cpu((unsigned long)buffer, len,
 + DMA_FROM_DEVICE);
   net_receive(edev, buffer, len);
 + dma_sync_single_for_device((unsigned long)buffer, len,
 +DMA_FROM_DEVICE);
   cpdma_submit(priv, priv-rx_chan, buffer, PKTSIZE);
   }
  
 -- 
 2.1.0
 
 
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Re: [PATCH] net: cpsw: invalidate complete buffer

2015-03-01 Thread Jan Weitzel
On Fri, Feb 27, 2015 at 02:45:18PM +0100, Lucas Stach wrote:
 Am Freitag, den 27.02.2015, 14:39 +0100 schrieb Lucas Stach:
  Am Freitag, den 27.02.2015, 14:14 +0100 schrieb Jan Weitzel:
   On Fri, Feb 27, 2015 at 12:47:24PM +0100, Lucas Stach wrote:
Am Freitag, den 27.02.2015, 10:56 +0100 schrieb Jan Weitzel:
 Without invalidating the complete buffer before giving it to
 dma_inv_range, we got strange packets.
 

This is most likely not the correct fix. If this helps then our
dma_inv_range functions aren't working properly, which would be really
bad. How do those strange packets look like?

   We saw the problem with tftp transfers of a 76 byte image. Debug print in
   tftp_handler
   
   good:
   tftp_handler: len:76 blocksize:1432 to fifo
   : 06 08 ba de 7d 27 e1 2c 52 2f cf 77 e0 d3 23 da
   }'.,R/.w..#.
   0010: 62 d4 42 3e 03 20 3a c2 51 aa 51 15 73 be 9e 21b.B. 
   :.Q.Q.s..!
   0020: 03 ac 78 a9 e3 4f cd 4d 6d ba 93 fe 83 dc fe 82
   ..x..O.Mm... 
   0030: bb f8 24 29 6e 6f 53 1c 91 52 4b 77 1b 72 ff a0
   ..$)noS..RKw.r.. 
   0040: 5b 98 1c 20 28 09 0f 4c 93 3c 22 08[.. (..L.. 
   
   
   bad:
   tftp_handler: len:76 blocksize:1432 to fifo:  
   
   : 06 08 ba de 7d 27 e1 2c 52 2f cf 77 e0 d3 23 da
   }'.,R/.w..#. 
   0010: 62 d4 6b 73 69 7a 65 00 31 34 33 32 00 b0 1b d1
   b.ksize.1432 
   0020: 5b d4 78 a9 e3 4f cd 4d 6d ba 93 fe 83 dc fe 82
   [.x..O.Mm...
   0030: bb f8 24 29 6e 6f 53 1c 91 52 4b 77 1b 72 ff a0
   ..$)noS..RKw.r..
   0040: 5b 98 1c 20 28 09 0f 4c 93 3c 22 08[.. (..L..
   
   
   The ethernet package has 122 Bytes and the error in the received file is 
   on
   offset 18. The data b.ksize.1432 comes also from tftp packets.
   
  This doesn't look like a problem to invalidate the cache, but more like
  writeback of old cachelines while the hardware owns the buffer. Can you
  try the series Phasing out direct usage of asm/mmu.h on ARM and see if
  this still happens there? If I'm correct this series should fix this
  problem.
  
  I'll send an updated version of this series in the evening, but you
  should be able to correct the typo in cpsw.c yourself for testing. :)
 
 Or try this patch, which should do the same as the new cache handling,
 but may be acceptable for master.
Your patch works and invalidating after reading makes sense ;)
Can we take this for master? I'll test the series.

Tested-by: Jan Weitzel j.weit...@phytec.de

 
 8
 From f96aec8bd87ac29247617bdcfab41048b942e899 Mon Sep 17 00:00:00 2001
 From: Lucas Stach l.st...@pengutronix.de
 Date: Fri, 27 Feb 2015 14:41:46 +0100
 Subject: [PATCH] net: cpsw: prevent stray cache writeback
 
 The cache should be invalidated when transfering ownership of a buffer
 to the device. Otherwise the writeback of dirty cache lines can
 corrupt the hardware written data.
 
 Signed-off-by: Lucas Stach l.st...@pengutronix.de
 ---
  drivers/net/cpsw.c | 1 +
  1 file changed, 1 insertion(+)
 
 diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c
 index 799fac89a2f3..301b8a9dfde5 100644
 --- a/drivers/net/cpsw.c
 +++ b/drivers/net/cpsw.c
 @@ -888,6 +888,7 @@ static int cpsw_recv(struct eth_device *edev)
   while (cpdma_process(priv, priv-rx_chan, buffer, len) = 0) {
   dma_inv_range((ulong)buffer, (ulong)buffer + len);
   net_receive(edev, buffer, len);
 + dma_inv_range((ulong)buffer, (ulong)buffer + len);
   cpdma_submit(priv, priv-rx_chan, buffer, PKTSIZE);
   }
  
 -- 
 2.1.4
 -- 
 Pengutronix e.K. | Lucas Stach |
 Industrial Linux Solutions   | http://www.pengutronix.de/  |
 

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Re: [PATCH] net: cpsw: invalidate complete buffer

2015-02-27 Thread Jan Weitzel
On Fri, Feb 27, 2015 at 12:47:24PM +0100, Lucas Stach wrote:
 Am Freitag, den 27.02.2015, 10:56 +0100 schrieb Jan Weitzel:
  Without invalidating the complete buffer before giving it to
  dma_inv_range, we got strange packets.
  
 
 This is most likely not the correct fix. If this helps then our
 dma_inv_range functions aren't working properly, which would be really
 bad. How do those strange packets look like?
 
We saw the problem with tftp transfers of a 76 byte image. Debug print in
tftp_handler

good:
tftp_handler: len:76 blocksize:1432 to fifo
: 06 08 ba de 7d 27 e1 2c 52 2f cf 77 e0 d3 23 da}'.,R/.w..#.
0010: 62 d4 42 3e 03 20 3a c2 51 aa 51 15 73 be 9e 21b.B. :.Q.Q.s..!
0020: 03 ac 78 a9 e3 4f cd 4d 6d ba 93 fe 83 dc fe 82..x..O.Mm...   
  
0030: bb f8 24 29 6e 6f 53 1c 91 52 4b 77 1b 72 ff a0..$)noS..RKw.r..   
  
0040: 5b 98 1c 20 28 09 0f 4c 93 3c 22 08[.. (..L.. 

bad:
tftp_handler: len:76 blocksize:1432 to fifo:
  
: 06 08 ba de 7d 27 e1 2c 52 2f cf 77 e0 d3 23 da}'.,R/.w..#.   
  
0010: 62 d4 6b 73 69 7a 65 00 31 34 33 32 00 b0 1b d1b.ksize.1432   
  
0020: 5b d4 78 a9 e3 4f cd 4d 6d ba 93 fe 83 dc fe 82[.x..O.Mm...
0030: bb f8 24 29 6e 6f 53 1c 91 52 4b 77 1b 72 ff a0..$)noS..RKw.r..
0040: 5b 98 1c 20 28 09 0f 4c 93 3c 22 08[.. (..L..


The ethernet package has 122 Bytes and the error in the received file is on
offset 18. The data b.ksize.1432 comes also from tftp packets.

Jan

  Signed-off-by: Jan Weitzel j.weit...@phytec.de
  Tested-by: Teresa Gámez t.ga...@phytec.de
  ---
   drivers/net/cpsw.c | 2 +-
   1 file changed, 1 insertion(+), 1 deletion(-)
  
  diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c
  index 799fac8..33afdc3 100644
  --- a/drivers/net/cpsw.c
  +++ b/drivers/net/cpsw.c
  @@ -886,7 +886,7 @@ static int cpsw_recv(struct eth_device *edev)
  int len;
   
  while (cpdma_process(priv, priv-rx_chan, buffer, len) = 0) {
  -   dma_inv_range((ulong)buffer, (ulong)buffer + len);
  +   dma_inv_range((ulong)buffer, (ulong)buffer + PKTSIZE);
  net_receive(edev, buffer, len);
  cpdma_submit(priv, priv-rx_chan, buffer, PKTSIZE);
  }
 
 -- 
 Pengutronix e.K. | Lucas Stach |
 Industrial Linux Solutions   | http://www.pengutronix.de/  |
 

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[PATCH] net: cpsw: invalidate complete buffer

2015-02-27 Thread Jan Weitzel
Without invalidating the complete buffer before giving it to
dma_inv_range, we got strange packets.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
Tested-by: Teresa Gámez t.ga...@phytec.de
---
 drivers/net/cpsw.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c
index 799fac8..33afdc3 100644
--- a/drivers/net/cpsw.c
+++ b/drivers/net/cpsw.c
@@ -886,7 +886,7 @@ static int cpsw_recv(struct eth_device *edev)
int len;
 
while (cpdma_process(priv, priv-rx_chan, buffer, len) = 0) {
-   dma_inv_range((ulong)buffer, (ulong)buffer + len);
+   dma_inv_range((ulong)buffer, (ulong)buffer + PKTSIZE);
net_receive(edev, buffer, len);
cpdma_submit(priv, priv-rx_chan, buffer, PKTSIZE);
}
-- 
1.9.1


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Re: [PATCH v2] i2c: omap: fix fclk_rate for ti,omap4-i2c

2015-01-07 Thread Jan Weitzel
On Tue, Jan 06, 2015 at 02:47:13PM +0100, Sascha Hauer wrote:
 On Mon, Jan 05, 2015 at 01:22:04PM +0100, Jan Weitzel wrote:
  On Thu, Dec 11, 2014 at 10:47:59AM +0100, Jan Weitzel wrote:
   The compatible ti,omap4-i2c don't help to get fclk_rate. So set it 
   acording to
   cpu compatible: ti,am33xx and ti,omap4
   
   Signed-off-by: Jan Weitzel j.weit...@phytec.de
   ---
   v2: set i2c_data directly
  -9.0.1.i586.deb  
  
  ping
 
 Applied now.
Thanks :)

Jan
 
 Sascha
 
 
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Re: [PATCH v2] i2c: omap: fix fclk_rate for ti,omap4-i2c

2015-01-05 Thread Jan Weitzel
On Thu, Dec 11, 2014 at 10:47:59AM +0100, Jan Weitzel wrote:
 The compatible ti,omap4-i2c don't help to get fclk_rate. So set it acording 
 to
 cpu compatible: ti,am33xx and ti,omap4
 
 Signed-off-by: Jan Weitzel j.weit...@phytec.de
 ---
 v2: set i2c_data directly
-9.0.1.i586.deb  

ping

Jan

  drivers/i2c/busses/i2c-omap.c | 11 +--
  1 file changed, 5 insertions(+), 6 deletions(-)
 
 diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
 index 094f591..96c3c2b 100644
 --- a/drivers/i2c/busses/i2c-omap.c
 +++ b/drivers/i2c/busses/i2c-omap.c
 @@ -271,11 +271,6 @@ static struct omap_i2c_driver_data am33xx_data = {
   .fclk_rate =48000,
  };
  
 -static struct omap_i2c_driver_data omap4_of_data = {
 - .flags =OMAP_I2C_FLAG_BUS_SHIFT_NONE,
 - .fclk_rate =0,
 -};
 -
  static inline void omap_i2c_write_reg(struct omap_i2c_struct *i2c_omap,
 int reg, u16 val)
  {
 @@ -1011,6 +1006,11 @@ i2c_omap_probe(struct device_d *pdev)
   if (r)
   return r;
  
 + if (of_machine_is_compatible(ti,am33xx))
 + i2c_data = am33xx_data;
 + if (of_machine_is_compatible(ti,omap4))
 + i2c_data = omap4_data;
 +
   i2c_omap-data = i2c_data;
   i2c_omap-reg_shift = (i2c_data-flags 
   OMAP_I2C_FLAG_BUS_SHIFT__SHIFT)  3;
 @@ -1140,7 +1140,6 @@ static __maybe_unused struct of_device_id 
 omap_i2c_dt_ids[] = {
   .data = (unsigned long)omap3_data,
   }, {
   .compatible = ti,omap4-i2c,
 - .data = (unsigned long)omap4_of_data,
   }, {
   /* sentinel */
   }
 -- 
 1.9.1
 
 
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Re: [PATCH] i2c: omap: fix fclk_rate for ti,omap4-i2c

2014-12-17 Thread Jan Weitzel
On Thu, Dec 11, 2014 at 08:59:48AM +0100, Sascha Hauer wrote:
 On Wed, Dec 10, 2014 at 07:49:28AM +0100, Jan Weitzel wrote:
  ti,am33xx and ti,omap4 use ti,omap4-i2c with different fclk_rate.
  By now set it according to the used cpu compatible.
  
  Signed-off-by: Jan Weitzel j.weit...@phytec.de
  ---
   drivers/i2c/busses/i2c-omap.c | 7 +++
   1 file changed, 7 insertions(+)
  
  diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
  index 094f591..d2254d4 100644
  --- a/drivers/i2c/busses/i2c-omap.c
  +++ b/drivers/i2c/busses/i2c-omap.c
  @@ -1015,6 +1015,13 @@ i2c_omap_probe(struct device_d *pdev)
  i2c_omap-reg_shift = (i2c_data-flags 
  OMAP_I2C_FLAG_BUS_SHIFT__SHIFT)  3;
   
  +   if (!i2c_data-fclk_rate) {
  +   if (of_machine_is_compatible(ti,am33xx))
  +   i2c_data-fclk_rate = am33xx_data.fclk_rate;
  +   if (of_machine_is_compatible(ti,omap4))
  +   i2c_data-fclk_rate = omap4_data.fclk_rate;
  +   }
 
 Can't we just do a:
 
   if (of_machine_is_compatible(ti,am33xx))
   i2c_omap-data = am33xx_data;
   if (of_machine_is_compatible(ti,omap4))
   i2c_omap-data = omap4_data;
 
 Instead?
Sounds good, I reworked the patch.

Jan
 
 With that we could also remove the nonworking omap4_of_data.
 
 Sascha
 
 
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[PATCH v2] i2c: omap: fix fclk_rate for ti,omap4-i2c

2014-12-11 Thread Jan Weitzel
The compatible ti,omap4-i2c don't help to get fclk_rate. So set it acording to
cpu compatible: ti,am33xx and ti,omap4

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v2: set i2c_data directly

 drivers/i2c/busses/i2c-omap.c | 11 +--
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 094f591..96c3c2b 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -271,11 +271,6 @@ static struct omap_i2c_driver_data am33xx_data = {
.fclk_rate =48000,
 };
 
-static struct omap_i2c_driver_data omap4_of_data = {
-   .flags =OMAP_I2C_FLAG_BUS_SHIFT_NONE,
-   .fclk_rate =0,
-};
-
 static inline void omap_i2c_write_reg(struct omap_i2c_struct *i2c_omap,
  int reg, u16 val)
 {
@@ -1011,6 +1006,11 @@ i2c_omap_probe(struct device_d *pdev)
if (r)
return r;
 
+   if (of_machine_is_compatible(ti,am33xx))
+   i2c_data = am33xx_data;
+   if (of_machine_is_compatible(ti,omap4))
+   i2c_data = omap4_data;
+
i2c_omap-data = i2c_data;
i2c_omap-reg_shift = (i2c_data-flags 
OMAP_I2C_FLAG_BUS_SHIFT__SHIFT)  3;
@@ -1140,7 +1140,6 @@ static __maybe_unused struct of_device_id 
omap_i2c_dt_ids[] = {
.data = (unsigned long)omap3_data,
}, {
.compatible = ti,omap4-i2c,
-   .data = (unsigned long)omap4_of_data,
}, {
/* sentinel */
}
-- 
1.9.1


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[PATCH] mtd: ubi: get_bad_peb_limit from mtd master

2014-11-19 Thread Jan Weitzel
Like mentioned in the coment we need the size of the entire flash chip.
Check if a master exists and take his size.

Otherwise the limit will be too small and kernel prints:
UBI warning: print_rsvd_warning: cannot reserve enough PEBs for \
bad PEB handling, reserved 19, need 20

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 drivers/mtd/ubi/build.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c
index 7b1c332..b02880e 100644
--- a/drivers/mtd/ubi/build.c
+++ b/drivers/mtd/ubi/build.c
@@ -237,7 +237,11 @@ static int get_bad_peb_limit(const struct ubi_device *ubi, 
int max_beb_per1024)
 * is that all the bad eraseblocks of the chip are in
 * the MTD partition we are attaching (ubi-mtd).
 */
-   device_size = ubi-mtd-size;
+   if (ubi-mtd-master)
+   device_size = ubi-mtd-master-size;
+   else
+   device_size = ubi-mtd-size;
+
device_pebs = mtd_div_by_eb(device_size, ubi-mtd);
limit = mult_frac(device_pebs, max_beb_per1024, 1024);
 
-- 
1.9.1


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[PATCH v2] ARM: omap: Add bootsource serial to xload

2014-11-13 Thread Jan Weitzel
If booted from serial via xmodem, also get barebox.bin per xmodem
For first stage you need the .pblx file instead of MLO.

Add serial boot to am335x_mlo_defconfig introduce some cleanups
by savedefconfig

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v2: make serialboot configurable
select it in am335x_mlo_defconfig

 arch/arm/configs/am335x_mlo_defconfig |  4 +--
 arch/arm/mach-omap/Kconfig|  9 +++
 arch/arm/mach-omap/xload.c| 46 +++
 3 files changed, 56 insertions(+), 3 deletions(-)

diff --git a/arch/arm/configs/am335x_mlo_defconfig 
b/arch/arm/configs/am335x_mlo_defconfig
index d691570..9734da6 100644
--- a/arch/arm/configs/am335x_mlo_defconfig
+++ b/arch/arm/configs/am335x_mlo_defconfig
@@ -1,12 +1,12 @@
 CONFIG_ARCH_OMAP=y
 CONFIG_OMAP_BUILD_IFT=y
+CONFIG_OMAP_SERIALBOOT=y
 CONFIG_OMAP_MULTI_BOARDS=y
 CONFIG_MACH_AFI_GF=y
 CONFIG_MACH_BEAGLEBONE=y
 CONFIG_MACH_PCM051=y
 CONFIG_MACH_PFLA03=y
 CONFIG_THUMB2_BAREBOX=y
-# CONFIG_CMD_ARM_CPUINFO is not set
 # CONFIG_MEMINFO is not set
 CONFIG_MMU=y
 CONFIG_TEXT_BASE=0x0
@@ -37,10 +37,8 @@ CONFIG_NAND_OMAP_GPMC=y
 CONFIG_MCI=y
 # CONFIG_MCI_WRITE is not set
 CONFIG_MCI_OMAP_HSMMC=y
-CONFIG_PINCTRL=y
 CONFIG_PINCTRL_SINGLE=y
 CONFIG_BUS_OMAP_GPMC=y
-# CONFIG_FS_RAMFS is not set
 # CONFIG_FS_DEVFS is not set
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_LFN=y
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index f9b5ec3..0996ed9 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -118,6 +118,15 @@ config OMAP4_USBBOOT
  You need the utility program omap4_usbboot to boot from USB.
  Please read omap4_usb_booting.txt for more information.
 
+config OMAP_SERIALBOOT
+   bool enable booting from serial
+   select XYMODEM
+   select FS_RAMFS
+   depends on ARCH_AM33XX  SHELL_NONE
+   help
+ Say Y here if you want to load the 2nd stage barebox.bin with
+ xmodem after booting from serial line.
+
 config OMAP_MULTI_BOARDS
bool Allow multiple boards to be selected
select HAVE_DEFAULT_ENVIRONMENT_NEW
diff --git a/arch/arm/mach-omap/xload.c b/arch/arm/mach-omap/xload.c
index e9d7bbb..8d9d84c 100644
--- a/arch/arm/mach-omap/xload.c
+++ b/arch/arm/mach-omap/xload.c
@@ -11,6 +11,7 @@
 #include sizes.h
 #include malloc.h
 #include filetype.h
+#include xymodem.h
 #include mach/generic.h
 
 struct omap_barebox_part *barebox_part;
@@ -184,6 +185,45 @@ static void *omap4_xload_boot_usb(void){
return buf;
 }
 
+static void *omap_serial_boot(void){
+   struct console_device *cdev;
+   int ret;
+   void *buf;
+   int len;
+   int fd;
+
+   /* need temporary place to store file */
+   ret = mount(none, ramfs, /, NULL);
+   if (ret  0) {
+   printf(failed to mount ramfs\n);
+   return NULL;
+   }
+
+   cdev = console_get_first_active();
+   if (!cdev) {
+   printf(failed to get console\n);
+   return NULL;
+   }
+
+   fd = open(/barebox.bin, O_WRONLY | O_CREAT);
+   if (fd  0) {
+   printf(could not create barebox.bin\n);
+   return NULL;
+   }
+
+   ret = do_load_serial_xmodem(cdev, fd);
+   if (ret  0) {
+   printf(loadx failed\n);
+   return NULL;
+   }
+
+   buf = read_file(/barebox.bin, len);
+   if (!buf)
+   printf(could not read barebox.bin from serial\n);
+
+   return buf;
+}
+
 /*
  * Replaces the default shell in xload configuration
  */
@@ -218,6 +258,12 @@ static __noreturn int omap_xload(void)
func = omap_xload_boot_spi(barebox_part-nor_offset,
barebox_part-nor_size);
break;
+   case BOOTSOURCE_SERIAL:
+   if (IS_ENABLED(CONFIG_OMAP_SERIALBOOT)) {
+   printf(booting from serial\n);
+   func = omap_serial_boot();
+   break;
+   }
default:
printf(unknown boot source. Fall back to nand\n);
func = omap_xload_boot_nand(barebox_part-nand_offset,
-- 
1.9.1


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Re: [PATCH 2/2] ARM: omap: Add bootsource serial to xload

2014-11-12 Thread Jan Weitzel

Am 12.11.2014 um 09:22 schrieb Sascha Hauer:

Hi Jan,

On Wed, Nov 12, 2014 at 08:41:54AM +0100, Jan Weitzel wrote:

If booted from serial via xmodem, also get barebox.bin per xmodem
For first stage you need the .pblx file instead of MLO.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
  arch/arm/mach-omap/Kconfig |  7 +++
  arch/arm/mach-omap/xload.c | 46 ++
  2 files changed, 53 insertions(+)

diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index f9b5ec3..953dd8f 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -118,6 +118,13 @@ config OMAP4_USBBOOT
  You need the utility program omap4_usbboot to boot from USB.
  Please read omap4_usb_booting.txt for more information.
  
+config OMAP_SERIALBOOT

+   bool
+   default y

No default y please. Better keep it disabled by default because the
OMAP4 xload configs are quiet tight I think.


Is adding it to am335x_mlo_defconfig ok? Because of the size I added the
ARCH_AM33XX dependency.

Jan



Sascha



+   select XYMODEM
+   select FS_RAMFS
+   depends on ARCH_AM33XX  SHELL_NONE
+
  config OMAP_MULTI_BOARDS
bool Allow multiple boards to be selected
select HAVE_DEFAULT_ENVIRONMENT_NEW
diff --git a/arch/arm/mach-omap/xload.c b/arch/arm/mach-omap/xload.c
index e9d7bbb..8d9d84c 100644
--- a/arch/arm/mach-omap/xload.c
+++ b/arch/arm/mach-omap/xload.c
@@ -11,6 +11,7 @@
  #include sizes.h
  #include malloc.h
  #include filetype.h
+#include xymodem.h
  #include mach/generic.h
  
  struct omap_barebox_part *barebox_part;

@@ -184,6 +185,45 @@ static void *omap4_xload_boot_usb(void){
return buf;
  }
  
+static void *omap_serial_boot(void){

+   struct console_device *cdev;
+   int ret;
+   void *buf;
+   int len;
+   int fd;
+
+   /* need temporary place to store file */
+   ret = mount(none, ramfs, /, NULL);
+   if (ret  0) {
+   printf(failed to mount ramfs\n);
+   return NULL;
+   }
+
+   cdev = console_get_first_active();
+   if (!cdev) {
+   printf(failed to get console\n);
+   return NULL;
+   }
+
+   fd = open(/barebox.bin, O_WRONLY | O_CREAT);
+   if (fd  0) {
+   printf(could not create barebox.bin\n);
+   return NULL;
+   }
+
+   ret = do_load_serial_xmodem(cdev, fd);
+   if (ret  0) {
+   printf(loadx failed\n);
+   return NULL;
+   }
+
+   buf = read_file(/barebox.bin, len);
+   if (!buf)
+   printf(could not read barebox.bin from serial\n);
+
+   return buf;
+}
+
  /*
   * Replaces the default shell in xload configuration
   */
@@ -218,6 +258,12 @@ static __noreturn int omap_xload(void)
func = omap_xload_boot_spi(barebox_part-nor_offset,
barebox_part-nor_size);
break;
+   case BOOTSOURCE_SERIAL:
+   if (IS_ENABLED(CONFIG_OMAP_SERIALBOOT)) {
+   printf(booting from serial\n);
+   func = omap_serial_boot();
+   break;
+   }
default:
printf(unknown boot source. Fall back to nand\n);
func = omap_xload_boot_nand(barebox_part-nand_offset,
--
1.9.1


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Re: [PATCH v3] commands: of_dump switch to get fixed devictree

2014-09-01 Thread Jan Weitzel

Am 01.09.2014 um 12:38 schrieb Sascha Hauer:

On Thu, Aug 21, 2014 at 01:26:19PM +0200, Jan Weitzel wrote:

Add a switch to get the devicetree processed by the registered fixups.
This is also whats the kernel gets.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v3: create a copy of the internal devicetree before use of_fix_tree

  commands/of_dump.c |   31 +--
  1 files changed, 29 insertions(+), 2 deletions(-)

diff --git a/commands/of_dump.c b/commands/of_dump.c
index cafde07..f82f0fd 100644
--- a/commands/of_dump.c
+++ b/commands/of_dump.c
@@ -34,16 +34,20 @@ static int do_of_dump(int argc, char *argv[])
  {
int opt;
int ret;
+   int fix = 0;
struct device_node *root = NULL, *node, *of_free = NULL;
char *dtbfile = NULL;
size_t size;
const char *nodename;
  
-	while ((opt = getopt(argc, argv, f:))  0) {

+   while ((opt = getopt(argc, argv, Ff:))  0) {
switch (opt) {
case 'f':
dtbfile = optarg;
break;
+   case 'F':
+   fix = 1;
+   break;
default:
return COMMAND_ERROR_USAGE;
}
@@ -75,6 +79,28 @@ static int do_of_dump(int argc, char *argv[])
of_free = root;
} else {
root = of_get_root_node();
+
+   if (fix) {
+   /* create a copy of internal devicetree */
+   void *fdt;
+   fdt = of_flatten_dtb(root);
+   root = of_unflatten_dtb(fdt);

That's really a creative way to make a copy of the device tree ;)


And it use known good functions ;)

Jan



Ok, I'll close both eyes while applying it.

Sascha




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Re: [PATCH v2] commands: of_dump switch to get fixed devictree

2014-08-21 Thread Jan Weitzel

Am 04.08.2014 um 21:21 schrieb Sascha Hauer:


Hi Jan,

On Fri, Aug 01, 2014 at 09:01:05AM +0200, Jan Weitzel wrote:

Add a switch to get the devicetree processed by the registered fixups.
This is also whats the kernel gets.

This is a very useful option.


Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v2: fix CMD OPS

  commands/of_dump.c |   12 ++--
  1 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/commands/of_dump.c b/commands/of_dump.c
index cafde07..1b487c7 100644
--- a/commands/of_dump.c
+++ b/commands/of_dump.c
@@ -34,16 +34,20 @@ static int do_of_dump(int argc, char *argv[])
  {
int opt;
int ret;
+   int fix = 0;
struct device_node *root = NULL, *node, *of_free = NULL;
char *dtbfile = NULL;
size_t size;
const char *nodename;
  
-	while ((opt = getopt(argc, argv, f:))  0) {

+   while ((opt = getopt(argc, argv, Ff:))  0) {
switch (opt) {
case 'f':
dtbfile = optarg;
break;
+   case 'F':
+   fix = 1;
+   break;
default:
return COMMAND_ERROR_USAGE;
}
@@ -77,6 +81,9 @@ static int do_of_dump(int argc, char *argv[])
root = of_get_root_node();
}
  
+	if (fix)

+   of_get_fixed_tree(root);

of_get_fixed_tree() returns an allocated flat device tree. You should
free it.

As an alternative you could call of_fix_tree() instead.

Also I'm not sure about the API. of_fix_tree manipulates the internal
tree, so when you use of_dump -F once you'll always get the fixed tree
afterwards, even when called without -F. This might be confusing.


I'll post a patch that use of_flatten_dtb / of_unflatten_dtb to create a copy 
of the internal devicetree.


We have the same problem elsewhere in the tree though, right now I'm
unsure what to do about it. And then again, I'm on holiday, so I won't
do anything about it this month ;)


Have a nice holday :)

Jan



Sascha




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[PATCH v3] commands: of_dump switch to get fixed devictree

2014-08-21 Thread Jan Weitzel
Add a switch to get the devicetree processed by the registered fixups.
This is also whats the kernel gets.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v3: create a copy of the internal devicetree before use of_fix_tree

 commands/of_dump.c |   31 +--
 1 files changed, 29 insertions(+), 2 deletions(-)

diff --git a/commands/of_dump.c b/commands/of_dump.c
index cafde07..f82f0fd 100644
--- a/commands/of_dump.c
+++ b/commands/of_dump.c
@@ -34,16 +34,20 @@ static int do_of_dump(int argc, char *argv[])
 {
int opt;
int ret;
+   int fix = 0;
struct device_node *root = NULL, *node, *of_free = NULL;
char *dtbfile = NULL;
size_t size;
const char *nodename;
 
-   while ((opt = getopt(argc, argv, f:))  0) {
+   while ((opt = getopt(argc, argv, Ff:))  0) {
switch (opt) {
case 'f':
dtbfile = optarg;
break;
+   case 'F':
+   fix = 1;
+   break;
default:
return COMMAND_ERROR_USAGE;
}
@@ -75,6 +79,28 @@ static int do_of_dump(int argc, char *argv[])
of_free = root;
} else {
root = of_get_root_node();
+
+   if (fix) {
+   /* create a copy of internal devicetree */
+   void *fdt;
+   fdt = of_flatten_dtb(root);
+   root = of_unflatten_dtb(fdt);
+
+   free(fdt);
+
+   if (IS_ERR(root)) {
+   ret = PTR_ERR(root);
+   goto out;
+   }
+
+   of_free = root;
+   }
+   }
+
+   if (fix) {
+   ret = of_fix_tree(root);
+   if (ret)
+   goto out;
}
 
node = of_find_node_by_path_or_alias(root, nodename);
@@ -96,12 +122,13 @@ out:
 BAREBOX_CMD_HELP_START(of_dump)
 BAREBOX_CMD_HELP_TEXT(Options:)
 BAREBOX_CMD_HELP_OPT  (-f dtb,  work on dtb instead of internal 
devicetree\n)
+BAREBOX_CMD_HELP_OPT  (-F,  return fixed devicetree\n)
 BAREBOX_CMD_HELP_END
 
 BAREBOX_CMD_START(of_dump)
.cmd= do_of_dump,
BAREBOX_CMD_DESC(dump devicetree nodes)
-   BAREBOX_CMD_OPTS([-f] [NODE])
+   BAREBOX_CMD_OPTS([-fF] [NODE])
BAREBOX_CMD_GROUP(CMD_GRP_MISC)
BAREBOX_CMD_COMPLETE(devicetree_file_complete)
BAREBOX_CMD_HELP(cmd_of_dump_help)
-- 
1.7.0.4


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[PATCH v2] commands: of_dump switch to get fixed devictree

2014-08-01 Thread Jan Weitzel
Add a switch to get the devicetree processed by the registered fixups.
This is also whats the kernel gets.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v2: fix CMD OPS

 commands/of_dump.c |   12 ++--
 1 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/commands/of_dump.c b/commands/of_dump.c
index cafde07..1b487c7 100644
--- a/commands/of_dump.c
+++ b/commands/of_dump.c
@@ -34,16 +34,20 @@ static int do_of_dump(int argc, char *argv[])
 {
int opt;
int ret;
+   int fix = 0;
struct device_node *root = NULL, *node, *of_free = NULL;
char *dtbfile = NULL;
size_t size;
const char *nodename;
 
-   while ((opt = getopt(argc, argv, f:))  0) {
+   while ((opt = getopt(argc, argv, Ff:))  0) {
switch (opt) {
case 'f':
dtbfile = optarg;
break;
+   case 'F':
+   fix = 1;
+   break;
default:
return COMMAND_ERROR_USAGE;
}
@@ -77,6 +81,9 @@ static int do_of_dump(int argc, char *argv[])
root = of_get_root_node();
}
 
+   if (fix)
+   of_get_fixed_tree(root);
+
node = of_find_node_by_path_or_alias(root, nodename);
if (!node) {
printf(Cannot find nodepath %s\n, nodename);
@@ -96,12 +103,13 @@ out:
 BAREBOX_CMD_HELP_START(of_dump)
 BAREBOX_CMD_HELP_TEXT(Options:)
 BAREBOX_CMD_HELP_OPT  (-f dtb,  work on dtb instead of internal 
devicetree\n)
+BAREBOX_CMD_HELP_OPT  (-F,  return fixed devicetree\n)
 BAREBOX_CMD_HELP_END
 
 BAREBOX_CMD_START(of_dump)
.cmd= do_of_dump,
BAREBOX_CMD_DESC(dump devicetree nodes)
-   BAREBOX_CMD_OPTS([-f] [NODE])
+   BAREBOX_CMD_OPTS([-fF] [NODE])
BAREBOX_CMD_GROUP(CMD_GRP_MISC)
BAREBOX_CMD_COMPLETE(devicetree_file_complete)
BAREBOX_CMD_HELP(cmd_of_dump_help)
-- 
1.7.0.4


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Re: [PATCH v2] of: find also nodes by mixture of alias and path

2014-01-06 Thread Jan Weitzel
Am Montag, den 06.01.2014, 10:32 +0100 schrieb Sascha Hauer:
 Hi Jan,
 
 On Fri, Dec 20, 2013 at 02:24:48PM +0100, Jan Weitzel wrote:
  Let of_find_node_by_path_or_alias also find a node starting with an alias
  followed by a path like i2c0/tps@24
  
  Signed-off-by: Jan Weitzel j.weit...@phytec.de
  ---
  v2: rename ret to node
  
   drivers/of/base.c |   22 +-
   1 files changed, 21 insertions(+), 1 deletions(-)
  
  diff --git a/drivers/of/base.c b/drivers/of/base.c
  index ea2d879..5b5272d 100644
  --- a/drivers/of/base.c
  +++ b/drivers/of/base.c
  @@ -1378,11 +1378,31 @@ EXPORT_SYMBOL(of_find_node_by_path);
   struct device_node *of_find_node_by_path_or_alias(struct device_node *root,
  const char *str)
   {
  +   struct device_node *node;
  +   char *slash, *alias;
  +   size_t len = 0;
  +
  if (*str ==  '/')
  return of_find_node_by_path_from(root, str);
  -   else
  +
  +   slash = _strchr(str, '/');
 
 You should use regular strchr, not _strchr. Or is there any reason to do
 it differently here?
I got this from the strchr wrapper:

drivers/of/base.c: In function 'of_find_node_by_path_or_alias':
drivers/of/base.c:1388:8: warning: assignment discards 'const' qualifier
from pointer target type [enabled by default]

Is there a cleaner way?

Jan
 
 Sascha
 



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[PATCH v3] of: find also nodes by mixture of alias and path

2014-01-06 Thread Jan Weitzel
Let of_find_node_by_path_or_alias also find a node starting with an alias
followed by a path like i2c0/tps@24

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v2: rename ret to node
v3: use strchr
 drivers/of/base.c |   23 ++-
 1 files changed, 22 insertions(+), 1 deletions(-)

diff --git a/drivers/of/base.c b/drivers/of/base.c
index ea2d879..6e5e7d6 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -1378,11 +1378,32 @@ EXPORT_SYMBOL(of_find_node_by_path);
 struct device_node *of_find_node_by_path_or_alias(struct device_node *root,
const char *str)
 {
+   struct device_node *node;
+   const char *slash;
+   char *alias;
+   size_t len = 0;
+
if (*str ==  '/')
return of_find_node_by_path_from(root, str);
-   else
+
+   slash = strchr(str, '/');
+
+   if (!slash)
return of_find_node_by_alias(root, str);
 
+   len = slash - str + 1;
+   alias = xmalloc(len);
+   strlcpy(alias, str, len);
+
+   node = of_find_node_by_alias(root, alias);
+
+   if (!node)
+   goto out;
+
+   node = of_find_node_by_path_from(node, slash);
+out:
+   free(alias);
+   return node;
 }
 EXPORT_SYMBOL(of_find_node_by_path_or_alias);
 
-- 
1.7.0.4


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Re: [PATCH v2] of: find also nodes by mixture of alias and path

2014-01-06 Thread Jan Weitzel
Am Montag, den 06.01.2014, 11:50 +0100 schrieb Sascha Hauer:
 On Mon, Jan 06, 2014 at 11:26:59AM +0100, Jan Weitzel wrote:
  Am Montag, den 06.01.2014, 10:32 +0100 schrieb Sascha Hauer:
   Hi Jan,
   
   On Fri, Dec 20, 2013 at 02:24:48PM +0100, Jan Weitzel wrote:
Let of_find_node_by_path_or_alias also find a node starting with an 
alias
followed by a path like i2c0/tps@24

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v2: rename ret to node

 drivers/of/base.c |   22 +-
 1 files changed, 21 insertions(+), 1 deletions(-)

diff --git a/drivers/of/base.c b/drivers/of/base.c
index ea2d879..5b5272d 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -1378,11 +1378,31 @@ EXPORT_SYMBOL(of_find_node_by_path);
 struct device_node *of_find_node_by_path_or_alias(struct device_node 
*root,
const char *str)
 {
+   struct device_node *node;
+   char *slash, *alias;
+   size_t len = 0;
+
if (*str ==  '/')
return of_find_node_by_path_from(root, str);
-   else
+
+   slash = _strchr(str, '/');
   
   You should use regular strchr, not _strchr. Or is there any reason to do
   it differently here?
  I got this from the strchr wrapper:
  
  drivers/of/base.c: In function 'of_find_node_by_path_or_alias':
  drivers/of/base.c:1388:8: warning: assignment discards 'const' qualifier
  from pointer target type [enabled by default]
  
  Is there a cleaner way?
 
 Try making 'slash' const.
Arghh not *str ...
Thanks Jan

 
 Sascha
 



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[PATCH v2] of: find also nodes by mixture of alias and path

2013-12-20 Thread Jan Weitzel
Let of_find_node_by_path_or_alias also find a node starting with an alias
followed by a path like i2c0/tps@24

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v2: rename ret to node

 drivers/of/base.c |   22 +-
 1 files changed, 21 insertions(+), 1 deletions(-)

diff --git a/drivers/of/base.c b/drivers/of/base.c
index ea2d879..5b5272d 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -1378,11 +1378,31 @@ EXPORT_SYMBOL(of_find_node_by_path);
 struct device_node *of_find_node_by_path_or_alias(struct device_node *root,
const char *str)
 {
+   struct device_node *node;
+   char *slash, *alias;
+   size_t len = 0;
+
if (*str ==  '/')
return of_find_node_by_path_from(root, str);
-   else
+
+   slash = _strchr(str, '/');
+
+   if (!slash)
return of_find_node_by_alias(root, str);
 
+   len = slash - str + 1;
+   alias = xmalloc(len);
+   strlcpy(alias, str, len);
+
+   node = of_find_node_by_alias(root, alias);
+
+   if (!node)
+   goto out;
+
+   node = of_find_node_by_path_from(node, slash);
+out:
+   free(alias);
+   return node;
 }
 EXPORT_SYMBOL(of_find_node_by_path_or_alias);
 
-- 
1.7.0.4


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[PATCH] of: find also nodes by mixture of alias and path

2013-12-19 Thread Jan Weitzel
Let of_find_node_by_path_or_alias also find a node starting with an alias
followed by a path like i2c0/tps@24

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 drivers/of/base.c |   22 +-
 1 files changed, 21 insertions(+), 1 deletions(-)

diff --git a/drivers/of/base.c b/drivers/of/base.c
index ea2d879..dc3d459 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -1378,11 +1378,31 @@ EXPORT_SYMBOL(of_find_node_by_path);
 struct device_node *of_find_node_by_path_or_alias(struct device_node *root,
const char *str)
 {
+   struct device_node *ret;
+   char *slash, *alias;
+   size_t len = 0;
+
if (*str ==  '/')
return of_find_node_by_path_from(root, str);
-   else
+
+   slash = _strchr(str, '/');
+
+   if (!slash)
return of_find_node_by_alias(root, str);
 
+   len = slash - str + 1;
+   alias = xmalloc(len);
+   strlcpy(alias, str, len);
+
+   ret = of_find_node_by_alias(root, alias);
+
+   if (!ret)
+   goto out;
+
+   ret = of_find_node_by_path_from(ret, slash);
+out:
+   free(alias);
+   return ret;
 }
 EXPORT_SYMBOL(of_find_node_by_path_or_alias);
 
-- 
1.7.0.4


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[PATCH] oftree command: Allow free stored dtb before load

2013-12-19 Thread Jan Weitzel
Don't return after freeing stored devicetree if also loading ist wanted.
Allow  oftree -f -l my.dtb

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 commands/oftree.c |3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/commands/oftree.c b/commands/oftree.c
index 475f019..3fa516c 100644
--- a/commands/oftree.c
+++ b/commands/oftree.c
@@ -88,7 +88,8 @@ static int do_oftree(int argc, char *argv[])
if (root)
of_delete_node(root);
 
-   return 0;
+   if (!load)
+   return 0;
}
 
if (optind  argc)
-- 
1.7.0.4


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[PATCH] pinctrl: single: select CONFIG_PINCTRL

2013-12-16 Thread Jan Weitzel
pinctrl_register is used.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 drivers/pinctrl/Kconfig |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 8257586..c6bb51c 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -24,6 +24,7 @@ config PINCTRL_IMX_IOMUX_V3
  This iomux controller is found on i.MX25,35,51,53,6.
 
 config PINCTRL_SINGLE
+   select PINCTRL
bool pinctrl single
 
 config PINCTRL_TEGRA20
-- 
1.7.0.4


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Re: [PATCH 04/17] ARM: am335x phytec phyCORE: Switch to devicetree probe support

2013-12-11 Thread Jan Weitzel
Am Dienstag, den 10.12.2013, 15:24 +0100 schrieb Sascha Hauer:
 On Tue, Dec 10, 2013 at 03:22:12PM +0100, Jan Weitzel wrote:
  Am Dienstag, den 26.11.2013, 17:45 +0100 schrieb Sascha Hauer:
   This switches the am335x Phytec phyCORE to devicetree probe support.
   For now we use a linked in dtb.
   
   Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
   ---
arch/arm/boards/pcm051/Makefile   |   2 +-
arch/arm/boards/pcm051/board.c| 149 
   ++
arch/arm/boards/pcm051/mux.c  |  65 ---
arch/arm/boards/pcm051/mux.h  |   4 -
arch/arm/configs/pcm051_defconfig |  26 --
arch/arm/configs/pcm051_mlo_defconfig |   8 +-
6 files changed, 32 insertions(+), 222 deletions(-)
delete mode 100644 arch/arm/boards/pcm051/mux.c
delete mode 100644 arch/arm/boards/pcm051/mux.h
   
   ...
   diff --git a/arch/arm/configs/pcm051_defconfig 
   b/arch/arm/configs/pcm051_defconfig
   index 97e0940..e55ac47 100644
   --- a/arch/arm/configs/pcm051_defconfig
   +++ b/arch/arm/configs/pcm051_defconfig
   @@ -1,16 +1,21 @@
   +CONFIG_BUILTIN_DTB=y
   +CONFIG_BUILTIN_DTB_NAME=am335x-phytec-phycore
CONFIG_ARCH_OMAP=y
   -CONFIG_ARCH_AM33XX=y
CONFIG_BAREBOX_UPDATE_AM33XX_SPI_NOR_MLO=y
CONFIG_MACH_PCM051=y
   -CONFIG_OMAP_UART1=y
   -CONFIG_AEABI=y
   +CONFIG_THUMB2_BAREBOX=y
  
  Is there a reason to use thumb2 now?
 
 It generates smaller binaries. Does this cause trouble?
No I didn't see any problems. I used it only for MLO/xload builds by
now.

Jan 
 
 Sascha
 



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Re: [PATCH 04/17] ARM: am335x phytec phyCORE: Switch to devicetree probe support

2013-12-10 Thread Jan Weitzel
Am Dienstag, den 26.11.2013, 17:45 +0100 schrieb Sascha Hauer:
 This switches the am335x Phytec phyCORE to devicetree probe support.
 For now we use a linked in dtb.
 
 Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
 ---
  arch/arm/boards/pcm051/Makefile   |   2 +-
  arch/arm/boards/pcm051/board.c| 149 
 ++
  arch/arm/boards/pcm051/mux.c  |  65 ---
  arch/arm/boards/pcm051/mux.h  |   4 -
  arch/arm/configs/pcm051_defconfig |  26 --
  arch/arm/configs/pcm051_mlo_defconfig |   8 +-
  6 files changed, 32 insertions(+), 222 deletions(-)
  delete mode 100644 arch/arm/boards/pcm051/mux.c
  delete mode 100644 arch/arm/boards/pcm051/mux.h
 
 ...
 diff --git a/arch/arm/configs/pcm051_defconfig 
 b/arch/arm/configs/pcm051_defconfig
 index 97e0940..e55ac47 100644
 --- a/arch/arm/configs/pcm051_defconfig
 +++ b/arch/arm/configs/pcm051_defconfig
 @@ -1,16 +1,21 @@
 +CONFIG_BUILTIN_DTB=y
 +CONFIG_BUILTIN_DTB_NAME=am335x-phytec-phycore
  CONFIG_ARCH_OMAP=y
 -CONFIG_ARCH_AM33XX=y
  CONFIG_BAREBOX_UPDATE_AM33XX_SPI_NOR_MLO=y
  CONFIG_MACH_PCM051=y
 -CONFIG_OMAP_UART1=y
 -CONFIG_AEABI=y
 +CONFIG_THUMB2_BAREBOX=y

Is there a reason to use thumb2 now?

Jan
  CONFIG_ARM_BOARD_APPEND_ATAG=y
  CONFIG_CMD_ARM_MMUINFO=y
  CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
  CONFIG_ARM_UNWIND=y
 +CONFIG_PBL_IMAGE=y
 +CONFIG_PBL_RELOCATABLE=y
  CONFIG_MMU=y
 -CONFIG_TEXT_BASE=0x8f00
 -CONFIG_MALLOC_SIZE=0x200
 +CONFIG_TEXT_BASE=0x0
 +CONFIG_MALLOC_SIZE=0x0
 +CONFIG_MALLOC_TLSF=y
 +CONFIG_KALLSYMS=y
 +CONFIG_RELOCATABLE=y
  CONFIG_PROMPT=barebox@pcm051
  CONFIG_LONGHELP=y
  CONFIG_HUSH_FANCY_PROMPT=y
 @@ -21,9 +26,6 @@ CONFIG_MENU=y
  CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
  CONFIG_DEFAULT_ENVIRONMENT_PATH=arch/arm/boards/pcm051/env
  CONFIG_DEBUG_INFO=y
 -CONFIG_ENABLE_FLASH_NOISE=y
 -CONFIG_ENABLE_PARTITION_NOISE=y
 -CONFIG_ENABLE_DEVICE_NOISE=y
  CONFIG_CMD_EDIT=y
  CONFIG_CMD_SLEEP=y
  CONFIG_CMD_SAVEENV=y
 @@ -44,6 +46,7 @@ CONFIG_CMD_UBIFORMAT=y
  CONFIG_CMD_BOOTM_SHOW_TYPE=y
  CONFIG_CMD_UIMAGE=y
  CONFIG_CMD_BOOTZ=y
 +# CONFIG_CMD_BOOTU is not set
  CONFIG_CMD_RESET=y
  CONFIG_CMD_GO=y
  CONFIG_CMD_BAREBOX_UPDATE=y
 @@ -57,6 +60,8 @@ CONFIG_NET=y
  CONFIG_NET_DHCP=y
  CONFIG_NET_NFS=y
  CONFIG_NET_PING=y
 +CONFIG_OFDEVICE=y
 +CONFIG_OF_BAREBOX_DRIVERS=y
  CONFIG_DRIVER_SERIAL_NS16550=y
  CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
  CONFIG_DRIVER_NET_CPSW=y
 @@ -67,13 +72,16 @@ CONFIG_MTD=y
  CONFIG_MTD_M25P80=y
  CONFIG_NAND=y
  CONFIG_NAND_OMAP_GPMC=y
 -CONFIG_UBI=y
 +CONFIG_MTD_UBI=y
  CONFIG_USB=y
  CONFIG_MCI=y
  CONFIG_MCI_STARTUP=y
  CONFIG_MCI_OMAP_HSMMC=y
  CONFIG_EEPROM_AT24=y
  CONFIG_GPIO_GENERIC_PLATFORM=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCTRL_SINGLE=y
 +CONFIG_BUS_OMAP_GPMC=y
  CONFIG_FS_TFTP=y
  CONFIG_FS_NFS=y
  CONFIG_FS_FAT=y
 diff --git a/arch/arm/configs/pcm051_mlo_defconfig 
 b/arch/arm/configs/pcm051_mlo_defconfig
 index ea65979..4f6a7b1 100644
 --- a/arch/arm/configs/pcm051_mlo_defconfig
 +++ b/arch/arm/configs/pcm051_mlo_defconfig
 @@ -1,8 +1,8 @@
 +CONFIG_BUILTIN_DTB=y
 +CONFIG_BUILTIN_DTB_NAME=am335x-phytec-phycore
  CONFIG_ARCH_OMAP=y
 -CONFIG_ARCH_AM33XX=y
  CONFIG_OMAP_BUILD_IFT=y
  CONFIG_MACH_PCM051=y
 -CONFIG_OMAP_UART1=y
  CONFIG_THUMB2_BAREBOX=y
  # CONFIG_CMD_ARM_CPUINFO is not set
  # CONFIG_MEMINFO is not set
 @@ -17,6 +17,7 @@ CONFIG_SHELL_NONE=y
  # CONFIG_TIMESTAMP is not set
  CONFIG_CONSOLE_SIMPLE=y
  # CONFIG_DEFAULT_ENVIRONMENT is not set
 +CONFIG_OFDEVICE=y
  CONFIG_DRIVER_SERIAL_NS16550=y
  CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
  CONFIG_DRIVER_SPI_OMAP3=y
 @@ -27,6 +28,9 @@ CONFIG_NAND_OMAP_GPMC=y
  CONFIG_MCI=y
  CONFIG_MCI_STARTUP=y
  CONFIG_MCI_OMAP_HSMMC=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCTRL_SINGLE=y
 +CONFIG_BUS_OMAP_GPMC=y
  # CONFIG_FS_RAMFS is not set
  # CONFIG_FS_DEVFS is not set
  CONFIG_FS_FAT=y



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[PATCH] commands: of_node fix descripion

2013-11-26 Thread Jan Weitzel
Remove copy and paste error

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 commands/Kconfig |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/commands/Kconfig b/commands/Kconfig
index 9738ec4..1e07b5b 100644
--- a/commands/Kconfig
+++ b/commands/Kconfig
@@ -559,7 +559,7 @@ config CMD_OF_NODE
select OFTREE
prompt of_node
help
- The of_property command allows adding and removing devicetree nodes.
+ The of_node command allows adding and removing devicetree nodes.
 
 endmenu
 
-- 
1.7.0.4


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[PATCH] i2c-omap: fix reported revison

2013-10-07 Thread Jan Weitzel
Report correct major and minor revision
Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 drivers/i2c/busses/i2c-omap.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index bec3b29..8e31ef4 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -1079,7 +1079,7 @@ i2c_omap_probe(struct device_d *pdev)
omap_i2c_init(i2c_omap);
 
dev_info(pdev, bus %d rev%d.%d at %d kHz\n,
-pdev-id, i2c_omap-rev  4, i2c_omap-rev  0xf, 
i2c_omap-speed);
+pdev-id, major, minor, i2c_omap-speed);
 
omap_i2c_idle(i2c_omap);
 
-- 
1.7.0.4


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[PATCH] i2c-omap: Update driver

2013-09-26 Thread Jan Weitzel
The driver didn't work well with at24 driver. NACKS are lost.
Errors are lost in isr due to the local variable err. Also we didn't wait for
bus free in omap_i2c_xfer_msg.

Fix issues and get other improvements from linux kernel

Tested on OMAP4 and AM335x

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/mach-omap/include/mach/generic.h |9 +-
 drivers/i2c/busses/i2c-omap.c |  635 -
 include/i2c/i2c.h |1 +
 3 files changed, 454 insertions(+), 191 deletions(-)

diff --git a/arch/arm/mach-omap/include/mach/generic.h 
b/arch/arm/mach-omap/include/mach/generic.h
index ece8c2b..31ab100 100644
--- a/arch/arm/mach-omap/include/mach/generic.h
+++ b/arch/arm/mach-omap/include/mach/generic.h
@@ -2,12 +2,13 @@
 #define _MACH_GENERIC_H
 
 /* I2C controller revisions */
-#define OMAP_I2C_REV_2 0x20
+#define OMAP_I2C_OMAP1_REV_20x20
 
 /* I2C controller revisions present on specific hardware */
-#define OMAP_I2C_REV_ON_2430   0x36
-#define OMAP_I2C_REV_ON_3430   0x3C
-#define OMAP_I2C_REV_ON_4430   0x40
+#define OMAP_I2C_REV_ON_2430   0x0036
+#define OMAP_I2C_REV_ON_3430_3530   0x003C
+#define OMAP_I2C_REV_ON_36300x0040
+#define OMAP_I2C_REV_ON_4430_PLUS   0x5042
 
 #ifdef CONFIG_ARCH_OMAP
 #define cpu_is_omap2430()  (1)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 2eb5133..bec3b29 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -131,29 +131,41 @@
 #define SYSC_IDLEMODE_SMART0x2
 #define SYSC_CLOCKACTIVITY_FCLK0x2
 
+/* Errata definitions */
+#define I2C_OMAP_ERRATA_I207   (1  0)
+#define I2C_OMAP_ERRATA_I462   (1  1)
+
 /* i2c driver flags from kernel */
-#define OMAP_I2C_FLAG_RESET_REGS_POSTIDLE  BIT(3)
+#define OMAP_I2C_FLAG_NO_FIFO  BIT(0)
+#define OMAP_I2C_FLAG_16BIT_DATA_REG   BIT(2)
 #define OMAP_I2C_FLAG_BUS_SHIFT_NONE   0
 #define OMAP_I2C_FLAG_BUS_SHIFT_1  BIT(7)
 #define OMAP_I2C_FLAG_BUS_SHIFT_2  BIT(8)
 #define OMAP_I2C_FLAG_BUS_SHIFT__SHIFT 7
 
+/* timeout waiting for the controller to respond */
+#define OMAP_I2C_TIMEOUT   (1000 * MSECOND)/* ms */
+
 struct omap_i2c_struct {
void*base;
u8  reg_shift;
struct omap_i2c_driver_data *data;
struct resource *ioarea;
u32 speed;  /* Speed of bus in Khz */
+   u16 scheme;
u16 cmd_err;
u8  *buf;
+   u8  *regs;
size_t  buf_len;
struct i2c_adapter  adapter;
+   u8  threshold;
u8  fifo_size;  /* use as flag and value
 * fifo_size==0 implies no fifo
 * if set, should be trsh+1
 */
-   u8  rev;
+   u32 rev;
unsignedb_hw:1; /* bad h/w fixes */
+   unsignedreceiver:1; /* true for receiver mode */
u16 iestate;/* Saved interrupt register */
u16 pscstate;
u16 scllstate;
@@ -161,6 +173,7 @@ struct omap_i2c_struct {
u16 bufstate;
u16 syscstate;
u16 westate;
+   u16 errata;
 };
 #define to_omap_i2c_struct(a)  container_of(a, struct omap_i2c_struct, adapter)
 
@@ -183,14 +196,15 @@ enum {
OMAP_I2C_SCLH_REG,
OMAP_I2C_SYSTEST_REG,
OMAP_I2C_BUFSTAT_REG,
-   OMAP_I2C_REVNB_LO,
-   OMAP_I2C_REVNB_HI,
-   OMAP_I2C_IRQSTATUS_RAW,
-   OMAP_I2C_IRQENABLE_SET,
-   OMAP_I2C_IRQENABLE_CLR,
+   /* only on OMAP4430 */
+   OMAP_I2C_IP_V2_REVNB_LO,
+   OMAP_I2C_IP_V2_REVNB_HI,
+   OMAP_I2C_IP_V2_IRQSTATUS_RAW,
+   OMAP_I2C_IP_V2_IRQENABLE_SET,
+   OMAP_I2C_IP_V2_IRQENABLE_CLR,
 };
 
-static const u8 reg_map[] = {
+static const u8 reg_map_ip_v1[] = {
[OMAP_I2C_REV_REG] = 0x00,
[OMAP_I2C_IE_REG] = 0x01,
[OMAP_I2C_STAT_REG] = 0x02,
@@ -211,7 +225,7 @@ static const u8 reg_map[] = {
[OMAP_I2C_BUFSTAT_REG] = 0x10,
 };
 
-static const u8 omap4_reg_map[] = {
+static const u8 reg_map_ip_v2[] = {
[OMAP_I2C_REV_REG] = 0x04,
[OMAP_I2C_IE_REG] = 0x2c,
[OMAP_I2C_STAT_REG] = 0x28,
@@ -230,92 +244,104 @@ static const u8 omap4_reg_map[] = {
[OMAP_I2C_SCLH_REG] = 0xb8,
[OMAP_I2C_SYSTEST_REG] = 0xbc,
[OMAP_I2C_BUFSTAT_REG] = 0xc0

[PATCH] net/phy: support of mmd register read and write

2013-08-30 Thread Jan Weitzel
Add function for indirect access of the mmd registers, based on linux.
phy_read_mmd_indirect
phy_write_mmd_indirect

Also clean some private mmd functions

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/boards/dmo-mx6-realq7/board.c |   14 ++--
 arch/arm/boards/tqma6x/board.c |   14 ++--
 drivers/net/phy/phy.c  |   63 
 include/linux/phy.h|4 ++
 4 files changed, 73 insertions(+), 22 deletions(-)

diff --git a/arch/arm/boards/dmo-mx6-realq7/board.c 
b/arch/arm/boards/dmo-mx6-realq7/board.c
index 69d93f8..628f5cb 100644
--- a/arch/arm/boards/dmo-mx6-realq7/board.c
+++ b/arch/arm/boards/dmo-mx6-realq7/board.c
@@ -58,23 +58,15 @@ static iomux_v3_cfg_t realq7_pads_gpio[] = {
MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24,
 };
 
-static void mmd_write_reg(struct phy_device *dev, int device, int reg, int val)
-{
-   phy_write(dev, 0x0d, device);
-   phy_write(dev, 0x0e, reg);
-   phy_write(dev, 0x0d, (1  14) | device);
-   phy_write(dev, 0x0e, val);
-}
-
 static int ksz9031rn_phy_fixup(struct phy_device *dev)
 {
/*
 * min rx data delay, max rx/tx clock delay,
 * min rx/tx control delay
 */
-   mmd_write_reg(dev, 2, 4, 0);
-   mmd_write_reg(dev, 2, 5, 0);
-   mmd_write_reg(dev, 2, 8, 0x003ff);
+   phy_write_mmd_indirect(dev, 4, 2, 0);
+   phy_write_mmd_indirect(dev, 5, 2, 0);
+   phy_write_mmd_indirect(dev, 8, 2, 0x03ff);
 
return 0;
 }
diff --git a/arch/arm/boards/tqma6x/board.c b/arch/arm/boards/tqma6x/board.c
index 9e81a1d..3e051a5 100644
--- a/arch/arm/boards/tqma6x/board.c
+++ b/arch/arm/boards/tqma6x/board.c
@@ -58,23 +58,15 @@ static iomux_v3_cfg_t tqma6x_pads_gpio[] = {
MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24,
 };
 
-static void mmd_write_reg(struct phy_device *dev, int device, int reg, int val)
-{
-   phy_write(dev, 0x0d, device);
-   phy_write(dev, 0x0e, reg);
-   phy_write(dev, 0x0d, (1  14) | device);
-   phy_write(dev, 0x0e, val);
-}
-
 static int ksz9031rn_phy_fixup(struct phy_device *dev)
 {
/*
 * min rx data delay, max rx/tx clock delay,
 * min rx/tx control delay
 */
-   mmd_write_reg(dev, 2, 4, 0);
-   mmd_write_reg(dev, 2, 5, 0);
-   mmd_write_reg(dev, 2, 8, 0x003ff);
+   phy_write_mmd_indirect(dev, 4, 2, 0);
+   phy_write_mmd_indirect(dev, 5, 2, 0);
+   phy_write_mmd_indirect(dev, 8, 2, 0x003ff);
 
return 0;
 }
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 112ff13..db00e38 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -632,6 +632,69 @@ int genphy_read_status(struct phy_device *phydev)
return 0;
 }
 
+static inline void mmd_phy_indirect(struct phy_device *phydev, int prtad,
+   int devad)
+{
+   /* Write the desired MMD Devad */
+   phy_write(phydev, MII_MMD_CTRL, devad);
+
+   /* Write the desired MMD register address */
+   phy_write(phydev, MII_MMD_DATA, prtad);
+
+   /* Select the Function : DATA with no post increment */
+   phy_write(phydev, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
+}
+
+/**
+ * phy_read_mmd_indirect - reads data from the MMD registers
+ * @phy_device: phy device
+ * @prtad: MMD Address
+ * @devad: MMD DEVAD
+ *
+ * Description: it reads data from the MMD registers (clause 22 to access to
+ * clause 45) of the specified phy address.
+ * To read these register we have:
+ * 1) Write reg 13 // DEVAD
+ * 2) Write reg 14 // MMD Address
+ * 3) Write reg 13 // MMD Data Command for MMD DEVAD
+ * 3) Read  reg 14 // Read MMD data
+ */
+int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad)
+{
+   u32 ret;
+
+   mmd_phy_indirect(phydev, prtad, devad);
+
+   /* Read the content of the MMD's selected register */
+   ret = phy_read(phydev, MII_MMD_DATA);
+
+   return ret;
+}
+
+/**
+ * phy_write_mmd_indirect - writes data to the MMD registers
+ * @phy_device: phy device
+ * @prtad: MMD Address
+ * @devad: MMD DEVAD
+ * @data: data to write in the MMD register
+ *
+ * Description: Write data from the MMD registers of the specified
+ * phy address.
+ * To write these register we have:
+ * 1) Write reg 13 // DEVAD
+ * 2) Write reg 14 // MMD Address
+ * 3) Write reg 13 // MMD Data Command for MMD DEVAD
+ * 3) Write reg 14 // Write MMD data
+ */
+void phy_write_mmd_indirect(struct phy_device *phydev, int prtad, int devad,
+  u16 data)
+{
+   mmd_phy_indirect(phydev, prtad, devad);
+
+   /* Write the data into MMD's selected register */
+   phy_write(phydev, MII_MMD_DATA, data);
+}
+
 static int genphy_config_init(struct phy_device *phydev)
 {
int val;
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 8e60758..94f631b 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -288,5 +288,9 @@ int phy_register_fixup_for_uid

[PATCHi v2] i2c-omap: fix am33xx and omap3 fclk_rate

2013-08-30 Thread Jan Weitzel
commit f64ed12b accidentally swap fclk_rate from am33xx and omap3.
Revert this change.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v2:
Fix also omap3 fclk_rate
Rename patch i2c-omap: fix am33xx fclk_rate

 drivers/i2c/busses/i2c-omap.c |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index b2a74c0..2eb5133 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -246,7 +246,7 @@ struct omap_i2c_driver_data {
 static struct omap_i2c_driver_data omap3_data = {
.flags =OMAP_I2C_FLAG_RESET_REGS_POSTIDLE |
OMAP_I2C_FLAG_BUS_SHIFT_2,
-   .fclk_rate =48000,
+   .fclk_rate =96000,
.regs = (u8 *) reg_map,
 };
 
@@ -259,7 +259,7 @@ static struct omap_i2c_driver_data omap4_data = {
 static struct omap_i2c_driver_data am33xx_data = {
.flags =OMAP_I2C_FLAG_RESET_REGS_POSTIDLE |
OMAP_I2C_FLAG_BUS_SHIFT_NONE,
-   .fclk_rate =96000,
+   .fclk_rate =48000,
.regs = (u8 *) omap4_reg_map,
 };
 
-- 
1.7.0.4


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[PATCH] pcm049: clean up

2013-05-28 Thread Jan Weitzel
Remove magic numbers
Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/boards/pcm049/lowlevel.c |   10 +-
 1 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boards/pcm049/lowlevel.c 
b/arch/arm/boards/pcm049/lowlevel.c
index 8548868..caac21e 100644
--- a/arch/arm/boards/pcm049/lowlevel.c
+++ b/arch/arm/boards/pcm049/lowlevel.c
@@ -127,11 +127,11 @@ static void noinline pcm049_init_lowlevel(void)
/* Enable all clocks */
omap4_enable_all_clocks();
 
-   sr32(0x4A30a31C, 8, 1, 0x1);  /* enable software ioreq */
-   sr32(0x4A30a31C, 1, 2, 0x0);  /* set for sys_clk (19.2MHz) */
-   sr32(0x4A30a31C, 16, 4, 0x0); /* set divisor to 1 */
-   sr32(0x4A30a110, 0, 1, 0x1);  /* set the clock source to active */
-   sr32(0x4A30a110, 2, 2, 0x3);  /* enable clocks */
+   sr32(OMAP44XX_SCRM_AUXCLK3, 8, 1, 0x1);  /* enable software ioreq */
+   sr32(OMAP44XX_SCRM_AUXCLK3, 1, 2, 0x0);  /* set for sys_clk (19.2MHz) */
+   sr32(OMAP44XX_SCRM_AUXCLK3, 16, 4, 0x0); /* set divisor to 1 */
+   sr32(OMAP44XX_SCRM_ALTCLKSRC, 0, 1, 0x1);  /* activate clock source */
+   sr32(OMAP44XX_SCRM_ALTCLKSRC, 2, 2, 0x3);  /* enable clocks */
 }
 
 void barebox_arm_reset_vector(void)
-- 
1.7.0.4


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[PATCH] OMAP4: Use default clock source for mcbsp

2013-05-28 Thread Jan Weitzel
In omap4_enable_all_clocks we not only enable the mcbsp clocks, but also
change the source from ABE_24M_FCLK to 24M_FCLK. Revert this and default
to the reset state.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/mach-omap/omap4_clock.c |6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-omap/omap4_clock.c b/arch/arm/mach-omap/omap4_clock.c
index 0621fd3..889d1f9 100644
--- a/arch/arm/mach-omap/omap4_clock.c
+++ b/arch/arm/mach-omap/omap4_clock.c
@@ -253,9 +253,9 @@ void omap4_enable_all_clocks(void)
sr32(CM1_ABE_PDM_CLKCTRL, 0, 32, 0x2);
sr32(CM1_ABE_DMIC_CLKCTRL, 0, 32, 0x2);
sr32(CM1_ABE_MCASP_CLKCTRL, 0, 32, 0x2);
-   sr32(CM1_ABE_MCBSP1_CLKCTRL, 0, 32, 0x0802);
-   sr32(CM1_ABE_MCBSP2_CLKCTRL, 0, 32, 0x0802);
-   sr32(CM1_ABE_MCBSP3_CLKCTRL, 0, 32, 0x0802);
+   sr32(CM1_ABE_MCBSP1_CLKCTRL, 0, 32, 0x2);
+   sr32(CM1_ABE_MCBSP2_CLKCTRL, 0, 32, 0x2);
+   sr32(CM1_ABE_MCBSP3_CLKCTRL, 0, 32, 0x2);
sr32(CM1_ABE_SLIMBUS_CLKCTRL, 0, 32, 0xf02);
sr32(CM1_ABE_TIMER5_CLKCTRL, 0, 32, 0x2);
sr32(CM1_ABE_TIMER6_CLKCTRL, 0, 32, 0x2);
-- 
1.7.0.4


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[PATCH] pcm049: add 1GB RAM support

2013-05-28 Thread Jan Weitzel
From: Teresa Gámez t.ga...@phytec.de

Add config to select RAM assembly. The difference is if one or two chip selects
are used. This can't be checkt at runtime.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/boards/pcm049/board.c|4 
 arch/arm/boards/pcm049/lowlevel.c |   21 -
 arch/arm/mach-omap/Kconfig|   12 
 3 files changed, 36 insertions(+), 1 deletions(-)

diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
index b0d689b..3c4b1a7 100644
--- a/arch/arm/boards/pcm049/board.c
+++ b/arch/arm/boards/pcm049/board.c
@@ -48,7 +48,11 @@ console_initcall(pcm049_console_init);
 
 static int pcm049_mem_init(void)
 {
+#ifdef CONFIG_1024MB_DDR2RAM
+   omap_add_ram0(SZ_1G);
+#else
omap_add_ram0(SZ_512M);
+#endif
 
omap44xx_add_sram0();
return 0;
diff --git a/arch/arm/boards/pcm049/lowlevel.c 
b/arch/arm/boards/pcm049/lowlevel.c
index 5075bbb..2df5fae 100644
--- a/arch/arm/boards/pcm049/lowlevel.c
+++ b/arch/arm/boards/pcm049/lowlevel.c
@@ -30,6 +30,7 @@
 
 void set_muxconf_regs(void);
 
+/* 512MB */
 static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = {
.tim1   = 0x0EEB0662,
.tim2   = 0x20370DD2,
@@ -43,6 +44,20 @@ static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz 
= {
.mr2= 0x4
 };
 
+/* 1GB */
+static const struct ddr_regs ddr_regs_mt42L128M64_25_400_mhz = {
+   .tim1   = 0x0EEB0663,
+   .tim2   = 0x205715D2,
+   .tim3   = 0x00BFC53F,
+   .phy_ctrl_1 = 0x849FF408,
+   .ref_ctrl   = 0x0618,
+   .config_init= 0x80001AB9,
+   .config_final   = 0x80001AB9,
+   .zq_config  = 0x50093215,
+   .mr1= 0x83,
+   .mr2= 0x4
+};
+
 static void noinline pcm049_init_lowlevel(void)
 {
struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400;
@@ -55,7 +70,11 @@ static void noinline pcm049_init_lowlevel(void)
 
set_muxconf_regs();
 
-   omap4_ddr_init(ddr_regs_mt42L64M64_25_400_mhz, core);
+#ifdef CONFIG_1024MB_DDR2RAM
+   omap4_ddr_init(ddr_regs_mt42L128M64_25_400_mhz, core);
+#else
+   omap4_ddr_init(ddr_regs_mt42L64M64_25_400_mhz, core);
+#endif
 
/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
omap4_scale_vcores(TPS62361_VSEL0_GPIO);
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index 42e5f4a..87d3b3e 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -209,6 +209,18 @@ endchoice
 
 endif
 
+if MACH_PCM049
+   choice
+   prompt Select DDR2-RAM Size
+
+   config 512MB_DDR2RAM
+   bool 512MB
+   config 1024MB_DDR2RAM
+   bool 1024MB
+
+   endchoice
+endif
+
 config MACH_OMAP_ADVANCED_MUX
bool Enable advanced pin muxing
depends on MACH_OMAP343xSDP
-- 
1.7.0.4


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[PATCH] omap4: set voltage according to mpu freq

2013-05-28 Thread Jan Weitzel
For OMAP4460 omap4_scale_vcores must set the voltage according to mpu freq.

OPP100  700MHz 1210mV
OPPTB   920MHz 1320mV
OPPNT  1200MHz 1380mV

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/boards/archosg9/lowlevel.c |2 +-
 arch/arm/boards/panda/lowlevel.c|2 +-
 arch/arm/boards/pcm049/lowlevel.c   |2 +-
 arch/arm/boards/phycard-a-xl2/lowlevel.c|2 +-
 arch/arm/mach-omap/include/mach/omap4-silicon.h |2 +-
 arch/arm/mach-omap/omap4_generic.c  |6 +++---
 6 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boards/archosg9/lowlevel.c 
b/arch/arm/boards/archosg9/lowlevel.c
index 0334693..0fae6da 100644
--- a/arch/arm/boards/archosg9/lowlevel.c
+++ b/arch/arm/boards/archosg9/lowlevel.c
@@ -49,7 +49,7 @@ static noinline void archosg9_init_lowlevel(void)
set_muxconf_regs();
 
/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
-   omap4_scale_vcores(TPS62361_VSEL0_GPIO);
+   omap4_scale_vcores(TPS62361_VSEL0_GPIO, 1380);
 
/* Enable all clocks */
omap4_enable_all_clocks();
diff --git a/arch/arm/boards/panda/lowlevel.c b/arch/arm/boards/panda/lowlevel.c
index ed1dc6f..591ff2f 100644
--- a/arch/arm/boards/panda/lowlevel.c
+++ b/arch/arm/boards/panda/lowlevel.c
@@ -70,7 +70,7 @@ static void noinline panda_init_lowlevel(void)
omap4_ddr_init(ddr_regs_400_mhz_2cs, core);
 
/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
-   omap4_scale_vcores(TPS62361_VSEL0_GPIO);
+   omap4_scale_vcores(TPS62361_VSEL0_GPIO, 1210);
 }
 
 void barebox_arm_reset_vector(void)
diff --git a/arch/arm/boards/pcm049/lowlevel.c 
b/arch/arm/boards/pcm049/lowlevel.c
index 33519f7..8548868 100644
--- a/arch/arm/boards/pcm049/lowlevel.c
+++ b/arch/arm/boards/pcm049/lowlevel.c
@@ -109,7 +109,7 @@ static void noinline pcm049_init_lowlevel(void)
 #endif
 
/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
-   omap4_scale_vcores(TPS62361_VSEL0_GPIO);
+   omap4_scale_vcores(TPS62361_VSEL0_GPIO, 1320);
 
writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
 
diff --git a/arch/arm/boards/phycard-a-xl2/lowlevel.c 
b/arch/arm/boards/phycard-a-xl2/lowlevel.c
index 07505ff..3750bae 100644
--- a/arch/arm/boards/phycard-a-xl2/lowlevel.c
+++ b/arch/arm/boards/phycard-a-xl2/lowlevel.c
@@ -58,7 +58,7 @@ static noinline void pcaaxl2_init_lowlevel(void)
omap4_ddr_init(ddr_regs_mt42L64M64_25_400_mhz, core);
 
/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
-   omap4_scale_vcores(TPS62361_VSEL0_GPIO);
+   omap4_scale_vcores(TPS62361_VSEL0_GPIO, 1320);
 
writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
 
diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h 
b/arch/arm/mach-omap/include/mach/omap4-silicon.h
index 9e82435..5684a38 100644
--- a/arch/arm/mach-omap/include/mach/omap4-silicon.h
+++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h
@@ -211,7 +211,7 @@ struct dpll_param;
 void omap4_ddr_init(const struct ddr_regs *, const struct dpll_param *);
 void omap4_power_i2c_send(u32);
 unsigned int omap4_revision(void);
-noinline int omap4_scale_vcores(unsigned vsel0_pin);
+noinline int omap4_scale_vcores(unsigned vsel0_pin, unsigned volt_mv);
 
 #endif
 
diff --git a/arch/arm/mach-omap/omap4_generic.c 
b/arch/arm/mach-omap/omap4_generic.c
index 38993be..1eeaf30 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -511,7 +511,7 @@ static void __iomem *omap4_get_gpio_base(unsigned gpio)
 
 #define I2C_SLAVE 0x12
 
-noinline int omap4_scale_vcores(unsigned vsel0_pin)
+noinline int omap4_scale_vcores(unsigned vsel0_pin, unsigned volt_mv)
 {
void __iomem *base;
unsigned int rev = omap4_revision();
@@ -529,8 +529,8 @@ noinline int omap4_scale_vcores(unsigned vsel0_pin)
 * Setup SET1 and SET0 with right values so that kernel
 * can use either of them based on its needs.
 */
-   omap4_do_scale_tps62361(TPS62361_REG_ADDR_SET0, 1430);
-   omap4_do_scale_tps62361(TPS62361_REG_ADDR_SET1, 1430);
+   omap4_do_scale_tps62361(TPS62361_REG_ADDR_SET0, volt_mv);
+   omap4_do_scale_tps62361(TPS62361_REG_ADDR_SET1, volt_mv);
 
/*
 * Select SET1 in TPS62361:
-- 
1.7.0.4


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[PATCH] omap4-fb: use uncached screen_base

2013-05-02 Thread Jan Weitzel
If the buffer is cached the image on the LCD is broken. Only some small
lines on the last rows. Flushing the cache repairs the image.

Use remap_range for preallocated screen and dma_alloc_coherent for
dynamic.

based on '[PATCH] omap4-fb: add driver' could be squashed in.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 drivers/video/omap4.c |   32 +---
 1 files changed, 25 insertions(+), 7 deletions(-)

diff --git a/drivers/video/omap4.c b/drivers/video/omap4.c
index 5642f25..f510cb3 100644
--- a/drivers/video/omap4.c
+++ b/drivers/video/omap4.c
@@ -32,6 +32,8 @@
 #include mach/omap4-silicon.h
 #include mach/omap4-fb.h
 
+#include asm/mmu.h
+
 #include omap4.h
 
 struct omap4fb_device {
@@ -63,7 +65,7 @@ struct omap4fb_device {
unsigned int lckd;
unsigned int pckd;
} divisor;
-
+   size_t dma_size;
void (*enable_fn)(int);
 
struct fb_videomode video_modes[];
@@ -133,10 +135,12 @@ static void omap4fb_disable(struct fb_info *info)
 ~(DSS_DISPC_VIDn_ATTRIBUTES_VIDENABLE),
 dispc-vid1.attributes);
 
-   if (fbi-prealloc_screen.addr == NULL)
+   if (fbi-prealloc_screen.addr == NULL) {
/* free frame buffer; but only when screen is not
 * preallocated */
-   free(info-screen_base);
+   if (info-screen_base)
+   dma_free_coherent(info-screen_base, fbi-dma_size);
+   }
 
info-screen_base = NULL;
 
@@ -285,15 +289,20 @@ static int omap4fb_activate_var(struct fb_info *info)
goto out;
}
 
+   /*Free old screen buf*/
+   if (!fbi-prealloc_screen.addr  info-screen_base)
+   dma_free_coherent(info-screen_base, fbi-dma_size);
+
+   fbi-dma_size = PAGE_ALIGN(size);
+
if (fbi-prealloc_screen.addr == NULL) {
/* case 1: no preallocated screen */
-   free(info-screen_base);
-   info-screen_base = memalign(0x100, size);
-   } else if (fbi-prealloc_screen.size  size) {
+   info-screen_base = dma_alloc_coherent(size);
+   } else if (fbi-prealloc_screen.size  fbi-dma_size) {
/* case 2: preallocated screen, but too small */
dev_err(fbi-dev,
allocated framebuffer too small (%zu  %zu)\n,
-   fbi-prealloc_screen.size, size);
+   fbi-prealloc_screen.size, fbi-dma_size);
rc = -ENOMEM;
goto out;
} else {
@@ -486,9 +495,18 @@ static int omap4fb_probe(struct device_d *dev)
info-bits_per_pixel = pdata-bpp;
 
if (pdata-screen) {
+   if (!IS_ALIGNED(pdata-screen-start, PAGE_SIZE) ||
+   !IS_ALIGNED(resource_size(pdata-screen), PAGE_SIZE)) {
+   dev_err(dev, screen resource not aligned\n);
+   rc = -EINVAL;
+   goto out;
+   }
fbi-prealloc_screen.addr =
(void __iomem *)pdata-screen-start;
fbi-prealloc_screen.size = resource_size(pdata-screen);
+   remap_range(fbi-prealloc_screen.addr,
+   fbi-prealloc_screen.size,
+   mmu_get_pte_uncached_flags());
}
 
omap4fb_reset(fbi);
-- 
1.7.0.4


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[PATCH] ARM: mmu: Use PAGE_ALIGN in dma_free_coherent

2013-04-26 Thread Jan Weitzel
We PAGE_ALIGN the size in dma_alloc_coherent so do it also when free the memory.
Use PAGE_SIZE instead of magic numbers.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/cpu/mmu.c |7 ---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index 34fe5c3..e3ea3b6 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -189,7 +189,7 @@ static int arm_mmu_remap_sdram(struct memory_bank *bank)
ptes, ttb_start, ttb_end);
 
for (i = 0; i  num_ptes; i++) {
-   ptes[i] = (phys + i * 4096) | PTE_TYPE_SMALL |
+   ptes[i] = (phys + i * PAGE_SIZE) | PTE_TYPE_SMALL |
pte_flags_cached;
}
 
@@ -300,7 +300,7 @@ static int mmu_init(void)
asm volatile (mcr  p15,0,%0,c3,c0,0 : : r(i) /*:*/);
 
/* create a flat mapping using 1MiB sections */
-   create_sections(0, 0, 4096, PMD_SECT_AP_WRITE | PMD_SECT_AP_READ |
+   create_sections(0, 0, PAGE_SIZE, PMD_SECT_AP_WRITE | PMD_SECT_AP_READ |
PMD_TYPE_SECT);
 
vectors_init();
@@ -332,7 +332,7 @@ void *dma_alloc_coherent(size_t size)
void *ret;
 
size = PAGE_ALIGN(size);
-   ret = xmemalign(4096, size);
+   ret = xmemalign(PAGE_SIZE, size);
 
dma_inv_range((unsigned long)ret, (unsigned long)ret + size);
 
@@ -353,6 +353,7 @@ void *phys_to_virt(unsigned long phys)
 
 void dma_free_coherent(void *mem, size_t size)
 {
+   size = PAGE_ALIGN(size);
remap_range(mem, size, pte_flags_cached);
 
free(mem);
-- 
1.7.0.4


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[RFC] omap4-fb: use uncached screen_base

2013-04-11 Thread Jan Weitzel
If the buffer is cached the image on the LCD is broken. Only some small
lines on the last rows. Flushing the cache repairs the image.

Is remap_range the right way to get a non cached buffer?
This patch only covers prealloc_screen, not dynamic
If the buffer is dynamic, is the use of dma_alloc_coherent right? Or should
the buffer remaped again if freed?
---
 drivers/video/omap4.c |5 +
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/drivers/video/omap4.c b/drivers/video/omap4.c
index 5642f25..1ade988 100644
--- a/drivers/video/omap4.c
+++ b/drivers/video/omap4.c
@@ -32,6 +32,8 @@
 #include mach/omap4-silicon.h
 #include mach/omap4-fb.h
 
+#include asm/mmu.h
+
 #include omap4.h
 
 struct omap4fb_device {
@@ -489,6 +491,9 @@ static int omap4fb_probe(struct device_d *dev)
fbi-prealloc_screen.addr =
(void __iomem *)pdata-screen-start;
fbi-prealloc_screen.size = resource_size(pdata-screen);
+   remap_range(fbi-prealloc_screen.addr,
+   fbi-prealloc_screen.size,
+   mmu_get_pte_uncached_flags());
}
 
omap4fb_reset(fbi);
-- 
1.7.0.4


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Re: [PATCH] ubiformat: get buffer from malloc

2013-03-25 Thread Jan Weitzel
Am Montag, den 25.03.2013, 16:15 +0100 schrieb Jan Weitzel:
 There was a erase block sized (here 131072) char buf array on the stack.
 Changed this to get the space from malloc preventing stack overflows.
 Also fix a wrong return without clean up.
 
btw the command works fine with the stack overflow till CONFIG_MMU_EARLY
was turned on. 

Jan
 Signed-off-by: Jan Weitzel j.weit...@phytec.de
 ---
  commands/ubiformat.c |   22 +++---
  1 files changed, 15 insertions(+), 7 deletions(-)
 
 diff --git a/commands/ubiformat.c b/commands/ubiformat.c
 index 47941be..121816f 100644
 --- a/commands/ubiformat.c
 +++ b/commands/ubiformat.c
 @@ -296,13 +296,20 @@ static int mark_bad(const struct mtd_dev_info *mtd, 
 struct ubi_scan_info *si, in
  static int flash_image(const struct mtd_dev_info *mtd,
  const struct ubigen_info *ui, struct ubi_scan_info *si)
  {
 - int fd, img_ebs, eb, written_ebs = 0, divisor;
 + int fd, img_ebs, eb, written_ebs = 0, divisor, ret = -1;
   off_t st_size;
 + char *buf = NULL;
  
   fd = open_file(st_size);
   if (fd  0)
   return fd;
  
 + buf = malloc(mtd-eb_size);
 + if (!buf) {
 + sys_errmsg(cannot allocate %d bytes of memory, mtd-eb_size);
 + goto out_close;
 + }
 +
   img_ebs = st_size / mtd-eb_size;
  
   if (img_ebs  si-good_cnt) {
 @@ -312,8 +319,9 @@ static int flash_image(const struct mtd_dev_info *mtd,
   }
  
   if (st_size % mtd-eb_size) {
 - return sys_errmsg(file \%s\ (size %lld bytes) is not 
 multiple of eraseblock size (%d bytes),
 -   args.image, (long long)st_size, mtd-eb_size);
 + sys_errmsg(file \%s\ (size %lld bytes) is not multiple of 
 +eraseblock size (%d bytes),
 +args.image, (long long)st_size, mtd-eb_size);
   goto out_close;
   }
  
 @@ -321,7 +329,6 @@ static int flash_image(const struct mtd_dev_info *mtd,
   divisor = img_ebs;
   for (eb = 0; eb  mtd-eb_cnt; eb++) {
   int err, new_len;
 - char buf[mtd-eb_size];
   long long ec;
  
   if (!args.quiet  !args.verbose) {
 @@ -404,12 +411,13 @@ static int flash_image(const struct mtd_dev_info *mtd,
  
   if (!args.quiet  !args.verbose)
   printf(\n);
 - close(fd);
 - return eb + 1;
 +
 + ret = eb + 1;
  
  out_close:
 + free(buf);
   close(fd);
 - return -1;
 + return ret;
  }
  
  static int format(const struct mtd_dev_info *mtd,



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v2013.02.0 phyCORE-OMAP4 MLO to big

2013-02-08 Thread Jan Weitzel
Hi,
with the release v2013.02.0 the MLO gets so bit, that it eats the boot
information in the SRAM.

nm --size-sort 

...
0630 D nand_flash_ids
08c0 t mci_probe
0c00 b gpio_desc
1400 b files

If I remove  GPIOLIB from MLO it work again. Maybe setting MAX_FILES
down or find a dynamic way for the big arrays is a better solution.
Any Ideas?

Jan


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[PATCH v2] pcm049: clean up defconfig

2013-01-29 Thread Jan Weitzel
add BAREBOX_MAX_IMAGE_SIZE and rebuild defconfig with savedefconfig

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/configs/pcm049_defconfig   |   19 +++
 arch/arm/configs/pcm049_xload_defconfig |3 ++-
 2 files changed, 13 insertions(+), 9 deletions(-)

diff --git a/arch/arm/configs/pcm049_defconfig 
b/arch/arm/configs/pcm049_defconfig
index adb600f..19df95a 100644
--- a/arch/arm/configs/pcm049_defconfig
+++ b/arch/arm/configs/pcm049_defconfig
@@ -1,13 +1,12 @@
 CONFIG_ARCH_OMAP=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x8
 CONFIG_ARCH_OMAP4=y
 CONFIG_MACH_PCM049=y
 CONFIG_AEABI=y
-CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ARM_UNWIND=y
 CONFIG_MMU=y
 CONFIG_TEXT_BASE=0x8f00
 CONFIG_MALLOC_SIZE=0x200
-CONFIG_MALLOC_TLSF=y
 CONFIG_KALLSYMS=y
 CONFIG_PROMPT=barebox 
 CONFIG_LONGHELP=y
@@ -21,11 +20,12 @@ CONFIG_DEFAULT_ENVIRONMENT_PATH=arch/arm/boards/pcm049/env
 CONFIG_CMD_EDIT=y
 CONFIG_CMD_SLEEP=y
 CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
 CONFIG_CMD_EXPORT=y
 CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_READLINE=y
 CONFIG_CMD_TIME=y
+CONFIG_CMD_AUTOMOUNT=y
+CONFIG_CMD_TFTP=y
 CONFIG_CMD_ECHO_E=y
 CONFIG_CMD_LOADB=y
 CONFIG_CMD_IOMEM=y
@@ -36,7 +36,6 @@ CONFIG_CMD_BOOTM_INITRD=y
 CONFIG_CMD_BOOTM_OFTREE=y
 CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y
 CONFIG_CMD_UIMAGE=y
-# CONFIG_CMD_BOOTZ is not set
 # CONFIG_CMD_BOOTU is not set
 CONFIG_CMD_RESET=y
 CONFIG_CMD_GO=y
@@ -45,25 +44,29 @@ CONFIG_CMD_PARTITION=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
 CONFIG_CMD_GPIO=y
-CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_I2C=y
 CONFIG_NET=y
 CONFIG_NET_DHCP=y
 CONFIG_NET_NFS=y
 CONFIG_NET_PING=y
-CONFIG_CMD_TFTP=y
-CONFIG_FS_TFTP=y
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y
+CONFIG_SMSC_PHY=y
 CONFIG_DRIVER_NET_SMC911X=y
 # CONFIG_SPI is not set
+CONFIG_I2C=y
+CONFIG_I2C_OMAP=y
 CONFIG_MTD=y
 CONFIG_NAND=y
 CONFIG_NAND_OMAP_GPMC=y
 CONFIG_UBI=y
+CONFIG_USB=y
 CONFIG_MCI=y
+CONFIG_MCI_STARTUP=y
 CONFIG_MCI_OMAP_HSMMC=y
+CONFIG_I2C_TWL6030=y
+CONFIG_FS_TFTP=y
 CONFIG_FS_FAT=y
 CONFIG_FS_FAT_WRITE=y
 CONFIG_FS_FAT_LFN=y
-CONFIG_ZLIB=y
 CONFIG_LZO_DECOMPRESS=y
diff --git a/arch/arm/configs/pcm049_xload_defconfig 
b/arch/arm/configs/pcm049_xload_defconfig
index b6d3a7a..189c040 100644
--- a/arch/arm/configs/pcm049_xload_defconfig
+++ b/arch/arm/configs/pcm049_xload_defconfig
@@ -1,11 +1,12 @@
 CONFIG_ARCH_OMAP=y
+CONFIG_BAREBOX_MAX_IMAGE_SIZE=0xC000
 CONFIG_ARCH_OMAP4=y
 CONFIG_OMAP_BUILD_IFT=y
 CONFIG_MACH_PCM049=y
-CONFIG_AEABI=y
 CONFIG_THUMB2_BAREBOX=y
 # CONFIG_CMD_ARM_CPUINFO is not set
 # CONFIG_ARM_EXCEPTIONS is not set
+# CONFIG_MEMINFO is not set
 CONFIG_MMU=y
 CONFIG_TEXT_BASE=0x4030
 CONFIG_MEMORY_LAYOUT_FIXED=y
-- 
1.7.0.4


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Re: [PATCH 14/14] Add support for Archos G9 tablet

2012-10-22 Thread Jan Weitzel
Am Sonntag, den 21.10.2012, 03:00 +0200 schrieb vj:
 On Fri, Oct 19, 2012 at 1:10 PM, Jan Weitzel j.weit...@phytec.de wrote:
  diff --git a/arch/arm/boards/archosg9/lowlevel.c 
  b/arch/arm/boards/archosg9/lowlevel.c
  new file mode 100644
  index 000..fa5be1d
  --- /dev/null
  +++ b/arch/arm/boards/archosg9/lowlevel.c
  @@ -0,0 +1,79 @@
  +/*
  + * This program is free software; you can redistribute it and/or
  + * modify it under the terms of the GNU General Public License as
  + * published by the Free Software Foundation; either version 2 of
  + * the License, or (at your option) any later version.
  + *
  + * This program is distributed in the hope that it will be useful,
  + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  + * GNU General Public License for more details.
  + */
  +
  +#include common.h
  +#include io.h
  +#include init.h
  +#include mach/omap4-mux.h
  +#include mach/omap4-silicon.h
  +#include mach/omap4-clock.h
  +#include mach/syslib.h
  +#include asm/barebox-arm.h
  +#include asm/barebox-arm-head.h
  +#include mux.h
  +
  +#define TPS62361_VSEL0_GPIO7
  +
  +static const struct ddr_regs ddr_regs_400_mhz_2cs = {
  + .tim1 = 0x10EB0662,
  + .tim2 = 0x20370DD2,
  + .tim3 = 0x00B1C33F,
  + .phy_ctrl_1   = 0x849FF408,
  + .ref_ctrl = 0x0618,
  + .config_init  = 0x8EB9,
  + .config_final = 0x80001AB9,
  + .zq_config= 0xD00B3215,
  + .mr1  = 0x83,
  + .mr2  = 0x4
  +};
  +
  +static noinline void archosg9_init_lowlevel(void)
  +{
  + struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400;
  + struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU600;
  This if OPP100 for 4430, for 4460 OPP100 defines 700MHz.
  + struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2;
  + struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2;
  + struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2;
  + struct dpll_param usb = OMAP4_USB_DPLL_PARAM_19M2;
  +
  + writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
  +
  + /* Configure all DPLL's at 100% OPP */
  + omap4_configure_mpu_dpll(mpu);
  + omap4_configure_iva_dpll(iva);
  + omap4_configure_per_dpll(per);
  + omap4_configure_abe_dpll(abe);
  + omap4_configure_usb_dpll(usb);
  +
  + /* Enable all clocks */
  + omap4_enable_all_clocks();
  +
  + set_muxconf_regs();
  +
  + omap4_ddr_init(ddr_regs_400_mhz_2cs, core);
  +
  + /* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
  + omap4_scale_vcores(TPS62361_VSEL0_GPIO);
  According to TIs DM the sequence for going into a higher OPP is to first
  raise the voltage. I saw this is also wrong on pandaboard.
  They also say rise core freq before mpu freq so the order should be
  omap4_scale_vcores
  omap4_ddr_init
  omap4_configure_mpu_dpll
 
  I'll fix and test the order on PCM049
 
  Jan
 
 The only way I could make it work on archosG9 is with this order:
   set_muxconf_regs();
   writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
   omap4_enable_all_clocks();
   omap4_scale_vcores(TPS62361_VSEL0_GPIO);
   omap4_ddr_init(ddr_regs_400_mhz_2cs, core);
   omap4_configure_mpu_dpll(mpu);
   ...
I think you need al least omap4_enable_gpio1_wup_clocks for using 
TPS62361_VSEL0_GPIO.

Jan
 Is this correct? That is, enable_all_clocks can be done before scale_vcores?
 It will depend on the default clock frequencies, I think.
 
 Vicente



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[PATCH] OMAP: Documentation file misspelled

2012-10-16 Thread Jan Weitzel
based on next

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 ...oamp4_usb_booting.txt = omap4_usb_booting.txt} |0
 1 files changed, 0 insertions(+), 0 deletions(-)
 rename Documentation/{oamp4_usb_booting.txt = omap4_usb_booting.txt} (100%)

diff --git a/Documentation/oamp4_usb_booting.txt 
b/Documentation/omap4_usb_booting.txt
similarity index 100%
rename from Documentation/oamp4_usb_booting.txt
rename to Documentation/omap4_usb_booting.txt
-- 
1.7.0.4


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Re: [PATCH 1/3] Add barebox update infrastructure

2012-09-14 Thread Jan Weitzel
Am Freitag, den 14.09.2012, 09:45 +0200 schrieb Sascha Hauer:
 Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
 ---
  commands/Kconfig  |5 +++
  commands/Makefile |1 +
  commands/barebox-update.c |   80 +
  common/Kconfig|3 ++
  common/Makefile   |1 +
  common/bbu.c  |  110 
 +
  include/bbu.h |   37 +++
  7 files changed, 237 insertions(+)
  create mode 100644 commands/barebox-update.c
  create mode 100644 common/bbu.c
  create mode 100644 include/bbu.h
 
 diff --git a/commands/Kconfig b/commands/Kconfig
 index f2756cc..0ed0d69 100644
 --- a/commands/Kconfig
 +++ b/commands/Kconfig
 @@ -470,6 +470,11 @@ config CMD_OFTREE
   prompt oftree
   select FDT
  
 +config CMD_BAREBOX_UPDATE
 + tristate
 + select BAREBOX_UPDATE
 + prompt barebox-update
 +
  endmenu
  
  config CMD_TIMEOUT
 diff --git a/commands/Makefile b/commands/Makefile
 index ccebd7f..62762de 100644
 --- a/commands/Makefile
 +++ b/commands/Makefile
 @@ -74,3 +74,4 @@ obj-$(CONFIG_CMD_BASENAME)  += basename.o
  obj-$(CONFIG_CMD_DIRNAME)+= dirname.o
  obj-$(CONFIG_CMD_READLINK)   += readlink.o
  obj-$(CONFIG_CMD_LN) += ln.o
 +obj-$(CONFIG_CMD_BAREBOX_UPDATE)+= barebox-update.o
 diff --git a/commands/barebox-update.c b/commands/barebox-update.c
 new file mode 100644
 index 000..db8ae7d
 --- /dev/null
 +++ b/commands/barebox-update.c
 @@ -0,0 +1,80 @@
 +/*
 + * barebox-update.c - update barebox
 + *
 + * Copyright (c) 2012 Sascha Hauer s.ha...@pengutronix.de, Pengutronix
 + *
 + * See file CREDITS for list of people who contributed to this
 + * project.
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2
 + * as published by the Free Software Foundation.
 + *
 + * This program is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 + * GNU General Public License for more details.
 + */
 +#include common.h
 +#include command.h
 +#include getopt.h
 +#include malloc.h
 +#include errno.h
 +#include bbu.h
 +#include fs.h
 +
 +static int do_barebox_update(int argc, char *argv[])
 +{
 + int opt, ret;
 + struct bbu_data data = {};
 +
 + while ((opt = getopt(argc, argv, t:yf:l))  0) {
 + switch (opt) {
 + case 'f':
 + data.force = simple_strtoul(optarg, NULL, 0);
 + data.flags |= BBU_FLAG_FORCE;
 + break;
 + case 't':
 + data.handler_name = optarg;
 + break;
 + case 'y':
 + data.flags |= BBU_FLAG_YES;
 + break;
 + case 'l':
 + printf(registered handlers:\n);
 + bbu_handlers_list();
 + return 0;
 + default:
 + return COMMAND_ERROR_USAGE;
 + }
 + }
 +
 + if (!(argc - optind))
 + return COMMAND_ERROR_USAGE;
 +
 + data.imagefile = argv[optind];
 +
 + data.image = read_file(data.imagefile, data.len);
 + if (!data.image)
 + return -errno;
 +
 + ret = barebox_update(data);
 +
 + free(data.image);
 +
 + return ret;
 +}
 +
 +BAREBOX_CMD_HELP_START(barebox_update)
 +BAREBOX_CMD_HELP_USAGE(barebox_update [OPTIONS image]\n)
image is mandatory
 +BAREBOX_CMD_HELP_OPT(-t target, \n)
 +BAREBOX_CMD_HELP_OPT(-y\t, yes. Do not ask for confirmation\n)
 +BAREBOX_CMD_HELP_OPT(-f level, Set force level\n)
 +BAREBOX_CMD_HELP_OPT(-l\t, list registered targets\n)
 +BAREBOX_CMD_HELP_END
 +
 +BAREBOX_CMD_START(barebox_update)
 + .cmd= do_barebox_update,
 + .usage  = update barebox,
 + BAREBOX_CMD_HELP(cmd_barebox_update_help)
 +BAREBOX_CMD_END
 diff --git a/common/Kconfig b/common/Kconfig
 index b97392c..a6f6c0f 100644
 --- a/common/Kconfig
 +++ b/common/Kconfig
 @@ -58,6 +58,9 @@ config GLOBALVAR
  config STDDEV
   bool
  
 +config BAREBOX_UPDATE
 + bool
 +
  menu General Settings  
  
  config LOCALVERSION
 diff --git a/common/Makefile b/common/Makefile
 index df9f301..07c422a 100644
 --- a/common/Makefile
 +++ b/common/Makefile
 @@ -37,6 +37,7 @@ obj-$(CONFIG_MENU) += menu.o
  obj-$(CONFIG_PASSWORD) += password.o
  obj-$(CONFIG_MODULES) += module.o
  obj-$(CONFIG_FLEXIBLE_BOOTARGS) += bootargs.o
 +obj-$(CONFIG_BAREBOX_UPDATE) += bbu.o
  extra-$(CONFIG_MODULES) += module.lds
  
  ifdef CONFIG_DEFAULT_ENVIRONMENT
 diff --git a/common/bbu.c b/common/bbu.c
 new file mode 100644
 index 000..928c34b
 --- /dev/null
 +++ b/common/bbu.c
 @@ -0,0 +1,110 @@
 +/*
 + * bbu.c - barebox update functions
 + *
 + * Copyright (c) 2012 Sascha Hauer 

Re: [RFC, PATCH] barebox-update command support

2012-09-14 Thread Jan Weitzel
Am Freitag, den 14.09.2012, 09:45 +0200 schrieb Sascha Hauer:
 Hi All,
 
 The following adds barebox-update command support. This command is
 supposed to provide a dedicated command for updating barebox.
On OMAP we have MLO and barebox. Should we use the command only for MLO?
The barebox didn't need special handling. Whats about kernel image and
rootfs? 
Jan 

 The rationale behind this is:
 
 - We can add additional generic, SoC specific, board specific sanity
   checks (Is this really a barebox image? Does the image fit into the
   device?)
 - Sometimes SoC or board specific fixups are necessary. For example,
   with Omap Nand boot we have to switch the Nand driver into a different
   ECC mode before flashing barebox. With i.MX MMC card boot we want
   to preserve the partition table. On i.MX28 Nand boot we have to create
   a Boot Control Block. The list does not end here...
 
 The current idea is:
 
 A board can register one or multiple update handlers. The update handlers
 themselves are registered by a board because only the board knows where
 it actually can boot from. Nevertheless there might be generic handlers
 available, the most simple one being: Check image header, check size, write
 to device.
 
 This is in an early state, right now there are only dummy handlers, hence the
 RFC state.
 
 Sascha
 
 
 Sascha Hauer (3):
   Add barebox update infrastructure
   ARM: Add dummy update handler
   ARM pcm038: register nor update handler
 
  arch/arm/boards/pcm038/pcm038.c |7 +++
  arch/arm/lib/Makefile   |1 +
  arch/arm/lib/bbu.c  |   56 
  commands/Kconfig|5 ++
  commands/Makefile   |1 +
  commands/barebox-update.c   |   80 
  common/Kconfig  |3 ++
  common/Makefile |1 +
  common/bbu.c|  110 
 +++
  include/bbu.h   |   40 ++
  10 files changed, 304 insertions(+)
  create mode 100644 arch/arm/lib/bbu.c
  create mode 100644 commands/barebox-update.c
  create mode 100644 common/bbu.c
  create mode 100644 include/bbu.h
 
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[PATCH] pcm049 phycard l + xl2: update partion sizes

2012-09-13 Thread Jan Weitzel
Use 512k NAND Partion for barebox in enviroment and boards code
pcm049: use 4MB for kernel

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/boards/pcm049/board.c|4 ++--
 arch/arm/boards/pcm049/env/config |2 +-
 arch/arm/boards/phycard-a-l1/env/config   |2 +-
 arch/arm/boards/phycard-a-l1/pca-a-l1.c   |6 +++---
 arch/arm/boards/phycard-a-xl2/env/config  |2 +-
 arch/arm/boards/phycard-a-xl2/pca-a-xl2.c |4 ++--
 6 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
index 3ef38a7..3b10d0a 100644
--- a/arch/arm/boards/pcm049/board.c
+++ b/arch/arm/boards/pcm049/board.c
@@ -118,9 +118,9 @@ static int pcm049_devices_init(void)
 #ifdef CONFIG_PARTITION
devfs_add_partition(nand0, 0x0, SZ_128K, DEVFS_PARTITION_FIXED, 
xload_raw);
dev_add_bb_dev(xload_raw, xload);
-   devfs_add_partition(nand0, SZ_128K, SZ_256K, DEVFS_PARTITION_FIXED, 
self_raw);
+   devfs_add_partition(nand0, SZ_128K, SZ_512K, DEVFS_PARTITION_FIXED, 
self_raw);
dev_add_bb_dev(self_raw, self0);
-   devfs_add_partition(nand0, SZ_128K + SZ_256K, SZ_128K, 
DEVFS_PARTITION_FIXED, env_raw);
+   devfs_add_partition(nand0, SZ_128K + SZ_512K, SZ_128K, 
DEVFS_PARTITION_FIXED, env_raw);
dev_add_bb_dev(env_raw, env0);
 #endif
 
diff --git a/arch/arm/boards/pcm049/env/config 
b/arch/arm/boards/pcm049/env/config
index efbe9ea..70e374f 100644
--- a/arch/arm/boards/pcm049/env/config
+++ b/arch/arm/boards/pcm049/env/config
@@ -40,7 +40,7 @@ autoboot_timeout=3
 
 bootargs=console=ttyO2,115200
 
-nand_parts=128k(xload)ro,256k(barebox),128k(bareboxenv),2M(kernel),-(root)
+nand_parts=128k(xload)ro,512k(barebox),128k(bareboxenv),4M(kernel),-(root)
 rootfs_mtdblock_nand=4
 
 # set a fancy prompt (if support is compiled in)
diff --git a/arch/arm/boards/phycard-a-l1/env/config 
b/arch/arm/boards/phycard-a-l1/env/config
index e0f4dcc..5bc48d7 100644
--- a/arch/arm/boards/phycard-a-l1/env/config
+++ b/arch/arm/boards/phycard-a-l1/env/config
@@ -70,7 +70,7 @@ bootargs=$bootargs omapdss.def_disp=pd050vl1
 #bootargs=$bootargs omapdss.def_disp=pd104slf
 #bootargs=$bootargs omapdss.def_disp=pm070wl4
 
-nand_parts=512k(x-loader)ro,1920k(barebox),128k(bareboxenv),4M(kernel),-(root)
+nand_parts=128k(x-loader)ro,512k(barebox),128k(bareboxenv),4M(kernel),-(root)
 nand_device=omap2-nand.0
 rootfs_mtdblock_nand=4
 
diff --git a/arch/arm/boards/phycard-a-l1/pca-a-l1.c 
b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
index 907198d..a08518f 100644
--- a/arch/arm/boards/phycard-a-l1/pca-a-l1.c
+++ b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
@@ -422,13 +422,13 @@ device_initcall(pcaal1_init_devices);
 static int pcaal1_late_init(void)
 {
 #ifdef CONFIG_PARTITION
-   devfs_add_partition(nand0, 0x0, 0x8, DEVFS_PARTITION_FIXED, 
x-loader);
+   devfs_add_partition(nand0, 0x0, SZ_128K, DEVFS_PARTITION_FIXED, 
x-loader);
dev_add_bb_dev(self_raw, x_loader0);
 
-   devfs_add_partition(nand0, 0x8, 0x1e, DEVFS_PARTITION_FIXED, 
self_raw);
+   devfs_add_partition(nand0, SZ_128K, SZ_512K, DEVFS_PARTITION_FIXED, 
self_raw);
dev_add_bb_dev(self_raw, self0);
 
-   devfs_add_partition(nand0, 0x26, 0x2, DEVFS_PARTITION_FIXED, 
env_raw);
+   devfs_add_partition(nand0, SZ_128K + SZ_512K, SZ_128K, 
DEVFS_PARTITION_FIXED, env_raw);
dev_add_bb_dev(env_raw, env0);
 #endif
return 0;
diff --git a/arch/arm/boards/phycard-a-xl2/env/config 
b/arch/arm/boards/phycard-a-xl2/env/config
index 59e8eb3..44a4181 100644
--- a/arch/arm/boards/phycard-a-xl2/env/config
+++ b/arch/arm/boards/phycard-a-xl2/env/config
@@ -39,7 +39,7 @@ autoboot_timeout=3
 
 bootargs=console=ttyO2,115200
 
-nand_parts=128k(xload)ro,256k(barebox),128k(bareboxenv),4M(kernel),-(root)
+nand_parts=128k(xload)ro,512k(barebox),128k(bareboxenv),4M(kernel),-(root)
 rootfs_mtdblock_nand=4
 
 # set a fancy prompt (if support is compiled in)
diff --git a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c 
b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
index 4fec0f0..91d45dc 100644
--- a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
+++ b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
@@ -136,10 +136,10 @@ static int pcaaxl2_devices_init(void)
devfs_add_partition(nand0, 0x0, SZ_128K,
DEVFS_PARTITION_FIXED, xload_raw);
dev_add_bb_dev(xload_raw, xload);
-   devfs_add_partition(nand0, SZ_128K, SZ_256K,
+   devfs_add_partition(nand0, SZ_128K, SZ_512K,
DEVFS_PARTITION_FIXED, self_raw);
dev_add_bb_dev(self_raw, self0);
-   devfs_add_partition(nand0, SZ_128K + SZ_256K, SZ_128K,
+   devfs_add_partition(nand0, SZ_128K + SZ_512K, SZ_128K,
DEVFS_PARTITION_FIXED, env_raw);
dev_add_bb_dev(env_raw, env0);
 #endif
-- 
1.7.0.4


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Re: [PATCH 2/3] commands: move nandtest to testing

2012-09-11 Thread Jan Weitzel
Am Dienstag, den 11.09.2012, 07:31 +0200 schrieb Alexander Aring:
 Move nadntest in commands menu.
nandtest

Jan

 Signed-off-by: Alexander Aring alex.ar...@gmail.com
 ---
  commands/Kconfig | 16 
  1 file changed, 8 insertions(+), 8 deletions(-)
 
 diff --git a/commands/Kconfig b/commands/Kconfig
 index 8f3a15a..2ee8643 100644
 --- a/commands/Kconfig
 +++ b/commands/Kconfig
 @@ -192,14 +192,6 @@ config CMD_NAND
   depends on NAND
   prompt nand
  
 -config CMD_NANDTEST
 - tristate
 - depends on NAND
 - depends on PARTITION
 - depends on NAND_ECC_HW || NAND_ECC_SOFT
 - select PARTITION_NEED_MTD
 - prompt nandtest
 -
  config CMD_AUTOMOUNT
   tristate
   select FS_AUTOMOUNT
 @@ -474,6 +466,14 @@ endmenu
  
  menu testing   
  
 +config CMD_NANDTEST
 + tristate
 + depends on NAND
 + depends on PARTITION
 + depends on NAND_ECC_HW || NAND_ECC_SOFT
 + select PARTITION_NEED_MTD
 + prompt nandtest
 +
  endmenu
  
  config CMD_TIMEOUT



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[PATCH] smsc911x: Check platformdata pointer

2012-09-10 Thread Jan Weitzel
If pdata is NULL smc911x_probe will crash. Checking the zero initialized
priv-shift results in default configuration if pdata is not set.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 drivers/net/smc911x.c |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index bc1e001..f697608 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -435,7 +435,7 @@ static int smc911x_probe(struct device_d *dev)
priv-shift = pdata-shift;
 
if (is_32bit) {
-   if (pdata-shift) {
+   if (priv-shift) {
priv-reg_read = __smc911x_reg_readl_shift;
priv-reg_write = __smc911x_reg_writel_shift;
} else {
@@ -443,7 +443,7 @@ static int smc911x_probe(struct device_d *dev)
priv-reg_write = __smc911x_reg_writel;
}
} else {
-   if (pdata-shift) {
+   if (priv-shift) {
priv-reg_read = __smc911x_reg_readw_shift;
priv-reg_write = __smc911x_reg_writew_shift;
} else {
-- 
1.7.0.4


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[PATCH] PCM049: nand_bootstrap add shebang

2012-09-06 Thread Jan Weitzel

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/boards/pcm049/env/bin/nand_bootstrap |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/boards/pcm049/env/bin/nand_bootstrap 
b/arch/arm/boards/pcm049/env/bin/nand_bootstrap
index f8873fa..49e38dc 100644
--- a/arch/arm/boards/pcm049/env/bin/nand_bootstrap
+++ b/arch/arm/boards/pcm049/env/bin/nand_bootstrap
@@ -1,4 +1,4 @@
-
+#!/bin/sh
 echo copying barebox to nand...
 
 mci0.probe=1
-- 
1.7.0.4


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[PATCH v4] xload: get barebox size from barebox_arm_head

2012-09-05 Thread Jan Weitzel
Add functions to read the barebox_arm_head, check barebox magicword
and read out the barebox image size.
Create a inital partion of 1Mb to access the barebox image on nand.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v2: remove fall back if header read fail 
v3: fix header check, rebase master 
v4: factorize barebox detection

 arch/arm/include/asm/barebox-arm-head.h |9 +
 arch/arm/mach-omap/include/mach/xload.h |2 +-
 arch/arm/mach-omap/xload.c  |   57 --
 common/filetype.c   |3 +-
 4 files changed, 65 insertions(+), 6 deletions(-)

diff --git a/arch/arm/include/asm/barebox-arm-head.h 
b/arch/arm/include/asm/barebox-arm-head.h
index 2c250e9..42bd239 100644
--- a/arch/arm/include/asm/barebox-arm-head.h
+++ b/arch/arm/include/asm/barebox-arm-head.h
@@ -1,6 +1,15 @@
 #ifndef __ASM_ARM_HEAD_H
 #define __ASM_ARM_HEAD_H
 
+#define ARM_HEAD_SIZE  0x30
+#define HEAD_MAGICWORD_OFFSET  0x20
+#define HEAD_SIZE_OFFSET   0x2C
+
+static inline int is_barebox_arm_head(const char *head)
+{
+   return !strcmp(head + HEAD_MAGICWORD_OFFSET, barebox);
+}
+
 static inline void barebox_arm_head(void)
 {
__asm__ __volatile__ (
diff --git a/arch/arm/mach-omap/include/mach/xload.h 
b/arch/arm/mach-omap/include/mach/xload.h
index 844b57f..26f1b68 100644
--- a/arch/arm/mach-omap/include/mach/xload.h
+++ b/arch/arm/mach-omap/include/mach/xload.h
@@ -1,7 +1,7 @@
 #ifndef _MACH_XLOAD_H
 #define _MACH_XLOAD_H
 
-void *omap_xload_boot_nand(int offset, int size);
+void *omap_xload_boot_nand(int offset);
 void *omap_xload_boot_mmc(void);
 
 enum omap_boot_src {
diff --git a/arch/arm/mach-omap/xload.c b/arch/arm/mach-omap/xload.c
index 13024ab..5f9ca26 100644
--- a/arch/arm/mach-omap/xload.c
+++ b/arch/arm/mach-omap/xload.c
@@ -7,16 +7,65 @@
 #include fcntl.h
 #include mach/xload.h
 #include sizes.h
+#include asm/barebox-arm-head.h
 
-void *omap_xload_boot_nand(int offset, int size)
+void *read_image_head(const char *name)
 {
+   void *header = xmalloc(ARM_HEAD_SIZE);
+   struct cdev *cdev;
int ret;
-   void *to = xmalloc(size);
+
+   cdev = cdev_open(name, O_RDONLY);
+   if (!cdev) {
+   printf(failed to open partition\n);
+   return NULL;
+   }
+
+   ret = cdev_read(cdev, header, ARM_HEAD_SIZE, 0, 0);
+   cdev_close(cdev);
+
+   if (ret != ARM_HEAD_SIZE) {
+   printf(failed to read from partition\n);
+   return NULL;
+   }
+
+   return header;
+}
+
+unsigned int get_image_size(void *head)
+{
+   unsigned int ret = 0;
+   unsigned int *psize = head + HEAD_SIZE_OFFSET;
+
+   if (is_barebox_arm_head(head))
+   ret = *psize;
+   debug(Detected barebox image size %u\n, ret);
+
+   return ret;
+}
+
+void *omap_xload_boot_nand(int offset)
+{
+   int ret;
+   int size;
+   void *to, *header;
struct cdev *cdev;
 
-   devfs_add_partition(nand0, offset, size, DEVFS_PARTITION_FIXED, x);
+   devfs_add_partition(nand0, offset, SZ_1M, DEVFS_PARTITION_FIXED, x);
dev_add_bb_dev(x, bbx);
 
+   header = read_image_head(bbx);
+   if (header == NULL)
+   return NULL;
+
+   size = get_image_size(header);
+   if (!size) {
+   printf(failed to get image size\n);
+   return NULL;
+   }
+
+   to = xmalloc(size);
+
cdev = cdev_open(bbx, O_RDONLY);
if (!cdev) {
printf(failed to open nand\n);
@@ -80,7 +129,7 @@ int run_shell(void)
printf(unknown boot source. Fall back to nand\n);
case OMAP_BOOTSRC_NAND:
printf(booting from NAND\n);
-   func = omap_xload_boot_nand(SZ_128K, SZ_256K);
+   func = omap_xload_boot_nand(SZ_128K);
break;
}
 
diff --git a/common/filetype.c b/common/filetype.c
index 1a5b82d..a95e4fd 100644
--- a/common/filetype.c
+++ b/common/filetype.c
@@ -25,6 +25,7 @@
 #include fcntl.h
 #include fs.h
 #include malloc.h
+#include ../arch/arm/include/asm/barebox-arm-head.h
 
 static const char *filetype_str[] = {
[filetype_unknown] = unknown,
@@ -57,7 +58,7 @@ enum filetype file_detect_type(void *_buf)
 
if (strncmp(buf8, #!/bin/sh, 9) == 0)
return filetype_sh;
-   if (buf[8] == 0x65726162  buf[9] == 0x00786f62)
+   if (is_barebox_arm_head(_buf))
return filetype_arm_barebox;
if (buf[9] == 0x016f2818 || buf[9] == 0x18286f01)
return filetype_arm_zimage;
-- 
1.7.0.4


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Re: MLO doesn't work, rest is ok

2012-09-05 Thread Jan Weitzel
Am Mittwoch, den 05.09.2012, 11:25 +0200 schrieb Norbert Roos:
 On 09/05/2012 08:12 AM, Jan Weitzel wrote:
 
  I just wanted to try the freshly generated MLO and barebox.bin on my
  Phytec PCM049 board (OMAP4 based). Copied both files to the FAT
  partition on the SD card.
 
  Unfortunately it doesn't boot, after trying to boot from SD card the ROM
  boot loader oviously skips to booting from UART.
 
  Hi,
  which barebox version? Is the board with OMAP4460?
 
 barebox is 2012.08.0, OMAP4430.

I just test it here it works. Did you use pcm049_xload_defconfig? SD
card layout ok? Special nand mounted? Maybe you ask at supp...@phytec.de
Jan

 bye
 Norbert
 
 
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Re: Suspected ##SPAM## -:Re: [PATCH v4] xload: get barebox size from barebox_arm_head

2012-09-05 Thread Jan Weitzel
Am Mittwoch, den 05.09.2012, 12:34 +0200 schrieb Jean-Christophe
PLAGNIOL-VILLARD:
 On 10:22 Wed 05 Sep , Jan Weitzel wrote:
  Add functions to read the barebox_arm_head, check barebox magicword
  and read out the barebox image size.
  Create a inital partion of 1Mb to access the barebox image on nand.
  
  Signed-off-by: Jan Weitzel j.weit...@phytec.de
  ---
  v2: remove fall back if header read fail 
  v3: fix header check, rebase master 
  v4: factorize barebox detection
  
   arch/arm/include/asm/barebox-arm-head.h |9 +
   arch/arm/mach-omap/include/mach/xload.h |2 +-
   arch/arm/mach-omap/xload.c  |   57 
  --
   common/filetype.c   |3 +-
 this con not work
 
 common/filetype is use accross ARCH
 
 is_barebox_arm_head need to be a inline returning false if not arm
this is why I use the ugly #include
../arch/arm/include/asm/barebox-arm-head.h. By now we can detect
filetype_arm_barebox even on non arm architectures. Is breaking this OK?
Jan
 
 Best Regards,
 J.
   4 files changed, 65 insertions(+), 6 deletions(-)
  
  diff --git a/arch/arm/include/asm/barebox-arm-head.h 
  b/arch/arm/include/asm/barebox-arm-head.h
  index 2c250e9..42bd239 100644
  --- a/arch/arm/include/asm/barebox-arm-head.h
  +++ b/arch/arm/include/asm/barebox-arm-head.h
  @@ -1,6 +1,15 @@
   #ifndef __ASM_ARM_HEAD_H
   #define __ASM_ARM_HEAD_H
   
  +#define ARM_HEAD_SIZE  0x30
  +#define HEAD_MAGICWORD_OFFSET  0x20
  +#define HEAD_SIZE_OFFSET   0x2C
  +
  +static inline int is_barebox_arm_head(const char *head)
  +{
  +   return !strcmp(head + HEAD_MAGICWORD_OFFSET, barebox);
  +}
  +
   static inline void barebox_arm_head(void)
   {
  __asm__ __volatile__ (
  diff --git a/arch/arm/mach-omap/include/mach/xload.h 
  b/arch/arm/mach-omap/include/mach/xload.h
  index 844b57f..26f1b68 100644
  --- a/arch/arm/mach-omap/include/mach/xload.h
  +++ b/arch/arm/mach-omap/include/mach/xload.h
  @@ -1,7 +1,7 @@
   #ifndef _MACH_XLOAD_H
   #define _MACH_XLOAD_H
   
  -void *omap_xload_boot_nand(int offset, int size);
  +void *omap_xload_boot_nand(int offset);
   void *omap_xload_boot_mmc(void);
   
   enum omap_boot_src {
  diff --git a/arch/arm/mach-omap/xload.c b/arch/arm/mach-omap/xload.c
  index 13024ab..5f9ca26 100644
  --- a/arch/arm/mach-omap/xload.c
  +++ b/arch/arm/mach-omap/xload.c
  @@ -7,16 +7,65 @@
   #include fcntl.h
   #include mach/xload.h
   #include sizes.h
  +#include asm/barebox-arm-head.h
   
  -void *omap_xload_boot_nand(int offset, int size)
  +void *read_image_head(const char *name)
   {
  +   void *header = xmalloc(ARM_HEAD_SIZE);
  +   struct cdev *cdev;
  int ret;
  -   void *to = xmalloc(size);
  +
  +   cdev = cdev_open(name, O_RDONLY);
  +   if (!cdev) {
  +   printf(failed to open partition\n);
  +   return NULL;
  +   }
  +
  +   ret = cdev_read(cdev, header, ARM_HEAD_SIZE, 0, 0);
  +   cdev_close(cdev);
  +
  +   if (ret != ARM_HEAD_SIZE) {
  +   printf(failed to read from partition\n);
  +   return NULL;
  +   }
  +
  +   return header;
  +}
  +
  +unsigned int get_image_size(void *head)
  +{
  +   unsigned int ret = 0;
  +   unsigned int *psize = head + HEAD_SIZE_OFFSET;
  +
  +   if (is_barebox_arm_head(head))
  +   ret = *psize;
  +   debug(Detected barebox image size %u\n, ret);
  +
  +   return ret;
  +}
  +
  +void *omap_xload_boot_nand(int offset)
  +{
  +   int ret;
  +   int size;
  +   void *to, *header;
  struct cdev *cdev;
   
  -   devfs_add_partition(nand0, offset, size, DEVFS_PARTITION_FIXED, x);
  +   devfs_add_partition(nand0, offset, SZ_1M, DEVFS_PARTITION_FIXED, x);
  dev_add_bb_dev(x, bbx);
   
  +   header = read_image_head(bbx);
  +   if (header == NULL)
  +   return NULL;
  +
  +   size = get_image_size(header);
  +   if (!size) {
  +   printf(failed to get image size\n);
  +   return NULL;
  +   }
  +
  +   to = xmalloc(size);
  +
  cdev = cdev_open(bbx, O_RDONLY);
  if (!cdev) {
  printf(failed to open nand\n);
  @@ -80,7 +129,7 @@ int run_shell(void)
  printf(unknown boot source. Fall back to nand\n);
  case OMAP_BOOTSRC_NAND:
  printf(booting from NAND\n);
  -   func = omap_xload_boot_nand(SZ_128K, SZ_256K);
  +   func = omap_xload_boot_nand(SZ_128K);
  break;
  }
   
  diff --git a/common/filetype.c b/common/filetype.c
  index 1a5b82d..a95e4fd 100644
  --- a/common/filetype.c
  +++ b/common/filetype.c
  @@ -25,6 +25,7 @@
   #include fcntl.h
   #include fs.h
   #include malloc.h
  +#include ../arch/arm/include/asm/barebox-arm-head.h
   
   static const char *filetype_str[] = {
  [filetype_unknown] = unknown,
  @@ -57,7 +58,7 @@ enum filetype file_detect_type(void *_buf)
   
  if (strncmp(buf8, #!/bin/sh, 9) == 0)
  return filetype_sh;
  -   if (buf[8] == 0x65726162  buf[9] == 0x00786f62

Re: MLO doesn't work, rest is ok

2012-09-05 Thread Jan Weitzel
Am Mittwoch, den 05.09.2012, 13:15 +0200 schrieb Sascha Hauer:
 On Wed, Sep 05, 2012 at 01:01:54PM +0200, Norbert Roos wrote:
  On 09/05/2012 12:53 PM, Sascha Hauer wrote:
  
  What gcc version do you have?
  
  gcc version 4.6.3 (Ubuntu/Linaro 4.6.3-1ubuntu5)
 
 Maybe you could try an older toolchain. There are some dark memories in
 my mind, but it could also be that my mind is fooling me...
I used gcc-linaro-4.5 with gcc-4.6.2 it stops working here also.
Jan

  
  Is there something which i could quickly check in the MLO, a
  checksum for example? Only if you know something, otherwise i can
  look it up in the OMAP manual, what he is doing to accept the MLO.
  
  As i said, it seems he doesn't like the MLO, because he's skipping
  to the next boot source..
 
 The MLO is generated from barebox.bin with the omap_signGP tool. It
 seems the header is 520byte in size. You could compare these between
 both images. I don't know though if this is enough for the OMAP ROM code
 to detect a valid image.
 
 Sascha
 



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Re: [PATCH v3] xload: get barebox size from barebox_arm_head

2012-09-04 Thread Jan Weitzel
Am Mittwoch, den 29.08.2012, 14:21 +0200 schrieb Jean-Christophe
PLAGNIOL-VILLARD:
 On 11:10 Wed 29 Aug , Jan Weitzel wrote:
  Add functions to read the barebox_arm_head, check barebox magicword
  and read out the barebox image size.
  Create a inital partion of 1Mb to access the barebox image on nand.
  
  Signed-off-by: Jan Weitzel j.weit...@phytec.de
  ---
  v2: remove fall back if header read fail 
  v3: fix header check, rebase master 
  
   arch/arm/include/asm/barebox-arm-head.h |4 ++
   arch/arm/mach-omap/include/mach/xload.h |2 +-
   arch/arm/mach-omap/xload.c  |   58 
  --
   3 files changed, 59 insertions(+), 5 deletions(-)
  
  diff --git a/arch/arm/include/asm/barebox-arm-head.h 
  b/arch/arm/include/asm/barebox-arm-head.h
  index 2c250e9..1ddfc0f 100644
  --- a/arch/arm/include/asm/barebox-arm-head.h
  +++ b/arch/arm/include/asm/barebox-arm-head.h
  @@ -1,6 +1,10 @@
   #ifndef __ASM_ARM_HEAD_H
   #define __ASM_ARM_HEAD_H
   
  +#define ARM_HEAD_SIZE  0x30
  +#define HEAD_MAGICWORD_OFFSET  0x20
  +#define HEAD_SIZE_OFFSET   0x2C
  +
   static inline void barebox_arm_head(void)
   {
  __asm__ __volatile__ (
  diff --git a/arch/arm/mach-omap/include/mach/xload.h 
  b/arch/arm/mach-omap/include/mach/xload.h
  index 844b57f..26f1b68 100644
  --- a/arch/arm/mach-omap/include/mach/xload.h
  +++ b/arch/arm/mach-omap/include/mach/xload.h
  @@ -1,7 +1,7 @@
   #ifndef _MACH_XLOAD_H
   #define _MACH_XLOAD_H
   
  -void *omap_xload_boot_nand(int offset, int size);
  +void *omap_xload_boot_nand(int offset);
   void *omap_xload_boot_mmc(void);
   
   enum omap_boot_src {
  diff --git a/arch/arm/mach-omap/xload.c b/arch/arm/mach-omap/xload.c
  index 13024ab..d9765b7 100644
  --- a/arch/arm/mach-omap/xload.c
  +++ b/arch/arm/mach-omap/xload.c
  @@ -7,16 +7,66 @@
   #include fcntl.h
   #include mach/xload.h
   #include sizes.h
  +#include asm/barebox-arm-head.h
   
  -void *omap_xload_boot_nand(int offset, int size)
  +void *read_image_head(const char *name)
   {
  +   void *header = xmalloc(ARM_HEAD_SIZE);
  +   struct cdev *cdev;
  int ret;
  -   void *to = xmalloc(size);
  +
  +   cdev = cdev_open(name, O_RDONLY);
  +   if (!cdev) {
  +   printf(failed to open partition\n);
  +   return NULL;
  +   }
  +
  +   ret = cdev_read(cdev, header, ARM_HEAD_SIZE, 0, 0);
  +   cdev_close(cdev);
  +
  +   if (ret != ARM_HEAD_SIZE) {
  +   printf(failed to read from partition\n);
  +   return NULL;
  +   }
  +
  +   return header;
  +}
  +
  +unsigned int get_image_size(void *head)
  +{
  +   unsigned int ret = 0;
  +   unsigned int *psize = head + HEAD_SIZE_OFFSET;
  +   const char *pmagic = head + HEAD_MAGICWORD_OFFSET;
  +
  +   if (!strcmp(pmagic, barebox))
  +   ret = *psize;
  +   debug(Detected barebox image size %u\n, ret);
 factorise the code with filetype
What exactly do you mean? I could factorise it by boot source (mmc / nand) with 
complete omap_xload_boot_nand.
Jan

 Best Regards,
 J.



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Re: [PATCH 06/10] omap: add SPI as a boot mode for xload

2012-09-04 Thread Jan Weitzel
Am Montag, den 03.09.2012, 18:24 +0200 schrieb Jean-Christophe
PLAGNIOL-VILLARD:
 On 13:46 Mon 03 Sep , Jan Luebbe wrote:
  Signed-off-by: Jan Luebbe j...@pengutronix.de
 you need to sync with 
 
 257 Aug27 Jan Weitzel [RFC] xload: get barebox size from 
 barebox_arm_head

read_image_head reads the size from partition. Could you try it?.
[PATCH v3] xload: get barebox size from barebox_arm_head

Jan



 Best Regards,
 J.
 
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Re: [PATCH v3] xload: get barebox size from barebox_arm_head

2012-09-04 Thread Jan Weitzel
Am Dienstag, den 04.09.2012, 11:28 +0200 schrieb Sascha Hauer:
 On Tue, Sep 04, 2012 at 09:34:22AM +0200, Jan Weitzel wrote:
  Am Mittwoch, den 29.08.2012, 14:21 +0200 schrieb Jean-Christophe
+unsigned int get_image_size(void *head)
+{
+   unsigned int ret = 0;
+   unsigned int *psize = head + HEAD_SIZE_OFFSET;
+   const char *pmagic = head + HEAD_MAGICWORD_OFFSET;
+
+   if (!strcmp(pmagic, barebox))
+   ret = *psize;
+   debug(Detected barebox image size %u\n, ret);
   factorise the code with filetype
  What exactly do you mean? I could factorise it by boot source (mmc / nand) 
  with complete omap_xload_boot_nand.
 
 He means that you should use file_detect_type() To detect whether it's a
 barebox image.
 I'm unsure I share this opinion. After detecting that it's a barebox
 file you have to look into the header anyway to get the actual size.
I wasn't aware of this function. I would like to avoid adding
CONFIG_FILETYPE to MLO config.
Jan
 Sascha
 



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Re: [PATCH v2] xload: get barebox size from barebox_arm_head

2012-08-29 Thread Jan Weitzel
Am Mittwoch, den 29.08.2012, 08:59 +0200 schrieb Sascha Hauer:
 On Tue, Aug 28, 2012 at 02:36:21PM +0200, Jan Weitzel wrote:
  Add functions to read the barebox_arm_head, check barebox magicword
  and read out the barebox image size.
  Create a inital partion of 1Mb to access the barebox image on nand.
 
 The patch neither applies on next or on master. On which branch did you
 apply this?
Sorry, on a outdated branch with other omap4 nand stuff. I rebase the patch to 
master and send it after testing.
Jan

 Sascha
 
  
  Signed-off-by: Jan Weitzel j.weit...@phytec.de
  ---
  v2: remove fall back if header read fail 
  
   arch/arm/include/asm/barebox-arm-head.h |4 ++
   arch/arm/mach-omap/include/mach/xload.h |2 +-
   arch/arm/mach-omap/xload.c  |   58 
  --
   3 files changed, 59 insertions(+), 5 deletions(-)
  
  diff --git a/arch/arm/include/asm/barebox-arm-head.h 
  b/arch/arm/include/asm/barebox-arm-head.h
  index 0dc3074..521bcf6 100644
  --- a/arch/arm/include/asm/barebox-arm-head.h
  +++ b/arch/arm/include/asm/barebox-arm-head.h
  @@ -1,6 +1,10 @@
   #ifndef __ASM_ARM_HEAD_H
   #define __ASM_ARM_HEAD_H
   
  +#define ARM_HEAD_SIZE  0x30
  +#define HEAD_MAGICWORD_OFFSET  0x20
  +#define HEAD_SIZE_OFFSET   0x2C
  +
   static inline void barebox_arm_head(void)
   {
  __asm__ __volatile__ (
  diff --git a/arch/arm/mach-omap/include/mach/xload.h 
  b/arch/arm/mach-omap/include/mach/xload.h
  index 844b57f..26f1b68 100644
  --- a/arch/arm/mach-omap/include/mach/xload.h
  +++ b/arch/arm/mach-omap/include/mach/xload.h
  @@ -1,7 +1,7 @@
   #ifndef _MACH_XLOAD_H
   #define _MACH_XLOAD_H
   
  -void *omap_xload_boot_nand(int offset, int size);
  +void *omap_xload_boot_nand(int offset);
   void *omap_xload_boot_mmc(void);
   
   enum omap_boot_src {
  diff --git a/arch/arm/mach-omap/xload.c b/arch/arm/mach-omap/xload.c
  index 9a6b0b4..0be0c50 100644
  --- a/arch/arm/mach-omap/xload.c
  +++ b/arch/arm/mach-omap/xload.c
  @@ -7,16 +7,66 @@
   #include fcntl.h
   #include mach/xload.h
   #include sizes.h
  +#include asm/barebox-arm-head.h
   
  -void *omap_xload_boot_nand(int offset, int size)
  +void *read_image_head(const char *name)
   {
  +   void *header = xmalloc(ARM_HEAD_SIZE);
  +   struct cdev *cdev;
  int ret;
  -   void *to = xmalloc(size);
  +
  +   cdev = cdev_open(name, O_RDONLY);
  +   if (!cdev) {
  +   printf(failed to open partition\n);
  +   return NULL;
  +   }
  +
  +   ret = cdev_read(cdev, header, ARM_HEAD_SIZE, 0, 0);
  +   cdev_close(cdev);
  +
  +   if (ret != ARM_HEAD_SIZE) {
  +   printf(failed to read from partition\n);
  +   return NULL;
  +   }
  +
  +   return header;
  +}
  +
  +unsigned int get_image_size(void *head)
  +{
  +   unsigned int ret = 0;
  +   unsigned int *psize = head + HEAD_SIZE_OFFSET;
  +   const char *pmagic = head + HEAD_MAGICWORD_OFFSET;
  +
  +   if (!strcmp(pmagic, barebox))
  +   ret = *psize;
  +   debug(Detected barebox image size %u\n, ret);
  +
  +   return ret;
  +}
  +
  +void *omap_xload_boot_nand(int offset)
  +{
  +   int ret;
  +   int size;
  +   void *to, *header;
  struct cdev *cdev;
   
  -   devfs_add_partition(nand0, offset, size, PARTITION_FIXED, x);
  +   devfs_add_partition(nand0, offset, SZ_1M, PARTITION_FIXED, x);
  dev_add_bb_dev(x, bbx);
   
  +   header = get_image_size(read_image_head(bbx));
  +   if (header == NULL)
  +   return NULL;
  +
  +   size = get_image_size(header);
  +   if (!size) {
  +   printf(failed to get image size\n);
  +   return NULL;
  +   }
  +
  +   to = xmalloc(size);
  +
  cdev = cdev_open(bbx, O_RDONLY);
  if (!cdev) {
  printf(failed to open nand\n);
  @@ -80,7 +130,7 @@ int run_shell(void)
  printf(unknown boot source. Fall back to nand\n);
  case OMAP_BOOTSRC_NAND:
  printf(booting from NAND\n);
  -   func = omap_xload_boot_nand(SZ_128K, SZ_512K);
  +   func = omap_xload_boot_nand(SZ_128K);
  break;
  }
   
  -- 
  1.7.0.4
  
  
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[PATCH v2] xload: get barebox size from barebox_arm_head

2012-08-28 Thread Jan Weitzel
Add functions to read the barebox_arm_head, check barebox magicword
and read out the barebox image size.
Create a inital partion of 1Mb to access the barebox image on nand.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v2: remove fall back if header read fail 

 arch/arm/include/asm/barebox-arm-head.h |4 ++
 arch/arm/mach-omap/include/mach/xload.h |2 +-
 arch/arm/mach-omap/xload.c  |   58 --
 3 files changed, 59 insertions(+), 5 deletions(-)

diff --git a/arch/arm/include/asm/barebox-arm-head.h 
b/arch/arm/include/asm/barebox-arm-head.h
index 0dc3074..521bcf6 100644
--- a/arch/arm/include/asm/barebox-arm-head.h
+++ b/arch/arm/include/asm/barebox-arm-head.h
@@ -1,6 +1,10 @@
 #ifndef __ASM_ARM_HEAD_H
 #define __ASM_ARM_HEAD_H
 
+#define ARM_HEAD_SIZE  0x30
+#define HEAD_MAGICWORD_OFFSET  0x20
+#define HEAD_SIZE_OFFSET   0x2C
+
 static inline void barebox_arm_head(void)
 {
__asm__ __volatile__ (
diff --git a/arch/arm/mach-omap/include/mach/xload.h 
b/arch/arm/mach-omap/include/mach/xload.h
index 844b57f..26f1b68 100644
--- a/arch/arm/mach-omap/include/mach/xload.h
+++ b/arch/arm/mach-omap/include/mach/xload.h
@@ -1,7 +1,7 @@
 #ifndef _MACH_XLOAD_H
 #define _MACH_XLOAD_H
 
-void *omap_xload_boot_nand(int offset, int size);
+void *omap_xload_boot_nand(int offset);
 void *omap_xload_boot_mmc(void);
 
 enum omap_boot_src {
diff --git a/arch/arm/mach-omap/xload.c b/arch/arm/mach-omap/xload.c
index 9a6b0b4..0be0c50 100644
--- a/arch/arm/mach-omap/xload.c
+++ b/arch/arm/mach-omap/xload.c
@@ -7,16 +7,66 @@
 #include fcntl.h
 #include mach/xload.h
 #include sizes.h
+#include asm/barebox-arm-head.h
 
-void *omap_xload_boot_nand(int offset, int size)
+void *read_image_head(const char *name)
 {
+   void *header = xmalloc(ARM_HEAD_SIZE);
+   struct cdev *cdev;
int ret;
-   void *to = xmalloc(size);
+
+   cdev = cdev_open(name, O_RDONLY);
+   if (!cdev) {
+   printf(failed to open partition\n);
+   return NULL;
+   }
+
+   ret = cdev_read(cdev, header, ARM_HEAD_SIZE, 0, 0);
+   cdev_close(cdev);
+
+   if (ret != ARM_HEAD_SIZE) {
+   printf(failed to read from partition\n);
+   return NULL;
+   }
+
+   return header;
+}
+
+unsigned int get_image_size(void *head)
+{
+   unsigned int ret = 0;
+   unsigned int *psize = head + HEAD_SIZE_OFFSET;
+   const char *pmagic = head + HEAD_MAGICWORD_OFFSET;
+
+   if (!strcmp(pmagic, barebox))
+   ret = *psize;
+   debug(Detected barebox image size %u\n, ret);
+
+   return ret;
+}
+
+void *omap_xload_boot_nand(int offset)
+{
+   int ret;
+   int size;
+   void *to, *header;
struct cdev *cdev;
 
-   devfs_add_partition(nand0, offset, size, PARTITION_FIXED, x);
+   devfs_add_partition(nand0, offset, SZ_1M, PARTITION_FIXED, x);
dev_add_bb_dev(x, bbx);
 
+   header = get_image_size(read_image_head(bbx));
+   if (header == NULL)
+   return NULL;
+
+   size = get_image_size(header);
+   if (!size) {
+   printf(failed to get image size\n);
+   return NULL;
+   }
+
+   to = xmalloc(size);
+
cdev = cdev_open(bbx, O_RDONLY);
if (!cdev) {
printf(failed to open nand\n);
@@ -80,7 +130,7 @@ int run_shell(void)
printf(unknown boot source. Fall back to nand\n);
case OMAP_BOOTSRC_NAND:
printf(booting from NAND\n);
-   func = omap_xload_boot_nand(SZ_128K, SZ_512K);
+   func = omap_xload_boot_nand(SZ_128K);
break;
}
 
-- 
1.7.0.4


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[PATCH] pcm049: use NAND_BUSWIDTH_AUTO

2012-08-27 Thread Jan Weitzel
autodetect bus width

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/boards/pcm049/board.c |1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
index 456c9a7..57b24af 100644
--- a/arch/arm/boards/pcm049/board.c
+++ b/arch/arm/boards/pcm049/board.c
@@ -101,7 +101,6 @@ static struct i2c_board_info i2c_devices[] = {
 
 static struct gpmc_nand_platform_data nand_plat = {
.wait_mon_pin = 1,
-   .device_width = 8,
.ecc_mode = OMAP_ECC_BCH8_CODE_HW,
.nand_cfg = omap4_nand_cfg,
 };
-- 
1.7.0.4


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[RFC] xload: get barebox size from barebox_arm_head

2012-08-27 Thread Jan Weitzel
Add functions to read the barebox_arm_head, check barebox magicword
and read out the barebox image size.
Create a inital partion of 1Mb to access the barebox image on nand.
Fall back to 512 Byte.

Where is a good place for the helper functions? arch/arm/lib ?

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/include/asm/barebox-arm-head.h |4 ++
 arch/arm/mach-omap/include/mach/xload.h |2 +-
 arch/arm/mach-omap/xload.c  |   55 --
 3 files changed, 56 insertions(+), 5 deletions(-)

diff --git a/arch/arm/include/asm/barebox-arm-head.h 
b/arch/arm/include/asm/barebox-arm-head.h
index 0dc3074..521bcf6 100644
--- a/arch/arm/include/asm/barebox-arm-head.h
+++ b/arch/arm/include/asm/barebox-arm-head.h
@@ -1,6 +1,10 @@
 #ifndef __ASM_ARM_HEAD_H
 #define __ASM_ARM_HEAD_H
 
+#define ARM_HEAD_SIZE  0x30
+#define HEAD_MAGICWORD_OFFSET  0x20
+#define HEAD_SIZE_OFFSET   0x2C
+
 static inline void barebox_arm_head(void)
 {
__asm__ __volatile__ (
diff --git a/arch/arm/mach-omap/include/mach/xload.h 
b/arch/arm/mach-omap/include/mach/xload.h
index 844b57f..26f1b68 100644
--- a/arch/arm/mach-omap/include/mach/xload.h
+++ b/arch/arm/mach-omap/include/mach/xload.h
@@ -1,7 +1,7 @@
 #ifndef _MACH_XLOAD_H
 #define _MACH_XLOAD_H
 
-void *omap_xload_boot_nand(int offset, int size);
+void *omap_xload_boot_nand(int offset);
 void *omap_xload_boot_mmc(void);
 
 enum omap_boot_src {
diff --git a/arch/arm/mach-omap/xload.c b/arch/arm/mach-omap/xload.c
index 9a6b0b4..eff2ea0 100644
--- a/arch/arm/mach-omap/xload.c
+++ b/arch/arm/mach-omap/xload.c
@@ -7,16 +7,63 @@
 #include fcntl.h
 #include mach/xload.h
 #include sizes.h
+#include asm/barebox-arm-head.h
 
-void *omap_xload_boot_nand(int offset, int size)
+void *read_image_head(const char *name)
+{
+   void *header = xmalloc(ARM_HEAD_SIZE);
+   struct cdev *cdev;
+   int ret;
+
+   cdev = cdev_open(name, O_RDONLY);
+   if (!cdev) {
+   printf(failed to open partition\n);
+   return NULL;
+   }
+
+   ret = cdev_read(cdev, header, ARM_HEAD_SIZE, 0, 0);
+   cdev_close(cdev);
+
+   if (ret != ARM_HEAD_SIZE) {
+   printf(failed to read from partition\n);
+   return NULL;
+   }
+
+   return header;
+}
+
+unsigned int get_image_size(void *head)
+{
+   unsigned int ret = 0;
+   unsigned int *psize = head + HEAD_SIZE_OFFSET;
+   const char *pmagic = head + HEAD_MAGICWORD_OFFSET;
+
+   if (!head)
+   return 0;
+
+   if (!strcmp(pmagic, barebox))
+   ret = *psize;
+   debug(Detected barebox image size %u\n, ret);
+
+   return ret;
+}
+
+void *omap_xload_boot_nand(int offset)
 {
int ret;
-   void *to = xmalloc(size);
+   int size;
+   void *to;
struct cdev *cdev;
 
-   devfs_add_partition(nand0, offset, size, PARTITION_FIXED, x);
+   devfs_add_partition(nand0, offset, SZ_1M, PARTITION_FIXED, x);
dev_add_bb_dev(x, bbx);
 
+   size = get_image_size(read_image_head(bbx));
+   if (!size)
+   size = SZ_512K;
+
+   to = xmalloc(size);
+
cdev = cdev_open(bbx, O_RDONLY);
if (!cdev) {
printf(failed to open nand\n);
@@ -80,7 +127,7 @@ int run_shell(void)
printf(unknown boot source. Fall back to nand\n);
case OMAP_BOOTSRC_NAND:
printf(booting from NAND\n);
-   func = omap_xload_boot_nand(SZ_128K, SZ_512K);
+   func = omap_xload_boot_nand(SZ_128K);
break;
}
 
-- 
1.7.0.4


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[PATCH 2/3] OMAP4460: ram init changes

2012-08-14 Thread Jan Weitzel
configure  Memory Adapter for 4460

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/mach-omap/include/mach/omap4-silicon.h |4 
 arch/arm/mach-omap/omap4_generic.c  |   21 +++--
 2 files changed, 23 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h 
b/arch/arm/mach-omap/include/mach/omap4-silicon.h
index d5517c5..4082bac 100644
--- a/arch/arm/mach-omap/include/mach/omap4-silicon.h
+++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h
@@ -101,6 +101,10 @@
 #define DMM_LISA_MAP_SYS_SIZE_MASK (7  20)
 #define DMM_LISA_MAP_SYS_SIZE_SHIFT20
 #define DMM_LISA_MAP_SYS_ADDR_MASK (0xFF  24)
+
+/* Memory Adapter (4460 onwards) */
+#define OMAP44XX_MA_BASE   0x482AF000
+
 /*
  * Hardware Register Details
  */
diff --git a/arch/arm/mach-omap/omap4_generic.c 
b/arch/arm/mach-omap/omap4_generic.c
index 3f6865a..617d786 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -29,6 +29,10 @@
 #define OMAP4460_CONTROL_ID_CODE_ES1_0  0x0B94E02F
 #define OMAP4460_CONTROL_ID_CODE_ES1_1  0x2B94E02F
 
+/* EMIF_L3_CONFIG register value */
+#define EMIF_L3_CONFIG_VAL_SYS_10_LL_0 0x0AFF
+#define EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0   0x0A30
+
 void __noreturn reset_cpu(unsigned long addr)
 {
writel(PRM_RSTCTRL_RESET, PRM_RSTCTRL);
@@ -272,8 +276,7 @@ static void reset_phy(unsigned int base)
 void omap4_ddr_init(const struct ddr_regs *ddr_regs,
const struct dpll_param *core)
 {
-   unsigned int rev;
-   rev = omap4_revision();
+   unsigned int rev = omap4_revision();
 
if (rev == OMAP4430_ES2_0) {
writel(0x9e9e9e9e, 0x4A100638);
@@ -296,6 +299,13 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
writel(0x, OMAP44XX_DMM_BASE + DMM_LISA_MAP_2);
writel(0xFF020100, OMAP44XX_DMM_BASE + DMM_LISA_MAP_3);
 
+   if (rev = OMAP4460_ES1_0) {
+   writel(0x80640300, OMAP44XX_MA_BASE + DMM_LISA_MAP_0);
+
+   writel(0x, OMAP44XX_MA_BASE + DMM_LISA_MAP_2);
+   writel(0xFF020100, OMAP44XX_MA_BASE + DMM_LISA_MAP_3);
+   }
+
/* DDR needs to be initialised @ 19.2 MHz
 * So put core DPLL in bypass mode
 * Configure the Core DPLL but don't lock it
@@ -338,6 +348,13 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
writel(0x8000, OMAP44XX_EMIF1_BASE + EMIF_PWR_MGMT_CTRL);
writel(0x8000, OMAP44XX_EMIF2_BASE + EMIF_PWR_MGMT_CTRL);
 
+   if (rev = OMAP4460_ES1_0) {
+   writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0,
+   OMAP44XX_EMIF1_BASE + EMIF_L3_CONFIG);
+   writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0,
+   OMAP44XX_EMIF2_BASE + EMIF_L3_CONFIG);
+   }
+
/*
 * DMM : DMM_LISA_MAP_0(Section_0)
 * [31:24] SYS_ADDR 0x80
-- 
1.7.0.4


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[PATCH 0/3 v2] omap: 4460 support

2012-08-14 Thread Jan Weitzel
Add support for OMAP4460 cpu
on top of ed358834 (next)

v2: merge usage of omap4_scale_vcores to 1/3
avoid volatile int*


Jan Weitzel (3):
  Add support for OMAP4460 TPS62361
  OMAP4460: ram init changes
  OMAP4460: clock init

 arch/arm/boards/panda/lowlevel.c|4 +-
 arch/arm/boards/panda/mux.c |8 +++
 arch/arm/boards/pcm049/lowlevel.c   |   15 --
 arch/arm/boards/pcm049/mux.c|8 +++
 arch/arm/boards/phycard-a-xl2/lowlevel.c|   13 -
 arch/arm/boards/phycard-a-xl2/mux.c |8 +++
 arch/arm/mach-omap/include/mach/omap4-clock.h   |   19 +++
 arch/arm/mach-omap/include/mach/omap4-silicon.h |   13 +-
 arch/arm/mach-omap/omap4_clock.c|   58 +-
 arch/arm/mach-omap/omap4_generic.c  |   60 +--
 10 files changed, 181 insertions(+), 25 deletions(-)


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[PATCH 3/3] OMAP4460: clock init

2012-08-14 Thread Jan Weitzel
Change clock init to allow early gpio access. Add support for 4460 clocks.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/boards/panda/mux.c   |8 +
 arch/arm/boards/pcm049/lowlevel.c |   11 +--
 arch/arm/boards/pcm049/mux.c  |8 +
 arch/arm/boards/phycard-a-xl2/lowlevel.c  |9 -
 arch/arm/boards/phycard-a-xl2/mux.c   |8 +
 arch/arm/mach-omap/include/mach/omap4-clock.h |4 ++
 arch/arm/mach-omap/omap4_clock.c  |   39 +---
 7 files changed, 70 insertions(+), 17 deletions(-)

diff --git a/arch/arm/boards/panda/mux.c b/arch/arm/boards/panda/mux.c
index 310e433..3783006 100644
--- a/arch/arm/boards/panda/mux.c
+++ b/arch/arm/boards/panda/mux.c
@@ -3,6 +3,7 @@
 #include io.h
 #include mach/omap4-silicon.h
 #include mach/omap4-mux.h
+#include mach/omap4-clock.h
 
 static const struct pad_conf_entry core_padconf_array[] = {
{ GPMC_AD0, PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1  /* sdmmc2_dat0 
*/ },
@@ -245,4 +246,11 @@ void set_muxconf_regs(void)
 
omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array,
ARRAY_SIZE(wkup_padconf_array));
+
+   /* gpio_wk7 is used for controlling TPS on 4460 */
+   if (omap4_revision() = OMAP4460_ES1_0) {
+   writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + PAD1_FREF_CLK4_REQ);
+   /* Enable GPIO-1 clocks before TPS initialization */
+   omap4_enable_gpio1_wup_clocks();
+   }
 }
diff --git a/arch/arm/boards/pcm049/lowlevel.c 
b/arch/arm/boards/pcm049/lowlevel.c
index 5e591fa..65a29ec 100644
--- a/arch/arm/boards/pcm049/lowlevel.c
+++ b/arch/arm/boards/pcm049/lowlevel.c
@@ -48,7 +48,8 @@ static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = 
{
 static void noinline pcm049_init_lowlevel(void)
 {
struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400;
-   struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000;
+   struct dpll_param mpu44xx = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000;
+   struct dpll_param mpu4460 = OMAP4_MPU_DPLL_PARAM_19M2_MPU920;
struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2;
struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2;
struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2;
@@ -64,7 +65,11 @@ static void noinline pcm049_init_lowlevel(void)
writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
 
/* Configure all DPLL's at 100% OPP */
-   omap4_configure_mpu_dpll(mpu);
+   if (omap4_revision()  OMAP4460_ES1_0)
+   omap4_configure_mpu_dpll(mpu44xx);
+   else
+   omap4_configure_mpu_dpll(mpu4460);
+
omap4_configure_iva_dpll(iva);
omap4_configure_per_dpll(per);
omap4_configure_abe_dpll(abe);
@@ -90,7 +95,7 @@ void board_init_lowlevel(void)
return;
 
r = 0x4030d000;
-__asm__ __volatile__(mov sp, %0 : : r(r));
+   __asm__ __volatile__(mov sp, %0 : : r(r));
 
pcm049_init_lowlevel();
 }
diff --git a/arch/arm/boards/pcm049/mux.c b/arch/arm/boards/pcm049/mux.c
index a7a77b5..04e1d67 100644
--- a/arch/arm/boards/pcm049/mux.c
+++ b/arch/arm/boards/pcm049/mux.c
@@ -3,6 +3,7 @@
 #include io.h
 #include mach/omap4-silicon.h
 #include mach/omap4-mux.h
+#include mach/omap4-clock.h
 
 static const struct pad_conf_entry core_padconf_array[] = {
{GPMC_AD0, (IEN | PTD | DIS | M0)}, /* 
gpmc_ad0 */
@@ -242,4 +243,11 @@ void set_muxconf_regs(void)
 
omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array,
ARRAY_SIZE(wkup_padconf_array));
+
+   /* gpio_182 is used for controlling TPS on 4460 */
+   if (omap4_revision() = OMAP4460_ES1_0) {
+   writew(M3, OMAP44XX_CONTROL_PADCONF_CORE + FREF_CLK2_OUT);
+   /* Enable GPIO-1 clocks before TPS initialization */
+   omap4_enable_gpio_clocks();
+   }
 }
diff --git a/arch/arm/boards/phycard-a-xl2/lowlevel.c 
b/arch/arm/boards/phycard-a-xl2/lowlevel.c
index 2aa79a8..38f80c9 100644
--- a/arch/arm/boards/phycard-a-xl2/lowlevel.c
+++ b/arch/arm/boards/phycard-a-xl2/lowlevel.c
@@ -48,7 +48,8 @@ static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = 
{
 static noinline void pcaaxl2_init_lowlevel(void)
 {
struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400;
-   struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000;
+   struct dpll_param mpu44xx = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000;
+   struct dpll_param mpu4460 = OMAP4_MPU_DPLL_PARAM_19M2_MPU920;
struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2;
struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2;
struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2;
@@ -64,7 +65,11 @@ static noinline void pcaaxl2_init_lowlevel(void)
writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
 
/* Configure all DPLL's at 100% OPP

[PATCH 3/3] OMAP4460: clock init

2012-08-13 Thread Jan Weitzel
Change clock init to allow early gpio access. Add support for 4460 clocks.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v2: fix omap4_scale_vcores for phycard-a-xl2

 arch/arm/boards/panda/lowlevel.c  |4 ++-
 arch/arm/boards/panda/mux.c   |8 +
 arch/arm/boards/pcm049/lowlevel.c |   15 +++--
 arch/arm/boards/pcm049/mux.c  |8 +
 arch/arm/boards/phycard-a-xl2/lowlevel.c  |   13 ++--
 arch/arm/boards/phycard-a-xl2/mux.c   |8 +
 arch/arm/mach-omap/include/mach/omap4-clock.h |4 ++
 arch/arm/mach-omap/omap4_clock.c  |   39 +---
 8 files changed, 79 insertions(+), 20 deletions(-)

diff --git a/arch/arm/boards/panda/lowlevel.c b/arch/arm/boards/panda/lowlevel.c
index 8591fff..0b4b199 100644
--- a/arch/arm/boards/panda/lowlevel.c
+++ b/arch/arm/boards/panda/lowlevel.c
@@ -28,6 +28,8 @@
 #include mach/syslib.h
 #include asm/barebox-arm.h
 
+#define TPS62361_VSEL0_GPIO7
+
 void set_muxconf_regs(void);
 
 static const struct ddr_regs ddr_regs_400_mhz_2cs = {
@@ -70,7 +72,7 @@ static void noinline panda_init_lowlevel(void)
omap4_ddr_init(ddr_regs_400_mhz_2cs, core);
 
/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
-   omap4_scale_vcores();
+   omap4_scale_vcores(TPS62361_VSEL0_GPIO);
 
board_init_lowlevel_return();
 }
diff --git a/arch/arm/boards/panda/mux.c b/arch/arm/boards/panda/mux.c
index 310e433..3783006 100644
--- a/arch/arm/boards/panda/mux.c
+++ b/arch/arm/boards/panda/mux.c
@@ -3,6 +3,7 @@
 #include io.h
 #include mach/omap4-silicon.h
 #include mach/omap4-mux.h
+#include mach/omap4-clock.h
 
 static const struct pad_conf_entry core_padconf_array[] = {
{ GPMC_AD0, PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1  /* sdmmc2_dat0 
*/ },
@@ -245,4 +246,11 @@ void set_muxconf_regs(void)
 
omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array,
ARRAY_SIZE(wkup_padconf_array));
+
+   /* gpio_wk7 is used for controlling TPS on 4460 */
+   if (omap4_revision() = OMAP4460_ES1_0) {
+   writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + PAD1_FREF_CLK4_REQ);
+   /* Enable GPIO-1 clocks before TPS initialization */
+   omap4_enable_gpio1_wup_clocks();
+   }
 }
diff --git a/arch/arm/boards/pcm049/lowlevel.c 
b/arch/arm/boards/pcm049/lowlevel.c
index 5b91098..65a29ec 100644
--- a/arch/arm/boards/pcm049/lowlevel.c
+++ b/arch/arm/boards/pcm049/lowlevel.c
@@ -28,6 +28,8 @@
 #include mach/syslib.h
 #include asm/barebox-arm.h
 
+#define TPS62361_VSEL0_GPIO182
+
 void set_muxconf_regs(void);
 
 static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = {
@@ -46,7 +48,8 @@ static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = 
{
 static void noinline pcm049_init_lowlevel(void)
 {
struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400;
-   struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000;
+   struct dpll_param mpu44xx = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000;
+   struct dpll_param mpu4460 = OMAP4_MPU_DPLL_PARAM_19M2_MPU920;
struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2;
struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2;
struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2;
@@ -57,12 +60,16 @@ static void noinline pcm049_init_lowlevel(void)
omap4_ddr_init(ddr_regs_mt42L64M64_25_400_mhz, core);
 
/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
-   omap4_scale_vcores();
+   omap4_scale_vcores(TPS62361_VSEL0_GPIO);
 
writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
 
/* Configure all DPLL's at 100% OPP */
-   omap4_configure_mpu_dpll(mpu);
+   if (omap4_revision()  OMAP4460_ES1_0)
+   omap4_configure_mpu_dpll(mpu44xx);
+   else
+   omap4_configure_mpu_dpll(mpu4460);
+
omap4_configure_iva_dpll(iva);
omap4_configure_per_dpll(per);
omap4_configure_abe_dpll(abe);
@@ -88,7 +95,7 @@ void board_init_lowlevel(void)
return;
 
r = 0x4030d000;
-__asm__ __volatile__(mov sp, %0 : : r(r));
+   __asm__ __volatile__(mov sp, %0 : : r(r));
 
pcm049_init_lowlevel();
 }
diff --git a/arch/arm/boards/pcm049/mux.c b/arch/arm/boards/pcm049/mux.c
index a7a77b5..04e1d67 100644
--- a/arch/arm/boards/pcm049/mux.c
+++ b/arch/arm/boards/pcm049/mux.c
@@ -3,6 +3,7 @@
 #include io.h
 #include mach/omap4-silicon.h
 #include mach/omap4-mux.h
+#include mach/omap4-clock.h
 
 static const struct pad_conf_entry core_padconf_array[] = {
{GPMC_AD0, (IEN | PTD | DIS | M0)}, /* 
gpmc_ad0 */
@@ -242,4 +243,11 @@ void set_muxconf_regs(void)
 
omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array,
ARRAY_SIZE(wkup_padconf_array));
+
+   /* gpio_182 is used for controlling TPS on 4460 */
+   if (omap4_revision

[PATCH v2] OMAP4: use writel and readl

2012-08-13 Thread Jan Weitzel
replace *(volatile int*) by writel and readl

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v2 reword commit message

 arch/arm/mach-omap/omap4_generic.c |   34 ++
 1 files changed, 18 insertions(+), 16 deletions(-)

diff --git a/arch/arm/mach-omap/omap4_generic.c 
b/arch/arm/mach-omap/omap4_generic.c
index a368759..617d786 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -268,7 +268,9 @@ int omap4_emif_config(unsigned int base, const struct 
ddr_regs *ddr_regs)
 
 static void reset_phy(unsigned int base)
 {
-   *(volatile int*)(base + IODFT_TLGC) |= (1  10);
+   unsigned int val = readl(base + IODFT_TLGC);
+   val |= (1  10);
+   writel(val, base + IODFT_TLGC);
 }
 
 void omap4_ddr_init(const struct ddr_regs *ddr_regs,
@@ -294,14 +296,14 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
/* Both EMIFs 128 byte interleaved */
writel(0x80640300, OMAP44XX_DMM_BASE + DMM_LISA_MAP_0);
 
-   *(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_2) = 0x;
-   *(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_3) = 0xFF020100;
+   writel(0x, OMAP44XX_DMM_BASE + DMM_LISA_MAP_2);
+   writel(0xFF020100, OMAP44XX_DMM_BASE + DMM_LISA_MAP_3);
 
if (rev = OMAP4460_ES1_0) {
writel(0x80640300, OMAP44XX_MA_BASE + DMM_LISA_MAP_0);
 
-   *(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_2) = 
0x;
-   *(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_3) = 
0xFF020100;
+   writel(0x, OMAP44XX_MA_BASE + DMM_LISA_MAP_2);
+   writel(0xFF020100, OMAP44XX_MA_BASE + DMM_LISA_MAP_3);
}
 
/* DDR needs to be initialised @ 19.2 MHz
@@ -312,10 +314,10 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
 
/* No IDLE: BUG in SDC */
sr32(CM_MEMIF_CLKSTCTRL, 0, 32, 0x2);
-   while(((*(volatile int*)CM_MEMIF_CLKSTCTRL)  0x700) != 0x700);
+   while ((readl(CM_MEMIF_CLKSTCTRL)  0x700) != 0x700);
 
-   *(volatile int*)(OMAP44XX_EMIF1_BASE + EMIF_PWR_MGMT_CTRL) = 0x0;
-   *(volatile int*)(OMAP44XX_EMIF2_BASE + EMIF_PWR_MGMT_CTRL) = 0x0;
+   writel(0x0, OMAP44XX_EMIF1_BASE + EMIF_PWR_MGMT_CTRL);
+   writel(0x0, OMAP44XX_EMIF2_BASE + EMIF_PWR_MGMT_CTRL);
 
omap4_emif_config(OMAP44XX_EMIF1_BASE, ddr_regs);
omap4_emif_config(OMAP44XX_EMIF2_BASE, ddr_regs);
@@ -324,13 +326,13 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
omap4_lock_core_dpll_shadow(core);
 
/* Set DLL_OVERRIDE = 0 */
-   *(volatile int*)CM_DLL_CTRL = 0x0;
+   writel(0x0, CM_DLL_CTRL);
 
delay(200);
 
/* Check for DDR PHY ready for EMIF1  EMIF2 */
-   while*(volatile int*)(OMAP44XX_EMIF1_BASE + EMIF_STATUS))(0x04)) 
!= 0x04) \
-   || (((*(volatile int*)(OMAP44XX_EMIF2_BASE + EMIF_STATUS))(0x04)) != 
0x04));
+   while (((readl(OMAP44XX_EMIF1_BASE + EMIF_STATUS)  0x04) != 0x04) \
+   || ((readl(OMAP44XX_EMIF2_BASE + EMIF_STATUS)  0x04) != 0x04));
 
/* Reprogram the DDR PYHY Control register */
/* PHY control values */
@@ -342,9 +344,9 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
 
/* No IDLE: BUG in SDC */
//sr32(CM_MEMIF_CLKSTCTRL, 0, 32, 0x2);
-   //while(((*(volatile int*)CM_MEMIF_CLKSTCTRL)  0x700) != 0x700);
-   *(volatile int*)(OMAP44XX_EMIF1_BASE + EMIF_PWR_MGMT_CTRL) = 0x8000;
-   *(volatile int*)(OMAP44XX_EMIF2_BASE + EMIF_PWR_MGMT_CTRL) = 0x8000;
+   //while ((readl(CM_MEMIF_CLKSTCTRL)  0x700) != 0x700);
+   writel(0x8000, OMAP44XX_EMIF1_BASE + EMIF_PWR_MGMT_CTRL);
+   writel(0x8000, OMAP44XX_EMIF2_BASE + EMIF_PWR_MGMT_CTRL);
 
if (rev = OMAP4460_ES1_0) {
writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0,
@@ -365,8 +367,8 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
reset_phy(OMAP44XX_EMIF1_BASE);
reset_phy(OMAP44XX_EMIF2_BASE);
 
-   *((volatile int *)0x8000) = 0;
-   *((volatile int *)0x8080) = 0;
+   writel(0, 0x8000);
+   writel(0, 0x8080);
 }
 
 void omap4_power_i2c_send(u32 r)
-- 
1.7.0.4


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[PATCH] OMAP4: use writel and readl

2012-08-02 Thread Jan Weitzel
replace *(volatile int*) bei writel and readl

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/mach-omap/omap4_generic.c |   34 ++
 1 files changed, 18 insertions(+), 16 deletions(-)

diff --git a/arch/arm/mach-omap/omap4_generic.c 
b/arch/arm/mach-omap/omap4_generic.c
index a368759..617d786 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -268,7 +268,9 @@ int omap4_emif_config(unsigned int base, const struct 
ddr_regs *ddr_regs)
 
 static void reset_phy(unsigned int base)
 {
-   *(volatile int*)(base + IODFT_TLGC) |= (1  10);
+   unsigned int val = readl(base + IODFT_TLGC);
+   val |= (1  10);
+   writel(val, base + IODFT_TLGC);
 }
 
 void omap4_ddr_init(const struct ddr_regs *ddr_regs,
@@ -294,14 +296,14 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
/* Both EMIFs 128 byte interleaved */
writel(0x80640300, OMAP44XX_DMM_BASE + DMM_LISA_MAP_0);
 
-   *(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_2) = 0x;
-   *(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_3) = 0xFF020100;
+   writel(0x, OMAP44XX_DMM_BASE + DMM_LISA_MAP_2);
+   writel(0xFF020100, OMAP44XX_DMM_BASE + DMM_LISA_MAP_3);
 
if (rev = OMAP4460_ES1_0) {
writel(0x80640300, OMAP44XX_MA_BASE + DMM_LISA_MAP_0);
 
-   *(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_2) = 
0x;
-   *(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_3) = 
0xFF020100;
+   writel(0x, OMAP44XX_MA_BASE + DMM_LISA_MAP_2);
+   writel(0xFF020100, OMAP44XX_MA_BASE + DMM_LISA_MAP_3);
}
 
/* DDR needs to be initialised @ 19.2 MHz
@@ -312,10 +314,10 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
 
/* No IDLE: BUG in SDC */
sr32(CM_MEMIF_CLKSTCTRL, 0, 32, 0x2);
-   while(((*(volatile int*)CM_MEMIF_CLKSTCTRL)  0x700) != 0x700);
+   while ((readl(CM_MEMIF_CLKSTCTRL)  0x700) != 0x700);
 
-   *(volatile int*)(OMAP44XX_EMIF1_BASE + EMIF_PWR_MGMT_CTRL) = 0x0;
-   *(volatile int*)(OMAP44XX_EMIF2_BASE + EMIF_PWR_MGMT_CTRL) = 0x0;
+   writel(0x0, OMAP44XX_EMIF1_BASE + EMIF_PWR_MGMT_CTRL);
+   writel(0x0, OMAP44XX_EMIF2_BASE + EMIF_PWR_MGMT_CTRL);
 
omap4_emif_config(OMAP44XX_EMIF1_BASE, ddr_regs);
omap4_emif_config(OMAP44XX_EMIF2_BASE, ddr_regs);
@@ -324,13 +326,13 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
omap4_lock_core_dpll_shadow(core);
 
/* Set DLL_OVERRIDE = 0 */
-   *(volatile int*)CM_DLL_CTRL = 0x0;
+   writel(0x0, CM_DLL_CTRL);
 
delay(200);
 
/* Check for DDR PHY ready for EMIF1  EMIF2 */
-   while*(volatile int*)(OMAP44XX_EMIF1_BASE + EMIF_STATUS))(0x04)) 
!= 0x04) \
-   || (((*(volatile int*)(OMAP44XX_EMIF2_BASE + EMIF_STATUS))(0x04)) != 
0x04));
+   while (((readl(OMAP44XX_EMIF1_BASE + EMIF_STATUS)  0x04) != 0x04) \
+   || ((readl(OMAP44XX_EMIF2_BASE + EMIF_STATUS)  0x04) != 0x04));
 
/* Reprogram the DDR PYHY Control register */
/* PHY control values */
@@ -342,9 +344,9 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
 
/* No IDLE: BUG in SDC */
//sr32(CM_MEMIF_CLKSTCTRL, 0, 32, 0x2);
-   //while(((*(volatile int*)CM_MEMIF_CLKSTCTRL)  0x700) != 0x700);
-   *(volatile int*)(OMAP44XX_EMIF1_BASE + EMIF_PWR_MGMT_CTRL) = 0x8000;
-   *(volatile int*)(OMAP44XX_EMIF2_BASE + EMIF_PWR_MGMT_CTRL) = 0x8000;
+   //while ((readl(CM_MEMIF_CLKSTCTRL)  0x700) != 0x700);
+   writel(0x8000, OMAP44XX_EMIF1_BASE + EMIF_PWR_MGMT_CTRL);
+   writel(0x8000, OMAP44XX_EMIF2_BASE + EMIF_PWR_MGMT_CTRL);
 
if (rev = OMAP4460_ES1_0) {
writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0,
@@ -365,8 +367,8 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
reset_phy(OMAP44XX_EMIF1_BASE);
reset_phy(OMAP44XX_EMIF2_BASE);
 
-   *((volatile int *)0x8000) = 0;
-   *((volatile int *)0x8080) = 0;
+   writel(0, 0x8000);
+   writel(0, 0x8080);
 }
 
 void omap4_power_i2c_send(u32 r)
-- 
1.7.0.4


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[PATCH] OMAP4: cleanup

2012-07-27 Thread Jan Weitzel
use rev to check revision

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/mach-omap/omap4_generic.c |9 -
 1 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap/omap4_generic.c 
b/arch/arm/mach-omap/omap4_generic.c
index c6fb91f..f44fa4b 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -23,7 +23,7 @@
 #define MIDR_CORTEX_A9_R1P30x411FC093
 #define MIDR_CORTEX_A9_R2P10   0x412FC09A
 
-#define CONTROL_ID_CODE 0x4A002204
+#define CONTROL_ID_CODE  0x4A002204
 
 #define OMAP4_CONTROL_ID_CODE_ES1_0 0x0B85202F
 #define OMAP4_CONTROL_ID_CODE_ES2_0 0x1B85202F
@@ -278,8 +278,7 @@ static void reset_phy(unsigned int base)
 void omap4_ddr_init(const struct ddr_regs *ddr_regs,
const struct dpll_param *core)
 {
-   unsigned int rev;
-   rev = omap4_revision();
+   unsigned int rev = omap4_revision();
 
if (rev == OMAP4430_ES2_0) {
writel(0x9e9e9e9e, 0x4A100638);
@@ -302,7 +301,7 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
*(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_2) = 0x;
*(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_3) = 0xFF020100;
 
-   if (omap4_revision() = OMAP4460_ES1_0) {
+   if (rev = OMAP4460_ES1_0) {
writel(0x80640300, OMAP44XX_MA_BASE + DMM_LISA_MAP_0);
 
*(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_2) = 
0x;
@@ -351,7 +350,7 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
*(volatile int*)(OMAP44XX_EMIF1_BASE + EMIF_PWR_MGMT_CTRL) = 0x8000;
*(volatile int*)(OMAP44XX_EMIF2_BASE + EMIF_PWR_MGMT_CTRL) = 0x8000;
 
-   if (omap4_revision() = OMAP4460_ES1_0) {
+   if (rev = OMAP4460_ES1_0) {
writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0,
OMAP44XX_EMIF1_BASE + EMIF_L3_CONFIG);
writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0,
-- 
1.7.0.4


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[PATCH] omap: use 512k barebox partition

2012-07-27 Thread Jan Weitzel
Use 512k NAND Partion for barebox. Problem is we don't know the size of the
barebox inside xload. Set it also to 512k
Fix enviroment for boards with size in config

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/boards/pcm049/board.c|7 +--
 arch/arm/boards/pcm049/env/config |2 +-
 arch/arm/boards/phycard-a-l1/env/config   |2 +-
 arch/arm/boards/phycard-a-l1/pca-a-l1.c   |9 ++---
 arch/arm/boards/phycard-a-xl2/env/config  |2 +-
 arch/arm/boards/phycard-a-xl2/pca-a-xl2.c |4 ++--
 arch/arm/mach-omap/xload.c|2 +-
 7 files changed, 17 insertions(+), 11 deletions(-)

diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
index 5b7854a..d7b79c1 100644
--- a/arch/arm/boards/pcm049/board.c
+++ b/arch/arm/boards/pcm049/board.c
@@ -113,9 +113,12 @@ static int pcm049_devices_init(void)
 #ifdef CONFIG_PARTITION
devfs_add_partition(nand0, 0x0, SZ_128K, DEVFS_PARTITION_FIXED, 
xload_raw);
dev_add_bb_dev(xload_raw, xload);
-   devfs_add_partition(nand0, SZ_128K, SZ_256K, DEVFS_PARTITION_FIXED, 
self_raw);
+   devfs_add_partition(nand0, SZ_128K, SZ_512K,
+   DEVFS_PARTITION_FIXED, self_raw);
dev_add_bb_dev(self_raw, self0);
-   devfs_add_partition(nand0, SZ_128K + SZ_256K, SZ_128K, 
DEVFS_PARTITION_FIXED, env_raw);
+   devfs_add_partition(nand0, SZ_128K + SZ_512K, SZ_128K,
+   DEVFS_PARTITION_FIXED, env_raw);
+
dev_add_bb_dev(env_raw, env0);
 #endif
 
diff --git a/arch/arm/boards/pcm049/env/config 
b/arch/arm/boards/pcm049/env/config
index efbe9ea..70e374f 100644
--- a/arch/arm/boards/pcm049/env/config
+++ b/arch/arm/boards/pcm049/env/config
@@ -40,7 +40,7 @@ autoboot_timeout=3
 
 bootargs=console=ttyO2,115200
 
-nand_parts=128k(xload)ro,256k(barebox),128k(bareboxenv),2M(kernel),-(root)
+nand_parts=128k(xload)ro,512k(barebox),128k(bareboxenv),4M(kernel),-(root)
 rootfs_mtdblock_nand=4
 
 # set a fancy prompt (if support is compiled in)
diff --git a/arch/arm/boards/phycard-a-l1/env/config 
b/arch/arm/boards/phycard-a-l1/env/config
index e0f4dcc..5bc48d7 100644
--- a/arch/arm/boards/phycard-a-l1/env/config
+++ b/arch/arm/boards/phycard-a-l1/env/config
@@ -70,7 +70,7 @@ bootargs=$bootargs omapdss.def_disp=pd050vl1
 #bootargs=$bootargs omapdss.def_disp=pd104slf
 #bootargs=$bootargs omapdss.def_disp=pm070wl4
 
-nand_parts=512k(x-loader)ro,1920k(barebox),128k(bareboxenv),4M(kernel),-(root)
+nand_parts=128k(x-loader)ro,512k(barebox),128k(bareboxenv),4M(kernel),-(root)
 nand_device=omap2-nand.0
 rootfs_mtdblock_nand=4
 
diff --git a/arch/arm/boards/phycard-a-l1/pca-a-l1.c 
b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
index 1cc2815..3d3596a 100644
--- a/arch/arm/boards/phycard-a-l1/pca-a-l1.c
+++ b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
@@ -336,13 +336,16 @@ static int pcaal1_late_init(void)
 
nand = get_device_by_name(nand0);
 
-   devfs_add_partition(nand0, 0x0, 0x8, DEVFS_PARTITION_FIXED, 
x-loader);
+   devfs_add_partition(nand0, 0x0, SZ_128K,
+   DEVFS_PARTITION_FIXED, x-loader);
dev_add_bb_dev(self_raw, x_loader0);
 
-   devfs_add_partition(nand0, 0x8, 0x1e, DEVFS_PARTITION_FIXED, 
self_raw);
+   devfs_add_partition(nand0, SZ_128K, SZ_512K,
+   DEVFS_PARTITION_FIXED, self_raw);
dev_add_bb_dev(self_raw, self0);
 
-   devfs_add_partition(nand0, 0x26, 0x2, DEVFS_PARTITION_FIXED, 
env_raw);
+   devfs_add_partition(nand0, SZ_128K + SZ_512K, SZ_128K,
+   DEVFS_PARTITION_FIXED, env_raw);
dev_add_bb_dev(env_raw, env0);
 
return 0;
diff --git a/arch/arm/boards/phycard-a-xl2/env/config 
b/arch/arm/boards/phycard-a-xl2/env/config
index 59e8eb3..44a4181 100644
--- a/arch/arm/boards/phycard-a-xl2/env/config
+++ b/arch/arm/boards/phycard-a-xl2/env/config
@@ -39,7 +39,7 @@ autoboot_timeout=3
 
 bootargs=console=ttyO2,115200
 
-nand_parts=128k(xload)ro,256k(barebox),128k(bareboxenv),4M(kernel),-(root)
+nand_parts=128k(xload)ro,512k(barebox),128k(bareboxenv),4M(kernel),-(root)
 rootfs_mtdblock_nand=4
 
 # set a fancy prompt (if support is compiled in)
diff --git a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c 
b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
index 128cb8f..54b4ada 100644
--- a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
+++ b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
@@ -131,10 +131,10 @@ static int pcaaxl2_devices_init(void)
devfs_add_partition(nand0, 0x0, SZ_128K,
DEVFS_PARTITION_FIXED, xload_raw);
dev_add_bb_dev(xload_raw, xload);
-   devfs_add_partition(nand0, SZ_128K, SZ_256K,
+   devfs_add_partition(nand0, SZ_128K, SZ_512K,
DEVFS_PARTITION_FIXED, self_raw);
dev_add_bb_dev(self_raw, self0);
-   devfs_add_partition(nand0, SZ_128K + SZ_256K, SZ_128K,
+   devfs_add_partition(nand0, SZ_128K + SZ_512K

[PATCH 3/3] OMAP4460: clock init

2012-07-27 Thread Jan Weitzel
Change clock init to allow early gpio access. Add support for 4460 clocks.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/boards/panda/lowlevel.c  |4 ++-
 arch/arm/boards/panda/mux.c   |8 +
 arch/arm/boards/pcm049/lowlevel.c |   15 +++--
 arch/arm/boards/pcm049/mux.c  |8 +
 arch/arm/boards/phycard-a-xl2/lowlevel.c  |9 -
 arch/arm/boards/phycard-a-xl2/mux.c   |8 +
 arch/arm/mach-omap/include/mach/omap4-clock.h |4 ++
 arch/arm/mach-omap/omap4_clock.c  |   39 +---
 8 files changed, 76 insertions(+), 19 deletions(-)

diff --git a/arch/arm/boards/panda/lowlevel.c b/arch/arm/boards/panda/lowlevel.c
index 8591fff..0b4b199 100644
--- a/arch/arm/boards/panda/lowlevel.c
+++ b/arch/arm/boards/panda/lowlevel.c
@@ -28,6 +28,8 @@
 #include mach/syslib.h
 #include asm/barebox-arm.h
 
+#define TPS62361_VSEL0_GPIO7
+
 void set_muxconf_regs(void);
 
 static const struct ddr_regs ddr_regs_400_mhz_2cs = {
@@ -70,7 +72,7 @@ static void noinline panda_init_lowlevel(void)
omap4_ddr_init(ddr_regs_400_mhz_2cs, core);
 
/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
-   omap4_scale_vcores();
+   omap4_scale_vcores(TPS62361_VSEL0_GPIO);
 
board_init_lowlevel_return();
 }
diff --git a/arch/arm/boards/panda/mux.c b/arch/arm/boards/panda/mux.c
index 310e433..3783006 100644
--- a/arch/arm/boards/panda/mux.c
+++ b/arch/arm/boards/panda/mux.c
@@ -3,6 +3,7 @@
 #include io.h
 #include mach/omap4-silicon.h
 #include mach/omap4-mux.h
+#include mach/omap4-clock.h
 
 static const struct pad_conf_entry core_padconf_array[] = {
{ GPMC_AD0, PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1  /* sdmmc2_dat0 
*/ },
@@ -245,4 +246,11 @@ void set_muxconf_regs(void)
 
omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array,
ARRAY_SIZE(wkup_padconf_array));
+
+   /* gpio_wk7 is used for controlling TPS on 4460 */
+   if (omap4_revision() = OMAP4460_ES1_0) {
+   writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + PAD1_FREF_CLK4_REQ);
+   /* Enable GPIO-1 clocks before TPS initialization */
+   omap4_enable_gpio1_wup_clocks();
+   }
 }
diff --git a/arch/arm/boards/pcm049/lowlevel.c 
b/arch/arm/boards/pcm049/lowlevel.c
index 5b91098..65a29ec 100644
--- a/arch/arm/boards/pcm049/lowlevel.c
+++ b/arch/arm/boards/pcm049/lowlevel.c
@@ -28,6 +28,8 @@
 #include mach/syslib.h
 #include asm/barebox-arm.h
 
+#define TPS62361_VSEL0_GPIO182
+
 void set_muxconf_regs(void);
 
 static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = {
@@ -46,7 +48,8 @@ static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = 
{
 static void noinline pcm049_init_lowlevel(void)
 {
struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400;
-   struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000;
+   struct dpll_param mpu44xx = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000;
+   struct dpll_param mpu4460 = OMAP4_MPU_DPLL_PARAM_19M2_MPU920;
struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2;
struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2;
struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2;
@@ -57,12 +60,16 @@ static void noinline pcm049_init_lowlevel(void)
omap4_ddr_init(ddr_regs_mt42L64M64_25_400_mhz, core);
 
/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
-   omap4_scale_vcores();
+   omap4_scale_vcores(TPS62361_VSEL0_GPIO);
 
writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
 
/* Configure all DPLL's at 100% OPP */
-   omap4_configure_mpu_dpll(mpu);
+   if (omap4_revision()  OMAP4460_ES1_0)
+   omap4_configure_mpu_dpll(mpu44xx);
+   else
+   omap4_configure_mpu_dpll(mpu4460);
+
omap4_configure_iva_dpll(iva);
omap4_configure_per_dpll(per);
omap4_configure_abe_dpll(abe);
@@ -88,7 +95,7 @@ void board_init_lowlevel(void)
return;
 
r = 0x4030d000;
-__asm__ __volatile__(mov sp, %0 : : r(r));
+   __asm__ __volatile__(mov sp, %0 : : r(r));
 
pcm049_init_lowlevel();
 }
diff --git a/arch/arm/boards/pcm049/mux.c b/arch/arm/boards/pcm049/mux.c
index a7a77b5..04e1d67 100644
--- a/arch/arm/boards/pcm049/mux.c
+++ b/arch/arm/boards/pcm049/mux.c
@@ -3,6 +3,7 @@
 #include io.h
 #include mach/omap4-silicon.h
 #include mach/omap4-mux.h
+#include mach/omap4-clock.h
 
 static const struct pad_conf_entry core_padconf_array[] = {
{GPMC_AD0, (IEN | PTD | DIS | M0)}, /* 
gpmc_ad0 */
@@ -242,4 +243,11 @@ void set_muxconf_regs(void)
 
omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array,
ARRAY_SIZE(wkup_padconf_array));
+
+   /* gpio_182 is used for controlling TPS on 4460 */
+   if (omap4_revision() = OMAP4460_ES1_0) {
+   writew(M3

[PATCH 1/3] Add support for OMAP4460 TPS62361

2012-07-27 Thread Jan Weitzel
based on: [U-Boot] [PATCH v 4/5] omap4: support TPS programming
TPS62361 is the new power supply used in OMAP4460 that
supplies vdd_mpu.

VCORE1 from Phoenix supplies vdd_core and VCORE2 supplies
vdd_iva. VCORE3 is not used in OMAP4460.

Signed-off-by: F. Gasnier fabrice.gasn...@cenosys.com
Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/mach-omap/include/mach/omap4-clock.h   |   15 +
 arch/arm/mach-omap/include/mach/omap4-silicon.h |9 +-
 arch/arm/mach-omap/omap4_clock.c|   19 +++
 arch/arm/mach-omap/omap4_generic.c  |   39 +-
 4 files changed, 79 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-omap/include/mach/omap4-clock.h 
b/arch/arm/mach-omap/include/mach/omap4-clock.h
index 0a31d09..391ee63 100644
--- a/arch/arm/mach-omap/include/mach/omap4-clock.h
+++ b/arch/arm/mach-omap/include/mach/omap4-clock.h
@@ -271,6 +271,20 @@
 #define PLL_FAST_RELOCK_BYPASS 6 /* CORE */
 #define PLL_LOCK   7 /* MPU, IVA, CORE  PER */
 
+/* TPS */
+#define TPS62361_I2C_SLAVE_ADDR0x60
+#define TPS62361_REG_ADDR_SET0 0x0
+#define TPS62361_REG_ADDR_SET1 0x1
+#define TPS62361_REG_ADDR_SET2 0x2
+#define TPS62361_REG_ADDR_SET3 0x3
+#define TPS62361_REG_ADDR_CTRL 0x4
+#define TPS62361_REG_ADDR_TEMP 0x5
+#define TPS62361_REG_ADDR_RMP_CTRL 0x6
+#define TPS62361_REG_ADDR_CHIP_ID  0x8
+#define TPS62361_REG_ADDR_CHIP_ID_20x9
+
+#define TPS62361_BASE_VOLT_MV  500
+
 /* Used to index into DPLL parameter tables */
 struct dpll_param {
unsigned int m;
@@ -317,4 +331,5 @@ void omap4_configure_core_dpll_no_lock(const struct 
dpll_param *param);
 void omap4_lock_core_dpll(void);
 void omap4_lock_core_dpll_shadow(const struct dpll_param *param);
 void omap4_enable_all_clocks(void);
+void omap4_do_scale_tps62361(u32 reg, u32 volt_mv);
 
diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h 
b/arch/arm/mach-omap/include/mach/omap4-silicon.h
index c785475..d5517c5 100644
--- a/arch/arm/mach-omap/include/mach/omap4-silicon.h
+++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h
@@ -60,6 +60,13 @@
 #define OMAP44XX_PRM_VC_VAL_BYPASS (OMAP44XX_WAKEUP_L4_IO_BASE + 0x7ba0)
 #define OMAP44XX_PRM_VC_CFG_I2C_MODE   (OMAP44XX_WAKEUP_L4_IO_BASE + 0x7ba8)
 #define OMAP44XX_PRM_VC_CFG_I2C_CLK(OMAP44XX_WAKEUP_L4_IO_BASE + 0x7bac)
+#define OMAP44XX_PRM_VC_VAL_BYPASS_VALID_BIT   0x100
+#define OMAP44XX_PRM_VC_VAL_BYPASS_SLAVEADDR_SHIFT 0
+#define OMAP44XX_PRM_VC_VAL_BYPASS_SLAVEADDR_MASK  0x7F
+#define OMAP44XX_PRM_VC_VAL_BYPASS_REGADDR_SHIFT   8
+#define OMAP44XX_PRM_VC_VAL_BYPASS_REGADDR_MASK0xFF
+#define OMAP44XX_PRM_VC_VAL_BYPASS_DATA_SHIFT  16
+#define OMAP44XX_PRM_VC_VAL_BYPASS_DATA_MASK   0xFF
 
 /* IRQ */
 #define OMAP44XX_PRM_IRQSTATUS_MPU_A9  (OMAP44XX_WAKEUP_L4_IO_BASE + 0x6010)
@@ -178,6 +185,6 @@ struct dpll_param;
 void omap4_ddr_init(const struct ddr_regs *, const struct dpll_param *);
 void omap4_power_i2c_send(u32);
 unsigned int omap4_revision(void);
-noinline int omap4_scale_vcores(void);
+noinline int omap4_scale_vcores(unsigned vsel0_pin);
 
 #endif
diff --git a/arch/arm/mach-omap/omap4_clock.c b/arch/arm/mach-omap/omap4_clock.c
index 3ab01f0..564a748 100644
--- a/arch/arm/mach-omap/omap4_clock.c
+++ b/arch/arm/mach-omap/omap4_clock.c
@@ -1,6 +1,7 @@
 #include common.h
 #include io.h
 #include mach/syslib.h
+#include mach/silicon.h
 #include mach/clocks.h
 
 #define LDELAY 1200
@@ -378,3 +379,21 @@ void omap4_enable_all_clocks(void)
sr32(CM_L3INIT_USBPHY_CLKCTRL, 0, 32, 0x301);
 }
 
+void omap4_do_scale_tps62361(u32 reg, u32 volt_mv)
+{
+   u32 temp, step;
+
+   step = volt_mv - TPS62361_BASE_VOLT_MV;
+   step /= 10;
+
+   temp = TPS62361_I2C_SLAVE_ADDR |
+   (reg  OMAP44XX_PRM_VC_VAL_BYPASS_REGADDR_SHIFT) |
+   (step  OMAP44XX_PRM_VC_VAL_BYPASS_DATA_SHIFT) |
+   OMAP44XX_PRM_VC_VAL_BYPASS_VALID_BIT;
+   debug(do_scale_tps62361: volt - %d step - 0x%x\n, volt_mv, step);
+
+   writel(temp, OMAP44XX_PRM_VC_VAL_BYPASS);
+   if (!wait_on_value(OMAP44XX_PRM_VC_VAL_BYPASS_VALID_BIT, 0,
+   OMAP44XX_PRM_VC_VAL_BYPASS, LDELAY))
+   puts(Scaling voltage failed for vdd_mpu from TPS\n);
+}
diff --git a/arch/arm/mach-omap/omap4_generic.c 
b/arch/arm/mach-omap/omap4_generic.c
index de69934..07aa2b4 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -7,6 +7,7 @@
 #include mach/syslib.h
 #include mach/xload.h
 #include mach/gpmc.h
+#include mach/gpio.h
 
 /*
  *  The following several lines are taken from U-Boot to support
@@ -466,7 +467,7 @@ enum omap_boot_src omap4_bootsrc(void)
 
 #define I2C_SLAVE 0x12
 
-noinline int omap4_scale_vcores(void)
+noinline int omap4_scale_vcores(unsigned vsel0_pin)
 {
unsigned int rev = omap4_revision

[PATCH 0/3] nand: autodetect buswith

2012-07-24 Thread Jan Weitzel
Add flag NAND_BUSWIDTH_UNKNOWN to allow the nand driver to detect the buswidth.
Driver must provide callback set_buswidth which configure buswidth set in
(struct nand_chip) nand-options

Jan Weitzel (3):
  nand: base: Add autodetect buswidth
  OMAP GPMC NAND: add set_buswidth callback
  PCA-A_XL2 PCM049: Use autodetection for NAND width

 arch/arm/boards/pcm049/board.c|4 +-
 arch/arm/boards/phycard-a-xl2/pca-a-xl2.c |3 +-
 arch/arm/mach-omap/devices-gpmc-nand.c|8 ++---
 arch/arm/mach-omap/gpmc.c |   19 
 arch/arm/mach-omap/include/mach/gpmc.h|8 +
 drivers/mtd/nand/nand_base.c  |   45 ++--
 drivers/mtd/nand/nand_omap_gpmc.c |   43 ---
 include/linux/mtd/nand.h  |4 ++
 8 files changed, 117 insertions(+), 17 deletions(-)


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[PATCH 3/3] PCA-A_XL2 PCM049: Use autodetection for NAND width

2012-07-24 Thread Jan Weitzel

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/boards/pcm049/board.c|4 ++--
 arch/arm/boards/phycard-a-xl2/pca-a-xl2.c |3 ++-
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
index 8718d2b..006e924 100644
--- a/arch/arm/boards/pcm049/board.c
+++ b/arch/arm/boards/pcm049/board.c
@@ -111,9 +111,9 @@ static int pcm049_devices_init(void)
 
pcm049_network_init();
 
-   gpmc_generic_nand_devices_init(0, 8,
+   /* Autodetect buswidth */
+   gpmc_generic_nand_devices_init(0, 0,
OMAP_ECC_BCH8_CODE_HW, omap4_nand_cfg);
-
 #ifdef CONFIG_PARTITION
devfs_add_partition(nand0, 0x0, SZ_128K, PARTITION_FIXED, 
xload_raw);
dev_add_bb_dev(xload_raw, xload);
diff --git a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c 
b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
index 9bbb054..f246f86 100644
--- a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
+++ b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
@@ -124,7 +124,8 @@ static int pcaaxl2_devices_init(void)
 
pcaaxl2_network_init();
 
-   gpmc_generic_nand_devices_init(0, 16,
+   /* Autodetect buswidth */
+   gpmc_generic_nand_devices_init(0, 0,
OMAP_ECC_BCH8_CODE_HW, omap4_nand_cfg);
 
 #ifdef CONFIG_PARTITION
-- 
1.7.0.4


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[PATCH 1/3] nand: base: Add autodetect buswidth

2012-07-24 Thread Jan Weitzel
If a 16bit NAND is attached, but configured with 8bit nand_base will fail.
Add a flag NAND_BUSWIDTH_UNKNOWN and callback set_buswidth to allow it to
change the configuration to 16bit.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 drivers/mtd/nand/nand_base.c |   45 ++---
 include/linux/mtd/nand.h |4 +++
 2 files changed, 45 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index c4eca0d..055c710 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -1027,6 +1027,23 @@ static void nand_set_defaults(struct nand_chip *chip, 
int busw)
 }
 
 /*
+ * Override defaults with 16 bit ones
+ */
+static void nand_set_defaults16(struct nand_chip *chip)
+{
+   if (chip-read_byte == nand_read_byte)
+   chip-read_byte = nand_read_byte16;
+#ifdef CONFIG_MTD_WRITE
+   if (chip-write_buf == nand_write_buf)
+   chip-write_buf = nand_write_buf16;
+#endif
+   if (chip-read_buf == nand_read_buf)
+   chip-read_buf = nand_read_buf16;
+   if (chip-verify_buf == nand_verify_buf)
+   chip-verify_buf = nand_verify_buf16;
+}
+
+/*
  * Get the flash and manufacturer id and lookup if the type is supported
  */
 static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
@@ -1128,9 +1145,12 @@ static struct nand_flash_dev *nand_get_flash_type(struct 
mtd_info *mtd,
 
/*
 * Check, if buswidth is correct. Hardware drivers should set
-* chip correct !
+* chip correct or ask for autodetection!
 */
-   if (busw != (chip-options  NAND_BUSWIDTH_16)) {
+   if (chip-options  NAND_BUSWIDTH_UNKNOWN) {
+   printk(KERN_INFO NAND bus width %d bit detected\n,
+  (type-options  NAND_BUSWIDTH_16) ? 16 : 8);
+   } else if (busw != (chip-options  NAND_BUSWIDTH_16)) {
printk(KERN_INFO NAND device: Manufacturer ID:
0x%02x, Chip ID: 0x%02x (%s %s)\n, *maf_id,
   dev_id, nand_manuf_ids[maf_idx].name, mtd-name);
@@ -1202,8 +1222,18 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips)
struct nand_chip *chip = mtd-priv;
struct nand_flash_dev *type;
 
-   /* Get buswidth to select the correct functions */
-   busw = chip-options  NAND_BUSWIDTH_16;
+   if (chip-options  NAND_BUSWIDTH_UNKNOWN) {
+   if (!chip-set_buswidth) {
+   chip-options = ~NAND_BUSWIDTH_UNKNOWN;
+   printk(KERN_WARNING Buswidth unknown, but no callback 
to fix it.\n);
+   }
+   /* Detect NAND with 8bit buswidth*/
+   busw = 0;
+   } else {
+   /* Get buswidth to select the correct functions */
+   busw = chip-options  NAND_BUSWIDTH_16;
+   }
+
/* Set the default functions */
nand_set_defaults(chip, busw);
 
@@ -1216,6 +1246,13 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips)
return PTR_ERR(type);
}
 
+   if (chip-options  NAND_BUSWIDTH_UNKNOWN) {
+   chip-set_buswidth(mtd, chip);
+   if (chip-options  NAND_BUSWIDTH_16)
+   /* Change buswidth to 16 bit*/
+   nand_set_defaults16(chip);
+   }
+
/* Check for a chip array */
for (i = 1; i  maxchips; i++) {
chip-select_chip(mtd, i);
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 8e20876..184fc69 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -192,6 +192,8 @@ typedef enum {
 /* This option is defined if the board driver allocates its own buffers
(e.g. because it needs them DMA-coherent */
 #define NAND_OWN_BUFFERS   0x0004
+/* Buswitdh is currently unknown */
+#define NAND_BUSWIDTH_UNKNOWN  0x0008
 /* Options set by nand scan */
 /* Nand scan has allocated controller struct */
 #define NAND_CONTROLLER_ALLOC  0x8000
@@ -358,6 +360,7 @@ struct nand_buffers {
  * @errstat:   [OPTIONAL] hardware specific function to perform 
additional error status checks
  * (determine if errors are correctable)
  * @write_page:[REPLACEABLE] High-level page write function
+ * @set_buswidth:  [BOARDSPECIFIC] hardware specific function to configure 
buswidth
  */
 struct nand_chip {
 
@@ -382,6 +385,7 @@ struct nand_chip {
int (*errstat)(struct mtd_info *mtd, struct nand_chip 
*this, int state, int status, int page);
int (*write_page)(struct mtd_info *mtd, struct nand_chip 
*chip,
  const uint8_t *buf, int page, int cached, 
int raw);
+   int (*set_buswidth)(struct mtd_info *mtd, struct nand_chip 
*this);
 
int chip_delay;
unsigned intoptions;
-- 
1.7.0.4

[PATCH 1/3 v2] OMAP GPMC NAND: use buswidth from GPMC

2012-07-19 Thread Jan Weitzel
GPMC could be already configured by xloader or rom bootloader
Use the configured buswidth (width == 0) or set it explicit in the board file.
If gpmc register isn't configured for NAND, fallback to 8bit by gpmc reset
state.

Use autodetect on pcm049

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v2: Update commit message

 arch/arm/boards/pcm049/board.c |4 ++--
 arch/arm/mach-omap/devices-gpmc-nand.c |   23 ++-
 arch/arm/mach-omap/gpmc.c  |   19 +++
 arch/arm/mach-omap/include/mach/gpmc.h |8 
 4 files changed, 47 insertions(+), 7 deletions(-)

diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
index 3a2b574..4f056e0 100644
--- a/arch/arm/boards/pcm049/board.c
+++ b/arch/arm/boards/pcm049/board.c
@@ -112,9 +112,9 @@ static int pcm049_devices_init(void)
 
pcm049_network_init();
 
-   gpmc_generic_nand_devices_init(0, 8,
+   /* Autodetect buswidth*/
+   gpmc_generic_nand_devices_init(0, 0,
OMAP_ECC_BCH8_CODE_HW, omap4_nand_cfg);
-
 #ifdef CONFIG_PARTITION
devfs_add_partition(nand0, 0x0, SZ_128K,
DEVFS_PARTITION_FIXED, xload_raw);
diff --git a/arch/arm/mach-omap/devices-gpmc-nand.c 
b/arch/arm/mach-omap/devices-gpmc-nand.c
index cf87b57..06f9576 100644
--- a/arch/arm/mach-omap/devices-gpmc-nand.c
+++ b/arch/arm/mach-omap/devices-gpmc-nand.c
@@ -35,9 +35,7 @@
 #include mach/silicon.h
 #include mach/gpmc.h
 #include mach/gpmc_nand.h
-
-#define GPMC_CONF1_VALx8   0x0800
-#define GPMC_CONF1_VALx16  0x1800
+#include mach/xload.h
 
 /** NAND platform specific settings settings */
 static struct gpmc_nand_platform_data nand_plat = {
@@ -51,15 +49,30 @@ static struct gpmc_nand_platform_data nand_plat = {
  *
  * @return success/fail based on device function
  */
+
 int gpmc_generic_nand_devices_init(int cs, int width,
enum gpmc_ecc_mode eccmode, struct gpmc_config *nand_cfg)
 {
nand_plat.cs = cs;
 
+   if (width == 0) {
+   struct gpmc_config cfg;
+   /* try to get buswidth from gpmc */
+   gpmc_get_config(cs, cfg);
+   width = (cfg.cfg[0]  GPMC_CONFIG1_DEVICETYPE_NAND) ? 16 : 8;
+
+   if (!(cfg.cfg[0]  GPMC_CONFIG1_DEVICETYPE_NAND))
+   debug(GPMC not configured for NAND, 
+   try width %d bit\n, width);
+
+   debug(%s cfg0 %x width %d\n, __func__, cfg.cfg[0], width);
+   }
+
if (width == 16)
-   nand_cfg-cfg[0] = GPMC_CONF1_VALx16;
+   nand_cfg-cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND |
+   GPMC_CONFIG1_DEVICESIZE_16;
else
-   nand_cfg-cfg[0] = GPMC_CONF1_VALx8;
+   nand_cfg-cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND;
 
nand_plat.device_width = width;
nand_plat.ecc_mode = eccmode;
diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
index e8946d7..399f68a 100644
--- a/arch/arm/mach-omap/gpmc.c
+++ b/arch/arm/mach-omap/gpmc.c
@@ -115,3 +115,22 @@ void gpmc_cs_config(char cs, struct gpmc_config *config)
mdelay(1);  /* Settling time */
 }
 EXPORT_SYMBOL(gpmc_cs_config);
+
+void gpmc_get_config(char cs, struct gpmc_config *config)
+{
+   unsigned int reg = GPMC_REG(CONFIG1_0) + (cs * GPMC_CONFIG_CS_SIZE);
+   unsigned int cfg7;
+   unsigned char i;
+
+   /* Read the CFG1-6 regs */
+   for (i = 0; i  6; i++) {
+   config-cfg[i] = readl(reg);
+   reg += GPMC_CONFIG_REG_OFF;
+   }
+
+   cfg7 = readl(reg);
+
+   config-size = (cfg7  8)  0xf;
+   config-base = (cfg7  0x3F)  24;
+}
+EXPORT_SYMBOL(gpmc_get_config);
diff --git a/arch/arm/mach-omap/include/mach/gpmc.h 
b/arch/arm/mach-omap/include/mach/gpmc.h
index 3ddc5f5..84260fc 100644
--- a/arch/arm/mach-omap/include/mach/gpmc.h
+++ b/arch/arm/mach-omap/include/mach/gpmc.h
@@ -140,6 +140,11 @@
 
 #define NAND_WP_BIT0x0010
 
+#define GPMC_CONFIG1_DEVICESIZE(val)   ((val  3)  12)
+#define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1)
+#define GPMC_CONFIG1_DEVICETYPE(val)   ((val  3)  10)
+#define GPMC_CONFIG1_DEVICETYPE_NAND   GPMC_CONFIG1_DEVICETYPE(2)
+
 #ifndef __ASSEMBLY__
 
 /** Generic GPMC configuration structure to be used to configure a
@@ -157,6 +162,9 @@ void gpmc_generic_init(unsigned int cfg);
 /** Configuration for a specific chip select */
 void gpmc_cs_config(char cs, struct gpmc_config *config);
 
+/** Get Configuration for a specific chip select */
+void gpmc_get_config(char cs, struct gpmc_config *config);
+
 #endif
 
 #endif /* __ASM_ARCH_OMAP_GPMC_H */
-- 
1.7.0.4


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[PATCH 2/3 v2] gpmc: Add reset to gpmc_generic_init

2012-07-19 Thread Jan Weitzel
Add reset to gpmc_generic_init as proposed by TRM.
This also fixes some strange timing issue while GPMC Initialization for
NAND OMAP4460

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v2: fix timeout endless loop

 arch/arm/mach-omap/gpmc.c |   12 +++-
 1 files changed, 11 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
index 399f68a..b3fa56c 100644
--- a/arch/arm/mach-omap/gpmc.c
+++ b/arch/arm/mach-omap/gpmc.c
@@ -28,6 +28,7 @@
  * MA 02111-1307 USA
  */
 #include common.h
+#include clock.h
 #include init.h
 #include io.h
 #include mach/silicon.h
@@ -48,13 +49,22 @@
  */
 void gpmc_generic_init(unsigned int cfg)
 {
+   uint64_t start;
unsigned int reg = GPMC_REG(CONFIG7_0);
char x = 0;
 
debug(gpmccfg=%x\n, cfg);
/* Generic Configurations */
+   /* reset gpmc */
+   start = get_time_ns();
/* No idle, L3 clock free running */
-   writel(0x10, GPMC_REG(SYS_CONFIG));
+   writel(0x12, GPMC_REG(SYS_CONFIG));
+   while (!readl(GPMC_REG(SYS_STATUS)))
+   if (is_timeout(start, MSECOND)) {
+   printf(timeout on gpmc reset\n);
+   break;
+   }
+
/* No Timeout */
writel(0x00, GPMC_REG(TIMEOUT_CONTROL));
/* No IRQs */
-- 
1.7.0.4


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Re: [PATCH 1/3] OMAP GPMC NAND: use buswidth from GPMC

2012-07-19 Thread Jan Weitzel
Am Donnerstag, den 19.07.2012, 00:11 +0200 schrieb Sascha Hauer:
 Hi Jan,
 
 On Wed, Jul 18, 2012 at 02:37:11PM +0200, Jan Weitzel wrote:
  GPMC could be already configured by xloader or rom bootloader
  Use the configured buswidth (width == 0) or set it explicit in the board 
  file.
 
 What happens if it hasn't been configured by the ROM or xloader, for
 example when booting from MMC?
It will fall back to 8bit (GPMC register reset state). Have added this
to the commit message.
Booting from MMC is a problem for xloader and boards with 16bit NANDS.
We see the wrong buswidth in nand_base.c try to fix it after return to
gpmc_nand_probe. See the RFC mtd omap nand: reconfigure buswidth.
Did you see a better way?

Jan
 Sascha
 
  
  Use autodetect on pcm049
  
  Signed-off-by: Jan Weitzel j.weit...@phytec.de
  ---
   arch/arm/boards/pcm049/board.c |4 ++--
   arch/arm/mach-omap/devices-gpmc-nand.c |   23 ++-
   arch/arm/mach-omap/gpmc.c  |   19 +++
   arch/arm/mach-omap/include/mach/gpmc.h |8 
   4 files changed, 47 insertions(+), 7 deletions(-)
  
  diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
  index 3a2b574..4f056e0 100644
  --- a/arch/arm/boards/pcm049/board.c
  +++ b/arch/arm/boards/pcm049/board.c
  @@ -112,9 +112,9 @@ static int pcm049_devices_init(void)
   
  pcm049_network_init();
   
  -   gpmc_generic_nand_devices_init(0, 8,
  +   /* Autodetect buswidth*/
  +   gpmc_generic_nand_devices_init(0, 0,
  OMAP_ECC_BCH8_CODE_HW, omap4_nand_cfg);
  -
   #ifdef CONFIG_PARTITION
  devfs_add_partition(nand0, 0x0, SZ_128K,
  DEVFS_PARTITION_FIXED, xload_raw);
  diff --git a/arch/arm/mach-omap/devices-gpmc-nand.c 
  b/arch/arm/mach-omap/devices-gpmc-nand.c
  index cf87b57..06f9576 100644
  --- a/arch/arm/mach-omap/devices-gpmc-nand.c
  +++ b/arch/arm/mach-omap/devices-gpmc-nand.c
  @@ -35,9 +35,7 @@
   #include mach/silicon.h
   #include mach/gpmc.h
   #include mach/gpmc_nand.h
  -
  -#define GPMC_CONF1_VALx8   0x0800
  -#define GPMC_CONF1_VALx16  0x1800
  +#include mach/xload.h
   
   /** NAND platform specific settings settings */
   static struct gpmc_nand_platform_data nand_plat = {
  @@ -51,15 +49,30 @@ static struct gpmc_nand_platform_data nand_plat = {
*
* @return success/fail based on device function
*/
  +
   int gpmc_generic_nand_devices_init(int cs, int width,
  enum gpmc_ecc_mode eccmode, struct gpmc_config *nand_cfg)
   {
  nand_plat.cs = cs;
   
  +   if (width == 0) {
  +   struct gpmc_config cfg;
  +   /* try to get buswidth from gpmc */
  +   gpmc_get_config(cs, cfg);
  +   width = (cfg.cfg[0]  GPMC_CONFIG1_DEVICETYPE_NAND) ? 16 : 8;
  +
  +   if (!(cfg.cfg[0]  GPMC_CONFIG1_DEVICETYPE_NAND))
  +   debug(GPMC not configured for NAND, 
  +   try width %d bit\n, width);
  +
  +   debug(%s cfg0 %x width %d\n, __func__, cfg.cfg[0], width);
  +   }
  +
  if (width == 16)
  -   nand_cfg-cfg[0] = GPMC_CONF1_VALx16;
  +   nand_cfg-cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND |
  +   GPMC_CONFIG1_DEVICESIZE_16;
  else
  -   nand_cfg-cfg[0] = GPMC_CONF1_VALx8;
  +   nand_cfg-cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND;
   
  nand_plat.device_width = width;
  nand_plat.ecc_mode = eccmode;
  diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
  index e8946d7..399f68a 100644
  --- a/arch/arm/mach-omap/gpmc.c
  +++ b/arch/arm/mach-omap/gpmc.c
  @@ -115,3 +115,22 @@ void gpmc_cs_config(char cs, struct gpmc_config 
  *config)
  mdelay(1);  /* Settling time */
   }
   EXPORT_SYMBOL(gpmc_cs_config);
  +
  +void gpmc_get_config(char cs, struct gpmc_config *config)
  +{
  +   unsigned int reg = GPMC_REG(CONFIG1_0) + (cs * GPMC_CONFIG_CS_SIZE);
  +   unsigned int cfg7;
  +   unsigned char i;
  +
  +   /* Read the CFG1-6 regs */
  +   for (i = 0; i  6; i++) {
  +   config-cfg[i] = readl(reg);
  +   reg += GPMC_CONFIG_REG_OFF;
  +   }
  +
  +   cfg7 = readl(reg);
  +
  +   config-size = (cfg7  8)  0xf;
  +   config-base = (cfg7  0x3F)  24;
  +}
  +EXPORT_SYMBOL(gpmc_get_config);
  diff --git a/arch/arm/mach-omap/include/mach/gpmc.h 
  b/arch/arm/mach-omap/include/mach/gpmc.h
  index 3ddc5f5..84260fc 100644
  --- a/arch/arm/mach-omap/include/mach/gpmc.h
  +++ b/arch/arm/mach-omap/include/mach/gpmc.h
  @@ -140,6 +140,11 @@
   
   #define NAND_WP_BIT0x0010
   
  +#define GPMC_CONFIG1_DEVICESIZE(val)   ((val  3)  12)
  +#define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1)
  +#define GPMC_CONFIG1_DEVICETYPE(val)   ((val  3)  10)
  +#define GPMC_CONFIG1_DEVICETYPE_NAND   GPMC_CONFIG1_DEVICETYPE(2)
  +
   #ifndef __ASSEMBLY__
   
   /** Generic GPMC configuration structure to be used

[PATCH 1/3] OMAP GPMC NAND: use buswidth from GPMC

2012-07-18 Thread Jan Weitzel
GPMC could be already configured by xloader or rom bootloader
Use the configured buswidth (width == 0) or set it explicit in the board file.

Use autodetect on pcm049

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/boards/pcm049/board.c |4 ++--
 arch/arm/mach-omap/devices-gpmc-nand.c |   23 ++-
 arch/arm/mach-omap/gpmc.c  |   19 +++
 arch/arm/mach-omap/include/mach/gpmc.h |8 
 4 files changed, 47 insertions(+), 7 deletions(-)

diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
index 3a2b574..4f056e0 100644
--- a/arch/arm/boards/pcm049/board.c
+++ b/arch/arm/boards/pcm049/board.c
@@ -112,9 +112,9 @@ static int pcm049_devices_init(void)
 
pcm049_network_init();
 
-   gpmc_generic_nand_devices_init(0, 8,
+   /* Autodetect buswidth*/
+   gpmc_generic_nand_devices_init(0, 0,
OMAP_ECC_BCH8_CODE_HW, omap4_nand_cfg);
-
 #ifdef CONFIG_PARTITION
devfs_add_partition(nand0, 0x0, SZ_128K,
DEVFS_PARTITION_FIXED, xload_raw);
diff --git a/arch/arm/mach-omap/devices-gpmc-nand.c 
b/arch/arm/mach-omap/devices-gpmc-nand.c
index cf87b57..06f9576 100644
--- a/arch/arm/mach-omap/devices-gpmc-nand.c
+++ b/arch/arm/mach-omap/devices-gpmc-nand.c
@@ -35,9 +35,7 @@
 #include mach/silicon.h
 #include mach/gpmc.h
 #include mach/gpmc_nand.h
-
-#define GPMC_CONF1_VALx8   0x0800
-#define GPMC_CONF1_VALx16  0x1800
+#include mach/xload.h
 
 /** NAND platform specific settings settings */
 static struct gpmc_nand_platform_data nand_plat = {
@@ -51,15 +49,30 @@ static struct gpmc_nand_platform_data nand_plat = {
  *
  * @return success/fail based on device function
  */
+
 int gpmc_generic_nand_devices_init(int cs, int width,
enum gpmc_ecc_mode eccmode, struct gpmc_config *nand_cfg)
 {
nand_plat.cs = cs;
 
+   if (width == 0) {
+   struct gpmc_config cfg;
+   /* try to get buswidth from gpmc */
+   gpmc_get_config(cs, cfg);
+   width = (cfg.cfg[0]  GPMC_CONFIG1_DEVICETYPE_NAND) ? 16 : 8;
+
+   if (!(cfg.cfg[0]  GPMC_CONFIG1_DEVICETYPE_NAND))
+   debug(GPMC not configured for NAND, 
+   try width %d bit\n, width);
+
+   debug(%s cfg0 %x width %d\n, __func__, cfg.cfg[0], width);
+   }
+
if (width == 16)
-   nand_cfg-cfg[0] = GPMC_CONF1_VALx16;
+   nand_cfg-cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND |
+   GPMC_CONFIG1_DEVICESIZE_16;
else
-   nand_cfg-cfg[0] = GPMC_CONF1_VALx8;
+   nand_cfg-cfg[0] = GPMC_CONFIG1_DEVICETYPE_NAND;
 
nand_plat.device_width = width;
nand_plat.ecc_mode = eccmode;
diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
index e8946d7..399f68a 100644
--- a/arch/arm/mach-omap/gpmc.c
+++ b/arch/arm/mach-omap/gpmc.c
@@ -115,3 +115,22 @@ void gpmc_cs_config(char cs, struct gpmc_config *config)
mdelay(1);  /* Settling time */
 }
 EXPORT_SYMBOL(gpmc_cs_config);
+
+void gpmc_get_config(char cs, struct gpmc_config *config)
+{
+   unsigned int reg = GPMC_REG(CONFIG1_0) + (cs * GPMC_CONFIG_CS_SIZE);
+   unsigned int cfg7;
+   unsigned char i;
+
+   /* Read the CFG1-6 regs */
+   for (i = 0; i  6; i++) {
+   config-cfg[i] = readl(reg);
+   reg += GPMC_CONFIG_REG_OFF;
+   }
+
+   cfg7 = readl(reg);
+
+   config-size = (cfg7  8)  0xf;
+   config-base = (cfg7  0x3F)  24;
+}
+EXPORT_SYMBOL(gpmc_get_config);
diff --git a/arch/arm/mach-omap/include/mach/gpmc.h 
b/arch/arm/mach-omap/include/mach/gpmc.h
index 3ddc5f5..84260fc 100644
--- a/arch/arm/mach-omap/include/mach/gpmc.h
+++ b/arch/arm/mach-omap/include/mach/gpmc.h
@@ -140,6 +140,11 @@
 
 #define NAND_WP_BIT0x0010
 
+#define GPMC_CONFIG1_DEVICESIZE(val)   ((val  3)  12)
+#define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1)
+#define GPMC_CONFIG1_DEVICETYPE(val)   ((val  3)  10)
+#define GPMC_CONFIG1_DEVICETYPE_NAND   GPMC_CONFIG1_DEVICETYPE(2)
+
 #ifndef __ASSEMBLY__
 
 /** Generic GPMC configuration structure to be used to configure a
@@ -157,6 +162,9 @@ void gpmc_generic_init(unsigned int cfg);
 /** Configuration for a specific chip select */
 void gpmc_cs_config(char cs, struct gpmc_config *config);
 
+/** Get Configuration for a specific chip select */
+void gpmc_get_config(char cs, struct gpmc_config *config);
+
 #endif
 
 #endif /* __ASM_ARCH_OMAP_GPMC_H */
-- 
1.7.0.4


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[PATCH 2/3] gpmc: Add reset to gpmc_generic_init

2012-07-18 Thread Jan Weitzel
Add reset to gpmc_generic_init as proposed by TRM.
This also fixes some strange timing issue while GPMC Initialization for
NAND OMAP4460

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/mach-omap/gpmc.c |   10 +-
 1 files changed, 9 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-omap/gpmc.c b/arch/arm/mach-omap/gpmc.c
index 399f68a..4649a1d 100644
--- a/arch/arm/mach-omap/gpmc.c
+++ b/arch/arm/mach-omap/gpmc.c
@@ -28,6 +28,7 @@
  * MA 02111-1307 USA
  */
 #include common.h
+#include clock.h
 #include init.h
 #include io.h
 #include mach/silicon.h
@@ -48,13 +49,20 @@
  */
 void gpmc_generic_init(unsigned int cfg)
 {
+   uint64_t start;
unsigned int reg = GPMC_REG(CONFIG7_0);
char x = 0;
 
debug(gpmccfg=%x\n, cfg);
/* Generic Configurations */
+   /* reset gpmc */
+   start = get_time_ns();
/* No idle, L3 clock free running */
-   writel(0x10, GPMC_REG(SYS_CONFIG));
+   writel(0x12, GPMC_REG(SYS_CONFIG));
+   while (!readl(GPMC_REG(SYS_STATUS)))
+   if (is_timeout(start, MSECOND))
+   printf(timeout on gpmc reset\n);
+
/* No Timeout */
writel(0x00, GPMC_REG(TIMEOUT_CONTROL));
/* No IRQs */
-- 
1.7.0.4


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[RFC] ramfs: rember last accessed chunk

2012-05-15 Thread Jan Weitzel
Writing big files takes longer and longer because of the chunk list
By storing a pointer of the recent used chunk in the inode, access times are
improved.
Testet on with tftp 10M:
OMAP4 chunk size 4096: 12244ms 8192: 4239ms
patched2647ms2785ms
i.MX35 chunk size 8192: 7225ms
patched 2691ms

No impact on much smaller files seen

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 fs/ramfs.c |   46 --
 1 files changed, 36 insertions(+), 10 deletions(-)

diff --git a/fs/ramfs.c b/fs/ramfs.c
index 83ab6df..5c7410b 100644
--- a/fs/ramfs.c
+++ b/fs/ramfs.c
@@ -48,6 +48,10 @@ struct ramfs_inode {
 
ulong size;
struct ramfs_chunk *data;
+   
+   /* Points to recently used chunk */
+   int recent_chunk;
+   struct ramfs_chunk *recent_chunkp;
 };
 
 struct ramfs_priv {
@@ -297,6 +301,34 @@ static int ramfs_close(struct device_d *dev, FILE *f)
return 0;
 }
 
+static struct ramfs_chunk *ramfs_find_chunk(struct ramfs_inode *node, int 
chunk)
+{
+   struct ramfs_chunk *data;
+   int left = chunk;
+
+   if (chunk == 0)
+   return node-data;
+
+   if (node-recent_chunk == chunk)
+   return node-recent_chunkp;
+
+   if (node-recent_chunk  chunk  node-recent_chunk != 0) {
+   /* Start at last known chunk */
+   data = node-recent_chunkp;
+   left -= node-recent_chunk;
+   } else
+   /* Start at first chunk */
+   data = node-data;
+
+   while (left--)
+   data = data-next;
+
+   node-recent_chunkp = data;
+   node-recent_chunk = chunk;
+
+   return data;
+}
+
 static int ramfs_read(struct device_d *_dev, FILE *f, void *buf, size_t insize)
 {
struct ramfs_inode *node = (struct ramfs_inode *)f-inode;
@@ -311,11 +343,7 @@ static int ramfs_read(struct device_d *_dev, FILE *f, void 
*buf, size_t insize)
debug(%s: reading from chunk %d\n, __FUNCTION__, chunk);
 
/* Position ourself in stream */
-   data = node-data;
-   while (chunk) {
-   data = data-next;
-   chunk--;
-   }
+   data = ramfs_find_chunk(node, chunk);
ofs = f-pos % CHUNK_SIZE;
 
/* Read till end of current chunk */
@@ -364,11 +392,7 @@ static int ramfs_write(struct device_d *_dev, FILE *f, 
const void *buf, size_t i
debug(%s: writing to chunk %d\n, __FUNCTION__, chunk);
 
/* Position ourself in stream */
-   data = node-data;
-   while (chunk) {
-   data = data-next;
-   chunk--;
-   }
+   data = ramfs_find_chunk(node, chunk);
ofs = f-pos % CHUNK_SIZE;
 
/* Write till end of current chunk */
@@ -429,6 +453,8 @@ static int ramfs_truncate(struct device_d *dev, FILE *f, 
ulong size)
ramfs_put_chunk(data);
data = tmp;
}
+   if (node-recent_chunk  newchunks) 
+   node-recent_chunk = 0;
}
 
if (newchunks  oldchunks) {
-- 
1.7.0.4


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[PATCH v2] omap: add support for phycard-a-xl2

2012-03-12 Thread Jan Weitzel
Support for omap4 based Phytec phyCARD-A-XL2 board

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v2: remove kernelimage_type from env
use CONFIG_THUMB2_BAREBOX for MLO
move noinline keyword between storage class and type

 arch/arm/Makefile  |1 +
 arch/arm/boards/phycard-a-xl2/Makefile |   20 ++
 arch/arm/boards/phycard-a-xl2/config.h |1 +
 .../boards/phycard-a-xl2/env/bin/nand_bootstrap|   31 +++
 arch/arm/boards/phycard-a-xl2/env/config   |   47 
 arch/arm/boards/phycard-a-xl2/lowlevel.c   |   95 
 arch/arm/boards/phycard-a-xl2/mux.c|  245 
 arch/arm/boards/phycard-a-xl2/pca-a-xl2.c  |  147 
 arch/arm/configs/phycard_a_xl2_defconfig   |   56 +
 arch/arm/configs/phycard_a_xl2_xload_defconfig |   41 
 arch/arm/mach-omap/Kconfig |   10 +
 11 files changed, 694 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boards/phycard-a-xl2/Makefile
 create mode 100644 arch/arm/boards/phycard-a-xl2/config.h
 create mode 100644 arch/arm/boards/phycard-a-xl2/env/bin/nand_bootstrap
 create mode 100644 arch/arm/boards/phycard-a-xl2/env/config
 create mode 100644 arch/arm/boards/phycard-a-xl2/lowlevel.c
 create mode 100644 arch/arm/boards/phycard-a-xl2/mux.c
 create mode 100644 arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
 create mode 100644 arch/arm/configs/phycard_a_xl2_defconfig
 create mode 100644 arch/arm/configs/phycard_a_xl2_xload_defconfig

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 4c6a566..bf46ca3 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -102,6 +102,7 @@ board-$(CONFIG_MACH_PANDA)  := panda
 board-$(CONFIG_MACH_PCM049):= pcm049
 board-$(CONFIG_MACH_PCA100):= phycard-i.MX27
 board-$(CONFIG_MACH_PCAAL1):= phycard-a-l1
+board-$(CONFIG_MACH_PCAAXL2)   := phycard-a-xl2
 board-$(CONFIG_MACH_PCM037):= pcm037
 board-$(CONFIG_MACH_PCM038):= pcm038
 board-$(CONFIG_MACH_PCM043):= pcm043
diff --git a/arch/arm/boards/phycard-a-xl2/Makefile 
b/arch/arm/boards/phycard-a-xl2/Makefile
new file mode 100644
index 000..1d23d72
--- /dev/null
+++ b/arch/arm/boards/phycard-a-xl2/Makefile
@@ -0,0 +1,20 @@
+# (C) Copyright 2012 Jan Weitzel j.weit...@phytec.de
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+obj-y += pca-a-xl2.o mux.o lowlevel.o
diff --git a/arch/arm/boards/phycard-a-xl2/config.h 
b/arch/arm/boards/phycard-a-xl2/config.h
new file mode 100644
index 000..da84fa5
--- /dev/null
+++ b/arch/arm/boards/phycard-a-xl2/config.h
@@ -0,0 +1 @@
+/* nothing */
diff --git a/arch/arm/boards/phycard-a-xl2/env/bin/nand_bootstrap 
b/arch/arm/boards/phycard-a-xl2/env/bin/nand_bootstrap
new file mode 100644
index 000..acd00dc
--- /dev/null
+++ b/arch/arm/boards/phycard-a-xl2/env/bin/nand_bootstrap
@@ -0,0 +1,31 @@
+
+echo copying barebox to nand...
+
+mci0.probe=1
+mkdir mnt
+
+mount /dev/disk0.0 fat /mnt
+if [ $? != 0 ]; then
+   echo failed to mount mmc card
+   exit 1
+fi
+
+if [ ! -f /mnt/mlo-nand.bin ]; then
+   echo mlo-nand.bin not found on mmc card
+   exit 1
+fi
+
+if [ ! -f /mnt/barebox.bin ]; then
+   echo barebox.bin not found on mmc card
+fi
+
+gpmc_nand0.eccmode=bch8_hw_romcode
+erase /dev/nand0.xload.bb
+cp /mnt/mlo-nand.bin /dev/nand0.xload.bb
+
+gpmc_nand0.eccmode=bch8_hw
+erase /dev/nand0.barebox.bb
+cp /mnt/barebox.bin /dev/nand0.barebox.bb
+
+echo success
+
diff --git a/arch/arm/boards/phycard-a-xl2/env/config 
b/arch/arm/boards/phycard-a-xl2/env/config
new file mode 100644
index 000..0cbfb16
--- /dev/null
+++ b/arch/arm/boards/phycard-a-xl2/env/config
@@ -0,0 +1,47 @@
+#!/bin/sh
+
+machine=pcaaxl2
+user=
+
+# use 'dhcp' to do dhcp in barebox and in kernel
+# use 'none' if you want to skip kernel ip autoconfiguration
+ip=dhcp
+
+# or set your networking parameters here
+#eth0.ipaddr=a.b.c.d
+#eth0.netmask=a.b.c.d
+#eth0.gateway=a.b.c.d
+#eth0.serverip=a.b.c.d
+
+# can be either 'nfs', 'tftp', 'nor' or 'nand'
+kernel_loc=tftp
+# can be either 'net', 'nor', 'nand

[PATCH v2] NET: Add support for ks8851_mll

2012-03-12 Thread Jan Weitzel
Add support for KS8851 16bit MLL chip from Micrel Inc.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v2: use dev_* for messages

 drivers/base/resource.c  |   33 ++
 drivers/net/Kconfig  |7 +
 drivers/net/Makefile |1 +
 drivers/net/ks8851_mll.c |  892 ++
 include/driver.h |   11 +
 5 files changed, 944 insertions(+), 0 deletions(-)
 create mode 100644 drivers/net/ks8851_mll.c

diff --git a/drivers/base/resource.c b/drivers/base/resource.c
index d2f7a07..b31c7d7 100644
--- a/drivers/base/resource.c
+++ b/drivers/base/resource.c
@@ -121,3 +121,36 @@ struct device_d *add_usb_ehci_device(int id, 
resource_size_t hccr,
 }
 EXPORT_SYMBOL(add_usb_ehci_device);
 #endif
+
+#ifdef CONFIG_DRIVER_NET_KS8851_MLL
+struct device_d *add_ks8851_device(int id, resource_size_t addr,
+   resource_size_t addr_cmd, int flags, void *pdata)
+{
+   struct resource *res;
+   resource_size_t size;
+
+   switch (flags) {
+   case IORESOURCE_MEM_16BIT:
+   size = 2;
+   break;
+   case IORESOURCE_MEM_8BIT:
+   size = 1;
+   break;
+   default:
+   printf(ks8851: memory width flag missing\n);
+   return NULL;
+   }
+
+   res = xzalloc(sizeof(struct resource) * 2);
+
+   res[0].start = addr;
+   res[0].size = size;
+   res[0].flags = IORESOURCE_MEM | flags;
+   res[1].start = addr_cmd;
+   res[1].size = size;
+   res[1].flags = IORESOURCE_MEM | flags;
+
+   return add_generic_device_res(ks8851_mll, id, res, 2, pdata);
+}
+EXPORT_SYMBOL(add_ks8851_device);
+#endif
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index b236d17..4cdb37b 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -100,6 +100,13 @@ config TSE_USE_DEDICATED_DESC_MEM
  reserved with a malloc but directly mapped to the memory
  address (defined in config.h)
 
+config DRIVER_NET_KS8851_MLL
+   bool ks8851 mll ethernet driver
+   select MIIDEV
+   help
+ This option enables support for the Micrel KS8851 MLL
+ ethernet chip.
+
 source drivers/net/usb/Kconfig
 
 endmenu
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index a84d3dc..34dbee9 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -12,3 +12,4 @@ obj-$(CONFIG_DRIVER_NET_TAP)  += tap.o
 obj-$(CONFIG_MIIDEV)   += miidev.o
 obj-$(CONFIG_NET_USB)  += usb/
 obj-$(CONFIG_DRIVER_NET_TSE)   += altera_tse.o
+obj-$(CONFIG_DRIVER_NET_KS8851_MLL)+= ks8851_mll.o
diff --git a/drivers/net/ks8851_mll.c b/drivers/net/ks8851_mll.c
new file mode 100644
index 000..aaaf099
--- /dev/null
+++ b/drivers/net/ks8851_mll.c
@@ -0,0 +1,892 @@
+/**
+ * Copyright (c) 2012 Jan Weitzel j.weit...@phytec.de
+ * based on kernel driver drivers/net/ks8851_mll.c
+ * Copyright (c) 2009 Micrel Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/**
+ * Supports:
+ * KS8851 16bit MLL chip from Micrel Inc.
+ */
+#include common.h
+#include driver.h
+
+#include command.h
+#include net.h
+#include miidev.h
+#include malloc.h
+#include init.h
+#include xfuncs.h
+#include errno.h
+#include clock.h
+#include io.h
+
+#define MAX_RECV_FRAMES32
+#define MAX_BUF_SIZE   2048
+#define TX_BUF_SIZE2000
+#define RX_BUF_SIZE2000
+
+#define KS_CCR 0x08
+#define CCR_EEPROM (1  9)
+#define CCR_SPI(1  8)
+#define CCR_8BIT   (1  7)
+#define CCR_16BIT  (1  6)
+#define CCR_32BIT  (1  5)
+#define CCR_SHARED (1  4)
+#define CCR_32PIN  (1  0)
+
+/* MAC address registers */
+#define KS_MARL0x10
+#define KS_MARM0x12
+#define KS_MARH0x14
+
+#define KS_OBCR0x20
+#define OBCR_ODS_16MA  (1  6)
+
+#define KS_EEPCR   0x22
+#define EEPCR_EESA (1  4)
+#define EEPCR_EESB (1  3)
+#define EEPCR_EEDO (1  2)
+#define EEPCR_EESCK(1  1)
+#define EEPCR_EECS

[PATCH] omap: add support for phycard-a-xl2

2012-03-07 Thread Jan Weitzel
Support for omap4 based Phytec phyCARD-A-XL2 board

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
 arch/arm/Makefile  |1 +
 arch/arm/boards/phycard-a-xl2/Makefile |   20 ++
 arch/arm/boards/phycard-a-xl2/config.h |1 +
 .../boards/phycard-a-xl2/env/bin/nand_bootstrap|   31 +++
 arch/arm/boards/phycard-a-xl2/env/config   |   52 
 arch/arm/boards/phycard-a-xl2/lowlevel.c   |   95 
 arch/arm/boards/phycard-a-xl2/mux.c|  245 
 arch/arm/boards/phycard-a-xl2/pca-a-xl2.c  |  147 
 arch/arm/configs/phycard_a_xl2_defconfig   |   56 +
 arch/arm/configs/phycard_a_xl2_xload_defconfig |   40 
 arch/arm/mach-omap/Kconfig |   10 +
 11 files changed, 698 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boards/phycard-a-xl2/Makefile
 create mode 100644 arch/arm/boards/phycard-a-xl2/config.h
 create mode 100644 arch/arm/boards/phycard-a-xl2/env/bin/nand_bootstrap
 create mode 100644 arch/arm/boards/phycard-a-xl2/env/config
 create mode 100644 arch/arm/boards/phycard-a-xl2/lowlevel.c
 create mode 100644 arch/arm/boards/phycard-a-xl2/mux.c
 create mode 100644 arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
 create mode 100644 arch/arm/configs/phycard_a_xl2_defconfig
 create mode 100644 arch/arm/configs/phycard_a_xl2_xload_defconfig

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 4c6a566..bf46ca3 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -102,6 +102,7 @@ board-$(CONFIG_MACH_PANDA)  := panda
 board-$(CONFIG_MACH_PCM049):= pcm049
 board-$(CONFIG_MACH_PCA100):= phycard-i.MX27
 board-$(CONFIG_MACH_PCAAL1):= phycard-a-l1
+board-$(CONFIG_MACH_PCAAXL2)   := phycard-a-xl2
 board-$(CONFIG_MACH_PCM037):= pcm037
 board-$(CONFIG_MACH_PCM038):= pcm038
 board-$(CONFIG_MACH_PCM043):= pcm043
diff --git a/arch/arm/boards/phycard-a-xl2/Makefile 
b/arch/arm/boards/phycard-a-xl2/Makefile
new file mode 100644
index 000..1d23d72
--- /dev/null
+++ b/arch/arm/boards/phycard-a-xl2/Makefile
@@ -0,0 +1,20 @@
+# (C) Copyright 2012 Jan Weitzel j.weit...@phytec.de
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+obj-y += pca-a-xl2.o mux.o lowlevel.o
diff --git a/arch/arm/boards/phycard-a-xl2/config.h 
b/arch/arm/boards/phycard-a-xl2/config.h
new file mode 100644
index 000..da84fa5
--- /dev/null
+++ b/arch/arm/boards/phycard-a-xl2/config.h
@@ -0,0 +1 @@
+/* nothing */
diff --git a/arch/arm/boards/phycard-a-xl2/env/bin/nand_bootstrap 
b/arch/arm/boards/phycard-a-xl2/env/bin/nand_bootstrap
new file mode 100644
index 000..acd00dc
--- /dev/null
+++ b/arch/arm/boards/phycard-a-xl2/env/bin/nand_bootstrap
@@ -0,0 +1,31 @@
+
+echo copying barebox to nand...
+
+mci0.probe=1
+mkdir mnt
+
+mount /dev/disk0.0 fat /mnt
+if [ $? != 0 ]; then
+   echo failed to mount mmc card
+   exit 1
+fi
+
+if [ ! -f /mnt/mlo-nand.bin ]; then
+   echo mlo-nand.bin not found on mmc card
+   exit 1
+fi
+
+if [ ! -f /mnt/barebox.bin ]; then
+   echo barebox.bin not found on mmc card
+fi
+
+gpmc_nand0.eccmode=bch8_hw_romcode
+erase /dev/nand0.xload.bb
+cp /mnt/mlo-nand.bin /dev/nand0.xload.bb
+
+gpmc_nand0.eccmode=bch8_hw
+erase /dev/nand0.barebox.bb
+cp /mnt/barebox.bin /dev/nand0.barebox.bb
+
+echo success
+
diff --git a/arch/arm/boards/phycard-a-xl2/env/config 
b/arch/arm/boards/phycard-a-xl2/env/config
new file mode 100644
index 000..8ed0459
--- /dev/null
+++ b/arch/arm/boards/phycard-a-xl2/env/config
@@ -0,0 +1,52 @@
+#!/bin/sh
+
+machine=pcaaxl2
+user=
+
+# use 'dhcp' to do dhcp in barebox and in kernel
+# use 'none' if you want to skip kernel ip autoconfiguration
+ip=dhcp
+
+# or set your networking parameters here
+#eth0.ipaddr=a.b.c.d
+#eth0.netmask=a.b.c.d
+#eth0.gateway=a.b.c.d
+#eth0.serverip=a.b.c.d
+
+# can be either 'nfs', 'tftp', 'nor' or 'nand'
+kernel_loc=tftp
+# can be either 'net', 'nor', 'nand' or 'initrd'
+rootfs_loc=net
+
+# can be either 'jffs2' or 'ubifs'
+rootfs_type=ubifs
+rootfsimage=root-${machine}.$rootfs_type

Re: [PATCH 2/2] pandaboard: Add gpmc_generic_init to board init.

2012-03-02 Thread Jan Weitzel
Am Dienstag, den 31.01.2012, 21:51 +0100 schrieb Marek Belisko:
 We need to setup generic gpmc otherwise kernel panic during boot.
 
 Signed-off-by: Marek Belisko marek.beli...@open-nandra.com
 ---
  arch/arm/boards/panda/board.c |3 +++
  1 files changed, 3 insertions(+), 0 deletions(-)
 
 diff --git a/arch/arm/boards/panda/board.c b/arch/arm/boards/panda/board.c
 index be3ad77..1c71545 100644
 --- a/arch/arm/boards/panda/board.c
 +++ b/arch/arm/boards/panda/board.c
 @@ -20,6 +20,7 @@
  #include mach/gpio.h
  #include environment.h
  #include mach/xload.h
 +#include mach/gpmc.h
  
  static int board_revision;
  
 @@ -137,6 +138,8 @@ static int panda_devices_init(void)
  IORESOURCE_MEM, NULL);
   panda_ehci_init();
  
 + gpmc_generic_init(0x00);
 +

3.3.0-rc5 is still not booting without this patch. Using panda_defconfig
implicitly select CONFIG_OMAP_GPMC.

   armlinux_set_bootparams((void *)0x8100);
   armlinux_set_architecture(MACH_TYPE_OMAP4_PANDA);
  



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