Re: [casper] program ROACH over JTAG

2009-11-04 Thread C-H Cheng

Hello Suraj

Thanks for you explanation.
Maybe I don't describe clearly.
I mean if I want program the FPAG on ROACH over JTAG.
Also, the bit file is generated by Xilinx ISE not CASPER toolflow.
In this moment, the ucf file of my design is only included the IO pins of my 
design.

But a lot of pins that ROACH are needed are not included in my design.
How could I program the FPGA of ROACH with my bit file?

Thanks,
C-H Cheng


Hello,

On Nov 3, 2009, at 6:39 PM, C-H Cheng wrote:


Hello All

If I want to simulate a design in ISE and generate a bit file to 
download to ROACH over JTAG.
You can do this using the .bit generated by the CASPER toolflow, 
available in the same location as the .bof.  bof files are generated  from 
.bit files using the script 'mkbof' distributed in  'XPS_ROACH_BASE'.



A problem I meet is the FPGA pin number assignment.
For example, in ISE I select the device is vxs95t and the FPGA pin 
assignment in ucf file is according to my desing.
But ROACH has a lot of FPGA pins which are not in my design but  needed 
for ROACH, sys_clk_n, sys_clk_p, aux0_clk_p, aux_clk_n,  ppc_irq_n, 
...etc.
Part of the magic of the toolflow is that it adds the necessary IO  pins 
to the .ucf depending on which IO blocks you have selected to use  (10gbe, 
adc, etc.).  It's part of the reason that IO blocks get  special 
designation as yellowblocks, as they are processed  differently for each 
block.


Hence, I can't add these FPGA pins which ROACH is needed into the  ucf 
file of my design.
It would definitely be faster to just put the I/O blocks you want to  use 
into a blank model file, and use the CASPER toolflow to generate  the 
.ucf, by un-checking the boxes for 'update system design', 'system 
generator', and 'ISE/EDK/bitgen' in the 'bee_xps' dialog.  This should 
take about a minute to complete.


-Suraj 





[casper] Error in PhysDesignRules

2009-10-21 Thread C-H Cheng
Hello

I update the error information.
While the output of ISERDES (build over Black Box) connects to shared bram of 
CASPER library, reinterpret, soft register of CASPER library and snap, the 
error still occurs.
Only one situation the error disappears that is the output of ISERDES connects 
nothing or connects to scope over gateway out.
This is very confused me!
The simulation in Simulink is OK, but during generateing bof file, the error 
will occur at mapping stage.
And I can get the error message:
ERROR:PhysDesignRules:1242 - Invalid connection used for ISERDES.
Also the error appears in the input of ISERDES.
Any idea?

Regards,
C-H Cheng

[casper] Error in PhysDesignRules

2009-10-19 Thread C-H Cheng
Hello

I use ISERDES to receive data over Black Box.
Simulation in Simulink is OK.
But while I generate the bof file over bee_xps, the error occurs!
The error message is as follows:
---
ERROR:PhysDesignRules:1242 - Invalid connection used for ISERDES. The ISERDES 
   comp 
   
roach_iserdes_6bit_XSG_core_config/roach_iserdes_6bit_XSG_core_config/roach_i 
   serdes_6bit_x0/iserdes_6bit/Iserdes_master D pin signal 
   roach_iserdes_6bit_gpio_gateway is not driven from an IO. 
ERROR:Pack:1642 - Errors in physical DRC. 
---

I also find some information about this error.
http://www.xilinx.com/support/answers/31620.htm

Should I fix the UCF file? or other idea?

Regards,
C-H Cheng

[casper] Telnet error

2009-09-21 Thread C-H Cheng
Hello

I follow the ROACH 10GbE tutorial:
http://casper.berkeley.edu/wiki/ROACH_10GbE_tutorial
and I get some error message:
--
Connecting to server 140.109.176.237 on port 7147...  ERROR connecting to 
server 140.109.176.237 on port 7147.

FAILURE DETECTED. Log entries:
140.109.176.237: Starting thread Thread-1
None
FAILURE DETECTED. Log entries:
140.109.176.237: Starting thread Thread-1
140.109.176.237: Stopping thread Thread-1
None
Traceback (most recent call last):
  File 10gbe_demo.py, line 272, in module
exit_fail()
  File 10gbe_demo.py, line 33, in exit_fail
fpga.stop()
  File /usr/local/lib/python2.6/dist-packages/corr/katcp_wrapper.py, line 
250, in stop
super(FpgaClient,self).stop()
  File 
/usr/local/lib/python2.6/dist-packages/katcp-0.1.4-py2.6.egg/katcp/client.py, 
line 449, in stop
raise RuntimeError(Attempt to stop client that wasn't running.)
RuntimeError: Attempt to stop client that wasn't running.

I use the uboot : 20090811-uboot-nohack
  kernel : uImage-rmon-20090904
filesystems: ROACH_filesystem_etch_2009_08_14
Also the telnet in ROACH setup OK and I can telnet to ROACH. (port 23, and 7147 
are opened in ROACH)
Any idea?

Regards, 
C-H Cheng