[PATCH] D148785: -fsanitize=function: use type hashes instead of RTTI objects

[Fangrui Song via Phabricator via cfe-commits]

MaskRay added inline comments.



Comment at: clang/test/CodeGenCXX/catch-undef-behavior.cpp:408
 
   // RTTI pointer check
+  // CHECK: [[CalleeTypeHashPtr:%.+]] = getelementptr <{ i32, i32 }>, <{ i32, 
i32 }>* [[PTR]], i32 -1, i32 1

peter.smith wrote:
> MaskRay wrote:
> > peter.smith wrote:
> > > CalleeTypeHash check?
> > `CalleeTypeHashPtr` seems clear. Do you mean to change `HashCmp` below to 
> > `CalleeTypeHashMatch`?
> > 
> > 
> Apologies; I meant the comment is stale, it still says RTTI pointer check
Sorry for missing the stale comment. Fixed!



Comment at: llvm/test/CodeGen/AArch64/patchable-function-entry-bti.ll:92
 ; CHECK-NEXT: .Ltmp{{.*}}:
 ; CHECK-NEXT:   nop
 ; CHECK-NEXT:   .word   3238382334  // 0xc105cafe

peter.smith wrote:
> MaskRay wrote:
> > MaskRay wrote:
> > > peter.smith wrote:
> > > > samitolvanen wrote:
> > > > > peter.smith wrote:
> > > > > > Assuming the test is the equivalent of 
> > > > > > `-fpatchable-function-entry=1,1` I think this is the wrong place 
> > > > > > for the nop, I think it needs to be after the signature and the 
> > > > > > loads adjusted. For example with -fsanitize=kcfi 
> > > > > > -fpatchable-function-entries=1,1
> > > > > > ```
> > > > > > typedef int Fptr(void);
> > > > > > 
> > > > > > int function(void) {
> > > > > >   return 0;
> > > > > > }
> > > > > > 
> > > > > > int call(Fptr* fp) {
> > > > > >   return fp();
> > > > > > }
> > > > > > ```
> > > > > > Results in code like:
> > > > > > ```
> > > > > > .word   1670944012  // @call
> > > > > > // 0x6398950c
> > > > > > .Ltmp1:
> > > > > > nop
> > > > > > call:
> > > > > > .Lfunc_begin1:
> > > > > > .cfi_startproc
> > > > > > // %bb.0:   // %entry
> > > > > > ldurw16, [x0, #-8]
> > > > > > movkw17, #50598
> > > > > > movkw17, #14001, lsl #16
> > > > > > cmp w16, w17
> > > > > > b.eq.Ltmp2
> > > > > > brk #0x8220
> > > > > > .Ltmp2:
> > > > > > br  x0
> > > > > > .Lfunc_end1:
> > > > > > ```
> > > > > > Note the NOP is after the signature, with the `ldur` having an 
> > > > > > offset of -8 and not the usual -4. I think you would need to make 
> > > > > > sure the signature is a branch instruction for each target for this 
> > > > > > scheme to work.
> > > > > No, this looks correct to me. Note that in AsmPrinter the type hash 
> > > > > is emitted after the patchable-function-prefix nops, while the KCFI 
> > > > > type hash is emitted before them.
> > > > My concern is more along the lines of how would this function be 
> > > > patched if the code doing the patching were unaware of the signature. 
> > > > I'm not familiar with how the kernel uses the nops so it could be that 
> > > > this is won't be a problem in practice.
> > > > 
> > > > With -fsanitize=kcfi it looks like there is no difference to the code 
> > > > doing the patching as the nops are in the same place with respect to 
> > > > the function entry point and there is no fall through into the 
> > > > signature.
> > > > 
> > > > With -fsanitize=function anything patching the first nop as an 
> > > > instruction would need to branch over the signature (unless the first 
> > > > entry of the signature was a branch instruction, but that would mean a 
> > > > target specific signature), obviously if the nop is patched with data 
> > > > and isn't the entry point then this doesn't matter. The code doing the 
> > > > patching would also need to know how to locate the nop ahead of the 
> > > > signature.
> > > The responsibility is on the user side to ensure that when M>0, they code 
> > > patches one of the M NOPs to a branch over the signature (0xc105cafe). 
> > > 
> > > ```
> > > // -fsanitize=function -fpatchable-function-entry=3,3
> > > .Ltmp0:
> > > nop
> > > nop
> > > nop# ensure there is a branch over the signature
> > > .long   3238382334  # 0xc105cafe
> > > .long   2772461324  # 0xa540670c
> > > foo:
> > > ```
> > > 
> > > In addition, `-fpatchable-function-entry=N,M` where M>0 is uncommon. 
> > > `-fpatchable-function-entry=` didn't work with `-fsanitize=function` 
> > > before my changes.
> > > 
> > > My concern is more along the lines of how would this function be patched 
> > > if the code doing the patching were unaware of the signature. I'm not 
> > > familiar with how the kernel uses the nops so it could be that this is 
> > > won't be a problem in practice.
> > 
> > I think the patching code must be aware if the user decides to use 
> > `-fpatchable-function-entry=N,M` where `M>0`, otherwise it's the pilot 
> > error to use the option with `-fsanitize=function`.
> > 
> > `-fsanitize=function` is designed to be compatible with uninstrumented 
> > functions (used as indirect call 

[PATCH] D151010: [NFC][CLANG] Fix issue with dereference null return value found by Coverity static analyzer tool

[Soumi Manna via Phabricator via cfe-commits]

Manna updated this revision to Diff 523986.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D151010/new/

https://reviews.llvm.org/D151010

Files:
  clang/lib/ARCMigrate/ObjCMT.cpp


Index: clang/lib/ARCMigrate/ObjCMT.cpp
===
--- clang/lib/ARCMigrate/ObjCMT.cpp
+++ clang/lib/ARCMigrate/ObjCMT.cpp
@@ -1056,10 +1056,10 @@
 T = TD->getDecl()->getUnderlyingType();
   if (OrigT == T || !T->isPointerType())
 return true;
-  const PointerType* PT = T->getAs();
+  const PointerType *PT = T->castAs();
   QualType UPointeeT = PT->getPointeeType().getUnqualifiedType();
   if (UPointeeT->isRecordType()) {
-const RecordType *RecordTy = UPointeeT->getAs();
+const RecordType *RecordTy = UPointeeT->castAs();
 if (!RecordTy->getDecl()->isCompleteDefinition())
   return false;
   }


Index: clang/lib/ARCMigrate/ObjCMT.cpp
===
--- clang/lib/ARCMigrate/ObjCMT.cpp
+++ clang/lib/ARCMigrate/ObjCMT.cpp
@@ -1056,10 +1056,10 @@
 T = TD->getDecl()->getUnderlyingType();
   if (OrigT == T || !T->isPointerType())
 return true;
-  const PointerType* PT = T->getAs();
+  const PointerType *PT = T->castAs();
   QualType UPointeeT = PT->getPointeeType().getUnqualifiedType();
   if (UPointeeT->isRecordType()) {
-const RecordType *RecordTy = UPointeeT->getAs();
+const RecordType *RecordTy = UPointeeT->castAs();
 if (!RecordTy->getDecl()->isCompleteDefinition())
   return false;
   }
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[PATCH] D148785: -fsanitize=function: use type hashes instead of RTTI objects

[Fangrui Song via Phabricator via cfe-commits]

MaskRay updated this revision to Diff 523984.
MaskRay marked 2 inline comments as done.
MaskRay added a comment.

fix a comment


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148785/new/

https://reviews.llvm.org/D148785

Files:
  clang/docs/UndefinedBehaviorSanitizer.rst
  clang/lib/CodeGen/CGExpr.cpp
  clang/lib/CodeGen/CodeGenFunction.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/Driver/SanitizerArgs.cpp
  clang/test/CodeGen/ubsan-function.cpp
  clang/test/CodeGenCXX/catch-undef-behavior.cpp
  clang/test/CodeGenCXX/ubsan-function-noexcept.cpp
  clang/test/Driver/fsanitize.c
  compiler-rt/lib/ubsan/ubsan_handlers.cpp
  compiler-rt/lib/ubsan/ubsan_handlers.h
  compiler-rt/lib/ubsan/ubsan_handlers_cxx.cpp
  compiler-rt/lib/ubsan/ubsan_handlers_cxx.h
  compiler-rt/lib/ubsan/ubsan_interface.inc
  llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
  llvm/test/CodeGen/AArch64/func-sanitizer.ll
  llvm/test/CodeGen/AArch64/patchable-function-entry-bti.ll
  llvm/test/CodeGen/X86/func-sanitizer.ll
  llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll

Index: llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll
===
--- llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll
+++ llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll
@@ -1,9 +1,6 @@
 ; RUN: llc -mtriple=i686 %s -o - | FileCheck --check-prefixes=CHECK,32 %s
 ; RUN: llc -mtriple=x86_64 %s -o - | FileCheck --check-prefixes=CHECK,64 %s
 
-@_ZTIFvvE = linkonce_odr constant i32 1
-@__llvm_rtti_proxy = private unnamed_addr constant ptr @_ZTIFvvE
-
 ;; -fpatchable-function-entry=0 -fcf-protection=branch
 define void @f0() "patchable-function-entry"="0" {
 ; CHECK-LABEL: f0:
@@ -91,7 +88,7 @@
 ; CHECK-NEXT: .Ltmp{{.*}}:
 ; CHECK-NEXT:   nop
 ; CHECK-NEXT:   .long   3238382334
-; CHECK-NEXT:   .long   .L__llvm_rtti_proxy-sanitize_function
+; CHECK-NEXT:   .long   42
 ; CHECK-NEXT: sanitize_function:
 ; CHECK-NEXT: .Lfunc_begin{{.*}}:
 ; CHECK-NEXT:   .cfi_startproc
@@ -107,4 +104,4 @@
 !llvm.module.flags = !{!0}
 
 !0 = !{i32 8, !"cf-protection-branch", i32 1}
-!1 = !{i32 3238382334, ptr @__llvm_rtti_proxy}
+!1 = !{i32 3238382334, i32 42}
Index: llvm/test/CodeGen/X86/func-sanitizer.ll
===
--- llvm/test/CodeGen/X86/func-sanitizer.ll
+++ llvm/test/CodeGen/X86/func-sanitizer.ll
@@ -2,17 +2,14 @@
 
 ; CHECK:  .type _Z3funv,@function
 ; CHECK-NEXT:   .long   3238382334  # 0xc105cafe
-; CHECK-NEXT:   .long   .L__llvm_rtti_proxy-_Z3funv
+; CHECK-NEXT:   .long   42
 ; CHECK-NEXT: _Z3funv:
 ; CHECK-NEXT:   .cfi_startproc
 ; CHECK-NEXT:   # %bb.0:
 ; CHECK-NEXT:   retq
 
-@i = linkonce_odr constant i32 1
-@__llvm_rtti_proxy = private unnamed_addr constant ptr @i
-
 define dso_local void @_Z3funv() !func_sanitize !0 {
   ret void
 }
 
-!0 = !{i32 3238382334, ptr @__llvm_rtti_proxy}
+!0 = !{i32 3238382334, i32 42}
Index: llvm/test/CodeGen/AArch64/patchable-function-entry-bti.ll
===
--- llvm/test/CodeGen/AArch64/patchable-function-entry-bti.ll
+++ llvm/test/CodeGen/AArch64/patchable-function-entry-bti.ll
@@ -1,8 +1,5 @@
 ; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s
 
-@_ZTIFvvE = linkonce_odr constant i32 2
-@__llvm_rtti_proxy = private unnamed_addr constant ptr @_ZTIFvvE
-
 define void @f0() "patchable-function-entry"="0" "branch-target-enforcement"="true" {
 ; CHECK-LABEL: f0:
 ; CHECK-NEXT: .Lfunc_begin0:
@@ -94,7 +91,7 @@
 ; CHECK-NEXT: .Ltmp{{.*}}:
 ; CHECK-NEXT:   nop
 ; CHECK-NEXT:   .word   3238382334  // 0xc105cafe
-; CHECK-NEXT:   .word   .L__llvm_rtti_proxy-sanitize_function
+; CHECK-NEXT:   .word   42
 ; CHECK-NEXT: sanitize_function:
 ; CHECK-NEXT: .Lfunc_begin{{.*}}:
 ; CHECK-NEXT:   .cfi_startproc
@@ -106,4 +103,4 @@
   ret void
 }
 
-!0 = !{i32 3238382334, ptr @__llvm_rtti_proxy}
+!0 = !{i32 3238382334, i32 42}
Index: llvm/test/CodeGen/AArch64/func-sanitizer.ll
===
--- llvm/test/CodeGen/AArch64/func-sanitizer.ll
+++ llvm/test/CodeGen/AArch64/func-sanitizer.ll
@@ -2,21 +2,13 @@
 
 ; CHECK-LABEL: .type _Z3funv,@function
 ; CHECK-NEXT:.word   3238382334  // 0xc105cafe
-; CHECK-NEXT:.word   .L__llvm_rtti_proxy-_Z3funv
+; CHECK-NEXT:.word   42
 ; CHECK-NEXT:  _Z3funv:
 ; CHECK-NEXT:  // %bb.0:
 ; CHECK-NEXT:ret
 
-; CHECK:   .section .rodata,"a",@progbits
-; CHECK-LABEL: .L__llvm_rtti_proxy:
-; CHECK-NEXT:.xword  _ZTIFvvE
-; CHECK-NEXT:.size   .L__llvm_rtti_proxy, 8
-
-@_ZTIFvvE = linkonce_odr constant i32 1
-@__llvm_rtti_proxy = private unnamed_addr constant ptr @_ZTIFvvE
-
 define dso_local void @_Z3funv() nounwind !func_sanitize !0 {
   ret void
 }
 
-!0 = !{i32 3238382334, ptr @__llvm_rtti_proxy}
+!0 = !{i32 3238382334, i32 42}
Index: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp

[PATCH] D151010: [NFC][CLANG] Fix issue with dereference null return value found by Coverity static analyzer tool

[Soumi Manna via Phabricator via cfe-commits]

Manna updated this revision to Diff 523983.
Manna added a comment.

Fix Clang-format error


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D151010/new/

https://reviews.llvm.org/D151010

Files:
  clang/lib/ARCMigrate/ObjCMT.cpp


Index: clang/lib/ARCMigrate/ObjCMT.cpp
===
--- clang/lib/ARCMigrate/ObjCMT.cpp
+++ clang/lib/ARCMigrate/ObjCMT.cpp
@@ -1056,10 +1056,10 @@
 T = TD->getDecl()->getUnderlyingType();
   if (OrigT == T || !T->isPointerType())
 return true;
-  const PointerType* PT = T->getAs();
+  const PointerType* PT = T->castAs();
   QualType UPointeeT = PT->getPointeeType().getUnqualifiedType();
   if (UPointeeT->isRecordType()) {
-const RecordType *RecordTy = UPointeeT->getAs();
+const RecordType *RecordTy = UPointeeT->castAs();
 if (!RecordTy->getDecl()->isCompleteDefinition())
   return false;
   }


Index: clang/lib/ARCMigrate/ObjCMT.cpp
===
--- clang/lib/ARCMigrate/ObjCMT.cpp
+++ clang/lib/ARCMigrate/ObjCMT.cpp
@@ -1056,10 +1056,10 @@
 T = TD->getDecl()->getUnderlyingType();
   if (OrigT == T || !T->isPointerType())
 return true;
-  const PointerType* PT = T->getAs();
+  const PointerType* PT = T->castAs();
   QualType UPointeeT = PT->getPointeeType().getUnqualifiedType();
   if (UPointeeT->isRecordType()) {
-const RecordType *RecordTy = UPointeeT->getAs();
+const RecordType *RecordTy = UPointeeT->castAs();
 if (!RecordTy->getDecl()->isCompleteDefinition())
   return false;
   }
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[PATCH] D150968: [NFC][CLANG] Fix issue with dereference null return value found by Coverity static analyzer tool

[Soumi Manna via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG34d8cd153812: [NFC][CLANG] Fix issue with dereference null 
return value found by Coverity… (authored by Manna).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D150968/new/

https://reviews.llvm.org/D150968

Files:
  clang/lib/AST/Decl.cpp


Index: clang/lib/AST/Decl.cpp
===
--- clang/lib/AST/Decl.cpp
+++ clang/lib/AST/Decl.cpp
@@ -3301,7 +3301,7 @@
 QualType T = Ty;
 while (const auto *TD = T->getAs())
   T = TD->getDecl()->getUnderlyingType();
-IdentifierInfo *II = T->getAs()->getDecl()->getIdentifier();
+IdentifierInfo *II = T->castAs()->getDecl()->getIdentifier();
 if (II && II->isStr("__hot_cold_t"))
   Consume();
   }


Index: clang/lib/AST/Decl.cpp
===
--- clang/lib/AST/Decl.cpp
+++ clang/lib/AST/Decl.cpp
@@ -3301,7 +3301,7 @@
 QualType T = Ty;
 while (const auto *TD = T->getAs())
   T = TD->getDecl()->getUnderlyingType();
-IdentifierInfo *II = T->getAs()->getDecl()->getIdentifier();
+IdentifierInfo *II = T->castAs()->getDecl()->getIdentifier();
 if (II && II->isStr("__hot_cold_t"))
   Consume();
   }
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[clang] 34d8cd1 - [NFC][CLANG] Fix issue with dereference null return value found by Coverity static analyzer tool

[via cfe-commits]

Author: Manna, Soumi
Date: 2023-05-19T19:41:38-07:00
New Revision: 34d8cd153812c3e5e2db1a1e27f057db33b07b6e

URL: 
https://github.com/llvm/llvm-project/commit/34d8cd153812c3e5e2db1a1e27f057db33b07b6e
DIFF: 
https://github.com/llvm/llvm-project/commit/34d8cd153812c3e5e2db1a1e27f057db33b07b6e.diff

LOG: [NFC][CLANG] Fix issue with dereference null return value found by 
Coverity static analyzer tool

Reported by Coverity:

  In 
clang::FunctionDecl::isReplaceableGlobalAllocationFunction(std::optional *, bool *): Return value of function which returns null is dereferenced 
without checking

  if (!IsSizedDelete && !Ty.isNull() && Ty->isEnumeralType()) {
   QualType T = Ty;
   //Condition TD, taking false branch.
  while (const auto *TD = T->getAs())
T = TD->getDecl()->getUnderlyingType();
//returned_null: getAs returns nullptr (checked 95 out of 97 times).

  //Dereference null return value (NULL_RETURNS)
  // dereference: Dereferencing a pointer that might be nullptr T->getAs() 
when calling getDecl.
  IdentifierInfo *II = T->getAs()->getDecl()->getIdentifier();
  if (II && II->isStr("__hot_cold_t"))
Consume();
}

This patch uses castAs instead of getAs which will assert if the type doesn't 
match.

Reviewed By: erichkeane

Differential Revision: https://reviews.llvm.org/D150968

Added: 


Modified: 
clang/lib/AST/Decl.cpp

Removed: 




diff  --git a/clang/lib/AST/Decl.cpp b/clang/lib/AST/Decl.cpp
index cf00db9c948b..5317b9d805b5 100644
--- a/clang/lib/AST/Decl.cpp
+++ b/clang/lib/AST/Decl.cpp
@@ -3301,7 +3301,7 @@ bool FunctionDecl::isReplaceableGlobalAllocationFunction(
 QualType T = Ty;
 while (const auto *TD = T->getAs())
   T = TD->getDecl()->getUnderlyingType();
-IdentifierInfo *II = T->getAs()->getDecl()->getIdentifier();
+IdentifierInfo *II = T->castAs()->getDecl()->getIdentifier();
 if (II && II->isStr("__hot_cold_t"))
   Consume();
   }



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[PATCH] D151010: [NFC][CLANG] Fix issue with dereference null return value found by Coverity static analyzer tool

[Soumi Manna via Phabricator via cfe-commits]

Manna created this revision.
Manna added a reviewer: erichkeane.
Herald added subscribers: manas, ASDenysPetrov, dkrupp, donat.nagy, Szelethus, 
a.sidorin, baloghadamsoftware.
Herald added a project: All.
Manna requested review of this revision.
Herald added a project: clang.

Reported by Coverity static analyzer tool:

in TypeIsInnerPointer(clang::​QualType): Return value of function which returns 
null is dereferenced without checking

  if (OrigT == T || !T->isPointerType())
 return true;
   //returned_null: getAs returns nullptr (checked 229 out of 237 times). 
   //var_assigned: Assigning: PT = nullptr return value from getAs.
   const PointerType* PT = T->getAs();

   //Dereference null return value (NULL_RETURNS)
   //dereference: Dereferencing a pointer that might be nullptr PT when calling 
getPointeeType. 
   QualType UPointeeT = PT->getPointeeType().getUnqualifiedType();
   if (UPointeeT->isRecordType()) {
   //returned_null: getAs returns nullptr (checked 279 out of 294 times). 
   //var_assigned: Assigning: RecordTy = nullptr return value from getAs.
  const RecordType *RecordTy = UPointeeT->getAs();

  //Dereference null return value (NULL_RETURNS)
  //dereference: Dereferencing a pointer that might be nullptr RecordTy 
when calling getDecl. 
  if (!RecordTy->getDecl()->isCompleteDefinition())
 return false;
}

This patch uses castAs instead of getAs which will assert if the type doesn't 
match.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D151010

Files:
  clang/lib/ARCMigrate/ObjCMT.cpp


Index: clang/lib/ARCMigrate/ObjCMT.cpp
===
--- clang/lib/ARCMigrate/ObjCMT.cpp
+++ clang/lib/ARCMigrate/ObjCMT.cpp
@@ -1056,10 +1056,10 @@
 T = TD->getDecl()->getUnderlyingType();
   if (OrigT == T || !T->isPointerType())
 return true;
-  const PointerType* PT = T->getAs();
+  const PointerType* PT = T->castAs();
   QualType UPointeeT = PT->getPointeeType().getUnqualifiedType();
   if (UPointeeT->isRecordType()) {
-const RecordType *RecordTy = UPointeeT->getAs();
+const RecordType *RecordTy = UPointeeT->castAs();
 if (!RecordTy->getDecl()->isCompleteDefinition())
   return false;
   }


Index: clang/lib/ARCMigrate/ObjCMT.cpp
===
--- clang/lib/ARCMigrate/ObjCMT.cpp
+++ clang/lib/ARCMigrate/ObjCMT.cpp
@@ -1056,10 +1056,10 @@
 T = TD->getDecl()->getUnderlyingType();
   if (OrigT == T || !T->isPointerType())
 return true;
-  const PointerType* PT = T->getAs();
+  const PointerType* PT = T->castAs();
   QualType UPointeeT = PT->getPointeeType().getUnqualifiedType();
   if (UPointeeT->isRecordType()) {
-const RecordType *RecordTy = UPointeeT->getAs();
+const RecordType *RecordTy = UPointeeT->castAs();
 if (!RecordTy->getDecl()->isCompleteDefinition())
   return false;
   }
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[PATCH] D143984: [DebugMetadata] Simplify handling subprogram's retainedNodes field. NFCI (1/7)

[Vladislav Dzhidzhoev via Phabricator via cfe-commits]

dzhidzhoev added a comment.

In D143984#4357517 , @dblaikie wrote:

> Looks like this series got approved - is it waiting on any particular 
> feedback, or do you need someone to commit it for you?

I had been waiting for approval for the change of  
https://reviews.llvm.org/D144008. How would you suggest landing these commits - 
individually or all at once?


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[PATCH] D150931: [NFC][Clang][Coverity] Fix Static Code Analysis Concerns with copy without assign

[Soumi Manna via Phabricator via cfe-commits]

Manna marked 2 inline comments as done.
Manna added inline comments.



Comment at: clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h:323-324
 
+  // The copy assignment operator is defined as deleted pending further
+  // motivation.
+  SExpr =(const SExpr &) = delete;

aaronpuchert wrote:
> We can probably even drop the comment. Types in an inheritance hierarchy tend 
> to be not assignable, and I don't see why it would ever be needed for what 
> amounts to be AST nodes.
Thank you @aaronpuchert for reviews and feedbacks. 

I have dropped the comment.



Comment at: clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h:387-389
+  // The copy assignment operator is defined as deleted pending further
+  // motivation.
+  Variable =(const Variable &) = delete;

aaronpuchert wrote:
> My understanding is that deleting copy assignment on the base class 
> automatically deletes it for the derived classes, so I'd appreciate if we 
> could drop this and the following additions. That's just noise in my view.
> 
> Also, most of these classes don't seem to have a user-declared copy 
> constructor, or am I missing something?
Yup, Sounds reasonable to me. Removed


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[PATCH] D150931: [NFC][Clang][Coverity] Fix Static Code Analysis Concerns with copy without assign

[Soumi Manna via Phabricator via cfe-commits]

Manna updated this revision to Diff 523957.
Manna added a comment.

I have addressed review comments.


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Files:
  clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h
  clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h


Index: clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
===
--- clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
+++ clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
@@ -84,6 +84,10 @@
   CallEventRef(const T *Call) : IntrusiveRefCntPtr(Call) {}
   CallEventRef(const CallEventRef ) : IntrusiveRefCntPtr(Orig) {}
 
+  // The copy assignment operator is defined as deleted pending further
+  // motivation.
+  CallEventRef =(const CallEventRef &) = delete;
+
   CallEventRef cloneWithState(ProgramStateRef State) const {
 return this->get()->template cloneWithState(State);
   }
Index: clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h
===
--- clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h
+++ clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h
@@ -319,6 +319,7 @@
 protected:
   SExpr(TIL_Opcode Op) : Opcode(Op) {}
   SExpr(const SExpr ) : Opcode(E.Opcode), Flags(E.Flags) {}
+  SExpr =(const SExpr &) = delete
 
   const TIL_Opcode Opcode;
   unsigned char Reserved = 0;


Index: clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
===
--- clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
+++ clang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
@@ -84,6 +84,10 @@
   CallEventRef(const T *Call) : IntrusiveRefCntPtr(Call) {}
   CallEventRef(const CallEventRef ) : IntrusiveRefCntPtr(Orig) {}
 
+  // The copy assignment operator is defined as deleted pending further
+  // motivation.
+  CallEventRef =(const CallEventRef &) = delete;
+
   CallEventRef cloneWithState(ProgramStateRef State) const {
 return this->get()->template cloneWithState(State);
   }
Index: clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h
===
--- clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h
+++ clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h
@@ -319,6 +319,7 @@
 protected:
   SExpr(TIL_Opcode Op) : Opcode(Op) {}
   SExpr(const SExpr ) : Opcode(E.Opcode), Flags(E.Flags) {}
+  SExpr =(const SExpr &) = delete
 
   const TIL_Opcode Opcode;
   unsigned char Reserved = 0;
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[PATCH] D150499: [AST] Initialized data after TypeSourceInfo

[Vitaly Buka via Phabricator via cfe-commits]

vitalybuka added a comment.

ping, any concerns regarding this patch?
i want to make MSAN stricter on our bot by reducing -O level


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[PATCH] D150504: [AST] Construct Capture objects before use

[Vitaly Buka via Phabricator via cfe-commits]

vitalybuka added a comment.

ping, any concerns regarding this patch?
i want to make MSAN stricter on our bot by reducing -O level


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[PATCH] D150746: [CodeGen]Translating pointer arguments can require an address space cast

[John McCall via Phabricator via cfe-commits]

rjmccall added a comment.

I see.  Yes, in that case I think you're right that we can't test this yet — 
only base-subobject ctors and dtors get VTT parameters, we only emit calls to 
those from other ctors and dtors, and those ctors and dtors will always have 
their own stores to the v-table slot that will be invalid IR.  So I agree with 
the plan of building up an XFAILed test.  You should be able to locally build 
up that test by just adding an early return to 
`CodeGenFunction::InitializeVTablePointer` — obviously that will break a bunch 
of other tests, but as long as you don't commit it, you can create a fairly 
complete test case that at least should work in the future.  I find it helpful 
to do that as you're going instead of going back at the end of a patch series 
and trying to add tests for all the cases you implemented.  Please test (1) the 
declarations of base-subobject ctors/dtors, (2) the initial passing of the VTT 
argument from complete-object to base-subobject ctors/dtors, and (3) the 
forwarding of VTT arguments in base-subobject ctors/dtors to the ctors/dtors of 
their own base subobjects.

The actual code LGTM.


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[PATCH] D150746: [CodeGen]Translating pointer arguments can require an address space cast

[Alex Voicu via Phabricator via cfe-commits]

AlexVlx added a comment.

In D150746#4357443 , @rjmccall wrote:

> It's well-formed as IR, just not semantically valid, right?  As long as it's 
> not actually crashing in the verifier, please test as much as you reasonably 
> can that's correct, like that the constructor and destructor functions take 
> something in the right address space, and that calls to them pass a valid 
> VTT.  And then yeah, when you pull a v-table out and try to assign it, that 
> much will be incorrect until your next fix, but that's okay.

Apologies, should have clarified: it is not well-formed IR in that it bitcasts 
pointers in different address spaces (e.g. vtable or typeinfo initializers are 
incorrectly typed as global array of generic pointers), so it will crash the 
verifier - think this https://gcc.godbolt.org/z/shfobqMqY captures most 
(including the behaviour this patch addresses). We "get away" with this in 
AMDGPU because this is a seldom if ever exercised code path and, more 
importantly, because the bitwise representation of generic & global pointers is 
the same, so there are no actual runtime bugs. My intention was to fix each of 
the issues in separate, isolated patches, fill out this test with additional 
checks since it captures all the problematic cases, and re-enable it as part of 
the final patch.


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[PATCH] D150955: [clang][AST] Propagate the value-dependent bit for VAArgExpr.

[Haojian Wu via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGd4e935240f02: [clang][AST] Propagate the value-dependent bit 
for VAArgExpr. (authored by hokein).

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Files:
  clang/docs/ReleaseNotes.rst
  clang/lib/AST/ComputeDependence.cpp
  clang/test/AST/ast-dump-recovery.c


Index: clang/test/AST/ast-dump-recovery.c
===
--- clang/test/AST/ast-dump-recovery.c
+++ clang/test/AST/ast-dump-recovery.c
@@ -109,3 +109,11 @@
 b,
   };
 }
+
+// Verify no crash
+void test5_GH62711() {
+  // CHECK:  VAArgExpr {{.*}} 'int' contains-errors
+  // CHECK-NEXT: | `-ImplicitCastExpr {{.*}} '' contains-errors
+  // CHECK-NEXT: |   `-RecoveryExpr {{.*}} '' contains-errors
+  if (__builtin_va_arg(undef, int) << 1);
+}
Index: clang/lib/AST/ComputeDependence.cpp
===
--- clang/lib/AST/ComputeDependence.cpp
+++ clang/lib/AST/ComputeDependence.cpp
@@ -227,7 +227,7 @@
   auto D = toExprDependenceAsWritten(
E->getWrittenTypeInfo()->getType()->getDependence()) |
(E->getSubExpr()->getDependence() & ~ExprDependence::Type);
-  return D & ~ExprDependence::Value;
+  return D;
 }
 
 ExprDependence clang::computeDependence(NoInitExpr *E) {
Index: clang/docs/ReleaseNotes.rst
===
--- clang/docs/ReleaseNotes.rst
+++ clang/docs/ReleaseNotes.rst
@@ -413,6 +413,9 @@
 - Fix a crash when an enum constant has a dependent-type recovery expression 
for
   C.
   (`#62446 `_).
+- Propagate the value-dependent bit for VAArgExpr. Fixes a crash where a
+  __builtin_va_arg call has invalid arguments.
+  (`#62711 `_).
 
 Bug Fixes to Compiler Builtins
 ^^


Index: clang/test/AST/ast-dump-recovery.c
===
--- clang/test/AST/ast-dump-recovery.c
+++ clang/test/AST/ast-dump-recovery.c
@@ -109,3 +109,11 @@
 b,
   };
 }
+
+// Verify no crash
+void test5_GH62711() {
+  // CHECK:  VAArgExpr {{.*}} 'int' contains-errors
+  // CHECK-NEXT: | `-ImplicitCastExpr {{.*}} '' contains-errors
+  // CHECK-NEXT: |   `-RecoveryExpr {{.*}} '' contains-errors
+  if (__builtin_va_arg(undef, int) << 1);
+}
Index: clang/lib/AST/ComputeDependence.cpp
===
--- clang/lib/AST/ComputeDependence.cpp
+++ clang/lib/AST/ComputeDependence.cpp
@@ -227,7 +227,7 @@
   auto D = toExprDependenceAsWritten(
E->getWrittenTypeInfo()->getType()->getDependence()) |
(E->getSubExpr()->getDependence() & ~ExprDependence::Type);
-  return D & ~ExprDependence::Value;
+  return D;
 }
 
 ExprDependence clang::computeDependence(NoInitExpr *E) {
Index: clang/docs/ReleaseNotes.rst
===
--- clang/docs/ReleaseNotes.rst
+++ clang/docs/ReleaseNotes.rst
@@ -413,6 +413,9 @@
 - Fix a crash when an enum constant has a dependent-type recovery expression for
   C.
   (`#62446 `_).
+- Propagate the value-dependent bit for VAArgExpr. Fixes a crash where a
+  __builtin_va_arg call has invalid arguments.
+  (`#62711 `_).
 
 Bug Fixes to Compiler Builtins
 ^^
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[clang] d4e9352 - [clang][AST] Propagate the value-dependent bit for VAArgExpr.

[Haojian Wu via cfe-commits]

Author: Haojian Wu
Date: 2023-05-19T23:43:46+02:00
New Revision: d4e935240f0223cdf2270dde587960d3d3868c6f

URL: 
https://github.com/llvm/llvm-project/commit/d4e935240f0223cdf2270dde587960d3d3868c6f
DIFF: 
https://github.com/llvm/llvm-project/commit/d4e935240f0223cdf2270dde587960d3d3868c6f.diff

LOG: [clang][AST] Propagate the value-dependent bit for VAArgExpr.

Fixes https://github.com/llvm/llvm-project/issues/62711

We never set the value-dependent bit for the VAArgExpr before this
patch, this was fine becase the dependent-type TypoExpr was always
resolved before checking the operands (see 
https://github.com/llvm/llvm-project/blob/main/clang/lib/Sema/SemaExpr.cpp#L21173-L21180)

Now we have enabled the dependence by default for C, the typo expr is
not early resolved before checking rather than delayed (share the same
codepath with C++).

The fix is to propagate the value-dependent bit for VAArgExpr where it contains
a TypoExpr, so that the AST node can be handled properly.

Differential Revision: https://reviews.llvm.org/D150955

Added: 


Modified: 
clang/docs/ReleaseNotes.rst
clang/lib/AST/ComputeDependence.cpp
clang/test/AST/ast-dump-recovery.c

Removed: 




diff  --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 3035e23f0b45c..3e2b08e9693fe 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -413,6 +413,9 @@ Bug Fixes in This Version
 - Fix a crash when an enum constant has a dependent-type recovery expression 
for
   C.
   (`#62446 `_).
+- Propagate the value-dependent bit for VAArgExpr. Fixes a crash where a
+  __builtin_va_arg call has invalid arguments.
+  (`#62711 `_).
 
 Bug Fixes to Compiler Builtins
 ^^

diff  --git a/clang/lib/AST/ComputeDependence.cpp 
b/clang/lib/AST/ComputeDependence.cpp
index 5a301c10aca6d..4b6bc2d994ca8 100644
--- a/clang/lib/AST/ComputeDependence.cpp
+++ b/clang/lib/AST/ComputeDependence.cpp
@@ -227,7 +227,7 @@ ExprDependence clang::computeDependence(VAArgExpr *E) {
   auto D = toExprDependenceAsWritten(
E->getWrittenTypeInfo()->getType()->getDependence()) |
(E->getSubExpr()->getDependence() & ~ExprDependence::Type);
-  return D & ~ExprDependence::Value;
+  return D;
 }
 
 ExprDependence clang::computeDependence(NoInitExpr *E) {

diff  --git a/clang/test/AST/ast-dump-recovery.c 
b/clang/test/AST/ast-dump-recovery.c
index 75441c1c9de0a..33f0f2ad3c996 100644
--- a/clang/test/AST/ast-dump-recovery.c
+++ b/clang/test/AST/ast-dump-recovery.c
@@ -109,3 +109,11 @@ void test4() {
 b,
   };
 }
+
+// Verify no crash
+void test5_GH62711() {
+  // CHECK:  VAArgExpr {{.*}} 'int' contains-errors
+  // CHECK-NEXT: | `-ImplicitCastExpr {{.*}} '' contains-errors
+  // CHECK-NEXT: |   `-RecoveryExpr {{.*}} '' contains-errors
+  if (__builtin_va_arg(undef, int) << 1);
+}



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[PATCH] D145403: [Pipeline] Don't run EarlyFPM in LTO post link

[Nikita Popov via Phabricator via cfe-commits]

nikic added a comment.

Any reason why this hasn't been landed yet?


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[PATCH] D148851: Disable llvm-symbolizer on some of the driver tests that are timing out

[David Blaikie via Phabricator via cfe-commits]

dblaikie added a comment.

In D148851#4357360 , @arsenm wrote:

> I also think we need to revert or disable 
> https://github.com/llvm/llvm-project/commit/cead4eceb01b935fae07bf4a7e91911b344d2fec
>
> The symbolizer is unusably slow with it

I believe that issue's been addressed by 
02e8eb1a438bdb1dc9a97aea75a8c9c748048039 
 / D145009 
 ?


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[PATCH] D148093: [clang][CodeGen] Break up TargetInfo.cpp [5/8]

[Sergei Barannikov via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGf60cc01e9e75: [clang][CodeGen] Break up TargetInfo.cpp [5/8] 
(authored by barannikov88).

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Files:
  clang/lib/CodeGen/ABIInfo.h
  clang/lib/CodeGen/TargetInfo.cpp


Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -125,7 +125,7 @@
 /// registers when expanded?
 ///
 /// This is intended to be the basis of a reasonable basic implementation
-/// of should{Pass,Return}IndirectlyForSwift.
+/// of should{Pass,Return}Indirectly.
 ///
 /// For most targets, a limit of four total registers is reasonable; this
 /// limits the amount of code required in order to move around the value
@@ -134,15 +134,14 @@
 /// immediately within the callee.  But some targets may need to further
 /// limit the register count due to an inability to support that many
 /// return registers.
-static bool occupiesMoreThan(CodeGenTypes ,
- ArrayRef scalarTypes,
- unsigned maxAllRegisters) {
+bool SwiftABIInfo::occupiesMoreThan(ArrayRef scalarTypes,
+unsigned maxAllRegisters) const {
   unsigned intCount = 0, fpCount = 0;
   for (llvm::Type *type : scalarTypes) {
 if (type->isPointerTy()) {
   intCount++;
 } else if (auto intTy = dyn_cast(type)) {
-  auto ptrWidth = cgt.getTarget().getPointerWidth(LangAS::Default);
+  auto ptrWidth = CGT.getTarget().getPointerWidth(LangAS::Default);
   intCount += (intTy->getBitWidth() + ptrWidth - 1) / ptrWidth;
 } else {
   assert(type->isVectorTy() || type->isFloatingPointTy());
@@ -155,7 +154,7 @@
 
 bool SwiftABIInfo::shouldPassIndirectly(ArrayRef ComponentTys,
 bool AsReturnValue) const {
-  return occupiesMoreThan(CGT, ComponentTys, /*total=*/4);
+  return occupiesMoreThan(ComponentTys, /*total=*/4);
 }
 
 bool SwiftABIInfo::isLegalVectorType(CharUnits VectorSize, llvm::Type *EltTy,
@@ -1248,7 +1247,7 @@
 // integer registers and three fp registers.  Oddly, it'll use up to
 // four vector registers for vectors, but those can overlap with the
 // scalar registers.
-return occupiesMoreThan(CGT, ComponentTys, /*total=*/3);
+return occupiesMoreThan(ComponentTys, /*total=*/3);
   }
 };
 
Index: clang/lib/CodeGen/ABIInfo.h
===
--- clang/lib/CodeGen/ABIInfo.h
+++ clang/lib/CodeGen/ABIInfo.h
@@ -117,6 +117,9 @@
   CodeGenTypes 
   bool SwiftErrorInRegister;
 
+  bool occupiesMoreThan(ArrayRef scalarTypes,
+unsigned maxAllRegisters) const;
+
 public:
   SwiftABIInfo(CodeGen::CodeGenTypes , bool SwiftErrorInRegister)
   : CGT(CGT), SwiftErrorInRegister(SwiftErrorInRegister) {}


Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -125,7 +125,7 @@
 /// registers when expanded?
 ///
 /// This is intended to be the basis of a reasonable basic implementation
-/// of should{Pass,Return}IndirectlyForSwift.
+/// of should{Pass,Return}Indirectly.
 ///
 /// For most targets, a limit of four total registers is reasonable; this
 /// limits the amount of code required in order to move around the value
@@ -134,15 +134,14 @@
 /// immediately within the callee.  But some targets may need to further
 /// limit the register count due to an inability to support that many
 /// return registers.
-static bool occupiesMoreThan(CodeGenTypes ,
- ArrayRef scalarTypes,
- unsigned maxAllRegisters) {
+bool SwiftABIInfo::occupiesMoreThan(ArrayRef scalarTypes,
+unsigned maxAllRegisters) const {
   unsigned intCount = 0, fpCount = 0;
   for (llvm::Type *type : scalarTypes) {
 if (type->isPointerTy()) {
   intCount++;
 } else if (auto intTy = dyn_cast(type)) {
-  auto ptrWidth = cgt.getTarget().getPointerWidth(LangAS::Default);
+  auto ptrWidth = CGT.getTarget().getPointerWidth(LangAS::Default);
   intCount += (intTy->getBitWidth() + ptrWidth - 1) / ptrWidth;
 } else {
   assert(type->isVectorTy() || type->isFloatingPointTy());
@@ -155,7 +154,7 @@
 
 bool SwiftABIInfo::shouldPassIndirectly(ArrayRef ComponentTys,
 bool AsReturnValue) const {
-  return occupiesMoreThan(CGT, ComponentTys, /*total=*/4);
+  return occupiesMoreThan(ComponentTys, /*total=*/4);
 }
 
 bool SwiftABIInfo::isLegalVectorType(CharUnits VectorSize, llvm::Type *EltTy,
@@ -1248,7 +1247,7 @@
 

[PATCH] D148092: [clang][CodeGen] Break up TargetInfo.cpp [4/8]

[Sergei Barannikov via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG0a86e05d1da0: [clang][CodeGen] Break up TargetInfo.cpp [4/8] 
(authored by barannikov88).

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Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/CodeGen/TargetInfo.h

Index: clang/lib/CodeGen/TargetInfo.h
===
--- clang/lib/CodeGen/TargetInfo.h
+++ clang/lib/CodeGen/TargetInfo.h
@@ -52,6 +52,11 @@
   // by returning true from TargetInfo::checkCallingConvention for them.
   std::unique_ptr SwiftInfo;
 
+  // Returns ABI info helper for the target. This is for use by derived classes.
+  template  const T () const {
+return static_cast(*Info);
+  }
+
 public:
   TargetCodeGenInfo(std::unique_ptr Info);
   virtual ~TargetCodeGenInfo();
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -2476,10 +2476,6 @@
 std::make_unique(CGT, /*SwiftErrorInRegister=*/true);
   }
 
-  const X86_64ABIInfo () const {
-return static_cast(TargetCodeGenInfo::getABIInfo());
-  }
-
   /// Disable tail call on x86-64. The epilogue code before the tail jump blocks
   /// autoreleaseRV/retainRV and autoreleaseRV/unsafeClaimRV optimizations.
   bool markARCOptimizedReturnCallsAsNoTail() const override { return true; }
@@ -2516,7 +2512,7 @@
   bool HasAVXType = false;
   for (CallArgList::const_iterator
  it = args.begin(), ie = args.end(); it != ie; ++it) {
-if (getABIInfo().isPassedUsingAVXType(it->Ty)) {
+if (getABIInfo().isPassedUsingAVXType(it->Ty)) {
   HasAVXType = true;
   break;
 }
@@ -6388,10 +6384,6 @@
 SwiftInfo = std::make_unique(CGT);
   }
 
-  const ARMABIInfo () const {
-return static_cast(TargetCodeGenInfo::getABIInfo());
-  }
-
   int getDwarfEHStackPointer(CodeGen::CodeGenModule ) const override {
 return 13;
   }
@@ -6410,7 +6402,8 @@
   }
 
   unsigned getSizeOfUnwindException() const override {
-if (getABIInfo().isEABI()) return 88;
+if (getABIInfo().isEABI())
+  return 88;
 return TargetCodeGenInfo::getSizeOfUnwindException();
   }
 
@@ -6477,7 +6470,7 @@
 
 Fn->addFnAttr("interrupt", Kind);
 
-ARMABIKind ABI = cast(getABIInfo()).getABIKind();
+ARMABIKind ABI = getABIInfo().getABIKind();
 if (ABI == ARMABIKind::APCS)
   return;
 
@@ -7415,10 +7408,6 @@
 class SystemZTargetCodeGenInfo : public TargetCodeGenInfo {
   ASTContext 
 
-  const SystemZABIInfo () const {
-return static_cast(TargetCodeGenInfo::getABIInfo());
-  }
-
   // These are used for speeding up the search for a visible vector ABI.
   mutable bool HasVisibleVecABIFlag = false;
   mutable std::set SeenTypes;
@@ -7867,8 +7856,9 @@
 // it will be passed in a vector register. A wide (>16 bytes) vector will
 // be passed via "hidden" pointer where any extra alignment is not
 // required (per GCC).
-const Type *SingleEltTy =
-  getABIInfo().GetSingleElementType(QualType(Ty, 0)).getTypePtr();
+const Type *SingleEltTy = getABIInfo()
+  .GetSingleElementType(QualType(Ty, 0))
+  .getTypePtr();
 bool SingleVecEltStruct = SingleEltTy != Ty && SingleEltTy->isVectorType() &&
   Ctx.getTypeSize(SingleEltTy) == Ctx.getTypeSize(Ty);
 if (Ty->isVectorType() || SingleVecEltStruct)
@@ -11841,10 +11831,6 @@
 public:
   BPFTargetCodeGenInfo(CodeGenTypes )
   : TargetCodeGenInfo(std::make_unique(CGT)) {}
-
-  const BPFABIInfo () const {
-return static_cast(TargetCodeGenInfo::getABIInfo());
-  }
 };
 
 }
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[PATCH] D148091: [clang][CodeGen] Break up TargetInfo.cpp [3/8]

[Sergei Barannikov via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG940b02095bf9: [clang][CodeGen] Break up TargetInfo.cpp [3/8] 
(authored by barannikov88).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148091/new/

https://reviews.llvm.org/D148091

Files:
  clang/lib/CodeGen/TargetInfo.cpp


Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -5049,9 +5049,10 @@
llvm::Value *Address) const override;
 };
 
-class PPC64TargetCodeGenInfo : public DefaultTargetCodeGenInfo {
+class PPC64TargetCodeGenInfo : public TargetCodeGenInfo {
 public:
-  PPC64TargetCodeGenInfo(CodeGenTypes ) : DefaultTargetCodeGenInfo(CGT) {}
+  PPC64TargetCodeGenInfo(CodeGenTypes )
+  : TargetCodeGenInfo(std::make_unique(CGT)) {}
 
   int getDwarfEHStackPointer(CodeGen::CodeGenModule ) const override {
 // This is recovered from gcc output.
@@ -5061,7 +5062,6 @@
   bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction ,
llvm::Value *Address) const override;
 };
-
 }
 
 // Return true if the ABI requires Ty to be passed sign- or zero-
@@ -8584,10 +8584,10 @@
 
 namespace {
 
-class TCETargetCodeGenInfo : public DefaultTargetCodeGenInfo {
+class TCETargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   TCETargetCodeGenInfo(CodeGenTypes )
-: DefaultTargetCodeGenInfo(CGT) {}
+  : TargetCodeGenInfo(std::make_unique(CGT)) {}
 
   void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule ) const override;


Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -5049,9 +5049,10 @@
llvm::Value *Address) const override;
 };
 
-class PPC64TargetCodeGenInfo : public DefaultTargetCodeGenInfo {
+class PPC64TargetCodeGenInfo : public TargetCodeGenInfo {
 public:
-  PPC64TargetCodeGenInfo(CodeGenTypes ) : DefaultTargetCodeGenInfo(CGT) {}
+  PPC64TargetCodeGenInfo(CodeGenTypes )
+  : TargetCodeGenInfo(std::make_unique(CGT)) {}
 
   int getDwarfEHStackPointer(CodeGen::CodeGenModule ) const override {
 // This is recovered from gcc output.
@@ -5061,7 +5062,6 @@
   bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction ,
llvm::Value *Address) const override;
 };
-
 }
 
 // Return true if the ABI requires Ty to be passed sign- or zero-
@@ -8584,10 +8584,10 @@
 
 namespace {
 
-class TCETargetCodeGenInfo : public DefaultTargetCodeGenInfo {
+class TCETargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   TCETargetCodeGenInfo(CodeGenTypes )
-: DefaultTargetCodeGenInfo(CGT) {}
+  : TargetCodeGenInfo(std::make_unique(CGT)) {}
 
   void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule ) const override;
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[PATCH] D148090: [clang][CodeGen] Break up TargetInfo.cpp [2/8]

[Sergei Barannikov via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG5a646ed6835f: [clang][CodeGen] Break up TargetInfo.cpp [2/8] 
(authored by barannikov88).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148090/new/

https://reviews.llvm.org/D148090

Files:
  clang/lib/CodeGen/TargetInfo.cpp

Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -830,19 +830,18 @@
 // This is a very simple ABI that relies a lot on DefaultABIInfo.
 //===--===//
 
-class WebAssemblyABIInfo final : public ABIInfo {
-public:
-  enum ABIKind {
-MVP = 0,
-ExperimentalMV = 1,
-  };
+enum class WebAssemblyABIKind {
+  MVP = 0,
+  ExperimentalMV = 1,
+};
 
-private:
+class WebAssemblyABIInfo final : public ABIInfo {
   DefaultABIInfo defaultInfo;
-  ABIKind Kind;
+  WebAssemblyABIKind Kind;
 
 public:
-  explicit WebAssemblyABIInfo(CodeGen::CodeGenTypes , ABIKind Kind)
+  explicit WebAssemblyABIInfo(CodeGen::CodeGenTypes ,
+  WebAssemblyABIKind Kind)
   : ABIInfo(CGT), defaultInfo(CGT), Kind(Kind) {}
 
 private:
@@ -866,7 +865,7 @@
 class WebAssemblyTargetCodeGenInfo final : public TargetCodeGenInfo {
 public:
   explicit WebAssemblyTargetCodeGenInfo(CodeGen::CodeGenTypes ,
-WebAssemblyABIInfo::ABIKind K)
+WebAssemblyABIKind K)
   : TargetCodeGenInfo(std::make_unique(CGT, K)) {
 SwiftInfo =
 std::make_unique(CGT, /*SwiftErrorInRegister=*/false);
@@ -931,7 +930,7 @@
 if (const Type *SeltTy = isSingleElementStruct(Ty, getContext()))
   return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0)));
 // For the experimental multivalue ABI, fully expand all other aggregates
-if (Kind == ABIKind::ExperimentalMV) {
+if (Kind == WebAssemblyABIKind::ExperimentalMV) {
   const RecordType *RT = Ty->getAs();
   assert(RT);
   bool HasBitField = false;
@@ -964,7 +963,7 @@
   if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext()))
 return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0)));
   // For the experimental multivalue ABI, return all other aggregates
-  if (Kind == ABIKind::ExperimentalMV)
+  if (Kind == WebAssemblyABIKind::ExperimentalMV)
 return ABIArgInfo::getDirect();
 }
   }
@@ -4973,21 +4972,19 @@
 // PowerPC-64
 
 namespace {
+enum class PPC64_SVR4_ABIKind {
+  ELFv1 = 0,
+  ELFv2,
+};
+
 /// PPC64_SVR4_ABIInfo - The 64-bit PowerPC ELF (SVR4) ABI information.
 class PPC64_SVR4_ABIInfo : public ABIInfo {
-public:
-  enum ABIKind {
-ELFv1 = 0,
-ELFv2
-  };
-
-private:
   static const unsigned GPRBits = 64;
-  ABIKind Kind;
+  PPC64_SVR4_ABIKind Kind;
   bool IsSoftFloatABI;
 
 public:
-  PPC64_SVR4_ABIInfo(CodeGen::CodeGenTypes , ABIKind Kind,
+  PPC64_SVR4_ABIInfo(CodeGen::CodeGenTypes , PPC64_SVR4_ABIKind Kind,
  bool SoftFloatABI)
   : ABIInfo(CGT), Kind(Kind), IsSoftFloatABI(SoftFloatABI) {}
 
@@ -5035,8 +5032,7 @@
 class PPC64_SVR4_TargetCodeGenInfo : public TargetCodeGenInfo {
 
 public:
-  PPC64_SVR4_TargetCodeGenInfo(CodeGenTypes ,
-   PPC64_SVR4_ABIInfo::ABIKind Kind,
+  PPC64_SVR4_TargetCodeGenInfo(CodeGenTypes , PPC64_SVR4_ABIKind Kind,
bool SoftFloatABI)
   : TargetCodeGenInfo(
 std::make_unique(CGT, Kind, SoftFloatABI)) {
@@ -5135,7 +5131,7 @@
   // Likewise for ELFv2 homogeneous aggregates.
   const Type *Base = nullptr;
   uint64_t Members = 0;
-  if (!AlignAsType && Kind == ELFv2 &&
+  if (!AlignAsType && Kind == PPC64_SVR4_ABIKind::ELFv2 &&
   isAggregateTypeForABI(Ty) && isHomogeneousAggregate(Ty, Base, Members))
 AlignAsType = Base;
 
@@ -5329,7 +5325,7 @@
 // ELFv2 homogeneous aggregates are passed as array types.
 const Type *Base = nullptr;
 uint64_t Members = 0;
-if (Kind == ELFv2 &&
+if (Kind == PPC64_SVR4_ABIKind::ELFv2 &&
 isHomogeneousAggregate(Ty, Base, Members)) {
   llvm::Type *BaseTy = CGT.ConvertType(QualType(Base, 0));
   llvm::Type *CoerceTy = llvm::ArrayType::get(BaseTy, Members);
@@ -5399,7 +5395,7 @@
 // ELFv2 homogeneous aggregates are returned as array types.
 const Type *Base = nullptr;
 uint64_t Members = 0;
-if (Kind == ELFv2 &&
+if (Kind == PPC64_SVR4_ABIKind::ELFv2 &&
 isHomogeneousAggregate(RetTy, Base, Members)) {
   llvm::Type *BaseTy = CGT.ConvertType(QualType(Base, 0));
   llvm::Type *CoerceTy = llvm::ArrayType::get(BaseTy, Members);
@@ -5408,7 +5404,7 @@
 
 // ELFv2 small aggregates are returned in up to two registers.
 uint64_t Bits = 

[PATCH] D148089: [clang][CodeGen] Break up TargetInfo.cpp [1/8]

[Sergei Barannikov via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGf2492f7cf0b1: [clang][CodeGen] Break up TargetInfo.cpp [1/8] 
(authored by barannikov88).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148089/new/

https://reviews.llvm.org/D148089

Files:
  clang/lib/CodeGen/TargetInfo.cpp


Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -9056,13 +9056,17 @@
 
 namespace {
 class LanaiABIInfo : public DefaultABIInfo {
+  struct CCState {
+unsigned FreeRegs;
+  };
+
 public:
   LanaiABIInfo(CodeGen::CodeGenTypes ) : DefaultABIInfo(CGT) {}
 
   bool shouldUseInReg(QualType Ty, CCState ) const;
 
   void computeInfo(CGFunctionInfo ) const override {
-CCState State(FI);
+CCState State;
 // Lanai uses 4 registers to pass arguments unless the function has the
 // regparm attribute set.
 if (FI.getHasRegParm()) {
@@ -10074,6 +10078,10 @@
 namespace {
 
 class ARCABIInfo : public DefaultABIInfo {
+  struct CCState {
+unsigned FreeRegs;
+  };
+
 public:
   using DefaultABIInfo::DefaultABIInfo;
 
@@ -10096,7 +10104,7 @@
   }
 
   void computeInfo(CGFunctionInfo ) const override {
-CCState State(FI);
+CCState State;
 // ARC uses 8 registers to pass arguments.
 State.FreeRegs = 8;
 


Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -9056,13 +9056,17 @@
 
 namespace {
 class LanaiABIInfo : public DefaultABIInfo {
+  struct CCState {
+unsigned FreeRegs;
+  };
+
 public:
   LanaiABIInfo(CodeGen::CodeGenTypes ) : DefaultABIInfo(CGT) {}
 
   bool shouldUseInReg(QualType Ty, CCState ) const;
 
   void computeInfo(CGFunctionInfo ) const override {
-CCState State(FI);
+CCState State;
 // Lanai uses 4 registers to pass arguments unless the function has the
 // regparm attribute set.
 if (FI.getHasRegParm()) {
@@ -10074,6 +10078,10 @@
 namespace {
 
 class ARCABIInfo : public DefaultABIInfo {
+  struct CCState {
+unsigned FreeRegs;
+  };
+
 public:
   using DefaultABIInfo::DefaultABIInfo;
 
@@ -10096,7 +10104,7 @@
   }
 
   void computeInfo(CGFunctionInfo ) const override {
-CCState State(FI);
+CCState State;
 // ARC uses 8 registers to pass arguments.
 State.FreeRegs = 8;
 
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[clang] 940b020 - [clang][CodeGen] Break up TargetInfo.cpp [3/8]

[Sergei Barannikov via cfe-commits]

Author: Sergei Barannikov
Date: 2023-05-19T23:55:08+03:00
New Revision: 940b02095bf986b5bcc365dc97667a27176c3b13

URL: 
https://github.com/llvm/llvm-project/commit/940b02095bf986b5bcc365dc97667a27176c3b13
DIFF: 
https://github.com/llvm/llvm-project/commit/940b02095bf986b5bcc365dc97667a27176c3b13.diff

LOG: [clang][CodeGen] Break up TargetInfo.cpp [3/8]

Don't derive from `DefaultTargetCodeGenInfo`.
This class is going to stay in `TargetInfo.cpp`, whereas its derivants
are going to be moved to separate translation units. Just derive from
the base `TargetCodeGenInfo` class instead.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D148091

Added: 


Modified: 
clang/lib/CodeGen/TargetInfo.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/TargetInfo.cpp 
b/clang/lib/CodeGen/TargetInfo.cpp
index 078bd1087220..4a4426528c37 100644
--- a/clang/lib/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CodeGen/TargetInfo.cpp
@@ -5049,9 +5049,10 @@ class PPC64_SVR4_TargetCodeGenInfo : public 
TargetCodeGenInfo {
llvm::Value *Address) const override;
 };
 
-class PPC64TargetCodeGenInfo : public DefaultTargetCodeGenInfo {
+class PPC64TargetCodeGenInfo : public TargetCodeGenInfo {
 public:
-  PPC64TargetCodeGenInfo(CodeGenTypes ) : DefaultTargetCodeGenInfo(CGT) {}
+  PPC64TargetCodeGenInfo(CodeGenTypes )
+  : TargetCodeGenInfo(std::make_unique(CGT)) {}
 
   int getDwarfEHStackPointer(CodeGen::CodeGenModule ) const override {
 // This is recovered from gcc output.
@@ -5061,7 +5062,6 @@ class PPC64TargetCodeGenInfo : public 
DefaultTargetCodeGenInfo {
   bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction ,
llvm::Value *Address) const override;
 };
-
 }
 
 // Return true if the ABI requires Ty to be passed sign- or zero-
@@ -8584,10 +8584,10 @@ class AVRTargetCodeGenInfo : public TargetCodeGenInfo {
 
 namespace {
 
-class TCETargetCodeGenInfo : public DefaultTargetCodeGenInfo {
+class TCETargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   TCETargetCodeGenInfo(CodeGenTypes )
-: DefaultTargetCodeGenInfo(CGT) {}
+  : TargetCodeGenInfo(std::make_unique(CGT)) {}
 
   void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule ) const override;



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[clang] f60cc01 - [clang][CodeGen] Break up TargetInfo.cpp [5/8]

[Sergei Barannikov via cfe-commits]

Author: Sergei Barannikov
Date: 2023-05-19T23:55:21+03:00
New Revision: f60cc01e9e75785dd2476c7e05da689be5a99839

URL: 
https://github.com/llvm/llvm-project/commit/f60cc01e9e75785dd2476c7e05da689be5a99839
DIFF: 
https://github.com/llvm/llvm-project/commit/f60cc01e9e75785dd2476c7e05da689be5a99839.diff

LOG: [clang][CodeGen] Break up TargetInfo.cpp [5/8]

Make `occupiesMoreThan` a protected member of `SwiftABIInfo`.
This method is only used by implementations of `SwiftABIInfo`.
Making it protected will allow to use it after the implementations
are moved to dedicated cpp files.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D148093

Added: 


Modified: 
clang/lib/CodeGen/ABIInfo.h
clang/lib/CodeGen/TargetInfo.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/ABIInfo.h b/clang/lib/CodeGen/ABIInfo.h
index 5ce9eab7fc87..3caad8fe9dea 100644
--- a/clang/lib/CodeGen/ABIInfo.h
+++ b/clang/lib/CodeGen/ABIInfo.h
@@ -117,6 +117,9 @@ class SwiftABIInfo {
   CodeGenTypes 
   bool SwiftErrorInRegister;
 
+  bool occupiesMoreThan(ArrayRef scalarTypes,
+unsigned maxAllRegisters) const;
+
 public:
   SwiftABIInfo(CodeGen::CodeGenTypes , bool SwiftErrorInRegister)
   : CGT(CGT), SwiftErrorInRegister(SwiftErrorInRegister) {}

diff  --git a/clang/lib/CodeGen/TargetInfo.cpp 
b/clang/lib/CodeGen/TargetInfo.cpp
index 7cd22bfb30a3..3d56d0e0b012 100644
--- a/clang/lib/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CodeGen/TargetInfo.cpp
@@ -125,7 +125,7 @@ SwiftABIInfo::~SwiftABIInfo() = default;
 /// registers when expanded?
 ///
 /// This is intended to be the basis of a reasonable basic implementation
-/// of should{Pass,Return}IndirectlyForSwift.
+/// of should{Pass,Return}Indirectly.
 ///
 /// For most targets, a limit of four total registers is reasonable; this
 /// limits the amount of code required in order to move around the value
@@ -134,15 +134,14 @@ SwiftABIInfo::~SwiftABIInfo() = default;
 /// immediately within the callee.  But some targets may need to further
 /// limit the register count due to an inability to support that many
 /// return registers.
-static bool occupiesMoreThan(CodeGenTypes ,
- ArrayRef scalarTypes,
- unsigned maxAllRegisters) {
+bool SwiftABIInfo::occupiesMoreThan(ArrayRef scalarTypes,
+unsigned maxAllRegisters) const {
   unsigned intCount = 0, fpCount = 0;
   for (llvm::Type *type : scalarTypes) {
 if (type->isPointerTy()) {
   intCount++;
 } else if (auto intTy = dyn_cast(type)) {
-  auto ptrWidth = cgt.getTarget().getPointerWidth(LangAS::Default);
+  auto ptrWidth = CGT.getTarget().getPointerWidth(LangAS::Default);
   intCount += (intTy->getBitWidth() + ptrWidth - 1) / ptrWidth;
 } else {
   assert(type->isVectorTy() || type->isFloatingPointTy());
@@ -155,7 +154,7 @@ static bool occupiesMoreThan(CodeGenTypes ,
 
 bool SwiftABIInfo::shouldPassIndirectly(ArrayRef ComponentTys,
 bool AsReturnValue) const {
-  return occupiesMoreThan(CGT, ComponentTys, /*total=*/4);
+  return occupiesMoreThan(ComponentTys, /*total=*/4);
 }
 
 bool SwiftABIInfo::isLegalVectorType(CharUnits VectorSize, llvm::Type *EltTy,
@@ -1248,7 +1247,7 @@ class X86_32SwiftABIInfo : public SwiftABIInfo {
 // integer registers and three fp registers.  Oddly, it'll use up to
 // four vector registers for vectors, but those can overlap with the
 // scalar registers.
-return occupiesMoreThan(CGT, ComponentTys, /*total=*/3);
+return occupiesMoreThan(ComponentTys, /*total=*/3);
   }
 };
 



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[clang] 0a86e05 - [clang][CodeGen] Break up TargetInfo.cpp [4/8]

[Sergei Barannikov via cfe-commits]

Author: Sergei Barannikov
Date: 2023-05-19T23:55:15+03:00
New Revision: 0a86e05d1da0f544920b1eff6656c5577fb6562f

URL: 
https://github.com/llvm/llvm-project/commit/0a86e05d1da0f544920b1eff6656c5577fb6562f
DIFF: 
https://github.com/llvm/llvm-project/commit/0a86e05d1da0f544920b1eff6656c5577fb6562f.diff

LOG: [clang][CodeGen] Break up TargetInfo.cpp [4/8]

Remove `getABIInfo` overrides returning references to target-specific
implementations of `ABIInfo`.
The methods may be convenient, but they are only used in one place and
prevent from `ABIInfo` implementations from being put into anonymous
namespaces in different cpp files.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D148092

Added: 


Modified: 
clang/lib/CodeGen/TargetInfo.cpp
clang/lib/CodeGen/TargetInfo.h

Removed: 




diff  --git a/clang/lib/CodeGen/TargetInfo.cpp 
b/clang/lib/CodeGen/TargetInfo.cpp
index 4a4426528c37..7cd22bfb30a3 100644
--- a/clang/lib/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CodeGen/TargetInfo.cpp
@@ -2476,10 +2476,6 @@ class X86_64TargetCodeGenInfo : public TargetCodeGenInfo 
{
 std::make_unique(CGT, /*SwiftErrorInRegister=*/true);
   }
 
-  const X86_64ABIInfo () const {
-return static_cast(TargetCodeGenInfo::getABIInfo());
-  }
-
   /// Disable tail call on x86-64. The epilogue code before the tail jump 
blocks
   /// autoreleaseRV/retainRV and autoreleaseRV/unsafeClaimRV optimizations.
   bool markARCOptimizedReturnCallsAsNoTail() const override { return true; }
@@ -2516,7 +2512,7 @@ class X86_64TargetCodeGenInfo : public TargetCodeGenInfo {
   bool HasAVXType = false;
   for (CallArgList::const_iterator
  it = args.begin(), ie = args.end(); it != ie; ++it) {
-if (getABIInfo().isPassedUsingAVXType(it->Ty)) {
+if (getABIInfo().isPassedUsingAVXType(it->Ty)) {
   HasAVXType = true;
   break;
 }
@@ -6388,10 +6384,6 @@ class ARMTargetCodeGenInfo : public TargetCodeGenInfo {
 SwiftInfo = std::make_unique(CGT);
   }
 
-  const ARMABIInfo () const {
-return static_cast(TargetCodeGenInfo::getABIInfo());
-  }
-
   int getDwarfEHStackPointer(CodeGen::CodeGenModule ) const override {
 return 13;
   }
@@ -6410,7 +6402,8 @@ class ARMTargetCodeGenInfo : public TargetCodeGenInfo {
   }
 
   unsigned getSizeOfUnwindException() const override {
-if (getABIInfo().isEABI()) return 88;
+if (getABIInfo().isEABI())
+  return 88;
 return TargetCodeGenInfo::getSizeOfUnwindException();
   }
 
@@ -6477,7 +6470,7 @@ class ARMTargetCodeGenInfo : public TargetCodeGenInfo {
 
 Fn->addFnAttr("interrupt", Kind);
 
-ARMABIKind ABI = cast(getABIInfo()).getABIKind();
+ARMABIKind ABI = getABIInfo().getABIKind();
 if (ABI == ARMABIKind::APCS)
   return;
 
@@ -7415,10 +7408,6 @@ class SystemZABIInfo : public ABIInfo {
 class SystemZTargetCodeGenInfo : public TargetCodeGenInfo {
   ASTContext 
 
-  const SystemZABIInfo () const {
-return static_cast(TargetCodeGenInfo::getABIInfo());
-  }
-
   // These are used for speeding up the search for a visible vector ABI.
   mutable bool HasVisibleVecABIFlag = false;
   mutable std::set SeenTypes;
@@ -7867,8 +7856,9 @@ bool SystemZTargetCodeGenInfo::isVectorTypeBased(const 
Type *Ty,
 // it will be passed in a vector register. A wide (>16 bytes) vector will
 // be passed via "hidden" pointer where any extra alignment is not
 // required (per GCC).
-const Type *SingleEltTy =
-  getABIInfo().GetSingleElementType(QualType(Ty, 0)).getTypePtr();
+const Type *SingleEltTy = getABIInfo()
+  .GetSingleElementType(QualType(Ty, 0))
+  .getTypePtr();
 bool SingleVecEltStruct = SingleEltTy != Ty && SingleEltTy->isVectorType() 
&&
   Ctx.getTypeSize(SingleEltTy) == Ctx.getTypeSize(Ty);
 if (Ty->isVectorType() || SingleVecEltStruct)
@@ -11841,10 +11831,6 @@ class BPFTargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   BPFTargetCodeGenInfo(CodeGenTypes )
   : TargetCodeGenInfo(std::make_unique(CGT)) {}
-
-  const BPFABIInfo () const {
-return static_cast(TargetCodeGenInfo::getABIInfo());
-  }
 };
 
 }

diff  --git a/clang/lib/CodeGen/TargetInfo.h b/clang/lib/CodeGen/TargetInfo.h
index 7b5532eaf7b6..7637e55ccf41 100644
--- a/clang/lib/CodeGen/TargetInfo.h
+++ b/clang/lib/CodeGen/TargetInfo.h
@@ -52,6 +52,11 @@ class TargetCodeGenInfo {
   // by returning true from TargetInfo::checkCallingConvention for them.
   std::unique_ptr SwiftInfo;
 
+  // Returns ABI info helper for the target. This is for use by derived 
classes.
+  template  const T () const {
+return static_cast(*Info);
+  }
+
 public:
   TargetCodeGenInfo(std::unique_ptr Info);
   virtual ~TargetCodeGenInfo();



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[clang] 5a646ed - [clang][CodeGen] Break up TargetInfo.cpp [2/8]

[Sergei Barannikov via cfe-commits]

Author: Sergei Barannikov
Date: 2023-05-19T23:55:02+03:00
New Revision: 5a646ed6835f2686cc0574047ce3c9bbaf323ea3

URL: 
https://github.com/llvm/llvm-project/commit/5a646ed6835f2686cc0574047ce3c9bbaf323ea3
DIFF: 
https://github.com/llvm/llvm-project/commit/5a646ed6835f2686cc0574047ce3c9bbaf323ea3.diff

LOG: [clang][CodeGen] Break up TargetInfo.cpp [2/8]

Move `ABIKind` enums out of `*ABIInfo` classes to break the dependency
between `getTargetCodeGenInfo` and the classes.
This will allow to move the classes to different cpp files.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D148090

Added: 


Modified: 
clang/lib/CodeGen/TargetInfo.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/TargetInfo.cpp 
b/clang/lib/CodeGen/TargetInfo.cpp
index 5514161da230..078bd1087220 100644
--- a/clang/lib/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CodeGen/TargetInfo.cpp
@@ -830,19 +830,18 @@ ABIArgInfo DefaultABIInfo::classifyReturnType(QualType 
RetTy) const {
 // This is a very simple ABI that relies a lot on DefaultABIInfo.
 
//===--===//
 
-class WebAssemblyABIInfo final : public ABIInfo {
-public:
-  enum ABIKind {
-MVP = 0,
-ExperimentalMV = 1,
-  };
+enum class WebAssemblyABIKind {
+  MVP = 0,
+  ExperimentalMV = 1,
+};
 
-private:
+class WebAssemblyABIInfo final : public ABIInfo {
   DefaultABIInfo defaultInfo;
-  ABIKind Kind;
+  WebAssemblyABIKind Kind;
 
 public:
-  explicit WebAssemblyABIInfo(CodeGen::CodeGenTypes , ABIKind Kind)
+  explicit WebAssemblyABIInfo(CodeGen::CodeGenTypes ,
+  WebAssemblyABIKind Kind)
   : ABIInfo(CGT), defaultInfo(CGT), Kind(Kind) {}
 
 private:
@@ -866,7 +865,7 @@ class WebAssemblyABIInfo final : public ABIInfo {
 class WebAssemblyTargetCodeGenInfo final : public TargetCodeGenInfo {
 public:
   explicit WebAssemblyTargetCodeGenInfo(CodeGen::CodeGenTypes ,
-WebAssemblyABIInfo::ABIKind K)
+WebAssemblyABIKind K)
   : TargetCodeGenInfo(std::make_unique(CGT, K)) {
 SwiftInfo =
 std::make_unique(CGT, /*SwiftErrorInRegister=*/false);
@@ -931,7 +930,7 @@ ABIArgInfo 
WebAssemblyABIInfo::classifyArgumentType(QualType Ty) const {
 if (const Type *SeltTy = isSingleElementStruct(Ty, getContext()))
   return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0)));
 // For the experimental multivalue ABI, fully expand all other aggregates
-if (Kind == ABIKind::ExperimentalMV) {
+if (Kind == WebAssemblyABIKind::ExperimentalMV) {
   const RecordType *RT = Ty->getAs();
   assert(RT);
   bool HasBitField = false;
@@ -964,7 +963,7 @@ ABIArgInfo WebAssemblyABIInfo::classifyReturnType(QualType 
RetTy) const {
   if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext()))
 return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0)));
   // For the experimental multivalue ABI, return all other aggregates
-  if (Kind == ABIKind::ExperimentalMV)
+  if (Kind == WebAssemblyABIKind::ExperimentalMV)
 return ABIArgInfo::getDirect();
 }
   }
@@ -4973,21 +4972,19 @@ 
PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction ,
 // PowerPC-64
 
 namespace {
+enum class PPC64_SVR4_ABIKind {
+  ELFv1 = 0,
+  ELFv2,
+};
+
 /// PPC64_SVR4_ABIInfo - The 64-bit PowerPC ELF (SVR4) ABI information.
 class PPC64_SVR4_ABIInfo : public ABIInfo {
-public:
-  enum ABIKind {
-ELFv1 = 0,
-ELFv2
-  };
-
-private:
   static const unsigned GPRBits = 64;
-  ABIKind Kind;
+  PPC64_SVR4_ABIKind Kind;
   bool IsSoftFloatABI;
 
 public:
-  PPC64_SVR4_ABIInfo(CodeGen::CodeGenTypes , ABIKind Kind,
+  PPC64_SVR4_ABIInfo(CodeGen::CodeGenTypes , PPC64_SVR4_ABIKind Kind,
  bool SoftFloatABI)
   : ABIInfo(CGT), Kind(Kind), IsSoftFloatABI(SoftFloatABI) {}
 
@@ -5035,8 +5032,7 @@ class PPC64_SVR4_ABIInfo : public ABIInfo {
 class PPC64_SVR4_TargetCodeGenInfo : public TargetCodeGenInfo {
 
 public:
-  PPC64_SVR4_TargetCodeGenInfo(CodeGenTypes ,
-   PPC64_SVR4_ABIInfo::ABIKind Kind,
+  PPC64_SVR4_TargetCodeGenInfo(CodeGenTypes , PPC64_SVR4_ABIKind Kind,
bool SoftFloatABI)
   : TargetCodeGenInfo(
 std::make_unique(CGT, Kind, SoftFloatABI)) {
@@ -5135,7 +5131,7 @@ CharUnits 
PPC64_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
   // Likewise for ELFv2 homogeneous aggregates.
   const Type *Base = nullptr;
   uint64_t Members = 0;
-  if (!AlignAsType && Kind == ELFv2 &&
+  if (!AlignAsType && Kind == PPC64_SVR4_ABIKind::ELFv2 &&
   isAggregateTypeForABI(Ty) && isHomogeneousAggregate(Ty, Base, Members))
 AlignAsType = Base;
 
@@ -5329,7 +5325,7 @@ PPC64_SVR4_ABIInfo::classifyArgumentType(QualType Ty) 
const {
 // 

[clang] f2492f7 - [clang][CodeGen] Break up TargetInfo.cpp [1/8]

[Sergei Barannikov via cfe-commits]

Author: Sergei Barannikov
Date: 2023-05-19T23:54:55+03:00
New Revision: f2492f7cf0b175d5d9403cbfc970a521adbde659

URL: 
https://github.com/llvm/llvm-project/commit/f2492f7cf0b175d5d9403cbfc970a521adbde659
DIFF: 
https://github.com/llvm/llvm-project/commit/f2492f7cf0b175d5d9403cbfc970a521adbde659.diff

LOG: [clang][CodeGen] Break up TargetInfo.cpp [1/8]

`CCState` is a helper class originally used by the x86 implementation
but has since been abused by other implementations.
Remove this dependency by implementing customized versions of the class
for implementations that need such functionality.

Reviewed By: efriedma, MaskRay

Differential Revision: https://reviews.llvm.org/D148089

Added: 


Modified: 
clang/lib/CodeGen/TargetInfo.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/TargetInfo.cpp 
b/clang/lib/CodeGen/TargetInfo.cpp
index 13c2a6b65f76..5514161da230 100644
--- a/clang/lib/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CodeGen/TargetInfo.cpp
@@ -9056,13 +9056,17 @@ Address HexagonABIInfo::EmitVAArg(CodeGenFunction , 
Address VAListAddr,
 
 namespace {
 class LanaiABIInfo : public DefaultABIInfo {
+  struct CCState {
+unsigned FreeRegs;
+  };
+
 public:
   LanaiABIInfo(CodeGen::CodeGenTypes ) : DefaultABIInfo(CGT) {}
 
   bool shouldUseInReg(QualType Ty, CCState ) const;
 
   void computeInfo(CGFunctionInfo ) const override {
-CCState State(FI);
+CCState State;
 // Lanai uses 4 registers to pass arguments unless the function has the
 // regparm attribute set.
 if (FI.getHasRegParm()) {
@@ -10074,6 +10078,10 @@ 
SparcV9TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction ,
 namespace {
 
 class ARCABIInfo : public DefaultABIInfo {
+  struct CCState {
+unsigned FreeRegs;
+  };
+
 public:
   using DefaultABIInfo::DefaultABIInfo;
 
@@ -10096,7 +10104,7 @@ class ARCABIInfo : public DefaultABIInfo {
   }
 
   void computeInfo(CGFunctionInfo ) const override {
-CCState State(FI);
+CCState State;
 // ARC uses 8 registers to pass arguments.
 State.FreeRegs = 8;
 



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[PATCH] D150998: [OpenMP] Fix using the target ID when using the new driver

[Joseph Huber via Phabricator via cfe-commits]

jhuber6 created this revision.
jhuber6 added reviewers: JonChesterfield, carlo.bertolli, yaxunl, saiislam.
Herald added subscribers: sunshaoce, kerbowa, guansong, tpr, jvesely.
Herald added a project: All.
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Herald added a project: clang.

AMDGPU sometimes uses a novel formatting for their offloading
architecture called the target id. This merges the attributes and the
architecture name into a single string. Previously, we were passing this
as the canonical architecture name. This caused the linker wrapper to
fail to find relevant libraries and then pass an incalid CPU name. This
patch changes the handling in the offload packager to handle the
canonical architecture and then extract the features.


Repository:
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https://reviews.llvm.org/D150998

Files:
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/amdgpu-openmp-toolchain.c


Index: clang/test/Driver/amdgpu-openmp-toolchain.c
===
--- clang/test/Driver/amdgpu-openmp-toolchain.c
+++ clang/test/Driver/amdgpu-openmp-toolchain.c
@@ -62,3 +62,7 @@
 // RUN:   --rocm-device-lib-path=%S/Inputs/rocm/amdgcn/bitcode 
-fopenmp-new-driver %s  2>&1 | \
 // RUN: FileCheck %s --check-prefix=CHECK-LIB-DEVICE-NOGPULIB
 // CHECK-LIB-DEVICE-NOGPULIB-NOT: "-cc1" 
{{.*}}ocml.bc"{{.*}}ockl.bc"{{.*}}oclc_daz_opt_on.bc"{{.*}}oclc_unsafe_math_off.bc"{{.*}}oclc_finite_only_off.bc"{{.*}}oclc_correctly_rounded_sqrt_on.bc"{{.*}}oclc_wavefrontsize64_on.bc"{{.*}}oclc_isa_version_803.bc"
+
+// RUN: %clang -### -target x86_64-pc-linux-gnu -fopenmp 
--offload-arch=gfx90a:sramecc-:xnack+ \
+// RUN:   -nogpulib %s 2>&1 | FileCheck %s --check-prefix=CHECK-TARGET-ID
+// CHECK-TARGET-ID: 
clang-offload-packager{{.*}}arch=gfx90a,kind=openmp,feature=-sramecc,feature=+xnack
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -8449,7 +8449,7 @@
 C.getArgsForToolChain(TC, OffloadAction->getOffloadingArch(),
   OffloadAction->getOffloadingDeviceKind());
 StringRef File = C.getArgs().MakeArgString(TC->getInputFilename(Input));
-StringRef Arch = (OffloadAction->getOffloadingArch())
+StringRef Arch = OffloadAction->getOffloadingArch()
  ? OffloadAction->getOffloadingArch()
  : TCArgs.getLastArgValue(options::OPT_march_EQ);
 StringRef Kind =
@@ -8462,14 +8462,22 @@
 llvm::copy_if(Features, std::back_inserter(FeatureArgs),
   [](StringRef Arg) { return !Arg.startswith("-target"); });
 
+if (TC->getTriple().isAMDGPU()) {
+  for (StringRef Feature : llvm::split(Arch.split(':').second, ':')) {
+FeatureArgs.emplace_back(
+Args.MakeArgString(Feature.take_back() + Feature.drop_back()));
+  }
+}
+
 SmallVector Parts{
 "file=" + File.str(),
 "triple=" + TC->getTripleString(),
-"arch=" + Arch.str(),
+"arch=" + getProcessorFromTargetID(TC->getTriple(), Arch).str(),
 "kind=" + Kind.str(),
 };
 
-if (TC->getDriver().isUsingLTO(/* IsOffload */ true))
+if (TC->getDriver().isUsingLTO(/* IsOffload */ true) ||
+TC->getTriple().isAMDGPU())
   for (StringRef Feature : FeatureArgs)
 Parts.emplace_back("feature=" + Feature.str());
 


Index: clang/test/Driver/amdgpu-openmp-toolchain.c
===
--- clang/test/Driver/amdgpu-openmp-toolchain.c
+++ clang/test/Driver/amdgpu-openmp-toolchain.c
@@ -62,3 +62,7 @@
 // RUN:   --rocm-device-lib-path=%S/Inputs/rocm/amdgcn/bitcode -fopenmp-new-driver %s  2>&1 | \
 // RUN: FileCheck %s --check-prefix=CHECK-LIB-DEVICE-NOGPULIB
 // CHECK-LIB-DEVICE-NOGPULIB-NOT: "-cc1" {{.*}}ocml.bc"{{.*}}ockl.bc"{{.*}}oclc_daz_opt_on.bc"{{.*}}oclc_unsafe_math_off.bc"{{.*}}oclc_finite_only_off.bc"{{.*}}oclc_correctly_rounded_sqrt_on.bc"{{.*}}oclc_wavefrontsize64_on.bc"{{.*}}oclc_isa_version_803.bc"
+
+// RUN: %clang -### -target x86_64-pc-linux-gnu -fopenmp --offload-arch=gfx90a:sramecc-:xnack+ \
+// RUN:   -nogpulib %s 2>&1 | FileCheck %s --check-prefix=CHECK-TARGET-ID
+// CHECK-TARGET-ID: clang-offload-packager{{.*}}arch=gfx90a,kind=openmp,feature=-sramecc,feature=+xnack
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -8449,7 +8449,7 @@
 C.getArgsForToolChain(TC, OffloadAction->getOffloadingArch(),
   OffloadAction->getOffloadingDeviceKind());
 StringRef File = C.getArgs().MakeArgString(TC->getInputFilename(Input));
-StringRef Arch = 

[PATCH] D150931: [NFC][Clang][Coverity] Fix Static Code Analysis Concerns with copy without assign

[Aaron Puchert via Phabricator via cfe-commits]

aaronpuchert added a comment.

Can only comment on `ThreadSafetyTIL.h`. Thanks for addressing this, I agree 
that these expressions should not be assignable.




Comment at: clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h:323-324
 
+  // The copy assignment operator is defined as deleted pending further
+  // motivation.
+  SExpr =(const SExpr &) = delete;

We can probably even drop the comment. Types in an inheritance hierarchy tend 
to be not assignable, and I don't see why it would ever be needed for what 
amounts to be AST nodes.



Comment at: clang/include/clang/Analysis/Analyses/ThreadSafetyTIL.h:387-389
+  // The copy assignment operator is defined as deleted pending further
+  // motivation.
+  Variable =(const Variable &) = delete;

My understanding is that deleting copy assignment on the base class 
automatically deletes it for the derived classes, so I'd appreciate if we could 
drop this and the following additions. That's just noise in my view.

Also, most of these classes don't seem to have a user-declared copy 
constructor, or am I missing something?


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[PATCH] D148387: remove Demangle/StringView.h

[Nick Desaulniers via Phabricator via cfe-commits]

nickdesaulniers updated this revision to Diff 523923.
nickdesaulniers added a comment.

- rebase


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
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Files:
  clang/docs/tools/clang-formatted-files.txt
  libcxxabi/src/demangle/StringView.h
  libcxxabi/src/demangle/cp-to-llvm.sh
  llvm/include/llvm/Demangle/StringView.h
  llvm/unittests/Demangle/CMakeLists.txt
  llvm/unittests/Demangle/StringViewTest.cpp

Index: llvm/unittests/Demangle/StringViewTest.cpp
===
--- llvm/unittests/Demangle/StringViewTest.cpp
+++ /dev/null
@@ -1,48 +0,0 @@
-//===- llvm/unittest/StringViewTest.cpp - StringView unit tests ---===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===--===//
-
-#include "llvm/Demangle/StringView.h"
-#include "gtest/gtest.h"
-
-using namespace llvm;
-using llvm::itanium_demangle::StringView;
-
-namespace llvm {
-namespace itanium_demangle {
-
-std::ostream <<(std::ostream , const StringView ) {
-  return OS.write(S.begin(), S.size());
-}
-
-} // namespace itanium_demangle
-} // namespace llvm
-
-TEST(StringViewTest, EmptyInitializerList) {
-  StringView S = {};
-  EXPECT_TRUE(S.empty());
-
-  S = {};
-  EXPECT_TRUE(S.empty());
-}
-
-TEST(StringViewTest, Substr) {
-  StringView S("abcdef");
-
-  EXPECT_EQ("abcdef", S.substr(0));
-  EXPECT_EQ("f", S.substr(5));
-  EXPECT_EQ("", S.substr(6));
-
-  EXPECT_EQ("", S.substr(0, 0));
-  EXPECT_EQ("a", S.substr(0, 1));
-  EXPECT_EQ("abcde", S.substr(0, 5));
-  EXPECT_EQ("abcdef", S.substr(0, 6));
-  EXPECT_EQ("abcdef", S.substr(0, 7));
-
-  EXPECT_EQ("f", S.substr(5, 100));
-  EXPECT_EQ("", S.substr(6, 100));
-}
Index: llvm/unittests/Demangle/CMakeLists.txt
===
--- llvm/unittests/Demangle/CMakeLists.txt
+++ llvm/unittests/Demangle/CMakeLists.txt
@@ -10,5 +10,4 @@
   OutputBufferTest.cpp
   PartialDemangleTest.cpp
   RustDemangleTest.cpp
-  StringViewTest.cpp
 )
Index: llvm/include/llvm/Demangle/StringView.h
===
--- llvm/include/llvm/Demangle/StringView.h
+++ /dev/null
@@ -1,98 +0,0 @@
-//===--- StringView.h *- mode:c++;eval:(read-only-mode) -*-===//
-//   Do not edit! See README.txt.
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===--===//
-//
-// FIXME: Use std::string_view instead when we support C++17.
-// There are two copies of this file in the source tree.  The one under
-// libcxxabi is the original and the one under llvm is the copy.  Use
-// cp-to-llvm.sh to update the copy.  See README.txt for more details.
-//
-//===--===//
-
-#ifndef DEMANGLE_STRINGVIEW_H
-#define DEMANGLE_STRINGVIEW_H
-
-#include "DemangleConfig.h"
-#include 
-#include 
-
-DEMANGLE_NAMESPACE_BEGIN
-
-class StringView {
-  const char *First;
-  const char *Last;
-
-public:
-  static const size_t npos = ~size_t(0);
-
-  template 
-  StringView(const char ()[N]) : First(Str), Last(Str + N - 1) {}
-  StringView(const char *First_, size_t Len)
-  : First(First_), Last(First_ + Len) {}
-  StringView(const char *Str) : First(Str), Last(Str + std::strlen(Str)) {}
-  StringView() : First(nullptr), Last(nullptr) {}
-
-  StringView substr(size_t Pos, size_t Len = npos) const {
-assert(Pos <= size());
-if (Len > size() - Pos)
-  Len = size() - Pos;
-return StringView(begin() + Pos, Len);
-  }
-
-  size_t find(char C, size_t From = 0) const {
-// Avoid calling memchr with nullptr.
-if (From < size()) {
-  // Just forward to memchr, which is faster than a hand-rolled loop.
-  if (const void *P = ::memchr(First + From, C, size() - From))
-return size_t(static_cast(P) - First);
-}
-return npos;
-  }
-
-  void remove_prefix(size_t N) {
-assert(size() >= N);
-First += N;
-  }
-  void remove_suffix(size_t N) {
-assert(size() >= N);
-Last -= N;
-  }
-
-  char front() const {
-assert(!empty());
-return *begin();
-  }
-
-  char back() const {
-assert(!empty());
-return *(end() - 1);
-  }
-
-  bool startsWith(char C) const { return !empty() && *begin() == C; }
-
-  bool startsWith(StringView Str) const {
-if (Str.size() > size())
-  return false;
-return std::strncmp(Str.begin(), begin(), Str.size()) == 0;
-  }
-
-  const char [](size_t Idx) const { return *(begin() + Idx); }
-
-  

[PATCH] D148851: Disable llvm-symbolizer on some of the driver tests that are timing out

[David Blaikie via Phabricator via cfe-commits]

dblaikie added a comment.

In D148851#4285705 , @dblaikie wrote:

>> I think we probably should add LLVM_DISABLE_SYMBOLIZATION=1 to the lit 
>> level, not in individual tests.
>
> Though I'm not sure how  to do that in a way that it doesn't apply to test 
> that are genuinely failing, where a symbolized backtrace is 
> helpful/important/exactly what want?

Ping @MaskRay thoughts on the tension between disabling it entirely, and it 
being useful for developers investigating real failures?


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[PATCH] D150996: LLVM_FALLTHROUGH => [[fallthrough]]. NFC

[Craig Topper via Phabricator via cfe-commits]

craig.topper created this revision.
craig.topper added a reviewer: MaskRay.
Herald added subscribers: ThomasRaoux, kbarton, hiraditya, nemanjai.
Herald added a project: All.
craig.topper requested review of this revision.
Herald added a reviewer: zuban32.
Herald added subscribers: lldb-commits, cfe-commits, pcwang-thead.
Herald added a reviewer: mpaszkowski.
Herald added projects: clang, LLDB, LLVM.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D150996

Files:
  clang/lib/AST/TemplateBase.cpp
  clang/lib/Basic/SourceManager.cpp
  clang/lib/Sema/SemaChecking.cpp
  lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
  llvm/lib/Analysis/MemoryLocation.cpp
  llvm/lib/Analysis/ScalarEvolution.cpp
  llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
  llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
  llvm/lib/ProfileData/InstrProf.cpp
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCRegisterInfo.h
  llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
  llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

Index: llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
===
--- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -8487,7 +8487,7 @@
   Ops[1] = SafeRHS;
   return new VPWidenRecipe(*I, make_range(Ops.begin(), Ops.end()));
 }
-LLVM_FALLTHROUGH;
+[[fallthrough]];
   }
   case Instruction::Add:
   case Instruction::And:
Index: llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
===
--- llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
+++ llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
@@ -55,7 +55,7 @@
   switch (Intrinsic) {
   case Intrinsic::spv_load:
 AlignIdx = 2;
-LLVM_FALLTHROUGH;
+[[fallthrough]];
   case Intrinsic::spv_store: {
 if (I.getNumOperands() >= AlignIdx + 1) {
   auto *AlignOp = cast(I.getOperand(AlignIdx));
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.h
===
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.h
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.h
@@ -183,7 +183,7 @@
   case 'f':
 if (RegName[1] == 'p')
   return RegName + 2;
-LLVM_FALLTHROUGH;
+[[fallthrough]];
   case 'r':
   case 'v':
 if (RegName[1] == 's') {
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -10686,7 +10686,7 @@
   RetOps.push_back(Extract);
   return DAG.getMergeValues(RetOps, dl);
 }
-LLVM_FALLTHROUGH;
+[[fallthrough]];
   }
   case Intrinsic::ppc_vsx_disassemble_pair: {
 int NumVecs = 2;
Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
===
--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -3994,7 +3994,7 @@
   if (SRLConst && SRLConst->getSExtValue() == 16)
 return false;
 }
-LLVM_FALLTHROUGH;
+[[fallthrough]];
   case ISD::ROTL:
   case ISD::SHL:
   case ISD::AND:
Index: llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
===
--- llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -2523,7 +2523,7 @@
   return 2 * LT.first;
 if (!Ty->getScalarType()->isFP128Ty())
   return LT.first;
-LLVM_FALLTHROUGH;
+[[fallthrough]];
   case ISD::FMUL:
   case ISD::FDIV:
 // These nodes are marked as 'custom' just to lower them to SVE.
Index: llvm/lib/ProfileData/InstrProf.cpp
===
--- llvm/lib/ProfileData/InstrProf.cpp
+++ llvm/lib/ProfileData/InstrProf.cpp
@@ -1385,7 +1385,7 @@
   case 10ull:
 H.TemporalProfTracesOffset =
 read(Buffer, offsetOf(::TemporalProfTracesOffset));
-LLVM_FALLTHROUGH;
+[[fallthrough]];
   case 9ull:
 H.BinaryIdOffset = read(Buffer, offsetOf(::BinaryIdOffset));
 [[fallthrough]];
Index: llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
===
--- llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+++ llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
@@ -2420,7 +2420,7 @@
   case OMPScheduleType::BaseRuntimeSimd:
 assert(!ChunkSize &&
"schedule type does not support user-defined chunk sizes");
-LLVM_FALLTHROUGH;
+[[fallthrough]];
   case OMPScheduleType::BaseDynamicChunked:
   case OMPScheduleType::BaseGuidedChunked:
   case OMPScheduleType::BaseGuidedIterativeChunked:
Index: 

[PATCH] D143984: [DebugMetadata] Simplify handling subprogram's retainedNodes field. NFCI (1/7)

[David Blaikie via Phabricator via cfe-commits]

dblaikie added a comment.

Looks like this series got approved - is it waiting on any particular feedback, 
or do you need someone to commit it for you?


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[PATCH] D150746: [CodeGen]Translating pointer arguments can require an address space cast

[John McCall via Phabricator via cfe-commits]

rjmccall added a comment.

It's well-formed as IR, just not semantically valid, right?  As long as it's 
not actually crashing in the verifier, please test as much as you reasonably 
can that's correct, like that the constructor and destructor functions take 
something in the right address space, and that calls to them pass a valid VTT.  
And then yeah, when you pull a v-table out and try to assign it, that much will 
be incorrect until your next fix, but that's okay.


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[PATCH] D146773: [-Wunsafe-buffer-usage] Make raw (ungrouped) warnings a bit more verbose.

[Artem Dergachev via Phabricator via cfe-commits]

NoQ added inline comments.



Comment at: clang/include/clang/Basic/DiagnosticSemaKinds.td:11786
+  "%select{"
+"unsafe operation on raw pointer in expression|"
+"unsafe arithmetic on raw pointer|"

NoQ wrote:
> malavikasamak wrote:
> > NoQ wrote:
> > > The first mode doesn't show up in any tests and it's probably dead code 
> > > at this point.
> > What do you think of specifying the variable name in these warnings? It 
> > could be helpful when there are more than one DREs in a statement.  
> These warnings are emitted only when we *cannot* identify the variable; 
> either because it's not there at all, or we don't know how to find it. If we 
> could figure out the variable, we'd be emitting `warn_unsafe_buffer_variable` 
> instead. IIRC, in all of the provided test cases the operand isn't a DRE.
> 
> That said, I totally agree that it's a great idea to try a few other things 
> to point out the specific subexpression, even if we don't connect the warning 
> gadget to a variable. Say, we can try to blame `MemberExpr`s or `CallExpr`s 
> the same way we blame DREs, and include their name in the warning. I'll try a 
> few things real quick and see how bad it gets.
> 
> Note that these are also the things for which we may eventually start 
> providing constructive solutions. Say, an unsafe operation on `CallExpr` can 
> be a reason to autofix the callee to return a `std::span`. So hopefully these 
> warnings will eventually be replaced by better warnings in more and more 
> cases.
Wait nvm, the whole point of this patch is to warn when variable discovery is 
manually turned off! I'm an idiot, this absolutely deserves more effort.


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[PATCH] D150746: [CodeGen]Translating pointer arguments can require an address space cast

[Alex Voicu via Phabricator via cfe-commits]

AlexVlx added a comment.

In D150746#4354742 , @rjmccall wrote:

> Can you add a test?  I think we have some in-tree targets which put globals 
> in a non-default address space.

I've added the test (think we, i.e. AMDGPU, are the only ones doing this at the 
moment; both SPIRV & PTX use generic, and I've not checked DXIL since it 
doesn't seem like a target for this use case), but I'd like to suggest that we 
keep it disabled until I fix the other parts of handling this (vtables & 
vptrs), since as it is it will just produce invalid bitcasts in the IR. Would 
that be acceptable? Thanks.


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[PATCH] D150746: [CodeGen]Translating pointer arguments can require an address space cast

[Alex Voicu via Phabricator via cfe-commits]

AlexVlx updated this revision to Diff 523902.
AlexVlx added a comment.

Use `GetGlobalVarAddressSpace` everywhere. Added test, which I'm marking 
`XFAIL` for now since it turns out I'll need to fix the remaining vptr / vtable 
handling parts, yay.


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Files:
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/test/CodeGenCXX/vtt-address-space.cpp


Index: clang/test/CodeGenCXX/vtt-address-space.cpp
===
--- /dev/null
+++ clang/test/CodeGenCXX/vtt-address-space.cpp
@@ -0,0 +1,26 @@
+// RUN: %clang_cc1 %s -triple=amdgcn-amd-amdhsa -std=c++11 -emit-llvm -o - | 
FileCheck %s
+// This is temporarily disabled as it requires fixing typeinfo & vptr handling
+// as well; it will be enabled once those fixes are in.
+// XFAIL: *
+
+// This is the sample from the C++ Itanium ABI, p2.6.2.
+namespace Test {
+  class A1 { int i; };
+  class A2 { int i; virtual void f(); };
+  class V1 : public A1, public A2 { int i; };
+  class B1 { int i; };
+  class B2 { int i; };
+  class V2 : public B1, public B2, public virtual V1 { int i; };
+  class V3 {virtual void g(); };
+  class C1 : public virtual V1 { int i; };
+  class C2 : public virtual V3, virtual V2 { int i; };
+  class X1 { int i; };
+  class C3 : public X1 { int i; };
+  class D : public C1, public C2, public C3 { int i;  };
+
+  D d;
+}
+
+// CHECK: @_ZTTN4Test1DE = linkonce_odr hidden unnamed_addr addrspace(1) 
constant [13 x ptr] [ptr addrspacecast (ptr addrspace(1) getelementptr inbounds 
({ [5 x ptr], [7 x ptr], [4 x ptr], [3 x ptr] }, ptr addrspace(1) 
@_ZTVN4Test1DE, i32 0, inrange i32 0, i32 5) to ptr), ptr addrspacecast (ptr 
addrspace(1) getelementptr inbounds ({ [3 x ptr], [4 x ptr] }, ptr addrspace(1) 
@_ZTCN4Test1DE0_NS_2C1E, i32 0, inrange i32 0, i32 3) to ptr), ptr 
addrspacecast (ptr addrspace(1) getelementptr inbounds ({ [3 x ptr], [4 x ptr] 
}, ptr addrspace(1) @_ZTCN4Test1DE0_NS_2C1E, i32 0, inrange i32 1, i32 3) to 
ptr), ptr addrspacecast (ptr addrspace(1) getelementptr inbounds ({ [7 x ptr], 
[3 x ptr], [4 x ptr] }, ptr addrspace(1) @_ZTCN4Test1DE16_NS_2C2E, i32 0, 
inrange i32 0, i32 6) to ptr), ptr addrspacecast (ptr addrspace(1) 
getelementptr inbounds ({ [7 x ptr], [3 x ptr], [4 x ptr] }, ptr addrspace(1) 
@_ZTCN4Test1DE16_NS_2C2E, i32 0, inrange i32 0, i32 6) to ptr), ptr 
addrspacecast (ptr addrspace(1) getelementptr inbounds ({ [7 x ptr], [3 x ptr], 
[4 x ptr] }, ptr addrspace(1) @_ZTCN4Test1DE16_NS_2C2E, i32 0, inrange i32 1, 
i32 3) to ptr), ptr addrspacecast (ptr addrspace(1) getelementptr inbounds ({ 
[7 x ptr], [3 x ptr], [4 x ptr] }, ptr addrspace(1) @_ZTCN4Test1DE16_NS_2C2E, 
i32 0, inrange i32 2, i32 3) to ptr), ptr addrspacecast (ptr addrspace(1) 
getelementptr inbounds ({ [5 x ptr], [7 x ptr], [4 x ptr], [3 x ptr] }, ptr 
addrspace(1) @_ZTVN4Test1DE, i32 0, inrange i32 2, i32 3) to ptr), ptr 
addrspacecast (ptr addrspace(1) getelementptr inbounds ({ [5 x ptr], [7 x ptr], 
[4 x ptr], [3 x ptr] }, ptr addrspace(1) @_ZTVN4Test1DE, i32 0, inrange i32 1, 
i32 6) to ptr), ptr addrspacecast (ptr addrspace(1) getelementptr inbounds ({ 
[5 x ptr], [7 x ptr], [4 x ptr], [3 x ptr] }, ptr addrspace(1) @_ZTVN4Test1DE, 
i32 0, inrange i32 1, i32 6) to ptr), ptr addrspacecast (ptr addrspace(1) 
getelementptr inbounds ({ [5 x ptr], [7 x ptr], [4 x ptr], [3 x ptr] }, ptr 
addrspace(1) @_ZTVN4Test1DE, i32 0, inrange i32 3, i32 3) to ptr), ptr 
addrspacecast (ptr addrspace(1) getelementptr inbounds ({ [3 x ptr], [4 x ptr] 
}, ptr addrspace(1) @_ZTCN4Test1DE64_NS_2V2E, i32 0, inrange i32 0, i32 3) to 
ptr), ptr addrspacecast (ptr addrspace(1) getelementptr inbounds ({ [3 x ptr], 
[4 x ptr] }, ptr addrspace(1) @_ZTCN4Test1DE64_NS_2V2E, i32 0, inrange i32 1, 
i32 3) to ptr)], comdat, align 8
+// CHECK: call void @_ZN4Test2V2C2Ev(ptr noundef nonnull align 8 
dereferenceable(20) %7, ptr addrspace(1) getelementptr inbounds ([13 x ptr], 
ptr addrspace(1) @_ZTTN4Test1DE, i64 0, i64 11))
+// CHECK-NEXT: define linkonce_odr hidden void @_ZN4Test2V2C2Ev(ptr noundef 
nonnull align 8 dereferenceable(20) %0, ptr addrspace(1) noundef %1)
Index: clang/lib/CodeGen/ItaniumCXXABI.cpp
===
--- clang/lib/CodeGen/ItaniumCXXABI.cpp
+++ clang/lib/CodeGen/ItaniumCXXABI.cpp
@@ -1587,12 +1587,14 @@
   // All parameters are already in place except VTT, which goes after 'this'.
   // These are Clang types, so we don't need to worry about sret yet.
 
-  // Check if we need to add a VTT parameter (which has type void **).
+  // Check if we need to add a VTT parameter (which has type global void **).
   if ((isa(GD.getDecl()) ? GD.getCtorType() == Ctor_Base
  : GD.getDtorType() == Dtor_Base) 
&&
   cast(GD.getDecl())->getParent()->getNumVBases() != 0) {
+LangAS AS = CGM.GetGlobalVarAddressSpace(nullptr);
+

[PATCH] D150435: [clang] Fix crash on attempt to initialize union with flexible array member

[Shafik Yaghmour via Phabricator via cfe-commits]

shafik accepted this revision.
shafik added a comment.
This revision is now accepted and ready to land.

LGTM after addressing Aaron's comment


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[PATCH] D150988: [clang][Darwin] Error out when missing requested libarclite library

[Keith Smiley via Phabricator via cfe-commits]

keith updated this revision to Diff 523899.
keith added a comment.

Improve test


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Files:
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/lib/Driver/ToolChains/Darwin.cpp
  clang/test/Driver/arclite-link-external-toolchain.c


Index: clang/test/Driver/arclite-link-external-toolchain.c
===
--- clang/test/Driver/arclite-link-external-toolchain.c
+++ clang/test/Driver/arclite-link-external-toolchain.c
@@ -4,5 +4,8 @@
 // RUN:   -isysroot 
%t.tmpdir/Xcode.app/Contents/Developers/Platforms/MacOSX.platform/Developer/SDKs/MacOSX10.14.sdk
 \
 // RUN:   %s 2>&1 | FileCheck %s
 
+// CHECK: error: SDK does not contain 'libarclite' at the path '
+// CHECK: .tmpdir/Xcode.app/{{.*}}libarclite_macosx.a'.
+// CHECK: This likely means you need to increase your minimum deployment target
 // CHECK: -lfoo
 // CHECK: .tmpdir/Xcode.app/{{.*}}libarclite_macosx.a
Index: clang/lib/Driver/ToolChains/Darwin.cpp
===
--- clang/lib/Driver/ToolChains/Darwin.cpp
+++ clang/lib/Driver/ToolChains/Darwin.cpp
@@ -1204,6 +1204,9 @@
 P += "macosx";
   P += ".a";
 
+  if (!getVFS().exists(P))
+getDriver().Diag(clang::diag::err_drv_darwin_sdk_missing_arclite) << P;
+
   CmdArgs.push_back(Args.MakeArgString(P));
 }
 
Index: clang/include/clang/Basic/DiagnosticDriverKinds.td
===
--- clang/include/clang/Basic/DiagnosticDriverKinds.td
+++ clang/include/clang/Basic/DiagnosticDriverKinds.td
@@ -619,6 +619,9 @@
   "SDK settings were ignored as 'SDKSettings.json' could not be parsed">,
   InGroup>;
 
+def err_drv_darwin_sdk_missing_arclite : Error<
+  "SDK does not contain 'libarclite' at the path '%0'. This likely means you 
need to increase your minimum deployment target">;
+
 def err_drv_trivial_auto_var_init_stop_after_missing_dependency : Error<
   "'-ftrivial-auto-var-init-stop-after=*' is used without "
   "'-ftrivial-auto-var-init=zero' or '-ftrivial-auto-var-init=pattern'">;


Index: clang/test/Driver/arclite-link-external-toolchain.c
===
--- clang/test/Driver/arclite-link-external-toolchain.c
+++ clang/test/Driver/arclite-link-external-toolchain.c
@@ -4,5 +4,8 @@
 // RUN:   -isysroot %t.tmpdir/Xcode.app/Contents/Developers/Platforms/MacOSX.platform/Developer/SDKs/MacOSX10.14.sdk \
 // RUN:   %s 2>&1 | FileCheck %s
 
+// CHECK: error: SDK does not contain 'libarclite' at the path '
+// CHECK: .tmpdir/Xcode.app/{{.*}}libarclite_macosx.a'.
+// CHECK: This likely means you need to increase your minimum deployment target
 // CHECK: -lfoo
 // CHECK: .tmpdir/Xcode.app/{{.*}}libarclite_macosx.a
Index: clang/lib/Driver/ToolChains/Darwin.cpp
===
--- clang/lib/Driver/ToolChains/Darwin.cpp
+++ clang/lib/Driver/ToolChains/Darwin.cpp
@@ -1204,6 +1204,9 @@
 P += "macosx";
   P += ".a";
 
+  if (!getVFS().exists(P))
+getDriver().Diag(clang::diag::err_drv_darwin_sdk_missing_arclite) << P;
+
   CmdArgs.push_back(Args.MakeArgString(P));
 }
 
Index: clang/include/clang/Basic/DiagnosticDriverKinds.td
===
--- clang/include/clang/Basic/DiagnosticDriverKinds.td
+++ clang/include/clang/Basic/DiagnosticDriverKinds.td
@@ -619,6 +619,9 @@
   "SDK settings were ignored as 'SDKSettings.json' could not be parsed">,
   InGroup>;
 
+def err_drv_darwin_sdk_missing_arclite : Error<
+  "SDK does not contain 'libarclite' at the path '%0'. This likely means you need to increase your minimum deployment target">;
+
 def err_drv_trivial_auto_var_init_stop_after_missing_dependency : Error<
   "'-ftrivial-auto-var-init-stop-after=*' is used without "
   "'-ftrivial-auto-var-init=zero' or '-ftrivial-auto-var-init=pattern'">;
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[PATCH] D148851: Disable llvm-symbolizer on some of the driver tests that are timing out

[Matt Arsenault via Phabricator via cfe-commits]

arsenm added a comment.

I also think we need to revert or disable 
https://github.com/llvm/llvm-project/commit/cead4eceb01b935fae07bf4a7e91911b344d2fec

The symbolizer is unusably slow with it


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[PATCH] D150988: [clang][Darwin] Error out when missing requested libarclite library

[Keith Smiley via Phabricator via cfe-commits]

keith created this revision.
Herald added a project: All.
keith requested review of this revision.
Herald added subscribers: cfe-commits, MaskRay.
Herald added a project: clang.

Starting with the SDKs provided with Xcode 14.3, this library no longer
exists. Before this change this results in an opaque linker error in the
case that your deployment target is low enough that this library is
added. This produces a more useful error message in that case.


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Files:
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/lib/Driver/ToolChains/Darwin.cpp
  clang/test/Driver/arclite-link-external-toolchain.c


Index: clang/test/Driver/arclite-link-external-toolchain.c
===
--- clang/test/Driver/arclite-link-external-toolchain.c
+++ clang/test/Driver/arclite-link-external-toolchain.c
@@ -4,5 +4,7 @@
 // RUN:   -isysroot 
%t.tmpdir/Xcode.app/Contents/Developers/Platforms/MacOSX.platform/Developer/SDKs/MacOSX10.14.sdk
 \
 // RUN:   %s 2>&1 | FileCheck %s
 
+// CHECK: error: SDK does not contain 'libarclite' at the path
+// CHECK: This likely means you need to increase your minimum deployment target
 // CHECK: -lfoo
 // CHECK: .tmpdir/Xcode.app/{{.*}}libarclite_macosx.a
Index: clang/lib/Driver/ToolChains/Darwin.cpp
===
--- clang/lib/Driver/ToolChains/Darwin.cpp
+++ clang/lib/Driver/ToolChains/Darwin.cpp
@@ -1204,6 +1204,9 @@
 P += "macosx";
   P += ".a";
 
+  if (!getVFS().exists(P))
+getDriver().Diag(clang::diag::err_drv_darwin_sdk_missing_arclite) << P;
+
   CmdArgs.push_back(Args.MakeArgString(P));
 }
 
Index: clang/include/clang/Basic/DiagnosticDriverKinds.td
===
--- clang/include/clang/Basic/DiagnosticDriverKinds.td
+++ clang/include/clang/Basic/DiagnosticDriverKinds.td
@@ -619,6 +619,9 @@
   "SDK settings were ignored as 'SDKSettings.json' could not be parsed">,
   InGroup>;
 
+def err_drv_darwin_sdk_missing_arclite : Error<
+  "SDK does not contain 'libarclite' at the path '%0'. This likely means you 
need to increase your minimum deployment target">;
+
 def err_drv_trivial_auto_var_init_stop_after_missing_dependency : Error<
   "'-ftrivial-auto-var-init-stop-after=*' is used without "
   "'-ftrivial-auto-var-init=zero' or '-ftrivial-auto-var-init=pattern'">;


Index: clang/test/Driver/arclite-link-external-toolchain.c
===
--- clang/test/Driver/arclite-link-external-toolchain.c
+++ clang/test/Driver/arclite-link-external-toolchain.c
@@ -4,5 +4,7 @@
 // RUN:   -isysroot %t.tmpdir/Xcode.app/Contents/Developers/Platforms/MacOSX.platform/Developer/SDKs/MacOSX10.14.sdk \
 // RUN:   %s 2>&1 | FileCheck %s
 
+// CHECK: error: SDK does not contain 'libarclite' at the path
+// CHECK: This likely means you need to increase your minimum deployment target
 // CHECK: -lfoo
 // CHECK: .tmpdir/Xcode.app/{{.*}}libarclite_macosx.a
Index: clang/lib/Driver/ToolChains/Darwin.cpp
===
--- clang/lib/Driver/ToolChains/Darwin.cpp
+++ clang/lib/Driver/ToolChains/Darwin.cpp
@@ -1204,6 +1204,9 @@
 P += "macosx";
   P += ".a";
 
+  if (!getVFS().exists(P))
+getDriver().Diag(clang::diag::err_drv_darwin_sdk_missing_arclite) << P;
+
   CmdArgs.push_back(Args.MakeArgString(P));
 }
 
Index: clang/include/clang/Basic/DiagnosticDriverKinds.td
===
--- clang/include/clang/Basic/DiagnosticDriverKinds.td
+++ clang/include/clang/Basic/DiagnosticDriverKinds.td
@@ -619,6 +619,9 @@
   "SDK settings were ignored as 'SDKSettings.json' could not be parsed">,
   InGroup>;
 
+def err_drv_darwin_sdk_missing_arclite : Error<
+  "SDK does not contain 'libarclite' at the path '%0'. This likely means you need to increase your minimum deployment target">;
+
 def err_drv_trivial_auto_var_init_stop_after_missing_dependency : Error<
   "'-ftrivial-auto-var-init-stop-after=*' is used without "
   "'-ftrivial-auto-var-init=zero' or '-ftrivial-auto-var-init=pattern'">;
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[PATCH] D148851: Disable llvm-symbolizer on some of the driver tests that are timing out

[Arthur Eubanks via Phabricator via cfe-commits]

aeubanks added a comment.

`not` will set `LLVM_DISABLE_SYMBOLIZATION` if we use `not --crash`

are these tests supposed to crash or gracefully fail? if they're supposed to 
crash then we should use `not --crash`


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[PATCH] D150913: [Clang][Bfloat16] Upgrade __bf16 to arithmetic type, change mangling, and extend excess precision support.

[M. Zeeshan Siddiqui via Phabricator via cfe-commits]

codemzs marked an inline comment as done.
codemzs added a comment.

I believe I had updated the `__bf16` documentation in 
`/llvm-project/clang/docs/LanguageExtensions.rst`, but it appears to have been 
omitted in this patch. I assure you, I'll rectify this in the next iteration.




Comment at: clang/include/clang/AST/ASTContext.h:1102
   CanQualType HalfTy; // [OpenCL 6.1.1.1], ARM NEON
-  CanQualType BFloat16Ty;
+  CanQualType BFloat16Ty; // ISO/IEC/IEEE 60559.
   CanQualType Float16Ty; // C11 extension ISO/IEC TS 18661-3

pengfei wrote:
> Don't have a look at ISO/IEC/IEEE 60559, but I doubt BF16 is still not a IEEE 
> type for now.
You are correct, it isn't officially part of ISO/I standard but implements 
the properties specified by the standard I think, in any case I will remove the 
comment as it could be misleading.



Comment at: clang/lib/Basic/Targets/AMDGPU.h:121
   bool hasBFloat16Type() const override { return isAMDGCN(getTriple()); }
-  const char *getBFloat16Mangling() const override { return "u6__bf16"; };
+  const char *getBFloat16Mangling() const override { return "DF16b"; };
 

pengfei wrote:
> I think it's time to bring D139608 back with this patch :)
I'm inclined to establish a default value, overridden only for ARM, to avoid 
repetition. If there are no objections, I plan to implement this change in the 
next iteration.



Comment at: clang/lib/Basic/Targets/X86.cpp:381
 
 HasBFloat16 = SSELevel >= SSE2;
 

rjmccall wrote:
> pengfei wrote:
> > I'm not sure if I understand the meaning of `HasFullBFloat16`. If it is 
> > used for target that supports arithmetic `__bf16`, we should not use 
> > `+fullbf16` but always enable it for SSE2, i.e., `HasFullBFloat16 = 
> > SSELevel >= SSE2`. Because X86 GCC already supports arithmetic for `__bf16`.
> > 
> > If this is used in the way like `HasLegalHalfType`, we should enable it 
> > once we have a full BF16 ISA on X86. `fullbf16` doesn't make much sense to 
> > me.
> At the moment, we haven't done the work to emulate BFloat16 arithmetic in any 
> of the three ways we can do that: Clang doesn't promote it in IRGen, LLVM 
> doesn't promote it in legalization, and we don't have compiler-rt functions 
> for it.  If we emit these instructions, they'll just sail through LLVM and 
> fail in the backend.  So in the short term, we have to restrict this to 
> targets that directly support BFloat16 arithmetic in hardware, which doesn't 
> include x86.
> 
> Once we have that emulation support, I agree that the x86 targets should 
> enable this whenever they would enable `__bf16`.
@rjmccall, I concur and just wanted to confirm this change indeed intends to 
provide `BFloat16` emulation support, utilizing excess precision for promotion 
to `float`. The `HasFullBFloat16` switch is designed to determine excess 
precision support automatically when the hardware does not natively support 
`bfloat16` arithmetic.


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[PATCH] D150744: [NFC][CLANG] Fix uninitialized scalar field issues found by Coverity

[Soumi Manna via Phabricator via cfe-commits]

Manna added inline comments.



Comment at: clang/include/clang/Parse/Parser.h:1190
   class ParseScopeFlags {
 Scope *CurScope;
+unsigned OldFlags = 0;

tahonermann wrote:
> shafik wrote:
> > @tahonermann I feel like we should have a default member initializer for 
> > any member that by default is not initialized. I realize in this case there 
> > currently should be no way for this to be bot initialized but that may not 
> > stay true and I don't believe there will be a penalty for doing this since 
> > it is initialized in the `mem-initializer-list` and therefore the default 
> > init should be omitted when calling the constructor. 
> I think that is very reasonable and I'm not opposed to such a policy. Per my 
> other comment, the trade off to always initializing is that a default 
> initializer can prevent use of tools like ubsan to discover when an 
> appropriate (presumably non-default) value has not been assigned. I suspect 
> (but have no data to draw on) that adding a default member initializer 
> prevents more bugs than would be found by tools like ubsan detecting use of 
> an uninitialized data member that should have a (non-default) assigned value.
> 
> I'm definitely in favor of using default member initializers over 
> `mem-initializer-list`!
>>since it is initialized in the mem-initializer-list and therefore the default 
>>init should be omitted when calling the constructor.

Agreed. That is motivated me to add default initialization. 

>>he trade off to always initializing is that a default initializer can prevent 
>>use of tools like ubsan to discover when an appropriate (presumably 
>>non-default) value has not been assigned. I suspect (but have no data to draw 
>>on) that adding a default member initializer prevents more bugs than would be 
>>found by tools like ubsan detecting use of an uninitialized data member that 
>>should have a (non-default) assigned value.

Thanks @tahonermann for the information! i was not aware of this ubsan tool.

@shafik and @tahonermann, thank you for your comments. Do you think we should 
hold off these changes for merging? 



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[PATCH] D146358: [clang][AST] Print name instead of type when diagnosing uninitialized subobject in constexpr variables

[Erich Keane via Phabricator via cfe-commits]

erichkeane added a comment.

In D146358#4357106 , @hazohelet wrote:

> In D146358#4352792 , @erichkeane 
> wrote:
>
>> In D146358#4351787 , @hazohelet 
>> wrote:
>>
>>> In D146358#4350810 , @erichkeane 
>>> wrote:
>>>
 Our downstream discovered that this causes a regression when compiling 
 `utility` with `ast-dump`.  I've put up a minimal reproducer: 
 https://godbolt.org/z/oaezas7Ws

 @hazohelet : Will you be able to look into this soon?
>>>
>>> Thanks for the report and the reproducer.
>>> I cannot take sufficient time for about 36 hours, but I'll be able to 
>>> investigate it after that.
>>
>> That is long enough away that I unfortunately have to revert (see 
>> 34e49d3e85a6dd03856af0fb4b7f8d8ae1f4f06a 
>> ). 
>> Please note that in the LLVM project reverts are common/frequent (we have a 
>> policy of 'revert often'), and should not be taken negatively!  Please feel 
>> free to re-submit this patch with a fix/the test provided, and we'll 
>> re-review promptly!
>
> Thanks for the revert!
>
> It seems that the problem is around the list initializer in template variable 
> definition.
> Minimum reproducible example:
> `template  constexpr T foo{};`
>
> When the `TextNodeDumper` enabled through `-ast-dump` visits a constexpr 
> `VarDecl` with initializer, it evaluates the `VarDecl` and prints the value 
> if evaluation comes successful.
> (https://github.com/llvm/llvm-project/blob/55903151a2a505284ce3fcd955b1d394df0b55ea/clang/lib/AST/TextNodeDumper.cpp#L1825)
> The `VarDecl::evaluateValue()` does not show the notes generated during its 
> failed evaluation. The uninitialized-subobject note is actually generated 
> BEFORE this patch when compiling the reproducers with `-ast-dump` flag on, 
> but is not shown to the user.
> The message should not be generated here and I assume this is an internal bug 
> that we have to fix before resubmitting this patch.

It seems to me that perhaps the assert you added is not appropriate?  Instead, 
could we have the OLD diagnostic 'back' as an alternate form (when this is 
empty)?


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[PATCH] D150894: [CUDA] provide wrapper functions for new NVCC builtins.

[Artem Belevich via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG4450285bd740: [CUDA] provide wrapper functions for new NVCC 
builtins. (authored by tra).

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Files:
  clang/lib/Headers/__clang_cuda_intrinsics.h


Index: clang/lib/Headers/__clang_cuda_intrinsics.h
===
--- clang/lib/Headers/__clang_cuda_intrinsics.h
+++ clang/lib/Headers/__clang_cuda_intrinsics.h
@@ -512,6 +512,78 @@
 __device__ inline cuuint32_t __nvvm_get_smem_pointer(void *__ptr) {
   return __nv_cvta_generic_to_shared_impl(__ptr);
 }
+
+#if !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 800
+__device__ inline unsigned __reduce_add_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_add(__mask, __value);
+}
+__device__ inline int __reduce_add_sync_signed_impl(unsigned __mask,
+int __value) {
+  return __nvvm_redux_sync_add(__mask, __value);
+}
+__device__ inline unsigned __reduce_min_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_umin(__mask, __value);
+}
+__device__ inline unsigned __reduce_max_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_umax(__mask, __value);
+}
+__device__ inline int __reduce_min_sync_signed_impl(unsigned __mask,
+int __value) {
+  return __nvvm_redux_sync_min(__mask, __value);
+}
+__device__ inline int __reduce_max_sync_signed_impl(unsigned __mask,
+int __value) {
+  return __nvvm_redux_sync_max(__mask, __value);
+}
+__device__ inline unsigned __reduce_or_sync_unsigned_impl(unsigned __mask,
+  unsigned __value) {
+  return __nvvm_redux_sync_or(__mask, __value);
+}
+__device__ inline unsigned __reduce_and_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_and(__mask, __value);
+}
+__device__ inline unsigned __reduce_xor_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_xor(__mask, __value);
+}
+
+__device__ inline void
+__nv_memcpy_async_shared_global_4_impl(void *__dst, const void *__src,
+   unsigned __src_size) {
+  __nvvm_cp_async_ca_shared_global_4(
+  (void __attribute__((address_space(3))) *)__dst,
+  (const void __attribute__((address_space(1))) *)__src, __src_size);
+}
+__device__ inline void
+__nv_memcpy_async_shared_global_8_impl(void *__dst, const void *__src,
+   unsigned __src_size) {
+  __nvvm_cp_async_ca_shared_global_8(
+  (void __attribute__((address_space(3))) *)__dst,
+  (const void __attribute__((address_space(1))) *)__src, __src_size);
+}
+__device__ inline void
+__nv_memcpy_async_shared_global_16_impl(void *__dst, const void *__src,
+unsigned __src_size) {
+  __nvvm_cp_async_ca_shared_global_16(
+  (void __attribute__((address_space(3))) *)__dst,
+  (const void __attribute__((address_space(1))) *)__src, __src_size);
+}
+
+__device__ inline void *
+__nv_associate_access_property_impl(const void *__ptr,
+unsigned long long __prop) {
+  // TODO: it appears to provide compiler with some sort of a hint. We do not
+  // know what exactly it is supposed to do. However, CUDA headers suggest that
+  // just passing through __ptr should not affect correctness. They do so on
+  // pre-sm80 GPUs where this builtin is not available.
+  return (void*)__ptr;
+}
+#endif // !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 800
+
 } // extern "C"
 #endif // CUDA_VERSION >= 11000
 


Index: clang/lib/Headers/__clang_cuda_intrinsics.h
===
--- clang/lib/Headers/__clang_cuda_intrinsics.h
+++ clang/lib/Headers/__clang_cuda_intrinsics.h
@@ -512,6 +512,78 @@
 __device__ inline cuuint32_t __nvvm_get_smem_pointer(void *__ptr) {
   return __nv_cvta_generic_to_shared_impl(__ptr);
 }
+
+#if !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 800
+__device__ inline unsigned __reduce_add_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_add(__mask, __value);
+}
+__device__ inline int __reduce_add_sync_signed_impl(unsigned __mask,
+   

[clang] 4450285 - [CUDA] provide wrapper functions for new NVCC builtins.

[Artem Belevich via cfe-commits]

Author: Artem Belevich
Date: 2023-05-19T11:48:08-07:00
New Revision: 4450285bd74079bf87ba7b824a8dec8dcfb586ef

URL: 
https://github.com/llvm/llvm-project/commit/4450285bd74079bf87ba7b824a8dec8dcfb586ef
DIFF: 
https://github.com/llvm/llvm-project/commit/4450285bd74079bf87ba7b824a8dec8dcfb586ef.diff

LOG: [CUDA] provide wrapper functions for new NVCC builtins.

For sm_80 NVCC introduced a handful of builtins with the names that deviate from
the historic __nvvm_/__nv naming convention. Clang/LLVM does provide equivalent
builtins, but using different names. This patch maps NVCC-style builtins to
their clang counterparts.

Differential Revision: https://reviews.llvm.org/D150894

Added: 


Modified: 
clang/lib/Headers/__clang_cuda_intrinsics.h

Removed: 




diff  --git a/clang/lib/Headers/__clang_cuda_intrinsics.h 
b/clang/lib/Headers/__clang_cuda_intrinsics.h
index b87413e12a272..d085bf6536efc 100644
--- a/clang/lib/Headers/__clang_cuda_intrinsics.h
+++ b/clang/lib/Headers/__clang_cuda_intrinsics.h
@@ -512,6 +512,78 @@ __device__ inline void 
*__nv_cvta_local_to_generic_impl(size_t __ptr) {
 __device__ inline cuuint32_t __nvvm_get_smem_pointer(void *__ptr) {
   return __nv_cvta_generic_to_shared_impl(__ptr);
 }
+
+#if !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 800
+__device__ inline unsigned __reduce_add_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_add(__mask, __value);
+}
+__device__ inline int __reduce_add_sync_signed_impl(unsigned __mask,
+int __value) {
+  return __nvvm_redux_sync_add(__mask, __value);
+}
+__device__ inline unsigned __reduce_min_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_umin(__mask, __value);
+}
+__device__ inline unsigned __reduce_max_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_umax(__mask, __value);
+}
+__device__ inline int __reduce_min_sync_signed_impl(unsigned __mask,
+int __value) {
+  return __nvvm_redux_sync_min(__mask, __value);
+}
+__device__ inline int __reduce_max_sync_signed_impl(unsigned __mask,
+int __value) {
+  return __nvvm_redux_sync_max(__mask, __value);
+}
+__device__ inline unsigned __reduce_or_sync_unsigned_impl(unsigned __mask,
+  unsigned __value) {
+  return __nvvm_redux_sync_or(__mask, __value);
+}
+__device__ inline unsigned __reduce_and_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_and(__mask, __value);
+}
+__device__ inline unsigned __reduce_xor_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_xor(__mask, __value);
+}
+
+__device__ inline void
+__nv_memcpy_async_shared_global_4_impl(void *__dst, const void *__src,
+   unsigned __src_size) {
+  __nvvm_cp_async_ca_shared_global_4(
+  (void __attribute__((address_space(3))) *)__dst,
+  (const void __attribute__((address_space(1))) *)__src, __src_size);
+}
+__device__ inline void
+__nv_memcpy_async_shared_global_8_impl(void *__dst, const void *__src,
+   unsigned __src_size) {
+  __nvvm_cp_async_ca_shared_global_8(
+  (void __attribute__((address_space(3))) *)__dst,
+  (const void __attribute__((address_space(1))) *)__src, __src_size);
+}
+__device__ inline void
+__nv_memcpy_async_shared_global_16_impl(void *__dst, const void *__src,
+unsigned __src_size) {
+  __nvvm_cp_async_ca_shared_global_16(
+  (void __attribute__((address_space(3))) *)__dst,
+  (const void __attribute__((address_space(1))) *)__src, __src_size);
+}
+
+__device__ inline void *
+__nv_associate_access_property_impl(const void *__ptr,
+unsigned long long __prop) {
+  // TODO: it appears to provide compiler with some sort of a hint. We do not
+  // know what exactly it is supposed to do. However, CUDA headers suggest that
+  // just passing through __ptr should not affect correctness. They do so on
+  // pre-sm80 GPUs where this builtin is not available.
+  return (void*)__ptr;
+}
+#endif // !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 800
+
 } // extern "C"
 #endif // CUDA_VERSION >= 11000
 



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[PATCH] D137872: Implement lambdas with inalloca parameters by forwarding to function without inalloca calling convention.

[Eli Friedman via Phabricator via cfe-commits]

efriedma added a comment.

In D137872#4348314 , @akhuang wrote:

> In D137872#4327615 , @efriedma 
> wrote:
>
>> I'm having a bit of trouble following how exactly the thunk creation is 
>> working here... do we generate different code depending on whether the call 
>> operator and/or the static invoker are referenced?
>
> So I think it used to be that the static invoker calls the call operator 
> which contains the body of the lambda? And now both the static invoker and 
> the call operator are delegating to this new __impl function. In 
> EmitLambdaStaticInvokeBody it first calls EmitLambdaInAllocaCallOpFn to make 
> the new call operator (which is populated using 
> EmitLambdaDelegatingInvokeBody). And then inside 
> EmitLambdaDelegatingInvokeBody it generates the new impl function and calls 
> it in the body. Not sure if that answers the question, I agree the code is a 
> bit roundabout.
>
>> Why is the function in EmitLambdaInAllocaCallOpFn not getting defined using 
>> the normal CodeGenModule machinery?
>
> Do you mean why it's not using CodeGenModule machinery to generate the new 
> call op body or why we're changing the original call op body?

I mean why it's not using the CodeGenModule machinery.  I understand there are 
three function bodies involved.  But I would expect that when you "emit" the 
lambda call operator, it emits the entry point for the call and for the call 
impl, and when you emit the static invoker, it just emits a call to the call 
impl.

Or... hmm.  Is this actually erasing the existing definition of the call 
operator, if it was already emitted?  That probably doesn't actually work in 
general; once a function is emitted, you can't re-emit it.  Emitting a function 
emits other related stuff like static variables; you can't EmitFunctionBody() 
more than once.  Either you need to decide when it's first emitted, or you need 
to rewrite the signature of the definition and splice the existing body in.


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[PATCH] D150894: [CUDA] provide wrapper functions for new NVCC builtins.

[Artem Belevich via Phabricator via cfe-commits]

tra updated this revision to Diff 523881.
tra added a comment.

typo fix.


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Files:
  clang/lib/Headers/__clang_cuda_intrinsics.h


Index: clang/lib/Headers/__clang_cuda_intrinsics.h
===
--- clang/lib/Headers/__clang_cuda_intrinsics.h
+++ clang/lib/Headers/__clang_cuda_intrinsics.h
@@ -512,6 +512,78 @@
 __device__ inline cuuint32_t __nvvm_get_smem_pointer(void *__ptr) {
   return __nv_cvta_generic_to_shared_impl(__ptr);
 }
+
+#if !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 800
+__device__ inline unsigned __reduce_add_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_add(__mask, __value);
+}
+__device__ inline int __reduce_add_sync_signed_impl(unsigned __mask,
+int __value) {
+  return __nvvm_redux_sync_add(__mask, __value);
+}
+__device__ inline unsigned __reduce_min_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_umin(__mask, __value);
+}
+__device__ inline unsigned __reduce_max_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_umax(__mask, __value);
+}
+__device__ inline int __reduce_min_sync_signed_impl(unsigned __mask,
+int __value) {
+  return __nvvm_redux_sync_min(__mask, __value);
+}
+__device__ inline int __reduce_max_sync_signed_impl(unsigned __mask,
+int __value) {
+  return __nvvm_redux_sync_max(__mask, __value);
+}
+__device__ inline unsigned __reduce_or_sync_unsigned_impl(unsigned __mask,
+  unsigned __value) {
+  return __nvvm_redux_sync_or(__mask, __value);
+}
+__device__ inline unsigned __reduce_and_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_and(__mask, __value);
+}
+__device__ inline unsigned __reduce_xor_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_xor(__mask, __value);
+}
+
+__device__ inline void
+__nv_memcpy_async_shared_global_4_impl(void *__dst, const void *__src,
+   unsigned __src_size) {
+  __nvvm_cp_async_ca_shared_global_4(
+  (void __attribute__((address_space(3))) *)__dst,
+  (const void __attribute__((address_space(1))) *)__src, __src_size);
+}
+__device__ inline void
+__nv_memcpy_async_shared_global_8_impl(void *__dst, const void *__src,
+   unsigned __src_size) {
+  __nvvm_cp_async_ca_shared_global_8(
+  (void __attribute__((address_space(3))) *)__dst,
+  (const void __attribute__((address_space(1))) *)__src, __src_size);
+}
+__device__ inline void
+__nv_memcpy_async_shared_global_16_impl(void *__dst, const void *__src,
+unsigned __src_size) {
+  __nvvm_cp_async_ca_shared_global_16(
+  (void __attribute__((address_space(3))) *)__dst,
+  (const void __attribute__((address_space(1))) *)__src, __src_size);
+}
+
+__device__ inline void *
+__nv_associate_access_property_impl(const void *__ptr,
+unsigned long long __prop) {
+  // TODO: it appears to provide compiler with some sort of a hint. We do not
+  // know what exactly it is supposed to do. However, CUDA headers suggest that
+  // just passing through __ptr should not affect correctness. They do so on
+  // pre-sm80 GPUs where this builtin is not available.
+  return (void*)__ptr;
+}
+#endif // !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 800
+
 } // extern "C"
 #endif // CUDA_VERSION >= 11000
 


Index: clang/lib/Headers/__clang_cuda_intrinsics.h
===
--- clang/lib/Headers/__clang_cuda_intrinsics.h
+++ clang/lib/Headers/__clang_cuda_intrinsics.h
@@ -512,6 +512,78 @@
 __device__ inline cuuint32_t __nvvm_get_smem_pointer(void *__ptr) {
   return __nv_cvta_generic_to_shared_impl(__ptr);
 }
+
+#if !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 800
+__device__ inline unsigned __reduce_add_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_add(__mask, __value);
+}
+__device__ inline int __reduce_add_sync_signed_impl(unsigned __mask,
+int __value) {
+  return __nvvm_redux_sync_add(__mask, __value);
+}
+__device__ inline unsigned __reduce_min_sync_unsigned_impl(unsigned __mask,
+ 

[PATCH] D148089: [clang][CodeGen] Break up TargetInfo.cpp [1/8]

[Sergei Barannikov via Phabricator via cfe-commits]

barannikov88 added a comment.

In D148089#4357219 , @rjmccall wrote:

> Sergei, feel free to start landing patches like this one that were already 
> approved.  You don't need the entire sequence to be approved first.

Ah, OK! I thought it is required.


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[PATCH] D150894: [CUDA] provide wrapper functions for new NVCC builtins.

[Artem Belevich via Phabricator via cfe-commits]

tra updated this revision to Diff 523879.
tra added a comment.

Added __nv_associate_access_property_impl() stub.


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Index: clang/lib/Headers/__clang_cuda_intrinsics.h
===
--- clang/lib/Headers/__clang_cuda_intrinsics.h
+++ clang/lib/Headers/__clang_cuda_intrinsics.h
@@ -512,6 +512,78 @@
 __device__ inline cuuint32_t __nvvm_get_smem_pointer(void *__ptr) {
   return __nv_cvta_generic_to_shared_impl(__ptr);
 }
+
+#if !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 800
+__device__ inline unsigned __reduce_add_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_add(__mask, __value);
+}
+__device__ inline int __reduce_add_sync_signed_impl(unsigned __mask,
+int __value) {
+  return __nvvm_redux_sync_add(__mask, __value);
+}
+__device__ inline unsigned __reduce_min_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_umin(__mask, __value);
+}
+__device__ inline unsigned __reduce_max_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_umax(__mask, __value);
+}
+__device__ inline int __reduce_min_sync_signed_impl(unsigned __mask,
+int __value) {
+  return __nvvm_redux_sync_min(__mask, __value);
+}
+__device__ inline int __reduce_max_sync_signed_impl(unsigned __mask,
+int __value) {
+  return __nvvm_redux_sync_max(__mask, __value);
+}
+__device__ inline unsigned __reduce_or_sync_unsigned_impl(unsigned __mask,
+  unsigned __value) {
+  return __nvvm_redux_sync_or(__mask, __value);
+}
+__device__ inline unsigned __reduce_and_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_and(__mask, __value);
+}
+__device__ inline unsigned __reduce_xor_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_xor(__mask, __value);
+}
+
+__device__ inline void
+__nv_memcpy_async_shared_global_4_impl(void *__dst, const void *__src,
+   unsigned __src_size) {
+  __nvvm_cp_async_ca_shared_global_4(
+  (void __attribute__((address_space(3))) *)__dst,
+  (const void __attribute__((address_space(1))) *)__src, __src_size);
+}
+__device__ inline void
+__nv_memcpy_async_shared_global_8_impl(void *__dst, const void *__src,
+   unsigned __src_size) {
+  __nvvm_cp_async_ca_shared_global_8(
+  (void __attribute__((address_space(3))) *)__dst,
+  (const void __attribute__((address_space(1))) *)__src, __src_size);
+}
+__device__ inline void
+__nv_memcpy_async_shared_global_16_impl(void *__dst, const void *__src,
+unsigned __src_size) {
+  __nvvm_cp_async_ca_shared_global_16(
+  (void __attribute__((address_space(3))) *)__dst,
+  (const void __attribute__((address_space(1))) *)__src, __src_size);
+}
+
+__device__ inline void *
+__nv_associate_access_property_impl(const void *__ptr,
+unsigned long long __prop) {
+  // TODO: it appears to provide compiler with some sort of a hint. We do not
+  // know what exactly it is supposed to do. However, CUDA headers suggest that
+  // just passing through __ptr should not affect correctness. The do so on
+  // pre-sm80 GPUs where this builtin is not available.
+  return (void*)__ptr;
+}
+#endif // !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 800
+
 } // extern "C"
 #endif // CUDA_VERSION >= 11000
 


Index: clang/lib/Headers/__clang_cuda_intrinsics.h
===
--- clang/lib/Headers/__clang_cuda_intrinsics.h
+++ clang/lib/Headers/__clang_cuda_intrinsics.h
@@ -512,6 +512,78 @@
 __device__ inline cuuint32_t __nvvm_get_smem_pointer(void *__ptr) {
   return __nv_cvta_generic_to_shared_impl(__ptr);
 }
+
+#if !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 800
+__device__ inline unsigned __reduce_add_sync_unsigned_impl(unsigned __mask,
+   unsigned __value) {
+  return __nvvm_redux_sync_add(__mask, __value);
+}
+__device__ inline int __reduce_add_sync_signed_impl(unsigned __mask,
+int __value) {
+  return __nvvm_redux_sync_add(__mask, __value);
+}
+__device__ inline unsigned 

[PATCH] D150955: [clang][AST] Propagate the value-dependent bit for VAArgExpr.

[Haojian Wu via Phabricator via cfe-commits]

hokein added a comment.

Thanks for the review.

In D150955#4356580 , @aaron.ballman 
wrote:

> LGTM assuming CI is okay with it -- the patch did not apply so precommit CI 
> never ran. I'm surprised no tests break as a result of this because it 
> changes both C and C++ behavior. The changes should have a release note, too.

This patch was based on my another fix (this probably explains why it failed to 
apply on pre-merge testing CI). I have test it with `ninja check-clang`.


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[PATCH] D150955: [clang][AST] Propagate the value-dependent bit for VAArgExpr.

[Haojian Wu via Phabricator via cfe-commits]

hokein updated this revision to Diff 523875.
hokein added a comment.

add release note


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Files:
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  clang/lib/AST/ComputeDependence.cpp
  clang/test/AST/ast-dump-recovery.c


Index: clang/test/AST/ast-dump-recovery.c
===
--- clang/test/AST/ast-dump-recovery.c
+++ clang/test/AST/ast-dump-recovery.c
@@ -109,3 +109,11 @@
 b,
   };
 }
+
+// Verify no crash
+void test5_GH62711() {
+  // CHECK:  VAArgExpr {{.*}} 'int' contains-errors
+  // CHECK-NEXT: | `-ImplicitCastExpr {{.*}} '' contains-errors
+  // CHECK-NEXT: |   `-RecoveryExpr {{.*}} '' contains-errors
+  if (__builtin_va_arg(undef, int) << 1);
+}
Index: clang/lib/AST/ComputeDependence.cpp
===
--- clang/lib/AST/ComputeDependence.cpp
+++ clang/lib/AST/ComputeDependence.cpp
@@ -227,7 +227,7 @@
   auto D = toExprDependenceAsWritten(
E->getWrittenTypeInfo()->getType()->getDependence()) |
(E->getSubExpr()->getDependence() & ~ExprDependence::Type);
-  return D & ~ExprDependence::Value;
+  return D;
 }
 
 ExprDependence clang::computeDependence(NoInitExpr *E) {
Index: clang/docs/ReleaseNotes.rst
===
--- clang/docs/ReleaseNotes.rst
+++ clang/docs/ReleaseNotes.rst
@@ -413,6 +413,9 @@
 - Fix a crash when an enum constant has a dependent-type recovery expression 
for
   C.
   (`#62446 `_).
+- Propagate the value-dependent bit for VAArgExpr. Fixes a crash where a
+  __builtin_va_arg call has invalid arguments.
+  (`#62711 `_).
 
 Bug Fixes to Compiler Builtins
 ^^


Index: clang/test/AST/ast-dump-recovery.c
===
--- clang/test/AST/ast-dump-recovery.c
+++ clang/test/AST/ast-dump-recovery.c
@@ -109,3 +109,11 @@
 b,
   };
 }
+
+// Verify no crash
+void test5_GH62711() {
+  // CHECK:  VAArgExpr {{.*}} 'int' contains-errors
+  // CHECK-NEXT: | `-ImplicitCastExpr {{.*}} '' contains-errors
+  // CHECK-NEXT: |   `-RecoveryExpr {{.*}} '' contains-errors
+  if (__builtin_va_arg(undef, int) << 1);
+}
Index: clang/lib/AST/ComputeDependence.cpp
===
--- clang/lib/AST/ComputeDependence.cpp
+++ clang/lib/AST/ComputeDependence.cpp
@@ -227,7 +227,7 @@
   auto D = toExprDependenceAsWritten(
E->getWrittenTypeInfo()->getType()->getDependence()) |
(E->getSubExpr()->getDependence() & ~ExprDependence::Type);
-  return D & ~ExprDependence::Value;
+  return D;
 }
 
 ExprDependence clang::computeDependence(NoInitExpr *E) {
Index: clang/docs/ReleaseNotes.rst
===
--- clang/docs/ReleaseNotes.rst
+++ clang/docs/ReleaseNotes.rst
@@ -413,6 +413,9 @@
 - Fix a crash when an enum constant has a dependent-type recovery expression for
   C.
   (`#62446 `_).
+- Propagate the value-dependent bit for VAArgExpr. Fixes a crash where a
+  __builtin_va_arg call has invalid arguments.
+  (`#62711 `_).
 
 Bug Fixes to Compiler Builtins
 ^^
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[PATCH] D148851: Disable llvm-symbolizer on some of the driver tests that are timing out

[Akira Hatanaka via Phabricator via cfe-commits]

ahatanak added a comment.

ping


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[PATCH] D150965: [HIP] Allow std::malloc in device function

[Artem Belevich via Phabricator via cfe-commits]

tra added inline comments.



Comment at: clang/test/Headers/Inputs/include/math.h:108-109
 long lroundf(float __a);
-int max(int __a, int __b);
-int min(int __a, int __b);
 double modf(double __a, double *__b);

yaxunl wrote:
> tra wrote:
> > Why were these functions removed? It does not seem related to the changes 
> > in the patch?
> These functions caused failure in the added lit test.
> 
> For C++, max/min are defined as templates in . There is no max/min 
> in either standard C or C++ math.h. Their existence cause false alarms in lit 
> tests. Removing them to be consistent with standard C/C++ headers.
I suspect those may have been used for some CUDA tests. CUDA headers used to 
define `::min()` and `::max()`.

As long as it does not affect the tests, removing them is fine.




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[PATCH] D148089: [clang][CodeGen] Break up TargetInfo.cpp [1/8]

[John McCall via Phabricator via cfe-commits]

rjmccall added a comment.

Sergei, feel free to start landing patches like this one that were already 
approved.  You don't need the entire sequence to be approved first.


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[PATCH] D150985: [clang] Allow fp in atomic fetch max/min builtins

[Artem Belevich via Phabricator via cfe-commits]

tra added a comment.

The code changes look OK to me.

Whether allowing FP for clang builtins is OK -- I have no idea, especially for 
the c11 ones.


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[PATCH] D150948: [clang][RecoveryExpr] Fix a crash where a dependent type crahes on c-only code path.

[Haojian Wu via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGa62e205254c0: [clang][RecoveryExpr] Fix a crash where a 
dependent type crahes on c-only code… (authored by hokein).

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Files:
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  clang/lib/Sema/SemaDecl.cpp
  clang/test/AST/ast-dump-recovery.c


Index: clang/test/AST/ast-dump-recovery.c
===
--- clang/test/AST/ast-dump-recovery.c
+++ clang/test/AST/ast-dump-recovery.c
@@ -98,3 +98,14 @@
   // CHECK-NEXT: `-RecoveryExpr {{.*}} ''
   ext(undef_var);
 }
+
+// Verify no crash.
+void test4() {
+  enum GH62446 {
+// CHECK:  RecoveryExpr {{.*}} '' contains-errors 
lvalue
+// CHECK-NEXT: |-StringLiteral {{.*}} "a"
+// CHECK-NEXT: `-IntegerLiteral {{.*}} 2
+invalid_enum_value = "a" * 2,
+b,
+  };
+}
Index: clang/lib/Sema/SemaDecl.cpp
===
--- clang/lib/Sema/SemaDecl.cpp
+++ clang/lib/Sema/SemaDecl.cpp
@@ -19307,6 +19307,7 @@
 if (!getLangOpts().CPlusPlus && !T.isNull())
   Diag(IdLoc, diag::warn_enum_value_overflow);
   } else if (!getLangOpts().CPlusPlus &&
+ !EltTy->isDependentType() &&
  !isRepresentableIntegerValue(Context, EnumVal, EltTy)) {
 // Enforce C99 6.7.2.2p2 even when we compute the next value.
 Diag(IdLoc, diag::ext_enum_value_not_int)
Index: clang/docs/ReleaseNotes.rst
===
--- clang/docs/ReleaseNotes.rst
+++ clang/docs/ReleaseNotes.rst
@@ -410,6 +410,9 @@
   when it had been instantiated from a partial template specialization with 
different
   template arguments on the containing class. This fixes:
   (`#60778 `_).
+- Fix a crash when an enum constant has a dependent-type recovery expression 
for
+  C.
+  (`#62446 `_).
 
 Bug Fixes to Compiler Builtins
 ^^


Index: clang/test/AST/ast-dump-recovery.c
===
--- clang/test/AST/ast-dump-recovery.c
+++ clang/test/AST/ast-dump-recovery.c
@@ -98,3 +98,14 @@
   // CHECK-NEXT: `-RecoveryExpr {{.*}} ''
   ext(undef_var);
 }
+
+// Verify no crash.
+void test4() {
+  enum GH62446 {
+// CHECK:  RecoveryExpr {{.*}} '' contains-errors lvalue
+// CHECK-NEXT: |-StringLiteral {{.*}} "a"
+// CHECK-NEXT: `-IntegerLiteral {{.*}} 2
+invalid_enum_value = "a" * 2,
+b,
+  };
+}
Index: clang/lib/Sema/SemaDecl.cpp
===
--- clang/lib/Sema/SemaDecl.cpp
+++ clang/lib/Sema/SemaDecl.cpp
@@ -19307,6 +19307,7 @@
 if (!getLangOpts().CPlusPlus && !T.isNull())
   Diag(IdLoc, diag::warn_enum_value_overflow);
   } else if (!getLangOpts().CPlusPlus &&
+ !EltTy->isDependentType() &&
  !isRepresentableIntegerValue(Context, EnumVal, EltTy)) {
 // Enforce C99 6.7.2.2p2 even when we compute the next value.
 Diag(IdLoc, diag::ext_enum_value_not_int)
Index: clang/docs/ReleaseNotes.rst
===
--- clang/docs/ReleaseNotes.rst
+++ clang/docs/ReleaseNotes.rst
@@ -410,6 +410,9 @@
   when it had been instantiated from a partial template specialization with different
   template arguments on the containing class. This fixes:
   (`#60778 `_).
+- Fix a crash when an enum constant has a dependent-type recovery expression for
+  C.
+  (`#62446 `_).
 
 Bug Fixes to Compiler Builtins
 ^^
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[clang] a62e205 - [clang][RecoveryExpr] Fix a crash where a dependent type crahes on c-only code path.

[Haojian Wu via cfe-commits]

Author: Haojian Wu
Date: 2023-05-19T20:24:54+02:00
New Revision: a62e205254c0f482ba38bacc1f7f6927e6bc6375

URL: 
https://github.com/llvm/llvm-project/commit/a62e205254c0f482ba38bacc1f7f6927e6bc6375
DIFF: 
https://github.com/llvm/llvm-project/commit/a62e205254c0f482ba38bacc1f7f6927e6bc6375.diff

LOG: [clang][RecoveryExpr] Fix a crash where a dependent type crahes on c-only 
code path.

A depenent type is possible in C-only path, add a proper handling when
checking the enum constant.

Fixes https://github.com/llvm/llvm-project/issues/62446

Differential Revision: https://reviews.llvm.org/D150948

Added: 


Modified: 
clang/docs/ReleaseNotes.rst
clang/lib/Sema/SemaDecl.cpp
clang/test/AST/ast-dump-recovery.c

Removed: 




diff  --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 9bcc17b0c5ff8..3035e23f0b45c 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -410,6 +410,9 @@ Bug Fixes in This Version
   when it had been instantiated from a partial template specialization with 
diff erent
   template arguments on the containing class. This fixes:
   (`#60778 `_).
+- Fix a crash when an enum constant has a dependent-type recovery expression 
for
+  C.
+  (`#62446 `_).
 
 Bug Fixes to Compiler Builtins
 ^^

diff  --git a/clang/lib/Sema/SemaDecl.cpp b/clang/lib/Sema/SemaDecl.cpp
index f499a8658d73a..eff5f38960f7e 100644
--- a/clang/lib/Sema/SemaDecl.cpp
+++ b/clang/lib/Sema/SemaDecl.cpp
@@ -19307,6 +19307,7 @@ EnumConstantDecl *Sema::CheckEnumConstant(EnumDecl 
*Enum,
 if (!getLangOpts().CPlusPlus && !T.isNull())
   Diag(IdLoc, diag::warn_enum_value_overflow);
   } else if (!getLangOpts().CPlusPlus &&
+ !EltTy->isDependentType() &&
  !isRepresentableIntegerValue(Context, EnumVal, EltTy)) {
 // Enforce C99 6.7.2.2p2 even when we compute the next value.
 Diag(IdLoc, diag::ext_enum_value_not_int)

diff  --git a/clang/test/AST/ast-dump-recovery.c 
b/clang/test/AST/ast-dump-recovery.c
index f7b3c7bb4f2f4..75441c1c9de0a 100644
--- a/clang/test/AST/ast-dump-recovery.c
+++ b/clang/test/AST/ast-dump-recovery.c
@@ -98,3 +98,14 @@ void test3() {
   // CHECK-NEXT: `-RecoveryExpr {{.*}} ''
   ext(undef_var);
 }
+
+// Verify no crash.
+void test4() {
+  enum GH62446 {
+// CHECK:  RecoveryExpr {{.*}} '' contains-errors 
lvalue
+// CHECK-NEXT: |-StringLiteral {{.*}} "a"
+// CHECK-NEXT: `-IntegerLiteral {{.*}} 2
+invalid_enum_value = "a" * 2,
+b,
+  };
+}



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[PATCH] D149612: [Sema] avoid merge error type

[Erich Keane via Phabricator via cfe-commits]

erichkeane accepted this revision.
erichkeane added a comment.
This revision is now accepted and ready to land.

I think this is looking fine to me.  Thanks for your patience on this, I know 
it was a tough review.




Comment at: clang/lib/Sema/SemaDecl.cpp:4399
  bool MergeTypeWithOld) {
-  if (New->isInvalidDecl() || Old->isInvalidDecl())
+  if (New->isInvalidDecl() || Old->isInvalidDecl() || 
New->getType()->containsErrors() || Old->getType()->containsErrors())
 return;

NIT: 80 line character limit per  line.


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[PATCH] D149516: [Sema] `setInvalidDecl` for error deduction declaration

[Congcong Cai via Phabricator via cfe-commits]

HerrCai0907 added a comment.

ping


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[PATCH] D150212: [clang][Sema] Improve diagnostics for auto return type

[Yaxun Liu via Phabricator via cfe-commits]

yaxunl added a comment.

ping

The pre-merge check failure seems not related to the patch. Other patches also 
fail the same way.


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[PATCH] D149612: [Sema] avoid merge error type

[Congcong Cai via Phabricator via cfe-commits]

HerrCai0907 updated this revision to Diff 523870.
HerrCai0907 added a comment.

revert untill first version


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  clang/lib/Sema/SemaDecl.cpp
  clang/test/Sema/merge-decls.c


Index: clang/test/Sema/merge-decls.c
===
--- clang/test/Sema/merge-decls.c
+++ clang/test/Sema/merge-decls.c
@@ -91,3 +91,7 @@
   int x[5];
   test7_f(); // expected-warning {{incompatible pointer types passing 'int 
(*)[5]' to parameter of type 'int (*)[10]}}
 }
+
+char d;
+char x[sizeof(d.data) == 8]; // expected-error {{member reference base type 
'char' is not a structure or union}}
+char x[sizeof(d.data) == 4]; // expected-error {{member reference base type 
'char' is not a structure or union}}
Index: clang/lib/Sema/SemaDecl.cpp
===
--- clang/lib/Sema/SemaDecl.cpp
+++ clang/lib/Sema/SemaDecl.cpp
@@ -4396,7 +4396,7 @@
 /// is attached.
 void Sema::MergeVarDeclTypes(VarDecl *New, VarDecl *Old,
  bool MergeTypeWithOld) {
-  if (New->isInvalidDecl() || Old->isInvalidDecl())
+  if (New->isInvalidDecl() || Old->isInvalidDecl() || 
New->getType()->containsErrors() || Old->getType()->containsErrors())
 return;
 
   QualType MergedT;
Index: clang/docs/ReleaseNotes.rst
===
--- clang/docs/ReleaseNotes.rst
+++ clang/docs/ReleaseNotes.rst
@@ -383,6 +383,8 @@
 - Fix crash when attempting to perform parenthesized initialization of an
   aggregate with a base class with only non-public constructors.
   (`#62296 `_)
+- Fix crash when redefine variant with invalid type as another invalid type.
+  (`#62447 `_)
 - Fix a stack overflow issue when evaluating ``consteval`` default arguments.
   (`#60082` `_)
 - Fix the assertion hit when generating code for global variable initializer of


Index: clang/test/Sema/merge-decls.c
===
--- clang/test/Sema/merge-decls.c
+++ clang/test/Sema/merge-decls.c
@@ -91,3 +91,7 @@
   int x[5];
   test7_f(); // expected-warning {{incompatible pointer types passing 'int (*)[5]' to parameter of type 'int (*)[10]}}
 }
+
+char d;
+char x[sizeof(d.data) == 8]; // expected-error {{member reference base type 'char' is not a structure or union}}
+char x[sizeof(d.data) == 4]; // expected-error {{member reference base type 'char' is not a structure or union}}
Index: clang/lib/Sema/SemaDecl.cpp
===
--- clang/lib/Sema/SemaDecl.cpp
+++ clang/lib/Sema/SemaDecl.cpp
@@ -4396,7 +4396,7 @@
 /// is attached.
 void Sema::MergeVarDeclTypes(VarDecl *New, VarDecl *Old,
  bool MergeTypeWithOld) {
-  if (New->isInvalidDecl() || Old->isInvalidDecl())
+  if (New->isInvalidDecl() || Old->isInvalidDecl() || New->getType()->containsErrors() || Old->getType()->containsErrors())
 return;
 
   QualType MergedT;
Index: clang/docs/ReleaseNotes.rst
===
--- clang/docs/ReleaseNotes.rst
+++ clang/docs/ReleaseNotes.rst
@@ -383,6 +383,8 @@
 - Fix crash when attempting to perform parenthesized initialization of an
   aggregate with a base class with only non-public constructors.
   (`#62296 `_)
+- Fix crash when redefine variant with invalid type as another invalid type.
+  (`#62447 `_)
 - Fix a stack overflow issue when evaluating ``consteval`` default arguments.
   (`#60082` `_)
 - Fix the assertion hit when generating code for global variable initializer of
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[PATCH] D150948: [clang][RecoveryExpr] Fix a crash where a dependent type crahes on c-only code path.

[Haojian Wu via Phabricator via cfe-commits]

hokein added a comment.

Thanks for the fast review!


Repository:
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[PATCH] D150948: [clang][RecoveryExpr] Fix a crash where a dependent type crahes on c-only code path.

[Haojian Wu via Phabricator via cfe-commits]

hokein updated this revision to Diff 523868.
hokein added a comment.

add release note.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D150948/new/

https://reviews.llvm.org/D150948

Files:
  clang/docs/ReleaseNotes.rst
  clang/lib/Sema/SemaDecl.cpp
  clang/test/AST/ast-dump-recovery.c


Index: clang/test/AST/ast-dump-recovery.c
===
--- clang/test/AST/ast-dump-recovery.c
+++ clang/test/AST/ast-dump-recovery.c
@@ -98,3 +98,14 @@
   // CHECK-NEXT: `-RecoveryExpr {{.*}} ''
   ext(undef_var);
 }
+
+// Verify no crash.
+void test4() {
+  enum GH62446 {
+// CHECK:  RecoveryExpr {{.*}} '' contains-errors 
lvalue
+// CHECK-NEXT: |-StringLiteral {{.*}} "a"
+// CHECK-NEXT: `-IntegerLiteral {{.*}} 2
+invalid_enum_value = "a" * 2,
+b,
+  };
+}
Index: clang/lib/Sema/SemaDecl.cpp
===
--- clang/lib/Sema/SemaDecl.cpp
+++ clang/lib/Sema/SemaDecl.cpp
@@ -19307,6 +19307,7 @@
 if (!getLangOpts().CPlusPlus && !T.isNull())
   Diag(IdLoc, diag::warn_enum_value_overflow);
   } else if (!getLangOpts().CPlusPlus &&
+ !EltTy->isDependentType() &&
  !isRepresentableIntegerValue(Context, EnumVal, EltTy)) {
 // Enforce C99 6.7.2.2p2 even when we compute the next value.
 Diag(IdLoc, diag::ext_enum_value_not_int)
Index: clang/docs/ReleaseNotes.rst
===
--- clang/docs/ReleaseNotes.rst
+++ clang/docs/ReleaseNotes.rst
@@ -406,6 +406,9 @@
   when it had been instantiated from a partial template specialization with 
different
   template arguments on the containing class. This fixes:
   (`#60778 `_).
+- Fix a crash when an enum constant has a dependent-type recovery expression 
for
+  C.
+  (`#62446 `_).
 
 Bug Fixes to Compiler Builtins
 ^^


Index: clang/test/AST/ast-dump-recovery.c
===
--- clang/test/AST/ast-dump-recovery.c
+++ clang/test/AST/ast-dump-recovery.c
@@ -98,3 +98,14 @@
   // CHECK-NEXT: `-RecoveryExpr {{.*}} ''
   ext(undef_var);
 }
+
+// Verify no crash.
+void test4() {
+  enum GH62446 {
+// CHECK:  RecoveryExpr {{.*}} '' contains-errors lvalue
+// CHECK-NEXT: |-StringLiteral {{.*}} "a"
+// CHECK-NEXT: `-IntegerLiteral {{.*}} 2
+invalid_enum_value = "a" * 2,
+b,
+  };
+}
Index: clang/lib/Sema/SemaDecl.cpp
===
--- clang/lib/Sema/SemaDecl.cpp
+++ clang/lib/Sema/SemaDecl.cpp
@@ -19307,6 +19307,7 @@
 if (!getLangOpts().CPlusPlus && !T.isNull())
   Diag(IdLoc, diag::warn_enum_value_overflow);
   } else if (!getLangOpts().CPlusPlus &&
+ !EltTy->isDependentType() &&
  !isRepresentableIntegerValue(Context, EnumVal, EltTy)) {
 // Enforce C99 6.7.2.2p2 even when we compute the next value.
 Diag(IdLoc, diag::ext_enum_value_not_int)
Index: clang/docs/ReleaseNotes.rst
===
--- clang/docs/ReleaseNotes.rst
+++ clang/docs/ReleaseNotes.rst
@@ -406,6 +406,9 @@
   when it had been instantiated from a partial template specialization with different
   template arguments on the containing class. This fixes:
   (`#60778 `_).
+- Fix a crash when an enum constant has a dependent-type recovery expression for
+  C.
+  (`#62446 `_).
 
 Bug Fixes to Compiler Builtins
 ^^
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[PATCH] D150985: [clang] Allow fp in atomic fetch max/min builtins

[Yaxun Liu via Phabricator via cfe-commits]

yaxunl created this revision.
yaxunl added reviewers: rjmccall, tra.
Herald added subscribers: kerbowa, jvesely.
Herald added a project: All.
yaxunl requested review of this revision.

LLVM IR already allows floating point type in atomicrmw.
Update clang atomic fetch max/min builtins to accept
floating point type like we did for fetch add/sub.


https://reviews.llvm.org/D150985

Files:
  clang/lib/CodeGen/CGAtomic.cpp
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu
  clang/test/Sema/atomic-ops.c
  clang/test/SemaOpenCL/atomic-ops.cl

Index: clang/test/SemaOpenCL/atomic-ops.cl
===
--- clang/test/SemaOpenCL/atomic-ops.cl
+++ clang/test/SemaOpenCL/atomic-ops.cl
@@ -61,8 +61,8 @@
 
   __opencl_atomic_fetch_min(i, 1, memory_order_seq_cst, memory_scope_work_group);
   __opencl_atomic_fetch_max(i, 1, memory_order_seq_cst, memory_scope_work_group);
-  __opencl_atomic_fetch_min(f, 1, memory_order_seq_cst, memory_scope_work_group); // expected-error {{address argument to atomic operation must be a pointer to atomic integer ('__generic atomic_float *' (aka '__generic _Atomic(float) *') invalid)}}
-  __opencl_atomic_fetch_max(f, 1, memory_order_seq_cst, memory_scope_work_group); // expected-error {{address argument to atomic operation must be a pointer to atomic integer ('__generic atomic_float *' (aka '__generic _Atomic(float) *') invalid)}}
+  __opencl_atomic_fetch_min(f, 1, memory_order_seq_cst, memory_scope_work_group);
+  __opencl_atomic_fetch_max(f, 1, memory_order_seq_cst, memory_scope_work_group);
 
   bool cmpexch_1 = __opencl_atomic_compare_exchange_strong(i, I, 1, memory_order_seq_cst, memory_order_seq_cst, memory_scope_work_group);
   bool cmpexch_2 = __opencl_atomic_compare_exchange_strong(p, P, 1, memory_order_seq_cst, memory_order_seq_cst, memory_scope_work_group);
Index: clang/test/Sema/atomic-ops.c
===
--- clang/test/Sema/atomic-ops.c
+++ clang/test/Sema/atomic-ops.c
@@ -205,8 +205,8 @@
   __atomic_fetch_sub(P, 3, memory_order_seq_cst);
   __atomic_fetch_sub(D, 3, memory_order_seq_cst);
   __atomic_fetch_sub(s1, 3, memory_order_seq_cst); // expected-error {{must be a pointer to integer, pointer or supported floating point type}}
-  __atomic_fetch_min(D, 3, memory_order_seq_cst); // expected-error {{must be a pointer to integer}}
-  __atomic_fetch_max(P, 3, memory_order_seq_cst); // expected-error {{must be a pointer to integer}}
+  __atomic_fetch_min(D, 3, memory_order_seq_cst);
+  __atomic_fetch_max(P, 3, memory_order_seq_cst);
   __atomic_fetch_max(p, 3);   // expected-error {{too few arguments to function call, expected 3, have 2}}
 
   __c11_atomic_fetch_and(i, 1, memory_order_seq_cst);
Index: clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu
===
--- clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu
+++ clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu
@@ -1,29 +1,98 @@
-// RUN: %clang_cc1 %s -emit-llvm -o - -triple=amdgcn-amd-amdhsa \
+// RUN: %clang_cc1 -x hip %s -emit-llvm -o - -triple=amdgcn-amd-amdhsa \
 // RUN:   -fcuda-is-device -target-cpu gfx906 -fnative-half-type \
 // RUN:   -fnative-half-arguments-and-returns | FileCheck %s
 
+// RUN: %clang_cc1 -x hip %s -O3 -S -o - -triple=amdgcn-amd-amdhsa \
+// RUN:   -fcuda-is-device -target-cpu gfx1100 -fnative-half-type \
+// RUN:   -fnative-half-arguments-and-returns | FileCheck -check-prefix=SAFE %s
+
+// RUN: %clang_cc1 -x hip %s -O3 -S -o - -triple=amdgcn-amd-amdhsa \
+// RUN:   -fcuda-is-device -target-cpu gfx940 -fnative-half-type \
+// RUN:   -fnative-half-arguments-and-returns -munsafe-fp-atomics \
+// RUN:   | FileCheck -check-prefix=UNSAFE %s
+
 // REQUIRES: amdgpu-registered-target
 
 #include "Inputs/cuda.h"
 #include 
 
-__device__ float ffp1(float *p) {
+__global__ void ffp1(float *p) {
   // CHECK-LABEL: @_Z4ffp1Pf
   // CHECK: atomicrmw fadd ptr {{.*}} monotonic
-  return __atomic_fetch_add(p, 1.0f, memory_order_relaxed);
+  // CHECK: atomicrmw fmax ptr {{.*}} monotonic
+  // CHECK: atomicrmw fmin ptr {{.*}} monotonic
+  // CHECK: atomicrmw fmax ptr {{.*}} syncscope("agent-one-as") monotonic
+  // CHECK: atomicrmw fmin ptr {{.*}} syncscope("workgroup-one-as") monotonic
+  // SAFE: _Z4ffp1Pf
+  // SAFE: global_atomic_cmpswap
+  // SAFE: global_atomic_cmpswap
+  // SAFE: global_atomic_cmpswap
+  // SAFE: global_atomic_cmpswap
+  // SAFE: global_atomic_cmpswap
+  // UNSAFE: _Z4ffp1Pf
+  // UNSAFE: global_atomic_add_f32
+  // UNSAFE: global_atomic_cmpswap
+  // UNSAFE: global_atomic_cmpswap
+  // UNSAFE: global_atomic_cmpswap
+  // UNSAFE: global_atomic_cmpswap
+  __atomic_fetch_add(p, 1.0f, memory_order_relaxed);
+  __atomic_fetch_max(p, 1.0f, memory_order_relaxed);
+  __atomic_fetch_min(p, 1.0f, memory_order_relaxed);
+  __hip_atomic_fetch_max(p, 1.0f, memory_order_relaxed, __HIP_MEMORY_SCOPE_AGENT);
+  

[PATCH] D147917: [11/11][POC][Clang][RISCV] Define vset for tuple type

[Yueh-Ting (eop) Chen via Phabricator via cfe-commits]

eopXD updated this revision to Diff 523867.
eopXD added a comment.

Add unsigned cast to eliminate compile warning.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147917/new/

https://reviews.llvm.org/D147917

Files:
  clang/include/clang/Basic/riscv_vector.td
  clang/lib/Sema/SemaChecking.cpp
  
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset_tuple.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c


Index: 
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c
===
--- 
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c
+++ 
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c
@@ -339,3 +339,8 @@
   // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}}
   return __riscv_vset_v_f16m4_f16m8(dest, 2, val);
 }
+
+vint32m1x2_t test_vset_v_i32m1x2_i32m1(vint32m1x2_t dest, vint32m1_t val) {
+  // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}}
+  return __riscv_vset_v_i32m1x2_i32m1(dest, 2, val);
+}
Index: 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset_tuple.c
===
--- /dev/null
+++ 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset_tuple.c
@@ -0,0 +1,20 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 2
+// REQUIRES: riscv-registered-target
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
+// RUN:   -target-feature +experimental-zvfh -disable-O0-optnone  \
+// RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
+// RUN:   FileCheck --check-prefix=CHECK-RV64 %s
+
+#include 
+
+// CHECK-RV64-LABEL: define dso_local { ,  
} @test_vset_v_i32m1x2_i32m1
+// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]],  [[DEST_COERCE1:%.*]],  [[VAL:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-RV64-NEXT:  entry:
+// CHECK-RV64-NEXT:[[TMP0:%.*]] = insertvalue { , 
 } poison,  [[DEST_COERCE0]], 0
+// CHECK-RV64-NEXT:[[TMP1:%.*]] = insertvalue { , 
 } [[TMP0]],  [[DEST_COERCE1]], 1
+// CHECK-RV64-NEXT:[[TMP2:%.*]] = insertvalue { , 
 } [[TMP1]],  [[VAL]], 0
+// CHECK-RV64-NEXT:ret { ,  } [[TMP2]]
+//
+vint32m1x2_t test_vset_v_i32m1x2_i32m1(vint32m1x2_t dest, vint32m1_t val) {
+  return __riscv_vset_v_i32m1x2_i32m1(dest, 0, val);
+}
Index: clang/lib/Sema/SemaChecking.cpp
===
--- clang/lib/Sema/SemaChecking.cpp
+++ clang/lib/Sema/SemaChecking.cpp
@@ -4534,9 +4534,12 @@
 ASTContext::BuiltinVectorTypeInfo VecInfo =
 Context.getBuiltinVectorTypeInfo(cast(
 TheCall->getArg(2)->getType().getCanonicalType().getTypePtr()));
-unsigned MaxIndex =
-(ResVecInfo.EC.getKnownMinValue() * ResVecInfo.NumVectors) /
-(VecInfo.EC.getKnownMinValue() * VecInfo.NumVectors);
+unsigned MaxIndex;
+if (ResVecInfo.NumVectors != 1) // vset for tuple type
+  MaxIndex = ResVecInfo.NumVectors;
+else // vset fo non-tuple type
+  MaxIndex = (ResVecInfo.EC.getKnownMinValue() * ResVecInfo.NumVectors) /
+ (VecInfo.EC.getKnownMinValue() * VecInfo.NumVectors);
 return SemaBuiltinConstantArgRange(TheCall, 1, 0, MaxIndex - 1);
   }
   case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u8mf8:
Index: clang/include/clang/Basic/riscv_vector.td
===
--- clang/include/clang/Basic/riscv_vector.td
+++ clang/include/clang/Basic/riscv_vector.td
@@ -2569,6 +2569,11 @@
   let Name = "vset_v", Log2LMUL = [0, 1, 2], MaskedPolicyScheme = NonePolicy,
   ManualCodegen = [{
   {
+if (isa(ResultType)) // For tuple type
+  // Insert value (operand 2) into index (operand 1) of vtuple 
(operand 0)
+  return Builder.CreateInsertValue(
+Ops[0], Ops[2],
+{(unsigned)cast(Ops[1])->getZExtValue()});
 auto *ResVecTy = cast(ResultType);
 auto *VecTy = cast(Ops[2]->getType());
 // Mask to only valid indices.
@@ -2586,5 +2591,11 @@
   def : RVVBuiltin<"v" # dst_lmul # "v", dst_lmul # "v" # dst_lmul # 
"vKzv", "csilxfd">;
   def : RVVBuiltin<"Uv" # dst_lmul # "Uv", dst_lmul # "Uv" # dst_lmul 
#"UvKzUv", "csil">;
 }
+foreach nf = [2] in {
+  let Log2LMUL = [0] in {
+defvar T = "(Tuple:" # nf # ")";
+def : RVVBuiltin;
+  }
+}
   }
 }


Index: clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c
===
--- clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c
+++ clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c
@@ -339,3 +339,8 @@
   

[PATCH] D147916: [10/11][POC][Clang][RISCV] Define vget for tuple type

[Yueh-Ting (eop) Chen via Phabricator via cfe-commits]

eopXD updated this revision to Diff 523865.
eopXD added a comment.

Add unsigned cast to eliminate compile warning.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147916/new/

https://reviews.llvm.org/D147916

Files:
  clang/include/clang/Basic/riscv_vector.td
  clang/lib/Sema/SemaChecking.cpp
  clang/lib/Support/RISCVVIntrinsicUtils.cpp
  
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vget_tuple.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vget-index-out-of-range.c


Index: 
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vget-index-out-of-range.c
===
--- 
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vget-index-out-of-range.c
+++ 
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vget-index-out-of-range.c
@@ -339,3 +339,8 @@
   // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}}
   return __riscv_vget_v_f16m8_f16m4(src, 2);
 }
+
+vint32m1_t test_vget_v_i32m1x2_i32m1(vint32m1x2_t src) {
+  // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}}
+  return __riscv_vget_v_i32m1x2_i32m1(src, 2);
+}
Index: 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vget_tuple.c
===
--- /dev/null
+++ 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vget_tuple.c
@@ -0,0 +1,20 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 2
+// REQUIRES: riscv-registered-target
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
+// RUN:   -target-feature +experimental-zvfh -disable-O0-optnone  \
+// RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
+// RUN:   FileCheck --check-prefix=CHECK-RV64 %s
+
+#include 
+
+// CHECK-RV64-LABEL: define dso_local  
@test_vget_v_i32m1x2_i32m1
+// CHECK-RV64-SAME: ( [[SRC_COERCE0:%.*]],  [[SRC_COERCE1:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-RV64-NEXT:  entry:
+// CHECK-RV64-NEXT:[[TMP0:%.*]] = insertvalue { , 
 } poison,  [[SRC_COERCE0]], 0
+// CHECK-RV64-NEXT:[[TMP1:%.*]] = insertvalue { , 
 } [[TMP0]],  [[SRC_COERCE1]], 1
+// CHECK-RV64-NEXT:[[TMP2:%.*]] = extractvalue { , 
 } [[TMP1]], 0
+// CHECK-RV64-NEXT:ret  [[TMP2]]
+//
+vint32m1_t test_vget_v_i32m1x2_i32m1(vint32m1x2_t src) {
+  return __riscv_vget_v_i32m1x2_i32m1(src, 0);
+}
Index: clang/lib/Support/RISCVVIntrinsicUtils.cpp
===
--- clang/lib/Support/RISCVVIntrinsicUtils.cpp
+++ clang/lib/Support/RISCVVIntrinsicUtils.cpp
@@ -332,6 +332,8 @@
   }
   if (isVector())
 ShortStr += LMUL.str();
+  if (isTuple())
+ShortStr += "x" + utostr(NF);
 }
 
 void RVVType::applyBasicType() {
Index: clang/lib/Sema/SemaChecking.cpp
===
--- clang/lib/Sema/SemaChecking.cpp
+++ clang/lib/Sema/SemaChecking.cpp
@@ -4519,9 +4519,12 @@
 ASTContext::BuiltinVectorTypeInfo VecInfo =
 Context.getBuiltinVectorTypeInfo(cast(
 TheCall->getArg(0)->getType().getCanonicalType().getTypePtr()));
-unsigned MaxIndex =
-(VecInfo.EC.getKnownMinValue() * VecInfo.NumVectors) /
-(ResVecInfo.EC.getKnownMinValue() * ResVecInfo.NumVectors);
+unsigned MaxIndex;
+if (VecInfo.NumVectors != 1) // vget for tuple type
+  MaxIndex = VecInfo.NumVectors;
+else // vget for non-tuple type
+  MaxIndex = (VecInfo.EC.getKnownMinValue() * VecInfo.NumVectors) /
+ (ResVecInfo.EC.getKnownMinValue() * ResVecInfo.NumVectors);
 return SemaBuiltinConstantArgRange(TheCall, 1, 0, MaxIndex - 1);
   }
   case RISCVVector::BI__builtin_rvv_vset_v: {
Index: clang/include/clang/Basic/riscv_vector.td
===
--- clang/include/clang/Basic/riscv_vector.td
+++ clang/include/clang/Basic/riscv_vector.td
@@ -2536,6 +2536,11 @@
   let Name = "vget_v", MaskedPolicyScheme = NonePolicy,
   ManualCodegen = [{
   {
+if (isa(Ops[0]->getType())) // For tuple type
+  // Extract value from index (operand 1) of vtuple (operand 0)
+  return Builder.CreateExtractValue(
+Ops[0],
+{(unsigned)cast(Ops[1])->getZExtValue()});
 auto *VecTy = cast(ResultType);
 auto *OpVecTy = cast(Ops[0]->getType());
 // Mask to only valid indices.
@@ -2553,6 +2558,12 @@
   def : RVVBuiltin<"v" # dst_lmul # "v", dst_lmul # "vvKz", "csilxfd", 
dst_lmul # "v">;
   def : RVVBuiltin<"Uv" # dst_lmul # "Uv", dst_lmul # "UvUvKz", "csil", 
dst_lmul # "Uv">;
 }
+foreach nf = [2] in {
+  let Log2LMUL = [0] in {
+defvar T = "(Tuple:" # nf # ")";
+def : RVVBuiltin;
+  }
+}
   }
 
   let Name = "vset_v", Log2LMUL = [0, 1, 2], MaskedPolicyScheme = 

[PATCH] D146148: Float_t and double_t types shouldn't be modified by #pragma clang fp eval_method

[John McCall via Phabricator via cfe-commits]

rjmccall added inline comments.



Comment at: clang/include/clang/Basic/IdentifierTable.h:316
+  unsigned getInterestingIdentifierID() {
+if (ObjCOrBuiltinID >= 1341 &&  ObjCOrBuiltinID < 1343)
+  return ObjCOrBuiltinID;

This is closer to the right approach, thanks.  I think the best way to do this 
is to put the ObjC keywords first, then the interesting identifiers, then the 
builtins.  That means the builtin ID code above should check for / add / 
subtract `tok::NUM_OBJC_KEYWORDS + tok::NUM_INTERESTING_IDENTIFIERS`; please 
add a `FirstBuiltinID` constant for that in this class so that we can more 
easily rework things in the future (e.g. if we decide to stuff more things into 
this field).  And then the code for InterestingIdentifierID should add/subtract 
`tok::NUM_OBJC_KEYWORDS`; again, please add a `FirstInterestingIdentifier` 
constant for that.

Please make these two functions use `tok::InterestingIdentifierKind`.  For 
`getInterestingIdentifierID()`, you'll have to decide how you want to represent 
that something isn't an interesting identifier. `ObjCKeywordKind` has a special 
enumerator (`not_keyword`) at value 0, so you could do the same thing here, but 
I think it might be better to use `llvm::Optional`.


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[PATCH] D149677: [clang][TypePrinter] Add option to skip over elaborated types

[David Blaikie via Phabricator via cfe-commits]

dblaikie added a comment.

In D149677#4356863 , @aaron.ballman 
wrote:

> In D149677#4350337 , @li.zhe.hua 
> wrote:
>
>> In D149677#4349523 , 
>> @aaron.ballman wrote:
>>
>>> In D149677#4320178 , @li.zhe.hua 
>>> wrote:
>>>
 Some additional context: I'm working on a refactoring tool to, in part, 
 deprecate an alias by replacing it with its definition. That functionality 
 by itself could be provided through something like a clang-tidy, so I say 
 "initially".
>>>
>>> We typically don't add new printing policies in tree without some need for 
>>> them in the project itself (otherwise this becomes a maintenance problem), 
>>> and I'm not certain I see a strong need for this to live in Clang. I think 
>>> it might be best to wait until you're closer to having a clang-tidy check 
>>> that would use this functionality before we continue with this patch. WDYT?
>>
>> I believe there is value for having this option, as without it, the 
>> `PrintingCallbacks::isScopeVisible` callback is effectively useless in 
>> practice. It won't be triggered in non-canonical types because the 
>> `ElaboratedType` represents a fixed qualification on the name.
>>
>> Note: there may be an argument for folding this functionality directly into 
>> `FullyQualifiedName` (which currently affects template-ids despite the 
>> comment on it suggesting it only is for function names). If the template 
>> name was elaborated, `FullyQualifiedName` does nothing, which seems 
>> inconsistent/incorrect.
>
> Adding @dblaikie as he might have some opinions here.

Not sure I'm quite understanding everything going on here, but I think it's a 
reasonable request that the change be observable in some way in addition 
to/other than a unit test. If not, yeah, maybe wait until it can be/the work 
where it is used is at least up on phab.


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[PATCH] D150965: [HIP] Allow std::malloc in device function

[Yaxun Liu via Phabricator via cfe-commits]

yaxunl added inline comments.



Comment at: clang/test/Headers/Inputs/include/math.h:108-109
 long lroundf(float __a);
-int max(int __a, int __b);
-int min(int __a, int __b);
 double modf(double __a, double *__b);

tra wrote:
> Why were these functions removed? It does not seem related to the changes in 
> the patch?
These functions caused failure in the added lit test.

For C++, max/min are defined as templates in . There is no max/min 
in either standard C or C++ math.h. Their existence cause false alarms in lit 
tests. Removing them to be consistent with standard C/C++ headers.


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[clang] 6963c61 - [NVPTX/CUDA] added an optional src_size argument to __nvvm_cp_async*

[Artem Belevich via cfe-commits]

Author: Artem Belevich
Date: 2023-05-19T10:59:36-07:00
New Revision: 6963c61f0f6e4be2039cb45e824ea1e83a8f1526

URL: 
https://github.com/llvm/llvm-project/commit/6963c61f0f6e4be2039cb45e824ea1e83a8f1526
DIFF: 
https://github.com/llvm/llvm-project/commit/6963c61f0f6e4be2039cb45e824ea1e83a8f1526.diff

LOG: [NVPTX/CUDA] added an optional src_size argument to __nvvm_cp_async*

The optional argument is needed for CUDA-11+ headers when we're compiling for
sm_80+ GPUs.

Differential Revision: https://reviews.llvm.org/D150820

Added: 


Modified: 
clang/include/clang/Basic/BuiltinsNVPTX.def
clang/include/clang/Sema/Sema.h
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Sema/SemaChecking.cpp
clang/test/CodeGen/builtins-nvptx.c
clang/test/SemaCUDA/builtins.cu
llvm/include/llvm/IR/IntrinsicsNVVM.td
llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
llvm/test/CodeGen/NVPTX/async-copy.ll

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsNVPTX.def 
b/clang/include/clang/Basic/BuiltinsNVPTX.def
index 96531def77a78..9179fa47eb690 100644
--- a/clang/include/clang/Basic/BuiltinsNVPTX.def
+++ b/clang/include/clang/Basic/BuiltinsNVPTX.def
@@ -968,10 +968,10 @@ TARGET_BUILTIN(__nvvm_cp_async_mbarrier_arrive_shared, 
"vWi*3", "", AND(SM_80,PT
 TARGET_BUILTIN(__nvvm_cp_async_mbarrier_arrive_noinc, "vWi*", "", 
AND(SM_80,PTX70))
 TARGET_BUILTIN(__nvvm_cp_async_mbarrier_arrive_noinc_shared, "vWi*3", "", 
AND(SM_80,PTX70))
 
-TARGET_BUILTIN(__nvvm_cp_async_ca_shared_global_4, "vv*3vC*1", "", 
AND(SM_80,PTX70))
-TARGET_BUILTIN(__nvvm_cp_async_ca_shared_global_8, "vv*3vC*1", "", 
AND(SM_80,PTX70))
-TARGET_BUILTIN(__nvvm_cp_async_ca_shared_global_16, "vv*3vC*1", "", 
AND(SM_80,PTX70))
-TARGET_BUILTIN(__nvvm_cp_async_cg_shared_global_16, "vv*3vC*1", "", 
AND(SM_80,PTX70))
+TARGET_BUILTIN(__nvvm_cp_async_ca_shared_global_4, "vv*3vC*1.", "", 
AND(SM_80,PTX70))
+TARGET_BUILTIN(__nvvm_cp_async_ca_shared_global_8, "vv*3vC*1.", "", 
AND(SM_80,PTX70))
+TARGET_BUILTIN(__nvvm_cp_async_ca_shared_global_16, "vv*3vC*1.", "", 
AND(SM_80,PTX70))
+TARGET_BUILTIN(__nvvm_cp_async_cg_shared_global_16, "vv*3vC*1.", "", 
AND(SM_80,PTX70))
 
 TARGET_BUILTIN(__nvvm_cp_async_commit_group, "v", "", AND(SM_80,PTX70))
 TARGET_BUILTIN(__nvvm_cp_async_wait_group, "vIi", "", AND(SM_80,PTX70))

diff  --git a/clang/include/clang/Sema/Sema.h b/clang/include/clang/Sema/Sema.h
index 6e2734da2bea6..bc6fb74df4d62 100644
--- a/clang/include/clang/Sema/Sema.h
+++ b/clang/include/clang/Sema/Sema.h
@@ -13564,6 +13564,8 @@ class Sema final {
   bool CheckWebAssemblyBuiltinFunctionCall(const TargetInfo ,
unsigned BuiltinID,
CallExpr *TheCall);
+  bool CheckNVPTXBuiltinFunctionCall(const TargetInfo , unsigned BuiltinID,
+ CallExpr *TheCall);
 
   bool SemaBuiltinVAStart(unsigned BuiltinID, CallExpr *TheCall);
   bool SemaBuiltinVAStartARMMicrosoft(CallExpr *Call);

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 02345651f0abb..b4dae69702608 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -18177,6 +18177,19 @@ static Value *MakeScopedAtomic(unsigned IntrinsicID, 
CodeGenFunction ,
   {Ptr, CGF.EmitScalarExpr(E->getArg(1))});
 }
 
+static Value *MakeCpAsync(unsigned IntrinsicID, unsigned IntrinsicIDS,
+  CodeGenFunction , const CallExpr *E,
+  int SrcSize) {
+  return E->getNumArgs() == 3
+ ? CGF.Builder.CreateCall(CGF.CGM.getIntrinsic(IntrinsicIDS),
+  {CGF.EmitScalarExpr(E->getArg(0)),
+   CGF.EmitScalarExpr(E->getArg(1)),
+   CGF.EmitScalarExpr(E->getArg(2))})
+ : CGF.Builder.CreateCall(CGF.CGM.getIntrinsic(IntrinsicID),
+  {CGF.EmitScalarExpr(E->getArg(0)),
+   CGF.EmitScalarExpr(E->getArg(1))});
+}
+
 static Value *MakeHalfType(unsigned IntrinsicID, unsigned BuiltinID,
const CallExpr *E, CodeGenFunction ) {
   auto  = CGF.CGM.getContext();
@@ -18840,6 +18853,22 @@ Value *CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned 
BuiltinID,
   case NVPTX::BI__nvvm_ldu_h2: {
 return MakeHalfType(Intrinsic::nvvm_ldu_global_f, BuiltinID, E, *this);
   }
+  case NVPTX::BI__nvvm_cp_async_ca_shared_global_4:
+return MakeCpAsync(Intrinsic::nvvm_cp_async_ca_shared_global_4,
+   Intrinsic::nvvm_cp_async_ca_shared_global_4_s, *this, E,
+   4);
+  case NVPTX::BI__nvvm_cp_async_ca_shared_global_8:
+return MakeCpAsync(Intrinsic::nvvm_cp_async_ca_shared_global_8,
+   Intrinsic::nvvm_cp_async_ca_shared_global_8_s, *this, E,
+

[PATCH] D150820: [NVPTX, CUDA] added optional src_size argument to __nvvm_cp_async*

[Artem Belevich via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG6963c61f0f6e: [NVPTX/CUDA] added an optional src_size 
argument to __nvvm_cp_async* (authored by tra).

Repository:
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Files:
  clang/include/clang/Basic/BuiltinsNVPTX.def
  clang/include/clang/Sema/Sema.h
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/builtins-nvptx.c
  clang/test/SemaCUDA/builtins.cu
  llvm/include/llvm/IR/IntrinsicsNVVM.td
  llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
  llvm/test/CodeGen/NVPTX/async-copy.ll

Index: llvm/test/CodeGen/NVPTX/async-copy.ll
===
--- llvm/test/CodeGen/NVPTX/async-copy.ll
+++ llvm/test/CodeGen/NVPTX/async-copy.ll
@@ -1,35 +1,35 @@
-; RUN: llc < %s -march=nvptx -mcpu=sm_80 -mattr=+ptx70 | FileCheck -check-prefixes=ALL,CHECK_PTX32 %s
-; RUN: llc < %s -march=nvptx64 -mcpu=sm_80 -mattr=+ptx70 | FileCheck -check-prefixes=ALL,CHECK_PTX64 %s
+; RUN: llc < %s -march=nvptx -mcpu=sm_80 -mattr=+ptx70 | FileCheck -check-prefixes=CHECK,CHECK_PTX32 %s
+; RUN: llc < %s -march=nvptx64 -mcpu=sm_80 -mattr=+ptx70 | FileCheck -check-prefixes=CHECK,CHECK_PTX64 %s
 ; RUN: %if ptxas-11.0 %{ llc < %s -march=nvptx -mcpu=sm_80 -mattr=+ptx70 | %ptxas-verify -arch=sm_80 %}
 ; RUN: %if ptxas-11.0 %{ llc < %s -march=nvptx64 -mcpu=sm_80 -mattr=+ptx70 | %ptxas-verify -arch=sm_80 %}
 
 declare void @llvm.nvvm.cp.async.wait.group(i32)
 
-; ALL-LABEL: asyncwaitgroup
+; CHECK-LABEL: asyncwaitgroup
 define void @asyncwaitgroup() {
-  ; ALL: cp.async.wait_group 8;
+  ; CHECK: cp.async.wait_group 8;
   tail call void @llvm.nvvm.cp.async.wait.group(i32 8)
-  ; ALL: cp.async.wait_group 0;
+  ; CHECK: cp.async.wait_group 0;
   tail call void @llvm.nvvm.cp.async.wait.group(i32 0)
-  ; ALL: cp.async.wait_group 16;
+  ; CHECK: cp.async.wait_group 16;
   tail call void @llvm.nvvm.cp.async.wait.group(i32 16)
   ret void
 }
 
 declare void @llvm.nvvm.cp.async.wait.all()
 
-; ALL-LABEL: asyncwaitall
+; CHECK-LABEL: asyncwaitall
 define void @asyncwaitall() {
-; ALL: cp.async.wait_all
+; CHECK: cp.async.wait_all
   tail call void @llvm.nvvm.cp.async.wait.all()
   ret void
 }
 
 declare void @llvm.nvvm.cp.async.commit.group()
 
-; ALL-LABEL: asynccommitgroup
+; CHECK-LABEL: asynccommitgroup
 define void @asynccommitgroup() {
-; ALL: cp.async.commit_group
+; CHECK: cp.async.commit_group
   tail call void @llvm.nvvm.cp.async.commit.group()
   ret void
 }
@@ -41,72 +41,87 @@
 
 ; CHECK-LABEL: asyncmbarrier
 define void @asyncmbarrier(ptr %a) {
-; CHECK_PTX32: cp.async.mbarrier.arrive.b64 [%r{{[0-9]+}}];
-; CHECK_PTX64: cp.async.mbarrier.arrive.b64 [%rd{{[0-9]+}}];
+; The distinction between PTX32/PTX64 here is only to capture pointer register type
+; in R to be used in subsequent tests.
+; CHECK_PTX32: cp.async.mbarrier.arrive.b64 [%[[R:r]]{{[0-9]+}}];
+; CHECK_PTX64: cp.async.mbarrier.arrive.b64 [%[[R:rd]]{{[0-9]+}}];
   tail call void @llvm.nvvm.cp.async.mbarrier.arrive(ptr %a)
   ret void
 }
 
 ; CHECK-LABEL: asyncmbarriershared
 define void @asyncmbarriershared(ptr addrspace(3) %a) {
-; CHECK_PTX32: cp.async.mbarrier.arrive.shared.b64 [%r{{[0-9]+}}];
-; CHECK_PTX64: cp.async.mbarrier.arrive.shared.b64 [%rd{{[0-9]+}}];
+; CHECK: cp.async.mbarrier.arrive.shared.b64 [%[[R]]{{[0-9]+}}];
   tail call void @llvm.nvvm.cp.async.mbarrier.arrive.shared(ptr addrspace(3) %a)
   ret void
 }
 
 ; CHECK-LABEL: asyncmbarriernoinc
 define void @asyncmbarriernoinc(ptr %a) {
-; CHECK_PTX32: cp.async.mbarrier.arrive.noinc.b64 [%r{{[0-9]+}}];
-; CHECK_PTX64: cp.async.mbarrier.arrive.noinc.b64 [%rd{{[0-9]+}}];
+; CHECK_PTX64: cp.async.mbarrier.arrive.noinc.b64 [%[[R]]{{[0-9]+}}];
   tail call void @llvm.nvvm.cp.async.mbarrier.arrive.noinc(ptr %a)
   ret void
 }
 
 ; CHECK-LABEL: asyncmbarriernoincshared
 define void @asyncmbarriernoincshared(ptr addrspace(3) %a) {
-; CHECK_PTX32: cp.async.mbarrier.arrive.noinc.shared.b64 [%r{{[0-9]+}}];
-; CHECK_PTX64: cp.async.mbarrier.arrive.noinc.shared.b64 [%rd{{[0-9]+}}];
+; CHECK: cp.async.mbarrier.arrive.noinc.shared.b64 [%[[R]]{{[0-9]+}}];
   tail call void @llvm.nvvm.cp.async.mbarrier.arrive.noinc.shared(ptr addrspace(3) %a)
   ret void
 }
 
 declare void @llvm.nvvm.cp.async.ca.shared.global.4(ptr addrspace(3) %a, ptr addrspace(1) %b)
+declare void @llvm.nvvm.cp.async.ca.shared.global.4.s(ptr addrspace(3) %a, ptr addrspace(1) %b, i32 %c)
 
 ; CHECK-LABEL: asynccasharedglobal4i8
-define void @asynccasharedglobal4i8(ptr addrspace(3) %a, ptr addrspace(1) %b) {
-; CHECK_PTX32: cp.async.ca.shared.global [%r{{[0-9]+}}], [%r{{[0-9]+}}], 4;
-; CHECK_PTX64: cp.async.ca.shared.global [%rd{{[0-9]+}}], [%rd{{[0-9]+}}], 4;
+define void @asynccasharedglobal4i8(ptr addrspace(3) %a, ptr addrspace(1) %b, i32 %c) {
+; CHECK: 

[PATCH] D147917: [11/11][POC][Clang][RISCV] Define vset for tuple type

[Yueh-Ting (eop) Chen via Phabricator via cfe-commits]

eopXD updated this revision to Diff 523862.
eopXD added a comment.

Rebase.


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Files:
  clang/include/clang/Basic/riscv_vector.td
  clang/lib/Sema/SemaChecking.cpp
  
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset_tuple.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c


Index: 
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c
===
--- 
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c
+++ 
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c
@@ -339,3 +339,8 @@
   // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}}
   return __riscv_vset_v_f16m4_f16m8(dest, 2, val);
 }
+
+vint32m1x2_t test_vset_v_i32m1x2_i32m1(vint32m1x2_t dest, vint32m1_t val) {
+  // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}}
+  return __riscv_vset_v_i32m1x2_i32m1(dest, 2, val);
+}
Index: 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset_tuple.c
===
--- /dev/null
+++ 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset_tuple.c
@@ -0,0 +1,20 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 2
+// REQUIRES: riscv-registered-target
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
+// RUN:   -target-feature +experimental-zvfh -disable-O0-optnone  \
+// RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
+// RUN:   FileCheck --check-prefix=CHECK-RV64 %s
+
+#include 
+
+// CHECK-RV64-LABEL: define dso_local { ,  
} @test_vset_v_i32m1x2_i32m1
+// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]],  [[DEST_COERCE1:%.*]],  [[VAL:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-RV64-NEXT:  entry:
+// CHECK-RV64-NEXT:[[TMP0:%.*]] = insertvalue { , 
 } poison,  [[DEST_COERCE0]], 0
+// CHECK-RV64-NEXT:[[TMP1:%.*]] = insertvalue { , 
 } [[TMP0]],  [[DEST_COERCE1]], 1
+// CHECK-RV64-NEXT:[[TMP2:%.*]] = insertvalue { , 
 } [[TMP1]],  [[VAL]], 0
+// CHECK-RV64-NEXT:ret { ,  } [[TMP2]]
+//
+vint32m1x2_t test_vset_v_i32m1x2_i32m1(vint32m1x2_t dest, vint32m1_t val) {
+  return __riscv_vset_v_i32m1x2_i32m1(dest, 0, val);
+}
Index: clang/lib/Sema/SemaChecking.cpp
===
--- clang/lib/Sema/SemaChecking.cpp
+++ clang/lib/Sema/SemaChecking.cpp
@@ -4534,9 +4534,12 @@
 ASTContext::BuiltinVectorTypeInfo VecInfo =
 Context.getBuiltinVectorTypeInfo(cast(
 TheCall->getArg(2)->getType().getCanonicalType().getTypePtr()));
-unsigned MaxIndex =
-(ResVecInfo.EC.getKnownMinValue() * ResVecInfo.NumVectors) /
-(VecInfo.EC.getKnownMinValue() * VecInfo.NumVectors);
+unsigned MaxIndex;
+if (ResVecInfo.NumVectors != 1) // vset for tuple type
+  MaxIndex = ResVecInfo.NumVectors;
+else // vset fo non-tuple type
+  MaxIndex = (ResVecInfo.EC.getKnownMinValue() * ResVecInfo.NumVectors) /
+ (VecInfo.EC.getKnownMinValue() * VecInfo.NumVectors);
 return SemaBuiltinConstantArgRange(TheCall, 1, 0, MaxIndex - 1);
   }
   case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u8mf8:
Index: clang/include/clang/Basic/riscv_vector.td
===
--- clang/include/clang/Basic/riscv_vector.td
+++ clang/include/clang/Basic/riscv_vector.td
@@ -2569,6 +2569,10 @@
   let Name = "vset_v", Log2LMUL = [0, 1, 2], MaskedPolicyScheme = NonePolicy,
   ManualCodegen = [{
   {
+if (isa(ResultType)) // For tuple type
+  // Insert value (operand 2) into index (operand 1) of vtuple 
(operand 0)
+  return Builder.CreateInsertValue(Ops[0], Ops[2],
+   
{cast(Ops[1])->getZExtValue()});
 auto *ResVecTy = cast(ResultType);
 auto *VecTy = cast(Ops[2]->getType());
 // Mask to only valid indices.
@@ -2586,5 +2590,11 @@
   def : RVVBuiltin<"v" # dst_lmul # "v", dst_lmul # "v" # dst_lmul # 
"vKzv", "csilxfd">;
   def : RVVBuiltin<"Uv" # dst_lmul # "Uv", dst_lmul # "Uv" # dst_lmul 
#"UvKzUv", "csil">;
 }
+foreach nf = [2] in {
+  let Log2LMUL = [0] in {
+defvar T = "(Tuple:" # nf # ")";
+def : RVVBuiltin;
+  }
+}
   }
 }


Index: clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c
===
--- clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c
+++ clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c
@@ -339,3 +339,8 @@
   // expected-error@+1 {{argument 

[PATCH] D147916: [10/11][POC][Clang][RISCV] Define vget for tuple type

[Yueh-Ting (eop) Chen via Phabricator via cfe-commits]

eopXD updated this revision to Diff 523861.
eopXD added a comment.

Rebase.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147916/new/

https://reviews.llvm.org/D147916

Files:
  clang/include/clang/Basic/riscv_vector.td
  clang/lib/Sema/SemaChecking.cpp
  clang/lib/Support/RISCVVIntrinsicUtils.cpp
  
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vget_tuple.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vget-index-out-of-range.c


Index: 
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vget-index-out-of-range.c
===
--- 
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vget-index-out-of-range.c
+++ 
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vget-index-out-of-range.c
@@ -339,3 +339,8 @@
   // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}}
   return __riscv_vget_v_f16m8_f16m4(src, 2);
 }
+
+vint32m1_t test_vget_v_i32m1x2_i32m1(vint32m1x2_t src) {
+  // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}}
+  return __riscv_vget_v_i32m1x2_i32m1(src, 2);
+}
Index: 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vget_tuple.c
===
--- /dev/null
+++ 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vget_tuple.c
@@ -0,0 +1,20 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 2
+// REQUIRES: riscv-registered-target
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
+// RUN:   -target-feature +experimental-zvfh -disable-O0-optnone  \
+// RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
+// RUN:   FileCheck --check-prefix=CHECK-RV64 %s
+
+#include 
+
+// CHECK-RV64-LABEL: define dso_local  
@test_vget_v_i32m1x2_i32m1
+// CHECK-RV64-SAME: ( [[SRC_COERCE0:%.*]],  [[SRC_COERCE1:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-RV64-NEXT:  entry:
+// CHECK-RV64-NEXT:[[TMP0:%.*]] = insertvalue { , 
 } poison,  [[SRC_COERCE0]], 0
+// CHECK-RV64-NEXT:[[TMP1:%.*]] = insertvalue { , 
 } [[TMP0]],  [[SRC_COERCE1]], 1
+// CHECK-RV64-NEXT:[[TMP2:%.*]] = extractvalue { , 
 } [[TMP1]], 0
+// CHECK-RV64-NEXT:ret  [[TMP2]]
+//
+vint32m1_t test_vget_v_i32m1x2_i32m1(vint32m1x2_t src) {
+  return __riscv_vget_v_i32m1x2_i32m1(src, 0);
+}
Index: clang/lib/Support/RISCVVIntrinsicUtils.cpp
===
--- clang/lib/Support/RISCVVIntrinsicUtils.cpp
+++ clang/lib/Support/RISCVVIntrinsicUtils.cpp
@@ -332,6 +332,8 @@
   }
   if (isVector())
 ShortStr += LMUL.str();
+  if (isTuple())
+ShortStr += "x" + utostr(NF);
 }
 
 void RVVType::applyBasicType() {
Index: clang/lib/Sema/SemaChecking.cpp
===
--- clang/lib/Sema/SemaChecking.cpp
+++ clang/lib/Sema/SemaChecking.cpp
@@ -4519,9 +4519,12 @@
 ASTContext::BuiltinVectorTypeInfo VecInfo =
 Context.getBuiltinVectorTypeInfo(cast(
 TheCall->getArg(0)->getType().getCanonicalType().getTypePtr()));
-unsigned MaxIndex =
-(VecInfo.EC.getKnownMinValue() * VecInfo.NumVectors) /
-(ResVecInfo.EC.getKnownMinValue() * ResVecInfo.NumVectors);
+unsigned MaxIndex;
+if (VecInfo.NumVectors != 1) // vget for tuple type
+  MaxIndex = VecInfo.NumVectors;
+else // vget for non-tuple type
+  MaxIndex = (VecInfo.EC.getKnownMinValue() * VecInfo.NumVectors) /
+ (ResVecInfo.EC.getKnownMinValue() * ResVecInfo.NumVectors);
 return SemaBuiltinConstantArgRange(TheCall, 1, 0, MaxIndex - 1);
   }
   case RISCVVector::BI__builtin_rvv_vset_v: {
Index: clang/include/clang/Basic/riscv_vector.td
===
--- clang/include/clang/Basic/riscv_vector.td
+++ clang/include/clang/Basic/riscv_vector.td
@@ -2536,6 +2536,11 @@
   let Name = "vget_v", MaskedPolicyScheme = NonePolicy,
   ManualCodegen = [{
   {
+if (isa(Ops[0]->getType())) // For tuple type
+  // Extract value from index (operand 1) of vtuple (operand 0)
+  return Builder.CreateExtractValue(
+Ops[0],
+{cast(Ops[1])->getZExtValue()});
 auto *VecTy = cast(ResultType);
 auto *OpVecTy = cast(Ops[0]->getType());
 // Mask to only valid indices.
@@ -2553,6 +2558,12 @@
   def : RVVBuiltin<"v" # dst_lmul # "v", dst_lmul # "vvKz", "csilxfd", 
dst_lmul # "v">;
   def : RVVBuiltin<"Uv" # dst_lmul # "Uv", dst_lmul # "UvUvKz", "csil", 
dst_lmul # "Uv">;
 }
+foreach nf = [2] in {
+  let Log2LMUL = [0] in {
+defvar T = "(Tuple:" # nf # ")";
+def : RVVBuiltin;
+  }
+}
   }
 
   let Name = "vset_v", Log2LMUL = [0, 1, 2], MaskedPolicyScheme = NonePolicy,


Index: 

[PATCH] D146358: [clang][AST] Print name instead of type when diagnosing uninitialized subobject in constexpr variables

[Takuya Shimizu via Phabricator via cfe-commits]

hazohelet added a comment.

In D146358#4352792 , @erichkeane 
wrote:

> In D146358#4351787 , @hazohelet 
> wrote:
>
>> In D146358#4350810 , @erichkeane 
>> wrote:
>>
>>> Our downstream discovered that this causes a regression when compiling 
>>> `utility` with `ast-dump`.  I've put up a minimal reproducer: 
>>> https://godbolt.org/z/oaezas7Ws
>>>
>>> @hazohelet : Will you be able to look into this soon?
>>
>> Thanks for the report and the reproducer.
>> I cannot take sufficient time for about 36 hours, but I'll be able to 
>> investigate it after that.
>
> That is long enough away that I unfortunately have to revert (see 
> 34e49d3e85a6dd03856af0fb4b7f8d8ae1f4f06a 
> ). 
> Please note that in the LLVM project reverts are common/frequent (we have a 
> policy of 'revert often'), and should not be taken negatively!  Please feel 
> free to re-submit this patch with a fix/the test provided, and we'll 
> re-review promptly!

Thanks for the revert!

It seems that the problem is around the list initializer in template variable 
definition.
Minimum reproducible example:
`template  constexpr T foo{};`

When the `TextNodeDumper` enabled through `-ast-dump` visits a constexpr 
`VarDecl` with initializer, it evaluates the `VarDecl` and prints the value if 
evaluation comes successful.
(https://github.com/llvm/llvm-project/blob/55903151a2a505284ce3fcd955b1d394df0b55ea/clang/lib/AST/TextNodeDumper.cpp#L1825)
The `VarDecl::evaluateValue()` does not show the notes generated during its 
failed evaluation. The uninitialized-subobject note is actually generated 
BEFORE this patch when compiling the reproducers with `-ast-dump` flag on, but 
is not shown to the user.
The message should not be generated here and I assume this is an internal bug 
that we have to fix before resubmitting this patch.


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[PATCH] D148505: Allow `__attribute__((warn_unused))` on individual constructors

[Aaron Ballman via Phabricator via cfe-commits]

aaron.ballman added a comment.

In D148505#4356951 , @erichkeane 
wrote:

> I'm still on the fence.  I think properly documenting all of this entire 
> attribute would make me more comfortable here, particularly since it will 
> allow GCC to follow us easily some day.  I think that would move the needle 
> for me.

I think I've got a slightly different idea there: let's add a new documentation 
section for all of the related attributes in this area and document (or update) 
all of them in a block. This way, users have a good way to answer "which one do 
I use in what circumstance?" as well as other compiler devs who want to match 
our behavior. I think if we can make the documentation sufficiently clear, then 
this is fine.


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[PATCH] D150752: [BOLT][CMake] Use correct output paths and passthrough necessary options

[Petr Hosek via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG9e6e3375f12e: [BOLT][CMake] Use correct output paths and 
passthrough necessary options (authored by phosek).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D150752/new/

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Files:
  bolt/CMakeLists.txt
  bolt/runtime/CMakeLists.txt
  clang/cmake/caches/Fuchsia-stage2.cmake


Index: clang/cmake/caches/Fuchsia-stage2.cmake
===
--- clang/cmake/caches/Fuchsia-stage2.cmake
+++ clang/cmake/caches/Fuchsia-stage2.cmake
@@ -294,7 +294,6 @@
 set(LLVM_TOOLCHAIN_TOOLS
   dsymutil
   llvm-ar
-  llvm-bolt
   llvm-cov
   llvm-cxxfilt
   llvm-debuginfod-find
@@ -329,6 +328,7 @@
   CACHE STRING "")
 
 set(LLVM_Toolchain_DISTRIBUTION_COMPONENTS
+  bolt
   clang
   lld
   clang-apply-replacements
Index: bolt/runtime/CMakeLists.txt
===
--- bolt/runtime/CMakeLists.txt
+++ bolt/runtime/CMakeLists.txt
@@ -15,12 +15,12 @@
   instr.cpp
   ${CMAKE_CURRENT_BINARY_DIR}/config.h
   )
-set_target_properties(bolt_rt_instr PROPERTIES LIBRARY_OUTPUT_DIRECTORY 
"lib${LLVM_LIBDIR_SUFFIX}")
+set_target_properties(bolt_rt_instr PROPERTIES ARCHIVE_OUTPUT_DIRECTORY 
"${LLVM_LIBRARY_DIR}")
 add_library(bolt_rt_hugify STATIC
   hugify.cpp
   ${CMAKE_CURRENT_BINARY_DIR}/config.h
   )
-set_target_properties(bolt_rt_hugify PROPERTIES LIBRARY_OUTPUT_DIRECTORY 
"lib${LLVM_LIBDIR_SUFFIX}")
+set_target_properties(bolt_rt_hugify PROPERTIES ARCHIVE_OUTPUT_DIRECTORY 
"${LLVM_LIBRARY_DIR}")
 
 set(BOLT_RT_FLAGS
   -ffreestanding
@@ -44,7 +44,7 @@
 instr.cpp
 ${CMAKE_CURRENT_BINARY_DIR}/config.h
   )
-  set_target_properties(bolt_rt_instr_osx PROPERTIES LIBRARY_OUTPUT_DIRECTORY 
"lib${LLVM_LIBDIR_SUFFIX}")
+  set_target_properties(bolt_rt_instr_osx PROPERTIES ARCHIVE_OUTPUT_DIRECTORY 
"${LLVM_LIBRARY_DIR}")
   target_include_directories(bolt_rt_instr_osx PRIVATE 
${CMAKE_CURRENT_BINARY_DIR})
   target_compile_options(bolt_rt_instr_osx PRIVATE
 -target x86_64-apple-darwin19.6.0
Index: bolt/CMakeLists.txt
===
--- bolt/CMakeLists.txt
+++ bolt/CMakeLists.txt
@@ -84,6 +84,10 @@
 
 if (BOLT_ENABLE_RUNTIME)
   message(STATUS "Building BOLT runtime libraries for X86")
+  set(extra_args "")
+  if(CMAKE_SYSROOT)
+list(APPEND extra_args -DCMAKE_SYSROOT=${CMAKE_SYSROOT})
+  endif()
   ExternalProject_Add(bolt_rt
 SOURCE_DIR "${CMAKE_CURRENT_SOURCE_DIR}/runtime"
 STAMP_DIR ${CMAKE_CURRENT_BINARY_DIR}/bolt_rt-stamps
@@ -92,8 +96,10 @@
-DCMAKE_CXX_COMPILER=${CMAKE_CXX_COMPILER}
-DCMAKE_BUILD_TYPE=Release
-DCMAKE_MAKE_PROGRAM=${CMAKE_MAKE_PROGRAM}
-   -DCMAKE_INSTALL_PREFIX=${LLVM_BINARY_DIR}
-DLLVM_LIBDIR_SUFFIX=${LLVM_LIBDIR_SUFFIX}
+   -DLLVM_LIBRARY_DIR=${LLVM_LIBRARY_DIR}
+   ${extra_args}
+INSTALL_COMMAND ""
 BUILD_ALWAYS True
 )
   install(CODE "execute_process\(COMMAND \${CMAKE_COMMAND} 
-DCMAKE_INSTALL_PREFIX=\${CMAKE_INSTALL_PREFIX} -P 
${CMAKE_CURRENT_BINARY_DIR}/bolt_rt-bins/cmake_install.cmake \)"


Index: clang/cmake/caches/Fuchsia-stage2.cmake
===
--- clang/cmake/caches/Fuchsia-stage2.cmake
+++ clang/cmake/caches/Fuchsia-stage2.cmake
@@ -294,7 +294,6 @@
 set(LLVM_TOOLCHAIN_TOOLS
   dsymutil
   llvm-ar
-  llvm-bolt
   llvm-cov
   llvm-cxxfilt
   llvm-debuginfod-find
@@ -329,6 +328,7 @@
   CACHE STRING "")
 
 set(LLVM_Toolchain_DISTRIBUTION_COMPONENTS
+  bolt
   clang
   lld
   clang-apply-replacements
Index: bolt/runtime/CMakeLists.txt
===
--- bolt/runtime/CMakeLists.txt
+++ bolt/runtime/CMakeLists.txt
@@ -15,12 +15,12 @@
   instr.cpp
   ${CMAKE_CURRENT_BINARY_DIR}/config.h
   )
-set_target_properties(bolt_rt_instr PROPERTIES LIBRARY_OUTPUT_DIRECTORY "lib${LLVM_LIBDIR_SUFFIX}")
+set_target_properties(bolt_rt_instr PROPERTIES ARCHIVE_OUTPUT_DIRECTORY "${LLVM_LIBRARY_DIR}")
 add_library(bolt_rt_hugify STATIC
   hugify.cpp
   ${CMAKE_CURRENT_BINARY_DIR}/config.h
   )
-set_target_properties(bolt_rt_hugify PROPERTIES LIBRARY_OUTPUT_DIRECTORY "lib${LLVM_LIBDIR_SUFFIX}")
+set_target_properties(bolt_rt_hugify PROPERTIES ARCHIVE_OUTPUT_DIRECTORY "${LLVM_LIBRARY_DIR}")
 
 set(BOLT_RT_FLAGS
   -ffreestanding
@@ -44,7 +44,7 @@
 instr.cpp
 ${CMAKE_CURRENT_BINARY_DIR}/config.h
   )
-  set_target_properties(bolt_rt_instr_osx PROPERTIES LIBRARY_OUTPUT_DIRECTORY "lib${LLVM_LIBDIR_SUFFIX}")
+  set_target_properties(bolt_rt_instr_osx PROPERTIES ARCHIVE_OUTPUT_DIRECTORY "${LLVM_LIBRARY_DIR}")
   target_include_directories(bolt_rt_instr_osx PRIVATE ${CMAKE_CURRENT_BINARY_DIR})
   

[clang] 9e6e337 - [BOLT][CMake] Use correct output paths and passthrough necessary options

[Petr Hosek via cfe-commits]

Author: Petr Hosek
Date: 2023-05-19T17:43:27Z
New Revision: 9e6e3375f12e5e61dd2e371d94c263e3862f58a1

URL: 
https://github.com/llvm/llvm-project/commit/9e6e3375f12e5e61dd2e371d94c263e3862f58a1
DIFF: 
https://github.com/llvm/llvm-project/commit/9e6e3375f12e5e61dd2e371d94c263e3862f58a1.diff

LOG: [BOLT][CMake] Use correct output paths and passthrough necessary options

This addresses https://github.com/llvm/llvm-project/issues/62748.

Differential Revision: https://reviews.llvm.org/D150752

Added: 


Modified: 
bolt/CMakeLists.txt
bolt/runtime/CMakeLists.txt
clang/cmake/caches/Fuchsia-stage2.cmake

Removed: 




diff  --git a/bolt/CMakeLists.txt b/bolt/CMakeLists.txt
index 875a5cd8703c1..a9bc770a95e93 100644
--- a/bolt/CMakeLists.txt
+++ b/bolt/CMakeLists.txt
@@ -84,6 +84,10 @@ endif()
 
 if (BOLT_ENABLE_RUNTIME)
   message(STATUS "Building BOLT runtime libraries for X86")
+  set(extra_args "")
+  if(CMAKE_SYSROOT)
+list(APPEND extra_args -DCMAKE_SYSROOT=${CMAKE_SYSROOT})
+  endif()
   ExternalProject_Add(bolt_rt
 SOURCE_DIR "${CMAKE_CURRENT_SOURCE_DIR}/runtime"
 STAMP_DIR ${CMAKE_CURRENT_BINARY_DIR}/bolt_rt-stamps
@@ -92,8 +96,10 @@ if (BOLT_ENABLE_RUNTIME)
-DCMAKE_CXX_COMPILER=${CMAKE_CXX_COMPILER}
-DCMAKE_BUILD_TYPE=Release
-DCMAKE_MAKE_PROGRAM=${CMAKE_MAKE_PROGRAM}
-   -DCMAKE_INSTALL_PREFIX=${LLVM_BINARY_DIR}
-DLLVM_LIBDIR_SUFFIX=${LLVM_LIBDIR_SUFFIX}
+   -DLLVM_LIBRARY_DIR=${LLVM_LIBRARY_DIR}
+   ${extra_args}
+INSTALL_COMMAND ""
 BUILD_ALWAYS True
 )
   install(CODE "execute_process\(COMMAND \${CMAKE_COMMAND} 
-DCMAKE_INSTALL_PREFIX=\${CMAKE_INSTALL_PREFIX} -P 
${CMAKE_CURRENT_BINARY_DIR}/bolt_rt-bins/cmake_install.cmake \)"

diff  --git a/bolt/runtime/CMakeLists.txt b/bolt/runtime/CMakeLists.txt
index 7d177f7c598b1..6aa8edb8424a3 100644
--- a/bolt/runtime/CMakeLists.txt
+++ b/bolt/runtime/CMakeLists.txt
@@ -15,12 +15,12 @@ add_library(bolt_rt_instr STATIC
   instr.cpp
   ${CMAKE_CURRENT_BINARY_DIR}/config.h
   )
-set_target_properties(bolt_rt_instr PROPERTIES LIBRARY_OUTPUT_DIRECTORY 
"lib${LLVM_LIBDIR_SUFFIX}")
+set_target_properties(bolt_rt_instr PROPERTIES ARCHIVE_OUTPUT_DIRECTORY 
"${LLVM_LIBRARY_DIR}")
 add_library(bolt_rt_hugify STATIC
   hugify.cpp
   ${CMAKE_CURRENT_BINARY_DIR}/config.h
   )
-set_target_properties(bolt_rt_hugify PROPERTIES LIBRARY_OUTPUT_DIRECTORY 
"lib${LLVM_LIBDIR_SUFFIX}")
+set_target_properties(bolt_rt_hugify PROPERTIES ARCHIVE_OUTPUT_DIRECTORY 
"${LLVM_LIBRARY_DIR}")
 
 set(BOLT_RT_FLAGS
   -ffreestanding
@@ -44,7 +44,7 @@ if (CMAKE_CXX_COMPILER_ID MATCHES ".*Clang.*")
 instr.cpp
 ${CMAKE_CURRENT_BINARY_DIR}/config.h
   )
-  set_target_properties(bolt_rt_instr_osx PROPERTIES LIBRARY_OUTPUT_DIRECTORY 
"lib${LLVM_LIBDIR_SUFFIX}")
+  set_target_properties(bolt_rt_instr_osx PROPERTIES ARCHIVE_OUTPUT_DIRECTORY 
"${LLVM_LIBRARY_DIR}")
   target_include_directories(bolt_rt_instr_osx PRIVATE 
${CMAKE_CURRENT_BINARY_DIR})
   target_compile_options(bolt_rt_instr_osx PRIVATE
 -target x86_64-apple-darwin19.6.0

diff  --git a/clang/cmake/caches/Fuchsia-stage2.cmake 
b/clang/cmake/caches/Fuchsia-stage2.cmake
index 7778a7f84b051..8f5aa21be6fb8 100644
--- a/clang/cmake/caches/Fuchsia-stage2.cmake
+++ b/clang/cmake/caches/Fuchsia-stage2.cmake
@@ -294,7 +294,6 @@ set(LLVM_INSTALL_TOOLCHAIN_ONLY ON CACHE BOOL "")
 set(LLVM_TOOLCHAIN_TOOLS
   dsymutil
   llvm-ar
-  llvm-bolt
   llvm-cov
   llvm-cxxfilt
   llvm-debuginfod-find
@@ -329,6 +328,7 @@ set(LLVM_TOOLCHAIN_TOOLS
   CACHE STRING "")
 
 set(LLVM_Toolchain_DISTRIBUTION_COMPONENTS
+  bolt
   clang
   lld
   clang-apply-replacements



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[PATCH] D150752: [BOLT][CMake] Use correct output paths and passthrough necessary options

[Petr Hosek via Phabricator via cfe-commits]

phosek added inline comments.



Comment at: bolt/CMakeLists.txt:88
+  if(CMAKE_SYSROOT)
+list(APPEND extra_args -DCMAKE_SYSROOT=${CMAKE_SYSROOT})
+  endif()

michaelplatings wrote:
> phosek wrote:
> > michaelplatings wrote:
> > > michaelplatings wrote:
> > > > The [[ 
> > > > https://cmake.org/cmake/help/latest/variable/CMAKE_TOOLCHAIN_FILE.html 
> > > > | documentation for CMAKE_SYSROOT  ]] says "This variable may only be 
> > > > set in a toolchain file specified by the CMAKE_TOOLCHAIN_FILE variable."
> > > > 
> > > > Maybe pass CMAKE_TOOLCHAIN_FILE through instead?
> > > `list(APPEND variable_that_may_or_may_not_exist ...` is quite fragile. 
> > > Should someone have `-Dextra_args=X` on their cmake command line then 
> > > that will be included here, which I don't think is the intent. I suggest 
> > > adding `set(extra_args "")` above the `if`. This also improves 
> > > readability because otherwise you have to scan the whole file to figure 
> > > out that `extra_args` wasn't previously defined.
> > That documentation is inaccurate. `CMAKE_SYSROOT` can be set outside of the 
> > toolchain file, and thus needs to be passed through as is frequently done 
> > in LLVM, see for example 
> > https://github.com/llvm/llvm-project/blob/7ca1bcbc6043b7ab4635f04746d1b9480960e384/llvm/cmake/modules/LLVMExternalProjectUtils.cmake#L261
> >  or 
> > https://github.com/llvm/llvm-project/blob/7ca1bcbc6043b7ab4635f04746d1b9480960e384/compiler-rt/cmake/Modules/AddCompilerRT.cmake#L650.
> Deviating from what's documented as permitted could cause a problem with 
> future CMake versions. But evidently this pattern is already established in 
> LLVM, and if it becomes a problem in future then it can be fixed at that time.
I agree, ideally we would use the same helper function everywhere where we need 
to invoke CMake as a subbuild so the passthrough is handled uniformly, but that 
can be done as a future improvement.


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[PATCH] D150817: Use windows baskslash on anonymous tag locations if using MSVCFormatting and it's not absolute path.

[Zequan Wu via Phabricator via cfe-commits]

zequanwu added a comment.

In D150817#4356305 , @TWeaver wrote:

> Hello and good afternoon from the UK,
>
> I believe this patch has caused failures on the following buildbot:
>
> https://lab.llvm.org/buildbot/#/builders/216/builds/21493
>
> are you able to take a look?
>
> thanks,
> Tom W

Thanks for reporting. Hope this fix it: 
https://reviews.llvm.org/rGfe69bb64415ef6fe01ebbb1d1a801e85bd6bd879.


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[clang] fe69bb6 - Fix tests failure on 75993812d5c1f269b781c34987748f2a792a579d

[Zequan Wu via cfe-commits]

Author: Zequan Wu
Date: 2023-05-19T13:34:40-04:00
New Revision: fe69bb64415ef6fe01ebbb1d1a801e85bd6bd879

URL: 
https://github.com/llvm/llvm-project/commit/fe69bb64415ef6fe01ebbb1d1a801e85bd6bd879
DIFF: 
https://github.com/llvm/llvm-project/commit/fe69bb64415ef6fe01ebbb1d1a801e85bd6bd879.diff

LOG: Fix tests failure on 75993812d5c1f269b781c34987748f2a792a579d

It follows the rules:
1. Use native path if it's already absolute
2. Use Windows back-slash if it's windows formatting.
3. Use Posix style otherwise.

Added: 


Modified: 
clang/lib/AST/TypePrinter.cpp

Removed: 




diff  --git a/clang/lib/AST/TypePrinter.cpp b/clang/lib/AST/TypePrinter.cpp
index 42bbbde6bfb7..dedcfde1 100644
--- a/clang/lib/AST/TypePrinter.cpp
+++ b/clang/lib/AST/TypePrinter.cpp
@@ -1392,9 +1392,11 @@ void TypePrinter::printTag(TagDecl *D, raw_ostream ) {
 // clang::DirectoryLookup::LookupFile when the file path is relative
 // path.
 llvm::sys::path::Style Style =
-!llvm::sys::path::is_absolute(WrittenFile) && Policy.MSVCFormatting
-? llvm::sys::path::Style::windows_backslash
-: llvm::sys::path::Style::native;
+llvm::sys::path::is_absolute(WrittenFile)
+? llvm::sys::path::Style::native
+: (Policy.MSVCFormatting
+   ? llvm::sys::path::Style::windows_backslash
+   : llvm::sys::path::Style::posix);
 llvm::sys::path::native(WrittenFile, Style);
 OS << WrittenFile << ':' << PLoc.getLine() << ':' << PLoc.getColumn();
   }



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[PATCH] D148723: [clang] Fix comdat for InlineBuiltin declarations

[Eli Friedman via Phabricator via cfe-commits]

efriedma added a comment.

I spoke a little loosely when I said "C++ code".  I meant "code using C++ 
'inline' semantics", which includes C code on Windows.


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[PATCH] D147915: [9/11][POC][Clang][RISCV] Define tuple type variant of vsoxseg2ei32 vsuxseg2ei32

[Yueh-Ting (eop) Chen via Phabricator via cfe-commits]

eopXD updated this revision to Diff 523853.
eopXD added a comment.

Rebase.


Repository:
  rG LLVM Github Monorepo

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Files:
  clang/include/clang/Basic/riscv_vector.td
  
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei32_tuple.c
  
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei32_tuple.c

Index: clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei32_tuple.c
===
--- /dev/null
+++ clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei32_tuple.c
@@ -0,0 +1,36 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
+// REQUIRES: riscv-registered-target
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
+// RUN:   -target-feature +experimental-zvfh -disable-O0-optnone  \
+// RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
+// RUN:   FileCheck --check-prefix=CHECK-RV64 %s
+
+#include 
+
+// CHECK-RV64-LABEL: define dso_local void @test_vsuxseg2ei32_v_tuple_i32m1
+// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]],  [[BINDEX:%.*]],  [[V_TUPLE_COERCE0:%.*]],  [[V_TUPLE_COERCE1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-RV64-NEXT:  entry:
+// CHECK-RV64-NEXT:[[TMP0:%.*]] = insertvalue { ,  } poison,  [[V_TUPLE_COERCE0]], 0
+// CHECK-RV64-NEXT:[[TMP1:%.*]] = insertvalue { ,  } [[TMP0]],  [[V_TUPLE_COERCE1]], 1
+// CHECK-RV64-NEXT:[[TMP2:%.*]] = extractvalue { ,  } [[TMP1]], 0
+// CHECK-RV64-NEXT:[[TMP3:%.*]] = extractvalue { ,  } [[TMP1]], 1
+// CHECK-RV64-NEXT:call void @llvm.riscv.vsuxseg2.nxv2i32.nxv2i32.i64( [[TMP2]],  [[TMP3]], ptr [[BASE]],  [[BINDEX]], i64 [[VL]])
+// CHECK-RV64-NEXT:ret void
+//
+void test_vsuxseg2ei32_v_tuple_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1x2_t v_tuple, size_t vl) {
+  return __riscv_vsuxseg2ei32_v_tuple_i32m1(base, bindex, v_tuple, vl);
+}
+
+// CHECK-RV64-LABEL: define dso_local void @test_vsuxseg2ei32_v_tuple_i32m1_m
+// CHECK-RV64-SAME: ( [[MASK:%.*]], ptr noundef [[BASE:%.*]],  [[BINDEX:%.*]],  [[V_TUPLE_COERCE0:%.*]],  [[V_TUPLE_COERCE1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-NEXT:  entry:
+// CHECK-RV64-NEXT:[[TMP0:%.*]] = insertvalue { ,  } poison,  [[V_TUPLE_COERCE0]], 0
+// CHECK-RV64-NEXT:[[TMP1:%.*]] = insertvalue { ,  } [[TMP0]],  [[V_TUPLE_COERCE1]], 1
+// CHECK-RV64-NEXT:[[TMP2:%.*]] = extractvalue { ,  } [[TMP1]], 0
+// CHECK-RV64-NEXT:[[TMP3:%.*]] = extractvalue { ,  } [[TMP1]], 1
+// CHECK-RV64-NEXT:call void @llvm.riscv.vsuxseg2.mask.nxv2i32.nxv2i32.i64( [[TMP2]],  [[TMP3]], ptr [[BASE]],  [[BINDEX]],  [[MASK]], i64 [[VL]])
+// CHECK-RV64-NEXT:ret void
+//
+void test_vsuxseg2ei32_v_tuple_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1x2_t v_tuple, size_t vl) {
+  return __riscv_vsuxseg2ei32_v_tuple_i32m1_m(mask, base, bindex, v_tuple, vl);
+}
Index: clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei32_tuple.c
===
--- /dev/null
+++ clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei32_tuple.c
@@ -0,0 +1,36 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
+// REQUIRES: riscv-registered-target
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
+// RUN:   -target-feature +experimental-zvfh -disable-O0-optnone  \
+// RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
+// RUN:   FileCheck --check-prefix=CHECK-RV64 %s
+
+#include 
+
+// CHECK-RV64-LABEL: define dso_local void @test_vsoxseg2ei32_v_tuple_i32m1
+// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]],  [[BINDEX:%.*]],  [[V_TUPLE_COERCE0:%.*]],  [[V_TUPLE_COERCE1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-RV64-NEXT:  entry:
+// CHECK-RV64-NEXT:[[TMP0:%.*]] = insertvalue { ,  } poison,  [[V_TUPLE_COERCE0]], 0
+// CHECK-RV64-NEXT:[[TMP1:%.*]] = insertvalue { ,  } [[TMP0]],  [[V_TUPLE_COERCE1]], 1
+// CHECK-RV64-NEXT:[[TMP2:%.*]] = extractvalue { ,  } [[TMP1]], 0
+// CHECK-RV64-NEXT:[[TMP3:%.*]] = extractvalue { ,  } [[TMP1]], 1
+// CHECK-RV64-NEXT:call void @llvm.riscv.vsoxseg2.nxv2i32.nxv2i32.i64( [[TMP2]],  [[TMP3]], ptr [[BASE]],  [[BINDEX]], i64 [[VL]])
+// CHECK-RV64-NEXT:ret void
+//
+void test_vsoxseg2ei32_v_tuple_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1x2_t v_tuple, size_t vl) {
+  return __riscv_vsoxseg2ei32_v_tuple_i32m1(base, bindex, v_tuple, vl);
+}
+
+// CHECK-RV64-LABEL: define dso_local void @test_vsoxseg2ei32_v_tuple_i32m1_m
+// CHECK-RV64-SAME: ( [[MASK:%.*]], ptr noundef [[BASE:%.*]],  [[BINDEX:%.*]],  

[PATCH] D147914: [8/11][POC][Clang][RISCV] Define tuple type variant of vloxseg2ei32 vluxseg2ei32

[Yueh-Ting (eop) Chen via Phabricator via cfe-commits]

eopXD updated this revision to Diff 523852.
eopXD added a comment.

Rebase.


Repository:
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Files:
  clang/include/clang/Basic/riscv_vector.td
  
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei32_tuple.c
  
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei32_tuple.c

Index: clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei32_tuple.c
===
--- /dev/null
+++ clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei32_tuple.c
@@ -0,0 +1,28 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
+// REQUIRES: riscv-registered-target
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
+// RUN:   -target-feature +experimental-zvfh -disable-O0-optnone  \
+// RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
+// RUN:   FileCheck --check-prefix=CHECK-RV64 %s
+
+#include 
+
+// CHECK-RV64-LABEL: define dso_local { ,  } @test_vluxseg2ei32_v_tuple_i32m1
+// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]],  [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-RV64-NEXT:  entry:
+// CHECK-RV64-NEXT:[[TMP0:%.*]] = call { ,  } @llvm.riscv.vluxseg2.nxv2i32.nxv2i32.i64( poison,  poison, ptr [[BASE]],  [[BINDEX]], i64 [[VL]])
+// CHECK-RV64-NEXT:ret { ,  } [[TMP0]]
+//
+vint32m1x2_t test_vluxseg2ei32_v_tuple_i32m1(const int32_t *base, vuint32m1_t bindex, size_t vl) {
+  return __riscv_vluxseg2ei32_v_tuple_i32m1(base, bindex, vl);
+}
+
+// CHECK-RV64-LABEL: define dso_local { ,  } @test_vluxseg2ei32_v_tuple_i32m1_m
+// CHECK-RV64-SAME: ( [[MASK:%.*]], ptr noundef [[BASE:%.*]],  [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-NEXT:  entry:
+// CHECK-RV64-NEXT:[[TMP0:%.*]] = call { ,  } @llvm.riscv.vluxseg2.mask.nxv2i32.nxv2i32.i64( poison,  poison, ptr [[BASE]],  [[BINDEX]],  [[MASK]], i64 [[VL]], i64 3)
+// CHECK-RV64-NEXT:ret { ,  } [[TMP0]]
+//
+vint32m1x2_t test_vluxseg2ei32_v_tuple_i32m1_m(vbool32_t mask, const int32_t *base, vuint32m1_t bindex, size_t vl) {
+  return __riscv_vluxseg2ei32_v_tuple_i32m1_m(mask, base, bindex, vl);
+}
Index: clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei32_tuple.c
===
--- /dev/null
+++ clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei32_tuple.c
@@ -0,0 +1,28 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
+// REQUIRES: riscv-registered-target
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
+// RUN:   -target-feature +experimental-zvfh -disable-O0-optnone  \
+// RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
+// RUN:   FileCheck --check-prefix=CHECK-RV64 %s
+
+#include 
+
+// CHECK-RV64-LABEL: define dso_local { ,  } @test_vloxseg2ei32_v_tuple_i32m1
+// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]],  [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-RV64-NEXT:  entry:
+// CHECK-RV64-NEXT:[[TMP0:%.*]] = call { ,  } @llvm.riscv.vloxseg2.nxv2i32.nxv2i32.i64( poison,  poison, ptr [[BASE]],  [[BINDEX]], i64 [[VL]])
+// CHECK-RV64-NEXT:ret { ,  } [[TMP0]]
+//
+vint32m1x2_t test_vloxseg2ei32_v_tuple_i32m1(const int32_t *base, vuint32m1_t bindex, size_t vl) {
+  return __riscv_vloxseg2ei32_v_tuple_i32m1(base, bindex, vl);
+}
+
+// CHECK-RV64-LABEL: define dso_local { ,  } @test_vloxseg2ei32_v_tuple_i32m1_m
+// CHECK-RV64-SAME: ( [[MASK:%.*]], ptr noundef [[BASE:%.*]],  [[BINDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-NEXT:  entry:
+// CHECK-RV64-NEXT:[[TMP0:%.*]] = call { ,  } @llvm.riscv.vloxseg2.mask.nxv2i32.nxv2i32.i64( poison,  poison, ptr [[BASE]],  [[BINDEX]],  [[MASK]], i64 [[VL]], i64 3)
+// CHECK-RV64-NEXT:ret { ,  } [[TMP0]]
+//
+vint32m1x2_t test_vloxseg2ei32_v_tuple_i32m1_m(vbool32_t mask, const int32_t *base, vuint32m1_t bindex, size_t vl) {
+  return __riscv_vloxseg2ei32_v_tuple_i32m1_m(mask, base, bindex, vl);
+}
Index: clang/include/clang/Basic/riscv_vector.td
===
--- clang/include/clang/Basic/riscv_vector.td
+++ clang/include/clang/Basic/riscv_vector.td
@@ -1744,6 +1744,57 @@
   }
 }
 
+multiclass RVVIndexedSegLoadTuple {
+  foreach type = ["i"] in {
+foreach eew_info = [["32", "(Log2EEW:5)"]] in {
+  defvar eew = eew_info[0];
+  defvar eew_type = eew_info[1];
+  foreach nf = [2] in {
+let Name = op # nf # "ei" # eew # "_v_tuple",
+OverloadedName = op # nf # "ei" # eew # "_tuple",
+IRName = op # nf,
+

[PATCH] D147913: [7/11][POC][Clang][RISCV] Define tuple type variant of vssseg2e32

[Yueh-Ting (eop) Chen via Phabricator via cfe-commits]

eopXD updated this revision to Diff 523851.
eopXD added a comment.

Rebase.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D147913/new/

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Files:
  clang/include/clang/Basic/riscv_vector.td
  
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e32_tuple.c

Index: clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e32_tuple.c
===
--- /dev/null
+++ clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e32_tuple.c
@@ -0,0 +1,36 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
+// REQUIRES: riscv-registered-target
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
+// RUN:   -target-feature +experimental-zvfh -disable-O0-optnone  \
+// RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
+// RUN:   FileCheck --check-prefix=CHECK-RV64 %s
+
+#include 
+
+// CHECK-RV64-LABEL: define dso_local void @test_vssseg2e32_v_tuple_i32m1
+// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]],  [[V_TUPLE_COERCE0:%.*]],  [[V_TUPLE_COERCE1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-RV64-NEXT:  entry:
+// CHECK-RV64-NEXT:[[TMP0:%.*]] = insertvalue { ,  } poison,  [[V_TUPLE_COERCE0]], 0
+// CHECK-RV64-NEXT:[[TMP1:%.*]] = insertvalue { ,  } [[TMP0]],  [[V_TUPLE_COERCE1]], 1
+// CHECK-RV64-NEXT:[[TMP2:%.*]] = extractvalue { ,  } [[TMP1]], 0
+// CHECK-RV64-NEXT:[[TMP3:%.*]] = extractvalue { ,  } [[TMP1]], 1
+// CHECK-RV64-NEXT:call void @llvm.riscv.vssseg2.nxv2i32.i64( [[TMP2]],  [[TMP3]], ptr [[BASE]], i64 [[BSTRIDE]], i64 [[VL]])
+// CHECK-RV64-NEXT:ret void
+//
+void test_vssseg2e32_v_tuple_i32m1(int32_t *base, ptrdiff_t bstride, vint32m1x2_t v_tuple, size_t vl) {
+  return __riscv_vssseg2e32_v_tuple_i32m1(base, bstride, v_tuple, vl);
+}
+
+// CHECK-RV64-LABEL: define dso_local void @test_vssseg2e32_v_tuple_i32m1_m
+// CHECK-RV64-SAME: ( [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]],  [[V_TUPLE_COERCE0:%.*]],  [[V_TUPLE_COERCE1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-NEXT:  entry:
+// CHECK-RV64-NEXT:[[TMP0:%.*]] = insertvalue { ,  } poison,  [[V_TUPLE_COERCE0]], 0
+// CHECK-RV64-NEXT:[[TMP1:%.*]] = insertvalue { ,  } [[TMP0]],  [[V_TUPLE_COERCE1]], 1
+// CHECK-RV64-NEXT:[[TMP2:%.*]] = extractvalue { ,  } [[TMP1]], 0
+// CHECK-RV64-NEXT:[[TMP3:%.*]] = extractvalue { ,  } [[TMP1]], 1
+// CHECK-RV64-NEXT:call void @llvm.riscv.vssseg2.mask.nxv2i32.i64( [[TMP2]],  [[TMP3]], ptr [[BASE]], i64 [[BSTRIDE]],  [[MASK]], i64 [[VL]])
+// CHECK-RV64-NEXT:ret void
+//
+void test_vssseg2e32_v_tuple_i32m1_m(vbool32_t mask, int32_t *base, ptrdiff_t bstride, vint32m1x2_t v_tuple, size_t vl) {
+  return __riscv_vssseg2e32_v_tuple_i32m1_m(mask, base, bstride, v_tuple, vl);
+}
Index: clang/include/clang/Basic/riscv_vector.td
===
--- clang/include/clang/Basic/riscv_vector.td
+++ clang/include/clang/Basic/riscv_vector.td
@@ -1699,6 +1699,51 @@
   }
 }
 
+multiclass RVVStridedSegStoreTuple {
+  foreach type = ["i"] in {
+defvar eew = !cond(!eq(type, "i") : "32");
+  foreach nf = [2] in {
+let Name = op # nf # "e" # eew # "_v_tuple",
+OverloadedName = op # nf # "e" # eew # "_tuple",
+IRName = op # nf,
+MaskedIRName = op # nf # "_mask",
+NF = nf,
+HasMaskedOffOperand = false,
+MaskedPolicyScheme = NonePolicy,
+ManualCodegen = [{
+{
+  // Masked
+  // Builtin: (mask, ptr, stride, v_tuple, vl)
+  // Intrinsic: (val0, val1, ..., ptr, stride, mask, vl)
+  // Unmasked
+  // Builtin: (ptr, stride, v_tuple, vl)
+  // Intrinsic: (val0, val1, ..., ptr, stride, vl)
+  unsigned Offset = IsMasked ? 1 : 0;
+  llvm::Value *VTupleOperand = Ops[Offset + 2];
+
+  SmallVector Operands;
+  for (unsigned I = 0; I < NF; ++I) {
+llvm::Value *V = Builder.CreateExtractValue(VTupleOperand, {I});
+Operands.push_back(V);
+  }
+  Operands.push_back(Ops[Offset]); // Ptr
+  Operands.push_back(Ops[Offset + 1]); // Stride
+  if (IsMasked)
+Operands.push_back(Ops[0]);
+  Operands.push_back(Ops[Offset + 3]); // VL
+
+  IntrinsicTypes = {Operands[0]->getType(), Operands.back()->getType()};
+  llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
+  return Builder.CreateCall(F, Operands, "");
+}
+}] in {
+  defvar T = "(Tuple:" # nf # ")";
+  def : RVVBuiltin<"v", "0Pet" # T # "v", type>;
+  }
+}
+  }
+}
+
 // TODO: Extend for policy
 let UnMaskedPolicyScheme = NonePolicy,
 MaskedPolicyScheme = NonePolicy,
@@ -1712,6 +1757,7 @@
  

[PATCH] D147912: [6/11][POC][Clang][RISCV] Define tuple type variant of vlsseg2e32

[Yueh-Ting (eop) Chen via Phabricator via cfe-commits]

eopXD updated this revision to Diff 523850.
eopXD added a comment.

Rebase.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147912/new/

https://reviews.llvm.org/D147912

Files:
  clang/include/clang/Basic/riscv_vector.td
  
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e32_tuple.c


Index: 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e32_tuple.c
===
--- /dev/null
+++ 
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e32_tuple.c
@@ -0,0 +1,27 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 2
+// REQUIRES: riscv-registered-target
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
+// RUN:   -target-feature +experimental-zvfh -disable-O0-optnone  \
+// RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
+// RUN:   FileCheck --check-prefix=CHECK-RV64 %s
+#include 
+
+// CHECK-RV64-LABEL: define dso_local { ,  
} @test_vlsseg2e32_v_tuple_i32m1
+// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], 
i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-RV64-NEXT:  entry:
+// CHECK-RV64-NEXT:[[TMP0:%.*]] = call { ,  } @llvm.riscv.vlsseg2.nxv2i32.i64( poison,  poison, ptr [[BASE]], i64 [[BSTRIDE]], i64 [[VL]])
+// CHECK-RV64-NEXT:ret { ,  } [[TMP0]]
+//
+vint32m1x2_t test_vlsseg2e32_v_tuple_i32m1(const int32_t *base, ptrdiff_t 
bstride, size_t vl) {
+  return __riscv_vlsseg2e32_v_tuple_i32m1(base, bstride, vl);
+}
+
+// CHECK-RV64-LABEL: define dso_local { ,  
} @test_vlsseg2e32_v_tuple_i32m1_m
+// CHECK-RV64-SAME: ( [[MASK:%.*]], ptr noundef [[BASE:%.*]], 
i64 noundef [[BSTRIDE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-NEXT:  entry:
+// CHECK-RV64-NEXT:[[TMP0:%.*]] = call { ,  } @llvm.riscv.vlsseg2.mask.nxv2i32.i64( poison,  poison, ptr [[BASE]], i64 [[BSTRIDE]],  [[MASK]], 
i64 [[VL]], i64 3)
+// CHECK-RV64-NEXT:ret { ,  } [[TMP0]]
+//
+vint32m1x2_t test_vlsseg2e32_v_tuple_i32m1_m(vbool32_t mask, const int32_t 
*base, ptrdiff_t bstride, size_t vl) {
+  return __riscv_vlsseg2e32_v_tuple_i32m1_m(mask, base, bstride, vl);
+}
Index: clang/include/clang/Basic/riscv_vector.td
===
--- clang/include/clang/Basic/riscv_vector.td
+++ clang/include/clang/Basic/riscv_vector.td
@@ -1652,12 +1652,60 @@
   }
 }
 
+multiclass RVVStridedSegLoadTuple {
+  foreach type = ["i"] in {
+defvar eew = !cond(!eq(type, "i") : "32");
+  foreach nf = [2] in {
+let Name = op # nf # "e" # eew # "_v_tuple",
+OverloadedName = op # nf # "e" # eew # "_tuple",
+IRName = op # nf,
+MaskedIRName = op # nf # "_mask",
+NF = nf,
+ManualCodegen = [{
+{
+  assert(((IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) 
||
+ (!IsMasked && (PolicyAttrs & RVV_VTA))) &&
+ "FIXME: Only handling default policy (TAMA) for now");
+
+  llvm::Type *ElementVectorType = 
cast(ResultType)->elements()[0];
+
+  IntrinsicTypes = {ElementVectorType, Ops.back()->getType()};
+  SmallVector Operands;
+
+  Operands.append(NF, llvm::PoisonValue::get(ElementVectorType));
+
+  unsigned Offset = IsMasked ? 1 : 0;
+  Operands.push_back(Ops[Offset]); // Ptr
+  Operands.push_back(Ops[Offset + 1]); // Stride
+  if (IsMasked)
+Operands.push_back(Ops[0]);
+  Operands.push_back(Ops[Offset + 2]); // VL
+  if (IsMasked)
+Operands.push_back(ConstantInt::get(Ops.back()->getType(), 
PolicyAttrs));
+
+  llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
+  llvm::Value *LoadValue = Builder.CreateCall(F, Operands, "");
+
+  if (ReturnValue.isNull())
+return LoadValue;
+  else
+return Builder.CreateStore(LoadValue, ReturnValue.getValue());
+}
+}] in {
+  defvar T = "(Tuple:" # nf # ")";
+  def : RVVBuiltin<"v", T # "vPCet", type>;
+  }
+}
+  }
+}
+
 // TODO: Extend for policy
 let UnMaskedPolicyScheme = NonePolicy,
 MaskedPolicyScheme = NonePolicy,
 IsTuple = true in {
 defm : RVVUnitStridedSegLoadTuple<"vlseg">;
 defm : RVVUnitStridedSegLoadFFTuple<"vlseg">;
+defm : RVVStridedSegLoadTuple<"vlsseg">;
 }
 
 let UnMaskedPolicyScheme = NonePolicy,


Index: clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e32_tuple.c
===
--- /dev/null
+++ clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e32_tuple.c
@@ -0,0 +1,27 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
+// REQUIRES: riscv-registered-target
+// RUN: %clang_cc1 -triple 

[PATCH] D147911: [5/11][POC][Clang][RISCV] Define tuple type variant of vlseg2e32ff

[Yueh-Ting (eop) Chen via Phabricator via cfe-commits]

eopXD updated this revision to Diff 523849.
eopXD added a comment.

Rebase.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147911/new/

https://reviews.llvm.org/D147911

Files:
  clang/include/clang/Basic/riscv_vector.td
  
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32ff_tuple.c

Index: clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32ff_tuple.c
===
--- /dev/null
+++ clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32ff_tuple.c
@@ -0,0 +1,39 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
+// REQUIRES: riscv-registered-target
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
+// RUN:   -target-feature +experimental-zvfh -disable-O0-optnone  \
+// RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
+// RUN:   FileCheck --check-prefix=CHECK-RV64 %s
+#include 
+
+// CHECK-RV64-LABEL: define dso_local { ,  } @test_vlseg2e32ff_v_tuple_i32m1
+// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-RV64-NEXT:  entry:
+// CHECK-RV64-NEXT:[[TMP0:%.*]] = call { , , i64 } @llvm.riscv.vlseg2ff.nxv2i32.i64( poison,  poison, ptr [[BASE]], i64 [[VL]])
+// CHECK-RV64-NEXT:[[TMP1:%.*]] = extractvalue { , , i64 } [[TMP0]], 0
+// CHECK-RV64-NEXT:[[TMP2:%.*]] = insertvalue { ,  } poison,  [[TMP1]], 0
+// CHECK-RV64-NEXT:[[TMP3:%.*]] = extractvalue { , , i64 } [[TMP0]], 1
+// CHECK-RV64-NEXT:[[TMP4:%.*]] = insertvalue { ,  } [[TMP2]],  [[TMP3]], 1
+// CHECK-RV64-NEXT:[[TMP5:%.*]] = extractvalue { , , i64 } [[TMP0]], 2
+// CHECK-RV64-NEXT:store i64 [[TMP5]], ptr [[NEW_VL]], align 8
+// CHECK-RV64-NEXT:ret { ,  } [[TMP4]]
+//
+vint32m1x2_t test_vlseg2e32ff_v_tuple_i32m1(const int32_t *base, size_t *new_vl, size_t vl) {
+  return __riscv_vlseg2e32ff_v_tuple_i32m1(base, new_vl, vl);
+}
+
+// CHECK-RV64-LABEL: define dso_local { ,  } @test_vlseg2e32ff_v_tuple_i32m1_m
+// CHECK-RV64-SAME: ( [[MASK:%.*]], ptr noundef [[BASE:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-NEXT:  entry:
+// CHECK-RV64-NEXT:[[TMP0:%.*]] = call { , , i64 } @llvm.riscv.vlseg2ff.mask.nxv2i32.i64( poison,  poison, ptr [[BASE]],  [[MASK]], i64 [[VL]], i64 3)
+// CHECK-RV64-NEXT:[[TMP1:%.*]] = extractvalue { , , i64 } [[TMP0]], 0
+// CHECK-RV64-NEXT:[[TMP2:%.*]] = insertvalue { ,  } poison,  [[TMP1]], 0
+// CHECK-RV64-NEXT:[[TMP3:%.*]] = extractvalue { , , i64 } [[TMP0]], 1
+// CHECK-RV64-NEXT:[[TMP4:%.*]] = insertvalue { ,  } [[TMP2]],  [[TMP3]], 1
+// CHECK-RV64-NEXT:[[TMP5:%.*]] = extractvalue { , , i64 } [[TMP0]], 2
+// CHECK-RV64-NEXT:store i64 [[TMP5]], ptr [[NEW_VL]], align 8
+// CHECK-RV64-NEXT:ret { ,  } [[TMP4]]
+//
+vint32m1x2_t test_vlseg2e32ff_v_tuple_i32m1_m(vbool32_t mask, const int32_t *base, size_t *new_vl, size_t vl) {
+  return __riscv_vlseg2e32ff_v_tuple_i32m1_m(mask, base, new_vl, vl);
+}
Index: clang/include/clang/Basic/riscv_vector.td
===
--- clang/include/clang/Basic/riscv_vector.td
+++ clang/include/clang/Basic/riscv_vector.td
@@ -1591,11 +1591,73 @@
 }
   }
 }
+
+multiclass RVVUnitStridedSegLoadFFTuple {
+  foreach type = ["i"] in {
+defvar eew = !cond(!eq(type, "i") : "32");
+  foreach nf = [2] in {
+let Name = op # nf # "e" # eew # "ff_v_tuple",
+OverloadedName = op # nf # "e" # eew # "ff_tuple",
+IRName = op # nf # "ff",
+MaskedIRName = op # nf # "ff_mask",
+NF = nf,
+ManualCodegen = [{
+{
+  assert(((IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
+ (!IsMasked && (PolicyAttrs & RVV_VTA))) &&
+ "FIXME: Only handling default policy (TAMA) for now");
+
+  llvm::Type *ElementVectorType = cast(ResultType)->elements()[0];
+
+  IntrinsicTypes = {ElementVectorType, Ops.back()->getType()};
+  SmallVector Operands;
+
+  Operands.append(NF, llvm::PoisonValue::get(ElementVectorType));
+
+  unsigned Offset = IsMasked ? 1 : 0;
+  Operands.push_back(Ops[Offset]); // Ptr
+  if (IsMasked)
+Operands.push_back(Ops[0]);
+  Operands.push_back(Ops[Offset + 2]); // vl
+  if (IsMasked)
+Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
+
+  llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
+
+  llvm::Value *LoadValue = Builder.CreateCall(F, Operands, "");
+  // Get alignment from the new vl operand
+  clang::CharUnits Align =
+  CGM.getNaturalPointeeTypeAlignment(E->getArg(Offset + 1)->getType());
+
+  llvm::Value *ReturnTuple = llvm::PoisonValue::get(ResultType);

[PATCH] D147774: [4/11][POC][Clang][RISCV] Define tuple type variant of vsseg2e32

[Yueh-Ting (eop) Chen via Phabricator via cfe-commits]

eopXD updated this revision to Diff 523848.
eopXD added a comment.

Rebase.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147774/new/

https://reviews.llvm.org/D147774

Files:
  clang/include/clang/Basic/riscv_vector.td
  clang/lib/CodeGen/CGBuiltin.cpp
  
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e32_tuple.c

Index: clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e32_tuple.c
===
--- /dev/null
+++ clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e32_tuple.c
@@ -0,0 +1,31 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
+// REQUIRES: riscv-registered-target
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
+// RUN:   -target-feature +experimental-zvfh -disable-O0-optnone  \
+// RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
+// RUN:   FileCheck --check-prefix=CHECK-RV64 %s
+#include 
+
+// CHECK-RV64-LABEL: define dso_local void @test_vsseg2e32_v_tuple_i32m1
+// CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]],  [[V_TUPLE_COERCE0:%.*]],  [[V_TUPLE_COERCE1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-RV64-NEXT:  entry:
+// CHECK-RV64-NEXT:[[TMP0:%.*]] = insertvalue { ,  } poison,  [[V_TUPLE_COERCE0]], 0
+// CHECK-RV64-NEXT:[[TMP1:%.*]] = insertvalue { ,  } [[TMP0]],  [[V_TUPLE_COERCE1]], 1
+// CHECK-RV64-NEXT:[[TMP2:%.*]] = extractvalue { ,  } [[TMP1]], 0
+// CHECK-RV64-NEXT:[[TMP3:%.*]] = extractvalue { ,  } [[TMP1]], 1
+// CHECK-RV64-NEXT:call void @llvm.riscv.vsseg2.nxv2i32.i64( [[TMP2]],  [[TMP3]], ptr [[BASE]], i64 [[VL]])
+// CHECK-RV64-NEXT:ret void
+//
+void test_vsseg2e32_v_tuple_i32m1(int32_t *base, vint32m1x2_t v_tuple, size_t vl) {
+  return __riscv_vsseg2e32_v_tuple_i32m1(base, v_tuple, vl);
+}
+
+// CHECK-RV64-LABEL: define dso_local void @test_vsseg2e32_v_i32m1_m
+// CHECK-RV64-SAME: ( [[MASK:%.*]], ptr noundef [[BASE:%.*]],  [[V0:%.*]],  [[V1:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
+// CHECK-RV64-NEXT:  entry:
+// CHECK-RV64-NEXT:call void @llvm.riscv.vsseg2.mask.nxv2i32.i64( [[V0]],  [[V1]], ptr [[BASE]],  [[MASK]], i64 [[VL]])
+// CHECK-RV64-NEXT:ret void
+//
+void test_vsseg2e32_v_i32m1_m(vbool32_t mask, int32_t *base, vint32m1_t v0, vint32m1_t v1, size_t vl) {
+  return __riscv_vsseg2e32_v_i32m1_m(mask, base, v0, v1, vl);
+}
Index: clang/lib/CodeGen/CGBuiltin.cpp
===
--- clang/lib/CodeGen/CGBuiltin.cpp
+++ clang/lib/CodeGen/CGBuiltin.cpp
@@ -19764,6 +19764,14 @@
 ICEArguments |= (1 << 2);
 
   for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) {
+// Handle aggregate argument, namely RVV tuple types in segment load/store
+if (hasAggregateEvaluationKind(E->getArg(i)->getType())) {
+  LValue L = EmitAggExprToLValue(E->getArg(i));
+  llvm::Value *AggValue = Builder.CreateLoad(L.getAddress(*this));
+  Ops.push_back(AggValue);
+  continue;
+}
+
 // If this is a normal argument, just emit it as a scalar.
 if ((ICEArguments & (1 << i)) == 0) {
   Ops.push_back(EmitScalarExpr(E->getArg(i)));
Index: clang/include/clang/Basic/riscv_vector.td
===
--- clang/include/clang/Basic/riscv_vector.td
+++ clang/include/clang/Basic/riscv_vector.td
@@ -1548,6 +1548,49 @@
 }
   }
 }
+
+multiclass RVVUnitStridedSegStoreTuple {
+  foreach type = ["i"] in {
+defvar eew = !cond(!eq(type, "i") : "32");
+foreach nf = [2] in {
+  let Name = op # nf # "e" # eew # "_v_tuple",
+  OverloadedName = op # nf # "e" # eew # "_tuple",
+  IRName = op # nf,
+  MaskedIRName = op # nf # "_mask",
+  NF = nf,
+  HasMaskedOffOperand = false,
+  ManualCodegen = [{
+{
+  // Masked
+  // Builtin: (mask, ptr, v_tuple, vl)
+  // Intrinsic: (val0, val1, ..., ptr, mask, vl)
+  // Unmasked
+  // Builtin: (ptr, v_tuple, vl)
+  // Intrinsic: (val0, val1, ..., ptr, vl)
+  unsigned Offset = IsMasked ? 1 : 0;
+  llvm::Value *VTupleOperand = Ops[Offset + 1];
+
+  SmallVector Operands;
+  for (unsigned I = 0; I < NF; ++I) {
+llvm::Value *V = Builder.CreateExtractValue(VTupleOperand, {I});
+Operands.push_back(V);
+  }
+  Operands.push_back(Ops[Offset]); // Ptr
+  if (IsMasked)
+Operands.push_back(Ops[0]);
+  Operands.push_back(Ops[Offset + 2]); // VL
+
+  IntrinsicTypes = {Operands[0]->getType(), Operands.back()->getType()};
+  llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
+  return Builder.CreateCall(F, Operands, "");
+   }
+  }] in {
+  defvar T = "(Tuple:" # nf # ")";
+  def : RVVBuiltin<"v", "0Pe" # T # "v", type>;
+  }

[PATCH] D147731: [3/11][POC][Clang][RISCV] Add typedef of the tuple type and define tuple type variant of vlseg2e32

[Yueh-Ting (eop) Chen via Phabricator via cfe-commits]

eopXD updated this revision to Diff 523847.
eopXD added a comment.

Rebase.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147731/new/

https://reviews.llvm.org/D147731

Files:
  clang/include/clang/AST/ASTContext.h
  clang/include/clang/Basic/riscv_vector.td
  clang/include/clang/Basic/riscv_vector_common.td
  clang/include/clang/Support/RISCVVIntrinsicUtils.h
  clang/lib/AST/ASTContext.cpp
  clang/lib/Sema/SemaRISCVVectorLookup.cpp
  clang/lib/Support/RISCVVIntrinsicUtils.cpp
  
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32_tuple.c
  clang/utils/TableGen/RISCVVEmitter.cpp

Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -65,6 +65,7 @@
   bool HasMaskedOffOperand :1;
   bool HasTailPolicy : 1;
   bool HasMaskPolicy : 1;
+  bool IsTuple : 1;
   uint8_t UnMaskedPolicyScheme : 2;
   uint8_t MaskedPolicyScheme : 2;
 };
@@ -363,6 +364,16 @@
 TypeModifier::UnsignedInteger));
 printType(*UT);
   }
+  // FIXME: Expand more type declaration
+  if (I == 'i' && Log2LMUL == 0) { // vint32m1x2_t
+auto TupleT = TypeCache.computeType(
+BT, Log2LMUL,
+PrototypeDescriptor(BaseTypeModifier::Vector,
+VectorTypeModifier::Tuple2,
+TypeModifier::SignedInteger));
+if (TupleT)
+  printType(*TupleT);
+  }
 }
   }
 
@@ -512,6 +523,7 @@
 StringRef IRName = R->getValueAsString("IRName");
 StringRef MaskedIRName = R->getValueAsString("MaskedIRName");
 unsigned NF = R->getValueAsInt("NF");
+bool IsTuple = R->getValueAsBit("IsTuple");
 
 const Policy DefaultPolicy;
 SmallVector SupportedUnMaskedPolicies =
@@ -532,10 +544,10 @@
 auto Prototype = RVVIntrinsic::computeBuiltinTypes(
 BasicPrototype, /*IsMasked=*/false,
 /*HasMaskedOffOperand=*/false, HasVL, NF, UnMaskedPolicyScheme,
-DefaultPolicy);
+DefaultPolicy, IsTuple);
 auto MaskedPrototype = RVVIntrinsic::computeBuiltinTypes(
 BasicPrototype, /*IsMasked=*/true, HasMaskedOffOperand, HasVL, NF,
-MaskedPolicyScheme, DefaultPolicy);
+MaskedPolicyScheme, DefaultPolicy, IsTuple);
 
 // Create Intrinsics for each type and LMUL.
 for (char I : TypeRange) {
@@ -557,14 +569,14 @@
 /*IsMasked=*/false, /*HasMaskedOffOperand=*/false, HasVL,
 UnMaskedPolicyScheme, SupportOverloading, HasBuiltinAlias,
 ManualCodegen, *Types, IntrinsicTypes, RequiredFeatures, NF,
-DefaultPolicy));
+DefaultPolicy, IsTuple));
 if (UnMaskedPolicyScheme != PolicyScheme::SchemeNone)
   for (auto P : SupportedUnMaskedPolicies) {
 SmallVector PolicyPrototype =
 RVVIntrinsic::computeBuiltinTypes(
 BasicPrototype, /*IsMasked=*/false,
 /*HasMaskedOffOperand=*/false, HasVL, NF,
-UnMaskedPolicyScheme, P);
+UnMaskedPolicyScheme, P, IsTuple);
 std::optional PolicyTypes =
 TypeCache.computeTypes(BT, Log2LMUL, NF, PolicyPrototype);
 Out.push_back(std::make_unique(
@@ -572,7 +584,7 @@
 /*IsMask=*/false, /*HasMaskedOffOperand=*/false, HasVL,
 UnMaskedPolicyScheme, SupportOverloading, HasBuiltinAlias,
 ManualCodegen, *PolicyTypes, IntrinsicTypes, RequiredFeatures,
-NF, P));
+NF, P, IsTuple));
   }
 if (!HasMasked)
   continue;
@@ -583,14 +595,14 @@
 Name, SuffixStr, OverloadedName, OverloadedSuffixStr, MaskedIRName,
 /*IsMasked=*/true, HasMaskedOffOperand, HasVL, MaskedPolicyScheme,
 SupportOverloading, HasBuiltinAlias, ManualCodegen, *MaskTypes,
-IntrinsicTypes, RequiredFeatures, NF, DefaultPolicy));
+IntrinsicTypes, RequiredFeatures, NF, DefaultPolicy, IsTuple));
 if (MaskedPolicyScheme == PolicyScheme::SchemeNone)
   continue;
 for (auto P : SupportedMaskedPolicies) {
   SmallVector PolicyPrototype =
   RVVIntrinsic::computeBuiltinTypes(
   BasicPrototype, /*IsMasked=*/true, HasMaskedOffOperand, HasVL,
-  NF, MaskedPolicyScheme, P);
+  NF, MaskedPolicyScheme, P, IsTuple);
   std::optional PolicyTypes =
   TypeCache.computeTypes(BT, Log2LMUL, NF, PolicyPrototype);
   Out.push_back(std::make_unique(
@@ -598,7 +610,7 @@
   MaskedIRName, /*IsMasked=*/true, HasMaskedOffOperand, HasVL,
   MaskedPolicyScheme, SupportOverloading, HasBuiltinAlias,
   ManualCodegen, *PolicyTypes, IntrinsicTypes, 

[PATCH] D148094: [clang][CodeGen] Break up TargetInfo.cpp [8/8]

[Sergei Barannikov via Phabricator via cfe-commits]

barannikov88 added a comment.

ping


Repository:
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[PATCH] D148094: [clang][CodeGen] Break up TargetInfo.cpp [8/8]

[Sergei Barannikov via Phabricator via cfe-commits]

barannikov88 updated this revision to Diff 523846.
barannikov88 added a comment.

Rebase


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148094/new/

https://reviews.llvm.org/D148094

Files:
  clang/docs/UsersManual.rst
  clang/docs/tools/clang-formatted-files.txt
  clang/lib/CodeGen/ABIInfo.cpp
  clang/lib/CodeGen/ABIInfo.h
  clang/lib/CodeGen/ABIInfoImpl.cpp
  clang/lib/CodeGen/ABIInfoImpl.h
  clang/lib/CodeGen/CMakeLists.txt
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/CodeGen/Targets/AArch64.cpp
  clang/lib/CodeGen/Targets/AMDGPU.cpp
  clang/lib/CodeGen/Targets/ARC.cpp
  clang/lib/CodeGen/Targets/ARM.cpp
  clang/lib/CodeGen/Targets/AVR.cpp
  clang/lib/CodeGen/Targets/BPF.cpp
  clang/lib/CodeGen/Targets/CSKY.cpp
  clang/lib/CodeGen/Targets/Hexagon.cpp
  clang/lib/CodeGen/Targets/Lanai.cpp
  clang/lib/CodeGen/Targets/LoongArch.cpp
  clang/lib/CodeGen/Targets/M68k.cpp
  clang/lib/CodeGen/Targets/MSP430.cpp
  clang/lib/CodeGen/Targets/Mips.cpp
  clang/lib/CodeGen/Targets/NVPTX.cpp
  clang/lib/CodeGen/Targets/PNaCl.cpp
  clang/lib/CodeGen/Targets/PPC.cpp
  clang/lib/CodeGen/Targets/RISCV.cpp
  clang/lib/CodeGen/Targets/SPIR.cpp
  clang/lib/CodeGen/Targets/Sparc.cpp
  clang/lib/CodeGen/Targets/SystemZ.cpp
  clang/lib/CodeGen/Targets/TCE.cpp
  clang/lib/CodeGen/Targets/VE.cpp
  clang/lib/CodeGen/Targets/WebAssembly.cpp
  clang/lib/CodeGen/Targets/X86.cpp
  clang/lib/CodeGen/Targets/XCore.cpp
  clang/test/CodeGenCXX/microsoft-abi-member-pointers.cpp
  llvm/utils/gn/secondary/clang/lib/CodeGen/BUILD.gn

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[PATCH] D150215: [clang][CodeGen] Break up TargetInfo.cpp [7/8]

[Sergei Barannikov via Phabricator via cfe-commits]

barannikov88 updated this revision to Diff 523845.
barannikov88 added a comment.

Rebase


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D150215/new/

https://reviews.llvm.org/D150215

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/CodeGen/TargetInfo.h

Index: clang/lib/CodeGen/TargetInfo.h
===
--- clang/lib/CodeGen/TargetInfo.h
+++ clang/lib/CodeGen/TargetInfo.h
@@ -406,6 +406,150 @@
  CodeGen::CodeGenModule ) const;
 };
 
+std::unique_ptr
+createDefaultTargetCodeGenInfo(CodeGenModule );
+
+enum class AArch64ABIKind {
+  AAPCS = 0,
+  DarwinPCS,
+  Win64,
+};
+
+std::unique_ptr
+createAArch64TargetCodeGenInfo(CodeGenModule , AArch64ABIKind Kind);
+
+std::unique_ptr
+createWindowsAArch64TargetCodeGenInfo(CodeGenModule , AArch64ABIKind K);
+
+std::unique_ptr
+createAMDGPUTargetCodeGenInfo(CodeGenModule );
+
+std::unique_ptr
+createARCTargetCodeGenInfo(CodeGenModule );
+
+enum class ARMABIKind {
+  APCS = 0,
+  AAPCS = 1,
+  AAPCS_VFP = 2,
+  AAPCS16_VFP = 3,
+};
+
+std::unique_ptr
+createARMTargetCodeGenInfo(CodeGenModule , ARMABIKind Kind);
+
+std::unique_ptr
+createWindowsARMTargetCodeGenInfo(CodeGenModule , ARMABIKind K);
+
+std::unique_ptr
+createAVRTargetCodeGenInfo(CodeGenModule , unsigned NPR, unsigned NRR);
+
+std::unique_ptr
+createBPFTargetCodeGenInfo(CodeGenModule );
+
+std::unique_ptr
+createCSKYTargetCodeGenInfo(CodeGenModule , unsigned FLen);
+
+std::unique_ptr
+createHexagonTargetCodeGenInfo(CodeGenModule );
+
+std::unique_ptr
+createLanaiTargetCodeGenInfo(CodeGenModule );
+
+std::unique_ptr
+createLoongArchTargetCodeGenInfo(CodeGenModule , unsigned GRLen,
+ unsigned FLen);
+
+std::unique_ptr
+createM68kTargetCodeGenInfo(CodeGenModule );
+
+std::unique_ptr
+createMIPSTargetCodeGenInfo(CodeGenModule , bool IsOS32);
+
+std::unique_ptr
+createMSP430TargetCodeGenInfo(CodeGenModule );
+
+std::unique_ptr
+createNVPTXTargetCodeGenInfo(CodeGenModule );
+
+std::unique_ptr
+createPNaClTargetCodeGenInfo(CodeGenModule );
+
+enum class PPC64_SVR4_ABIKind {
+  ELFv1 = 0,
+  ELFv2,
+};
+
+std::unique_ptr
+createAIXTargetCodeGenInfo(CodeGenModule , bool Is64Bit);
+
+std::unique_ptr
+createPPC32TargetCodeGenInfo(CodeGenModule , bool SoftFloatABI);
+
+std::unique_ptr
+createPPC64TargetCodeGenInfo(CodeGenModule );
+
+std::unique_ptr
+createPPC64_SVR4_TargetCodeGenInfo(CodeGenModule , PPC64_SVR4_ABIKind Kind,
+   bool SoftFloatABI);
+
+std::unique_ptr
+createRISCVTargetCodeGenInfo(CodeGenModule , unsigned XLen, unsigned FLen);
+
+std::unique_ptr
+createCommonSPIRTargetCodeGenInfo(CodeGenModule );
+
+std::unique_ptr
+createSPIRVTargetCodeGenInfo(CodeGenModule );
+
+std::unique_ptr
+createSparcV8TargetCodeGenInfo(CodeGenModule );
+
+std::unique_ptr
+createSparcV9TargetCodeGenInfo(CodeGenModule );
+
+std::unique_ptr
+createSystemZTargetCodeGenInfo(CodeGenModule , bool HasVector,
+   bool SoftFloatABI);
+
+std::unique_ptr
+createTCETargetCodeGenInfo(CodeGenModule );
+
+std::unique_ptr
+createVETargetCodeGenInfo(CodeGenModule );
+
+enum class WebAssemblyABIKind {
+  MVP = 0,
+  ExperimentalMV = 1,
+};
+
+std::unique_ptr
+createWebAssemblyTargetCodeGenInfo(CodeGenModule , WebAssemblyABIKind K);
+
+/// The AVX ABI level for X86 targets.
+enum class X86AVXABILevel {
+  None,
+  AVX,
+  AVX512,
+};
+
+std::unique_ptr createX86_32TargetCodeGenInfo(
+CodeGenModule , bool DarwinVectorABI, bool Win32StructABI,
+unsigned NumRegisterParameters, bool SoftFloatABI);
+
+std::unique_ptr
+createWinX86_32TargetCodeGenInfo(CodeGenModule , bool DarwinVectorABI,
+ bool Win32StructABI,
+ unsigned NumRegisterParameters);
+
+std::unique_ptr
+createX86_64TargetCodeGenInfo(CodeGenModule , X86AVXABILevel AVXLevel);
+
+std::unique_ptr
+createWinX86_64TargetCodeGenInfo(CodeGenModule , X86AVXABILevel AVXLevel);
+
+std::unique_ptr
+createXCoreTargetCodeGenInfo(CodeGenModule );
+
 } // namespace CodeGen
 } // namespace clang
 
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -829,11 +829,6 @@
 // This is a very simple ABI that relies a lot on DefaultABIInfo.
 //===--===//
 
-enum class WebAssemblyABIKind {
-  MVP = 0,
-  ExperimentalMV = 1,
-};
-
 class WebAssemblyABIInfo final : public ABIInfo {
   DefaultABIInfo defaultInfo;
   WebAssemblyABIKind Kind;
@@ -2239,12 +2234,6 @@
 
 
 namespace {
-/// The AVX ABI level for X86 targets.
-enum class X86AVXABILevel {
-  None,
-  AVX,
-  AVX512
-};
 
 /// \p returns the size in bits of the largest (native) vector for \p AVXLevel.
 static unsigned getNativeVectorSizeForAVXABI(X86AVXABILevel 

[PATCH] D150178: [clang][CodeGen] Break up TargetInfo.cpp [6/8]

[Sergei Barannikov via Phabricator via cfe-commits]

barannikov88 updated this revision to Diff 523844.
barannikov88 added a comment.

Rebase


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D150178/new/

https://reviews.llvm.org/D150178

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/CodeGen/TargetInfo.h


Index: clang/lib/CodeGen/TargetInfo.h
===
--- clang/lib/CodeGen/TargetInfo.h
+++ clang/lib/CodeGen/TargetInfo.h
@@ -398,6 +398,12 @@
   virtual llvm::Type *getOpenCLType(CodeGenModule , const Type *T) const {
 return nullptr;
   }
+
+protected:
+  static std::string qualifyWindowsLibrary(StringRef Lib);
+
+  void addStackProbeTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
+ CodeGen::CodeGenModule ) const;
 };
 
 } // namespace CodeGen
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -2543,6 +2543,7 @@
 const FunctionDecl *Callee,
 const CallArgList ) const override;
 };
+} // namespace
 
 static void initFeatureMaps(const ASTContext ,
 llvm::StringMap ,
@@ -2641,7 +2642,7 @@
   }
 }
 
-static std::string qualifyWindowsLibrary(llvm::StringRef Lib) {
+std::string TargetCodeGenInfo::qualifyWindowsLibrary(StringRef Lib) {
   // If the argument does not end in .lib, automatically add the suffix.
   // If the argument contains a space, enclose it in quotes.
   // This matches the behavior of MSVC.
@@ -2654,6 +2655,7 @@
   return ArgStr;
 }
 
+namespace {
 class WinX86_32TargetCodeGenInfo : public X86_32TargetCodeGenInfo {
 public:
   WinX86_32TargetCodeGenInfo(CodeGen::CodeGenTypes ,
@@ -2677,11 +2679,11 @@
 Opt = "/FAILIFMISMATCH:\"" + Name.str() + "=" + Value.str() + "\"";
   }
 };
+} // namespace
 
-static void addStackProbeTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
-  CodeGen::CodeGenModule ) {
+void TargetCodeGenInfo::addStackProbeTargetAttributes(
+const Decl *D, llvm::GlobalValue *GV, CodeGen::CodeGenModule ) const {
   if (llvm::Function *Fn = dyn_cast_or_null(GV)) {
-
 if (CGM.getCodeGenOpts().StackProbeSize != 4096)
   Fn->addFnAttr("stack-probe-size",
 llvm::utostr(CGM.getCodeGenOpts().StackProbeSize));
@@ -2698,6 +2700,7 @@
   addStackProbeTargetAttributes(D, GV, CGM);
 }
 
+namespace {
 class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes ,
@@ -2736,6 +2739,7 @@
 Opt = "/FAILIFMISMATCH:\"" + Name.str() + "=" + Value.str() + "\"";
   }
 };
+} // namespace
 
 void WinX86_64TargetCodeGenInfo::setTargetAttributes(
 const Decl *D, llvm::GlobalValue *GV, CodeGen::CodeGenModule ) const {
@@ -2753,7 +2757,6 @@
 
   addStackProbeTargetAttributes(D, GV, CGM);
 }
-}
 
 void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class ,
   Class ) const {


Index: clang/lib/CodeGen/TargetInfo.h
===
--- clang/lib/CodeGen/TargetInfo.h
+++ clang/lib/CodeGen/TargetInfo.h
@@ -398,6 +398,12 @@
   virtual llvm::Type *getOpenCLType(CodeGenModule , const Type *T) const {
 return nullptr;
   }
+
+protected:
+  static std::string qualifyWindowsLibrary(StringRef Lib);
+
+  void addStackProbeTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
+ CodeGen::CodeGenModule ) const;
 };
 
 } // namespace CodeGen
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -2543,6 +2543,7 @@
 const FunctionDecl *Callee,
 const CallArgList ) const override;
 };
+} // namespace
 
 static void initFeatureMaps(const ASTContext ,
 llvm::StringMap ,
@@ -2641,7 +2642,7 @@
   }
 }
 
-static std::string qualifyWindowsLibrary(llvm::StringRef Lib) {
+std::string TargetCodeGenInfo::qualifyWindowsLibrary(StringRef Lib) {
   // If the argument does not end in .lib, automatically add the suffix.
   // If the argument contains a space, enclose it in quotes.
   // This matches the behavior of MSVC.
@@ -2654,6 +2655,7 @@
   return ArgStr;
 }
 
+namespace {
 class WinX86_32TargetCodeGenInfo : public X86_32TargetCodeGenInfo {
 public:
   WinX86_32TargetCodeGenInfo(CodeGen::CodeGenTypes ,
@@ -2677,11 +2679,11 @@
 Opt = "/FAILIFMISMATCH:\"" + Name.str() + "=" + Value.str() + "\"";
   }
 };
+} // namespace
 
-static void addStackProbeTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
-  CodeGen::CodeGenModule ) {
+void TargetCodeGenInfo::addStackProbeTargetAttributes(
+const Decl 

[PATCH] D148093: [clang][CodeGen] Break up TargetInfo.cpp [5/8]

[Sergei Barannikov via Phabricator via cfe-commits]

barannikov88 updated this revision to Diff 523843.
barannikov88 added a comment.

Rebase


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148093/new/

https://reviews.llvm.org/D148093

Files:
  clang/lib/CodeGen/ABIInfo.h
  clang/lib/CodeGen/TargetInfo.cpp


Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -125,7 +125,7 @@
 /// registers when expanded?
 ///
 /// This is intended to be the basis of a reasonable basic implementation
-/// of should{Pass,Return}IndirectlyForSwift.
+/// of should{Pass,Return}Indirectly.
 ///
 /// For most targets, a limit of four total registers is reasonable; this
 /// limits the amount of code required in order to move around the value
@@ -134,15 +134,14 @@
 /// immediately within the callee.  But some targets may need to further
 /// limit the register count due to an inability to support that many
 /// return registers.
-static bool occupiesMoreThan(CodeGenTypes ,
- ArrayRef scalarTypes,
- unsigned maxAllRegisters) {
+bool SwiftABIInfo::occupiesMoreThan(ArrayRef scalarTypes,
+unsigned maxAllRegisters) const {
   unsigned intCount = 0, fpCount = 0;
   for (llvm::Type *type : scalarTypes) {
 if (type->isPointerTy()) {
   intCount++;
 } else if (auto intTy = dyn_cast(type)) {
-  auto ptrWidth = cgt.getTarget().getPointerWidth(LangAS::Default);
+  auto ptrWidth = CGT.getTarget().getPointerWidth(LangAS::Default);
   intCount += (intTy->getBitWidth() + ptrWidth - 1) / ptrWidth;
 } else {
   assert(type->isVectorTy() || type->isFloatingPointTy());
@@ -155,7 +154,7 @@
 
 bool SwiftABIInfo::shouldPassIndirectly(ArrayRef ComponentTys,
 bool AsReturnValue) const {
-  return occupiesMoreThan(CGT, ComponentTys, /*total=*/4);
+  return occupiesMoreThan(ComponentTys, /*total=*/4);
 }
 
 bool SwiftABIInfo::isLegalVectorType(CharUnits VectorSize, llvm::Type *EltTy,
@@ -1248,7 +1247,7 @@
 // integer registers and three fp registers.  Oddly, it'll use up to
 // four vector registers for vectors, but those can overlap with the
 // scalar registers.
-return occupiesMoreThan(CGT, ComponentTys, /*total=*/3);
+return occupiesMoreThan(ComponentTys, /*total=*/3);
   }
 };
 
Index: clang/lib/CodeGen/ABIInfo.h
===
--- clang/lib/CodeGen/ABIInfo.h
+++ clang/lib/CodeGen/ABIInfo.h
@@ -117,6 +117,9 @@
   CodeGenTypes 
   bool SwiftErrorInRegister;
 
+  bool occupiesMoreThan(ArrayRef scalarTypes,
+unsigned maxAllRegisters) const;
+
 public:
   SwiftABIInfo(CodeGen::CodeGenTypes , bool SwiftErrorInRegister)
   : CGT(CGT), SwiftErrorInRegister(SwiftErrorInRegister) {}


Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -125,7 +125,7 @@
 /// registers when expanded?
 ///
 /// This is intended to be the basis of a reasonable basic implementation
-/// of should{Pass,Return}IndirectlyForSwift.
+/// of should{Pass,Return}Indirectly.
 ///
 /// For most targets, a limit of four total registers is reasonable; this
 /// limits the amount of code required in order to move around the value
@@ -134,15 +134,14 @@
 /// immediately within the callee.  But some targets may need to further
 /// limit the register count due to an inability to support that many
 /// return registers.
-static bool occupiesMoreThan(CodeGenTypes ,
- ArrayRef scalarTypes,
- unsigned maxAllRegisters) {
+bool SwiftABIInfo::occupiesMoreThan(ArrayRef scalarTypes,
+unsigned maxAllRegisters) const {
   unsigned intCount = 0, fpCount = 0;
   for (llvm::Type *type : scalarTypes) {
 if (type->isPointerTy()) {
   intCount++;
 } else if (auto intTy = dyn_cast(type)) {
-  auto ptrWidth = cgt.getTarget().getPointerWidth(LangAS::Default);
+  auto ptrWidth = CGT.getTarget().getPointerWidth(LangAS::Default);
   intCount += (intTy->getBitWidth() + ptrWidth - 1) / ptrWidth;
 } else {
   assert(type->isVectorTy() || type->isFloatingPointTy());
@@ -155,7 +154,7 @@
 
 bool SwiftABIInfo::shouldPassIndirectly(ArrayRef ComponentTys,
 bool AsReturnValue) const {
-  return occupiesMoreThan(CGT, ComponentTys, /*total=*/4);
+  return occupiesMoreThan(ComponentTys, /*total=*/4);
 }
 
 bool SwiftABIInfo::isLegalVectorType(CharUnits VectorSize, llvm::Type *EltTy,
@@ -1248,7 +1247,7 @@
 // integer registers and three fp registers.  Oddly, it'll use up to
 // four vector registers for vectors, but those can overlap with the
 

[PATCH] D148092: [clang][CodeGen] Break up TargetInfo.cpp [4/8]

[Sergei Barannikov via Phabricator via cfe-commits]

barannikov88 updated this revision to Diff 523842.
barannikov88 added a comment.

Rebase


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148092/new/

https://reviews.llvm.org/D148092

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/CodeGen/TargetInfo.h

Index: clang/lib/CodeGen/TargetInfo.h
===
--- clang/lib/CodeGen/TargetInfo.h
+++ clang/lib/CodeGen/TargetInfo.h
@@ -52,6 +52,11 @@
   // by returning true from TargetInfo::checkCallingConvention for them.
   std::unique_ptr SwiftInfo;
 
+  // Returns ABI info helper for the target. This is for use by derived classes.
+  template  const T () const {
+return static_cast(*Info);
+  }
+
 public:
   TargetCodeGenInfo(std::unique_ptr Info);
   virtual ~TargetCodeGenInfo();
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -2476,10 +2476,6 @@
 std::make_unique(CGT, /*SwiftErrorInRegister=*/true);
   }
 
-  const X86_64ABIInfo () const {
-return static_cast(TargetCodeGenInfo::getABIInfo());
-  }
-
   /// Disable tail call on x86-64. The epilogue code before the tail jump blocks
   /// autoreleaseRV/retainRV and autoreleaseRV/unsafeClaimRV optimizations.
   bool markARCOptimizedReturnCallsAsNoTail() const override { return true; }
@@ -2516,7 +2512,7 @@
   bool HasAVXType = false;
   for (CallArgList::const_iterator
  it = args.begin(), ie = args.end(); it != ie; ++it) {
-if (getABIInfo().isPassedUsingAVXType(it->Ty)) {
+if (getABIInfo().isPassedUsingAVXType(it->Ty)) {
   HasAVXType = true;
   break;
 }
@@ -6388,10 +6384,6 @@
 SwiftInfo = std::make_unique(CGT);
   }
 
-  const ARMABIInfo () const {
-return static_cast(TargetCodeGenInfo::getABIInfo());
-  }
-
   int getDwarfEHStackPointer(CodeGen::CodeGenModule ) const override {
 return 13;
   }
@@ -6410,7 +6402,8 @@
   }
 
   unsigned getSizeOfUnwindException() const override {
-if (getABIInfo().isEABI()) return 88;
+if (getABIInfo().isEABI())
+  return 88;
 return TargetCodeGenInfo::getSizeOfUnwindException();
   }
 
@@ -6477,7 +6470,7 @@
 
 Fn->addFnAttr("interrupt", Kind);
 
-ARMABIKind ABI = cast(getABIInfo()).getABIKind();
+ARMABIKind ABI = getABIInfo().getABIKind();
 if (ABI == ARMABIKind::APCS)
   return;
 
@@ -7415,10 +7408,6 @@
 class SystemZTargetCodeGenInfo : public TargetCodeGenInfo {
   ASTContext 
 
-  const SystemZABIInfo () const {
-return static_cast(TargetCodeGenInfo::getABIInfo());
-  }
-
   // These are used for speeding up the search for a visible vector ABI.
   mutable bool HasVisibleVecABIFlag = false;
   mutable std::set SeenTypes;
@@ -7867,8 +7856,9 @@
 // it will be passed in a vector register. A wide (>16 bytes) vector will
 // be passed via "hidden" pointer where any extra alignment is not
 // required (per GCC).
-const Type *SingleEltTy =
-  getABIInfo().GetSingleElementType(QualType(Ty, 0)).getTypePtr();
+const Type *SingleEltTy = getABIInfo()
+  .GetSingleElementType(QualType(Ty, 0))
+  .getTypePtr();
 bool SingleVecEltStruct = SingleEltTy != Ty && SingleEltTy->isVectorType() &&
   Ctx.getTypeSize(SingleEltTy) == Ctx.getTypeSize(Ty);
 if (Ty->isVectorType() || SingleVecEltStruct)
@@ -11841,10 +11831,6 @@
 public:
   BPFTargetCodeGenInfo(CodeGenTypes )
   : TargetCodeGenInfo(std::make_unique(CGT)) {}
-
-  const BPFABIInfo () const {
-return static_cast(TargetCodeGenInfo::getABIInfo());
-  }
 };
 
 }
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[PATCH] D148091: [clang][CodeGen] Break up TargetInfo.cpp [3/8]

[Sergei Barannikov via Phabricator via cfe-commits]

barannikov88 updated this revision to Diff 523841.
barannikov88 added a comment.

Rebase


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148091/new/

https://reviews.llvm.org/D148091

Files:
  clang/lib/CodeGen/TargetInfo.cpp


Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -5049,9 +5049,10 @@
llvm::Value *Address) const override;
 };
 
-class PPC64TargetCodeGenInfo : public DefaultTargetCodeGenInfo {
+class PPC64TargetCodeGenInfo : public TargetCodeGenInfo {
 public:
-  PPC64TargetCodeGenInfo(CodeGenTypes ) : DefaultTargetCodeGenInfo(CGT) {}
+  PPC64TargetCodeGenInfo(CodeGenTypes )
+  : TargetCodeGenInfo(std::make_unique(CGT)) {}
 
   int getDwarfEHStackPointer(CodeGen::CodeGenModule ) const override {
 // This is recovered from gcc output.
@@ -5061,7 +5062,6 @@
   bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction ,
llvm::Value *Address) const override;
 };
-
 }
 
 // Return true if the ABI requires Ty to be passed sign- or zero-
@@ -8584,10 +8584,10 @@
 
 namespace {
 
-class TCETargetCodeGenInfo : public DefaultTargetCodeGenInfo {
+class TCETargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   TCETargetCodeGenInfo(CodeGenTypes )
-: DefaultTargetCodeGenInfo(CGT) {}
+  : TargetCodeGenInfo(std::make_unique(CGT)) {}
 
   void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule ) const override;


Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -5049,9 +5049,10 @@
llvm::Value *Address) const override;
 };
 
-class PPC64TargetCodeGenInfo : public DefaultTargetCodeGenInfo {
+class PPC64TargetCodeGenInfo : public TargetCodeGenInfo {
 public:
-  PPC64TargetCodeGenInfo(CodeGenTypes ) : DefaultTargetCodeGenInfo(CGT) {}
+  PPC64TargetCodeGenInfo(CodeGenTypes )
+  : TargetCodeGenInfo(std::make_unique(CGT)) {}
 
   int getDwarfEHStackPointer(CodeGen::CodeGenModule ) const override {
 // This is recovered from gcc output.
@@ -5061,7 +5062,6 @@
   bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction ,
llvm::Value *Address) const override;
 };
-
 }
 
 // Return true if the ABI requires Ty to be passed sign- or zero-
@@ -8584,10 +8584,10 @@
 
 namespace {
 
-class TCETargetCodeGenInfo : public DefaultTargetCodeGenInfo {
+class TCETargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   TCETargetCodeGenInfo(CodeGenTypes )
-: DefaultTargetCodeGenInfo(CGT) {}
+  : TargetCodeGenInfo(std::make_unique(CGT)) {}
 
   void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule ) const override;
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[PATCH] D148090: [clang][CodeGen] Break up TargetInfo.cpp [2/8]

[Sergei Barannikov via Phabricator via cfe-commits]

barannikov88 updated this revision to Diff 523840.
barannikov88 added a comment.

Rebase


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148090/new/

https://reviews.llvm.org/D148090

Files:
  clang/lib/CodeGen/TargetInfo.cpp

Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -830,19 +830,18 @@
 // This is a very simple ABI that relies a lot on DefaultABIInfo.
 //===--===//
 
-class WebAssemblyABIInfo final : public ABIInfo {
-public:
-  enum ABIKind {
-MVP = 0,
-ExperimentalMV = 1,
-  };
+enum class WebAssemblyABIKind {
+  MVP = 0,
+  ExperimentalMV = 1,
+};
 
-private:
+class WebAssemblyABIInfo final : public ABIInfo {
   DefaultABIInfo defaultInfo;
-  ABIKind Kind;
+  WebAssemblyABIKind Kind;
 
 public:
-  explicit WebAssemblyABIInfo(CodeGen::CodeGenTypes , ABIKind Kind)
+  explicit WebAssemblyABIInfo(CodeGen::CodeGenTypes ,
+  WebAssemblyABIKind Kind)
   : ABIInfo(CGT), defaultInfo(CGT), Kind(Kind) {}
 
 private:
@@ -866,7 +865,7 @@
 class WebAssemblyTargetCodeGenInfo final : public TargetCodeGenInfo {
 public:
   explicit WebAssemblyTargetCodeGenInfo(CodeGen::CodeGenTypes ,
-WebAssemblyABIInfo::ABIKind K)
+WebAssemblyABIKind K)
   : TargetCodeGenInfo(std::make_unique(CGT, K)) {
 SwiftInfo =
 std::make_unique(CGT, /*SwiftErrorInRegister=*/false);
@@ -931,7 +930,7 @@
 if (const Type *SeltTy = isSingleElementStruct(Ty, getContext()))
   return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0)));
 // For the experimental multivalue ABI, fully expand all other aggregates
-if (Kind == ABIKind::ExperimentalMV) {
+if (Kind == WebAssemblyABIKind::ExperimentalMV) {
   const RecordType *RT = Ty->getAs();
   assert(RT);
   bool HasBitField = false;
@@ -964,7 +963,7 @@
   if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext()))
 return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0)));
   // For the experimental multivalue ABI, return all other aggregates
-  if (Kind == ABIKind::ExperimentalMV)
+  if (Kind == WebAssemblyABIKind::ExperimentalMV)
 return ABIArgInfo::getDirect();
 }
   }
@@ -4973,21 +4972,19 @@
 // PowerPC-64
 
 namespace {
+enum class PPC64_SVR4_ABIKind {
+  ELFv1 = 0,
+  ELFv2,
+};
+
 /// PPC64_SVR4_ABIInfo - The 64-bit PowerPC ELF (SVR4) ABI information.
 class PPC64_SVR4_ABIInfo : public ABIInfo {
-public:
-  enum ABIKind {
-ELFv1 = 0,
-ELFv2
-  };
-
-private:
   static const unsigned GPRBits = 64;
-  ABIKind Kind;
+  PPC64_SVR4_ABIKind Kind;
   bool IsSoftFloatABI;
 
 public:
-  PPC64_SVR4_ABIInfo(CodeGen::CodeGenTypes , ABIKind Kind,
+  PPC64_SVR4_ABIInfo(CodeGen::CodeGenTypes , PPC64_SVR4_ABIKind Kind,
  bool SoftFloatABI)
   : ABIInfo(CGT), Kind(Kind), IsSoftFloatABI(SoftFloatABI) {}
 
@@ -5035,8 +5032,7 @@
 class PPC64_SVR4_TargetCodeGenInfo : public TargetCodeGenInfo {
 
 public:
-  PPC64_SVR4_TargetCodeGenInfo(CodeGenTypes ,
-   PPC64_SVR4_ABIInfo::ABIKind Kind,
+  PPC64_SVR4_TargetCodeGenInfo(CodeGenTypes , PPC64_SVR4_ABIKind Kind,
bool SoftFloatABI)
   : TargetCodeGenInfo(
 std::make_unique(CGT, Kind, SoftFloatABI)) {
@@ -5135,7 +5131,7 @@
   // Likewise for ELFv2 homogeneous aggregates.
   const Type *Base = nullptr;
   uint64_t Members = 0;
-  if (!AlignAsType && Kind == ELFv2 &&
+  if (!AlignAsType && Kind == PPC64_SVR4_ABIKind::ELFv2 &&
   isAggregateTypeForABI(Ty) && isHomogeneousAggregate(Ty, Base, Members))
 AlignAsType = Base;
 
@@ -5329,7 +5325,7 @@
 // ELFv2 homogeneous aggregates are passed as array types.
 const Type *Base = nullptr;
 uint64_t Members = 0;
-if (Kind == ELFv2 &&
+if (Kind == PPC64_SVR4_ABIKind::ELFv2 &&
 isHomogeneousAggregate(Ty, Base, Members)) {
   llvm::Type *BaseTy = CGT.ConvertType(QualType(Base, 0));
   llvm::Type *CoerceTy = llvm::ArrayType::get(BaseTy, Members);
@@ -5399,7 +5395,7 @@
 // ELFv2 homogeneous aggregates are returned as array types.
 const Type *Base = nullptr;
 uint64_t Members = 0;
-if (Kind == ELFv2 &&
+if (Kind == PPC64_SVR4_ABIKind::ELFv2 &&
 isHomogeneousAggregate(RetTy, Base, Members)) {
   llvm::Type *BaseTy = CGT.ConvertType(QualType(Base, 0));
   llvm::Type *CoerceTy = llvm::ArrayType::get(BaseTy, Members);
@@ -5408,7 +5404,7 @@
 
 // ELFv2 small aggregates are returned in up to two registers.
 uint64_t Bits = getContext().getTypeSize(RetTy);
-if (Kind == ELFv2 && Bits <= 2 * GPRBits) {
+if (Kind == PPC64_SVR4_ABIKind::ELFv2 && Bits <= 2 * GPRBits) {

[PATCH] D148089: [clang][CodeGen] Break up TargetInfo.cpp [1/8]

[Sergei Barannikov via Phabricator via cfe-commits]

barannikov88 updated this revision to Diff 523839.
barannikov88 added a comment.

Rebase


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148089/new/

https://reviews.llvm.org/D148089

Files:
  clang/lib/CodeGen/TargetInfo.cpp


Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -9056,13 +9056,17 @@
 
 namespace {
 class LanaiABIInfo : public DefaultABIInfo {
+  struct CCState {
+unsigned FreeRegs;
+  };
+
 public:
   LanaiABIInfo(CodeGen::CodeGenTypes ) : DefaultABIInfo(CGT) {}
 
   bool shouldUseInReg(QualType Ty, CCState ) const;
 
   void computeInfo(CGFunctionInfo ) const override {
-CCState State(FI);
+CCState State;
 // Lanai uses 4 registers to pass arguments unless the function has the
 // regparm attribute set.
 if (FI.getHasRegParm()) {
@@ -10074,6 +10078,10 @@
 namespace {
 
 class ARCABIInfo : public DefaultABIInfo {
+  struct CCState {
+unsigned FreeRegs;
+  };
+
 public:
   using DefaultABIInfo::DefaultABIInfo;
 
@@ -10096,7 +10104,7 @@
   }
 
   void computeInfo(CGFunctionInfo ) const override {
-CCState State(FI);
+CCState State;
 // ARC uses 8 registers to pass arguments.
 State.FreeRegs = 8;
 


Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -9056,13 +9056,17 @@
 
 namespace {
 class LanaiABIInfo : public DefaultABIInfo {
+  struct CCState {
+unsigned FreeRegs;
+  };
+
 public:
   LanaiABIInfo(CodeGen::CodeGenTypes ) : DefaultABIInfo(CGT) {}
 
   bool shouldUseInReg(QualType Ty, CCState ) const;
 
   void computeInfo(CGFunctionInfo ) const override {
-CCState State(FI);
+CCState State;
 // Lanai uses 4 registers to pass arguments unless the function has the
 // regparm attribute set.
 if (FI.getHasRegParm()) {
@@ -10074,6 +10078,10 @@
 namespace {
 
 class ARCABIInfo : public DefaultABIInfo {
+  struct CCState {
+unsigned FreeRegs;
+  };
+
 public:
   using DefaultABIInfo::DefaultABIInfo;
 
@@ -10096,7 +10104,7 @@
   }
 
   void computeInfo(CGFunctionInfo ) const override {
-CCState State(FI);
+CCState State;
 // ARC uses 8 registers to pass arguments.
 State.FreeRegs = 8;
 
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