[PATCH] D102715: Fix LIT failure on native aix

[Xiangling Liao via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGd74b6635ef38: Fix LIT failure on native aix (authored by 
Xiangling_L).

Repository:
  rG LLVM Github Monorepo

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Files:
  clang/test/Sema/struct-packed-align.c


Index: clang/test/Sema/struct-packed-align.c
===
--- clang/test/Sema/struct-packed-align.c
+++ clang/test/Sema/struct-packed-align.c
@@ -146,18 +146,17 @@
 // GCC 4.4 but the change can lead to differences in the structure layout.
 // See the documentation of -Wpacked-bitfield-compat for more information.
 struct packed_chars {
-  char a:4;
+  char a : 8, b : 8, c : 8, d : 4;
 #ifdef __ORBIS__
   // Test for pre-r254596 clang behavior on the PS4 target. PS4 must maintain
   // ABI backwards compatibility.
-  char b:8 __attribute__ ((packed));
+  char e : 8 __attribute__((packed));
   // expected-warning@-1 {{'packed' attribute ignored for field of type 
'char'}}
-  char c:4;
 #else
-  char b:8 __attribute__ ((packed));
+  char e : 8 __attribute__((packed));
   // expected-warning@-1 {{'packed' attribute was ignored on bit-fields with 
single-byte alignment in older versions of GCC and Clang}}
-  char c:4;
 #endif
+  char f : 4, g : 8, h : 8, i : 8;
 };
 
 #if (defined(_WIN32) || defined(__ORBIS__)) && !defined(__declspec) // 
_MSC_VER is unavailable in cc1.
@@ -165,9 +164,13 @@
 //
 // Additionally, test for pre-r254596 clang behavior on the PS4 target. PS4
 // must maintain ABI backwards compatibility.
-extern int o1[sizeof(struct packed_chars) == 3 ? 1 : -1];
+extern int o1[sizeof(struct packed_chars) == 9 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];
+#elif defined(_AIX)
+// On AIX, char bitfields have the same alignment as unsigned int.
+extern int o1[sizeof(struct packed_chars) == 8 ? 1 : -1];
+extern int o2[__alignof(struct packed_chars) == 4 ? 1 : -1];
 #else
-extern int o1[sizeof(struct packed_chars) == 2 ? 1 : -1];
+extern int o1[sizeof(struct packed_chars) == 8 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];
 #endif


Index: clang/test/Sema/struct-packed-align.c
===
--- clang/test/Sema/struct-packed-align.c
+++ clang/test/Sema/struct-packed-align.c
@@ -146,18 +146,17 @@
 // GCC 4.4 but the change can lead to differences in the structure layout.
 // See the documentation of -Wpacked-bitfield-compat for more information.
 struct packed_chars {
-  char a:4;
+  char a : 8, b : 8, c : 8, d : 4;
 #ifdef __ORBIS__
   // Test for pre-r254596 clang behavior on the PS4 target. PS4 must maintain
   // ABI backwards compatibility.
-  char b:8 __attribute__ ((packed));
+  char e : 8 __attribute__((packed));
   // expected-warning@-1 {{'packed' attribute ignored for field of type 'char'}}
-  char c:4;
 #else
-  char b:8 __attribute__ ((packed));
+  char e : 8 __attribute__((packed));
   // expected-warning@-1 {{'packed' attribute was ignored on bit-fields with single-byte alignment in older versions of GCC and Clang}}
-  char c:4;
 #endif
+  char f : 4, g : 8, h : 8, i : 8;
 };
 
 #if (defined(_WIN32) || defined(__ORBIS__)) && !defined(__declspec) // _MSC_VER is unavailable in cc1.
@@ -165,9 +164,13 @@
 //
 // Additionally, test for pre-r254596 clang behavior on the PS4 target. PS4
 // must maintain ABI backwards compatibility.
-extern int o1[sizeof(struct packed_chars) == 3 ? 1 : -1];
+extern int o1[sizeof(struct packed_chars) == 9 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];
+#elif defined(_AIX)
+// On AIX, char bitfields have the same alignment as unsigned int.
+extern int o1[sizeof(struct packed_chars) == 8 ? 1 : -1];
+extern int o2[__alignof(struct packed_chars) == 4 ? 1 : -1];
 #else
-extern int o1[sizeof(struct packed_chars) == 2 ? 1 : -1];
+extern int o1[sizeof(struct packed_chars) == 8 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];
 #endif
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[PATCH] D102715: Fix LIT failure on native aix

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added inline comments.



Comment at: clang/test/Sema/struct-packed-align.c:170
+#elif defined(_AIX)
+// On AIX, [bool, char, short] bitfields have the same alignment as unsigned
+// int.

aaron.ballman wrote:
> Xiangling_L wrote:
> > aaron.ballman wrote:
> > > We're not really testing the behavior of `bool` or `short` anywhere and 
> > > it'd be nice to verify that. Perhaps instead of modifying an existing 
> > > test to add more fields, it'd make sense to make a new test structure?
> > > 
> > > While thinking of other potentially smaller-than-int types, I wondered 
> > > whether `wchar_t` has special behavior here as well (I have no idea how 
> > > that type is defined for AIX, so it's entirely possible it's size and 
> > > alignment already match `int`).
> > > We're not really testing the behavior of bool or short anywhere and it'd 
> > > be nice to verify that. 
> > 
> > The comment is to explain why char has 4-byte alignment mainly. And the 
> > testcase here is, as comments mentioned, to test `Packed attribute 
> > shouldn't be ignored for bit-field of char types`.  Perhaps I should remove 
> > `bool` and `short` so that people wouldn't be confused.  
> > 
> > And the special alignment regarding bool, short etc. has been tested when 
> > the special rule introduced on aix here: https://reviews.llvm.org/D87029.
> > 
> > 
> > 
> > > Perhaps instead of modifying an existing test to add more fields, it'd 
> > > make sense to make a new test structure?
> > 
> > I don't think it's necessary to make a new test structure. The modified 
> > testcase test the same property as the original one. And it is more capable 
> > as it can also test the property for AIX target.
> > 
> > 
> > 
> > 
> > > I wondered whether wchar_t has special behavior here as well 
> > 
> > I think `wchar_t` has the same special behavior. Basically any type smaller 
> > than 4 bytes will be aligned to 4 when it comes to bitfield. Please correct 
> > me if I am wrong @hubert.reinterpretcast 
> > 
> > 
> > Perhaps I should remove bool and short so that people wouldn't be confused.
> 
> That might not be a bad idea. I saw the comment and went to look for the 
> declarations of `bool` and `short` type to verify they were behaving the same 
> way, hence the confusion.
> 
> > The modified testcase test the same property as the original one.
> 
> The part that worries me is that it shifts the offset for `e`. Before, the 
> packed field could be packed into the previous allocation unit (4 bits + 8 
> bits fit comfortably within a 32-bit allocation unit), but now the packed 
> field is in an awkward spot (28 bits + 8 bits no longer fits into a 32-bit 
> allocation unit). So I think it could be subtly changing the behavior of the 
> test, but perhaps not in an observable way that matters (I admit that I don't 
> know all the ins and outs of our packing strategies).
> but now the packed field is in an awkward spot (28 bits + 8 bits no longer 
> fits into a 32-bit allocation unit)


I think this is exactly the purpose of the test. We'd like to tell if the 
`packed` attribute has effect or not.

Before the modification, on AIX, no matter the packed works or not, you will 
see the size = 4, align = 4 since char has 4-byte alignment.


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[PATCH] D102715: Fix LIT failure on native aix

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 346503.
Xiangling_L marked an inline comment as done.
Xiangling_L edited the summary of this revision.
Xiangling_L added a comment.

Adjust the comment;


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Files:
  clang/test/Sema/struct-packed-align.c


Index: clang/test/Sema/struct-packed-align.c
===
--- clang/test/Sema/struct-packed-align.c
+++ clang/test/Sema/struct-packed-align.c
@@ -146,18 +146,17 @@
 // GCC 4.4 but the change can lead to differences in the structure layout.
 // See the documentation of -Wpacked-bitfield-compat for more information.
 struct packed_chars {
-  char a:4;
+  char a : 8, b : 8, c : 8, d : 4;
 #ifdef __ORBIS__
   // Test for pre-r254596 clang behavior on the PS4 target. PS4 must maintain
   // ABI backwards compatibility.
-  char b:8 __attribute__ ((packed));
+  char e : 8 __attribute__((packed));
   // expected-warning@-1 {{'packed' attribute ignored for field of type 
'char'}}
-  char c:4;
 #else
-  char b:8 __attribute__ ((packed));
+  char e : 8 __attribute__((packed));
   // expected-warning@-1 {{'packed' attribute was ignored on bit-fields with 
single-byte alignment in older versions of GCC and Clang}}
-  char c:4;
 #endif
+  char f : 4, g : 8, h : 8, i : 8;
 };
 
 #if (defined(_WIN32) || defined(__ORBIS__)) && !defined(__declspec) // 
_MSC_VER is unavailable in cc1.
@@ -165,9 +164,13 @@
 //
 // Additionally, test for pre-r254596 clang behavior on the PS4 target. PS4
 // must maintain ABI backwards compatibility.
-extern int o1[sizeof(struct packed_chars) == 3 ? 1 : -1];
+extern int o1[sizeof(struct packed_chars) == 9 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];
+#elif defined(_AIX)
+// On AIX, char bitfields have the same alignment as unsigned int.
+extern int o1[sizeof(struct packed_chars) == 8 ? 1 : -1];
+extern int o2[__alignof(struct packed_chars) == 4 ? 1 : -1];
 #else
-extern int o1[sizeof(struct packed_chars) == 2 ? 1 : -1];
+extern int o1[sizeof(struct packed_chars) == 8 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];
 #endif


Index: clang/test/Sema/struct-packed-align.c
===
--- clang/test/Sema/struct-packed-align.c
+++ clang/test/Sema/struct-packed-align.c
@@ -146,18 +146,17 @@
 // GCC 4.4 but the change can lead to differences in the structure layout.
 // See the documentation of -Wpacked-bitfield-compat for more information.
 struct packed_chars {
-  char a:4;
+  char a : 8, b : 8, c : 8, d : 4;
 #ifdef __ORBIS__
   // Test for pre-r254596 clang behavior on the PS4 target. PS4 must maintain
   // ABI backwards compatibility.
-  char b:8 __attribute__ ((packed));
+  char e : 8 __attribute__((packed));
   // expected-warning@-1 {{'packed' attribute ignored for field of type 'char'}}
-  char c:4;
 #else
-  char b:8 __attribute__ ((packed));
+  char e : 8 __attribute__((packed));
   // expected-warning@-1 {{'packed' attribute was ignored on bit-fields with single-byte alignment in older versions of GCC and Clang}}
-  char c:4;
 #endif
+  char f : 4, g : 8, h : 8, i : 8;
 };
 
 #if (defined(_WIN32) || defined(__ORBIS__)) && !defined(__declspec) // _MSC_VER is unavailable in cc1.
@@ -165,9 +164,13 @@
 //
 // Additionally, test for pre-r254596 clang behavior on the PS4 target. PS4
 // must maintain ABI backwards compatibility.
-extern int o1[sizeof(struct packed_chars) == 3 ? 1 : -1];
+extern int o1[sizeof(struct packed_chars) == 9 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];
+#elif defined(_AIX)
+// On AIX, char bitfields have the same alignment as unsigned int.
+extern int o1[sizeof(struct packed_chars) == 8 ? 1 : -1];
+extern int o2[__alignof(struct packed_chars) == 4 ? 1 : -1];
 #else
-extern int o1[sizeof(struct packed_chars) == 2 ? 1 : -1];
+extern int o1[sizeof(struct packed_chars) == 8 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];
 #endif
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[PATCH] D102715: [AIX] Fix LIT failure on native aix

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L marked an inline comment as done.
Xiangling_L added inline comments.



Comment at: clang/test/Sema/struct-packed-align.c:170
+#elif defined(_AIX)
+// On AIX, [bool, char, short] bitfields have the same alignment as unsigned
+// int.

aaron.ballman wrote:
> We're not really testing the behavior of `bool` or `short` anywhere and it'd 
> be nice to verify that. Perhaps instead of modifying an existing test to add 
> more fields, it'd make sense to make a new test structure?
> 
> While thinking of other potentially smaller-than-int types, I wondered 
> whether `wchar_t` has special behavior here as well (I have no idea how that 
> type is defined for AIX, so it's entirely possible it's size and alignment 
> already match `int`).
> We're not really testing the behavior of bool or short anywhere and it'd be 
> nice to verify that. 

The comment is to explain why char has 4-byte alignment mainly. And the 
testcase here is, as comments mentioned, to test `Packed attribute shouldn't be 
ignored for bit-field of char types`.  Perhaps I should remove `bool` and 
`short` so that people wouldn't be confused.  

And the special alignment regarding bool, short etc. has been tested when the 
special rule introduced on aix here: https://reviews.llvm.org/D87029.



> Perhaps instead of modifying an existing test to add more fields, it'd make 
> sense to make a new test structure?

I don't think it's necessary to make a new test structure. The modified 
testcase test the same property as the original one. And it is more capable as 
it can also test the property for AIX target.




> I wondered whether wchar_t has special behavior here as well 

I think `wchar_t` has the same special behavior. Basically any type smaller 
than 4 bytes will be aligned to 4 when it comes to bitfield. Please correct me 
if I am wrong @hubert.reinterpretcast 




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[PATCH] D102715: [AIX] Fix LIT failure on native aix

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 346462.
Xiangling_L added a comment.

Adjusted the testcase so that it also tests the property well on aix;


CHANGES SINCE LAST ACTION
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Files:
  clang/test/Sema/struct-packed-align.c


Index: clang/test/Sema/struct-packed-align.c
===
--- clang/test/Sema/struct-packed-align.c
+++ clang/test/Sema/struct-packed-align.c
@@ -146,18 +146,17 @@
 // GCC 4.4 but the change can lead to differences in the structure layout.
 // See the documentation of -Wpacked-bitfield-compat for more information.
 struct packed_chars {
-  char a:4;
+  char a : 8, b : 8, c : 8, d : 4;
 #ifdef __ORBIS__
   // Test for pre-r254596 clang behavior on the PS4 target. PS4 must maintain
   // ABI backwards compatibility.
-  char b:8 __attribute__ ((packed));
+  char e : 8 __attribute__((packed));
   // expected-warning@-1 {{'packed' attribute ignored for field of type 
'char'}}
-  char c:4;
 #else
-  char b:8 __attribute__ ((packed));
+  char e : 8 __attribute__((packed));
   // expected-warning@-1 {{'packed' attribute was ignored on bit-fields with 
single-byte alignment in older versions of GCC and Clang}}
-  char c:4;
 #endif
+  char f : 4, g : 8, h : 8, i : 8;
 };
 
 #if (defined(_WIN32) || defined(__ORBIS__)) && !defined(__declspec) // 
_MSC_VER is unavailable in cc1.
@@ -165,9 +164,14 @@
 //
 // Additionally, test for pre-r254596 clang behavior on the PS4 target. PS4
 // must maintain ABI backwards compatibility.
-extern int o1[sizeof(struct packed_chars) == 3 ? 1 : -1];
+extern int o1[sizeof(struct packed_chars) == 9 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];
+#elif defined(_AIX)
+// On AIX, [bool, char, short] bitfields have the same alignment as unsigned
+// int.
+extern int o1[sizeof(struct packed_chars) == 8 ? 1 : -1];
+extern int o2[__alignof(struct packed_chars) == 4 ? 1 : -1];
 #else
-extern int o1[sizeof(struct packed_chars) == 2 ? 1 : -1];
+extern int o1[sizeof(struct packed_chars) == 8 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];
 #endif


Index: clang/test/Sema/struct-packed-align.c
===
--- clang/test/Sema/struct-packed-align.c
+++ clang/test/Sema/struct-packed-align.c
@@ -146,18 +146,17 @@
 // GCC 4.4 but the change can lead to differences in the structure layout.
 // See the documentation of -Wpacked-bitfield-compat for more information.
 struct packed_chars {
-  char a:4;
+  char a : 8, b : 8, c : 8, d : 4;
 #ifdef __ORBIS__
   // Test for pre-r254596 clang behavior on the PS4 target. PS4 must maintain
   // ABI backwards compatibility.
-  char b:8 __attribute__ ((packed));
+  char e : 8 __attribute__((packed));
   // expected-warning@-1 {{'packed' attribute ignored for field of type 'char'}}
-  char c:4;
 #else
-  char b:8 __attribute__ ((packed));
+  char e : 8 __attribute__((packed));
   // expected-warning@-1 {{'packed' attribute was ignored on bit-fields with single-byte alignment in older versions of GCC and Clang}}
-  char c:4;
 #endif
+  char f : 4, g : 8, h : 8, i : 8;
 };
 
 #if (defined(_WIN32) || defined(__ORBIS__)) && !defined(__declspec) // _MSC_VER is unavailable in cc1.
@@ -165,9 +164,14 @@
 //
 // Additionally, test for pre-r254596 clang behavior on the PS4 target. PS4
 // must maintain ABI backwards compatibility.
-extern int o1[sizeof(struct packed_chars) == 3 ? 1 : -1];
+extern int o1[sizeof(struct packed_chars) == 9 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];
+#elif defined(_AIX)
+// On AIX, [bool, char, short] bitfields have the same alignment as unsigned
+// int.
+extern int o1[sizeof(struct packed_chars) == 8 ? 1 : -1];
+extern int o2[__alignof(struct packed_chars) == 4 ? 1 : -1];
 #else
-extern int o1[sizeof(struct packed_chars) == 2 ? 1 : -1];
+extern int o1[sizeof(struct packed_chars) == 8 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];
 #endif
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[PATCH] D102715: [AIX] Fix LIT failure on native aix

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 346308.
Xiangling_L added a comment.

Add comments to the block;


CHANGES SINCE LAST ACTION
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Files:
  clang/test/Sema/struct-packed-align.c


Index: clang/test/Sema/struct-packed-align.c
===
--- clang/test/Sema/struct-packed-align.c
+++ clang/test/Sema/struct-packed-align.c
@@ -167,6 +167,11 @@
 // must maintain ABI backwards compatibility.
 extern int o1[sizeof(struct packed_chars) == 3 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];
+#elif defined(_AIX)
+// On AIX, [bool, char, short] bitfields have the same alignment as unsigned
+// int.
+extern int o1[sizeof(struct packed_chars) == 4 ? 1 : -1];
+extern int o2[__alignof(struct packed_chars) == 4 ? 1 : -1];
 #else
 extern int o1[sizeof(struct packed_chars) == 2 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];


Index: clang/test/Sema/struct-packed-align.c
===
--- clang/test/Sema/struct-packed-align.c
+++ clang/test/Sema/struct-packed-align.c
@@ -167,6 +167,11 @@
 // must maintain ABI backwards compatibility.
 extern int o1[sizeof(struct packed_chars) == 3 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];
+#elif defined(_AIX)
+// On AIX, [bool, char, short] bitfields have the same alignment as unsigned
+// int.
+extern int o1[sizeof(struct packed_chars) == 4 ? 1 : -1];
+extern int o2[__alignof(struct packed_chars) == 4 ? 1 : -1];
 #else
 extern int o1[sizeof(struct packed_chars) == 2 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];
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[PATCH] D102715: [AIX] Fix LIT failure on native aix

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L created this revision.
Xiangling_L added reviewers: hubert.reinterpretcast, sfertile, jasonliu, 
daltenty.
Xiangling_L requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Repository:
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https://reviews.llvm.org/D102715

Files:
  clang/test/Sema/struct-packed-align.c


Index: clang/test/Sema/struct-packed-align.c
===
--- clang/test/Sema/struct-packed-align.c
+++ clang/test/Sema/struct-packed-align.c
@@ -167,6 +167,9 @@
 // must maintain ABI backwards compatibility.
 extern int o1[sizeof(struct packed_chars) == 3 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];
+#elif defined(_AIX)
+extern int o1[sizeof(struct packed_chars) == 4 ? 1 : -1];
+extern int o2[__alignof(struct packed_chars) == 4 ? 1 : -1];
 #else
 extern int o1[sizeof(struct packed_chars) == 2 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];


Index: clang/test/Sema/struct-packed-align.c
===
--- clang/test/Sema/struct-packed-align.c
+++ clang/test/Sema/struct-packed-align.c
@@ -167,6 +167,9 @@
 // must maintain ABI backwards compatibility.
 extern int o1[sizeof(struct packed_chars) == 3 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];
+#elif defined(_AIX)
+extern int o1[sizeof(struct packed_chars) == 4 ? 1 : -1];
+extern int o2[__alignof(struct packed_chars) == 4 ? 1 : -1];
 #else
 extern int o1[sizeof(struct packed_chars) == 2 ? 1 : -1];
 extern int o2[__alignof(struct packed_chars) == 1 ? 1 : -1];
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[PATCH] D87029: [AIX] Implement AIX special bitfield related alignment rules

[Xiangling Liao via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGe0921655b1ff: [AIX] Implement AIX special bitfield related 
alignment rules (authored by Xiangling_L).

Changed prior to commit:
  https://reviews.llvm.org/D87029?vs=345530=345898#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
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Files:
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/test/Layout/aix-bitfield-alignment.c
  clang/test/Layout/aix-bitfield-alignment.cpp

Index: clang/test/Layout/aix-bitfield-alignment.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-bitfield-alignment.cpp
@@ -0,0 +1,36 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -fxl-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -fxl-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK %s
+
+struct A {
+  bool b : 3;
+};
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct A
+// CHECK-NEXT:  0:0-2 |   _Bool b
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+enum class Bool : bool { False = 0,
+ True = 1 };
+
+struct B {
+  Bool b : 1;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct B
+// CHECK-NEXT:  0:0-0 |   enum Bool b
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+enum LL : unsigned long long { val = 1 };
Index: clang/test/Layout/aix-bitfield-alignment.c
===
--- /dev/null
+++ clang/test/Layout/aix-bitfield-alignment.c
@@ -0,0 +1,234 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -fxl-pragma-pack -x c %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK32 %s
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -fxl-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK32 %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -fxl-pragma-pack -x c %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK64 %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -fxl-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK64 %s
+
+struct A {
+  unsigned char c : 2;
+} A;
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct A
+// CHECK-NEXT:  0:0-1 |   unsigned char c
+// CHECK-NEXT:   sizeof=4, {{(dsize=4, )?}}align=4, preferredalign=4
+
+struct B {
+  char c;
+  int : 0;
+} B;
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct B
+// CHECK-NEXT:  0 |   char c
+// CHECK-NEXT:4:- |   int
+// CHECK-NEXT:   sizeof=4, {{(dsize=4, )?}}align=4, preferredalign=4
+
+struct C {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+} C;
+
+int c = sizeof(C);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK32: 4:0-7 |   unsigned long a7
+// CHECK32:  sizeof=8, {{(dsize=8, )?}}align=4, preferredalign=4
+// CHECK64: 3:1-8 |   unsigned long a7
+// CHECK64:  sizeof=8, {{(dsize=8, )?}}align=8, preferredalign=8
+
+#pragma align(packed)
+struct C1 {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+} C1;
+#pragma align(reset)
+
+int c1 = sizeof(C1);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C1
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK-NEXT:  3:1-8 |   unsigned long a7
+// CHECK-NEXT:   sizeof=5, {{(dsize=5, )?}}align=1, preferredalign=1
+
+#pragma 

[PATCH] D87029: [AIX] Implement AIX special bitfield related alignment rules

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 345530.
Xiangling_L added a comment.

Rebased on the latest master and updated the testcase accordingly;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87029/new/

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Files:
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/test/Layout/aix-bitfield-alignment.c
  clang/test/Layout/aix-bitfield-alignment.cpp

Index: clang/test/Layout/aix-bitfield-alignment.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-bitfield-alignment.cpp
@@ -0,0 +1,36 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -fxl-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK32 %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -fxl-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK64 %s
+
+struct A {
+  bool b : 3;
+};
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct A
+// CHECK-NEXT:  0:0-2 |   _Bool b
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+enum class Bool : bool { False = 0,
+ True = 1 };
+
+struct B {
+  Bool b : 1;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct B
+// CHECK-NEXT:  0:0-0 |   enum Bool b
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+enum LL : unsigned long long { val = 1 };
Index: clang/test/Layout/aix-bitfield-alignment.c
===
--- /dev/null
+++ clang/test/Layout/aix-bitfield-alignment.c
@@ -0,0 +1,234 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -fxl-pragma-pack -x c %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK32 %s
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -fxl-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK32 %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -fxl-pragma-pack -x c %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK64 %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -fxl-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK64 %s
+
+struct A {
+  unsigned char c : 2;
+} A;
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct A
+// CHECK-NEXT:  0:0-1 |   unsigned char c
+// CHECK-NEXT:   sizeof=4, {{(dsize=4, )?}}align=4, preferredalign=4
+
+struct B {
+  char c;
+  int : 0;
+} B;
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct B
+// CHECK-NEXT:  0 |   char c
+// CHECK-NEXT:4:- |   int
+// CHECK-NEXT:   sizeof=4, {{(dsize=4, )?}}align=4, preferredalign=4
+
+struct C {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+} C;
+
+int c = sizeof(C);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK32: 4:0-7 |   unsigned long a7
+// CHECK32:  sizeof=8, {{(dsize=8, )?}}align=4, preferredalign=4
+// CHECK64: 3:1-8 |   unsigned long a7
+// CHECK64:  sizeof=8, {{(dsize=8, )?}}align=8, preferredalign=8
+
+#pragma align(packed)
+struct C1 {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+} C1;
+#pragma align(reset)
+
+int c1 = sizeof(C1);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C1
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK-NEXT:  3:1-8 |   unsigned long a7
+// CHECK-NEXT:   sizeof=5, {{(dsize=5, )?}}align=1, preferredalign=1
+
+#pragma pack(4)
+struct C2 {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+} C2;
+#pragma pack(pop)
+
+int c2 = 

[PATCH] D99291: [AIX] Support init priority attribute

[Xiangling Liao via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Xiangling_L marked an inline comment as done.
Closed by commit rGd5085617986e: [AIX] Support init priority attribute 
(authored by Xiangling_L).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99291/new/

https://reviews.llvm.org/D99291

Files:
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-init-priority-attribute.cpp

Index: clang/test/CodeGen/aix-init-priority-attribute.cpp
===
--- clang/test/CodeGen/aix-init-priority-attribute.cpp
+++ clang/test/CodeGen/aix-init-priority-attribute.cpp
@@ -1,19 +1,72 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s \
-// RUN: 2>&1 | \
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s | \
 // RUN:   FileCheck %s
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s \
-// RUN: 2>&1 | \
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s | \
 // RUN:   FileCheck %s
 
-class test {
-  int a;
-
-public:
-  test(int c) { a = c; }
-  ~test() { a = 0; }
+struct test {
+  test() {}
+  ~test() {}
 };
 
-__attribute__((init_priority(2000)))
-test t(1);
+__attribute__((init_priority(200)))
+test t1;
+__attribute__((init_priority(200)))
+test t2;
+__attribute__((init_priority(300)))
+test t3;
+__attribute__((init_priority(150)))
+test t4;
+test t5;
+
+// CHECK: @llvm.global_ctors = appending global [4 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 150, void ()* @_GLOBAL__I_000150, i8* null }, { i32, void ()*, i8* } { i32 200, void ()* @_GLOBAL__I_000200, i8* null }, { i32, void ()*, i8* } { i32 300, void ()* @_GLOBAL__I_000300, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__sub_I__, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [4 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 150, void ()* @_GLOBAL__a_000150, i8* null }, { i32, void ()*, i8* } { i32 200, void ()* @_GLOBAL__a_000200, i8* null }, { i32, void ()*, i8* } { i32 300, void ()* @_GLOBAL__a_000300, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__D_a, i8* null }]
+
+// CHECK: define internal void @_GLOBAL__I_000150() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init.3()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @_GLOBAL__I_000200() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init()
+// CHECK:   call void @__cxx_global_var_init.1()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @_GLOBAL__I_000300() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init.2()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @_GLOBAL__sub_I__() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init.4()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @_GLOBAL__a_000150() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__finalize_t4()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @_GLOBAL__a_000200() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__finalize_t2()
+// CHECK:   call void @__finalize_t1()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @_GLOBAL__a_000300() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__finalize_t3()
+// CHECK:   ret void
+// CHECK: }
 
-// CHECK: fatal error: error in backend: 'init_priority' attribute is not yet supported on AIX
+// CHECK: define internal void @_GLOBAL__D_a() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__finalize_t5()
+// CHECK:   ret void
+// CHECK: }
Index: clang/lib/Sema/SemaDeclAttr.cpp
===
--- clang/lib/Sema/SemaDeclAttr.cpp
+++ clang/lib/Sema/SemaDeclAttr.cpp
@@ -7926,10 +7926,6 @@
 handleVecTypeHint(S, D, AL);
 break;
   case ParsedAttr::AT_InitPriority:
-if (S.Context.getTargetInfo().getTriple().isOSAIX())
-  llvm::report_fatal_error(
-  "'init_priority' attribute is not yet supported on AIX");
-else
   handleInitPriorityAttr(S, D, AL);
 break;
   case ParsedAttr::AT_Packed:
Index: clang/lib/CodeGen/ItaniumCXXABI.cpp
===
--- clang/lib/CodeGen/ItaniumCXXABI.cpp
+++ clang/lib/CodeGen/ItaniumCXXABI.cpp
@@ -4728,16 +4728,17 @@
 
   CGF.FinishFunction();
 
-  assert(!D.getAttr() &&
- "Prioritized sinit and sterm functions are not yet supported.");
-
-  if (isTemplateInstantiation(D.getTemplateSpecializationKind()) ||
-  getContext().GetGVALinkageForVariable() == GVA_DiscardableODR)
+  if (auto *IPA = 

[PATCH] D99291: [AIX] Support init priority attribute

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L marked an inline comment as done.
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/CGDeclCXX.cpp:663
 
+  // Create our global prioritized cleanup function.
+  if (!PrioritizedCXXStermFinalizers.empty()) {

jasonliu wrote:
> Just noting that this trunk of code have very similar logic counter part in 
> `EmitCXXGlobalInitFunc`. It seems there is no easy way to common them up 
> given the current way of implementing it. It may require a non-trivial amount 
> of refactoring for us to common up the similar logic between init and 
> cleanup. 
Yes, I thought about this as well but it looks if we'd like to common it up, we 
may need to create some template function.


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[PATCH] D99291: [AIX] Support init priority attribute

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 58.
Xiangling_L marked an inline comment as done.
Xiangling_L added a comment.

Add assertion to make sure we have correct priority value in range;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99291/new/

https://reviews.llvm.org/D99291

Files:
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-init-priority-attribute.cpp

Index: clang/test/CodeGen/aix-init-priority-attribute.cpp
===
--- clang/test/CodeGen/aix-init-priority-attribute.cpp
+++ clang/test/CodeGen/aix-init-priority-attribute.cpp
@@ -1,19 +1,72 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s \
-// RUN: 2>&1 | \
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s | \
 // RUN:   FileCheck %s
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s \
-// RUN: 2>&1 | \
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s | \
 // RUN:   FileCheck %s
 
-class test {
-  int a;
-
-public:
-  test(int c) { a = c; }
-  ~test() { a = 0; }
+struct test {
+  test() {}
+  ~test() {}
 };
 
-__attribute__((init_priority(2000)))
-test t(1);
+__attribute__((init_priority(200)))
+test t1;
+__attribute__((init_priority(200)))
+test t2;
+__attribute__((init_priority(300)))
+test t3;
+__attribute__((init_priority(150)))
+test t4;
+test t5;
+
+// CHECK: @llvm.global_ctors = appending global [4 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 150, void ()* @_GLOBAL__I_000150, i8* null }, { i32, void ()*, i8* } { i32 200, void ()* @_GLOBAL__I_000200, i8* null }, { i32, void ()*, i8* } { i32 300, void ()* @_GLOBAL__I_000300, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__sub_I__, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [4 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 150, void ()* @_GLOBAL__a_000150, i8* null }, { i32, void ()*, i8* } { i32 200, void ()* @_GLOBAL__a_000200, i8* null }, { i32, void ()*, i8* } { i32 300, void ()* @_GLOBAL__a_000300, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__D_a, i8* null }]
+
+// CHECK: define internal void @_GLOBAL__I_000150() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init.3()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @_GLOBAL__I_000200() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init()
+// CHECK:   call void @__cxx_global_var_init.1()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @_GLOBAL__I_000300() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init.2()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @_GLOBAL__sub_I__() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init.4()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @_GLOBAL__a_000150() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__finalize_t4()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @_GLOBAL__a_000200() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__finalize_t2()
+// CHECK:   call void @__finalize_t1()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @_GLOBAL__a_000300() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__finalize_t3()
+// CHECK:   ret void
+// CHECK: }
 
-// CHECK: fatal error: error in backend: 'init_priority' attribute is not yet supported on AIX
+// CHECK: define internal void @_GLOBAL__D_a() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__finalize_t5()
+// CHECK:   ret void
+// CHECK: }
Index: clang/lib/Sema/SemaDeclAttr.cpp
===
--- clang/lib/Sema/SemaDeclAttr.cpp
+++ clang/lib/Sema/SemaDeclAttr.cpp
@@ -8058,10 +8058,6 @@
 handleVecTypeHint(S, D, AL);
 break;
   case ParsedAttr::AT_InitPriority:
-if (S.Context.getTargetInfo().getTriple().isOSAIX())
-  llvm::report_fatal_error(
-  "'init_priority' attribute is not yet supported on AIX");
-else
   handleInitPriorityAttr(S, D, AL);
 break;
   case ParsedAttr::AT_Packed:
Index: clang/lib/CodeGen/ItaniumCXXABI.cpp
===
--- clang/lib/CodeGen/ItaniumCXXABI.cpp
+++ clang/lib/CodeGen/ItaniumCXXABI.cpp
@@ -4728,16 +4728,17 @@
 
   CGF.FinishFunction();
 
-  assert(!D.getAttr() &&
- "Prioritized sinit and sterm functions are not yet supported.");
-
-  if (isTemplateInstantiation(D.getTemplateSpecializationKind()) ||
-  getContext().GetGVALinkageForVariable() == GVA_DiscardableODR)
+  if (auto *IPA = D.getAttr()) {
+

[PATCH] D99291: [AIX] Support init priority attribute

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L created this revision.
Xiangling_L added reviewers: jasonliu, hubert.reinterpretcast, ZarkoCA, xingxue.
Herald added a reviewer: aaron.ballman.
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Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D99291

Files:
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-init-priority-attribute.cpp

Index: clang/test/CodeGen/aix-init-priority-attribute.cpp
===
--- clang/test/CodeGen/aix-init-priority-attribute.cpp
+++ clang/test/CodeGen/aix-init-priority-attribute.cpp
@@ -1,19 +1,72 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s \
-// RUN: 2>&1 | \
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s | \
 // RUN:   FileCheck %s
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s \
-// RUN: 2>&1 | \
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s | \
 // RUN:   FileCheck %s
 
-class test {
-  int a;
-
-public:
-  test(int c) { a = c; }
-  ~test() { a = 0; }
+struct test {
+  test() {}
+  ~test() {}
 };
 
-__attribute__((init_priority(2000)))
-test t(1);
+__attribute__((init_priority(200)))
+test t1;
+__attribute__((init_priority(200)))
+test t2;
+__attribute__((init_priority(300)))
+test t3;
+__attribute__((init_priority(150)))
+test t4;
+test t5;
+
+// CHECK: @llvm.global_ctors = appending global [4 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 150, void ()* @_GLOBAL__I_000150, i8* null }, { i32, void ()*, i8* } { i32 200, void ()* @_GLOBAL__I_000200, i8* null }, { i32, void ()*, i8* } { i32 300, void ()* @_GLOBAL__I_000300, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__sub_I__, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [4 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 150, void ()* @_GLOBAL__a_000150, i8* null }, { i32, void ()*, i8* } { i32 200, void ()* @_GLOBAL__a_000200, i8* null }, { i32, void ()*, i8* } { i32 300, void ()* @_GLOBAL__a_000300, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__D_a, i8* null }]
+
+// CHECK: define internal void @_GLOBAL__I_000150() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init.3()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @_GLOBAL__I_000200() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init()
+// CHECK:   call void @__cxx_global_var_init.1()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @_GLOBAL__I_000300() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init.2()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @_GLOBAL__sub_I__() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init.4()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @_GLOBAL__a_000150() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__finalize_t4()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @_GLOBAL__a_000200() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__finalize_t2()
+// CHECK:   call void @__finalize_t1()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @_GLOBAL__a_000300() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__finalize_t3()
+// CHECK:   ret void
+// CHECK: }
 
-// CHECK: fatal error: error in backend: 'init_priority' attribute is not yet supported on AIX
+// CHECK: define internal void @_GLOBAL__D_a() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @__finalize_t5()
+// CHECK:   ret void
+// CHECK: }
Index: clang/lib/Sema/SemaDeclAttr.cpp
===
--- clang/lib/Sema/SemaDeclAttr.cpp
+++ clang/lib/Sema/SemaDeclAttr.cpp
@@ -8058,10 +8058,6 @@
 handleVecTypeHint(S, D, AL);
 break;
   case ParsedAttr::AT_InitPriority:
-if (S.Context.getTargetInfo().getTriple().isOSAIX())
-  llvm::report_fatal_error(
-  "'init_priority' attribute is not yet supported on AIX");
-else
   handleInitPriorityAttr(S, D, AL);
 break;
   case ParsedAttr::AT_Packed:
Index: clang/lib/CodeGen/ItaniumCXXABI.cpp
===
--- clang/lib/CodeGen/ItaniumCXXABI.cpp
+++ clang/lib/CodeGen/ItaniumCXXABI.cpp
@@ -4728,16 +4728,17 @@
 
   CGF.FinishFunction();
 
-  assert(!D.getAttr() &&
- "Prioritized sinit and sterm functions are not yet supported.");
-
-  if (isTemplateInstantiation(D.getTemplateSpecializationKind()) ||
-  getContext().GetGVALinkageForVariable() == GVA_DiscardableODR)
+  if (auto *IPA = 

[PATCH] D98552: [NFC] Adjust SmallVector.h header to workaround XL build compiler issue

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 330415.
Xiangling_L added a comment.

Bring back two forward declarations to avoid changing pervasive `SmallVector` 
to `llvm::SmallVector`


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Files:
  clang/include/clang/Basic/LLVM.h
  clang/lib/CodeGen/CGStmtOpenMP.cpp
  clang/lib/Frontend/CompilerInvocation.cpp


Index: clang/lib/Frontend/CompilerInvocation.cpp
===
--- clang/lib/Frontend/CompilerInvocation.cpp
+++ clang/lib/Frontend/CompilerInvocation.cpp
@@ -663,7 +663,7 @@
   // Generate arguments from the dummy invocation. If Generate is the
   // inverse of Parse, the newly generated arguments must have the same
   // semantics as the original.
-  SmallVector GeneratedArgs1;
+  SmallVector GeneratedArgs1;
   Generate(DummyInvocation, GeneratedArgs1, SA);
 
   // Run the second parse, now on the generated arguments, and with the real
@@ -683,7 +683,7 @@
 
   // Generate arguments again, this time from the options we will end up using
   // for the rest of the compilation.
-  SmallVector GeneratedArgs2;
+  SmallVector GeneratedArgs2;
   Generate(RealInvocation, GeneratedArgs2, SA);
 
   // Compares two lists of generated arguments.
Index: clang/lib/CodeGen/CGStmtOpenMP.cpp
===
--- clang/lib/CodeGen/CGStmtOpenMP.cpp
+++ clang/lib/CodeGen/CGStmtOpenMP.cpp
@@ -1913,7 +1913,7 @@
 emitCapturedStmtCall(CodeGenFunction , EmittedClosureTy Cap,
  llvm::ArrayRef Args) {
   // Append the closure context to the argument.
-  llvm::SmallVector EffectiveArgs;
+  SmallVector EffectiveArgs;
   EffectiveArgs.reserve(Args.size() + 1);
   llvm::append_range(EffectiveArgs, Args);
   EffectiveArgs.push_back(Cap.second);
Index: clang/include/clang/Basic/LLVM.h
===
--- clang/include/clang/Basic/LLVM.h
+++ clang/include/clang/Basic/LLVM.h
@@ -22,6 +22,9 @@
 // None.h includes an enumerator that is desired & cannot be forward declared
 // without a definition of NoneType.
 #include "llvm/ADT/None.h"
+// Add this header as a workaround to prevent `too few template arguments for
+// class template 'SmallVector'` building error with build compilers like XL.
+#include "llvm/ADT/SmallVector.h"
 
 namespace llvm {
   // ADT's.


Index: clang/lib/Frontend/CompilerInvocation.cpp
===
--- clang/lib/Frontend/CompilerInvocation.cpp
+++ clang/lib/Frontend/CompilerInvocation.cpp
@@ -663,7 +663,7 @@
   // Generate arguments from the dummy invocation. If Generate is the
   // inverse of Parse, the newly generated arguments must have the same
   // semantics as the original.
-  SmallVector GeneratedArgs1;
+  SmallVector GeneratedArgs1;
   Generate(DummyInvocation, GeneratedArgs1, SA);
 
   // Run the second parse, now on the generated arguments, and with the real
@@ -683,7 +683,7 @@
 
   // Generate arguments again, this time from the options we will end up using
   // for the rest of the compilation.
-  SmallVector GeneratedArgs2;
+  SmallVector GeneratedArgs2;
   Generate(RealInvocation, GeneratedArgs2, SA);
 
   // Compares two lists of generated arguments.
Index: clang/lib/CodeGen/CGStmtOpenMP.cpp
===
--- clang/lib/CodeGen/CGStmtOpenMP.cpp
+++ clang/lib/CodeGen/CGStmtOpenMP.cpp
@@ -1913,7 +1913,7 @@
 emitCapturedStmtCall(CodeGenFunction , EmittedClosureTy Cap,
  llvm::ArrayRef Args) {
   // Append the closure context to the argument.
-  llvm::SmallVector EffectiveArgs;
+  SmallVector EffectiveArgs;
   EffectiveArgs.reserve(Args.size() + 1);
   llvm::append_range(EffectiveArgs, Args);
   EffectiveArgs.push_back(Cap.second);
Index: clang/include/clang/Basic/LLVM.h
===
--- clang/include/clang/Basic/LLVM.h
+++ clang/include/clang/Basic/LLVM.h
@@ -22,6 +22,9 @@
 // None.h includes an enumerator that is desired & cannot be forward declared
 // without a definition of NoneType.
 #include "llvm/ADT/None.h"
+// Add this header as a workaround to prevent `too few template arguments for
+// class template 'SmallVector'` building error with build compilers like XL.
+#include "llvm/ADT/SmallVector.h"
 
 namespace llvm {
   // ADT's.
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[PATCH] D98552: [NFC] Adjust SmallVector.h header to workaround XL build compiler issue

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added inline comments.



Comment at: clang/include/clang/Basic/LLVM.h:71
   using llvm::SmallString;
-  using llvm::SmallVector;
-  using llvm::SmallVectorImpl;

It's my bad to not wait for a build finished before updating the patch, I saw a 
lot of build failures as the following that seems related to the deletion here:
```
/data/xling/wyvern/master-external/llvm-project/clang/include/clang/Basic/Module.h:222:3:
 error: no template named 'SmallVector'; did you mean 'llvm::SmallVector'?
  SmallVector UnresolvedHeaders;
  ^~~
  llvm::SmallVector
/data/xling/wyvern/master-external/llvm-project/clang/include/clang/Basic/LLVM.h:38:42:
 note: 'llvm::SmallVector' declared here
  template class SmallVector;
 ^
```
I will update the patch accordingly after I have a successful build and run the 
test.


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[PATCH] D98552: [NFC] Adjust SmallVector.h header to workaround XL build compiler issue

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 330369.
Xiangling_L marked 2 inline comments as done.
Xiangling_L added a comment.
Herald added a subscriber: jansvoboda11.

Addressed the comments;


Repository:
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Files:
  clang/include/clang/Basic/LLVM.h
  clang/lib/CodeGen/CGStmtOpenMP.cpp
  clang/lib/Frontend/CompilerInvocation.cpp


Index: clang/lib/Frontend/CompilerInvocation.cpp
===
--- clang/lib/Frontend/CompilerInvocation.cpp
+++ clang/lib/Frontend/CompilerInvocation.cpp
@@ -663,7 +663,7 @@
   // Generate arguments from the dummy invocation. If Generate is the
   // inverse of Parse, the newly generated arguments must have the same
   // semantics as the original.
-  SmallVector GeneratedArgs1;
+  SmallVector GeneratedArgs1;
   Generate(DummyInvocation, GeneratedArgs1, SA);
 
   // Run the second parse, now on the generated arguments, and with the real
@@ -683,7 +683,7 @@
 
   // Generate arguments again, this time from the options we will end up using
   // for the rest of the compilation.
-  SmallVector GeneratedArgs2;
+  SmallVector GeneratedArgs2;
   Generate(RealInvocation, GeneratedArgs2, SA);
 
   // Compares two lists of generated arguments.
Index: clang/lib/CodeGen/CGStmtOpenMP.cpp
===
--- clang/lib/CodeGen/CGStmtOpenMP.cpp
+++ clang/lib/CodeGen/CGStmtOpenMP.cpp
@@ -1913,7 +1913,7 @@
 emitCapturedStmtCall(CodeGenFunction , EmittedClosureTy Cap,
  llvm::ArrayRef Args) {
   // Append the closure context to the argument.
-  llvm::SmallVector EffectiveArgs;
+  SmallVector EffectiveArgs;
   EffectiveArgs.reserve(Args.size() + 1);
   llvm::append_range(EffectiveArgs, Args);
   EffectiveArgs.push_back(Cap.second);
Index: clang/include/clang/Basic/LLVM.h
===
--- clang/include/clang/Basic/LLVM.h
+++ clang/include/clang/Basic/LLVM.h
@@ -22,6 +22,9 @@
 // None.h includes an enumerator that is desired & cannot be forward declared
 // without a definition of NoneType.
 #include "llvm/ADT/None.h"
+// Add this header as a workaround to prevent `too few template arguments for
+// class template 'SmallVector'` building error with build compilers like XL.
+#include "llvm/ADT/SmallVector.h"
 
 namespace llvm {
   // ADT's.
@@ -68,8 +71,6 @@
   using llvm::OwningArrayRef;
   using llvm::SaveAndRestore;
   using llvm::SmallString;
-  using llvm::SmallVector;
-  using llvm::SmallVectorImpl;
   using llvm::StringRef;
   using llvm::Twine;
   using llvm::VersionTuple;


Index: clang/lib/Frontend/CompilerInvocation.cpp
===
--- clang/lib/Frontend/CompilerInvocation.cpp
+++ clang/lib/Frontend/CompilerInvocation.cpp
@@ -663,7 +663,7 @@
   // Generate arguments from the dummy invocation. If Generate is the
   // inverse of Parse, the newly generated arguments must have the same
   // semantics as the original.
-  SmallVector GeneratedArgs1;
+  SmallVector GeneratedArgs1;
   Generate(DummyInvocation, GeneratedArgs1, SA);
 
   // Run the second parse, now on the generated arguments, and with the real
@@ -683,7 +683,7 @@
 
   // Generate arguments again, this time from the options we will end up using
   // for the rest of the compilation.
-  SmallVector GeneratedArgs2;
+  SmallVector GeneratedArgs2;
   Generate(RealInvocation, GeneratedArgs2, SA);
 
   // Compares two lists of generated arguments.
Index: clang/lib/CodeGen/CGStmtOpenMP.cpp
===
--- clang/lib/CodeGen/CGStmtOpenMP.cpp
+++ clang/lib/CodeGen/CGStmtOpenMP.cpp
@@ -1913,7 +1913,7 @@
 emitCapturedStmtCall(CodeGenFunction , EmittedClosureTy Cap,
  llvm::ArrayRef Args) {
   // Append the closure context to the argument.
-  llvm::SmallVector EffectiveArgs;
+  SmallVector EffectiveArgs;
   EffectiveArgs.reserve(Args.size() + 1);
   llvm::append_range(EffectiveArgs, Args);
   EffectiveArgs.push_back(Cap.second);
Index: clang/include/clang/Basic/LLVM.h
===
--- clang/include/clang/Basic/LLVM.h
+++ clang/include/clang/Basic/LLVM.h
@@ -22,6 +22,9 @@
 // None.h includes an enumerator that is desired & cannot be forward declared
 // without a definition of NoneType.
 #include "llvm/ADT/None.h"
+// Add this header as a workaround to prevent `too few template arguments for
+// class template 'SmallVector'` building error with build compilers like XL.
+#include "llvm/ADT/SmallVector.h"
 
 namespace llvm {
   // ADT's.
@@ -68,8 +71,6 @@
   using llvm::OwningArrayRef;
   using llvm::SaveAndRestore;
   using llvm::SmallString;
-  using llvm::SmallVector;
-  using llvm::SmallVectorImpl;
   using llvm::StringRef;
   using llvm::Twine;
   using 

[PATCH] D98552: [NFC] Adjust SmallVector.h header to workaround XL build compiler issue

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L marked 2 inline comments as done.
Xiangling_L added inline comments.



Comment at: clang/include/clang/Basic/LLVM.h:25
 #include "llvm/ADT/None.h"
+// Add this header as a workaround to unblock the XL build compiler issue.
+#include "llvm/ADT/SmallVector.h"

RKSimon wrote:
> Is there a better comment? "unblock the XL build compiler issue" isn't going 
> to mean much to someone in the future
How about "Add this header as a workaround to prevent "too few template 
arguments for class template 'SmallVector' ""? Or do you have any suggestion?



Comment at: clang/include/clang/Basic/LLVM.h:38
   template class SmallVector;
   template class SmallVectorImpl;
   template class Optional;

RKSimon wrote:
> Should these 2 forward declarations be removed?
Thanks. will do.


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[PATCH] D98552: [NFC] Adjust SmallVector.h header to workaround XL build compiler issue

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added a comment.

In D98552#2623399 , @jsji wrote:

> If we use this workaround, can we also revert 
> 561fb7f60ab631e712c3fb6bbeb47061222c6818 
>  and 
> 8dc70bdcd0fe4efb65876dce0144d9c3386a2f07 
>  in this 
> patch?

Good idea. Will do


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[PATCH] D98552: [NFC] Adjust SmallVector.h header to workaround XL build compiler issue

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L created this revision.
Xiangling_L added reviewers: rzurob, hubert.reinterpretcast, jsji, lei, 
cebowleratibm.
Herald added a subscriber: dexonsmith.
Xiangling_L requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Previously we delivered a patch to workaround the building issue related to 
SmallVector here:
https://reviews.llvm.org/D98265.

But in order to prevent further building issues related to the usage of it in 
other compilation unit, this patch adjusts the `llvm.h` header as a workaround 
instead.

We will further investigate the real problem of build compiler as a follow-up.


Repository:
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Files:
  clang/include/clang/Basic/LLVM.h


Index: clang/include/clang/Basic/LLVM.h
===
--- clang/include/clang/Basic/LLVM.h
+++ clang/include/clang/Basic/LLVM.h
@@ -22,6 +22,8 @@
 // None.h includes an enumerator that is desired & cannot be forward declared
 // without a definition of NoneType.
 #include "llvm/ADT/None.h"
+// Add this header as a workaround to unblock the XL build compiler issue.
+#include "llvm/ADT/SmallVector.h"
 
 namespace llvm {
   // ADT's.


Index: clang/include/clang/Basic/LLVM.h
===
--- clang/include/clang/Basic/LLVM.h
+++ clang/include/clang/Basic/LLVM.h
@@ -22,6 +22,8 @@
 // None.h includes an enumerator that is desired & cannot be forward declared
 // without a definition of NoneType.
 #include "llvm/ADT/None.h"
+// Add this header as a workaround to unblock the XL build compiler issue.
+#include "llvm/ADT/SmallVector.h"
 
 namespace llvm {
   // ADT's.
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[PATCH] D98265: [NFC] Use llvm::SmallVector to workaround XL compiler problem on AIX

[Xiangling Liao via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG561fb7f60ab6: [NFC] Use llvm::SmallVector to workaround XL 
compiler problem on AIX (authored by Xiangling_L).

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Files:
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Index: clang/lib/CodeGen/CGStmtOpenMP.cpp
===
--- clang/lib/CodeGen/CGStmtOpenMP.cpp
+++ clang/lib/CodeGen/CGStmtOpenMP.cpp
@@ -1913,7 +1913,7 @@
 emitCapturedStmtCall(CodeGenFunction , EmittedClosureTy Cap,
  llvm::ArrayRef Args) {
   // Append the closure context to the argument.
-  SmallVector EffectiveArgs;
+  llvm::SmallVector EffectiveArgs;
   EffectiveArgs.reserve(Args.size() + 1);
   llvm::append_range(EffectiveArgs, Args);
   EffectiveArgs.push_back(Cap.second);


Index: clang/lib/CodeGen/CGStmtOpenMP.cpp
===
--- clang/lib/CodeGen/CGStmtOpenMP.cpp
+++ clang/lib/CodeGen/CGStmtOpenMP.cpp
@@ -1913,7 +1913,7 @@
 emitCapturedStmtCall(CodeGenFunction , EmittedClosureTy Cap,
  llvm::ArrayRef Args) {
   // Append the closure context to the argument.
-  SmallVector EffectiveArgs;
+  llvm::SmallVector EffectiveArgs;
   EffectiveArgs.reserve(Args.size() + 1);
   llvm::append_range(EffectiveArgs, Args);
   EffectiveArgs.push_back(Cap.second);
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[PATCH] D98265: [NFC] Use llvm::SmallVector to workaround XL compiler problem on AIX

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added a comment.

In D98265#2614245 , @craig.topper 
wrote:

> Maybe this needs to be addressed in the forward declaration in 
> clang/include/clang/Basic/LLVM.h ?

Yeah, adding an additional llvm namespace is a certain another way to 
workaround this issue. But I think the fix we apply is also a quick way to 
workaround the build issue.  And as I mentioned, we would expect a real fix in 
a later patch.


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[PATCH] D98265: [NFC] Use llvm::SmallVector to workaround XL compiler problem on AIX

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Xiangling_L created this revision.
Xiangling_L added reviewers: daltenty, hubert.reinterpretcast, cebowleratibm, 
jsji, Whitney.
Xiangling_L requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

LLVM is recommending to use SmallVector (that is, omitting the N), in the 
absence of a well-motivated choice for the number of inlined elements N.

However, this doesn't work well with XL compiler on AIX since some header(s) 
aren't properly picked up with it. We need to take a further look into the real 
issue underneath and fix it in a later patch.

But currently we'd like to use this patch to unblock the build compiler issue 
first.

Note:
The first build failure was spot here: 
http://lab.llvm.org:8014/#/builders/126/builds/71


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D98265

Files:
  clang/lib/CodeGen/CGStmtOpenMP.cpp


Index: clang/lib/CodeGen/CGStmtOpenMP.cpp
===
--- clang/lib/CodeGen/CGStmtOpenMP.cpp
+++ clang/lib/CodeGen/CGStmtOpenMP.cpp
@@ -1913,7 +1913,7 @@
 emitCapturedStmtCall(CodeGenFunction , EmittedClosureTy Cap,
  llvm::ArrayRef Args) {
   // Append the closure context to the argument.
-  SmallVector EffectiveArgs;
+  llvm::SmallVector EffectiveArgs;
   EffectiveArgs.reserve(Args.size() + 1);
   llvm::append_range(EffectiveArgs, Args);
   EffectiveArgs.push_back(Cap.second);


Index: clang/lib/CodeGen/CGStmtOpenMP.cpp
===
--- clang/lib/CodeGen/CGStmtOpenMP.cpp
+++ clang/lib/CodeGen/CGStmtOpenMP.cpp
@@ -1913,7 +1913,7 @@
 emitCapturedStmtCall(CodeGenFunction , EmittedClosureTy Cap,
  llvm::ArrayRef Args) {
   // Append the closure context to the argument.
-  SmallVector EffectiveArgs;
+  llvm::SmallVector EffectiveArgs;
   EffectiveArgs.reserve(Args.size() + 1);
   llvm::append_range(EffectiveArgs, Args);
   EffectiveArgs.push_back(Cap.second);
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[PATCH] D87029: [AIX] Implement AIX special bitfield related alignment rules

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added a comment.

ping.


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[PATCH] D95822: [FE] Manipulate the first byte of guard variable type in both load and store operation

[Xiangling Liao via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG6b1e2fc89327: [FE] Manipulate the first byte of guard 
variable type in both load and store… (authored by Xiangling_L).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
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Files:
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
  clang/test/CodeGenCXX/aix-static-init.cpp
  clang/test/CodeGenCXX/cxx11-thread-local.cpp
  clang/test/CodeGenCXX/global-init.cpp
  clang/test/CodeGenCXX/static-data-member.cpp

Index: clang/test/CodeGenCXX/static-data-member.cpp
===
--- clang/test/CodeGenCXX/static-data-member.cpp
+++ clang/test/CodeGenCXX/static-data-member.cpp
@@ -72,7 +72,7 @@
   // CHECK-NEXT: br i1 [[UNINITIALIZED]]
   // CHECK:  [[TMP:%.*]] = call i32 @_ZN5test33fooEv()
   // CHECK-NEXT: store i32 [[TMP]], i32* @_ZN5test31AIiE1xE, align 4
-  // CHECK-NEXT: store i64 1, i64* @_ZGVN5test31AIiE1xE
+  // CHECK-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN5test31AIiE1xE to i8*)
   // CHECK-NEXT: br label
   // CHECK:  ret void
 }
Index: clang/test/CodeGenCXX/global-init.cpp
===
--- clang/test/CodeGenCXX/global-init.cpp
+++ clang/test/CodeGenCXX/global-init.cpp
@@ -78,10 +78,10 @@
   extern int foo();
 
   // This needs an initialization function and guard variables.
-  // CHECK: load i8, i8* bitcast (i64* @_ZGVN5test41xE
+  // CHECK: load i8, i8* bitcast (i64* @_ZGVN5test41xE to i8*)
   // CHECK: [[CALL:%.*]] = call i32 @_ZN5test43fooEv
   // CHECK-NEXT: store i32 [[CALL]], i32* @_ZN5test41xE
-  // CHECK-NEXT: store i64 1, i64* @_ZGVN5test41xE
+  // CHECK-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN5test41xE to i8*)
   __attribute__((weak)) int x = foo();
 }
 
Index: clang/test/CodeGenCXX/cxx11-thread-local.cpp
===
--- clang/test/CodeGenCXX/cxx11-thread-local.cpp
+++ clang/test/CodeGenCXX/cxx11-thread-local.cpp
@@ -184,7 +184,7 @@
 // need init:
 // CHECK: call i32 @_Z1gv()
 // CHECK: store i32 %{{.*}}, i32* @_ZN1VIfE1mE, align 4
-// CHECK: store i64 1, i64* @_ZGVN1VIfE1mE
+// CHECK: store i8 1, i8* bitcast (i64* @_ZGVN1VIfE1mE to i8*)
 // CHECK: br label
 
 // LINUX: define internal void @[[XF_M_INIT]]()
@@ -197,7 +197,7 @@
 // need init:
 // LINUX: call {{.*}}__cxa_thread_atexit
 // DARWIN: call {{.*}}_tlv_atexit
-// CHECK: store i64 1, i64* @_ZGVN1XIfE1mE
+// CHECK: store i8 1, i8* bitcast (i64* @_ZGVN1XIfE1mE to i8*)
 // CHECK: br label
 
 // LINUX: declare i32 @__cxa_thread_atexit(void (i8*)*, i8*, i8*)
@@ -285,7 +285,7 @@
 // need init:
 // CHECK: call i32 @_Z1gv()
 // CHECK: store i32 %{{.*}}, i32* @_ZN1VIiE1mE, align 4
-// CHECK: store i64 1, i64* @_ZGVN1VIiE1mE
+// CHECK: store i8 1, i8* bitcast (i64* @_ZGVN1VIiE1mE to i8*)
 // CHECK: br label
 
 // LINUX: define internal void @[[X_M_INIT]]()
@@ -298,7 +298,7 @@
 // need init:
 // LINUX: call {{.*}}__cxa_thread_atexit
 // DARWIN: call {{.*}}_tlv_atexit
-// CHECK: store i64 1, i64* @_ZGVN1XIiE1mE
+// CHECK: store i8 1, i8* bitcast (i64* @_ZGVN1XIiE1mE to i8*)
 // CHECK: br label
 
 // CHECK: define {{.*}}@[[GLOBAL_INIT:.*]]()
Index: clang/test/CodeGenCXX/aix-static-init.cpp
===
--- clang/test/CodeGenCXX/aix-static-init.cpp
+++ clang/test/CodeGenCXX/aix-static-init.cpp
@@ -38,6 +38,7 @@
   }
 } // namespace test4
 
+// CHECK: @_ZGVZN5test41fEvE11staticLocal = internal global i64 0, align 8
 // CHECK: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__sub_I__, i8* null }]
 // CHECK: @llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__D_a, i8* null }]
 
@@ -135,7 +136,7 @@
 
 // CHECK: define void @_ZN5test41fEv() [[ATTR:#[0-9]+]] {
 // CHECK: entry:
-// CHECK:   %0 = load atomic i8, i8* bitcast (i64* @_ZGVZN5test41fEvE11staticLocal to i8*) acquire
+// CHECK:   %0 = load atomic i8, i8* bitcast (i64* @_ZGVZN5test41fEvE11staticLocal to i8*) acquire, align 8
 // CHECK:   %guard.uninitialized = icmp eq i8 %0, 0
 // CHECK:   br i1 %guard.uninitialized, label %init.check, label %init.end
 
Index: clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
===
--- clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
+++ clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
@@ -44,6 +44,9 @@
 A A::instance = bar();
 } // namespace test2
 
+// CHECK: @_ZGVN5test12t2E = linkonce_odr global i64 0, align 8
+// CHECK: @_ZGVN5test21AIvE8instanceE = weak_odr global i64 0, align 8
+// CHECK: @_ZGVN5test12t1IiEE = linkonce_odr global i64 0, align 8
 

[PATCH] D95822: [FE] Manipulate the first byte of guard variable type in both load and store operation

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added inline comments.



Comment at: clang/test/CodeGenCXX/global-init.cpp:84
   // CHECK-NEXT: store i32 [[CALL]], i32* @_ZN5test41xE
-  // CHECK-NEXT: store i64 1, i64* @_ZGVN5test41xE
+  // CHECK-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN5test41xE to i8*)
   __attribute__((weak)) int x = foo();

hubert.reinterpretcast wrote:
> Xiangling_L wrote:
> > abhina.sreeskantharajan wrote:
> > > nit: the lines above omit the end of the line. It's probably better to be 
> > > consistent
> > > 
> > > 
> > It didn't omit the end of the line. It is because before my patch, there 
> > was no casting.
> Hi @Xiangling_L, I think Abhina meant the lines above in this file. The 
> `load` has a `bitcast` too (and stops after the guard variable name).
I see. Sorry for the misunderstanding. @abhina.sreeskantharajan 


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[PATCH] D95822: [FE] Manipulate the first byte of guard variable type in both load and store operation

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 320881.
Xiangling_L marked an inline comment as done.
Xiangling_L added a comment.

Addressed the comments related to test formatting;


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Files:
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
  clang/test/CodeGenCXX/aix-static-init.cpp
  clang/test/CodeGenCXX/cxx11-thread-local.cpp
  clang/test/CodeGenCXX/global-init.cpp
  clang/test/CodeGenCXX/static-data-member.cpp

Index: clang/test/CodeGenCXX/static-data-member.cpp
===
--- clang/test/CodeGenCXX/static-data-member.cpp
+++ clang/test/CodeGenCXX/static-data-member.cpp
@@ -72,7 +72,7 @@
   // CHECK-NEXT: br i1 [[UNINITIALIZED]]
   // CHECK:  [[TMP:%.*]] = call i32 @_ZN5test33fooEv()
   // CHECK-NEXT: store i32 [[TMP]], i32* @_ZN5test31AIiE1xE, align 4
-  // CHECK-NEXT: store i64 1, i64* @_ZGVN5test31AIiE1xE
+  // CHECK-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN5test31AIiE1xE to i8*)
   // CHECK-NEXT: br label
   // CHECK:  ret void
 }
Index: clang/test/CodeGenCXX/global-init.cpp
===
--- clang/test/CodeGenCXX/global-init.cpp
+++ clang/test/CodeGenCXX/global-init.cpp
@@ -78,10 +78,10 @@
   extern int foo();
 
   // This needs an initialization function and guard variables.
-  // CHECK: load i8, i8* bitcast (i64* @_ZGVN5test41xE
+  // CHECK: load i8, i8* bitcast (i64* @_ZGVN5test41xE to i8*)
   // CHECK: [[CALL:%.*]] = call i32 @_ZN5test43fooEv
   // CHECK-NEXT: store i32 [[CALL]], i32* @_ZN5test41xE
-  // CHECK-NEXT: store i64 1, i64* @_ZGVN5test41xE
+  // CHECK-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN5test41xE to i8*)
   __attribute__((weak)) int x = foo();
 }
 
Index: clang/test/CodeGenCXX/cxx11-thread-local.cpp
===
--- clang/test/CodeGenCXX/cxx11-thread-local.cpp
+++ clang/test/CodeGenCXX/cxx11-thread-local.cpp
@@ -184,7 +184,7 @@
 // need init:
 // CHECK: call i32 @_Z1gv()
 // CHECK: store i32 %{{.*}}, i32* @_ZN1VIfE1mE, align 4
-// CHECK: store i64 1, i64* @_ZGVN1VIfE1mE
+// CHECK: store i8 1, i8* bitcast (i64* @_ZGVN1VIfE1mE to i8*)
 // CHECK: br label
 
 // LINUX: define internal void @[[XF_M_INIT]]()
@@ -197,7 +197,7 @@
 // need init:
 // LINUX: call {{.*}}__cxa_thread_atexit
 // DARWIN: call {{.*}}_tlv_atexit
-// CHECK: store i64 1, i64* @_ZGVN1XIfE1mE
+// CHECK: store i8 1, i8* bitcast (i64* @_ZGVN1XIfE1mE to i8*)
 // CHECK: br label
 
 // LINUX: declare i32 @__cxa_thread_atexit(void (i8*)*, i8*, i8*)
@@ -285,7 +285,7 @@
 // need init:
 // CHECK: call i32 @_Z1gv()
 // CHECK: store i32 %{{.*}}, i32* @_ZN1VIiE1mE, align 4
-// CHECK: store i64 1, i64* @_ZGVN1VIiE1mE
+// CHECK: store i8 1, i8* bitcast (i64* @_ZGVN1VIiE1mE to i8*)
 // CHECK: br label
 
 // LINUX: define internal void @[[X_M_INIT]]()
@@ -298,7 +298,7 @@
 // need init:
 // LINUX: call {{.*}}__cxa_thread_atexit
 // DARWIN: call {{.*}}_tlv_atexit
-// CHECK: store i64 1, i64* @_ZGVN1XIiE1mE
+// CHECK: store i8 1, i8* bitcast (i64* @_ZGVN1XIiE1mE to i8*)
 // CHECK: br label
 
 // CHECK: define {{.*}}@[[GLOBAL_INIT:.*]]()
Index: clang/test/CodeGenCXX/aix-static-init.cpp
===
--- clang/test/CodeGenCXX/aix-static-init.cpp
+++ clang/test/CodeGenCXX/aix-static-init.cpp
@@ -38,6 +38,7 @@
   }
 } // namespace test4
 
+// CHECK: @_ZGVZN5test41fEvE11staticLocal = internal global i64 0, align 8
 // CHECK: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__sub_I__, i8* null }]
 // CHECK: @llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__D_a, i8* null }]
 
@@ -135,7 +136,7 @@
 
 // CHECK: define void @_ZN5test41fEv() [[ATTR:#[0-9]+]] {
 // CHECK: entry:
-// CHECK:   %0 = load atomic i8, i8* bitcast (i64* @_ZGVZN5test41fEvE11staticLocal to i8*) acquire
+// CHECK:   %0 = load atomic i8, i8* bitcast (i64* @_ZGVZN5test41fEvE11staticLocal to i8*) acquire, align 8
 // CHECK:   %guard.uninitialized = icmp eq i8 %0, 0
 // CHECK:   br i1 %guard.uninitialized, label %init.check, label %init.end
 
Index: clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
===
--- clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
+++ clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
@@ -44,6 +44,9 @@
 A A::instance = bar();
 } // namespace test2
 
+// CHECK: @_ZGVN5test12t2E = linkonce_odr global i64 0, align 8
+// CHECK: @_ZGVN5test21AIvE8instanceE = weak_odr global i64 0, align 8
+// CHECK: @_ZGVN5test12t1IiEE = linkonce_odr global i64 0, align 8
 // CHECK: @llvm.global_ctors = appending global [4 x { i32, void ()*, i8* 

[PATCH] D95822: [FE] Manipulate the first byte of guard variable type in both load and store operation

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 320879.
Xiangling_L marked 2 inline comments as done.
Xiangling_L added a comment.

Remove redundant file;


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  https://reviews.llvm.org/D95822/new/

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Files:
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
  clang/test/CodeGenCXX/aix-static-init.cpp
  clang/test/CodeGenCXX/cxx11-thread-local.cpp
  clang/test/CodeGenCXX/global-init.cpp
  clang/test/CodeGenCXX/static-data-member.cpp

Index: clang/test/CodeGenCXX/static-data-member.cpp
===
--- clang/test/CodeGenCXX/static-data-member.cpp
+++ clang/test/CodeGenCXX/static-data-member.cpp
@@ -72,7 +72,7 @@
   // CHECK-NEXT: br i1 [[UNINITIALIZED]]
   // CHECK:  [[TMP:%.*]] = call i32 @_ZN5test33fooEv()
   // CHECK-NEXT: store i32 [[TMP]], i32* @_ZN5test31AIiE1xE, align 4
-  // CHECK-NEXT: store i64 1, i64* @_ZGVN5test31AIiE1xE
+  // CHECK-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN5test31AIiE1xE to i8*)
   // CHECK-NEXT: br label
   // CHECK:  ret void
 }
Index: clang/test/CodeGenCXX/global-init.cpp
===
--- clang/test/CodeGenCXX/global-init.cpp
+++ clang/test/CodeGenCXX/global-init.cpp
@@ -81,7 +81,7 @@
   // CHECK: load i8, i8* bitcast (i64* @_ZGVN5test41xE
   // CHECK: [[CALL:%.*]] = call i32 @_ZN5test43fooEv
   // CHECK-NEXT: store i32 [[CALL]], i32* @_ZN5test41xE
-  // CHECK-NEXT: store i64 1, i64* @_ZGVN5test41xE
+  // CHECK-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN5test41xE to i8*)
   __attribute__((weak)) int x = foo();
 }
 
Index: clang/test/CodeGenCXX/cxx11-thread-local.cpp
===
--- clang/test/CodeGenCXX/cxx11-thread-local.cpp
+++ clang/test/CodeGenCXX/cxx11-thread-local.cpp
@@ -184,7 +184,7 @@
 // need init:
 // CHECK: call i32 @_Z1gv()
 // CHECK: store i32 %{{.*}}, i32* @_ZN1VIfE1mE, align 4
-// CHECK: store i64 1, i64* @_ZGVN1VIfE1mE
+// CHECK: store i8 1, i8* bitcast (i64* @_ZGVN1VIfE1mE to i8*)
 // CHECK: br label
 
 // LINUX: define internal void @[[XF_M_INIT]]()
@@ -197,7 +197,7 @@
 // need init:
 // LINUX: call {{.*}}__cxa_thread_atexit
 // DARWIN: call {{.*}}_tlv_atexit
-// CHECK: store i64 1, i64* @_ZGVN1XIfE1mE
+// CHECK: store i8 1, i8* bitcast (i64* @_ZGVN1XIfE1mE to i8*)
 // CHECK: br label
 
 // LINUX: declare i32 @__cxa_thread_atexit(void (i8*)*, i8*, i8*)
@@ -285,7 +285,7 @@
 // need init:
 // CHECK: call i32 @_Z1gv()
 // CHECK: store i32 %{{.*}}, i32* @_ZN1VIiE1mE, align 4
-// CHECK: store i64 1, i64* @_ZGVN1VIiE1mE
+// CHECK: store i8 1, i8* bitcast (i64* @_ZGVN1VIiE1mE to i8*)
 // CHECK: br label
 
 // LINUX: define internal void @[[X_M_INIT]]()
@@ -298,7 +298,7 @@
 // need init:
 // LINUX: call {{.*}}__cxa_thread_atexit
 // DARWIN: call {{.*}}_tlv_atexit
-// CHECK: store i64 1, i64* @_ZGVN1XIiE1mE
+// CHECK: store i8 1, i8* bitcast (i64* @_ZGVN1XIiE1mE to i8*)
 // CHECK: br label
 
 // CHECK: define {{.*}}@[[GLOBAL_INIT:.*]]()
Index: clang/test/CodeGenCXX/aix-static-init.cpp
===
--- clang/test/CodeGenCXX/aix-static-init.cpp
+++ clang/test/CodeGenCXX/aix-static-init.cpp
@@ -38,6 +38,7 @@
   }
 } // namespace test4
 
+// CHECK: @_ZGVZN5test41fEvE11staticLocal = internal global i64 0, align 8
 // CHECK: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__sub_I__, i8* null }]
 // CHECK: @llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__D_a, i8* null }]
 
@@ -135,7 +136,7 @@
 
 // CHECK: define void @_ZN5test41fEv() [[ATTR:#[0-9]+]] {
 // CHECK: entry:
-// CHECK:   %0 = load atomic i8, i8* bitcast (i64* @_ZGVZN5test41fEvE11staticLocal to i8*) acquire
+// CHECK:   %0 = load atomic i8, i8* bitcast (i64* @_ZGVZN5test41fEvE11staticLocal to i8*) acquire, align 8
 // CHECK:   %guard.uninitialized = icmp eq i8 %0, 0
 // CHECK:   br i1 %guard.uninitialized, label %init.check, label %init.end
 
Index: clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
===
--- clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
+++ clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
@@ -44,6 +44,9 @@
 A A::instance = bar();
 } // namespace test2
 
+// CHECK: @_ZGVN5test12t2E = linkonce_odr global i64 0, align 8
+// CHECK: @_ZGVN5test21AIvE8instanceE = weak_odr global i64 0, align 8
+// CHECK: @_ZGVN5test12t1IiEE = linkonce_odr global i64 0, align 8
 // CHECK: @llvm.global_ctors = appending global [4 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__cxx_global_var_init.1, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @__cxx_global_var_init.2, i8* null }, { i32, void 

[PATCH] D95822: [FE] Manipulate the first byte of guard variable type in both load and store operation

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L marked 2 inline comments as done.
Xiangling_L added inline comments.



Comment at: clang/test/CodeGenCXX/global-init.cpp:84
   // CHECK-NEXT: store i32 [[CALL]], i32* @_ZN5test41xE
-  // CHECK-NEXT: store i64 1, i64* @_ZGVN5test41xE
+  // CHECK-NEXT: store i8 1, i8* bitcast (i64* @_ZGVN5test41xE to i8*)
   __attribute__((weak)) int x = foo();

abhina.sreeskantharajan wrote:
> nit: the lines above omit the end of the line. It's probably better to be 
> consistent
> 
> 
It didn't omit the end of the line. It is because before my patch, there was no 
casting.



Comment at: guard.patch:1
+From 9c7d0afec1e634cdeaf3a2ca4273f5da07f6f946 Mon Sep 17 00:00:00 2001
+From: Xiangling Liao 

hubert.reinterpretcast wrote:
> Looks like this file got added by accident.
Thanks!


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[PATCH] D95822: [FE][AIX] Use i8 as guard variable type in both load and store operation

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L marked 2 inline comments as done.
Xiangling_L added inline comments.



Comment at: 
clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp:193
 // CHECK:   %1 = call i32 @atexit(void ()* @__dtor__ZN5test12t1IiEE)
-// CHECK:   store i64 1, i64* @_ZGVN5test12t1IiEE
 // CHECK:   br label %init.end

hubert.reinterpretcast wrote:
> Okay, so the store here is wrong, but it's got nothing to do with AIX.
> 
> The ABI doc (http://itanium-cxx-abi.github.io/cxx-abi/abi.html#once-ctor) 
> says:
> > the first byte (i.e., the byte with lowest address)
> 
> So the bug here seems to be that the Itanium ABI implementation in Clang is 
> incorrect for big-endian systems.
That makes sense to me. I will update the patch accordingly.


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  rG LLVM Github Monorepo

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[PATCH] D95822: [FE][AIX] Use i8 as guard variable type in both load and store operation

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L created this revision.
Xiangling_L added reviewers: hubert.reinterpretcast, jasonliu, 
abhina.sreeskantharajan.
Herald added a subscriber: jfb.
Xiangling_L requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

For static init, use i8 as guard variable type in both load and store 
operation. And this matches XL behavior on AIX.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D95822

Files:
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
  clang/test/CodeGenCXX/aix-static-init.cpp

Index: clang/test/CodeGenCXX/aix-static-init.cpp
===
--- clang/test/CodeGenCXX/aix-static-init.cpp
+++ clang/test/CodeGenCXX/aix-static-init.cpp
@@ -135,19 +135,19 @@
 
 // CHECK: define void @_ZN5test41fEv() [[ATTR:#[0-9]+]] {
 // CHECK: entry:
-// CHECK:   %0 = load atomic i8, i8* bitcast (i64* @_ZGVZN5test41fEvE11staticLocal to i8*) acquire
+// CHECK:   %0 = load atomic i8, i8* @_ZGVZN5test41fEvE11staticLocal acquire, align 1
 // CHECK:   %guard.uninitialized = icmp eq i8 %0, 0
 // CHECK:   br i1 %guard.uninitialized, label %init.check, label %init.end
 
 // CHECK: init.check:
-// CHECK:   %1 = call i32 @__cxa_guard_acquire(i64* @_ZGVZN5test41fEvE11staticLocal)
+// CHECK:   %1 = call i32 @__cxa_guard_acquire(i8* @_ZGVZN5test41fEvE11staticLocal)
 // CHECK:   %tobool = icmp ne i32 %1, 0
 // CHECK:   br i1 %tobool, label %init, label %init.end
 
 // CHECK: init:
 // CHECK:   call void @_ZN5test45Test4C1Ev(%"struct.test4::Test4"* {{[^,]*}} @_ZZN5test41fEvE11staticLocal)
 // CHECK:   %2 = call i32 @atexit(void ()* @__dtor__ZZN5test41fEvE11staticLocal)
-// CHECK:   call void @__cxa_guard_release(i64* @_ZGVZN5test41fEvE11staticLocal)
+// CHECK:   call void @__cxa_guard_release(i8* @_ZGVZN5test41fEvE11staticLocal)
 // CHECK:   br label %init.end
 
 // CHECK: init.end:
Index: clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
===
--- clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
+++ clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
@@ -77,12 +77,12 @@
 
 // CHECK: define internal void @__cxx_global_var_init.1() [[ATTR:#[0-9]+]] {
 // CHECK: entry:
-// CHECK:   %0 = load atomic i8, i8* bitcast (i64* @_ZGVN5test12t2E to i8*) acquire
+// CHECK:   %0 = load atomic i8, i8* @_ZGVN5test12t2E acquire, align 1
 // CHECK:   %guard.uninitialized = icmp eq i8 %0, 0
 // CHECK:   br i1 %guard.uninitialized, label %init.check, label %init.end
 
 // CHECK: init.check:
-// CHECK:   %1 = call i32 @__cxa_guard_acquire(i64* @_ZGVN5test12t2E)
+// CHECK:   %1 = call i32 @__cxa_guard_acquire(i8* @_ZGVN5test12t2E)
 // CHECK:   %tobool = icmp ne i32 %1, 0
 // CHECK:   br i1 %tobool, label %init, label %init.end
 
@@ -90,7 +90,7 @@
 // CHECK32: call void @_ZN5test15Test1C1Ei(%"struct.test1::Test1"* {{[^,]*}} @_ZN5test12t2E, i32 2)
 // CHECK64: call void @_ZN5test15Test1C1Ei(%"struct.test1::Test1"* {{[^,]*}} @_ZN5test12t2E, i32 signext 2)
 // CHECK:   %2 = call i32 @atexit(void ()* @__dtor__ZN5test12t2E)
-// CHECK:   call void @__cxa_guard_release(i64* @_ZGVN5test12t2E)
+// CHECK:   call void @__cxa_guard_release(i8* @_ZGVN5test12t2E)
 // CHECK:   br label %init.end
 
 // CHECK: init.end:
@@ -119,14 +119,14 @@
 
 // CHECK: define internal void @__cxx_global_var_init.2() [[ATTR:#[0-9]+]] {
 // CHECK: entry:
-// CHECK:   %0 = load i8, i8* bitcast (i64* @_ZGVN5test21AIvE8instanceE to i8*)
+// CHECK:   %0 = load i8, i8* @_ZGVN5test21AIvE8instanceE, align 1
 // CHECK:   %guard.uninitialized = icmp eq i8 %0, 0
 // CHECK:   br i1 %guard.uninitialized, label %init.check, label %init.end
 
 // CHECK: init.check:
 // CHECK:   call void @_ZN5test21AIvEC1Ev(%"struct.test2::A"* {{[^,]*}} @_ZN5test21AIvE8instanceE)
 // CHECK:   %1 = call i32 @atexit(void ()* @__dtor__ZN5test21AIvE8instanceE)
-// CHECK:   store i64 1, i64* @_ZGVN5test21AIvE8instanceE
+// CHECK:   store i8 1, i8* @_ZGVN5test21AIvE8instanceE, align 1
 // CHECK:   br label %init.end
 
 // CHECK: init.end:
@@ -182,7 +182,7 @@
 
 // CHECK: define internal void @__cxx_global_var_init.4() [[ATTR:#[0-9]+]] {
 // CHECK: entry:
-// CHECK:   %0 = load i8, i8* bitcast (i64* @_ZGVN5test12t1IiEE to i8*)
+// CHECK:   %0 = load i8, i8* @_ZGVN5test12t1IiEE, align 1
 // CHECK:   %guard.uninitialized = icmp eq i8 %0, 0
 // CHECK:   br i1 %guard.uninitialized, label %init.check, label %init.end
 
@@ -190,7 +190,7 @@
 // CHECK32: call void @_ZN5test15Test1C1Ei(%"struct.test1::Test1"* {{[^,]*}} @_ZN5test12t1IiEE, i32 2)
 // CHECK64: call void @_ZN5test15Test1C1Ei(%"struct.test1::Test1"* {{[^,]*}} @_ZN5test12t1IiEE, i32 signext 2)
 // CHECK:   %1 = call i32 @atexit(void ()* @__dtor__ZN5test12t1IiEE)
-// CHECK:   store i64 1, i64* @_ZGVN5test12t1IiEE
+// CHECK:   store i8 1, i8* @_ZGVN5test12t1IiEE, align 1
 // 

[PATCH] D87702: [Frontend] Add pragma align natural and sort out pragma pack stack effect

[Xiangling Liao via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Xiangling_L marked 8 inline comments as done.
Closed by commit rGf0abe2aeaca7: [Frontend] Add pragma align natural and sort 
out pragma pack stack effect (authored by Xiangling_L).

Changed prior to commit:
  https://reviews.llvm.org/D87702?vs=315855=316400#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87702/new/

https://reviews.llvm.org/D87702

Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/include/clang/Basic/LangOptions.def
  clang/include/clang/Driver/Options.td
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Serialization/ASTReader.h
  clang/include/clang/Serialization/ASTWriter.h
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaAttr.cpp
  clang/lib/Serialization/ASTReader.cpp
  clang/lib/Serialization/ASTWriter.cpp
  clang/test/Driver/aix-pragma-pack.c
  clang/test/Layout/aix-double-struct-member.cpp
  clang/test/Layout/aix-power-natural-interaction.cpp
  clang/test/PCH/aix-pragma-pack.c
  clang/test/Sema/aix-pragma-pack-and-align.c

Index: clang/test/Sema/aix-pragma-pack-and-align.c
===
--- /dev/null
+++ clang/test/Sema/aix-pragma-pack-and-align.c
@@ -0,0 +1,229 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fxl-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fxl-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+namespace test1 {
+#pragma align(natural)
+#pragma pack(4)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma pack()
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 4}}
+#pragma pack(pop)
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 8}}
+struct B {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test1
+
+namespace test2 {
+#pragma align(natural)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma align(reset)
+
+struct B {
+  int i;
+  double d;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=12, nvalign=4, preferrednvalign=4]
+
+} // namespace test2
+
+namespace test3 {
+#pragma pack(2)
+#pragma align(natural)
+struct A {
+  double d;
+};
+#pragma align(reset)
+#pragma pack(pop)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test3::A
+// CHECK-NEXT:  0 |   double d
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=8, nvalign=4, preferrednvalign=8]
+
+} // namespace test3
+
+namespace test4 {
+#pragma pack(2)
+#pragma align(natural)
+#pragma pack(pop)
+
+struct A {
+  int i;
+  double d;
+} a;
+#pragma align(reset)
+#pragma pack(pop)
+
+int i = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test4::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test4
+
+namespace test5 {
+#pragma align(power)
+#pragma align(natural)
+#pragma pack(2)
+#pragma align(reset)
+struct A {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record 

[PATCH] D87702: [Frontend] Add pragma align natural and sort out pragma pack stack effect

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 315855.
Xiangling_L marked 4 inline comments as done.
Xiangling_L added a comment.

Rebased on latest master;
Addressed the comments;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87702/new/

https://reviews.llvm.org/D87702

Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/include/clang/Basic/LangOptions.def
  clang/include/clang/Driver/Options.td
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Serialization/ASTReader.h
  clang/include/clang/Serialization/ASTWriter.h
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaAttr.cpp
  clang/lib/Serialization/ASTReader.cpp
  clang/lib/Serialization/ASTWriter.cpp
  clang/test/Driver/aix-pragma-pack.c
  clang/test/Layout/aix-double-struct-member.cpp
  clang/test/Layout/aix-power-natural-interaction.cpp
  clang/test/PCH/aix-pragma-pack.c
  clang/test/Sema/aix-pragma-pack-and-align.c

Index: clang/test/Sema/aix-pragma-pack-and-align.c
===
--- /dev/null
+++ clang/test/Sema/aix-pragma-pack-and-align.c
@@ -0,0 +1,231 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fxl-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fxl-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+namespace test1 {
+#pragma align(natural)
+#pragma pack(4)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma pack()
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 4}}
+#pragma pack(pop)
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 8}}
+struct B {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test1
+
+namespace test2 {
+#pragma align(natural)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma align(reset)
+
+struct B {
+  int i;
+  double d;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=12, nvalign=4, preferrednvalign=4]
+
+} // namespace test2
+
+namespace test3 {
+#pragma pack(2)
+#pragma align(natural)
+struct A {
+  double d;
+};
+#pragma align(reset)
+#pragma pack(pop)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test3::A
+// CHECK-NEXT:  0 |   double d
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=8, nvalign=4, preferrednvalign=8]
+
+} // namespace test3
+
+namespace test4 {
+#pragma pack(2)
+#pragma align(natural)
+#pragma pack(pop)
+
+struct A {
+  int i;
+  double d;
+} a;
+#pragma align(reset)
+#pragma pack(pop)
+
+int i = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test4::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test4
+
+namespace test5 {
+#pragma align(power)
+#pragma align(natural)
+#pragma pack(2)
+#pragma align(reset)
+struct A {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test5::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=4, 

[PATCH] D93901: [NFC] Renaming PackStack to AlignPackStack

[Xiangling Liao via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGe97071d79520: [NFC] Renaming PackStack to AlignPackStack 
(authored by Xiangling_L).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93901/new/

https://reviews.llvm.org/D93901

Files:
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Serialization/ASTBitCodes.h
  clang/include/clang/Serialization/ASTReader.h
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaAttr.cpp
  clang/lib/Serialization/ASTReader.cpp
  clang/lib/Serialization/ASTWriter.cpp
  clang/test/Sema/Inputs/pragma-align-pack1.h
  clang/test/Sema/misleading-pragma-align-pack-diagnostics.c

Index: clang/test/Sema/misleading-pragma-align-pack-diagnostics.c
===
--- /dev/null
+++ clang/test/Sema/misleading-pragma-align-pack-diagnostics.c
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -triple i686-apple-darwin9 -fsyntax-only -Wpragma-pack-suspicious-include -I %S/Inputs -DALIGN_SET_HERE -verify %s
+// RUN: %clang_cc1 -triple i686-apple-darwin9 -fsyntax-only -Wpragma-pack-suspicious-include -I %S/Inputs -DRECORD_ALIGN -verify %s
+
+#ifdef ALIGN_SET_HERE
+#pragma align = natural // expected-warning {{unterminated '#pragma pack (push, ...)' at end of file}}
+// expected-warning@+9 {{the current #pragma pack alignment value is modified in the included file}}
+#endif
+
+#ifdef RECORD_ALIGN
+#pragma align = mac68k
+// expected-note@-1 {{previous '#pragma pack' directive that modifies alignment is here}}
+// expected-warning@+3 {{non-default #pragma pack value changes the alignment of struct or union members in the included file}}
+#endif
+
+#include "pragma-align-pack1.h"
+
+#ifdef RECORD_ALIGN
+#pragma align = reset
+#endif
Index: clang/test/Sema/Inputs/pragma-align-pack1.h
===
--- /dev/null
+++ clang/test/Sema/Inputs/pragma-align-pack1.h
@@ -0,0 +1,11 @@
+#ifdef ALIGN_SET_HERE
+#pragma align = mac68k
+// expected-note@-1 {{previous '#pragma pack' directive that modifies alignment is here}}
+// expected-warning@-2 {{unterminated '#pragma pack (push, ...)' at end of file}}
+#endif
+
+#ifdef RECORD_ALIGN
+struct S {
+  int x;
+};
+#endif
Index: clang/lib/Serialization/ASTWriter.cpp
===
--- clang/lib/Serialization/ASTWriter.cpp
+++ clang/lib/Serialization/ASTWriter.cpp
@@ -4151,24 +4151,24 @@
   Stream.EmitRecord(POINTERS_TO_MEMBERS_PRAGMA_OPTIONS, Record);
 }
 
-/// Write the state of 'pragma pack' at the end of the module.
+/// Write the state of 'pragma align/pack' at the end of the module.
 void ASTWriter::WritePackPragmaOptions(Sema ) {
-  // Don't serialize pragma pack state for modules, since it should only take
-  // effect on a per-submodule basis.
+  // Don't serialize pragma align/pack state for modules, since it should only
+  // take effect on a per-submodule basis.
   if (WritingModule)
 return;
 
   RecordData Record;
-  Record.push_back(SemaRef.PackStack.CurrentValue);
-  AddSourceLocation(SemaRef.PackStack.CurrentPragmaLocation, Record);
-  Record.push_back(SemaRef.PackStack.Stack.size());
-  for (const auto  : SemaRef.PackStack.Stack) {
+  Record.push_back(SemaRef.AlignPackStack.CurrentValue);
+  AddSourceLocation(SemaRef.AlignPackStack.CurrentPragmaLocation, Record);
+  Record.push_back(SemaRef.AlignPackStack.Stack.size());
+  for (const auto  : SemaRef.AlignPackStack.Stack) {
 Record.push_back(StackEntry.Value);
 AddSourceLocation(StackEntry.PragmaLocation, Record);
 AddSourceLocation(StackEntry.PragmaPushLocation, Record);
 AddString(StackEntry.StackSlotLabel, Record);
   }
-  Stream.EmitRecord(PACK_PRAGMA_OPTIONS, Record);
+  Stream.EmitRecord(ALIGN_PACK_PRAGMA_OPTIONS, Record);
 }
 
 /// Write the state of 'pragma float_control' at the end of the module.
Index: clang/lib/Serialization/ASTReader.cpp
===
--- clang/lib/Serialization/ASTReader.cpp
+++ clang/lib/Serialization/ASTReader.cpp
@@ -3742,25 +3742,25 @@
   ForceCUDAHostDeviceDepth = Record[0];
   break;
 
-case PACK_PRAGMA_OPTIONS: {
+case ALIGN_PACK_PRAGMA_OPTIONS: {
   if (Record.size() < 3) {
 Error("invalid pragma pack record");
 return Failure;
   }
-  PragmaPackCurrentValue = Record[0];
-  PragmaPackCurrentLocation = ReadSourceLocation(F, Record[1]);
+  PragmaAlignPackCurrentValue = Record[0];
+  PragmaAlignPackCurrentLocation = ReadSourceLocation(F, Record[1]);
   unsigned NumStackEntries = Record[2];
   unsigned Idx = 3;
   // Reset the stack when importing a new module.
-  PragmaPackStack.clear();
+  PragmaAlignPackStack.clear();
   for (unsigned I = 0; I < NumStackEntries; ++I) {
-PragmaPackStackEntry Entry;
+PragmaAlignPackStackEntry Entry;
 Entry.Value = 

[PATCH] D87702: [Frontend] Add pragma align natural and sort out pragma pack stack effect

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 315126.
Xiangling_L marked 5 inline comments as done.
Xiangling_L added a comment.

Addressed the comments;
Rebased the patch on latest master;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87702/new/

https://reviews.llvm.org/D87702

Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/include/clang/Basic/LangOptions.def
  clang/include/clang/Driver/Options.td
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Serialization/ASTReader.h
  clang/include/clang/Serialization/ASTWriter.h
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaAttr.cpp
  clang/lib/Serialization/ASTReader.cpp
  clang/lib/Serialization/ASTWriter.cpp
  clang/test/Driver/aix-pragma-pack.c
  clang/test/Layout/aix-double-struct-member.cpp
  clang/test/Layout/aix-power-natural-interaction.cpp
  clang/test/PCH/aix-pragma-pack.c
  clang/test/Sema/aix-pragma-pack-and-align.c

Index: clang/test/Sema/aix-pragma-pack-and-align.c
===
--- /dev/null
+++ clang/test/Sema/aix-pragma-pack-and-align.c
@@ -0,0 +1,231 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fxl-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fxl-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+namespace test1 {
+#pragma align(natural)
+#pragma pack(4)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma pack()
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 4}}
+#pragma pack(pop)
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 8}}
+struct B {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test1
+
+namespace test2 {
+#pragma align(natural)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma align(reset)
+
+struct B {
+  int i;
+  double d;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=12, nvalign=4, preferrednvalign=4]
+
+} // namespace test2
+
+namespace test3 {
+#pragma pack(2)
+#pragma align(natural)
+struct A {
+  double d;
+};
+#pragma align(reset)
+#pragma pack(pop)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test3::A
+// CHECK-NEXT:  0 |   double d
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=8, nvalign=4, preferrednvalign=8]
+
+} // namespace test3
+
+namespace test4 {
+#pragma pack(2)
+#pragma align(natural)
+#pragma pack(pop)
+
+struct A {
+  int i;
+  double d;
+} a;
+#pragma align(reset)
+#pragma pack(pop)
+
+int i = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test4::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test4
+
+namespace test5 {
+#pragma align(power)
+#pragma align(natural)
+#pragma pack(2)
+#pragma align(reset)
+struct A {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test5::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=4, 

[PATCH] D87702: [Frontend] Add pragma align natural and sort out pragma pack stack effect

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L marked 9 inline comments as done.
Xiangling_L added inline comments.



Comment at: clang/include/clang/Basic/DiagnosticSemaKinds.td:893
+def warn_pragma_pack_identifer_not_supported : Warning<
+  "specifying an identifier within pragma pack is not supported, identifier is 
ignored">,
+  InGroup;

aaron.ballman wrote:
> If the user wrote an identifier, it seems like there's a strong chance that 
> ignoring the identifier will result in incorrect behavior that would lead to 
> hard-to-find ODR issues. Should this scenario be an error rather than a 
> warning where the identifier is ignored?
Could you show a more concrete example or give more details on how possible 
incorrect behavior would lead to hard-to-find ODR issues?



Comment at: clang/include/clang/Sema/Sema.h:486
+: PackAttr(true), AlignMode(M), PackNumber(Num), XLStack(IsXL) {
+  assert(Num == PackNumber && "Unexpected value.");
+}

aaron.ballman wrote:
> The string literal here doesn't really convey what's being asserted -- it 
> took me a while to figure out that this is trying to catch truncation issues 
> when `Num` cannot be represented by an `unsigned char`.
Sorry for that, I would make it clearer.



Comment at: clang/include/clang/Sema/Sema.h:512
+static AlignPackInfo getFromRawEncoding(unsigned Encoding) {
+  static_assert(sizeof(AlignPackInfo) == sizeof(uint32_t),
+"Size is not correct");

aaron.ballman wrote:
> I would feel more comfortable with this assertion if the class was using 
> bit-fields to pack the values together. As it stands, we're kind of hoping 
> that `bool`, `Mode`, and `unsigned char` will all pack in a particular way 
> (and `bool`'s representation is implementation-defined).
Yeah, good point. I will move it back to previous bitfields version.



Comment at: clang/include/clang/Sema/Sema.h:527
+
+unsigned char getPackNumber() const { return PackNumber; }
+

aaron.ballman wrote:
> Given that the ctor takes an `int` for this value, should this be returning 
> an `int`?
As we know the pack number would not exceed 16 bytes, so the intention of using 
`unsigned char` here is to save space taken by AlignPackInfo. And that's why I 
added the diagnostics and assertion in the ctor to make sure the value won't be 
truncated.



Comment at: clang/test/Sema/aix-pragma-pack-and-align.c:231
+
+// expected-no-warning

aaron.ballman wrote:
> Is this comment intentional?
Yes, my intention is to test no pragma pack or prama align is unterminated.


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[PATCH] D93901: [NFC] Renaming PackStack to AlignPackStack

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 314911.
Xiangling_L marked 3 inline comments as done.
Xiangling_L added a comment.

Add pre-committing tests with the incorrect behaviour as part of the NFC patch.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93901/new/

https://reviews.llvm.org/D93901

Files:
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Serialization/ASTBitCodes.h
  clang/include/clang/Serialization/ASTReader.h
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaAttr.cpp
  clang/lib/Serialization/ASTReader.cpp
  clang/lib/Serialization/ASTWriter.cpp
  clang/test/Sema/Inputs/pragma-align-pack1.h
  clang/test/Sema/misleading-pragma-align-pack-diagnostics.c

Index: clang/test/Sema/misleading-pragma-align-pack-diagnostics.c
===
--- /dev/null
+++ clang/test/Sema/misleading-pragma-align-pack-diagnostics.c
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -triple i686-apple-darwin9 -fsyntax-only -Wpragma-pack-suspicious-include -I %S/Inputs -DALIGN_SET_HERE -verify %s
+// RUN: %clang_cc1 -triple i686-apple-darwin9 -fsyntax-only -Wpragma-pack-suspicious-include -I %S/Inputs -DRECORD_ALIGN -verify %s
+
+#ifdef ALIGN_SET_HERE
+#pragma align = natural // expected-warning {{unterminated '#pragma pack (push, ...)' at end of file}}
+// expected-warning@+9 {{the current #pragma pack alignment value is modified in the included file}}
+#endif
+
+#ifdef RECORD_ALIGN
+#pragma align = mac68k
+// expected-note@-1 {{previous '#pragma pack' directive that modifies alignment is here}}
+// expected-warning@+3 {{non-default #pragma pack value changes the alignment of struct or union members in the included file}}
+#endif
+
+#include "pragma-align-pack1.h"
+
+#ifdef RECORD_ALIGN
+#pragma align = reset
+#endif
Index: clang/test/Sema/Inputs/pragma-align-pack1.h
===
--- /dev/null
+++ clang/test/Sema/Inputs/pragma-align-pack1.h
@@ -0,0 +1,11 @@
+#ifdef ALIGN_SET_HERE
+#pragma align = mac68k
+// expected-note@-1 {{previous '#pragma pack' directive that modifies alignment is here}}
+// expected-warning@-2 {{unterminated '#pragma pack (push, ...)' at end of file}}
+#endif
+
+#ifdef RECORD_ALIGN
+struct S {
+  int x;
+};
+#endif
Index: clang/lib/Serialization/ASTWriter.cpp
===
--- clang/lib/Serialization/ASTWriter.cpp
+++ clang/lib/Serialization/ASTWriter.cpp
@@ -4151,24 +4151,24 @@
   Stream.EmitRecord(POINTERS_TO_MEMBERS_PRAGMA_OPTIONS, Record);
 }
 
-/// Write the state of 'pragma pack' at the end of the module.
+/// Write the state of 'pragma align/pack' at the end of the module.
 void ASTWriter::WritePackPragmaOptions(Sema ) {
-  // Don't serialize pragma pack state for modules, since it should only take
-  // effect on a per-submodule basis.
+  // Don't serialize pragma align/pack state for modules, since it should only
+  // take effect on a per-submodule basis.
   if (WritingModule)
 return;
 
   RecordData Record;
-  Record.push_back(SemaRef.PackStack.CurrentValue);
-  AddSourceLocation(SemaRef.PackStack.CurrentPragmaLocation, Record);
-  Record.push_back(SemaRef.PackStack.Stack.size());
-  for (const auto  : SemaRef.PackStack.Stack) {
+  Record.push_back(SemaRef.AlignPackStack.CurrentValue);
+  AddSourceLocation(SemaRef.AlignPackStack.CurrentPragmaLocation, Record);
+  Record.push_back(SemaRef.AlignPackStack.Stack.size());
+  for (const auto  : SemaRef.AlignPackStack.Stack) {
 Record.push_back(StackEntry.Value);
 AddSourceLocation(StackEntry.PragmaLocation, Record);
 AddSourceLocation(StackEntry.PragmaPushLocation, Record);
 AddString(StackEntry.StackSlotLabel, Record);
   }
-  Stream.EmitRecord(PACK_PRAGMA_OPTIONS, Record);
+  Stream.EmitRecord(ALIGN_PACK_PRAGMA_OPTIONS, Record);
 }
 
 /// Write the state of 'pragma float_control' at the end of the module.
Index: clang/lib/Serialization/ASTReader.cpp
===
--- clang/lib/Serialization/ASTReader.cpp
+++ clang/lib/Serialization/ASTReader.cpp
@@ -3742,25 +3742,25 @@
   ForceCUDAHostDeviceDepth = Record[0];
   break;
 
-case PACK_PRAGMA_OPTIONS: {
+case ALIGN_PACK_PRAGMA_OPTIONS: {
   if (Record.size() < 3) {
 Error("invalid pragma pack record");
 return Failure;
   }
-  PragmaPackCurrentValue = Record[0];
-  PragmaPackCurrentLocation = ReadSourceLocation(F, Record[1]);
+  PragmaAlignPackCurrentValue = Record[0];
+  PragmaAlignPackCurrentLocation = ReadSourceLocation(F, Record[1]);
   unsigned NumStackEntries = Record[2];
   unsigned Idx = 3;
   // Reset the stack when importing a new module.
-  PragmaPackStack.clear();
+  PragmaAlignPackStack.clear();
   for (unsigned I = 0; I < NumStackEntries; ++I) {
-PragmaPackStackEntry Entry;
+PragmaAlignPackStackEntry Entry;
 Entry.Value = Record[Idx++];
  

[PATCH] D87702: [Frontend] Add pragma align natural and sort out pragma pack stack effect

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 314141.
Xiangling_L marked 6 inline comments as done.
Xiangling_L added a comment.

- used memcpy to burn AlignPackInfo into uint32_t and vice versa;
- named XL on AIX stack effect and related options after  "xl" instead of "aix"
- adjusted natural align related code


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87702/new/

https://reviews.llvm.org/D87702

Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/include/clang/Basic/LangOptions.def
  clang/include/clang/Driver/Options.td
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Serialization/ASTReader.h
  clang/include/clang/Serialization/ASTWriter.h
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaAttr.cpp
  clang/lib/Serialization/ASTReader.cpp
  clang/lib/Serialization/ASTWriter.cpp
  clang/test/Driver/aix-pragma-pack.c
  clang/test/Layout/aix-double-struct-member.cpp
  clang/test/Layout/aix-power-natural-interaction.cpp
  clang/test/PCH/aix-pragma-pack.c
  clang/test/Sema/aix-pragma-pack-and-align.c

Index: clang/test/Sema/aix-pragma-pack-and-align.c
===
--- /dev/null
+++ clang/test/Sema/aix-pragma-pack-and-align.c
@@ -0,0 +1,231 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fxl-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fxl-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+namespace test1 {
+#pragma align(natural)
+#pragma pack(4)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma pack()
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 4}}
+#pragma pack(pop)
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 8}}
+struct B {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test1
+
+namespace test2 {
+#pragma align(natural)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma align(reset)
+
+struct B {
+  int i;
+  double d;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=12, nvalign=4, preferrednvalign=4]
+
+} // namespace test2
+
+namespace test3 {
+#pragma pack(2)
+#pragma align(natural)
+struct A {
+  double d;
+};
+#pragma align(reset)
+#pragma pack(pop)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test3::A
+// CHECK-NEXT:  0 |   double d
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=8, nvalign=4, preferrednvalign=8]
+
+} // namespace test3
+
+namespace test4 {
+#pragma pack(2)
+#pragma align(natural)
+#pragma pack(pop)
+
+struct A {
+  int i;
+  double d;
+} a;
+#pragma align(reset)
+#pragma pack(pop)
+
+int i = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test4::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test4
+
+namespace test5 {
+#pragma align(power)
+#pragma align(natural)
+#pragma pack(2)
+#pragma align(reset)
+struct A {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test5::A
+// 

[PATCH] D87702: [Frontend] Add pragma align natural and sort out pragma pack stack effect

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 313986.
Xiangling_L marked an inline comment as done.
Xiangling_L added a comment.

Rebase on renaming NFC patch


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87702/new/

https://reviews.llvm.org/D87702

Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/include/clang/Basic/LangOptions.def
  clang/include/clang/Driver/Options.td
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Serialization/ASTReader.h
  clang/include/clang/Serialization/ASTWriter.h
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaAttr.cpp
  clang/lib/Serialization/ASTReader.cpp
  clang/lib/Serialization/ASTWriter.cpp
  clang/test/Driver/aix-pragma-pack.c
  clang/test/Layout/aix-double-struct-member.cpp
  clang/test/Layout/aix-power-natural-interaction.cpp
  clang/test/PCH/aix-pragma-pack.c
  clang/test/Sema/aix-pragma-pack-and-align.c

Index: clang/test/Sema/aix-pragma-pack-and-align.c
===
--- /dev/null
+++ clang/test/Sema/aix-pragma-pack-and-align.c
@@ -0,0 +1,231 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -faix-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -faix-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+namespace test1 {
+#pragma align(natural)
+#pragma pack(4)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma pack()
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 4}}
+#pragma pack(pop)
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 8}}
+struct B {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test1
+
+namespace test2 {
+#pragma align(natural)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma align(reset)
+
+struct B {
+  int i;
+  double d;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=12, nvalign=4, preferrednvalign=4]
+
+} // namespace test2
+
+namespace test3 {
+#pragma pack(2)
+#pragma align(natural)
+struct A {
+  double d;
+};
+#pragma align(reset)
+#pragma pack(pop)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test3::A
+// CHECK-NEXT:  0 |   double d
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=8, nvalign=4, preferrednvalign=8]
+
+} // namespace test3
+
+namespace test4 {
+#pragma pack(2)
+#pragma align(natural)
+#pragma pack(pop)
+
+struct A {
+  int i;
+  double d;
+} a;
+#pragma align(reset)
+#pragma pack(pop)
+
+int i = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test4::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test4
+
+namespace test5 {
+#pragma align(power)
+#pragma align(natural)
+#pragma pack(2)
+#pragma align(reset)
+struct A {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test5::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, 

[PATCH] D87702: [Frontend] Add pragma align natural and sort out pragma pack stack effect

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L marked 2 inline comments as done.
Xiangling_L added inline comments.



Comment at: clang/include/clang/Sema/Sema.h:637
   PragmaStack VtorDispStack;
-  // #pragma pack.
-  // Sentinel to represent when the stack is set to mac68k alignment.
-  static const unsigned kMac68kAlignmentSentinel = ~0U;
-  PragmaStack PackStack;
+  PragmaStack PackStack;
   // The current #pragma pack values and locations at each #include.

jasonliu wrote:
> Xiangling_L wrote:
> > jasonliu wrote:
> > > We should consider renaming PackStack to AlignPackStack across Clang. 
> > > Maybe even as a NFC first. As it is right now, clang already uses one 
> > > stack to record those two informations from `Pragma align` and `Pragma 
> > > pack`. Leave it as PackStack is too confusing, and people could actually 
> > > ignore the pragma Align when developing with PackStack. 
> > That's a good point. I will create a NFC accordingly.
> Please post this NFC when you have time.
Thanks for reminding me of this. A NFC patch is posted here: 
https://reviews.llvm.org/D93901


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[PATCH] D93901: [NFC] Renaming PackStack to AlignPackStack

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L created this revision.
Xiangling_L added reviewers: jasonliu, hubert.reinterpretcast, efriedma, 
jyknight, aaron.ballman.
Xiangling_L requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

This patch renames `PackStack` and related variable name to also contain 
`align` across Clang. As it is right now, clang already uses one stack to 
record those information from both `#pragma align` and `#pragma pack`. Leave it 
as PackStack is confusing, and people could actually ignore the `#pragma align` 
when developing with `PackStack`.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D93901

Files:
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Serialization/ASTBitCodes.h
  clang/include/clang/Serialization/ASTReader.h
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaAttr.cpp
  clang/lib/Serialization/ASTReader.cpp
  clang/lib/Serialization/ASTWriter.cpp

Index: clang/lib/Serialization/ASTWriter.cpp
===
--- clang/lib/Serialization/ASTWriter.cpp
+++ clang/lib/Serialization/ASTWriter.cpp
@@ -4151,24 +4151,24 @@
   Stream.EmitRecord(POINTERS_TO_MEMBERS_PRAGMA_OPTIONS, Record);
 }
 
-/// Write the state of 'pragma pack' at the end of the module.
+/// Write the state of 'pragma align/pack' at the end of the module.
 void ASTWriter::WritePackPragmaOptions(Sema ) {
-  // Don't serialize pragma pack state for modules, since it should only take
-  // effect on a per-submodule basis.
+  // Don't serialize pragma align/pack state for modules, since it should only
+  // take effect on a per-submodule basis.
   if (WritingModule)
 return;
 
   RecordData Record;
-  Record.push_back(SemaRef.PackStack.CurrentValue);
-  AddSourceLocation(SemaRef.PackStack.CurrentPragmaLocation, Record);
-  Record.push_back(SemaRef.PackStack.Stack.size());
-  for (const auto  : SemaRef.PackStack.Stack) {
+  Record.push_back(SemaRef.AlignPackStack.CurrentValue);
+  AddSourceLocation(SemaRef.AlignPackStack.CurrentPragmaLocation, Record);
+  Record.push_back(SemaRef.AlignPackStack.Stack.size());
+  for (const auto  : SemaRef.AlignPackStack.Stack) {
 Record.push_back(StackEntry.Value);
 AddSourceLocation(StackEntry.PragmaLocation, Record);
 AddSourceLocation(StackEntry.PragmaPushLocation, Record);
 AddString(StackEntry.StackSlotLabel, Record);
   }
-  Stream.EmitRecord(PACK_PRAGMA_OPTIONS, Record);
+  Stream.EmitRecord(ALIGN_PACK_PRAGMA_OPTIONS, Record);
 }
 
 /// Write the state of 'pragma float_control' at the end of the module.
Index: clang/lib/Serialization/ASTReader.cpp
===
--- clang/lib/Serialization/ASTReader.cpp
+++ clang/lib/Serialization/ASTReader.cpp
@@ -3742,25 +3742,25 @@
   ForceCUDAHostDeviceDepth = Record[0];
   break;
 
-case PACK_PRAGMA_OPTIONS: {
+case ALIGN_PACK_PRAGMA_OPTIONS: {
   if (Record.size() < 3) {
 Error("invalid pragma pack record");
 return Failure;
   }
-  PragmaPackCurrentValue = Record[0];
-  PragmaPackCurrentLocation = ReadSourceLocation(F, Record[1]);
+  PragmaAlignPackCurrentValue = Record[0];
+  PragmaAlignPackCurrentLocation = ReadSourceLocation(F, Record[1]);
   unsigned NumStackEntries = Record[2];
   unsigned Idx = 3;
   // Reset the stack when importing a new module.
-  PragmaPackStack.clear();
+  PragmaAlignPackStack.clear();
   for (unsigned I = 0; I < NumStackEntries; ++I) {
-PragmaPackStackEntry Entry;
+PragmaAlignPackStackEntry Entry;
 Entry.Value = Record[Idx++];
 Entry.Location = ReadSourceLocation(F, Record[Idx++]);
 Entry.PushLocation = ReadSourceLocation(F, Record[Idx++]);
-PragmaPackStrings.push_back(ReadString(Record, Idx));
-Entry.SlotLabel = PragmaPackStrings.back();
-PragmaPackStack.push_back(Entry);
+PragmaAlignPackStrings.push_back(ReadString(Record, Idx));
+Entry.SlotLabel = PragmaAlignPackStrings.back();
+PragmaAlignPackStack.push_back(Entry);
   }
   break;
 }
@@ -7875,32 +7875,36 @@
   }
   SemaObj->ForceCUDAHostDeviceDepth = ForceCUDAHostDeviceDepth;
 
-  if (PragmaPackCurrentValue) {
+  if (PragmaAlignPackCurrentValue) {
 // The bottom of the stack might have a default value. It must be adjusted
 // to the current value to ensure that the packing state is preserved after
 // popping entries that were included/imported from a PCH/module.
 bool DropFirst = false;
-if (!PragmaPackStack.empty() &&
-PragmaPackStack.front().Location.isInvalid()) {
-  assert(PragmaPackStack.front().Value == SemaObj->PackStack.DefaultValue &&
+if (!PragmaAlignPackStack.empty() &&
+PragmaAlignPackStack.front().Location.isInvalid()) {
+  assert(PragmaAlignPackStack.front().Value ==
+ SemaObj->AlignPackStack.DefaultValue &&
  

[PATCH] D87029: [AIX] Implement AIX special bitfield related alignment rules

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added inline comments.



Comment at: clang/test/Layout/aix-bitfield-alignment.cpp:1
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -faix-pragma-pack -x c++ %s | \

sfertile wrote:
> I suggest we split the test cases which are C++ only into a sperate file, and 
> run the cases that are valid in both C and C++ as both to ensure there are no 
> differences between C and C++ layout fir bit fields.
Good idea. I split the testcase as you suggested. But since C and C++ layout 
dumping are slightly different in format, the `CHECK`s are adjusted accordingly 
to avoid making testcase too messy. 


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[PATCH] D87029: [AIX] Implement AIX special bitfield related alignment rules

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 308648.
Xiangling_L marked 3 inline comments as done.
Xiangling_L added a comment.

Split testcases;
Simplified code;
Don't need to respect attribute align within typedef when the alignment value 
is less than bitcontainer size;


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Files:
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/test/Layout/aix-bitfield-alignment.c
  clang/test/Layout/aix-bitfield-alignment.cpp

Index: clang/test/Layout/aix-bitfield-alignment.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-bitfield-alignment.cpp
@@ -0,0 +1,36 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -faix-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK32 %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -faix-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK64 %s
+
+struct A {
+  bool b : 3;
+};
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct A
+// CHECK-NEXT:  0:0-2 |   _Bool b
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+enum class Bool : bool { False = 0,
+ True = 1 };
+
+struct B {
+  Bool b : 1;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct B
+// CHECK-NEXT:  0:0-0 |   enum Bool b
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+enum LL : unsigned long long { val = 1 };
Index: clang/test/Layout/aix-bitfield-alignment.c
===
--- /dev/null
+++ clang/test/Layout/aix-bitfield-alignment.c
@@ -0,0 +1,234 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -faix-pragma-pack -x c %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK32 %s
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -faix-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK32 %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -faix-pragma-pack -x c %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK64 %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -faix-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK64 %s
+
+struct A {
+  unsigned char c : 2;
+} A;
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct A
+// CHECK-NEXT:  0:0-1 |   unsigned char c
+// CHECK-NEXT:   sizeof=4, {{(dsize=4, )?}}align=4, preferredalign=4
+
+struct B {
+  char c;
+  int : 0;
+} B;
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct B
+// CHECK-NEXT:  0 |   char c
+// CHECK-NEXT:4:- |   int
+// CHECK-NEXT:   sizeof=4, {{(dsize=4, )?}}align=4, preferredalign=4
+
+struct C {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+} C;
+
+int c = sizeof(C);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK32: 4:0-7 |   unsigned long a7
+// CHECK32:  sizeof=8, {{(dsize=8, )?}}align=4, preferredalign=4
+// CHECK64: 3:1-8 |   unsigned long a7
+// CHECK64:  sizeof=8, {{(dsize=8, )?}}align=8, preferredalign=8
+
+#pragma align(packed)
+struct C1 {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+} C1;
+#pragma align(reset)
+
+int c1 = sizeof(C1);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C1
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK-NEXT:  3:1-8 |   unsigned long a7
+// CHECK-NEXT:   sizeof=5, {{(dsize=5, )?}}align=1, preferredalign=1
+
+#pragma pack(4)
+struct C2 {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 

[PATCH] D87702: [Frontend] Add pragma align natural and sort out pragma pack stack effect

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 308065.
Xiangling_L added a comment.

Adjusted the logic of operator == for class AlignPackInfo;
Removed mac68k sentinel;


CHANGES SINCE LAST ACTION
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Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/include/clang/Basic/LangOptions.def
  clang/include/clang/Driver/Options.td
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Serialization/ASTReader.h
  clang/include/clang/Serialization/ASTWriter.h
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaAttr.cpp
  clang/lib/Serialization/ASTReader.cpp
  clang/lib/Serialization/ASTWriter.cpp
  clang/test/Driver/aix-pragma-pack.c
  clang/test/Layout/aix-double-struct-member.cpp
  clang/test/Layout/aix-power-natural-interaction.cpp
  clang/test/PCH/aix-pragma-pack.c
  clang/test/Sema/aix-pragma-pack-and-align.c

Index: clang/test/Sema/aix-pragma-pack-and-align.c
===
--- /dev/null
+++ clang/test/Sema/aix-pragma-pack-and-align.c
@@ -0,0 +1,231 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -faix-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -faix-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+namespace test1 {
+#pragma align(natural)
+#pragma pack(4)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma pack()
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 4}}
+#pragma pack(pop)
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 8}}
+struct B {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test1
+
+namespace test2 {
+#pragma align(natural)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma align(reset)
+
+struct B {
+  int i;
+  double d;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=12, nvalign=4, preferrednvalign=4]
+
+} // namespace test2
+
+namespace test3 {
+#pragma pack(2)
+#pragma align(natural)
+struct A {
+  double d;
+};
+#pragma align(reset)
+#pragma pack(pop)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test3::A
+// CHECK-NEXT:  0 |   double d
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=8, nvalign=4, preferrednvalign=8]
+
+} // namespace test3
+
+namespace test4 {
+#pragma pack(2)
+#pragma align(natural)
+#pragma pack(pop)
+
+struct A {
+  int i;
+  double d;
+} a;
+#pragma align(reset)
+#pragma pack(pop)
+
+int i = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test4::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test4
+
+namespace test5 {
+#pragma align(power)
+#pragma align(natural)
+#pragma pack(2)
+#pragma align(reset)
+struct A {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test5::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=4, preferredalign=4,

[PATCH] D92117: [AIX] Enabling vector types for AIX

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L accepted this revision.
Xiangling_L added a comment.
This revision is now accepted and ready to land.

Just a minor suggestion: Maybe `Enabling return and argument vector types for 
AIX` is more accurate. Otherwise, LGTM.




Comment at: clang/test/CodeGen/aix-altivec.c:5
+vector float foo1(vector float x) { return x; }
+// CHECK:  define <4 x float> @foo1(<4 x float> %x) #0 {
+// CHECK:  entry:

minor:
you can use `[[ATTR:#[0-9]+]]` to replace `#0`


Repository:
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[PATCH] D87702: [Frontend] Add pragma align natural and sort out pragma pack stack effect

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 307685.
Xiangling_L added a comment.

Update the logic to tell if two AlignPackInfo are equal;


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Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/include/clang/Basic/LangOptions.def
  clang/include/clang/Driver/Options.td
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Serialization/ASTReader.h
  clang/include/clang/Serialization/ASTWriter.h
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaAttr.cpp
  clang/lib/Serialization/ASTReader.cpp
  clang/lib/Serialization/ASTWriter.cpp
  clang/test/Driver/aix-pragma-pack.c
  clang/test/Layout/aix-double-struct-member.cpp
  clang/test/Layout/aix-power-natural-interaction.cpp
  clang/test/PCH/aix-pragma-pack.c
  clang/test/Sema/aix-pragma-pack-and-align.c

Index: clang/test/Sema/aix-pragma-pack-and-align.c
===
--- /dev/null
+++ clang/test/Sema/aix-pragma-pack-and-align.c
@@ -0,0 +1,231 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -faix-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -faix-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+namespace test1 {
+#pragma align(natural)
+#pragma pack(4)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma pack()
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 4}}
+#pragma pack(pop)
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 8}}
+struct B {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test1
+
+namespace test2 {
+#pragma align(natural)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma align(reset)
+
+struct B {
+  int i;
+  double d;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=12, nvalign=4, preferrednvalign=4]
+
+} // namespace test2
+
+namespace test3 {
+#pragma pack(2)
+#pragma align(natural)
+struct A {
+  double d;
+};
+#pragma align(reset)
+#pragma pack(pop)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test3::A
+// CHECK-NEXT:  0 |   double d
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=8, nvalign=4, preferrednvalign=8]
+
+} // namespace test3
+
+namespace test4 {
+#pragma pack(2)
+#pragma align(natural)
+#pragma pack(pop)
+
+struct A {
+  int i;
+  double d;
+} a;
+#pragma align(reset)
+#pragma pack(pop)
+
+int i = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test4::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test4
+
+namespace test5 {
+#pragma align(power)
+#pragma align(natural)
+#pragma pack(2)
+#pragma align(reset)
+struct A {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test5::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=4, preferredalign=4,
+// CHECK-NEXT:| 

[PATCH] D87702: [Frontend] Add pragma align natural and sort out pragma pack stack effect

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added inline comments.



Comment at: clang/include/clang/Sema/Sema.h:637
   PragmaStack VtorDispStack;
-  // #pragma pack.
-  // Sentinel to represent when the stack is set to mac68k alignment.
-  static const unsigned kMac68kAlignmentSentinel = ~0U;
-  PragmaStack PackStack;
+  PragmaStack PackStack;
   // The current #pragma pack values and locations at each #include.

jasonliu wrote:
> We should consider renaming PackStack to AlignPackStack across Clang. Maybe 
> even as a NFC first. As it is right now, clang already uses one stack to 
> record those two informations from `Pragma align` and `Pragma pack`. Leave it 
> as PackStack is too confusing, and people could actually ignore the pragma 
> Align when developing with PackStack. 
That's a good point. I will create a NFC accordingly.


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[PATCH] D87702: [Frontend] Add pragma align natural and sort out pragma pack stack effect

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 307617.
Xiangling_L marked an inline comment as done.
Xiangling_L added a comment.
Herald added a subscriber: dexonsmith.

Addressed the comments;
Handle PCH for AIX;


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Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/include/clang/Basic/LangOptions.def
  clang/include/clang/Driver/Options.td
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Serialization/ASTReader.h
  clang/include/clang/Serialization/ASTWriter.h
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaAttr.cpp
  clang/lib/Serialization/ASTReader.cpp
  clang/lib/Serialization/ASTWriter.cpp
  clang/test/Driver/aix-pragma-pack.c
  clang/test/Layout/aix-double-struct-member.cpp
  clang/test/Layout/aix-power-natural-interaction.cpp
  clang/test/PCH/aix-pragma-pack.c
  clang/test/Sema/aix-pragma-pack-and-align.c

Index: clang/test/Sema/aix-pragma-pack-and-align.c
===
--- /dev/null
+++ clang/test/Sema/aix-pragma-pack-and-align.c
@@ -0,0 +1,231 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -faix-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -faix-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+namespace test1 {
+#pragma align(natural)
+#pragma pack(4)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma pack()
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 4}}
+#pragma pack(pop)
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 8}}
+struct B {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test1
+
+namespace test2 {
+#pragma align(natural)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma align(reset)
+
+struct B {
+  int i;
+  double d;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=12, nvalign=4, preferrednvalign=4]
+
+} // namespace test2
+
+namespace test3 {
+#pragma pack(2)
+#pragma align(natural)
+struct A {
+  double d;
+};
+#pragma align(reset)
+#pragma pack(pop)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test3::A
+// CHECK-NEXT:  0 |   double d
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=8, nvalign=4, preferrednvalign=8]
+
+} // namespace test3
+
+namespace test4 {
+#pragma pack(2)
+#pragma align(natural)
+#pragma pack(pop)
+
+struct A {
+  int i;
+  double d;
+} a;
+#pragma align(reset)
+#pragma pack(pop)
+
+int i = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test4::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test4
+
+namespace test5 {
+#pragma align(power)
+#pragma align(natural)
+#pragma pack(2)
+#pragma align(reset)
+struct A {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test5::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| 

[PATCH] D89684: [AIX] Add mabi=vec-extabi options to enable the AIX extended and default vector ABIs.

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L accepted this revision.
Xiangling_L added a comment.

LGTM. Thanks!


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[PATCH] D89684: [AIX] Add mabi=vec-extabi options to enable the AIX extended and default vector ABIs.

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added inline comments.



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:4624
+
+  if (Triple.isOSAIX()) {
+if (Args.hasArg(options::OPT_maltivec) &&

line 4624 to line 4635 can be simplified to :

```
  if (Triple.isOSAIX() && Args.hasArg(options::OPT_maltivec) {
if (Args.hasArg(options::OPT_mabi_EQ_vec_extabi)) {
  CmdArgs.push_back("-mabi=vec-extabi");
} else {
  D.Diag(diag::err_aix_default_altivec_abi);
}
  }
```

or even simplify line 4617 -4636 to the following if it works:

```
  if (Arg *A = Args.getLastArg(options::OPT_mabi_EQ_vec_extabi,
   options::OPT_mabi_EQ_vec_default)) {
if (!Triple.isOSAIX())
  D.Diag(diag::err_drv_unsupported_opt_for_target)
  << A->getSpelling() << RawTriple.str();

if (!Args.hasArg(options::OPT_maltivec))
  D.Diag(diag::err_aix_altivec);

if (Args.hasArg(options::OPT_mabi_EQ_vec_default))
  D.Diag(diag::err_aix_default_altivec_abi);

CmdArgs.push_back("-mabi=vec-extabi");
  } else if (Triple.isOSAIX() && Args.hasArg(options::OPT_maltivec) {
  D.Diag(diag::err_aix_default_altivec_abi);
  }
```



Comment at: clang/lib/Frontend/CompilerInvocation.cpp:1445
+  Args.getLastArg(OPT_mabi_EQ_vec_default, OPT_mabi_EQ_vec_extabi)) {
+if (!T.isOSAIX() || !T.isOSBinFormatXCOFF())
+  Diags.Report(diag::err_drv_unsupported_opt_for_target)

Hi Zarko, is the above comment missed being addressed?


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[PATCH] D89684: [AIX] Add mabi=vec-extabi options to enable the AIX extended and default vector ABIs.

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added inline comments.



Comment at: clang/include/clang/Basic/LangOptions.def:186
 LANGOPT(PPCIEEELongDouble, 1, 0, "use IEEE 754 quadruple-precision 
for long double")
+LANGOPT(EnableAIXExtendedAltivecABI, 1, 0, "__EXTABI__  predefined 
macro")
 COMPATIBLE_VALUE_LANGOPT(PICLevel, 2, 0, "__PIC__ level")

minor nit: remove extra spaces in front of `1`.



Comment at: clang/lib/Frontend/CompilerInvocation.cpp:1445
+  Args.getLastArg(OPT_mabi_EQ_vec_default, OPT_mabi_EQ_vec_extabi)) {
+if (!T.isOSAIX() || !T.isOSBinFormatXCOFF())
+  Diags.Report(diag::err_drv_unsupported_opt_for_target)

I am wondering why do we add `!T.isOSBinFormatXCOFF()` back?



Comment at: clang/lib/Frontend/CompilerInvocation.cpp:1449
+
+if (!Args.hasArg(OPT_maltivec))
+  Diags.Report(diag::err_aix_altivec);

Just a record here, as we discussed offline, we don't need to emit this error 
in frontend.



Comment at: clang/test/CodeGen/altivec.c:7
+ 
+// RUN: %clang -S -emit-llvm -maltivec -mabi=vec-extabi -target 
powerpc-unknown-aix %s -o - | FileCheck %s
+// RUN: not %clang -S -emit-llvm -mabi=vec-default -target powerpc-unknown-aix 
%s 2>&1  | FileCheck  %s --check-prefix=AIX-ATVER

When user specify `-maltivec / -target-feature +altivec`  without using any abi 
option,  the compiler will assume default altivec abi. In this situation, since 
default abi hasn’t been implemented, we should emit an error. So can we also 
add testcases for :

```
// RUN: not %clang -S -emit-llvm -maltivec -target powerpc-unknown-aix %s 2>&1 
| FileCheck %s --check-prefix=AIX-ERROR
and
// RUN: not %clang_cc1 -target-feature +altivec -triple powerpc-unknown-aix 
-emit-llvm %s 2>&1 | FileCheck %s --check-prefix=AIX-ERROR
```


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[PATCH] D89684: [AIX] Add mabi=vec-extabi options to enable the AIX extended and default vector ABIs.

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added inline comments.



Comment at: clang/lib/Frontend/CompilerInvocation.cpp:1443
 
+  if (Arg *A =
+  Args.getLastArg(OPT_mabi_EQ_vec_default, OPT_mabi_EQ_vec_extabi)) {

ZarkoCA wrote:
> Xiangling_L wrote:
> > Should we also check if target feature altivec[`-target-feature +altivec`] 
> > is enabled when using these two options? If so, we should also add related 
> > testcases.
> Both of these options require that -maltivec is also selected which sets 
> `-target-feature +altivec`.
> Both of these options require that -maltivec is also selected which sets 
> `-target-feature +altivec`.

It seems the scenario you pointed out are driver invocation use case. But when 
users invoke clang -cc1 not driver with -mabi=ext-abi/default, should we also 
check if the user specify `-target-feature +altivec` as well? For now, based on 
my observation, if invoking cc1 without `-target-feature +altivec` but with 
`-mabi=ext-abi` only like `// RUN: %clang_cc1 -mabi=vec-extabi -triple 
powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s`, the error is `error: 
unknown type name 'vector'`. Should we explicitly say `-target-feature 
+altivec` is required as what we do for driver?



Comment at: clang/test/Driver/aix-vec-extabi.c:2
+// RUN:  %clang -### -target powerpc-unknown-aix -S -maltivec -mabi=vec-extabi 
%s 2>&1 | \
+// RUN:  FileCheck %s --check-prefix=CHECK
+

minor: We can omit `--check-prefix=CHECK`



Comment at: llvm/include/llvm/Target/TargetOptions.h:179
 
+/// AIXExtendedAltivecABI - This flag returns true when -vec-extabi is
+/// specified. The code generator is then able to use both volatile and

minor: 
s/AIXExtendedAltivecABI/EnableAIXExtendedAltivecABI


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[PATCH] D89684: [AIX] Add mabi=vec-extabi options to enable the AIX extended and default vector ABIs.

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added inline comments.



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:4616
+  if (Args.hasArg(options::OPT_maltivec) &&
+  (Triple.isOSAIX() || Triple.isOSBinFormatXCOFF())) {
+for (const Arg *A : Args) {

ZarkoCA wrote:
> Xiangling_L wrote:
> > I am wondering what cases are not covered by `Triple.isOSAIX()`? Why do we 
> > also query `Triple.isOSBinFormatXCOFF()`?
> The path isn't selected if someone were to select -powerpc-unknown-xcoff as a 
> target for example.  It looks like the Triple.isOSAIX() is true when we we 
> have aix in the target triple. 
> The path isn't selected if someone were to select -powerpc-unknown-xcoff as a 
> target for example.  It looks like the Triple.isOSAIX() is true when we we 
> have aix in the target triple. 

My understanding is that the AIX altivec ABI is target-dependent, it has 
nothing to do with binary format.



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:4617
+
+if (Args.hasArg(options::OPT_maltivec) &&
+(Args.hasArg(options::OPT_mabi_EQ_vec_extabi))) {

The common query `Args.hasArg(options::OPT_maltivec)` is better to put in an 
upper level `if`;
Also after you do that, the last `else if` can be replaced by a `else`;
Another issue is that when we on AIX with -maltivec + extended/defautlt altivec 
abi enabled, we do duplicate checking in #4615 & #4613 `if` blocks. 

Maybe we can refactor these two `if` blocks into:

```
  if (Arg *A = Args.getLastArg(options::OPT_mabi_EQ_vec_extabi,
   options::OPT_mabi_EQ_vec_default)) {
if (!Triple.isOSAIX()) {
  D.Diag(diag::err_drv_unsupported_opt_for_target)
  << A->getSpelling() << RawTriple.str();
} else {
  if (Args.hasArg(options::OPT_maltivec)) {
if (Args.hasArg(options::OPT_mabi_EQ_vec_extabi)) {
  CmdArgs.push_back("-mabi=vec-extabi");
} else if (Args.hasArg(options::OPT_mabi_EQ_vec_default)) {
  D.Diag(diag::err_aix_default_altivec_abi);
} else {
  D.Diag(diag::err_aix_default_altivec_abi);
}
  } else {
D.Diag(diag::err_aix_altivec);
  }
}
  }
``` 



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:4633
+   options::OPT_mabi_EQ_vec_default)) {
+if (!Triple.isOSAIX() || !Triple.isOSBinFormatXCOFF())
+  D.Diag(diag::err_drv_unsupported_opt_for_target)

ditto.



Comment at: clang/lib/Frontend/CompilerInvocation.cpp:1443
 
+  if (Arg *A =
+  Args.getLastArg(OPT_mabi_EQ_vec_default, OPT_mabi_EQ_vec_extabi)) {

Should we also check if target feature altivec[`-target-feature +altivec`] is 
enabled when using these two options? If so, we should also add related 
testcases.



Comment at: clang/lib/Frontend/CompilerInvocation.cpp:1445
+  Args.getLastArg(OPT_mabi_EQ_vec_default, OPT_mabi_EQ_vec_extabi)) {
+if (!T.isOSAIX() || !T.isOSBinFormatXCOFF())
+  Diags.Report(diag::err_drv_unsupported_opt_for_target)

ditto.



Comment at: clang/test/CodeGen/altivec.c:2
 // RUN: %clang_cc1 -target-feature +altivec -triple powerpc-unknown-unknown 
-emit-llvm %s -o - | FileCheck %s
-
+// RUN: %clang_cc1 -target-feature +altivec -mabi=vec-extabi -triple 
powerpc-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -target-feature +altivec -mabi=vec-extabi -triple 
powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s

It looks line 2& 4, line 3&5 are duplicated.



Comment at: clang/test/CodeGen/altivec.c:2
 // RUN: %clang_cc1 -target-feature +altivec -triple powerpc-unknown-unknown 
-emit-llvm %s -o - | FileCheck %s
-
+// RUN: %clang_cc1 -target-feature +altivec -mabi=vec-extabi -triple 
powerpc-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -target-feature +altivec -mabi=vec-extabi -triple 
powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s

ZarkoCA wrote:
> Xiangling_L wrote:
> > Based on the code added in `BackendUtil:551`, should we also add a case for 
> > compiling a source to assembly?
> Added in lines 15-18
> Added in lines 15-18

Sorry, I should make my point clearer. Based on current testcases, there are 
two things:

1. line 15-18 are actually duplication to 10,11, 13. 14. Because all of them 
are testing if the driver will emit error when not specifying -maltivec with 
-mabi=vec-default/-mabi=vec-extabi, i.e compiling from .c to .ll and .c to .s 
won't affect how driver works,

2. `BackendUtil:551` The code I mentioned is actually affecting how BE behaves 
when we enable AIX altivec in the FE[or driver]. So the testcase I am looking 
for is something like:

```
// RUN:  %clang -target powerpc-unknown-aix -S -maltivec -mabi=vec-extabi %s  | 
FileCheck  %s
// CHECK: LLVM ERROR: the extended Altivec AIX ABI is not yet supported
```

[PATCH] D90892: [AIX][FE] Support constructor/destructor attribute

[Xiangling Liao via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG17497ec514f7: [AIX][FE] Support constructor/destructor 
attribute (authored by Xiangling_L).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
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Files:
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-constructor-attribute.c
  clang/test/CodeGen/aix-constructor-attribute.cpp
  clang/test/CodeGen/aix-destructor-attribute.c
  clang/test/CodeGen/aix-destructor-attribute.cpp
  clang/test/CodeGenCXX/aix-constructor-attribute.cpp
  clang/test/CodeGenCXX/aix-destructor-attribute.cpp
  clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp

Index: clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp
===
--- clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp
+++ /dev/null
@@ -1,14 +0,0 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ \
-// RUN: -fregister-global-dtors-with-atexit < %s 2>&1 | \
-// RUN:   FileCheck %s
-
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ \
-// RUN: -fregister-global-dtors-with-atexit < %s 2>&1 | \
-// RUN:   FileCheck %s
-
-struct T {
-  T();
-  ~T();
-} t;
-
-// CHECK: error in backend: register global dtors with atexit() is not supported yet
Index: clang/test/CodeGenCXX/aix-destructor-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGenCXX/aix-destructor-attribute.cpp
@@ -0,0 +1,90 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit < %s | \
+// RUN:   FileCheck --check-prefix=NO-REGISTER %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit < %s | \
+// RUN:   FileCheck --check-prefix=NO-REGISTER %s
+
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit -fregister-global-dtors-with-atexit < %s | \
+// RUN:   FileCheck --check-prefix=REGISTER %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit -fregister-global-dtors-with-atexit < %s | \
+// RUN:   FileCheck --check-prefix=REGISTER %s
+
+struct test {
+  test();
+  ~test();
+} t;
+
+int bar() __attribute__((destructor(100)));
+int bar2() __attribute__((destructor(65535)));
+int bar3(int) __attribute__((destructor(65535)));
+
+int bar() {
+  return 1;
+}
+
+int bar2() {
+  return 2;
+}
+
+int bar3(int a) {
+  return a;
+}
+
+// NO-REGISTER: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__sub_I__, i8* null }]
+// NO-REGISTER: @llvm.global_dtors = appending global [4 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 100, void ()* bitcast (i32 ()* @_Z3barv to void ()*), i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* bitcast (i32 ()* @_Z4bar2v to void ()*), i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* bitcast (i32 (i32)* @_Z4bar3i to void ()*), i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__D_a, i8* null }]
+
+// REGISTER: @llvm.global_ctors = appending global [3 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__sub_I__, i8* null }, { i32, void ()*, i8* } { i32 100, void ()* @__GLOBAL_init_100, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @__GLOBAL_init_65535, i8* null }]
+// REGISTER: @llvm.global_dtors = appending global [3 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__D_a, i8* null }, { i32, void ()*, i8* } { i32 100, void ()* @__GLOBAL_cleanup_100, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @__GLOBAL_cleanup_65535, i8* null }]
+
+// REGISTER: define internal void @__GLOBAL_init_100() [[ATTR:#[0-9]+]] {
+// REGISTER: entry:
+// REGISTER:   %0 = call i32 @atexit(void ()* bitcast (i32 ()* @_Z3barv to void ()*))
+// REGISTER:   ret void
+// REGISTER: }
+
+// REGISTER: define internal void @__GLOBAL_init_65535() [[ATTR:#[0-9]+]] {
+// REGISTER: entry:
+// REGISTER:   %0 = call i32 @atexit(void ()* bitcast (i32 ()* @_Z4bar2v to void ()*))
+// REGISTER:   %1 = call i32 @atexit(void ()* bitcast (i32 (i32)* @_Z4bar3i to void ()*))
+// REGISTER:   ret void
+// REGISTER: }
+
+// REGISTER: define internal void @__GLOBAL_cleanup_100() [[ATTR:#[0-9]+]] {
+// REGISTER: entry:
+// REGISTER:   %0 = call i32 @unatexit(void ()* bitcast (i32 ()* @_Z3barv to void ()*))
+// REGISTER:   %needs_destruct = icmp eq i32 %0, 0
+// REGISTER:   br i1 %needs_destruct, label %destruct.call, label %destruct.end
+
+// REGISTER: 

[PATCH] D89684: [AIX] Add mabi=vec-extabi options to enable the AIX extended and default vector ABIs.

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added inline comments.



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:4616
+  if (Args.hasArg(options::OPT_maltivec) &&
+  (Triple.isOSAIX() || Triple.isOSBinFormatXCOFF())) {
+for (const Arg *A : Args) {

I am wondering what cases are not covered by `Triple.isOSAIX()`? Why do we also 
query `Triple.isOSBinFormatXCOFF()`?



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:4617
+  (Triple.isOSAIX() || Triple.isOSBinFormatXCOFF())) {
+for (const Arg *A : Args) {
+  auto optID = A->getOption().getID();

I see your intention here is to find if there are any `-mabi=vec-extabi` or 
`-mabi=vec-default` option specifying. If I am correct, why we need to loop 
through whole Args? Can we just use `hasArg` query?



Comment at: clang/lib/Frontend/CompilerInvocation.cpp:1417
+  if (Arg *A = Args.getLastArg(OPT_mabi_EQ_vec_default, 
OPT_mabi_EQ_vec_extabi)) {
+if (!T.isOSAIX() || !T.isOSBinFormatXCOFF())
+  Diags.Report(diag::err_drv_unsupported_opt_for_target)

ditto.



Comment at: clang/test/CodeGen/altivec.c:2
 // RUN: %clang_cc1 -target-feature +altivec -triple powerpc-unknown-unknown 
-emit-llvm %s -o - | FileCheck %s
-
+// RUN: %clang_cc1 -target-feature +altivec -mabi=vec-extabi -triple 
powerpc-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -target-feature +altivec -mabi=vec-extabi -triple 
powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s

Based on the code added in `BackendUtil:551`, should we also add a case for 
compiling a source to assembly?



Comment at: llvm/include/llvm/Target/TargetMachine.h:246
 
+  bool getAIXExtendedAltivecABI() const {
+return Options.AIXExtendedAltivecABI;

I don't see this function gets invoked anywhere,can we remove it?



Comment at: llvm/include/llvm/Target/TargetOptions.h:179
 
+/// AIXExtendedAltivecABI - This flag returns true when -mabi=vec-extabi is
+/// specified. The code generator is then able to use both volatile and

-mabi=vec-extabi is the FE option, should we s/-mabi=vec-extabi/-vec-extabi?



Comment at: llvm/lib/CodeGen/CommandFlags.cpp:286
 
+  static cl::opt AIXExtendedAltivecABI(
+  "vec-extabi", cl::desc("Enable the AIX Extended Altivec ABI."),

Based on the naming convention in this file context, this seems should be 
`EnableAIXExtendedAltivecABI`.



Comment at: llvm/lib/CodeGen/CommandFlags.cpp:287
+  static cl::opt AIXExtendedAltivecABI(
+  "vec-extabi", cl::desc("Enable the AIX Extended Altivec ABI."),
+  cl::init(false));

Can we add a testcase for this backend option?



Comment at: llvm/test/CodeGen/PowerPC/aix-default-vec-abi.ll:1
+; RUN: not --crash llc < %s -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr8 2>&1 | 
FileCheck %s
+; RUN: not --crash llc < %s -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr8 2>&1 | 
FileCheck %s

Can we simplify the testcase to only contain one vector type parameter? I think 
that would be sufficient to trigger the error.



Comment at: llvm/test/CodeGen/PowerPC/aix-default-vec-abi.ll:4
+
+define dso_local <4 x i32> @vec_callee(<4 x i32> %vec1, <4 x i32> %vec2, <4 x 
i32> %vec3, <4 x i32> %vec4, <4 x i32> %vec5, <4 x i32> %vec6, <4 x i32> %vec7, 
<4 x i32> %vec8, <4 x i32> %vec9, <4 x i32> %vec10, <4 x i32> %vec11, <4 x i32> 
%vec12, <4 x i32> %vec13, <4 x i32> %vec14) {
+  entry:

ditto: can we simplify the testcase?



Comment at: llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll:7
-; RUN: llc -verify-machineinstrs -mcpu=pwr4 \
-; RUN: -mtriple powerpc-ibm-aix-xcoff  -data-sections=false < %s | 
FileCheck %s
-; RUN: llc -verify-machineinstrs -mcpu=pwr4 \

I am wondering why do we remove `-data-sections=false` here?


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[PATCH] D90892: [AIX][FE] Support constructor/destructor attribute

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 305526.
Xiangling_L marked 2 inline comments as done.
Xiangling_L added a comment.

Update testcases;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90892/new/

https://reviews.llvm.org/D90892

Files:
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-constructor-attribute.c
  clang/test/CodeGen/aix-constructor-attribute.cpp
  clang/test/CodeGen/aix-destructor-attribute.c
  clang/test/CodeGen/aix-destructor-attribute.cpp
  clang/test/CodeGenCXX/aix-constructor-attribute.cpp
  clang/test/CodeGenCXX/aix-destructor-attribute.cpp
  clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp

Index: clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp
===
--- clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp
+++ /dev/null
@@ -1,14 +0,0 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ \
-// RUN: -fregister-global-dtors-with-atexit < %s 2>&1 | \
-// RUN:   FileCheck %s
-
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ \
-// RUN: -fregister-global-dtors-with-atexit < %s 2>&1 | \
-// RUN:   FileCheck %s
-
-struct T {
-  T();
-  ~T();
-} t;
-
-// CHECK: error in backend: register global dtors with atexit() is not supported yet
Index: clang/test/CodeGenCXX/aix-destructor-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGenCXX/aix-destructor-attribute.cpp
@@ -0,0 +1,90 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit < %s | \
+// RUN:   FileCheck --check-prefix=NO-REGISTER %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit < %s | \
+// RUN:   FileCheck --check-prefix=NO-REGISTER %s
+
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit -fregister-global-dtors-with-atexit < %s | \
+// RUN:   FileCheck --check-prefix=REGISTER %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit -fregister-global-dtors-with-atexit < %s | \
+// RUN:   FileCheck --check-prefix=REGISTER %s
+
+struct test {
+  test();
+  ~test();
+} t;
+
+int bar() __attribute__((destructor(100)));
+int bar2() __attribute__((destructor(65535)));
+int bar3(int) __attribute__((destructor(65535)));
+
+int bar() {
+  return 1;
+}
+
+int bar2() {
+  return 2;
+}
+
+int bar3(int a) {
+  return a;
+}
+
+// NO-REGISTER: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__sub_I__, i8* null }]
+// NO-REGISTER: @llvm.global_dtors = appending global [4 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 100, void ()* bitcast (i32 ()* @_Z3barv to void ()*), i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* bitcast (i32 ()* @_Z4bar2v to void ()*), i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* bitcast (i32 (i32)* @_Z4bar3i to void ()*), i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__D_a, i8* null }]
+
+// REGISTER: @llvm.global_ctors = appending global [3 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__sub_I__, i8* null }, { i32, void ()*, i8* } { i32 100, void ()* @__GLOBAL_init_100, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @__GLOBAL_init_65535, i8* null }]
+// REGISTER: @llvm.global_dtors = appending global [3 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__D_a, i8* null }, { i32, void ()*, i8* } { i32 100, void ()* @__GLOBAL_cleanup_100, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @__GLOBAL_cleanup_65535, i8* null }]
+
+// REGISTER: define internal void @__GLOBAL_init_100() [[ATTR:#[0-9]+]] {
+// REGISTER: entry:
+// REGISTER:   %0 = call i32 @atexit(void ()* bitcast (i32 ()* @_Z3barv to void ()*))
+// REGISTER:   ret void
+// REGISTER: }
+
+// REGISTER: define internal void @__GLOBAL_init_65535() [[ATTR:#[0-9]+]] {
+// REGISTER: entry:
+// REGISTER:   %0 = call i32 @atexit(void ()* bitcast (i32 ()* @_Z4bar2v to void ()*))
+// REGISTER:   %1 = call i32 @atexit(void ()* bitcast (i32 (i32)* @_Z4bar3i to void ()*))
+// REGISTER:   ret void
+// REGISTER: }
+
+// REGISTER: define internal void @__GLOBAL_cleanup_100() [[ATTR:#[0-9]+]] {
+// REGISTER: entry:
+// REGISTER:   %0 = call i32 @unatexit(void ()* bitcast (i32 ()* @_Z3barv to void ()*))
+// REGISTER:   %needs_destruct = icmp eq i32 %0, 0
+// REGISTER:   br i1 %needs_destruct, label %destruct.call, label %destruct.end
+
+// REGISTER: destruct.call:
+// REGISTER:   call void bitcast (i32 ()* @_Z3barv to void ()*)()
+// 

[PATCH] D90892: [AIX][FE] Support constructor/destructor attribute

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L marked 5 inline comments as done.
Xiangling_L added inline comments.



Comment at: clang/test/CodeGen/aix-constructor-attribute.cpp:8
 
-int foo() __attribute__((constructor(180)));
+// CHECK: @llvm.global_ctors = appending global [3 x { i32, void ()*, i8* }] 
[{ i32, void ()*, i8* } { i32 65535, void ()* bitcast (i32 ()* @foo3 to void 
()*), i8* null }, { i32, void ()*, i8* } { i32 180, void ()* bitcast (i32 ()* 
@foo2 to void ()*), i8* null }, { i32, void ()*, i8* } { i32 180, void ()* 
bitcast (i32 ()* @foo to void ()*), i8* null }]
 

sfertile wrote:
> Did you mean for this test to be a C or C++ test? If it is meant to be C++ it 
> needs to mangle the function names, but considering the director it is in and 
> the fact we have the same test in CodeGenCXX directory I expect this was 
> meant to be C in which case it needs a `.c` extension and lose the `-x c++` 
> in the run steps.
Thanks for pointing this out to me, I should've changed the file extension when 
I copied this testcase from CXX testcases.



Comment at: clang/test/CodeGenCXX/aix-destructor-attribute.cpp:1
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit < %s | \

sfertile wrote:
> Can I ask why this is added as a new file? Its the same test as 
> `aix-sinit-register-global-dtors-with-atexit.cpp` but without using 
> `-fregister-global-dtors-with-atexit`. I suggest combining the 2.
Agree, it makes more sense to combine two. I tried to make testcases look 
cleaner by splitting them.


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[PATCH] D91361: [AIX][driver] Include crti[_64].o and -bcdtors also for C language link invocations by default

[Xiangling Liao via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG9e407afd9bd3: [AIX][driver] Include crti[_64].o and -bcdtors 
also for C language link… (authored by Xiangling_L).

Changed prior to commit:
  https://reviews.llvm.org/D91361?vs=305160=305501#toc

Repository:
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Files:
  clang/lib/Driver/ToolChains/AIX.cpp
  clang/test/Driver/aix-ld.c

Index: clang/test/Driver/aix-ld.c
===
--- clang/test/Driver/aix-ld.c
+++ clang/test/Driver/aix-ld.c
@@ -16,7 +16,7 @@
 // CHECK-LD32: "-b32"
 // CHECK-LD32: "-bpT:0x1000" "-bpD:0x2000"
 // CHECK-LD32: "[[SYSROOT]]/usr/lib{{/|}}crt0.o"
-// CHECK-LD32-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
+// CHECK-LD32: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
 // CHECK-LD32: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD32-NOT: "-lc++"
 // CHECK-LD32: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc.a"
@@ -38,7 +38,7 @@
 // CHECK-LD64: "-b64"
 // CHECK-LD64: "-bpT:0x1" "-bpD:0x11000"
 // CHECK-LD64: "[[SYSROOT]]/usr/lib{{/|}}crt0_64.o"
-// CHECK-LD64-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
+// CHECK-LD64: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
 // CHECK-LD64: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD64-NOT: "-lc++"
 // CHECK-LD64: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc64.a"
@@ -61,7 +61,7 @@
 // CHECK-LD32-PTHREAD: "-b32"
 // CHECK-LD32-PTHREAD: "-bpT:0x1000" "-bpD:0x2000"
 // CHECK-LD32-PTHREAD: "[[SYSROOT]]/usr/lib{{/|}}crt0.o"
-// CHECK-LD32-PTHREAD-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
+// CHECK-LD32-PTHREAD: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
 // CHECK-LD32-PTHREAD: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD32-PTHREAD-NOT: "-lc++"
 // CHECK-LD32-PTHREAD: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc.a"
@@ -85,7 +85,7 @@
 // CHECK-LD64-PTHREAD: "-b64"
 // CHECK-LD64-PTHREAD: "-bpT:0x1" "-bpD:0x11000"
 // CHECK-LD64-PTHREAD: "[[SYSROOT]]/usr/lib{{/|}}crt0_64.o"
-// CHECK-LD64-PTHREAD-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
+// CHECK-LD64-PTHREAD: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
 // CHECK-LD64-PTHREAD: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD64-PTHREAD-NOT: "-lc++"
 // CHECK-LD64-PTHREAD: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc64.a"
@@ -109,7 +109,7 @@
 // CHECK-LD32-PROF: "-b32"
 // CHECK-LD32-PROF: "-bpT:0x1000" "-bpD:0x2000"
 // CHECK-LD32-PROF: "[[SYSROOT]]/usr/lib{{/|}}mcrt0.o"
-// CHECK-LD32-PROF-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
+// CHECK-LD32-PROF: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
 // CHECK-LD32-PROF: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD32-PROF-NOT: "-lc++"
 // CHECK-LD32-PROF: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc.a"
@@ -132,7 +132,7 @@
 // CHECK-LD64-GPROF: "-b64"
 // CHECK-LD64-GPROF: "-bpT:0x1" "-bpD:0x11000"
 // CHECK-LD64-GPROF: "[[SYSROOT]]/usr/lib{{/|}}gcrt0_64.o"
-// CHECK-LD64-GPROF-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
+// CHECK-LD64-GPROF: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
 // CHECK-LD64-GPROF: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD64-GPROF-NOT: "-lc++"
 // CHECK-LD64-GPROF: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc64.a"
@@ -155,7 +155,7 @@
 // CHECK-LD32-STATIC: "-b32"
 // CHECK-LD32-STATIC: "-bpT:0x1000" "-bpD:0x2000"
 // CHECK-LD32-STATIC: "[[SYSROOT]]/usr/lib{{/|}}crt0.o"
-// CHECK-LD32-STATIC-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
+// CHECK-LD32-STATIC: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
 // CHECK-LD32-STATIC: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD32-STATIC-NOT: "-lc++"
 // CHECK-LD32-STATIC: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc.a"
@@ -178,7 +178,7 @@
 // CHECK-LD32-LIBP: "-b32"
 // CHECK-LD32-LIBP: "-bpT:0x1000" "-bpD:0x2000"
 // CHECK-LD32-LIBP: "[[SYSROOT]]/usr/lib{{/|}}crt0.o"
-// CHECK-LD32-LIBP-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
+// CHECK-LD32-LIBP: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
 // CHECK-LD32-LIBP: "-L[[SYSROOT]]/powerpc-ibm-aix7.1.0.0"
 // CHECK-LD32-LIBP: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD32-LIBP-NOT: "-lc++"
@@ -228,7 +228,7 @@
 // CHECK-LD64-NO-DEFAULT-LIBS: "-b64"
 // CHECK-LD64-NO-DEFAULT-LIBS: "-bpT:0x1" "-bpD:0x11000"
 // CHECK-LD64-NO-DEFAULT-LIBS: "[[SYSROOT]]/usr/lib{{/|}}crt0_64.o"
-// CHECK-LD64-NO-DEFAULT-LIBS-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
+// CHECK-LD64-NO-DEFAULT-LIBS: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
 // CHECK-LD64-NO-DEFAULT-LIBS:  

[PATCH] D91361: [AIX][driver] Include crti[_64].o and -bcdtors also for C language link invocations by default

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 305160.
Xiangling_L added a comment.

Remove the `if` condition and tweak the comments;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D91361/new/

https://reviews.llvm.org/D91361

Files:
  clang/lib/Driver/ToolChains/AIX.cpp
  clang/test/Driver/aix-ld.c

Index: clang/test/Driver/aix-ld.c
===
--- clang/test/Driver/aix-ld.c
+++ clang/test/Driver/aix-ld.c
@@ -16,7 +16,7 @@
 // CHECK-LD32: "-b32"
 // CHECK-LD32: "-bpT:0x1000" "-bpD:0x2000"
 // CHECK-LD32: "[[SYSROOT]]/usr/lib{{/|}}crt0.o"
-// CHECK-LD32-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
+// CHECK-LD32: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
 // CHECK-LD32: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD32-NOT: "-lc++"
 // CHECK-LD32: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc.a"
@@ -38,7 +38,7 @@
 // CHECK-LD64: "-b64"
 // CHECK-LD64: "-bpT:0x1" "-bpD:0x11000"
 // CHECK-LD64: "[[SYSROOT]]/usr/lib{{/|}}crt0_64.o"
-// CHECK-LD64-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
+// CHECK-LD64: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
 // CHECK-LD64: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD64-NOT: "-lc++"
 // CHECK-LD64: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc64.a"
@@ -61,7 +61,7 @@
 // CHECK-LD32-PTHREAD: "-b32"
 // CHECK-LD32-PTHREAD: "-bpT:0x1000" "-bpD:0x2000"
 // CHECK-LD32-PTHREAD: "[[SYSROOT]]/usr/lib{{/|}}crt0.o"
-// CHECK-LD32-PTHREAD-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
+// CHECK-LD32-PTHREAD: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
 // CHECK-LD32-PTHREAD: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD32-PTHREAD-NOT: "-lc++"
 // CHECK-LD32-PTHREAD: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc.a"
@@ -85,7 +85,7 @@
 // CHECK-LD64-PTHREAD: "-b64"
 // CHECK-LD64-PTHREAD: "-bpT:0x1" "-bpD:0x11000"
 // CHECK-LD64-PTHREAD: "[[SYSROOT]]/usr/lib{{/|}}crt0_64.o"
-// CHECK-LD64-PTHREAD-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
+// CHECK-LD64-PTHREAD: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
 // CHECK-LD64-PTHREAD: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD64-PTHREAD-NOT: "-lc++"
 // CHECK-LD64-PTHREAD: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc64.a"
@@ -109,7 +109,7 @@
 // CHECK-LD32-PROF: "-b32"
 // CHECK-LD32-PROF: "-bpT:0x1000" "-bpD:0x2000"
 // CHECK-LD32-PROF: "[[SYSROOT]]/usr/lib{{/|}}mcrt0.o"
-// CHECK-LD32-PROF-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
+// CHECK-LD32-PROF: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
 // CHECK-LD32-PROF: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD32-PROF-NOT: "-lc++"
 // CHECK-LD32-PROF: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc.a"
@@ -132,7 +132,7 @@
 // CHECK-LD64-GPROF: "-b64"
 // CHECK-LD64-GPROF: "-bpT:0x1" "-bpD:0x11000"
 // CHECK-LD64-GPROF: "[[SYSROOT]]/usr/lib{{/|}}gcrt0_64.o"
-// CHECK-LD64-GPROF-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
+// CHECK-LD64-GPROF: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
 // CHECK-LD64-GPROF: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD64-GPROF-NOT: "-lc++"
 // CHECK-LD64-GPROF: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc64.a"
@@ -155,7 +155,7 @@
 // CHECK-LD32-STATIC: "-b32"
 // CHECK-LD32-STATIC: "-bpT:0x1000" "-bpD:0x2000"
 // CHECK-LD32-STATIC: "[[SYSROOT]]/usr/lib{{/|}}crt0.o"
-// CHECK-LD32-STATIC-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
+// CHECK-LD32-STATIC: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
 // CHECK-LD32-STATIC: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD32-STATIC-NOT: "-lc++"
 // CHECK-LD32-STATIC: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc.a"
@@ -178,7 +178,7 @@
 // CHECK-LD32-LIBP: "-b32"
 // CHECK-LD32-LIBP: "-bpT:0x1000" "-bpD:0x2000"
 // CHECK-LD32-LIBP: "[[SYSROOT]]/usr/lib{{/|}}crt0.o"
-// CHECK-LD32-LIBP-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
+// CHECK-LD32-LIBP: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
 // CHECK-LD32-LIBP: "-L[[SYSROOT]]/powerpc-ibm-aix7.1.0.0"
 // CHECK-LD32-LIBP: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD32-LIBP-NOT: "-lc++"
@@ -228,7 +228,7 @@
 // CHECK-LD64-NO-DEFAULT-LIBS: "-b64"
 // CHECK-LD64-NO-DEFAULT-LIBS: "-bpT:0x1" "-bpD:0x11000"
 // CHECK-LD64-NO-DEFAULT-LIBS: "[[SYSROOT]]/usr/lib{{/|}}crt0_64.o"
-// CHECK-LD64-NO-DEFAULT-LIBS-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
+// CHECK-LD64-NO-DEFAULT-LIBS: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
 // CHECK-LD64-NO-DEFAULT-LIBS: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD64-NO-DEFAULT-LIBS-NOT: "-lc++"
 // CHECK-LD64-NO-DEFAULT-LIBS-NOT: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc64.a"
@@ 

[PATCH] D91361: [AIX][driver] Include crti[_64].o and -bcdtors also for C language link invocations by default

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added inline comments.



Comment at: clang/lib/Driver/ToolChains/AIX.cpp:137
 
-if (D.CCCIsCXX())
+if (D.CCCIsCXX() || D.CCCIsCC())
   CmdArgs.push_back(Args.MakeArgString(

daltenty wrote:
> I think that rather that adding CC, we should just pull the if and 
> unconditionally link crti.o. This is consistent with what is done on other 
> platforms and since the `llvm.global_c/dtors` are generally allowable in the 
> IR, we might see them in more than just the two driver scenarios suggested 
> here.
> we should just pull the if and unconditionally link crti.o. ...we might see 
> them in more than just the two driver scenarios suggested here.

I was thinking to use the code to document what exactly  happen is under c++ 
and c mode we link crti.o. But I think it makes sense to just remove `if` as 
you said. But we can indicate it's something for C and CXX mode only? Cuz as 
far as I know, there are c++, c, preprocessor, cl and flang driver mode. I 
think it only make sense for us to see static init functions generated in IR in 
c++ and c mode on AIX?  




Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D91361/new/

https://reviews.llvm.org/D91361

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[PATCH] D90892: [AIX][FE] Support constructor/destructor attribute

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 304896.
Xiangling_L added a comment.

Fix minor issues in the testcase;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90892/new/

https://reviews.llvm.org/D90892

Files:
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-constructor-attribute.cpp
  clang/test/CodeGen/aix-destructor-attribute.cpp
  clang/test/CodeGen/aix-sinit-register-global-dtors-with-atexit.cpp
  clang/test/CodeGenCXX/aix-constructor-attribute.cpp
  clang/test/CodeGenCXX/aix-destructor-attribute.cpp
  clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp

Index: clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp
===
--- clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp
+++ clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp
@@ -1,14 +1,80 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ \
-// RUN: -fregister-global-dtors-with-atexit < %s 2>&1 | \
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit -fregister-global-dtors-with-atexit < %s | \
 // RUN:   FileCheck %s
-
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ \
-// RUN: -fregister-global-dtors-with-atexit < %s 2>&1 | \
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit -fregister-global-dtors-with-atexit < %s | \
 // RUN:   FileCheck %s
 
-struct T {
-  T();
-  ~T();
+int bar() __attribute__((destructor(100)));
+int bar2() __attribute__((destructor(65535)));
+int bar3(int a) __attribute__((destructor(65535)));
+
+int bar() {
+  return 1;
+}
+
+int bar2() {
+  return 2;
+}
+
+int bar3(int a) {
+  return 3;
+}
+
+struct test {
+  test();
+  ~test();
 } t;
 
-// CHECK: error in backend: register global dtors with atexit() is not supported yet
+// CHECK: @llvm.global_ctors = appending global [3 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__sub_I__, i8* null }, { i32, void ()*, i8* } { i32 100, void ()* @__GLOBAL_init_100, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @__GLOBAL_init_65535, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [3 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__D_a, i8* null }, { i32, void ()*, i8* } { i32 100, void ()* @__GLOBAL_cleanup_100, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @__GLOBAL_cleanup_65535, i8* null }]
+
+// CHECK: define internal void @__GLOBAL_init_100() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @atexit(void ()* bitcast (i32 ()* @_Z3barv to void ()*))
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__GLOBAL_init_65535() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @atexit(void ()* bitcast (i32 ()* @_Z4bar2v to void ()*))
+// CHECK:   %1 = call i32 @atexit(void ()* bitcast (i32 (i32)* @_Z4bar3i to void ()*))
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__GLOBAL_cleanup_100() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* bitcast (i32 ()* @_Z3barv to void ()*))
+// CHECK:   %needs_destruct = icmp eq i32 %0, 0
+// CHECK:   br i1 %needs_destruct, label %destruct.call, label %destruct.end
+
+// CHECK: destruct.call:
+// CHECK:   call void bitcast (i32 ()* @_Z3barv to void ()*)()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__GLOBAL_cleanup_65535() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* bitcast (i32 (i32)* @_Z4bar3i to void ()*))
+// CHECK:   %needs_destruct = icmp eq i32 %0, 0
+// CHECK:   br i1 %needs_destruct, label %destruct.call, label %unatexit.call
+
+// CHECK: destruct.call:
+// CHECK:   call void bitcast (i32 (i32)* @_Z4bar3i to void ()*)()
+// CHECK:   br label %unatexit.call
+
+// CHECK: unatexit.call:
+// CHECK:   %1 = call i32 @unatexit(void ()* bitcast (i32 ()* @_Z4bar2v to void ()*))
+// CHECK:   %needs_destruct1 = icmp eq i32 %1, 0
+// CHECK:   br i1 %needs_destruct1, label %destruct.call2, label %destruct.end
+
+// CHECK: destruct.call2:
+// CHECK:   call void bitcast (i32 ()* @_Z4bar2v to void ()*)()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
Index: clang/test/CodeGenCXX/aix-destructor-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGenCXX/aix-destructor-attribute.cpp
@@ -0,0 +1,30 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit < %s | \
+// RUN:   

[PATCH] D91361: [AIX][driver] Include crti[_64].o and -bcdtors also for C language link invocations by default

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L created this revision.
Xiangling_L added reviewers: daltenty, hubert.reinterpretcast, stevewan, 
xingxue.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.
Xiangling_L requested review of this revision.

In order to support __attribute__((__constructor__)) and 
__attribute__((__destructor__)), which is used by various LLVM non-C++ runtime 
components, AIX will include crti[_64].o and -bcdtors for C language link 
invocations by default.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D91361

Files:
  clang/lib/Driver/ToolChains/AIX.cpp
  clang/test/Driver/aix-ld.c

Index: clang/test/Driver/aix-ld.c
===
--- clang/test/Driver/aix-ld.c
+++ clang/test/Driver/aix-ld.c
@@ -16,7 +16,7 @@
 // CHECK-LD32: "-b32"
 // CHECK-LD32: "-bpT:0x1000" "-bpD:0x2000"
 // CHECK-LD32: "[[SYSROOT]]/usr/lib{{/|}}crt0.o"
-// CHECK-LD32-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
+// CHECK-LD32: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
 // CHECK-LD32: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD32-NOT: "-lc++"
 // CHECK-LD32: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc.a"
@@ -38,7 +38,7 @@
 // CHECK-LD64: "-b64"
 // CHECK-LD64: "-bpT:0x1" "-bpD:0x11000"
 // CHECK-LD64: "[[SYSROOT]]/usr/lib{{/|}}crt0_64.o"
-// CHECK-LD64-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
+// CHECK-LD64: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
 // CHECK-LD64: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD64-NOT: "-lc++"
 // CHECK-LD64: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc64.a"
@@ -61,7 +61,7 @@
 // CHECK-LD32-PTHREAD: "-b32"
 // CHECK-LD32-PTHREAD: "-bpT:0x1000" "-bpD:0x2000"
 // CHECK-LD32-PTHREAD: "[[SYSROOT]]/usr/lib{{/|}}crt0.o"
-// CHECK-LD32-PTHREAD-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
+// CHECK-LD32-PTHREAD: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
 // CHECK-LD32-PTHREAD: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD32-PTHREAD-NOT: "-lc++"
 // CHECK-LD32-PTHREAD: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc.a"
@@ -85,7 +85,7 @@
 // CHECK-LD64-PTHREAD: "-b64"
 // CHECK-LD64-PTHREAD: "-bpT:0x1" "-bpD:0x11000"
 // CHECK-LD64-PTHREAD: "[[SYSROOT]]/usr/lib{{/|}}crt0_64.o"
-// CHECK-LD64-PTHREAD-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
+// CHECK-LD64-PTHREAD: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
 // CHECK-LD64-PTHREAD: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD64-PTHREAD-NOT: "-lc++"
 // CHECK-LD64-PTHREAD: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc64.a"
@@ -109,7 +109,7 @@
 // CHECK-LD32-PROF: "-b32"
 // CHECK-LD32-PROF: "-bpT:0x1000" "-bpD:0x2000"
 // CHECK-LD32-PROF: "[[SYSROOT]]/usr/lib{{/|}}mcrt0.o"
-// CHECK-LD32-PROF-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
+// CHECK-LD32-PROF: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
 // CHECK-LD32-PROF: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD32-PROF-NOT: "-lc++"
 // CHECK-LD32-PROF: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc.a"
@@ -132,7 +132,7 @@
 // CHECK-LD64-GPROF: "-b64"
 // CHECK-LD64-GPROF: "-bpT:0x1" "-bpD:0x11000"
 // CHECK-LD64-GPROF: "[[SYSROOT]]/usr/lib{{/|}}gcrt0_64.o"
-// CHECK-LD64-GPROF-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
+// CHECK-LD64-GPROF: "[[SYSROOT]]/usr/lib{{/|}}crti_64.o"
 // CHECK-LD64-GPROF: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD64-GPROF-NOT: "-lc++"
 // CHECK-LD64-GPROF: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc64.a"
@@ -155,7 +155,7 @@
 // CHECK-LD32-STATIC: "-b32"
 // CHECK-LD32-STATIC: "-bpT:0x1000" "-bpD:0x2000"
 // CHECK-LD32-STATIC: "[[SYSROOT]]/usr/lib{{/|}}crt0.o"
-// CHECK-LD32-STATIC-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
+// CHECK-LD32-STATIC: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
 // CHECK-LD32-STATIC: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD32-STATIC-NOT: "-lc++"
 // CHECK-LD32-STATIC: "[[RESOURCE_DIR]]{{/|}}lib{{/|}}aix{{/|}}libclang_rt.builtins-powerpc.a"
@@ -178,7 +178,7 @@
 // CHECK-LD32-LIBP: "-b32"
 // CHECK-LD32-LIBP: "-bpT:0x1000" "-bpD:0x2000"
 // CHECK-LD32-LIBP: "[[SYSROOT]]/usr/lib{{/|}}crt0.o"
-// CHECK-LD32-LIBP-NOT: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
+// CHECK-LD32-LIBP: "[[SYSROOT]]/usr/lib{{/|}}crti.o"
 // CHECK-LD32-LIBP: "-L[[SYSROOT]]/powerpc-ibm-aix7.1.0.0"
 // CHECK-LD32-LIBP: "-L[[SYSROOT]]/usr/lib"
 // CHECK-LD32-LIBP-NOT: "-lc++"
@@ -228,7 +228,7 @@
 // CHECK-LD64-NO-DEFAULT-LIBS: "-b64"
 // CHECK-LD64-NO-DEFAULT-LIBS: "-bpT:0x1" "-bpD:0x11000"
 // CHECK-LD64-NO-DEFAULT-LIBS: "[[SYSROOT]]/usr/lib{{/|}}crt0_64.o"
-// CHECK-LD64-NO-DEFAULT-LIBS-NOT: 

[PATCH] D90892: [AIX][FE] Support constructor/destructor attribute

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 304616.
Xiangling_L added a comment.

Add testcases to both CodeGen and CodeGenCXX folder;


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
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Files:
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-constructor-attribute.cpp
  clang/test/CodeGen/aix-destructor-attribute.cpp
  clang/test/CodeGen/aix-sinit-register-global-dtors-with-atexit.cpp
  clang/test/CodeGenCXX/aix-constructor-attribute.cpp
  clang/test/CodeGenCXX/aix-destructor-attribute.cpp
  clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp

Index: clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp
===
--- clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp
+++ clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp
@@ -1,14 +1,80 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ \
-// RUN: -fregister-global-dtors-with-atexit < %s 2>&1 | \
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit -fregister-global-dtors-with-atexit < %s | \
 // RUN:   FileCheck %s
-
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ \
-// RUN: -fregister-global-dtors-with-atexit < %s 2>&1 | \
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit -fregister-global-dtors-with-atexit < %s | \
 // RUN:   FileCheck %s
 
-struct T {
-  T();
-  ~T();
+int bar() __attribute__((destructor(100)));
+int bar2() __attribute__((destructor(65535)));
+int bar3(int a) __attribute__((destructor(65535)));
+
+int bar() {
+  return 1;
+}
+
+int bar2() {
+  return 2;
+}
+
+int bar3(int a) {
+  return 3;
+}
+
+struct test {
+  test();
+  ~test();
 } t;
 
-// CHECK: error in backend: register global dtors with atexit() is not supported yet
+// CHECK: @llvm.global_ctors = appending global [3 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__sub_I__, i8* null }, { i32, void ()*, i8* } { i32 100, void ()* @__GLOBAL_init_100, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @__GLOBAL_init_65535, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [3 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__D_a, i8* null }, { i32, void ()*, i8* } { i32 100, void ()* @__GLOBAL_cleanup_100, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @__GLOBAL_cleanup_65535, i8* null }]
+
+// CHECK: define internal void @__GLOBAL_init_100() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @atexit(void ()* bitcast (i32 ()* @_Z3barv to void ()*))
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__GLOBAL_init_65535() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @atexit(void ()* bitcast (i32 ()* @_Z4bar2v to void ()*))
+// CHECK:   %1 = call i32 @atexit(void ()* bitcast (i32 (i32)* @_Z4bar3i to void ()*))
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__GLOBAL_cleanup_100() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* bitcast (i32 ()* @_Z3barv to void ()*))
+// CHECK:   %needs_destruct = icmp eq i32 %0, 0
+// CHECK:   br i1 %needs_destruct, label %destruct.call, label %destruct.end
+
+// CHECK: destruct.call:
+// CHECK:   call void bitcast (i32 ()* @_Z3barv to void ()*)()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__GLOBAL_cleanup_65535() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* bitcast (i32 (i32)* @_Z4bar3i to void ()*))
+// CHECK:   %needs_destruct = icmp eq i32 %0, 0
+// CHECK:   br i1 %needs_destruct, label %destruct.call, label %unatexit.call
+
+// CHECK: destruct.call:
+// CHECK:   call void bitcast (i32 (i32)* @_Z4bar3i to void ()*)()
+// CHECK:   br label %unatexit.call
+
+// CHECK: unatexit.call:
+// CHECK:   %1 = call i32 @unatexit(void ()* bitcast (i32 ()* @_Z4bar2v to void ()*))
+// CHECK:   %needs_destruct1 = icmp eq i32 %1, 0
+// CHECK:   br i1 %needs_destruct1, label %destruct.call2, label %destruct.end
+
+// CHECK: destruct.call2:
+// CHECK:   call void bitcast (i32 ()* @_Z4bar2v to void ()*)()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
Index: clang/test/CodeGenCXX/aix-destructor-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGenCXX/aix-destructor-attribute.cpp
@@ -0,0 +1,30 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm \

[PATCH] D90892: [AIX][FE] Support constructor/destructor attribute

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added a comment.

In D90892#2386908 , @aaron.ballman 
wrote:

> I think this generally seems reasonable, but I'm far from an AIX expert so 
> you should wait a few days in case other reviewers have feedback.

Thanks for reviews. And @sfertile has kindly offered a further review.


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[PATCH] D90892: [AIX][FE] Support constructor/destructor attribute

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 304256.
Xiangling_L added a comment.

Address comments;
Move testcases to CodeGen folder instead of CodeGenCXX since ctor/dtor 
attribute should work in both C++ mode;


Repository:
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Files:
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-constructor-attribute.cpp
  clang/test/CodeGen/aix-destructor-attribute.cpp
  clang/test/CodeGen/aix-sinit-register-global-dtors-with-atexit.cpp
  clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp

Index: clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp
===
--- clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp
+++ /dev/null
@@ -1,14 +0,0 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ \
-// RUN: -fregister-global-dtors-with-atexit < %s 2>&1 | \
-// RUN:   FileCheck %s
-
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ \
-// RUN: -fregister-global-dtors-with-atexit < %s 2>&1 | \
-// RUN:   FileCheck %s
-
-struct T {
-  T();
-  ~T();
-} t;
-
-// CHECK: error in backend: register global dtors with atexit() is not supported yet
Index: clang/test/CodeGen/aix-sinit-register-global-dtors-with-atexit.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-sinit-register-global-dtors-with-atexit.cpp
@@ -0,0 +1,80 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit -fregister-global-dtors-with-atexit < %s | \
+// RUN:   FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit -fregister-global-dtors-with-atexit < %s | \
+// RUN:   FileCheck %s
+
+int bar() __attribute__((destructor(100)));
+int bar2() __attribute__((destructor(65535)));
+int bar3(int a) __attribute__((destructor(65535)));
+
+int bar() {
+  return 1;
+}
+
+int bar2() {
+  return 2;
+}
+
+int bar3(int a) {
+  return 3;
+}
+
+struct test {
+  test();
+  ~test();
+} t;
+
+// CHECK: @llvm.global_ctors = appending global [3 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__sub_I__, i8* null }, { i32, void ()*, i8* } { i32 100, void ()* @__GLOBAL_init_100, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @__GLOBAL_init_65535, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [3 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__D_a, i8* null }, { i32, void ()*, i8* } { i32 100, void ()* @__GLOBAL_cleanup_100, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @__GLOBAL_cleanup_65535, i8* null }]
+
+// CHECK: define internal void @__GLOBAL_init_100() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @atexit(void ()* bitcast (i32 ()* @_Z3barv to void ()*))
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__GLOBAL_init_65535() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @atexit(void ()* bitcast (i32 ()* @_Z4bar2v to void ()*))
+// CHECK:   %1 = call i32 @atexit(void ()* bitcast (i32 (i32)* @_Z4bar3i to void ()*))
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__GLOBAL_cleanup_100() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* bitcast (i32 ()* @_Z3barv to void ()*))
+// CHECK:   %needs_destruct = icmp eq i32 %0, 0
+// CHECK:   br i1 %needs_destruct, label %destruct.call, label %destruct.end
+
+// CHECK: destruct.call:
+// CHECK:   call void bitcast (i32 ()* @_Z3barv to void ()*)()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__GLOBAL_cleanup_65535() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* bitcast (i32 (i32)* @_Z4bar3i to void ()*))
+// CHECK:   %needs_destruct = icmp eq i32 %0, 0
+// CHECK:   br i1 %needs_destruct, label %destruct.call, label %unatexit.call
+
+// CHECK: destruct.call:
+// CHECK:   call void bitcast (i32 (i32)* @_Z4bar3i to void ()*)()
+// CHECK:   br label %unatexit.call
+
+// CHECK: unatexit.call:
+// CHECK:   %1 = call i32 @unatexit(void ()* bitcast (i32 ()* @_Z4bar2v to void ()*))
+// CHECK:   %needs_destruct1 = icmp eq i32 %1, 0
+// CHECK:   br i1 %needs_destruct1, label %destruct.call2, label %destruct.end
+
+// CHECK: destruct.call2:
+// CHECK:   call void bitcast (i32 ()* @_Z4bar2v to void ()*)()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
Index: clang/test/CodeGen/aix-destructor-attribute.cpp

[PATCH] D90892: [AIX][FE] Support constructor/destructor attribute

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L marked 2 inline comments as done.
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/CodeGenModule.h:1482
+  void AddGlobalDtor(llvm::Function *Dtor, int Priority = 65535,
+ bool IsDtorAttrFunc = false);
 

aaron.ballman wrote:
> Xiangling_L wrote:
> > aaron.ballman wrote:
> > > Xiangling_L wrote:
> > > > aaron.ballman wrote:
> > > > > There's a fixme comment a few lines up about hardcoding priority 
> > > > > being gross and this sort of extends the grossness a bit. Perhaps 
> > > > > these functions should accept a `DestructorAttr *`/`ConstructorAttr 
> > > > > *` that can be null?
> > > > Yeah, I can understand that putting a magic number as 65535 here is 
> > > > gross, but a `bool` with default argument also falls into that way? Or 
> > > > you are indicating it's better to not use default argument?
> > > I think the signature should be:
> > > ```
> > > void AddGlobalDtor(llvm::Function *Dtor, DestructorAttr *DA = nullptr);
> > > ```
> > > (I don't have strong opinions about whether the attribute pointer should 
> > > be defaulted to null or not.) `IsDtorAttrFunc` is implied by a nonnull 
> > > pointer and the priority can be gleaned directly from that attribute (or 
> > > set to the magic number if the attribute pointer is null).
> > Oh, I see what do you mean here. But the issue is `AddGlobalDtor` is not 
> > only used for dtor attribute functions, so we cannot always glean the 
> > priority from a `DestructorAttr`.
> > 
> > If use `DestructorAttr`, the function signature has to be:
> > 
> > 
> > ```
> > void AddGlobalDtor(llvm::Function *Dtor, int Priority, DestructorAttr *DA = 
> > nullptr);
> > ```
> > 
> > So that's why I think a `bool` is good enough here.
> > Oh, I see what do you mean here. But the issue is AddGlobalDtor is not only 
> > used for dtor attribute functions, so we cannot always glean the priority 
> > from a DestructorAttr.
> 
> The only place that calls `AddGlobalDtor()` without an attribute handy is 
> `AddCXXStermFinalizerToGlobalDtor()` and the only call to that function 
> always passes in the value `65535` (in ItaniumCXXABI.cpp), so passing a null 
> attribute pointer there will behave correctly.
The reason why `AddCXXStermFinalizerToGlobalDtor() ` currently always pass in 
65535 is because priority hasn't been supported by AIX yet(You can find the 
assertion few lines above there). And that would happen in the near future. 

The same thing happens in function `EmitCXXGlobalCleanUpFunc()`, after we 
support init priority, we won't always use default value.


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[PATCH] D90892: [AIX][FE] Support constructor/destructor attribute

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Xiangling_L marked 5 inline comments as done.
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/CodeGenModule.h:1482
+  void AddGlobalDtor(llvm::Function *Dtor, int Priority = 65535,
+ bool IsDtorAttrFunc = false);
 

aaron.ballman wrote:
> Xiangling_L wrote:
> > aaron.ballman wrote:
> > > There's a fixme comment a few lines up about hardcoding priority being 
> > > gross and this sort of extends the grossness a bit. Perhaps these 
> > > functions should accept a `DestructorAttr *`/`ConstructorAttr *` that can 
> > > be null?
> > Yeah, I can understand that putting a magic number as 65535 here is gross, 
> > but a `bool` with default argument also falls into that way? Or you are 
> > indicating it's better to not use default argument?
> I think the signature should be:
> ```
> void AddGlobalDtor(llvm::Function *Dtor, DestructorAttr *DA = nullptr);
> ```
> (I don't have strong opinions about whether the attribute pointer should be 
> defaulted to null or not.) `IsDtorAttrFunc` is implied by a nonnull pointer 
> and the priority can be gleaned directly from that attribute (or set to the 
> magic number if the attribute pointer is null).
Oh, I see what do you mean here. But the issue is `AddGlobalDtor` is not only 
used for dtor attribute functions, so we cannot always glean the priority from 
a `DestructorAttr`.

If use `DestructorAttr`, the function signature has to be:


```
void AddGlobalDtor(llvm::Function *Dtor, int Priority, DestructorAttr *DA = 
nullptr);
```

So that's why I think a `bool` is good enough here.



Comment at: clang/lib/CodeGen/ItaniumCXXABI.cpp:2584
+  // We're assuming that the destructor function is something we can
+  // reasonably call with the default CC.  Go ahead and cast it to the
+  // right prototype.

aaron.ballman wrote:
> Xiangling_L wrote:
> > aaron.ballman wrote:
> > > Is this assumption safe though given that there are calling convention 
> > > attributes that can be written on the function?
> > Actually I copied this comment from where linux implemented the dtor 
> > attribute functions. I think it makes sense to make this assumption. 
> > Because when they are used as destructor functions, they actually don't 
> > have any caller from source.
> Ah, the comment confused me because the user could always write something 
> like:
> ```
> [[clang::stdcall, gnu::destructor]] void func();
> ```
> where the destructor function is not something you can call with the default 
> (cdecl) calling convention. Should the comment say "we can reasonably call 
> with the correct CC" instead to avoid this confusion?
Sure, that would make more sense under AIX context.


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[PATCH] D90892: [AIX][FE] Support constructor/destructor attribute

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Xiangling_L marked 6 inline comments as done.
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/CodeGenModule.h:1482
+  void AddGlobalDtor(llvm::Function *Dtor, int Priority = 65535,
+ bool IsDtorAttrFunc = false);
 

aaron.ballman wrote:
> There's a fixme comment a few lines up about hardcoding priority being gross 
> and this sort of extends the grossness a bit. Perhaps these functions should 
> accept a `DestructorAttr *`/`ConstructorAttr *` that can be null?
Yeah, I can understand that putting a magic number as 65535 here is gross, but 
a `bool` with default argument also falls into that way? Or you are indicating 
it's better to not use default argument?



Comment at: clang/lib/CodeGen/ItaniumCXXABI.cpp:2537
+  // priority.
+  CodeGenFunction CGF(CGM);
+

aaron.ballman wrote:
> Do you need this? I think you can get `VoidTy` off `CGM` already which seems 
> to be the only use of `CGF`.
Thanks, you are right. I am gonna remove it.



Comment at: clang/lib/CodeGen/ItaniumCXXABI.cpp:2584
+  // We're assuming that the destructor function is something we can
+  // reasonably call with the default CC.  Go ahead and cast it to the
+  // right prototype.

aaron.ballman wrote:
> Is this assumption safe though given that there are calling convention 
> attributes that can be written on the function?
Actually I copied this comment from where linux implemented the dtor attribute 
functions. I think it makes sense to make this assumption. Because when they 
are used as destructor functions, they actually don't have any caller from 
source.


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[PATCH] D90892: [AIX][FE] Support constructor/destructor attribute

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Xiangling_L updated this revision to Diff 303272.
Xiangling_L added a comment.

Remove unused function parameters;
Move testcases to CodeGenCXX folder;


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Files:
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-constructor-attribute.cpp
  clang/test/CodeGen/aix-destructor-attribute.cpp
  clang/test/CodeGenCXX/aix-constructor-attribute.cpp
  clang/test/CodeGenCXX/aix-destructor-attribute.cpp
  clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp

Index: clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp
===
--- clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp
+++ clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp
@@ -1,14 +1,80 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ \
-// RUN: -fregister-global-dtors-with-atexit < %s 2>&1 | \
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit -fregister-global-dtors-with-atexit < %s | \
 // RUN:   FileCheck %s
-
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ \
-// RUN: -fregister-global-dtors-with-atexit < %s 2>&1 | \
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit -fregister-global-dtors-with-atexit < %s | \
 // RUN:   FileCheck %s
 
-struct T {
-  T();
-  ~T();
+int bar() __attribute__((destructor(100)));
+int bar2() __attribute__((destructor(65535)));
+int bar3(int a) __attribute__((destructor(65535)));
+
+int bar() {
+  return 1;
+}
+
+int bar2() {
+  return 2;
+}
+
+int bar3(int a) {
+  return 3;
+}
+
+struct test {
+  test();
+  ~test();
 } t;
 
-// CHECK: error in backend: register global dtors with atexit() is not supported yet
+// CHECK: @llvm.global_ctors = appending global [3 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__sub_I__, i8* null }, { i32, void ()*, i8* } { i32 100, void ()* @__GLOBAL_init_100, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @__GLOBAL_init_65535, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [3 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__D_a, i8* null }, { i32, void ()*, i8* } { i32 100, void ()* @__GLOBAL_cleanup_100, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @__GLOBAL_cleanup_65535, i8* null }]
+
+// CHECK: define internal void @__GLOBAL_init_100() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @atexit(void ()* bitcast (i32 ()* @_Z3barv to void ()*))
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__GLOBAL_init_65535() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @atexit(void ()* bitcast (i32 ()* @_Z4bar2v to void ()*))
+// CHECK:   %1 = call i32 @atexit(void ()* bitcast (i32 (i32)* @_Z4bar3i to void ()*))
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__GLOBAL_cleanup_100() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* bitcast (i32 ()* @_Z3barv to void ()*))
+// CHECK:   %needs_destruct = icmp eq i32 %0, 0
+// CHECK:   br i1 %needs_destruct, label %destruct.call, label %destruct.end
+
+// CHECK: destruct.call:
+// CHECK:   call void bitcast (i32 ()* @_Z3barv to void ()*)()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__GLOBAL_cleanup_65535() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* bitcast (i32 (i32)* @_Z4bar3i to void ()*))
+// CHECK:   %needs_destruct = icmp eq i32 %0, 0
+// CHECK:   br i1 %needs_destruct, label %destruct.call, label %unatexit.call
+
+// CHECK: destruct.call:
+// CHECK:   call void bitcast (i32 (i32)* @_Z4bar3i to void ()*)()
+// CHECK:   br label %unatexit.call
+
+// CHECK: unatexit.call:
+// CHECK:   %1 = call i32 @unatexit(void ()* bitcast (i32 ()* @_Z4bar2v to void ()*))
+// CHECK:   %needs_destruct1 = icmp eq i32 %1, 0
+// CHECK:   br i1 %needs_destruct1, label %destruct.call2, label %destruct.end
+
+// CHECK: destruct.call2:
+// CHECK:   call void bitcast (i32 ()* @_Z4bar2v to void ()*)()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
Index: clang/test/CodeGenCXX/aix-destructor-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGenCXX/aix-destructor-attribute.cpp
@@ -0,0 +1,30 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit < %s | \
+// RUN:   FileCheck %s
+// RUN: %clang_cc1 

[PATCH] D90892: [AIX][FE] Support constructor/destructor attribute

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L created this revision.
Xiangling_L added reviewers: hubert.reinterpretcast, jasonliu, yusra.syeda, 
aaron.ballman, sfertile, hfinkel.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.
Xiangling_L requested review of this revision.

Support __attribute__((constructor)) and __attribute__((destructor)) on AIX


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D90892

Files:
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-constructor-attribute.cpp
  clang/test/CodeGen/aix-destructor-attribute.cpp
  clang/test/CodeGenCXX/aix-destructor-attribute.cpp
  clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp

Index: clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp
===
--- clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp
+++ clang/test/CodeGenCXX/aix-sinit-register-global-dtors-with-atexit.cpp
@@ -1,14 +1,80 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ \
-// RUN: -fregister-global-dtors-with-atexit < %s 2>&1 | \
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit -fregister-global-dtors-with-atexit < %s | \
 // RUN:   FileCheck %s
-
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ \
-// RUN: -fregister-global-dtors-with-atexit < %s 2>&1 | \
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm \
+// RUN: -fno-use-cxa-atexit -fregister-global-dtors-with-atexit < %s | \
 // RUN:   FileCheck %s
 
-struct T {
-  T();
-  ~T();
+int bar() __attribute__((destructor(100)));
+int bar2() __attribute__((destructor(65535)));
+int bar3(int a) __attribute__((destructor(65535)));
+
+int bar() {
+  return 1;
+}
+
+int bar2() {
+  return 2;
+}
+
+int bar3(int a) {
+  return 3;
+}
+
+struct test {
+  test();
+  ~test();
 } t;
 
-// CHECK: error in backend: register global dtors with atexit() is not supported yet
+// CHECK: @llvm.global_ctors = appending global [3 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__sub_I__, i8* null }, { i32, void ()*, i8* } { i32 100, void ()* @__GLOBAL_init_100, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @__GLOBAL_init_65535, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [3 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__D_a, i8* null }, { i32, void ()*, i8* } { i32 100, void ()* @__GLOBAL_cleanup_100, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @__GLOBAL_cleanup_65535, i8* null }]
+
+// CHECK: define internal void @__GLOBAL_init_100() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @atexit(void ()* bitcast (i32 ()* @_Z3barv to void ()*))
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__GLOBAL_init_65535() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @atexit(void ()* bitcast (i32 ()* @_Z4bar2v to void ()*))
+// CHECK:   %1 = call i32 @atexit(void ()* bitcast (i32 (i32)* @_Z4bar3i to void ()*))
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__GLOBAL_cleanup_100() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* bitcast (i32 ()* @_Z3barv to void ()*))
+// CHECK:   %needs_destruct = icmp eq i32 %0, 0
+// CHECK:   br i1 %needs_destruct, label %destruct.call, label %destruct.end
+
+// CHECK: destruct.call:
+// CHECK:   call void bitcast (i32 ()* @_Z3barv to void ()*)()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__GLOBAL_cleanup_65535() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* bitcast (i32 (i32)* @_Z4bar3i to void ()*))
+// CHECK:   %needs_destruct = icmp eq i32 %0, 0
+// CHECK:   br i1 %needs_destruct, label %destruct.call, label %unatexit.call
+
+// CHECK: destruct.call:
+// CHECK:   call void bitcast (i32 (i32)* @_Z4bar3i to void ()*)()
+// CHECK:   br label %unatexit.call
+
+// CHECK: unatexit.call:
+// CHECK:   %1 = call i32 @unatexit(void ()* bitcast (i32 ()* @_Z4bar2v to void ()*))
+// CHECK:   %needs_destruct1 = icmp eq i32 %1, 0
+// CHECK:   br i1 %needs_destruct1, label %destruct.call2, label %destruct.end
+
+// CHECK: destruct.call2:
+// CHECK:   call void bitcast (i32 ()* @_Z4bar2v to void ()*)()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
Index: clang/test/CodeGenCXX/aix-destructor-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGenCXX/aix-destructor-attribute.cpp
@@ -0,0 +1,30 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff 

[PATCH] D90187: [NFC] Remove max_align.c LIT testcase

[Xiangling Liao via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG357715ce97d0: [NFC] Remove max_align.c LIT testcase 
(authored by Xiangling_L).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90187/new/

https://reviews.llvm.org/D90187

Files:
  clang/test/Headers/max_align.c


Index: clang/test/Headers/max_align.c
===
--- clang/test/Headers/max_align.c
+++ /dev/null
@@ -1,12 +0,0 @@
-// RUN: %clang_cc1 -fsyntax-only -std=c11 -verify %s
-// expected-no-diagnostics
-
-// XFAIL: windows-, i686
-
-#ifndef __BIGGEST_ALIGNMENT__
-#error __BIGGEST_ALIGNMENT__ not defined
-#endif
-
-#include 
-
-_Static_assert(__BIGGEST_ALIGNMENT__ == _Alignof(max_align_t), "");


Index: clang/test/Headers/max_align.c
===
--- clang/test/Headers/max_align.c
+++ /dev/null
@@ -1,12 +0,0 @@
-// RUN: %clang_cc1 -fsyntax-only -std=c11 -verify %s
-// expected-no-diagnostics
-
-// XFAIL: windows-, i686
-
-#ifndef __BIGGEST_ALIGNMENT__
-#error __BIGGEST_ALIGNMENT__ not defined
-#endif
-
-#include 
-
-_Static_assert(__BIGGEST_ALIGNMENT__ == _Alignof(max_align_t), "");
___
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cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D90063: [AIX] Also error on -G for link-only step

[Xiangling Liao via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG3d4aebbb9d99: [AIX] Also error on -G for link-only step 
(authored by Xiangling_L).

Changed prior to commit:
  https://reviews.llvm.org/D90063?vs=300391=300782#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90063/new/

https://reviews.llvm.org/D90063

Files:
  clang/lib/Driver/Driver.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/aix-err-options.c


Index: clang/test/Driver/aix-err-options.c
===
--- clang/test/Driver/aix-err-options.c
+++ clang/test/Driver/aix-err-options.c
@@ -1,7 +1,28 @@
-// RUN: %clang -target powerpc32-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
 // RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | 
\
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.s -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -o dummy.so \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.o -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
 // RUN: %clang -target powerpc64-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
 // RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -c -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -c \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.s -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -o dummy.so \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.o -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
 
-// CHECK32: error: unsupported option '-G' for target 'powerpc32-ibm-aix-xcoff'
+// CHECK32: error: unsupported option '-G' for target 'powerpc-ibm-aix-xcoff'
 // CHECK64: error: unsupported option '-G' for target 'powerpc64-ibm-aix-xcoff'
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -4958,11 +4958,6 @@
   if (D.CCGenDiagnostics)
 CmdArgs.push_back("-disable-pragma-debug-crash");
 
-  if (RawTriple.isOSAIX())
-if (Arg *A = Args.getLastArg(options::OPT_G))
-  D.Diag(diag::err_drv_unsupported_opt_for_target)
-  << A->getSpelling() << RawTriple.str();
-
   bool UseSeparateSections = isUseSeparateSections(Triple);
 
   if (Args.hasFlag(options::OPT_ffunction_sections,
Index: clang/lib/Driver/Driver.cpp
===
--- clang/lib/Driver/Driver.cpp
+++ clang/lib/Driver/Driver.cpp
@@ -3888,9 +3888,15 @@
 }
   }
 
+  const llvm::Triple  = C.getDefaultToolChain().getTriple();
+  if (RawTriple.isOSAIX())
+if (Arg *A = C.getArgs().getLastArg(options::OPT_G))
+  Diag(diag::err_drv_unsupported_opt_for_target)
+  << A->getSpelling() << RawTriple.str();
+
   // Collect the list of architectures.
   llvm::StringSet<> ArchNames;
-  if (C.getDefaultToolChain().getTriple().isOSBinFormatMachO())
+  if (RawTriple.isOSBinFormatMachO())
 for (const Arg *A : C.getArgs())
   if (A->getOption().matches(options::OPT_arch))
 ArchNames.insert(A->getValue());


Index: clang/test/Driver/aix-err-options.c
===
--- clang/test/Driver/aix-err-options.c
+++ clang/test/Driver/aix-err-options.c
@@ -1,7 +1,28 @@
-// RUN: %clang -target powerpc32-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
 // RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.s -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -o dummy.so \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.o -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
 // RUN: %clang -target 

[PATCH] D90187: [NFC] Remove max_align.c LIT testcase

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L created this revision.
Xiangling_L added reviewers: hubert.reinterpretcast, jasonliu, daltenty.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.
Xiangling_L requested review of this revision.

Since we fixed the definition of `SuitableAlign` here: 
https://reviews.llvm.org/D88659, `max_align_t` and `__BIGGEST_ALIGNMENT__` 
should not be same always.

The original testcase was added here: https://reviews.llvm.org/D59048


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D90187

Files:
  clang/test/Headers/max_align.c


Index: clang/test/Headers/max_align.c
===
--- clang/test/Headers/max_align.c
+++ /dev/null
@@ -1,12 +0,0 @@
-// RUN: %clang_cc1 -fsyntax-only -std=c11 -verify %s
-// expected-no-diagnostics
-
-// XFAIL: windows-, i686
-
-#ifndef __BIGGEST_ALIGNMENT__
-#error __BIGGEST_ALIGNMENT__ not defined
-#endif
-
-#include 
-
-_Static_assert(__BIGGEST_ALIGNMENT__ == _Alignof(max_align_t), "");


Index: clang/test/Headers/max_align.c
===
--- clang/test/Headers/max_align.c
+++ /dev/null
@@ -1,12 +0,0 @@
-// RUN: %clang_cc1 -fsyntax-only -std=c11 -verify %s
-// expected-no-diagnostics
-
-// XFAIL: windows-, i686
-
-#ifndef __BIGGEST_ALIGNMENT__
-#error __BIGGEST_ALIGNMENT__ not defined
-#endif
-
-#include 
-
-_Static_assert(__BIGGEST_ALIGNMENT__ == _Alignof(max_align_t), "");
___
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[PATCH] D90063: [AIX] Also error on -G for link-only step

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 300391.
Xiangling_L added a comment.

Fixed the duplication in the testcase;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90063/new/

https://reviews.llvm.org/D90063

Files:
  clang/lib/Driver/Driver.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/Inputs/aix_ppc_tree/dummy0.o
  clang/test/Driver/aix-err-options.c


Index: clang/test/Driver/aix-err-options.c
===
--- clang/test/Driver/aix-err-options.c
+++ clang/test/Driver/aix-err-options.c
@@ -1,7 +1,28 @@
-// RUN: %clang -target powerpc32-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
 // RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | 
\
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.s -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -o dummy.so \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.o -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
 // RUN: %clang -target powerpc64-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
 // RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -c -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -c \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.s -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -o dummy.so \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.o -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
 
-// CHECK32: error: unsupported option '-G' for target 'powerpc32-ibm-aix-xcoff'
+// CHECK32: error: unsupported option '-G' for target 'powerpc-ibm-aix-xcoff'
 // CHECK64: error: unsupported option '-G' for target 'powerpc64-ibm-aix-xcoff'
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -4958,11 +4958,6 @@
   if (D.CCGenDiagnostics)
 CmdArgs.push_back("-disable-pragma-debug-crash");
 
-  if (RawTriple.isOSAIX())
-if (Arg *A = Args.getLastArg(options::OPT_G))
-  D.Diag(diag::err_drv_unsupported_opt_for_target)
-  << A->getSpelling() << RawTriple.str();
-
   bool UseSeparateSections = isUseSeparateSections(Triple);
 
   if (Args.hasFlag(options::OPT_ffunction_sections,
Index: clang/lib/Driver/Driver.cpp
===
--- clang/lib/Driver/Driver.cpp
+++ clang/lib/Driver/Driver.cpp
@@ -3876,9 +3876,15 @@
 }
   }
 
+  const llvm::Triple  = C.getDefaultToolChain().getTriple();
+  if (RawTriple.isOSAIX())
+if (Arg *A = C.getArgs().getLastArg(options::OPT_G))
+  Diag(diag::err_drv_unsupported_opt_for_target)
+  << A->getSpelling() << RawTriple.str();
+
   // Collect the list of architectures.
   llvm::StringSet<> ArchNames;
-  if (C.getDefaultToolChain().getTriple().isOSBinFormatMachO())
+  if (RawTriple.isOSBinFormatMachO())
 for (const Arg *A : C.getArgs())
   if (A->getOption().matches(options::OPT_arch))
 ArchNames.insert(A->getValue());


Index: clang/test/Driver/aix-err-options.c
===
--- clang/test/Driver/aix-err-options.c
+++ clang/test/Driver/aix-err-options.c
@@ -1,7 +1,28 @@
-// RUN: %clang -target powerpc32-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
 // RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.s -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -o dummy.so \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.o -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
 // RUN: %clang -target powerpc64-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
 // RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target 

[PATCH] D89910: [AIX] Let alloca return 16 bytes alignment

[Xiangling Liao via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG05bef88eb3ec: [AIX] Let alloca return 16 bytes alignment 
(authored by Xiangling_L).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89910/new/

https://reviews.llvm.org/D89910

Files:
  clang/lib/Basic/Targets/PPC.h
  clang/test/CodeGen/aix_alloca_align.c
  clang/test/Preprocessor/init-ppc.c
  clang/test/Preprocessor/init-ppc64.c


Index: clang/test/Preprocessor/init-ppc64.c
===
--- clang/test/Preprocessor/init-ppc64.c
+++ clang/test/Preprocessor/init-ppc64.c
@@ -666,7 +666,7 @@
 // PPC64-AIX:#define _LP64 1
 // PPC64-AIX:#define _POWER 1
 // PPC64-AIX:#define __64BIT__ 1
-// PPC64-AIX:#define __BIGGEST_ALIGNMENT__ 8
+// PPC64-AIX:#define __BIGGEST_ALIGNMENT__ 16
 // PPC64-AIX:#define __BIG_ENDIAN__ 1
 // PPC64-AIX:#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__
 // PPC64-AIX:#define __CHAR16_TYPE__ unsigned short
Index: clang/test/Preprocessor/init-ppc.c
===
--- clang/test/Preprocessor/init-ppc.c
+++ clang/test/Preprocessor/init-ppc.c
@@ -398,7 +398,7 @@
 // PPC-AIX:#define _LONG_LONG 1
 // PPC-AIX-NOT:#define _LP64 1
 // PPC-AIX:#define _POWER 1
-// PPC-AIX:#define __BIGGEST_ALIGNMENT__ 8
+// PPC-AIX:#define __BIGGEST_ALIGNMENT__ 16
 // PPC-AIX:#define __BIG_ENDIAN__ 1
 // PPC-AIX:#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__
 // PPC-AIX:#define __CHAR16_TYPE__ unsigned short
Index: clang/test/CodeGen/aix_alloca_align.c
===
--- /dev/null
+++ clang/test/CodeGen/aix_alloca_align.c
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -triple=powerpc-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck --check-prefix=32BIT %s
+
+// RUN: %clang_cc1 -triple=powerpc64-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck --check-prefix=64BIT %s
+
+typedef __SIZE_TYPE__ size_t;
+extern void *alloca(size_t __size) __attribute__((__nothrow__));
+
+void foo() {
+  char *ptr1 = (char *)alloca(sizeof(char) * 9);
+  char *ptr2 = (char *)alloca(sizeof(char) * 32);
+}
+
+// 32BIT: %0 = alloca i8, i32 9, align 16
+// 32BIT: %1 = alloca i8, i32 32, align 16
+
+// 64BIT: %0 = alloca i8, i64 9, align 16
+// 64BIT: %1 = alloca i8, i64 32, align 16
Index: clang/lib/Basic/Targets/PPC.h
===
--- clang/lib/Basic/Targets/PPC.h
+++ clang/lib/Basic/Targets/PPC.h
@@ -370,7 +370,6 @@
   SizeType = UnsignedLong;
   PtrDiffType = SignedLong;
   IntPtrType = SignedLong;
-  SuitableAlign = 64;
   LongDoubleWidth = 64;
   LongDoubleAlign = DoubleAlign = 32;
   LongDoubleFormat = ::APFloat::IEEEdouble();
@@ -409,7 +408,6 @@
 if (Triple.isOSAIX()) {
   // TODO: Set appropriate ABI for AIX platform.
   DataLayout = "E-m:a-i64:64-n32:64";
-  SuitableAlign = 64;
   LongDoubleWidth = 64;
   LongDoubleAlign = DoubleAlign = 32;
   LongDoubleFormat = ::APFloat::IEEEdouble();


Index: clang/test/Preprocessor/init-ppc64.c
===
--- clang/test/Preprocessor/init-ppc64.c
+++ clang/test/Preprocessor/init-ppc64.c
@@ -666,7 +666,7 @@
 // PPC64-AIX:#define _LP64 1
 // PPC64-AIX:#define _POWER 1
 // PPC64-AIX:#define __64BIT__ 1
-// PPC64-AIX:#define __BIGGEST_ALIGNMENT__ 8
+// PPC64-AIX:#define __BIGGEST_ALIGNMENT__ 16
 // PPC64-AIX:#define __BIG_ENDIAN__ 1
 // PPC64-AIX:#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__
 // PPC64-AIX:#define __CHAR16_TYPE__ unsigned short
Index: clang/test/Preprocessor/init-ppc.c
===
--- clang/test/Preprocessor/init-ppc.c
+++ clang/test/Preprocessor/init-ppc.c
@@ -398,7 +398,7 @@
 // PPC-AIX:#define _LONG_LONG 1
 // PPC-AIX-NOT:#define _LP64 1
 // PPC-AIX:#define _POWER 1
-// PPC-AIX:#define __BIGGEST_ALIGNMENT__ 8
+// PPC-AIX:#define __BIGGEST_ALIGNMENT__ 16
 // PPC-AIX:#define __BIG_ENDIAN__ 1
 // PPC-AIX:#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__
 // PPC-AIX:#define __CHAR16_TYPE__ unsigned short
Index: clang/test/CodeGen/aix_alloca_align.c
===
--- /dev/null
+++ clang/test/CodeGen/aix_alloca_align.c
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -triple=powerpc-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck --check-prefix=32BIT %s
+
+// RUN: %clang_cc1 -triple=powerpc64-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck --check-prefix=64BIT %s
+
+typedef __SIZE_TYPE__ size_t;
+extern void *alloca(size_t __size) __attribute__((__nothrow__));
+
+void foo() {
+  char *ptr1 = (char *)alloca(sizeof(char) * 9);
+  char *ptr2 = (char *)alloca(sizeof(char) * 32);
+}
+
+// 32BIT: %0 = alloca i8, i32 9, align 16
+// 32BIT: %1 = alloca i8, i32 32, align 16
+
+// 64BIT: %0 = alloca i8, i64 9, align 16
+// 64BIT: 

[PATCH] D90063: [AIX] Also error on -G for link-only step

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L created this revision.
Xiangling_L added reviewers: hubert.reinterpretcast, daltenty, jasonliu.
Herald added subscribers: cfe-commits, kbarton, nemanjai.
Herald added a project: clang.
Xiangling_L requested review of this revision.

The change in [[ https://reviews.llvm.org/D89897 | [AIX] Emit error for -G 
option on AIX ]] didn't issue an error for link-only steps. The patch fixes 
that problem and also update related testcases.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D90063

Files:
  clang/lib/Driver/Driver.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/Inputs/aix_ppc_tree/dummy0.o
  clang/test/Driver/aix-err-options.c


Index: clang/test/Driver/aix-err-options.c
===
--- clang/test/Driver/aix-err-options.c
+++ clang/test/Driver/aix-err-options.c
@@ -1,7 +1,28 @@
-// RUN: %clang -target powerpc32-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
 // RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | 
\
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.s -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -o dummy.so \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.o -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+
 // RUN: %clang -target powerpc64-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
 // RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -c -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -c \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.s -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -o dummy.so \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.o -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
 
-// CHECK32: error: unsupported option '-G' for target 'powerpc32-ibm-aix-xcoff'
+// CHECK32: error: unsupported option '-G' for target 'powerpc-ibm-aix-xcoff'
 // CHECK64: error: unsupported option '-G' for target 'powerpc64-ibm-aix-xcoff'
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -4958,11 +4958,6 @@
   if (D.CCGenDiagnostics)
 CmdArgs.push_back("-disable-pragma-debug-crash");
 
-  if (RawTriple.isOSAIX())
-if (Arg *A = Args.getLastArg(options::OPT_G))
-  D.Diag(diag::err_drv_unsupported_opt_for_target)
-  << A->getSpelling() << RawTriple.str();
-
   bool UseSeparateSections = isUseSeparateSections(Triple);
 
   if (Args.hasFlag(options::OPT_ffunction_sections,
Index: clang/lib/Driver/Driver.cpp
===
--- clang/lib/Driver/Driver.cpp
+++ clang/lib/Driver/Driver.cpp
@@ -3876,9 +3876,15 @@
 }
   }
 
+  const llvm::Triple  = C.getDefaultToolChain().getTriple();
+  if (RawTriple.isOSAIX())
+if (Arg *A = C.getArgs().getLastArg(options::OPT_G))
+  Diag(diag::err_drv_unsupported_opt_for_target)
+  << A->getSpelling() << RawTriple.str();
+
   // Collect the list of architectures.
   llvm::StringSet<> ArchNames;
-  if (C.getDefaultToolChain().getTriple().isOSBinFormatMachO())
+  if (RawTriple.isOSBinFormatMachO())
 for (const Arg *A : C.getArgs())
   if (A->getOption().matches(options::OPT_arch))
 ArchNames.insert(A->getValue());


Index: clang/test/Driver/aix-err-options.c
===
--- clang/test/Driver/aix-err-options.c
+++ clang/test/Driver/aix-err-options.c
@@ -1,7 +1,28 @@
-// RUN: %clang -target powerpc32-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
 // RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.s -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -o dummy.so \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.o -G 0 2>&1 | \
+// RUN:   FileCheck 

[PATCH] D89897: [AIX] Emit error for -G option on AIX

[Xiangling Liao via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG0ba98433971f: [AIX] Emit error for -G option on AIX 
(authored by Xiangling_L).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89897/new/

https://reviews.llvm.org/D89897

Files:
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/aix-err-options.c
  llvm/CMakeLists.txt


Index: llvm/CMakeLists.txt
===
--- llvm/CMakeLists.txt
+++ llvm/CMakeLists.txt
@@ -930,7 +930,7 @@
 
   # Modules should be built with -G, so we can use runtime linking with
   # plugins.
-  string(APPEND CMAKE_MODULE_LINKER_FLAGS " -G")
+  string(APPEND CMAKE_MODULE_LINKER_FLAGS " -Wl,-G")
 
   # Also set the correct flags for building shared libraries.
   string(APPEND CMAKE_SHARED_LINKER_FLAGS " -shared")
Index: clang/test/Driver/aix-err-options.c
===
--- /dev/null
+++ clang/test/Driver/aix-err-options.c
@@ -0,0 +1,7 @@
+// RUN: %clang -target powerpc32-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+
+// CHECK32: error: unsupported option '-G' for target 'powerpc32-ibm-aix-xcoff'
+// CHECK64: error: unsupported option '-G' for target 'powerpc64-ibm-aix-xcoff'
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -4958,6 +4958,11 @@
   if (D.CCGenDiagnostics)
 CmdArgs.push_back("-disable-pragma-debug-crash");
 
+  if (RawTriple.isOSAIX())
+if (Arg *A = Args.getLastArg(options::OPT_G))
+  D.Diag(diag::err_drv_unsupported_opt_for_target)
+  << A->getSpelling() << RawTriple.str();
+
   bool UseSeparateSections = isUseSeparateSections(Triple);
 
   if (Args.hasFlag(options::OPT_ffunction_sections,


Index: llvm/CMakeLists.txt
===
--- llvm/CMakeLists.txt
+++ llvm/CMakeLists.txt
@@ -930,7 +930,7 @@
 
   # Modules should be built with -G, so we can use runtime linking with
   # plugins.
-  string(APPEND CMAKE_MODULE_LINKER_FLAGS " -G")
+  string(APPEND CMAKE_MODULE_LINKER_FLAGS " -Wl,-G")
 
   # Also set the correct flags for building shared libraries.
   string(APPEND CMAKE_SHARED_LINKER_FLAGS " -shared")
Index: clang/test/Driver/aix-err-options.c
===
--- /dev/null
+++ clang/test/Driver/aix-err-options.c
@@ -0,0 +1,7 @@
+// RUN: %clang -target powerpc32-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+
+// CHECK32: error: unsupported option '-G' for target 'powerpc32-ibm-aix-xcoff'
+// CHECK64: error: unsupported option '-G' for target 'powerpc64-ibm-aix-xcoff'
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -4958,6 +4958,11 @@
   if (D.CCGenDiagnostics)
 CmdArgs.push_back("-disable-pragma-debug-crash");
 
+  if (RawTriple.isOSAIX())
+if (Arg *A = Args.getLastArg(options::OPT_G))
+  D.Diag(diag::err_drv_unsupported_opt_for_target)
+  << A->getSpelling() << RawTriple.str();
+
   bool UseSeparateSections = isUseSeparateSections(Triple);
 
   if (Args.hasFlag(options::OPT_ffunction_sections,
___
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[PATCH] D88659: [NFC] Fix the definition of SuitableAlign

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L closed this revision.
Xiangling_L added a comment.

Manually close the revision after landing it upstream.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88659/new/

https://reviews.llvm.org/D88659

___
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[PATCH] D89910: [AIX] Let alloca return 16 bytes alignment

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 300043.
Xiangling_L marked an inline comment as done.
Xiangling_L added a comment.

Add one case to the test;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89910/new/

https://reviews.llvm.org/D89910

Files:
  clang/lib/Basic/Targets/PPC.h
  clang/test/CodeGen/aix_alloca_align.c
  clang/test/Preprocessor/init-ppc.c
  clang/test/Preprocessor/init-ppc64.c


Index: clang/test/Preprocessor/init-ppc64.c
===
--- clang/test/Preprocessor/init-ppc64.c
+++ clang/test/Preprocessor/init-ppc64.c
@@ -666,7 +666,7 @@
 // PPC64-AIX:#define _LP64 1
 // PPC64-AIX:#define _POWER 1
 // PPC64-AIX:#define __64BIT__ 1
-// PPC64-AIX:#define __BIGGEST_ALIGNMENT__ 8
+// PPC64-AIX:#define __BIGGEST_ALIGNMENT__ 16
 // PPC64-AIX:#define __BIG_ENDIAN__ 1
 // PPC64-AIX:#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__
 // PPC64-AIX:#define __CHAR16_TYPE__ unsigned short
Index: clang/test/Preprocessor/init-ppc.c
===
--- clang/test/Preprocessor/init-ppc.c
+++ clang/test/Preprocessor/init-ppc.c
@@ -398,7 +398,7 @@
 // PPC-AIX:#define _LONG_LONG 1
 // PPC-AIX-NOT:#define _LP64 1
 // PPC-AIX:#define _POWER 1
-// PPC-AIX:#define __BIGGEST_ALIGNMENT__ 8
+// PPC-AIX:#define __BIGGEST_ALIGNMENT__ 16
 // PPC-AIX:#define __BIG_ENDIAN__ 1
 // PPC-AIX:#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__
 // PPC-AIX:#define __CHAR16_TYPE__ unsigned short
Index: clang/test/CodeGen/aix_alloca_align.c
===
--- /dev/null
+++ clang/test/CodeGen/aix_alloca_align.c
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -triple=powerpc-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck --check-prefix=32BIT %s
+
+// RUN: %clang_cc1 -triple=powerpc64-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck --check-prefix=64BIT %s
+
+typedef __SIZE_TYPE__ size_t;
+extern void *alloca(size_t __size) __attribute__((__nothrow__));
+
+void foo() {
+  char *ptr1 = (char *)alloca(sizeof(char) * 9);
+  char *ptr2 = (char *)alloca(sizeof(char) * 32);
+}
+
+// 32BIT: %0 = alloca i8, i32 9, align 16
+// 32BIT: %1 = alloca i8, i32 32, align 16
+
+// 64BIT: %0 = alloca i8, i64 9, align 16
+// 64BIT: %1 = alloca i8, i64 32, align 16
Index: clang/lib/Basic/Targets/PPC.h
===
--- clang/lib/Basic/Targets/PPC.h
+++ clang/lib/Basic/Targets/PPC.h
@@ -370,7 +370,6 @@
   SizeType = UnsignedLong;
   PtrDiffType = SignedLong;
   IntPtrType = SignedLong;
-  SuitableAlign = 64;
   LongDoubleWidth = 64;
   LongDoubleAlign = DoubleAlign = 32;
   LongDoubleFormat = ::APFloat::IEEEdouble();
@@ -409,7 +408,6 @@
 if (Triple.isOSAIX()) {
   // TODO: Set appropriate ABI for AIX platform.
   DataLayout = "E-m:a-i64:64-n32:64";
-  SuitableAlign = 64;
   LongDoubleWidth = 64;
   LongDoubleAlign = DoubleAlign = 32;
   LongDoubleFormat = ::APFloat::IEEEdouble();


Index: clang/test/Preprocessor/init-ppc64.c
===
--- clang/test/Preprocessor/init-ppc64.c
+++ clang/test/Preprocessor/init-ppc64.c
@@ -666,7 +666,7 @@
 // PPC64-AIX:#define _LP64 1
 // PPC64-AIX:#define _POWER 1
 // PPC64-AIX:#define __64BIT__ 1
-// PPC64-AIX:#define __BIGGEST_ALIGNMENT__ 8
+// PPC64-AIX:#define __BIGGEST_ALIGNMENT__ 16
 // PPC64-AIX:#define __BIG_ENDIAN__ 1
 // PPC64-AIX:#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__
 // PPC64-AIX:#define __CHAR16_TYPE__ unsigned short
Index: clang/test/Preprocessor/init-ppc.c
===
--- clang/test/Preprocessor/init-ppc.c
+++ clang/test/Preprocessor/init-ppc.c
@@ -398,7 +398,7 @@
 // PPC-AIX:#define _LONG_LONG 1
 // PPC-AIX-NOT:#define _LP64 1
 // PPC-AIX:#define _POWER 1
-// PPC-AIX:#define __BIGGEST_ALIGNMENT__ 8
+// PPC-AIX:#define __BIGGEST_ALIGNMENT__ 16
 // PPC-AIX:#define __BIG_ENDIAN__ 1
 // PPC-AIX:#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__
 // PPC-AIX:#define __CHAR16_TYPE__ unsigned short
Index: clang/test/CodeGen/aix_alloca_align.c
===
--- /dev/null
+++ clang/test/CodeGen/aix_alloca_align.c
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -triple=powerpc-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck --check-prefix=32BIT %s
+
+// RUN: %clang_cc1 -triple=powerpc64-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck --check-prefix=64BIT %s
+
+typedef __SIZE_TYPE__ size_t;
+extern void *alloca(size_t __size) __attribute__((__nothrow__));
+
+void foo() {
+  char *ptr1 = (char *)alloca(sizeof(char) * 9);
+  char *ptr2 = (char *)alloca(sizeof(char) * 32);
+}
+
+// 32BIT: %0 = alloca i8, i32 9, align 16
+// 32BIT: %1 = alloca i8, i32 32, align 16
+
+// 64BIT: %0 = alloca i8, i64 9, align 16
+// 64BIT: %1 = alloca i8, i64 32, align 16
Index: 

[PATCH] D89910: [AIX] Let alloca return 16 bytes alignment

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Xiangling_L added inline comments.



Comment at: clang/test/CodeGen/aix_alloca_align.c:11
+void foo() {
+  char *ptr1 = (char *)alloca(sizeof(char) * 9);
+}

hubert.reinterpretcast wrote:
> I'm not entirely sure, but can we try for size 32 and see if we get 16?
Sure, I will add this in.


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[PATCH] D89897: [AIX] Emit error for -G option on AIX

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Xiangling_L updated this revision to Diff 21.
Xiangling_L marked an inline comment as done.
Xiangling_L added a comment.

Fix the formatting issues;


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Files:
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/aix-err-options.c
  llvm/CMakeLists.txt


Index: llvm/CMakeLists.txt
===
--- llvm/CMakeLists.txt
+++ llvm/CMakeLists.txt
@@ -930,7 +930,7 @@
 
   # Modules should be built with -G, so we can use runtime linking with
   # plugins.
-  string(APPEND CMAKE_MODULE_LINKER_FLAGS " -G")
+  string(APPEND CMAKE_MODULE_LINKER_FLAGS " -Wl,-G")
 
   # Also set the correct flags for building shared libraries.
   string(APPEND CMAKE_SHARED_LINKER_FLAGS " -shared")
Index: clang/test/Driver/aix-err-options.c
===
--- /dev/null
+++ clang/test/Driver/aix-err-options.c
@@ -0,0 +1,7 @@
+// RUN: %clang -target powerpc32-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+
+// CHECK32: error: unsupported option '-G' for target 'powerpc32-ibm-aix-xcoff'
+// CHECK64: error: unsupported option '-G' for target 'powerpc64-ibm-aix-xcoff'
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -4958,6 +4958,11 @@
   if (D.CCGenDiagnostics)
 CmdArgs.push_back("-disable-pragma-debug-crash");
 
+  if (RawTriple.isOSAIX())
+if (Arg *A = Args.getLastArg(options::OPT_G))
+  D.Diag(diag::err_drv_unsupported_opt_for_target)
+  << A->getSpelling() << RawTriple.str();
+
   bool UseSeparateSections = isUseSeparateSections(Triple);
 
   if (Args.hasFlag(options::OPT_ffunction_sections,


Index: llvm/CMakeLists.txt
===
--- llvm/CMakeLists.txt
+++ llvm/CMakeLists.txt
@@ -930,7 +930,7 @@
 
   # Modules should be built with -G, so we can use runtime linking with
   # plugins.
-  string(APPEND CMAKE_MODULE_LINKER_FLAGS " -G")
+  string(APPEND CMAKE_MODULE_LINKER_FLAGS " -Wl,-G")
 
   # Also set the correct flags for building shared libraries.
   string(APPEND CMAKE_SHARED_LINKER_FLAGS " -shared")
Index: clang/test/Driver/aix-err-options.c
===
--- /dev/null
+++ clang/test/Driver/aix-err-options.c
@@ -0,0 +1,7 @@
+// RUN: %clang -target powerpc32-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+
+// CHECK32: error: unsupported option '-G' for target 'powerpc32-ibm-aix-xcoff'
+// CHECK64: error: unsupported option '-G' for target 'powerpc64-ibm-aix-xcoff'
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -4958,6 +4958,11 @@
   if (D.CCGenDiagnostics)
 CmdArgs.push_back("-disable-pragma-debug-crash");
 
+  if (RawTriple.isOSAIX())
+if (Arg *A = Args.getLastArg(options::OPT_G))
+  D.Diag(diag::err_drv_unsupported_opt_for_target)
+  << A->getSpelling() << RawTriple.str();
+
   bool UseSeparateSections = isUseSeparateSections(Triple);
 
   if (Args.hasFlag(options::OPT_ffunction_sections,
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[PATCH] D89897: [AIX] Emit error for -G option on AIX

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Xiangling_L marked 3 inline comments as done.
Xiangling_L added inline comments.



Comment at: clang/test/Driver/aix-err-options.c:1
+// RUN: %clang -target powerpc32-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
+// RUN:   FileCheck -check-prefix=CHECK32 %s

hubert.reinterpretcast wrote:
> Does this need a call to `not`?
Using `not` will fail the testcase.


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[PATCH] D89910: [AIX] Let alloca return 16 bytes alignment

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 299975.
Xiangling_L marked 3 inline comments as done.
Xiangling_L added a comment.

Fixed the testcase formatting issues;
Fixed the `BIGGEST_ALIGNMENT` value in testcases;


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Files:
  clang/lib/Basic/Targets/PPC.h
  clang/test/CodeGen/aix_alloca_align.c
  clang/test/Preprocessor/init-ppc.c
  clang/test/Preprocessor/init-ppc64.c


Index: clang/test/Preprocessor/init-ppc64.c
===
--- clang/test/Preprocessor/init-ppc64.c
+++ clang/test/Preprocessor/init-ppc64.c
@@ -666,7 +666,7 @@
 // PPC64-AIX:#define _LP64 1
 // PPC64-AIX:#define _POWER 1
 // PPC64-AIX:#define __64BIT__ 1
-// PPC64-AIX:#define __BIGGEST_ALIGNMENT__ 8
+// PPC64-AIX:#define __BIGGEST_ALIGNMENT__ 16
 // PPC64-AIX:#define __BIG_ENDIAN__ 1
 // PPC64-AIX:#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__
 // PPC64-AIX:#define __CHAR16_TYPE__ unsigned short
Index: clang/test/Preprocessor/init-ppc.c
===
--- clang/test/Preprocessor/init-ppc.c
+++ clang/test/Preprocessor/init-ppc.c
@@ -398,7 +398,7 @@
 // PPC-AIX:#define _LONG_LONG 1
 // PPC-AIX-NOT:#define _LP64 1
 // PPC-AIX:#define _POWER 1
-// PPC-AIX:#define __BIGGEST_ALIGNMENT__ 8
+// PPC-AIX:#define __BIGGEST_ALIGNMENT__ 16
 // PPC-AIX:#define __BIG_ENDIAN__ 1
 // PPC-AIX:#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__
 // PPC-AIX:#define __CHAR16_TYPE__ unsigned short
Index: clang/test/CodeGen/aix_alloca_align.c
===
--- /dev/null
+++ clang/test/CodeGen/aix_alloca_align.c
@@ -0,0 +1,15 @@
+// RUN: %clang_cc1 -triple=powerpc-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck --check-prefix=32BIT %s
+
+// RUN: %clang_cc1 -triple=powerpc64-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck --check-prefix=64BIT %s
+
+typedef __SIZE_TYPE__ size_t;
+extern void *alloca(size_t __size) __attribute__((__nothrow__));
+
+void foo() {
+  char *ptr1 = (char *)alloca(sizeof(char) * 9);
+}
+
+// 32BIT: %0 = alloca i8, i32 9, align 16
+// 64BIT: %0 = alloca i8, i64 9, align 16
Index: clang/lib/Basic/Targets/PPC.h
===
--- clang/lib/Basic/Targets/PPC.h
+++ clang/lib/Basic/Targets/PPC.h
@@ -370,7 +370,6 @@
   SizeType = UnsignedLong;
   PtrDiffType = SignedLong;
   IntPtrType = SignedLong;
-  SuitableAlign = 64;
   LongDoubleWidth = 64;
   LongDoubleAlign = DoubleAlign = 32;
   LongDoubleFormat = ::APFloat::IEEEdouble();
@@ -409,7 +408,6 @@
 if (Triple.isOSAIX()) {
   // TODO: Set appropriate ABI for AIX platform.
   DataLayout = "E-m:a-i64:64-n32:64";
-  SuitableAlign = 64;
   LongDoubleWidth = 64;
   LongDoubleAlign = DoubleAlign = 32;
   LongDoubleFormat = ::APFloat::IEEEdouble();


Index: clang/test/Preprocessor/init-ppc64.c
===
--- clang/test/Preprocessor/init-ppc64.c
+++ clang/test/Preprocessor/init-ppc64.c
@@ -666,7 +666,7 @@
 // PPC64-AIX:#define _LP64 1
 // PPC64-AIX:#define _POWER 1
 // PPC64-AIX:#define __64BIT__ 1
-// PPC64-AIX:#define __BIGGEST_ALIGNMENT__ 8
+// PPC64-AIX:#define __BIGGEST_ALIGNMENT__ 16
 // PPC64-AIX:#define __BIG_ENDIAN__ 1
 // PPC64-AIX:#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__
 // PPC64-AIX:#define __CHAR16_TYPE__ unsigned short
Index: clang/test/Preprocessor/init-ppc.c
===
--- clang/test/Preprocessor/init-ppc.c
+++ clang/test/Preprocessor/init-ppc.c
@@ -398,7 +398,7 @@
 // PPC-AIX:#define _LONG_LONG 1
 // PPC-AIX-NOT:#define _LP64 1
 // PPC-AIX:#define _POWER 1
-// PPC-AIX:#define __BIGGEST_ALIGNMENT__ 8
+// PPC-AIX:#define __BIGGEST_ALIGNMENT__ 16
 // PPC-AIX:#define __BIG_ENDIAN__ 1
 // PPC-AIX:#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__
 // PPC-AIX:#define __CHAR16_TYPE__ unsigned short
Index: clang/test/CodeGen/aix_alloca_align.c
===
--- /dev/null
+++ clang/test/CodeGen/aix_alloca_align.c
@@ -0,0 +1,15 @@
+// RUN: %clang_cc1 -triple=powerpc-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck --check-prefix=32BIT %s
+
+// RUN: %clang_cc1 -triple=powerpc64-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck --check-prefix=64BIT %s
+
+typedef __SIZE_TYPE__ size_t;
+extern void *alloca(size_t __size) __attribute__((__nothrow__));
+
+void foo() {
+  char *ptr1 = (char *)alloca(sizeof(char) * 9);
+}
+
+// 32BIT: %0 = alloca i8, i32 9, align 16
+// 64BIT: %0 = alloca i8, i64 9, align 16
Index: clang/lib/Basic/Targets/PPC.h
===
--- clang/lib/Basic/Targets/PPC.h
+++ clang/lib/Basic/Targets/PPC.h
@@ -370,7 +370,6 @@
   SizeType = UnsignedLong;
   PtrDiffType = 

[PATCH] D89897: [AIX] Emit error for -G option on AIX

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L marked an inline comment as done.
Xiangling_L added inline comments.



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:4924
 
+  if (RawTriple.isOSAIX())
+if (Arg *A = Args.getLastArg(options::OPT_G)) {

jasonliu wrote:
> Question: When do we query `RawTriple`, and when we should query `Triple`?
`RawTriple` in this function means the triple you passed in or the default one.

`Triple` in this function means `a ToolChain's effective triple`.
An effective triple is:

> the Clang triple to use for this target, which may take into account the 
> command line arguments. For example, on Darwin the -mmacosx-version-min= 
> command line argument (which
> sets the deployment target) determines the version in the triple passed to 
> Clang.

So I feel, if there is no special condition we need to consider, we just use 
`RawTriple`.




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[PATCH] D89910: [AIX] Let alloca return 16 bytes alignment

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L created this revision.
Xiangling_L added reviewers: hubert.reinterpretcast, jasonliu, ZarkoCA.
Herald added subscribers: cfe-commits, dexonsmith, kbarton, nemanjai.
Herald added a project: clang.
Xiangling_L requested review of this revision.

On AIX, to support vector types, which should always be 16bytes aligned, we set 
`alloca` to return 16 bytes aligned memory space.


Repository:
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Files:
  clang/lib/Basic/Targets/PPC.h
  clang/test/CodeGen/aix_alloca_align.c


Index: clang/test/CodeGen/aix_alloca_align.c
===
--- /dev/null
+++ clang/test/CodeGen/aix_alloca_align.c
@@ -0,0 +1,15 @@
+// RUN: %clang_cc1 -triple=powerpc-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck -check-prefix 32BIT %s
+
+// RUN: %clang_cc1 -triple=powerpc64-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck -check-prefix 64BIT %s
+
+typedef long unsigned int size_t;
+extern void *alloca(size_t __size) __attribute__((__nothrow__));
+
+void foo() {
+  char *ptr1 = (char *)alloca(sizeof(char) * 9);
+}
+
+// 32BIT: %0 = alloca i8, i32 9, align 16
+// 64BIT: %0 = alloca i8, i64 9, align 16
Index: clang/lib/Basic/Targets/PPC.h
===
--- clang/lib/Basic/Targets/PPC.h
+++ clang/lib/Basic/Targets/PPC.h
@@ -370,7 +370,6 @@
   SizeType = UnsignedLong;
   PtrDiffType = SignedLong;
   IntPtrType = SignedLong;
-  SuitableAlign = 64;
   LongDoubleWidth = 64;
   LongDoubleAlign = DoubleAlign = 32;
   LongDoubleFormat = ::APFloat::IEEEdouble();
@@ -409,7 +408,6 @@
 if (Triple.isOSAIX()) {
   // TODO: Set appropriate ABI for AIX platform.
   DataLayout = "E-m:a-i64:64-n32:64";
-  SuitableAlign = 64;
   LongDoubleWidth = 64;
   LongDoubleAlign = DoubleAlign = 32;
   LongDoubleFormat = ::APFloat::IEEEdouble();


Index: clang/test/CodeGen/aix_alloca_align.c
===
--- /dev/null
+++ clang/test/CodeGen/aix_alloca_align.c
@@ -0,0 +1,15 @@
+// RUN: %clang_cc1 -triple=powerpc-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck -check-prefix 32BIT %s
+
+// RUN: %clang_cc1 -triple=powerpc64-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck -check-prefix 64BIT %s
+
+typedef long unsigned int size_t;
+extern void *alloca(size_t __size) __attribute__((__nothrow__));
+
+void foo() {
+  char *ptr1 = (char *)alloca(sizeof(char) * 9);
+}
+
+// 32BIT: %0 = alloca i8, i32 9, align 16
+// 64BIT: %0 = alloca i8, i64 9, align 16
Index: clang/lib/Basic/Targets/PPC.h
===
--- clang/lib/Basic/Targets/PPC.h
+++ clang/lib/Basic/Targets/PPC.h
@@ -370,7 +370,6 @@
   SizeType = UnsignedLong;
   PtrDiffType = SignedLong;
   IntPtrType = SignedLong;
-  SuitableAlign = 64;
   LongDoubleWidth = 64;
   LongDoubleAlign = DoubleAlign = 32;
   LongDoubleFormat = ::APFloat::IEEEdouble();
@@ -409,7 +408,6 @@
 if (Triple.isOSAIX()) {
   // TODO: Set appropriate ABI for AIX platform.
   DataLayout = "E-m:a-i64:64-n32:64";
-  SuitableAlign = 64;
   LongDoubleWidth = 64;
   LongDoubleAlign = DoubleAlign = 32;
   LongDoubleFormat = ::APFloat::IEEEdouble();
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[PATCH] D89897: [AIX] Emit error for -G option on AIX

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L created this revision.
Xiangling_L added reviewers: jasonliu, hubert.reinterpretcast, daltenty.
Herald added subscribers: llvm-commits, cfe-commits, mgorny.
Herald added projects: clang, LLVM.
Xiangling_L requested review of this revision.

1. Emit error for -G driver option on AIX
2. Adjust cmake file to use `-Wl,-G` instead of -G


Repository:
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https://reviews.llvm.org/D89897

Files:
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/aix-err-options.c
  llvm/CMakeLists.txt


Index: llvm/CMakeLists.txt
===
--- llvm/CMakeLists.txt
+++ llvm/CMakeLists.txt
@@ -930,7 +930,7 @@
 
   # Modules should be built with -G, so we can use runtime linking with
   # plugins.
-  string(APPEND CMAKE_MODULE_LINKER_FLAGS " -G")
+  string(APPEND CMAKE_MODULE_LINKER_FLAGS " -Wl,-G")
 
   # Also set the correct flags for building shared libraries.
   string(APPEND CMAKE_SHARED_LINKER_FLAGS " -shared")
Index: clang/test/Driver/aix-err-options.c
===
--- /dev/null
+++ clang/test/Driver/aix-err-options.c
@@ -0,0 +1,7 @@
+// RUN: %clang -target powerpc32-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
+// RUN:   FileCheck -check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
+// RUN:   FileCheck -check-prefix=CHECK64 %s
+
+// CHECK32: error: unsupported option '-G' for target 'powerpc32-ibm-aix-xcoff'
+// CHECK64: error: unsupported option '-G' for target 'powerpc64-ibm-aix-xcoff'
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -4921,6 +4921,12 @@
   if (D.CCGenDiagnostics)
 CmdArgs.push_back("-disable-pragma-debug-crash");
 
+  if (RawTriple.isOSAIX())
+if (Arg *A = Args.getLastArg(options::OPT_G)) {
+  D.Diag(diag::err_drv_unsupported_opt_for_target)
+  << A->getSpelling() << RawTriple.str();
+}
+
   bool UseSeparateSections = isUseSeparateSections(Triple);
 
   if (Args.hasFlag(options::OPT_ffunction_sections,


Index: llvm/CMakeLists.txt
===
--- llvm/CMakeLists.txt
+++ llvm/CMakeLists.txt
@@ -930,7 +930,7 @@
 
   # Modules should be built with -G, so we can use runtime linking with
   # plugins.
-  string(APPEND CMAKE_MODULE_LINKER_FLAGS " -G")
+  string(APPEND CMAKE_MODULE_LINKER_FLAGS " -Wl,-G")
 
   # Also set the correct flags for building shared libraries.
   string(APPEND CMAKE_SHARED_LINKER_FLAGS " -shared")
Index: clang/test/Driver/aix-err-options.c
===
--- /dev/null
+++ clang/test/Driver/aix-err-options.c
@@ -0,0 +1,7 @@
+// RUN: %clang -target powerpc32-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
+// RUN:   FileCheck -check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
+// RUN:   FileCheck -check-prefix=CHECK64 %s
+
+// CHECK32: error: unsupported option '-G' for target 'powerpc32-ibm-aix-xcoff'
+// CHECK64: error: unsupported option '-G' for target 'powerpc64-ibm-aix-xcoff'
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -4921,6 +4921,12 @@
   if (D.CCGenDiagnostics)
 CmdArgs.push_back("-disable-pragma-debug-crash");
 
+  if (RawTriple.isOSAIX())
+if (Arg *A = Args.getLastArg(options::OPT_G)) {
+  D.Diag(diag::err_drv_unsupported_opt_for_target)
+  << A->getSpelling() << RawTriple.str();
+}
+
   bool UseSeparateSections = isUseSeparateSections(Triple);
 
   if (Args.hasFlag(options::OPT_ffunction_sections,
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[PATCH] D88659: [FE]Split SuitableAlign into two parts

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 299404.
Xiangling_L added a comment.
Herald added a subscriber: dexonsmith.

Edit the definition of `SuitableAlign`;


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Files:
  clang/include/clang/Basic/TargetInfo.h


Index: clang/include/clang/Basic/TargetInfo.h
===
--- clang/include/clang/Basic/TargetInfo.h
+++ clang/include/clang/Basic/TargetInfo.h
@@ -581,8 +581,9 @@
   /// Determine whether constrained floating point is supported on this target.
   virtual bool hasStrictFP() const { return HasStrictFP; }
 
-  /// Return the alignment that is suitable for storing any
-  /// object with a fundamental alignment requirement.
+  /// Return the alignment that is the largest alignment ever used for any
+  /// scalar/SIMD data type on the target machine you are compiling for
+  /// (including types with an extended alignment requirement).
   unsigned getSuitableAlign() const { return SuitableAlign; }
 
   /// Return the default alignment for __attribute__((aligned)) on


Index: clang/include/clang/Basic/TargetInfo.h
===
--- clang/include/clang/Basic/TargetInfo.h
+++ clang/include/clang/Basic/TargetInfo.h
@@ -581,8 +581,9 @@
   /// Determine whether constrained floating point is supported on this target.
   virtual bool hasStrictFP() const { return HasStrictFP; }
 
-  /// Return the alignment that is suitable for storing any
-  /// object with a fundamental alignment requirement.
+  /// Return the alignment that is the largest alignment ever used for any
+  /// scalar/SIMD data type on the target machine you are compiling for
+  /// (including types with an extended alignment requirement).
   unsigned getSuitableAlign() const { return SuitableAlign; }
 
   /// Return the default alignment for __attribute__((aligned)) on
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[PATCH] D89684: [AIX] Add mvecnvol and mnovecnvol options to enable the AIX extended and default vector ABIs.

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added inline comments.
Herald added a subscriber: dexonsmith.



Comment at: llvm/lib/CodeGen/CommandFlags.cpp:489
 Options.FloatABIType = getFloatABIForCalls();
+  Options.AIXExtendedAltivecABI = getAIXExtendedAltivecABI();
   Options.NoZerosInBSS = getDontPlaceZerosInBSS();

Should we also check `-vecnvol` option is used for AIX only somewhere?



Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:6927
+  !State.getMachineFunction().getTarget().Options.AIXExtendedAltivecABI)
+report_fatal_error("the default Altivec AIX ABI is not yet supported.");
+

minor:
remove '.'



Comment at: llvm/test/CodeGen/PowerPC/aix-AppendingLinkage.ll:4
 
-; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff < 
\
+; RUN: llc -verify-machineinstrs -mcpu=pwr4 -vecnvol -mtriple 
powerpc64-ibm-aix-xcoff < \
 ; RUN: %s | FileCheck %s

May I ask why would we want to add -vecnvol for those testcases? As I noticed, 
they don't need altivec feature enabled.


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[PATCH] D88659: [FE]Split SuitableAlign into two parts

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added a comment.

Hi @jyknight , are you okay with us changing the "definition" of SuitableAlign 
without sending a note to the mailing list?


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[PATCH] D89684: [AIX] Add mvecnvol and mnovecnvol options to enable the AIX extended and default vector ABIs.

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added inline comments.



Comment at: clang/docs/ClangCommandLineReference.rst:2868
 
+Only supported On AIX. Specify usage of volatile and nonvolatile vector 
registers, the extended vector ABI on AIX. Defaults to '-mnovecnvol' when 
Altivec is enabled.
+

s/On/on;




Comment at: clang/lib/CodeGen/BackendUtil.cpp:532
   Options.EmitCallSiteInfo = CodeGenOpts.EmitCallSiteInfo;
+  Options.AIXExtendedAltivecABI = CodeGenOpts.AIXExtendedAltivecABI;
   Options.ValueTrackingVariableLocations =

The ABI specifies `When the option to use nonvolatile vector registers is 
enalbed. the compilation environment must also predefine __EXTABI__`. I didn't 
see this. Should we also cover this in this patch?



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:4571
   }
 
+  if (Arg *A =

On clang, when we do: 
`clang -target powerpc-ibm-aix-xcoff -maltivec -S -emit-llvm test_faltivec.c`,  
clang driver passes `-target-cpu pwr4` as default arch to frontend without 
issuing any error.

However, with XL, we have: 
`"-qaltivec" is not compatible with "-qarch=pwr4". "-qnoaltivec" is being set.` 
 The same error will be issued if `pwr5` is used as well. 

So I suppose for AIX in clang, when user use `-maltivec` without specifying 
arch level, we can do:
1)  by default pass `-target-cpu pwr6` to frontend 
or  2) issue error for "-qarch=pwr4"+ enable altivec
or 3) issue error for `-qacrh = pwr4` + diable altivec like XL does?

Also we should emit error when user use `-maltivec` with -mcpu=pwr5.



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:4579
+
+bool haveMaltivec = false;
+

I would suggest `s/haveMaltivec/HasAltivec` to be consistent with other places 
where if altivec enabled is tested.



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:4581
+
+for (const Arg *A : Args) {
+  auto optID = A->getOption().getID();

Any reason why we cannot use `Args.getLastArg` here for `OPT_maltivec` as well?



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:4591
+
+if (A->getOption().matches(options::OPT_mnovecnvol) && haveMaltivec)
+  D.Diag(diag::err_aix_default_altivec_abi);

Since we are defaulting to default altivec ABI, so I think the logic here 
should be if (HasAltivec && !Args.getLastArg(options::OPT_mvecnvol)), then we 
emit `D.Diag(diag::err_aix_default_altivec_abi)` error?



Comment at: clang/test/CodeGen/altivec.c:53
 }
+
+// AIX-ERROR:  error: The default Altivec ABI on AIX is not yet supported, use 
'-mvecnvol' for the extended Altivec ABI

Could we also add a testcase to test `-mvecnvol/-mnovecnvol` are AIX only 
options?


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[PATCH] D88676: [PPC][AIX] Add vector callee saved registers for AIX extended vector ABI and add clang and llvm option

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added a comment.

I am wondering can we split the option related changes to a separate patch for 
reviews? That would make current patch a bit easier to review and faster to be 
committed as two small pieces.

If it's possible, I am thinking we can try to split it up to the following two 
pieces:

1. Add option in the frontend and backend to be able to turn on extended vector 
ABI
2. Do the frame lowing in the backend




Comment at: clang/docs/ClangCommandLineReference.rst:2868
 
+Specify usage of volatile and nonvolatile vector registers, the extended 
vector ABI on AIX (AIX only).  The default AIX vector ABI is not yet supported. 
+

1. I am not sure if it's a good idea to put the supporting status also in the 
option description here. It looks a bit strange to me.

2. I would suggest something similar like this for the option description:


```
Only supported on AIX. Specifies whether to use both volatile and nonvolatile 
vector registers or volatile vector registers only. Defaults to `-mnovecnvol` 
when Altivec is enabled. 
```

3. We missed a `-` before `mnovecnvol`.



Comment at: clang/include/clang/Basic/DiagnosticDriverKinds.td:531
+def err_aix_default_altivec_abi : Error<
+  "The default Altivec ABI on AIX is not yet supported, use the extended ABI 
option '-mvecnvol'">;
+

I would suggest:

```
The default Altivec ABI on AIX is not yet supported, use '-mvecnvol' for the 
extended Altivec ABI 
```



Comment at: clang/test/CodeGen/altivec.c:1
 // RUN: %clang_cc1 -target-feature +altivec -triple powerpc-unknown-unknown 
-emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -target-feature +altivec -mvecnvol -triple 
powerpc-unknown-aix -emit-llvm %s -o - | FileCheck %s

Can we also test how the driver react to these two options? It would serve as 
the LIT coverage for the code change in `clang/lib/Driver/ToolChains/Clang.cpp`.



Comment at: llvm/include/llvm/Target/TargetOptions.h:177
+/// volatile vector registers which is the default setting on AIX.
+unsigned AIXExtendedAltivecABI = 0;
+

Can we also use bitfield to indicate true and false here? The default value set 
to be `false` in ctor already, so we don't need assign `0` to it here.

```
unsigned AIXExtendedAltivecABI : 1;
```


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[PATCH] D88659: [FE]Split SuitableAlign into two parts

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Xiangling_L added a comment.

ping.


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[PATCH] D87702: [Frontend] Add pragma align natural and sort out pragma pack stack effect

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L marked 8 inline comments as done.
Xiangling_L added inline comments.



Comment at: clang/include/clang/Basic/LangOptions.def:340
 
+LANGOPT(AIXPragmaPack, 1, 0, "AIX #pragma pack handling")
+

jasonliu wrote:
> Not sure if AIXPragmaPack is the best name here. 
> It's more like IBM xl pragma pack handling on AIX.
> Would it be better if we name it `XLPragmaPackOnAIX`?
Just a record of the offline discussion: `XLPragmaPack` is sufficient here, 
following the convention of how we named our C++ ABI on AIX as XLABI.



Comment at: clang/include/clang/Sema/Sema.h:493
+  PackNumber(M == Packed ? 1
+ : (M == Mac68k ? Mac68kAlignmentSentinel
+: UninitPackVal)),

jasonliu wrote:
> I think one of the idea is to use `enum Mode::Mac68k` to replace the need of 
> Mac68kAlignmentSentinel.
> Is there any reason that you would still need PackNumber to contain 
> `Mac68kAlignmentSentinel`?
AIX and other targets have different ways to compare if two `CurrentValue` 
equal. Other targets use only `PackNumber ` while AIX use both align mode and 
PackNumber. So this sentinel `Mac68kAlignmentSentinel` is added to support this.



Comment at: clang/include/clang/Sema/Sema.h:515
+bool operator==(AlignPackInfo Info) const {
+  return AlignMode == Info.AlignMode && PackNumber == Info.PackNumber;
+}

jasonliu wrote:
> Xiangling_L wrote:
> > jasonliu wrote:
> > > This could return true when `PackAttr` in AlignPackInfo are not the same. 
> > > Wouldn't that cause an issue?
> > (1) You mean we have two `AlignPackInfo` with same AlignMode and 
> > PackNumber, but one is PackAttr and the other one is AlignAttr?
> > The example I can think of is:
> > 
> > 
> > ```
> > a)#pragma align(packed)
> >   #pragma pack(1)   //AlignMode = Packed, PackNumber = 1
> > 
> > b) #pragma align(packed)  //AlignMode = Packed, PackNumber = 1
> > ```
> > 
> > But I don't think we have any issue in this case. Before and after my 
> > patch, a == b.
> > Please let me know any other cases concerning you if any.
> > 
> > (2) However, your concerns leads me to think of another case, where 
> > behavior changes with my patch.
> > 
> > ```
> > a) 
> > #pragma align(natural)
> > #pragma pack(1)   /AlignMode = Native,  PackNumber = 1
> > 
> > b)
> > #pragma align(packed) ///AlignMode = Packed, PackNumber = 1
> > 
> > ```
> > Without this patch, a == b for other targets.
> > And I suppose a != b for AIX.
> > 
> In your first example, if I understand correctly,
> a) would return true for IsPackAttr()
> b) would return false for IsPackAttr()
> and yet a == b ?
> I think that's confusing. 
> 
> Any reason why you don't want to just compare all the data members to make 
> sure they are all equal?
Yes, it's confusing but your understanding is correct. For other targets, they 
actually only use `PackNumber` to compare if two CurrentValue equal.



Comment at: clang/lib/Sema/SemaAttr.cpp:367
+  // AIX pragma pack does not support identifier syntax.
+  if (getLangOpts().AIXPragmaPack && !SlotLabel.empty()) {
+Diag(PragmaLoc, diag::warn_pragma_pack_identifer_not_supported);

jasonliu wrote:
> Although IBM xl compiler does not support this form, do we see a harm for us 
> to support this form in clang on AIX?
> Also, if this is indeed not desired to support, we could move this check to 
> the top of this function for an early return. 
We may consider supporting this form in the future, but I don't think we need 
to cover it in this patch. And we don't support it by passing `StringRef()` 
instead, so we still need to wait for a `Info` constructed for us.



Comment at: clang/lib/Sema/SemaAttr.cpp:403
   // Warn about modified alignment after #includes.
   if (PrevPackState.CurrentValue != PackStack.CurrentValue) {
 Diag(IncludeLoc, diag::warn_pragma_pack_modified_after_include);

jasonliu wrote:
> Xiangling_L wrote:
> > jasonliu wrote:
> > > Since we changed the PackStack for it to contain AlignPackInfo instead of 
> > > unsigned. 
> > > This stack no longer only contains Pack information. So we need to 
> > > rethink about how this diagnostic and the one follows should work.
> > > i.e. What's the purpose of these diagnostic? Is it still only for pragma 
> > > pack report? If so, what we are doing here is not correct, since the 
> > > `CurrentValue` could be different, not because of the pragma pack change, 
> > > but because of the pragma align change.
> > > If it's not only for pragma pack any more, but also intend to detect the 
> > > pragma align interaction, then possibly function name and diagnostic 
> > > needs some modification, as they don't match the intent any more.
> > Thanks for pointing this out. I agree that what we are doing here is not 
> > correct. 
> > The original 

[PATCH] D89064: [AIX] Support two itanium alignment LIT testcases for AIX using regex

[Xiangling Liao via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG4c10d6508f54: [AIX] Support two itanium alignment LIT 
testcases for AIX using regex (authored by Xiangling_L).

Changed prior to commit:
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Files:
  clang/test/Layout/itanium-pack-and-align.cpp
  clang/test/Layout/itanium-union-bitfield.cpp


Index: clang/test/Layout/itanium-union-bitfield.cpp
===
--- clang/test/Layout/itanium-union-bitfield.cpp
+++ clang/test/Layout/itanium-union-bitfield.cpp
@@ -18,12 +18,11 @@
 // CHECK:*** Dumping AST Record Layout
 // CHECK-NEXT: 0 | union A
 // CHECK-NEXT: 0:0-2 |   int f1
-// CHECK-NEXT:   | [sizeof=4, dsize=1, align=4
-// CHECK-NEXT:   |  nvsize=1, nvalign=4]
+// CHECK-NEXT:   | [sizeof=4, dsize=1, align=4{{(, preferredalign=4,)?}}
+// CHECK-NEXT:   |  nvsize=1, nvalign=4{{(, preferrednvalign=4)?}}]
 
 // CHECK:*** Dumping AST Record Layout
 // CHECK-NEXT:  0 | union B
 // CHECK-NEXT: 0:0-34 |   char f1
-// CHECK-NEXT:| [sizeof=8, dsize=5, align=4
-// CHECK-NEXT:|  nvsize=5, nvalign=4]
-
+// CHECK-NEXT:| [sizeof=8, dsize=5, align=4{{(, preferredalign=4,)?}}
+// CHECK-NEXT:|  nvsize=5, nvalign=4{{(, preferrednvalign=4)?}}]
Index: clang/test/Layout/itanium-pack-and-align.cpp
===
--- clang/test/Layout/itanium-pack-and-align.cpp
+++ clang/test/Layout/itanium-pack-and-align.cpp
@@ -16,11 +16,11 @@
 // CHECK:  0 | struct T
 // CHECK-NEXT:  0 |   char x
 // CHECK-NEXT:  1 |   int y
-// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,
-// CHECK-NEXT:|  nvsize=8, nvalign=8]
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,{{( 
preferredalign=8,)?}}
+// CHECK-NEXT:|  nvsize=8, nvalign=8{{(, preferrednvalign=8)?}}]
 
 // CHECK:  0 | struct S
 // CHECK-NEXT:  0 |   char x
 // CHECK-NEXT:  1 |   int y
-// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,
-// CHECK-NEXT:|  nvsize=8, nvalign=8]
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,{{( 
preferredalign=8,)?}}
+// CHECK-NEXT:|  nvsize=8, nvalign=8{{(, preferrednvalign=8)?}}]


Index: clang/test/Layout/itanium-union-bitfield.cpp
===
--- clang/test/Layout/itanium-union-bitfield.cpp
+++ clang/test/Layout/itanium-union-bitfield.cpp
@@ -18,12 +18,11 @@
 // CHECK:*** Dumping AST Record Layout
 // CHECK-NEXT: 0 | union A
 // CHECK-NEXT: 0:0-2 |   int f1
-// CHECK-NEXT:   | [sizeof=4, dsize=1, align=4
-// CHECK-NEXT:   |  nvsize=1, nvalign=4]
+// CHECK-NEXT:   | [sizeof=4, dsize=1, align=4{{(, preferredalign=4,)?}}
+// CHECK-NEXT:   |  nvsize=1, nvalign=4{{(, preferrednvalign=4)?}}]
 
 // CHECK:*** Dumping AST Record Layout
 // CHECK-NEXT:  0 | union B
 // CHECK-NEXT: 0:0-34 |   char f1
-// CHECK-NEXT:| [sizeof=8, dsize=5, align=4
-// CHECK-NEXT:|  nvsize=5, nvalign=4]
-
+// CHECK-NEXT:| [sizeof=8, dsize=5, align=4{{(, preferredalign=4,)?}}
+// CHECK-NEXT:|  nvsize=5, nvalign=4{{(, preferrednvalign=4)?}}]
Index: clang/test/Layout/itanium-pack-and-align.cpp
===
--- clang/test/Layout/itanium-pack-and-align.cpp
+++ clang/test/Layout/itanium-pack-and-align.cpp
@@ -16,11 +16,11 @@
 // CHECK:  0 | struct T
 // CHECK-NEXT:  0 |   char x
 // CHECK-NEXT:  1 |   int y
-// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,
-// CHECK-NEXT:|  nvsize=8, nvalign=8]
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,{{( preferredalign=8,)?}}
+// CHECK-NEXT:|  nvsize=8, nvalign=8{{(, preferrednvalign=8)?}}]
 
 // CHECK:  0 | struct S
 // CHECK-NEXT:  0 |   char x
 // CHECK-NEXT:  1 |   int y
-// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,
-// CHECK-NEXT:|  nvsize=8, nvalign=8]
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,{{( preferredalign=8,)?}}
+// CHECK-NEXT:|  nvsize=8, nvalign=8{{(, preferrednvalign=8)?}}]
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[PATCH] D89064: [AIX] Disable two itanium alignment LIT testcases

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 297848.
Xiangling_L added a comment.

Use regex to match AIX layout dumping format.


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  clang/test/Layout/itanium-union-bitfield.cpp


Index: clang/test/Layout/itanium-union-bitfield.cpp
===
--- clang/test/Layout/itanium-union-bitfield.cpp
+++ clang/test/Layout/itanium-union-bitfield.cpp
@@ -18,12 +18,11 @@
 // CHECK:*** Dumping AST Record Layout
 // CHECK-NEXT: 0 | union A
 // CHECK-NEXT: 0:0-2 |   int f1
-// CHECK-NEXT:   | [sizeof=4, dsize=1, align=4
-// CHECK-NEXT:   |  nvsize=1, nvalign=4]
+// CHECK-NEXT:   | [sizeof=4, dsize=1, align=4{{(, preferredalign=4,)*}}
+// CHECK-NEXT:   |  nvsize=1, nvalign=4{{(, preferrednvalign=4)*}}]
 
 // CHECK:*** Dumping AST Record Layout
 // CHECK-NEXT:  0 | union B
 // CHECK-NEXT: 0:0-34 |   char f1
-// CHECK-NEXT:| [sizeof=8, dsize=5, align=4
-// CHECK-NEXT:|  nvsize=5, nvalign=4]
-
+// CHECK-NEXT:| [sizeof=8, dsize=5, align=4{{(, preferredalign=4,)*}}
+// CHECK-NEXT:|  nvsize=5, nvalign=4{{(, preferrednvalign=4)*}}]
Index: clang/test/Layout/itanium-pack-and-align.cpp
===
--- clang/test/Layout/itanium-pack-and-align.cpp
+++ clang/test/Layout/itanium-pack-and-align.cpp
@@ -16,11 +16,11 @@
 // CHECK:  0 | struct T
 // CHECK-NEXT:  0 |   char x
 // CHECK-NEXT:  1 |   int y
-// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,
-// CHECK-NEXT:|  nvsize=8, nvalign=8]
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,{{( 
preferredalign=8,)*}}
+// CHECK-NEXT:|  nvsize=8, nvalign=8{{(, preferrednvalign=8)*}}]
 
 // CHECK:  0 | struct S
 // CHECK-NEXT:  0 |   char x
 // CHECK-NEXT:  1 |   int y
-// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,
-// CHECK-NEXT:|  nvsize=8, nvalign=8]
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,{{( 
preferredalign=8,)*}}
+// CHECK-NEXT:|  nvsize=8, nvalign=8{{(, preferrednvalign=8)*}}]


Index: clang/test/Layout/itanium-union-bitfield.cpp
===
--- clang/test/Layout/itanium-union-bitfield.cpp
+++ clang/test/Layout/itanium-union-bitfield.cpp
@@ -18,12 +18,11 @@
 // CHECK:*** Dumping AST Record Layout
 // CHECK-NEXT: 0 | union A
 // CHECK-NEXT: 0:0-2 |   int f1
-// CHECK-NEXT:   | [sizeof=4, dsize=1, align=4
-// CHECK-NEXT:   |  nvsize=1, nvalign=4]
+// CHECK-NEXT:   | [sizeof=4, dsize=1, align=4{{(, preferredalign=4,)*}}
+// CHECK-NEXT:   |  nvsize=1, nvalign=4{{(, preferrednvalign=4)*}}]
 
 // CHECK:*** Dumping AST Record Layout
 // CHECK-NEXT:  0 | union B
 // CHECK-NEXT: 0:0-34 |   char f1
-// CHECK-NEXT:| [sizeof=8, dsize=5, align=4
-// CHECK-NEXT:|  nvsize=5, nvalign=4]
-
+// CHECK-NEXT:| [sizeof=8, dsize=5, align=4{{(, preferredalign=4,)*}}
+// CHECK-NEXT:|  nvsize=5, nvalign=4{{(, preferrednvalign=4)*}}]
Index: clang/test/Layout/itanium-pack-and-align.cpp
===
--- clang/test/Layout/itanium-pack-and-align.cpp
+++ clang/test/Layout/itanium-pack-and-align.cpp
@@ -16,11 +16,11 @@
 // CHECK:  0 | struct T
 // CHECK-NEXT:  0 |   char x
 // CHECK-NEXT:  1 |   int y
-// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,
-// CHECK-NEXT:|  nvsize=8, nvalign=8]
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,{{( preferredalign=8,)*}}
+// CHECK-NEXT:|  nvsize=8, nvalign=8{{(, preferrednvalign=8)*}}]
 
 // CHECK:  0 | struct S
 // CHECK-NEXT:  0 |   char x
 // CHECK-NEXT:  1 |   int y
-// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,
-// CHECK-NEXT:|  nvsize=8, nvalign=8]
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,{{( preferredalign=8,)*}}
+// CHECK-NEXT:|  nvsize=8, nvalign=8{{(, preferrednvalign=8)*}}]
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[PATCH] D89064: [AIX] Disable two itanium alignment LIT testcases

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added a comment.

In D89064#2320133 , 
@hubert.reinterpretcast wrote:

> Can we use a regex to make this also work in AIX?

Sure we can also do that. May I ask is that because we prefer letting AIX 
support as many LIT testcases as possible?


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[PATCH] D89064: [AIX] Disable two itanium alignment LIT testcases

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L created this revision.
Xiangling_L added reviewers: daltenty, hubert.reinterpretcast, stevewan.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.
Xiangling_L requested review of this revision.

AIX has different layout dumping format from other itanium abis.
And for these two cases, AIX already/will create AIX version.


Repository:
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Files:
  clang/test/Layout/itanium-pack-and-align.cpp
  clang/test/Layout/itanium-union-bitfield.cpp


Index: clang/test/Layout/itanium-union-bitfield.cpp
===
--- clang/test/Layout/itanium-union-bitfield.cpp
+++ clang/test/Layout/itanium-union-bitfield.cpp
@@ -1,3 +1,4 @@
+// UNSUPPORTED: aix
 // RUN: %clang_cc1 -emit-llvm-only -triple %itanium_abi_triple 
-fdump-record-layouts %s 2>/dev/null \
 // RUN:| FileCheck %s
 
Index: clang/test/Layout/itanium-pack-and-align.cpp
===
--- clang/test/Layout/itanium-pack-and-align.cpp
+++ clang/test/Layout/itanium-pack-and-align.cpp
@@ -1,3 +1,4 @@
+// UNSUPPORTED: aix
 // RUN: %clang_cc1 -triple %itanium_abi_triple -emit-llvm-only 
-fdump-record-layouts %s \
 // RUN:| FileCheck %s
 


Index: clang/test/Layout/itanium-union-bitfield.cpp
===
--- clang/test/Layout/itanium-union-bitfield.cpp
+++ clang/test/Layout/itanium-union-bitfield.cpp
@@ -1,3 +1,4 @@
+// UNSUPPORTED: aix
 // RUN: %clang_cc1 -emit-llvm-only -triple %itanium_abi_triple -fdump-record-layouts %s 2>/dev/null \
 // RUN:| FileCheck %s
 
Index: clang/test/Layout/itanium-pack-and-align.cpp
===
--- clang/test/Layout/itanium-pack-and-align.cpp
+++ clang/test/Layout/itanium-pack-and-align.cpp
@@ -1,3 +1,4 @@
+// UNSUPPORTED: aix
 // RUN: %clang_cc1 -triple %itanium_abi_triple -emit-llvm-only -fdump-record-layouts %s \
 // RUN:| FileCheck %s
 
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[PATCH] D87029: [AIX] Implement AIX special bitfield related alignment rules

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 296972.
Xiangling_L marked an inline comment as done.
Xiangling_L added a comment.

Remove emit errors for oversized long long bitfield and related testcase;


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Files:
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/test/Layout/aix-bitfield-alignment.cpp

Index: clang/test/Layout/aix-bitfield-alignment.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-bitfield-alignment.cpp
@@ -0,0 +1,217 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -faix-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK32 %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -faix-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK64 %s
+
+struct A {
+  bool b : 3;
+  unsigned char c : 2;
+  unsigned short s : 6;
+};
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct A
+// CHECK-NEXT:  0:0-2 |   _Bool b
+// CHECK-NEXT:  0:3-4 |   unsigned char c
+// CHECK-NEXT: 0:5-10 |   unsigned short s
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+struct B {
+  char c;
+  int : 0;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct B
+// CHECK-NEXT:  0 |   char c
+// CHECK-NEXT:4:- |   int
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+struct C {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+};
+
+int c = sizeof(C);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK32: 4:0-7 |   unsigned long a7
+// CHECK32:   | [sizeof=8, dsize=8, align=4, preferredalign=4,
+// CHECK32:   |  nvsize=8, nvalign=4, preferrednvalign=4]
+// CHECK64: 3:1-8 |   unsigned long a7
+// CHECK64:   | [sizeof=8, dsize=8, align=8, preferredalign=8,
+// CHECK64:   |  nvsize=8, nvalign=8, preferrednvalign=8]
+
+#pragma align(packed)
+struct C1 {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+};
+#pragma align(reset)
+
+int c1 = sizeof(C1);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C1
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK-NEXT:  3:1-8 |   unsigned long a7
+// CHECK-NEXT:| [sizeof=5, dsize=5, align=1, preferredalign=1,
+// CHECK-NEXT:|  nvsize=5, nvalign=1, preferrednvalign=1]
+
+#pragma pack(4)
+struct C2 {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+};
+#pragma pack(pop)
+
+int c2 = sizeof(C2);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C2
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK-NEXT:  3:1-8 |   unsigned long a7
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=8, nvalign=4, preferrednvalign=4]
+
+typedef __attribute__((aligned(32))) short mySHORT;
+struct D {
+  char c : 8;
+  mySHORT : 0;
+};
+
+int d = sizeof(D);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct D
+// CHECK-NEXT:  0:0-7 |   char c
+// CHECK-NEXT:   32:- |   mySHORT
+// CHECK-NEXT:| [sizeof=32, dsize=32, align=32, preferredalign=32,
+// CHECK-NEXT:|  nvsize=32, nvalign=32, preferrednvalign=32]
+
+typedef __attribute__((aligned(32))) long myLONG;
+struct D1 {
+  char c : 8;
+  myLONG : 0;
+};
+
+int d1 = sizeof(D1);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct D1
+// CHECK-NEXT:  0:0-7 |   char c
+// CHECK-NEXT:   32:- |   myLONG
+// 

[PATCH] D87029: [AIX] Implement AIX special bitfield related alignment rules

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L marked an inline comment as done.
Xiangling_L added inline comments.



Comment at: clang/lib/Sema/SemaDecl.cpp:16447
+
+bool AIXBitfieldViolation = false;
+if (const BuiltinType *BTy = FieldTy.getTypePtr()->getAs()) {

sfertile wrote:
> Xiangling_L wrote:
> > sfertile wrote:
> > > Can  this change can be split out into its own patch? If it can i would 
> > > suggest doing so.
> > I was expecting our buildbot can pick up all bitfield related changes at 
> > one time. Also if we split this out, that means we either need to wait for 
> > this second part to land first or need to add more LIT to oversized long 
> > long to the first part, which then needs to be removed whenever this second 
> > part land. It seems we are complicating the patch. Can you give me your 
> > rationale about why we want to split out this part?
> > I was expecting our buildbot can pick up all bitfield related changes at 
> > one time.
> IIUC `clang/test/Layout/aix-oversized-bitfield.cpp` works with just this 
> change and isn't dependent on D87702. Its disjoint from the other changes in 
> this patch, and packaging it into a commit with unrelated changes even if 
> they are on the same theme is not beneficial. Its better to have those run 
> through the build bot (or be bisectable) as distinct changes.
> 
> > Also if we split this out, that means we either need to wait for this 
> > second part to land first or need to add more LIT to oversized long long to 
> > the first part, which then needs to be removed whenever this second part 
> > land.  It seems we are complicating the patch.
> 
> I don't understand why it would need to wait or require extra testing to be 
> added. Its a diagnostic and your lit test shows the error for 32-bit (where 
> we want it emitted)  and expected layout for 64-bit. The whole point of 
> splitting it out is that its simple,does exactly one thing, is testable on 
> its own,  and we don't need the context of the other changes packaged with it 
> to properly review it. I am asking to split it out because I see it as making 
> this easier to review and commit.
Sure, I will split this patch into two as you suggested. By `either need to 
wait for this second part to land first or need to add more LIT `, I thought we 
would like to also add test coverage and later remove it for oversize bitfield. 
Since `StorageUnitSize > 32 && 
Context.getTargetInfo().getTriple().isArch32Bit()` does affect how oversize 
bitfield get laid out on AIX. But I guess it's more convenient to just split 
this patch as you suggested.


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[PATCH] D87029: [AIX] Implement AIX special bitfield related alignment rules

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L updated this revision to Diff 296497.
Xiangling_L marked 4 inline comments as done.
Xiangling_L added a comment.

- Fixed the bug of getting underlying type of enum;
- Fixed the bug to respect align attribute;
- Add more testcases;


Repository:
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Files:
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/lib/Sema/SemaDecl.cpp
  clang/test/Layout/aix-bitfield-alignment.cpp
  clang/test/Layout/aix-oversized-bitfield.cpp

Index: clang/test/Layout/aix-oversized-bitfield.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-oversized-bitfield.cpp
@@ -0,0 +1,21 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fsyntax-only -verify %s
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fsyntax-only -verify -x c++ %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+
+struct A {
+  long long l : 64; // expected-error{{width of bit-field 'l' (64 bits) exceeds size of its type (32 bits)}}
+};
+
+int a = sizeof(A);
+
+// CHECK64:  *** Dumping AST Record Layout
+// CHECK64-NEXT:  0 | struct A
+// CHECK64-NEXT: 0:0-63 |   long long l
+// CHECK64-NEXT:| [sizeof=8, dsize=8, align=8, preferredalign=8,
+// CHECK64-NEXT:|  nvsize=8, nvalign=8, preferrednvalign=8]
Index: clang/test/Layout/aix-bitfield-alignment.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-bitfield-alignment.cpp
@@ -0,0 +1,217 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -faix-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK32 %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -faix-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK64 %s
+
+struct A {
+  bool b : 3;
+  unsigned char c : 2;
+  unsigned short s : 6;
+};
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct A
+// CHECK-NEXT:  0:0-2 |   _Bool b
+// CHECK-NEXT:  0:3-4 |   unsigned char c
+// CHECK-NEXT: 0:5-10 |   unsigned short s
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+struct B {
+  char c;
+  int : 0;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct B
+// CHECK-NEXT:  0 |   char c
+// CHECK-NEXT:4:- |   int
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+struct C {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+};
+
+int c = sizeof(C);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK32: 4:0-7 |   unsigned long a7
+// CHECK32:   | [sizeof=8, dsize=8, align=4, preferredalign=4,
+// CHECK32:   |  nvsize=8, nvalign=4, preferrednvalign=4]
+// CHECK64: 3:1-8 |   unsigned long a7
+// CHECK64:   | [sizeof=8, dsize=8, align=8, preferredalign=8,
+// CHECK64:   |  nvsize=8, nvalign=8, preferrednvalign=8]
+
+#pragma align(packed)
+struct C1 {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+};
+#pragma align(reset)
+
+int c1 = sizeof(C1);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C1
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK-NEXT:  3:1-8 |   unsigned long a7
+// CHECK-NEXT:| [sizeof=5, dsize=5, align=1, preferredalign=1,
+// CHECK-NEXT:|  nvsize=5, nvalign=1, preferrednvalign=1]
+
+#pragma pack(4)
+struct C2 {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+};
+#pragma pack(pop)
+
+int c2 = 

[PATCH] D87029: [AIX] Implement AIX special bitfield related alignment rules

[Xiangling Liao via Phabricator via cfe-commits]

Xiangling_L added inline comments.



Comment at: clang/lib/Sema/SemaDecl.cpp:16447
+
+bool AIXBitfieldViolation = false;
+if (const BuiltinType *BTy = FieldTy.getTypePtr()->getAs()) {

sfertile wrote:
> Can  this change can be split out into its own patch? If it can i would 
> suggest doing so.
I was expecting our buildbot can pick up all bitfield related changes at one 
time. Also if we split this out, that means we either need to wait for this 
second part to land first or need to add more LIT to oversized long long to the 
first part, which then needs to be removed whenever this second part land. It 
seems we are complicating the patch. Can you give me your rationale about why 
we want to split out this part?


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