[PATCH] D135269: [AMDGPU] Disable bool range metadata to workaround backend issue

2022-12-08 Thread Yaxun Liu via Phabricator via cfe-commits
yaxunl added a comment.

In D135269#3982103 , @jrbyrnes wrote:

> In D135269#3981856 , @yaxunl wrote:
>
>> In D135269#3981561 , @nikic wrote:
>>
>>> Checking back here again on whether there is any progress on finding the 
>>> root cause of the issue. If no progress is expected in the near future, I'd 
>>> ask for this patch to be reverted.
>>
>> @jrbyrnes is working on the root cause of this issue. Any updates? Thanks.
>
> Thanks for the ping. I would also like to see this reverted as it enables 
> some optimizations. I do not have a definitive answer at the moment (w.r.t 
> reverting this), but hope to provide one soon
>
> As for now, the issue we are seeing from 
> (https://github.com/llvm/llvm-project/commit/8018d6be3459780e81a5da128a9915eb27909902)
>  seems most likely to be a source code issue (first document of issue 
> https://github.com/pytorch/pytorch/issues/54789 . upstream PyTorch currently 
> skips problematic test 
> https://github.com/pytorch/pytorch/blob/b738da8c8e4d9142ad38a1bd8c35d0bfef4b5e3c/torch/testing/_internal/common_methods_invocations.py#L14891)
>  . I will provide a better update soon.

I will revert this patch. Thanks.


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[PATCH] D135269: [AMDGPU] Disable bool range metadata to workaround backend issue

2022-12-08 Thread Jeffrey Byrnes via Phabricator via cfe-commits
jrbyrnes added a comment.

In D135269#3981856 , @yaxunl wrote:

> In D135269#3981561 , @nikic wrote:
>
>> Checking back here again on whether there is any progress on finding the 
>> root cause of the issue. If no progress is expected in the near future, I'd 
>> ask for this patch to be reverted.
>
> @jrbyrnes is working on the root cause of this issue. Any updates? Thanks.

Thanks for the ping. I would also like to see this reverted as it enables some 
optimizations. I do not have a definitive answer at the moment (w.r.t reverting 
this), but hope to provide one soon

As for now, the issue we are seeing from 
(https://github.com/llvm/llvm-project/commit/8018d6be3459780e81a5da128a9915eb27909902)
 seems most likely to be a source code issue (first document of issue 
https://github.com/pytorch/pytorch/issues/54789 . upstream PyTorch currently 
skips problematic test 
https://github.com/pytorch/pytorch/blob/b738da8c8e4d9142ad38a1bd8c35d0bfef4b5e3c/torch/testing/_internal/common_methods_invocations.py#L14891)
 . I will provide a better update soon.


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[PATCH] D135269: [AMDGPU] Disable bool range metadata to workaround backend issue

2022-12-08 Thread Yaxun Liu via Phabricator via cfe-commits
yaxunl added a subscriber: jrbyrnes.
yaxunl added a comment.

In D135269#3981561 , @nikic wrote:

> Checking back here again on whether there is any progress on finding the root 
> cause of the issue. If no progress is expected in the near future, I'd ask 
> for this patch to be reverted.

@jrbyrnes is working on the root cause of this issue. Any updates? Thanks.


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[PATCH] D135269: [AMDGPU] Disable bool range metadata to workaround backend issue

2022-12-08 Thread Nikita Popov via Phabricator via cfe-commits
nikic added a comment.

Checking back here again on whether there is any progress on finding the root 
cause of the issue. If no progress is expected in the near future, I'd ask for 
this patch to be reverted.


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[PATCH] D135269: [AMDGPU] Disable bool range metadata to workaround backend issue

2022-10-18 Thread Yaxun Liu via Phabricator via cfe-commits
yaxunl added a comment.

In D135269#3863470 , @nikic wrote:

> Checking back here, have you made any progress on reducing the issue?
>
> cc @arsenm for awareness

No. I am busy with other work and have not got time to get back on it.


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[PATCH] D135269: [AMDGPU] Disable bool range metadata to workaround backend issue

2022-10-17 Thread Nikita Popov via Phabricator via cfe-commits
nikic added subscribers: arsenm, nikic.
nikic added a comment.

Checking back here, have you made any progress on reducing the issue?

cc @arsenm for awareness


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[PATCH] D135269: [AMDGPU] Disable bool range metadata to workaround backend issue

2022-10-07 Thread Yaxun Liu via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rG107ee2613063: [AMDGPU] Disable bool range metadata to 
workaround backend issue (authored by yaxunl).
Herald added a project: clang.

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Files:
  clang/lib/CodeGen/CGExpr.cpp
  clang/test/CodeGenCUDA/bool-range.cu


Index: clang/test/CodeGenCUDA/bool-range.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/bool-range.cu
@@ -0,0 +1,23 @@
+// RUN: %clang_cc1 -emit-llvm %s -O3 -o - -fcuda-is-device \
+// RUN:   -triple nvptx64-unknown-unknown | FileCheck %s -check-prefixes=NV
+// RUN: %clang_cc1 -emit-llvm %s -O3 -o - -fcuda-is-device \
+// RUN:   -triple amdgcn-amd-amdhsa | FileCheck %s -check-prefixes=AMD
+
+#include "Inputs/cuda.h"
+
+// NV:  %[[LD:[0-9]+]] = load i8, ptr %x,{{.*}} !range ![[MD:[0-9]+]]
+// NV:  store i8 %[[LD]], ptr %y
+// NV: ![[MD]] = !{i8 0, i8 2}
+
+// Make sure bool loaded from memory is truncated and
+// range metadata is not emitted.
+// TODO: Re-enable range metadata after issue
+// https://github.com/llvm/llvm-project/issues/58176 is fixed.
+
+// AMD:  %[[LD:[0-9]+]] = load i8, ptr addrspace(1) %x.global
+// AMD-NOT: !range
+// AMD:  %[[AND:[0-9]+]] = and i8 %[[LD]], 1
+// AMD:  store i8 %[[AND]], ptr addrspace(1) %y.global
+__global__ void test1(bool *x, bool *y) {
+  *y = *x != false;
+}
Index: clang/lib/CodeGen/CGExpr.cpp
===
--- clang/lib/CodeGen/CGExpr.cpp
+++ clang/lib/CodeGen/CGExpr.cpp
@@ -1748,7 +1748,10 @@
   if (EmitScalarRangeCheck(Load, Ty, Loc)) {
 // In order to prevent the optimizer from throwing away the check, don't
 // attach range metadata to the load.
-  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0)
+// TODO: Enable range metadata for AMDGCN after issue
+// https://github.com/llvm/llvm-project/issues/58176 is fixed.
+  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0 &&
+ !CGM.getTriple().isAMDGCN())
 if (llvm::MDNode *RangeInfo = getRangeForLoadFromType(Ty))
   Load->setMetadata(llvm::LLVMContext::MD_range, RangeInfo);
 


Index: clang/test/CodeGenCUDA/bool-range.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/bool-range.cu
@@ -0,0 +1,23 @@
+// RUN: %clang_cc1 -emit-llvm %s -O3 -o - -fcuda-is-device \
+// RUN:   -triple nvptx64-unknown-unknown | FileCheck %s -check-prefixes=NV
+// RUN: %clang_cc1 -emit-llvm %s -O3 -o - -fcuda-is-device \
+// RUN:   -triple amdgcn-amd-amdhsa | FileCheck %s -check-prefixes=AMD
+
+#include "Inputs/cuda.h"
+
+// NV:  %[[LD:[0-9]+]] = load i8, ptr %x,{{.*}} !range ![[MD:[0-9]+]]
+// NV:  store i8 %[[LD]], ptr %y
+// NV: ![[MD]] = !{i8 0, i8 2}
+
+// Make sure bool loaded from memory is truncated and
+// range metadata is not emitted.
+// TODO: Re-enable range metadata after issue
+// https://github.com/llvm/llvm-project/issues/58176 is fixed.
+
+// AMD:  %[[LD:[0-9]+]] = load i8, ptr addrspace(1) %x.global
+// AMD-NOT: !range
+// AMD:  %[[AND:[0-9]+]] = and i8 %[[LD]], 1
+// AMD:  store i8 %[[AND]], ptr addrspace(1) %y.global
+__global__ void test1(bool *x, bool *y) {
+  *y = *x != false;
+}
Index: clang/lib/CodeGen/CGExpr.cpp
===
--- clang/lib/CodeGen/CGExpr.cpp
+++ clang/lib/CodeGen/CGExpr.cpp
@@ -1748,7 +1748,10 @@
   if (EmitScalarRangeCheck(Load, Ty, Loc)) {
 // In order to prevent the optimizer from throwing away the check, don't
 // attach range metadata to the load.
-  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0)
+// TODO: Enable range metadata for AMDGCN after issue
+// https://github.com/llvm/llvm-project/issues/58176 is fixed.
+  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0 &&
+ !CGM.getTriple().isAMDGCN())
 if (llvm::MDNode *RangeInfo = getRangeForLoadFromType(Ty))
   Load->setMetadata(llvm::LLVMContext::MD_range, RangeInfo);
 
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[PATCH] D135269: [AMDGPU] Disable bool range metadata to workaround backend issue

2022-10-06 Thread Yaxun Liu via Phabricator via cfe-commits
yaxunl updated this revision to Diff 465731.
yaxunl marked an inline comment as done.
yaxunl edited the summary of this revision.
yaxunl added a comment.

update comments with issue link


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Files:
  clang/lib/CodeGen/CGExpr.cpp
  clang/test/CodeGenCUDA/bool-range.cu


Index: clang/test/CodeGenCUDA/bool-range.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/bool-range.cu
@@ -0,0 +1,23 @@
+// RUN: %clang_cc1 -emit-llvm %s -O3 -o - -fcuda-is-device \
+// RUN:   -triple nvptx64-unknown-unknown | FileCheck %s -check-prefixes=NV
+// RUN: %clang_cc1 -emit-llvm %s -O3 -o - -fcuda-is-device \
+// RUN:   -triple amdgcn-amd-amdhsa | FileCheck %s -check-prefixes=AMD
+
+#include "Inputs/cuda.h"
+
+// NV:  %[[LD:[0-9]+]] = load i8, ptr %x,{{.*}} !range ![[MD:[0-9]+]]
+// NV:  store i8 %[[LD]], ptr %y
+// NV: ![[MD]] = !{i8 0, i8 2}
+
+// Make sure bool loaded from memory is truncated and
+// range metadata is not emitted.
+// TODO: Re-enable range metadata after issue
+// https://github.com/llvm/llvm-project/issues/58176 is fixed.
+
+// AMD:  %[[LD:[0-9]+]] = load i8, ptr addrspace(1) %x.global
+// AMD-NOT: !range
+// AMD:  %[[AND:[0-9]+]] = and i8 %[[LD]], 1
+// AMD:  store i8 %[[AND]], ptr addrspace(1) %y.global
+__global__ void test1(bool *x, bool *y) {
+  *y = *x != false;
+}
Index: clang/lib/CodeGen/CGExpr.cpp
===
--- clang/lib/CodeGen/CGExpr.cpp
+++ clang/lib/CodeGen/CGExpr.cpp
@@ -1746,7 +1746,10 @@
   if (EmitScalarRangeCheck(Load, Ty, Loc)) {
 // In order to prevent the optimizer from throwing away the check, don't
 // attach range metadata to the load.
-  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0)
+// TODO: Enable range metadata for AMDGCN after issue
+// https://github.com/llvm/llvm-project/issues/58176 is fixed.
+  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0 &&
+ !CGM.getTriple().isAMDGCN())
 if (llvm::MDNode *RangeInfo = getRangeForLoadFromType(Ty))
   Load->setMetadata(llvm::LLVMContext::MD_range, RangeInfo);
 


Index: clang/test/CodeGenCUDA/bool-range.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/bool-range.cu
@@ -0,0 +1,23 @@
+// RUN: %clang_cc1 -emit-llvm %s -O3 -o - -fcuda-is-device \
+// RUN:   -triple nvptx64-unknown-unknown | FileCheck %s -check-prefixes=NV
+// RUN: %clang_cc1 -emit-llvm %s -O3 -o - -fcuda-is-device \
+// RUN:   -triple amdgcn-amd-amdhsa | FileCheck %s -check-prefixes=AMD
+
+#include "Inputs/cuda.h"
+
+// NV:  %[[LD:[0-9]+]] = load i8, ptr %x,{{.*}} !range ![[MD:[0-9]+]]
+// NV:  store i8 %[[LD]], ptr %y
+// NV: ![[MD]] = !{i8 0, i8 2}
+
+// Make sure bool loaded from memory is truncated and
+// range metadata is not emitted.
+// TODO: Re-enable range metadata after issue
+// https://github.com/llvm/llvm-project/issues/58176 is fixed.
+
+// AMD:  %[[LD:[0-9]+]] = load i8, ptr addrspace(1) %x.global
+// AMD-NOT: !range
+// AMD:  %[[AND:[0-9]+]] = and i8 %[[LD]], 1
+// AMD:  store i8 %[[AND]], ptr addrspace(1) %y.global
+__global__ void test1(bool *x, bool *y) {
+  *y = *x != false;
+}
Index: clang/lib/CodeGen/CGExpr.cpp
===
--- clang/lib/CodeGen/CGExpr.cpp
+++ clang/lib/CodeGen/CGExpr.cpp
@@ -1746,7 +1746,10 @@
   if (EmitScalarRangeCheck(Load, Ty, Loc)) {
 // In order to prevent the optimizer from throwing away the check, don't
 // attach range metadata to the load.
-  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0)
+// TODO: Enable range metadata for AMDGCN after issue
+// https://github.com/llvm/llvm-project/issues/58176 is fixed.
+  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0 &&
+ !CGM.getTriple().isAMDGCN())
 if (llvm::MDNode *RangeInfo = getRangeForLoadFromType(Ty))
   Load->setMetadata(llvm::LLVMContext::MD_range, RangeInfo);
 
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[PATCH] D135269: [AMDGPU] Disable bool range metadata to workaround backend issue

2022-10-05 Thread Yaxun Liu via Phabricator via cfe-commits
yaxunl marked an inline comment as done.
yaxunl added inline comments.



Comment at: clang/lib/CodeGen/CGExpr.cpp:1792
 // attach range metadata to the load.
-  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0)
+// TODO: Enable range metadata for AMDGCN after backend issue is fixed.
+  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0 &&

tra wrote:
> It would be great to open a github issue, if we don't have one yet, and 
> reference it here, so we can tell later what exactly it is we're working 
> around here and know for sure when/whether we can undo the change.
opened github issue:

https://github.com/llvm/llvm-project/issues/58176

will update the comments


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[PATCH] D135269: [AMDGPU] Disable bool range metadata to workaround backend issue

2022-10-05 Thread Artem Belevich via Phabricator via cfe-commits
tra added inline comments.



Comment at: clang/lib/CodeGen/CGExpr.cpp:1792
 // attach range metadata to the load.
-  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0)
+// TODO: Enable range metadata for AMDGCN after backend issue is fixed.
+  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0 &&

It would be great to open a github issue, if we don't have one yet, and 
reference it here, so we can tell later what exactly it is we're working around 
here and know for sure when/whether we can undo the change.



Comment at: clang/test/CodeGenCUDA/bool-range.cu:14
+// range metadata is not emitted.
+// TODO: Re-enable range metadata after backend issue is fixed.
+

Ditto, a bug reference would help.


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[PATCH] D135269: [AMDGPU] Disable bool range metadata to workaround backend issue

2022-10-05 Thread Yaxun Liu via Phabricator via cfe-commits
yaxunl added a comment.

In D135269#3837394 , @tra wrote:

> Is there more info about the issue? What does AMDGPU currently emit for the 
> test case?
>
> AFAICT from running it on CE (https://godbolt.org/z/ccq3vnbrM) llvm optimizes 
> it to essentially `*y = *x` and generates a 1-byte load+store for both NVPTX 
> and AMDGPU.

The issue happens to more complicated test cases which I cannot reduce right 
now.

Basically 8018d6be3459780e81a5da128a9915eb27909902 
 caused 
regressions in some PyTorch tests. Investigation shows the propagation of range 
metadata for bool type triggered some optimizations which caused some bool 
values to be loaded incorrectly. I will continue investigating the issue. 
However, I need a workaround for now.


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[PATCH] D135269: [AMDGPU] Disable bool range metadata to workaround backend issue

2022-10-05 Thread Artem Belevich via Phabricator via cfe-commits
tra added a comment.

Is there more info about the issue? What does AMDGPU currently emit for the 
test case?

AFAICT from running it on CE (https://godbolt.org/z/ccq3vnbrM) llvm optimizes 
it to essentially `*y = *x` and generates a 1-byte load+store for both NVPTX 
and AMDGPU.


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[PATCH] D135269: [AMDGPU] Disable bool range metadata to workaround backend issue

2022-10-05 Thread Yaxun Liu via Phabricator via cfe-commits
yaxunl updated this revision to Diff 465403.
yaxunl added a comment.

fix comments in test


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Files:
  clang/lib/CodeGen/CGExpr.cpp
  clang/test/CodeGenCUDA/bool-range.cu


Index: clang/test/CodeGenCUDA/bool-range.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/bool-range.cu
@@ -0,0 +1,22 @@
+// RUN: %clang_cc1 -emit-llvm %s -O3 -o - -fcuda-is-device \
+// RUN:   -triple nvptx64-unknown-unknown | FileCheck %s -check-prefixes=NV
+// RUN: %clang_cc1 -emit-llvm %s -O3 -o - -fcuda-is-device \
+// RUN:   -triple amdgcn-amd-amdhsa | FileCheck %s -check-prefixes=AMD
+
+#include "Inputs/cuda.h"
+
+// NV:  %[[LD:[0-9]+]] = load i8, ptr %x,{{.*}} !range ![[MD:[0-9]+]]
+// NV:  store i8 %[[LD]], ptr %y
+// NV: ![[MD]] = !{i8 0, i8 2}
+
+// Make sure bool loaded from memory is truncated and
+// range metadata is not emitted.
+// TODO: Re-enable range metadata after backend issue is fixed.
+
+// AMD:  %[[LD:[0-9]+]] = load i8, ptr addrspace(1) %x.global
+// AMD-NOT: !range
+// AMD:  %[[AND:[0-9]+]] = and i8 %[[LD]], 1
+// AMD:  store i8 %[[AND]], ptr addrspace(1) %y.global
+__global__ void test1(bool *x, bool *y) {
+  *y = *x != false;
+}
Index: clang/lib/CodeGen/CGExpr.cpp
===
--- clang/lib/CodeGen/CGExpr.cpp
+++ clang/lib/CodeGen/CGExpr.cpp
@@ -1789,7 +1789,9 @@
   if (EmitScalarRangeCheck(Load, Ty, Loc)) {
 // In order to prevent the optimizer from throwing away the check, don't
 // attach range metadata to the load.
-  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0)
+// TODO: Enable range metadata for AMDGCN after backend issue is fixed.
+  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0 &&
+ !CGM.getTriple().isAMDGCN())
 if (llvm::MDNode *RangeInfo = getRangeForLoadFromType(Ty))
   Load->setMetadata(llvm::LLVMContext::MD_range, RangeInfo);
 


Index: clang/test/CodeGenCUDA/bool-range.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/bool-range.cu
@@ -0,0 +1,22 @@
+// RUN: %clang_cc1 -emit-llvm %s -O3 -o - -fcuda-is-device \
+// RUN:   -triple nvptx64-unknown-unknown | FileCheck %s -check-prefixes=NV
+// RUN: %clang_cc1 -emit-llvm %s -O3 -o - -fcuda-is-device \
+// RUN:   -triple amdgcn-amd-amdhsa | FileCheck %s -check-prefixes=AMD
+
+#include "Inputs/cuda.h"
+
+// NV:  %[[LD:[0-9]+]] = load i8, ptr %x,{{.*}} !range ![[MD:[0-9]+]]
+// NV:  store i8 %[[LD]], ptr %y
+// NV: ![[MD]] = !{i8 0, i8 2}
+
+// Make sure bool loaded from memory is truncated and
+// range metadata is not emitted.
+// TODO: Re-enable range metadata after backend issue is fixed.
+
+// AMD:  %[[LD:[0-9]+]] = load i8, ptr addrspace(1) %x.global
+// AMD-NOT: !range
+// AMD:  %[[AND:[0-9]+]] = and i8 %[[LD]], 1
+// AMD:  store i8 %[[AND]], ptr addrspace(1) %y.global
+__global__ void test1(bool *x, bool *y) {
+  *y = *x != false;
+}
Index: clang/lib/CodeGen/CGExpr.cpp
===
--- clang/lib/CodeGen/CGExpr.cpp
+++ clang/lib/CodeGen/CGExpr.cpp
@@ -1789,7 +1789,9 @@
   if (EmitScalarRangeCheck(Load, Ty, Loc)) {
 // In order to prevent the optimizer from throwing away the check, don't
 // attach range metadata to the load.
-  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0)
+// TODO: Enable range metadata for AMDGCN after backend issue is fixed.
+  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0 &&
+ !CGM.getTriple().isAMDGCN())
 if (llvm::MDNode *RangeInfo = getRangeForLoadFromType(Ty))
   Load->setMetadata(llvm::LLVMContext::MD_range, RangeInfo);
 
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[PATCH] D135269: [AMDGPU] Disable bool range metadata to workaround backend issue

2022-10-05 Thread Yaxun Liu via Phabricator via cfe-commits
yaxunl created this revision.
yaxunl added reviewers: tra, ronl.
Herald added subscribers: kosarev, t-tye, tpr, dstuttard, kzhuravl.
Herald added a project: All.
yaxunl requested review of this revision.
Herald added a subscriber: wdng.

Currently there is some backend issue which causes
values loaded from bool pointer incorrect when
bool range metadata is emitted. Temporarily
disable bool range metadata until the backend issue
is fixed.


https://reviews.llvm.org/D135269

Files:
  clang/lib/CodeGen/CGExpr.cpp
  clang/test/CodeGenCUDA/bool-range.cu


Index: clang/test/CodeGenCUDA/bool-range.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/bool-range.cu
@@ -0,0 +1,23 @@
+// RUN: %clang_cc1 -emit-llvm %s -O3 -o - -fcuda-is-device \
+// RUN:   -triple nvptx64-unknown-unknown | FileCheck %s -check-prefixes=NV
+// RUN: %clang_cc1 -emit-llvm %s -O3 -o - -fcuda-is-device \
+// RUN:   -triple amdgcn-amd-amdhsa | FileCheck %s -check-prefixes=AMD
+
+#include "Inputs/cuda.h"
+
+// Make sure bool loaded from memory is truncated and
+// range metadata is not emitted.
+
+// NV:  %[[LD:[0-9]+]] = load i8, ptr %x,{{.*}} !range ![[MD:[0-9]+]]
+// NV:  store i8 %[[LD]], ptr %y
+// NV: ![[MD]] = !{i8 0, i8 2}
+
+// TODO: Re-enable range metadata after backend issue is fixed.
+
+// AMD:  %[[LD:[0-9]+]] = load i8, ptr addrspace(1) %x.global
+// AMD-NOT: !range
+// AMD:  %[[AND:[0-9]+]] = and i8 %[[LD]], 1
+// AMD:  store i8 %[[AND]], ptr addrspace(1) %y.global
+__global__ void test1(bool *x, bool *y) {
+  *y = *x != false;
+}
Index: clang/lib/CodeGen/CGExpr.cpp
===
--- clang/lib/CodeGen/CGExpr.cpp
+++ clang/lib/CodeGen/CGExpr.cpp
@@ -1789,7 +1789,9 @@
   if (EmitScalarRangeCheck(Load, Ty, Loc)) {
 // In order to prevent the optimizer from throwing away the check, don't
 // attach range metadata to the load.
-  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0)
+// TODO: Enable range metadata for AMDGCN after backend issue is fixed.
+  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0 &&
+ !CGM.getTriple().isAMDGCN())
 if (llvm::MDNode *RangeInfo = getRangeForLoadFromType(Ty))
   Load->setMetadata(llvm::LLVMContext::MD_range, RangeInfo);
 


Index: clang/test/CodeGenCUDA/bool-range.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDA/bool-range.cu
@@ -0,0 +1,23 @@
+// RUN: %clang_cc1 -emit-llvm %s -O3 -o - -fcuda-is-device \
+// RUN:   -triple nvptx64-unknown-unknown | FileCheck %s -check-prefixes=NV
+// RUN: %clang_cc1 -emit-llvm %s -O3 -o - -fcuda-is-device \
+// RUN:   -triple amdgcn-amd-amdhsa | FileCheck %s -check-prefixes=AMD
+
+#include "Inputs/cuda.h"
+
+// Make sure bool loaded from memory is truncated and
+// range metadata is not emitted.
+
+// NV:  %[[LD:[0-9]+]] = load i8, ptr %x,{{.*}} !range ![[MD:[0-9]+]]
+// NV:  store i8 %[[LD]], ptr %y
+// NV: ![[MD]] = !{i8 0, i8 2}
+
+// TODO: Re-enable range metadata after backend issue is fixed.
+
+// AMD:  %[[LD:[0-9]+]] = load i8, ptr addrspace(1) %x.global
+// AMD-NOT: !range
+// AMD:  %[[AND:[0-9]+]] = and i8 %[[LD]], 1
+// AMD:  store i8 %[[AND]], ptr addrspace(1) %y.global
+__global__ void test1(bool *x, bool *y) {
+  *y = *x != false;
+}
Index: clang/lib/CodeGen/CGExpr.cpp
===
--- clang/lib/CodeGen/CGExpr.cpp
+++ clang/lib/CodeGen/CGExpr.cpp
@@ -1789,7 +1789,9 @@
   if (EmitScalarRangeCheck(Load, Ty, Loc)) {
 // In order to prevent the optimizer from throwing away the check, don't
 // attach range metadata to the load.
-  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0)
+// TODO: Enable range metadata for AMDGCN after backend issue is fixed.
+  } else if (CGM.getCodeGenOpts().OptimizationLevel > 0 &&
+ !CGM.getTriple().isAMDGCN())
 if (llvm::MDNode *RangeInfo = getRangeForLoadFromType(Ty))
   Load->setMetadata(llvm::LLVMContext::MD_range, RangeInfo);
 
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