[PATCH] D152433: [ARM,AArch64] Add a full set of -mtp= options.

2023-06-15 Thread Simon Tatham via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rG10e42281144e: [ARM,AArch64] Add a full set of -mtp= options. 
(authored by simon_tatham).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152433/new/

https://reviews.llvm.org/D152433

Files:
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/ToolChains/Arch/AArch64.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.h
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/aarch64-thread-pointer.c
  clang/test/Driver/arm-thread-pointer.c
  clang/test/Driver/clang-translation.c
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
  llvm/lib/Target/ARM/ARM.td
  llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  llvm/lib/Target/ARM/ARMInstrInfo.td
  llvm/lib/Target/ARM/ARMInstrThumb2.td
  llvm/lib/Target/ARM/ARMPredicates.td
  llvm/lib/Target/ARM/ARMSubtarget.h
  llvm/test/CodeGen/AArch64/arm64-builtins-linux.ll
  llvm/test/CodeGen/ARM/readtp.ll
  llvm/test/CodeGen/ARM/stack-guard-tls.ll
  llvm/test/CodeGen/ARM/thread_pointer.ll

Index: llvm/test/CodeGen/ARM/thread_pointer.ll
===
--- llvm/test/CodeGen/ARM/thread_pointer.ll
+++ llvm/test/CodeGen/ARM/thread_pointer.ll
@@ -1,7 +1,11 @@
 ; RUN: llc -mtriple arm-linux-gnueabi -o - %s | FileCheck %s -check-prefix=CHECK-SOFT
-; RUN: llc -mtriple arm-linux-gnueabi -mattr=+read-tp-hard -o - %s | FileCheck %s -check-prefix=CHECK-HARD
+; RUN: llc -mtriple arm-linux-gnueabi -mattr=+read-tp-tpidrurw -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRURW
+; RUN: llc -mtriple arm-linux-gnueabi -mattr=+read-tp-tpidruro -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRURO
+; RUN: llc -mtriple arm-linux-gnueabi -mattr=+read-tp-tpidrprw -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRPRW
 ; RUN: llc -mtriple thumbv7-linux-gnueabi -o - %s | FileCheck %s -check-prefix=CHECK-SOFT
-; RUN: llc -mtriple thumbv7-linux-gnueabi -mattr=+read-tp-hard -o - %s | FileCheck %s -check-prefix=CHECK-HARD
+; RUN: llc -mtriple thumbv7-linux-gnueabi -mattr=+read-tp-tpidrurw -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRURW
+; RUN: llc -mtriple thumbv7-linux-gnueabi -mattr=+read-tp-tpidruro -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRURO
+; RUN: llc -mtriple thumbv7-linux-gnueabi -mattr=+read-tp-tpidrprw -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRPRW
 
 declare ptr @llvm.thread.pointer()
 
@@ -11,6 +15,8 @@
   ret ptr %tmp1
 }
 
-; CHECK-SOFT: bl __aeabi_read_tp
-; CHECK-HARD: mrc p15, #0, {{r[0-9]+}}, c13, c0, #3
+; CHECK-SOFT: bl __aeabi_read_tp
+; CHECK-TPIDRURW: mrc p15, #0, {{r[0-9]+}}, c13, c0, #2
+; CHECK-TPIDRURO: mrc p15, #0, {{r[0-9]+}}, c13, c0, #3
+; CHECK-TPIDRPRW: mrc p15, #0, {{r[0-9]+}}, c13, c0, #4
 
Index: llvm/test/CodeGen/ARM/stack-guard-tls.ll
===
--- llvm/test/CodeGen/ARM/stack-guard-tls.ll
+++ llvm/test/CodeGen/ARM/stack-guard-tls.ll
@@ -1,13 +1,13 @@
 ; RUN: split-file %s %t
 ; RUN: cat %t/main.ll %t/a.ll > %t/a2.ll
 ; RUN: cat %t/main.ll %t/b.ll > %t/b2.ll
-; RUN: llc %t/a2.ll -mtriple=armv7-unknown-linux-gnueabihf -mattr=+read-tp-hard -o - | \
+; RUN: llc %t/a2.ll -mtriple=armv7-unknown-linux-gnueabihf -mattr=+read-tp-tpidruro -o - | \
 ; RUN: FileCheck --check-prefixes=CHECK,CHECK-SMALL %s
-; RUN: llc %t/a2.ll -mtriple=thumbv7-unknown-linux-gnueabihf -mattr=+read-tp-hard -o - | \
+; RUN: llc %t/a2.ll -mtriple=thumbv7-unknown-linux-gnueabihf -mattr=+read-tp-tpidruro -o - | \
 ; RUN: FileCheck --check-prefixes=CHECK,CHECK-SMALL %s
-; RUN: llc %t/b2.ll -mtriple=armv7-unknown-linux-gnueabihf -mattr=+read-tp-hard -o - | \
+; RUN: llc %t/b2.ll -mtriple=armv7-unknown-linux-gnueabihf -mattr=+read-tp-tpidruro -o - | \
 ; RUN: FileCheck --check-prefixes=CHECK,CHECK-LARGE %s
-; RUN: llc %t/b2.ll -mtriple=thumbv7-unknown-linux-gnueabihf -mattr=+read-tp-hard -o - | \
+; RUN: llc %t/b2.ll -mtriple=thumbv7-unknown-linux-gnueabihf -mattr=+read-tp-tpidruro -o - | \
 ; RUN: FileCheck --check-prefixes=CHECK,CHECK-LARGE %s
 
 ;--- main.ll
Index: llvm/test/CodeGen/ARM/readtp.ll
===
--- llvm/test/CodeGen/ARM/readtp.ll
+++ llvm/test/CodeGen/ARM/readtp.ll
@@ -1,6 +1,10 @@
-; RUN: llc -mtriple=armeb-linux-gnueabihf -O2 -mattr=+read-tp-hard %s -o - | FileCheck %s -check-prefix=CHECK-HARD
+; RUN: llc -mtriple=armeb-linux-gnueabihf -O2 -mattr=+read-tp-tpidrurw %s -o - | FileCheck %s -check-prefix=CHECK-TPIDRURW
+; RUN: llc -mtriple=armeb-linux-gnueabihf -O2 -mattr=+read-tp-tpidruro %s -o - | FileCheck %s -check-prefix=CHECK-TPIDRURO
+; RUN: llc -mtriple=armeb-linux-gnueabihf -O2 -mattr=+read-tp-tpidrprw %s -o - | FileCheck %s -check-prefix=CHECK-TPIDRPRW
 ; RUN: llc -mtriple=armeb-linux-gnueabihf -O2 %s -o - | FileCheck %s -check-prefix=CHECK-SOFT
-; RUN: llc 

[PATCH] D152433: [ARM,AArch64] Add a full set of -mtp= options.

2023-06-14 Thread Nick Desaulniers via Phabricator via cfe-commits
nickdesaulniers accepted this revision.
nickdesaulniers added a comment.
This revision is now accepted and ready to land.

thanks for the patch!


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[PATCH] D152433: [ARM,AArch64] Add a full set of -mtp= options.

2023-06-13 Thread Simon Tatham via Phabricator via cfe-commits
simon_tatham added a comment.

Right, this seems to be passing tests now, so I think @nickdesaulniers's issue 
is fixed, and I've also split up the tests as @MaskRay suggested.


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[PATCH] D152433: [ARM,AArch64] Add a full set of -mtp= options.

2023-06-13 Thread Simon Tatham via Phabricator via cfe-commits
simon_tatham updated this revision to Diff 530830.
simon_tatham added a comment.

Rebased past rG34d7acd444b8 
 (which 
conflicted with it, though trivially) and attempted to fix the clang-format 
complaint in pre-merge checks.


Repository:
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CHANGES SINCE LAST ACTION
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Files:
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/ToolChains/Arch/AArch64.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.h
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/aarch64-thread-pointer.c
  clang/test/Driver/arm-thread-pointer.c
  clang/test/Driver/clang-translation.c
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
  llvm/lib/Target/ARM/ARM.td
  llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  llvm/lib/Target/ARM/ARMInstrInfo.td
  llvm/lib/Target/ARM/ARMInstrThumb2.td
  llvm/lib/Target/ARM/ARMPredicates.td
  llvm/lib/Target/ARM/ARMSubtarget.h
  llvm/test/CodeGen/AArch64/arm64-builtins-linux.ll
  llvm/test/CodeGen/ARM/readtp.ll
  llvm/test/CodeGen/ARM/stack-guard-tls.ll
  llvm/test/CodeGen/ARM/thread_pointer.ll

Index: llvm/test/CodeGen/ARM/thread_pointer.ll
===
--- llvm/test/CodeGen/ARM/thread_pointer.ll
+++ llvm/test/CodeGen/ARM/thread_pointer.ll
@@ -1,7 +1,11 @@
 ; RUN: llc -mtriple arm-linux-gnueabi -o - %s | FileCheck %s -check-prefix=CHECK-SOFT
-; RUN: llc -mtriple arm-linux-gnueabi -mattr=+read-tp-hard -o - %s | FileCheck %s -check-prefix=CHECK-HARD
+; RUN: llc -mtriple arm-linux-gnueabi -mattr=+read-tp-tpidrurw -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRURW
+; RUN: llc -mtriple arm-linux-gnueabi -mattr=+read-tp-tpidruro -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRURO
+; RUN: llc -mtriple arm-linux-gnueabi -mattr=+read-tp-tpidrprw -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRPRW
 ; RUN: llc -mtriple thumbv7-linux-gnueabi -o - %s | FileCheck %s -check-prefix=CHECK-SOFT
-; RUN: llc -mtriple thumbv7-linux-gnueabi -mattr=+read-tp-hard -o - %s | FileCheck %s -check-prefix=CHECK-HARD
+; RUN: llc -mtriple thumbv7-linux-gnueabi -mattr=+read-tp-tpidrurw -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRURW
+; RUN: llc -mtriple thumbv7-linux-gnueabi -mattr=+read-tp-tpidruro -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRURO
+; RUN: llc -mtriple thumbv7-linux-gnueabi -mattr=+read-tp-tpidrprw -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRPRW
 
 declare ptr @llvm.thread.pointer()
 
@@ -11,6 +15,8 @@
   ret ptr %tmp1
 }
 
-; CHECK-SOFT: bl __aeabi_read_tp
-; CHECK-HARD: mrc p15, #0, {{r[0-9]+}}, c13, c0, #3
+; CHECK-SOFT: bl __aeabi_read_tp
+; CHECK-TPIDRURW: mrc p15, #0, {{r[0-9]+}}, c13, c0, #2
+; CHECK-TPIDRURO: mrc p15, #0, {{r[0-9]+}}, c13, c0, #3
+; CHECK-TPIDRPRW: mrc p15, #0, {{r[0-9]+}}, c13, c0, #4
 
Index: llvm/test/CodeGen/ARM/stack-guard-tls.ll
===
--- llvm/test/CodeGen/ARM/stack-guard-tls.ll
+++ llvm/test/CodeGen/ARM/stack-guard-tls.ll
@@ -1,13 +1,13 @@
 ; RUN: split-file %s %t
 ; RUN: cat %t/main.ll %t/a.ll > %t/a2.ll
 ; RUN: cat %t/main.ll %t/b.ll > %t/b2.ll
-; RUN: llc %t/a2.ll -mtriple=armv7-unknown-linux-gnueabihf -mattr=+read-tp-hard -o - | \
+; RUN: llc %t/a2.ll -mtriple=armv7-unknown-linux-gnueabihf -mattr=+read-tp-tpidruro -o - | \
 ; RUN: FileCheck --check-prefixes=CHECK,CHECK-SMALL %s
-; RUN: llc %t/a2.ll -mtriple=thumbv7-unknown-linux-gnueabihf -mattr=+read-tp-hard -o - | \
+; RUN: llc %t/a2.ll -mtriple=thumbv7-unknown-linux-gnueabihf -mattr=+read-tp-tpidruro -o - | \
 ; RUN: FileCheck --check-prefixes=CHECK,CHECK-SMALL %s
-; RUN: llc %t/b2.ll -mtriple=armv7-unknown-linux-gnueabihf -mattr=+read-tp-hard -o - | \
+; RUN: llc %t/b2.ll -mtriple=armv7-unknown-linux-gnueabihf -mattr=+read-tp-tpidruro -o - | \
 ; RUN: FileCheck --check-prefixes=CHECK,CHECK-LARGE %s
-; RUN: llc %t/b2.ll -mtriple=thumbv7-unknown-linux-gnueabihf -mattr=+read-tp-hard -o - | \
+; RUN: llc %t/b2.ll -mtriple=thumbv7-unknown-linux-gnueabihf -mattr=+read-tp-tpidruro -o - | \
 ; RUN: FileCheck --check-prefixes=CHECK,CHECK-LARGE %s
 
 ;--- main.ll
Index: llvm/test/CodeGen/ARM/readtp.ll
===
--- llvm/test/CodeGen/ARM/readtp.ll
+++ llvm/test/CodeGen/ARM/readtp.ll
@@ -1,6 +1,10 @@
-; RUN: llc -mtriple=armeb-linux-gnueabihf -O2 -mattr=+read-tp-hard %s -o - | FileCheck %s -check-prefix=CHECK-HARD
+; RUN: llc -mtriple=armeb-linux-gnueabihf -O2 -mattr=+read-tp-tpidrurw %s -o - | FileCheck %s -check-prefix=CHECK-TPIDRURW
+; RUN: llc -mtriple=armeb-linux-gnueabihf -O2 -mattr=+read-tp-tpidruro %s -o - | FileCheck %s -check-prefix=CHECK-TPIDRURO
+; RUN: llc -mtriple=armeb-linux-gnueabihf -O2 -mattr=+read-tp-tpidrprw %s -o - | FileCheck %s -check-prefix=CHECK-TPIDRPRW
 ; RUN: llc 

[PATCH] D152433: [ARM,AArch64] Add a full set of -mtp= options.

2023-06-12 Thread Simon Tatham via Phabricator via cfe-commits
simon_tatham updated this revision to Diff 530544.
simon_tatham added a comment.

Fixed the isReadTPSoft predicate (sorry – I always get confused by when 
Tablegen autogenerates those predicates and when it doesn't), and reorganised 
the tests.

I couldn't find any existing test file, so I made a new pair 
`arm-thread-pointer.c` and `aarch64-thread-pointer.c` and moved all the TP 
tests out into there.


Repository:
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Files:
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/ToolChains/Arch/AArch64.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.h
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/aarch64-thread-pointer.c
  clang/test/Driver/arm-thread-pointer.c
  clang/test/Driver/clang-translation.c
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
  llvm/lib/Target/ARM/ARM.td
  llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  llvm/lib/Target/ARM/ARMInstrInfo.td
  llvm/lib/Target/ARM/ARMInstrThumb2.td
  llvm/lib/Target/ARM/ARMPredicates.td
  llvm/lib/Target/ARM/ARMSubtarget.h
  llvm/test/CodeGen/AArch64/arm64-builtins-linux.ll
  llvm/test/CodeGen/ARM/readtp.ll
  llvm/test/CodeGen/ARM/stack-guard-tls.ll
  llvm/test/CodeGen/ARM/thread_pointer.ll

Index: llvm/test/CodeGen/ARM/thread_pointer.ll
===
--- llvm/test/CodeGen/ARM/thread_pointer.ll
+++ llvm/test/CodeGen/ARM/thread_pointer.ll
@@ -1,7 +1,11 @@
 ; RUN: llc -mtriple arm-linux-gnueabi -o - %s | FileCheck %s -check-prefix=CHECK-SOFT
-; RUN: llc -mtriple arm-linux-gnueabi -mattr=+read-tp-hard -o - %s | FileCheck %s -check-prefix=CHECK-HARD
+; RUN: llc -mtriple arm-linux-gnueabi -mattr=+read-tp-tpidrurw -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRURW
+; RUN: llc -mtriple arm-linux-gnueabi -mattr=+read-tp-tpidruro -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRURO
+; RUN: llc -mtriple arm-linux-gnueabi -mattr=+read-tp-tpidrprw -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRPRW
 ; RUN: llc -mtriple thumbv7-linux-gnueabi -o - %s | FileCheck %s -check-prefix=CHECK-SOFT
-; RUN: llc -mtriple thumbv7-linux-gnueabi -mattr=+read-tp-hard -o - %s | FileCheck %s -check-prefix=CHECK-HARD
+; RUN: llc -mtriple thumbv7-linux-gnueabi -mattr=+read-tp-tpidrurw -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRURW
+; RUN: llc -mtriple thumbv7-linux-gnueabi -mattr=+read-tp-tpidruro -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRURO
+; RUN: llc -mtriple thumbv7-linux-gnueabi -mattr=+read-tp-tpidrprw -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRPRW
 
 declare ptr @llvm.thread.pointer()
 
@@ -11,6 +15,8 @@
   ret ptr %tmp1
 }
 
-; CHECK-SOFT: bl __aeabi_read_tp
-; CHECK-HARD: mrc p15, #0, {{r[0-9]+}}, c13, c0, #3
+; CHECK-SOFT: bl __aeabi_read_tp
+; CHECK-TPIDRURW: mrc p15, #0, {{r[0-9]+}}, c13, c0, #2
+; CHECK-TPIDRURO: mrc p15, #0, {{r[0-9]+}}, c13, c0, #3
+; CHECK-TPIDRPRW: mrc p15, #0, {{r[0-9]+}}, c13, c0, #4
 
Index: llvm/test/CodeGen/ARM/stack-guard-tls.ll
===
--- llvm/test/CodeGen/ARM/stack-guard-tls.ll
+++ llvm/test/CodeGen/ARM/stack-guard-tls.ll
@@ -1,13 +1,13 @@
 ; RUN: split-file %s %t
 ; RUN: cat %t/main.ll %t/a.ll > %t/a2.ll
 ; RUN: cat %t/main.ll %t/b.ll > %t/b2.ll
-; RUN: llc %t/a2.ll -mtriple=armv7-unknown-linux-gnueabihf -mattr=+read-tp-hard -o - | \
+; RUN: llc %t/a2.ll -mtriple=armv7-unknown-linux-gnueabihf -mattr=+read-tp-tpidruro -o - | \
 ; RUN: FileCheck --check-prefixes=CHECK,CHECK-SMALL %s
-; RUN: llc %t/a2.ll -mtriple=thumbv7-unknown-linux-gnueabihf -mattr=+read-tp-hard -o - | \
+; RUN: llc %t/a2.ll -mtriple=thumbv7-unknown-linux-gnueabihf -mattr=+read-tp-tpidruro -o - | \
 ; RUN: FileCheck --check-prefixes=CHECK,CHECK-SMALL %s
-; RUN: llc %t/b2.ll -mtriple=armv7-unknown-linux-gnueabihf -mattr=+read-tp-hard -o - | \
+; RUN: llc %t/b2.ll -mtriple=armv7-unknown-linux-gnueabihf -mattr=+read-tp-tpidruro -o - | \
 ; RUN: FileCheck --check-prefixes=CHECK,CHECK-LARGE %s
-; RUN: llc %t/b2.ll -mtriple=thumbv7-unknown-linux-gnueabihf -mattr=+read-tp-hard -o - | \
+; RUN: llc %t/b2.ll -mtriple=thumbv7-unknown-linux-gnueabihf -mattr=+read-tp-tpidruro -o - | \
 ; RUN: FileCheck --check-prefixes=CHECK,CHECK-LARGE %s
 
 ;--- main.ll
Index: llvm/test/CodeGen/ARM/readtp.ll
===
--- llvm/test/CodeGen/ARM/readtp.ll
+++ llvm/test/CodeGen/ARM/readtp.ll
@@ -1,6 +1,10 @@
-; RUN: llc -mtriple=armeb-linux-gnueabihf -O2 -mattr=+read-tp-hard %s -o - | FileCheck %s -check-prefix=CHECK-HARD
+; RUN: llc -mtriple=armeb-linux-gnueabihf -O2 -mattr=+read-tp-tpidrurw %s -o - | FileCheck %s -check-prefix=CHECK-TPIDRURW
+; RUN: llc -mtriple=armeb-linux-gnueabihf -O2 -mattr=+read-tp-tpidruro %s -o - | FileCheck %s -check-prefix=CHECK-TPIDRURO
+; RUN: llc 

[PATCH] D152433: [ARM,AArch64] Add a full set of -mtp= options.

2023-06-09 Thread Fangrui Song via Phabricator via cfe-commits
MaskRay added inline comments.



Comment at: clang/test/Driver/clang-translation.c:132
+// ARMv7_THREAD_POINTER-HARD: "-target-feature" "+read-tp-tpidruro"
+
+// RUN: %clang -target armv7-linux -mtp=tpidruro -### -S %s 2>&1 | \

`clang-translation.c`'s job is shifting, but I think it is mainly for testing 
common options. For Arm-specific testing, I think using a `arm-*.c` file will 
be more appropriate. Ideally we can find an existing file where new RUN lines 
seem appropriate, as a fallback we can introduce a new test file:)

Also, use `--target=` for new tests. `-target ` has been deprecated (without a 
warning) since Clang 3.x era.


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[PATCH] D152433: [ARM,AArch64] Add a full set of -mtp= options.

2023-06-09 Thread Nick Desaulniers via Phabricator via cfe-commits
nickdesaulniers added inline comments.



Comment at: llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp:4941-4943
   if (LoadImmOpc == ARM::MRC || LoadImmOpc == ARM::t2MRC) {
-assert(Subtarget.isReadTPHard() &&
+assert(!Subtarget.isReadTPSoft() &&
"TLS stack protector requires hardware TLS register");

From the buildbot presubmit failure:

```
/var/lib/buildkite-agent/builds/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp:4942:23:
 error: no member named 'isReadTPSoft' in 'llvm::ARMSubtarget'
assert(!Subtarget.isReadTPSoft() &&
~ ^
/usr/include/assert.h:93:27: note: expanded from macro 'assert'
 (static_cast  (expr) \
  ^~~~
```
PTAL


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[PATCH] D152433: [ARM,AArch64] Add a full set of -mtp= options.

2023-06-08 Thread Renato Golin via Phabricator via cfe-commits
rengolin added a subscriber: olista01.
rengolin added inline comments.



Comment at: clang/include/clang/Driver/Options.td:3525
+   "For AArch32: 'soft' uses a function call, or 'tpidrurw', 
'tpidruro' or 'tpidrprw' use the three CP15 registers. 'cp15' is an alias for 
'tpidruro'. "
+   "For AArch64: 'tpidr_el0', 'tpidr_el1', 'tpidr_el2', 'tpidr_el3' or 
'tpidrro_el0' use the five system registers. 'elN' is an alias for 
'tpidr_elN'.">;
 def mpure_code : Flag<["-"], "mpure-code">, Alias; // Alias for 
GCC compatibility

simon_tatham wrote:
> rengolin wrote:
> > From your comment:
> > 
> > > "In AArch32, on the other hand, the _only_ thread register you can choose 
> > > (apart from 'none, use a function call') is the one that's read-only at 
> > > EL0."
> > 
> > I inferred the current alias `el0` would map to the read-only version 
> > `tpidrro_el0`.
> > 
> > Looking at the implementation below (`AArch64ExpandPseudoInsts.cpp`), `EL0` 
> > seems to be the default when choosing the thread pointer?
> If you inferred that, then I was unclear, and should reword :-)
> 
> `el0` is a name only accepted on AArch64, and maps to the AArch64 register 
> `tpidr_el0`.
> 
> The only hardware option in AArch32 (before this commit) is called `cp15` 
> (unhelpfully, since all three regs are in CP15), and is an alias for 
> `tpidruro`, which is the AArch32 register that's readonly at EL0 and writable 
> at EL1 (and in fact aliases the bottom 32 bits of tpidrro_el0).
> 
> Yes, the current defaults are different between AArch32 and 64 
> (unsurprisingly, since no register is currently supported on both), but that 
> makes sense, since Linux also seems to do things differently. On AArch32 the 
> code generation uses TPIDRURO, which unprivileged code can read but not 
> write, and on AArch64 it uses TPIDR_EL0 which unprivileged code can overwrite 
> if it wants to. I don't know why the defaults are different, but I have no 
> plan to change them here!
Right! The confusion was on my side on the overloaded `EL0` for both the 
register name in AArch64 and the processor state on both. I should have noticed 
the capitalisation difference. Now it makes sense, thanks!

> I don't know why the defaults are different, but I have no plan to change 
> them here!

Ack. First introduce functionality, then investigate why (on a separate patch).

@olista01 might remember something...


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[PATCH] D152433: [ARM,AArch64] Add a full set of -mtp= options.

2023-06-08 Thread Simon Tatham via Phabricator via cfe-commits
simon_tatham added a comment.

In D152433#4405428 , @rengolin wrote:

> The only minor visible difference is the removal of `read-tp-hard` option 
> from the LLVM side, which could be used by other downstream implementations.

Yes. I wasn't sure how much that mattered, and like you, I came down weakly on 
the side of not worrying about the change and keeping the names logical. I'll 
change it back without complaining if anyone else has a strong opinion, though!




Comment at: clang/include/clang/Driver/Options.td:3525
+   "For AArch32: 'soft' uses a function call, or 'tpidrurw', 
'tpidruro' or 'tpidrprw' use the three CP15 registers. 'cp15' is an alias for 
'tpidruro'. "
+   "For AArch64: 'tpidr_el0', 'tpidr_el1', 'tpidr_el2', 'tpidr_el3' or 
'tpidrro_el0' use the five system registers. 'elN' is an alias for 
'tpidr_elN'.">;
 def mpure_code : Flag<["-"], "mpure-code">, Alias; // Alias for 
GCC compatibility

rengolin wrote:
> From your comment:
> 
> > "In AArch32, on the other hand, the _only_ thread register you can choose 
> > (apart from 'none, use a function call') is the one that's read-only at 
> > EL0."
> 
> I inferred the current alias `el0` would map to the read-only version 
> `tpidrro_el0`.
> 
> Looking at the implementation below (`AArch64ExpandPseudoInsts.cpp`), `EL0` 
> seems to be the default when choosing the thread pointer?
If you inferred that, then I was unclear, and should reword :-)

`el0` is a name only accepted on AArch64, and maps to the AArch64 register 
`tpidr_el0`.

The only hardware option in AArch32 (before this commit) is called `cp15` 
(unhelpfully, since all three regs are in CP15), and is an alias for 
`tpidruro`, which is the AArch32 register that's readonly at EL0 and writable 
at EL1 (and in fact aliases the bottom 32 bits of tpidrro_el0).

Yes, the current defaults are different between AArch32 and 64 (unsurprisingly, 
since no register is currently supported on both), but that makes sense, since 
Linux also seems to do things differently. On AArch32 the code generation uses 
TPIDRURO, which unprivileged code can read but not write, and on AArch64 it 
uses TPIDR_EL0 which unprivileged code can overwrite if it wants to. I don't 
know why the defaults are different, but I have no plan to change them here!


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[PATCH] D152433: [ARM,AArch64] Add a full set of -mtp= options.

2023-06-08 Thread Renato Golin via Phabricator via cfe-commits
rengolin added a comment.

The only minor visible difference is the removal of `read-tp-hard` option from 
the LLVM side, which could be used by other downstream implementations.

I personally don't think this is a big deal. First, we don't promise stability 
on that layer, and second, it would be trivial to find out what the option has 
changed to.

This looks good to me, perhaps clearing the potential confusion on the commit 
message (inline comment).

Give it some time for other people to see it.

Thanks!
Renato




Comment at: clang/include/clang/Driver/Options.td:3525
+   "For AArch32: 'soft' uses a function call, or 'tpidrurw', 
'tpidruro' or 'tpidrprw' use the three CP15 registers. 'cp15' is an alias for 
'tpidruro'. "
+   "For AArch64: 'tpidr_el0', 'tpidr_el1', 'tpidr_el2', 'tpidr_el3' or 
'tpidrro_el0' use the five system registers. 'elN' is an alias for 
'tpidr_elN'.">;
 def mpure_code : Flag<["-"], "mpure-code">, Alias; // Alias for 
GCC compatibility

From your comment:

> "In AArch32, on the other hand, the _only_ thread register you can choose 
> (apart from 'none, use a function call') is the one that's read-only at EL0."

I inferred the current alias `el0` would map to the read-only version 
`tpidrro_el0`.

Looking at the implementation below (`AArch64ExpandPseudoInsts.cpp`), `EL0` 
seems to be the default when choosing the thread pointer?


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[PATCH] D152433: [ARM,AArch64] Add a full set of -mtp= options.

2023-06-08 Thread Simon Tatham via Phabricator via cfe-commits
simon_tatham created this revision.
simon_tatham added reviewers: nickdesaulniers, peter.smith, kristof.beyls, 
t.p.northover, rengolin.
Herald added a subscriber: hiraditya.
Herald added a project: All.
simon_tatham requested review of this revision.
Herald added subscribers: llvm-commits, cfe-commits, MaskRay.
Herald added projects: clang, LLVM.

AArch64 has five system registers intended to be useful as thread
pointers: one for each exception level which is RW at that level and
inaccessible to lower ones, and the special TPIDRRO_EL0 which is
readable but not writable at EL0. AArch32 has three, corresponding to
the AArch64 ones that aren't specific to EL2 or EL3.

Currently clang supports only a subset of these registers, and not
even a consistent subset between AArch64 and AArch32. For AArch64,
clang permits you to choose between the four TPIDR_ELn thread
registers, but not the fifth one, TPIDRRO_EL0. In AArch32, on the
other hand, the _only_ thread register you can choose (apart from
'none, use a function call') is the one that's read-only at EL0. There
is no thread register that you can currently use in both targets!

For custom and bare-metal purposes, users might very reasonably want
to use any of these thread registers. There's no reason they shouldn't
all be supported as options, even if the default choices follow
existing practice on typical operating systems.

This commit extends the range of values acceptable to the `-mtp=`
clang option, so that you can specify any of these registers by (the
lower-case version of) their official names in the ArmARM:

- tpidr_el0, tpidrro_el0, tpidr_el1, tpidr_el2, tpidr_el3 for AArch64
- tpidrurw, tpidruro, tpidrprw for AArch32

All existing values of the option are still supported and behave the
same as before. Defaults are also unchanged. No command line that
worked already should change behaviour as a result of this.

The new values for the `-mtp=` option have been agreed with Arm's gcc
developers (although I don't know whether they plan to implement them
in the near future).


Repository:
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https://reviews.llvm.org/D152433

Files:
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/ToolChains/Arch/AArch64.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.h
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/clang-translation.c
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
  llvm/lib/Target/ARM/ARM.td
  llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  llvm/lib/Target/ARM/ARMInstrInfo.td
  llvm/lib/Target/ARM/ARMInstrThumb2.td
  llvm/lib/Target/ARM/ARMPredicates.td
  llvm/test/CodeGen/AArch64/arm64-builtins-linux.ll
  llvm/test/CodeGen/ARM/readtp.ll
  llvm/test/CodeGen/ARM/stack-guard-tls.ll
  llvm/test/CodeGen/ARM/thread_pointer.ll

Index: llvm/test/CodeGen/ARM/thread_pointer.ll
===
--- llvm/test/CodeGen/ARM/thread_pointer.ll
+++ llvm/test/CodeGen/ARM/thread_pointer.ll
@@ -1,7 +1,11 @@
 ; RUN: llc -mtriple arm-linux-gnueabi -o - %s | FileCheck %s -check-prefix=CHECK-SOFT
-; RUN: llc -mtriple arm-linux-gnueabi -mattr=+read-tp-hard -o - %s | FileCheck %s -check-prefix=CHECK-HARD
+; RUN: llc -mtriple arm-linux-gnueabi -mattr=+read-tp-tpidrurw -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRURW
+; RUN: llc -mtriple arm-linux-gnueabi -mattr=+read-tp-tpidruro -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRURO
+; RUN: llc -mtriple arm-linux-gnueabi -mattr=+read-tp-tpidrprw -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRPRW
 ; RUN: llc -mtriple thumbv7-linux-gnueabi -o - %s | FileCheck %s -check-prefix=CHECK-SOFT
-; RUN: llc -mtriple thumbv7-linux-gnueabi -mattr=+read-tp-hard -o - %s | FileCheck %s -check-prefix=CHECK-HARD
+; RUN: llc -mtriple thumbv7-linux-gnueabi -mattr=+read-tp-tpidrurw -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRURW
+; RUN: llc -mtriple thumbv7-linux-gnueabi -mattr=+read-tp-tpidruro -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRURO
+; RUN: llc -mtriple thumbv7-linux-gnueabi -mattr=+read-tp-tpidrprw -o - %s | FileCheck %s -check-prefix=CHECK-TPIDRPRW
 
 declare ptr @llvm.thread.pointer()
 
@@ -11,6 +15,8 @@
   ret ptr %tmp1
 }
 
-; CHECK-SOFT: bl __aeabi_read_tp
-; CHECK-HARD: mrc p15, #0, {{r[0-9]+}}, c13, c0, #3
+; CHECK-SOFT: bl __aeabi_read_tp
+; CHECK-TPIDRURW: mrc p15, #0, {{r[0-9]+}}, c13, c0, #2
+; CHECK-TPIDRURO: mrc p15, #0, {{r[0-9]+}}, c13, c0, #3
+; CHECK-TPIDRPRW: mrc p15, #0, {{r[0-9]+}}, c13, c0, #4
 
Index: llvm/test/CodeGen/ARM/stack-guard-tls.ll
===
--- llvm/test/CodeGen/ARM/stack-guard-tls.ll
+++ llvm/test/CodeGen/ARM/stack-guard-tls.ll
@@ -1,13 +1,13 @@
 ; RUN: split-file %s %t
 ; RUN: cat %t/main.ll %t/a.ll > %t/a2.ll
 ; RUN: cat %t/main.ll %t/b.ll > %t/b2.ll
-; RUN: llc %t/a2.ll -mtriple=armv7-unknown-linux-gnueabihf -mattr=+read-tp-hard -o - | \
+; RUN: llc %t/a2.ll