[PATCH] D34649: Remove addtional parameters in function std::next() and std::prev()

[Jason Liu via Phabricator via cfe-commits]

jasonliu created this revision.

Creating a function pointer with proper parameters pointing to std::next() or 
std::prev() should work.
This change moves the invented paramater for enable_if over to the return type 
to resolve this QoI issue.


https://reviews.llvm.org/D34649

Files:
  include/iterator
  test/std/iterators/iterator.primitives/iterator.operations/next.pass.cpp
  test/std/iterators/iterator.primitives/iterator.operations/prev.pass.cpp


Index: test/std/iterators/iterator.primitives/iterator.operations/prev.pass.cpp
===
--- test/std/iterators/iterator.primitives/iterator.operations/prev.pass.cpp
+++ test/std/iterators/iterator.primitives/iterator.operations/prev.pass.cpp
@@ -22,6 +22,9 @@
 test(It i, typename std::iterator_traits::difference_type n, It x)
 {
 assert(std::prev(i, n) == x);
+
+It (*prev)(It, typename std::iterator_traits::difference_type) = 
std::prev;
+assert(prev(i, n) == x);
 }
 
 template 
Index: test/std/iterators/iterator.primitives/iterator.operations/next.pass.cpp
===
--- test/std/iterators/iterator.primitives/iterator.operations/next.pass.cpp
+++ test/std/iterators/iterator.primitives/iterator.operations/next.pass.cpp
@@ -24,6 +24,9 @@
 test(It i, typename std::iterator_traits::difference_type n, It x)
 {
 assert(std::next(i, n) == x);
+
+It (*next)(It, typename std::iterator_traits::difference_type) = 
std::next;
+assert(next(i, n) == x);
 }
 
 template 
Index: include/iterator
===
--- include/iterator
+++ include/iterator
@@ -604,21 +604,27 @@
 
 template 
 inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14
-_InputIter
+typename enable_if
+<
+__is_input_iterator<_InputIter>::value, 
+_InputIter
+>::type
 next(_InputIter __x,
- typename iterator_traits<_InputIter>::difference_type __n = 1,
- typename enable_if<__is_input_iterator<_InputIter>::value>::type* = 0)
+ typename iterator_traits<_InputIter>::difference_type __n = 1)
 {
 _VSTD::advance(__x, __n);
 return __x;
 }
 
 template 
 inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14
-_BidiretionalIter
+typename enable_if
+<
+__is_bidirectional_iterator<_BidiretionalIter>::value, 
+_BidiretionalIter
+>::type
 prev(_BidiretionalIter __x,
- typename iterator_traits<_BidiretionalIter>::difference_type __n = 1,
- typename 
enable_if<__is_bidirectional_iterator<_BidiretionalIter>::value>::type* = 0)
+ typename iterator_traits<_BidiretionalIter>::difference_type __n = 1)
 {
 _VSTD::advance(__x, -__n);
 return __x;


Index: test/std/iterators/iterator.primitives/iterator.operations/prev.pass.cpp
===
--- test/std/iterators/iterator.primitives/iterator.operations/prev.pass.cpp
+++ test/std/iterators/iterator.primitives/iterator.operations/prev.pass.cpp
@@ -22,6 +22,9 @@
 test(It i, typename std::iterator_traits::difference_type n, It x)
 {
 assert(std::prev(i, n) == x);
+
+It (*prev)(It, typename std::iterator_traits::difference_type) = std::prev;
+assert(prev(i, n) == x);
 }
 
 template 
Index: test/std/iterators/iterator.primitives/iterator.operations/next.pass.cpp
===
--- test/std/iterators/iterator.primitives/iterator.operations/next.pass.cpp
+++ test/std/iterators/iterator.primitives/iterator.operations/next.pass.cpp
@@ -24,6 +24,9 @@
 test(It i, typename std::iterator_traits::difference_type n, It x)
 {
 assert(std::next(i, n) == x);
+
+It (*next)(It, typename std::iterator_traits::difference_type) = std::next;
+assert(next(i, n) == x);
 }
 
 template 
Index: include/iterator
===
--- include/iterator
+++ include/iterator
@@ -604,21 +604,27 @@
 
 template 
 inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14
-_InputIter
+typename enable_if
+<
+__is_input_iterator<_InputIter>::value, 
+_InputIter
+>::type
 next(_InputIter __x,
- typename iterator_traits<_InputIter>::difference_type __n = 1,
- typename enable_if<__is_input_iterator<_InputIter>::value>::type* = 0)
+ typename iterator_traits<_InputIter>::difference_type __n = 1)
 {
 _VSTD::advance(__x, __n);
 return __x;
 }
 
 template 
 inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14
-_BidiretionalIter
+typename enable_if
+<
+__is_bidirectional_iterator<_BidiretionalIter>::value, 
+_BidiretionalIter
+>::type
 prev(_BidiretionalIter __x,
- typename iterator_traits<_BidiretionalIter>::difference_type __n = 1,
- typename enable_if<__is_bidirectional_iterator<_BidiretionalIter>::value>::type* = 0)
+ typename iterator_traits<_BidiretionalIter>::difference_type __n = 1)
 {
 _VSTD::advance(__x, -__n);

[PATCH] D58930: Add XCOFF triple object format type for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu created this revision.
jasonliu added reviewers: hubert.reinterpretcast, sfertile, chandlerc, 
apaprocki.
Herald added subscribers: llvm-commits, lldb-commits, cfe-commits, dexonsmith, 
aheejin, hiraditya, javed.absar.
Herald added projects: clang, LLDB, LLVM.

This patch adds an XCOFF triple object format type into LLVM. This XCOFF triple 
object file type will be used later by object file and assembly generation for 
the AIX platform.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D58930

Files:
  clang/lib/CodeGen/BackendUtil.cpp
  clang/lib/CodeGen/CodeGenModule.cpp
  lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
  llvm/include/llvm/ADT/Triple.h
  llvm/include/llvm/MC/MCObjectFileInfo.h
  llvm/lib/MC/MCContext.cpp
  llvm/lib/MC/MCObjectFileInfo.cpp
  llvm/lib/MC/MCParser/AsmParser.cpp
  llvm/lib/Support/Triple.cpp
  llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
  llvm/unittests/ADT/TripleTest.cpp

Index: llvm/unittests/ADT/TripleTest.cpp
===
--- llvm/unittests/ADT/TripleTest.cpp
+++ llvm/unittests/ADT/TripleTest.cpp
@@ -1258,6 +1258,11 @@
   EXPECT_EQ(Triple::Wasm,
 Triple("wasm64-unknown-wasi-musl-wasm").getObjectFormat());
 
+  EXPECT_EQ(Triple::XCOFF, Triple("powerpc-ibm-aix").getObjectFormat());
+  EXPECT_EQ(Triple::XCOFF, Triple("powerpc64-ibm-aix").getObjectFormat());
+  EXPECT_EQ(Triple::XCOFF, Triple("powerpc---xcoff").getObjectFormat());
+  EXPECT_EQ(Triple::XCOFF, Triple("powerpc64---xcoff").getObjectFormat());
+
   Triple MSVCNormalized(Triple::normalize("i686-pc-windows-msvc-elf"));
   EXPECT_EQ(Triple::ELF, MSVCNormalized.getObjectFormat());
 
@@ -1276,6 +1281,9 @@
 
   T.setObjectFormat(Triple::MachO);
   EXPECT_EQ(Triple::MachO, T.getObjectFormat());
+  
+  T.setObjectFormat(Triple::XCOFF);
+  EXPECT_EQ(Triple::XCOFF, T.getObjectFormat());
 }
 
 TEST(TripleTest, NormalizeWindows) {
Index: llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
===
--- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -5594,6 +5594,9 @@
   case MCObjectFileInfo::IsWasm:
 CurrentFormat = WASM;
 break;
+  case MCObjectFileInfo::IsXCOFF:
+llvm_unreachable("unexpected object format");
+break;
   }
 
   if (~Prefix->SupportedFormats & CurrentFormat) {
Index: llvm/lib/Support/Triple.cpp
===
--- llvm/lib/Support/Triple.cpp
+++ llvm/lib/Support/Triple.cpp
@@ -534,6 +534,9 @@
 
 static Triple::ObjectFormatType parseFormat(StringRef EnvironmentName) {
   return StringSwitch(EnvironmentName)
+// FIXME: We have to put XCOFF before COFF;
+// perhaps an order-independent pattern matching is desired?
+.EndsWith("xcoff", Triple::XCOFF)
 .EndsWith("coff", Triple::COFF)
 .EndsWith("elf", Triple::ELF)
 .EndsWith("macho", Triple::MachO)
@@ -622,6 +625,7 @@
   case Triple::ELF: return "elf";
   case Triple::MachO: return "macho";
   case Triple::Wasm: return "wasm";
+  case Triple::XCOFF: return "xcoff";
   }
   llvm_unreachable("unknown object format type");
 }
@@ -686,6 +690,8 @@
   case Triple::ppc64:
 if (T.isOSDarwin())
   return Triple::MachO;
+else if (T.isOSAIX())
+  return Triple::XCOFF;
 return Triple::ELF;
 
   case Triple::wasm32:
Index: llvm/lib/MC/MCParser/AsmParser.cpp
===
--- llvm/lib/MC/MCParser/AsmParser.cpp
+++ llvm/lib/MC/MCParser/AsmParser.cpp
@@ -710,6 +710,9 @@
   case MCObjectFileInfo::IsWasm:
 PlatformParser.reset(createWasmAsmParser());
 break;
+  case MCObjectFileInfo::IsXCOFF:
+// TODO: Need to implement createXCOFFAsmParser for XCOFF format.
+break;
   }
 
   PlatformParser->Initialize(*this);
Index: llvm/lib/MC/MCObjectFileInfo.cpp
===
--- llvm/lib/MC/MCObjectFileInfo.cpp
+++ llvm/lib/MC/MCObjectFileInfo.cpp
@@ -801,6 +801,10 @@
 Env = IsWasm;
 initWasmMCObjectFileInfo(TT);
 break;
+  case Triple::XCOFF:
+Env = IsXCOFF;
+// TODO: Initialize MCObjectFileInfo for XCOFF format when MCSectionXCOFF is ready.
+break;
   case Triple::UnknownObjectFormat:
 report_fatal_error("Cannot initialize MC for unknown object file format.");
 break;
@@ -816,6 +820,7 @@
   case Triple::MachO:
   case Triple::COFF:
   case Triple::Wasm:
+  case Triple::XCOFF:
   case Triple::UnknownObjectFormat:
 report_fatal_error("Cannot get DWARF comdat section for this object file "
"format: not implemented.");
Index: llvm/lib/MC/MCContext.cpp
===
--- llvm/lib/MC/MCContext.cpp
+++ llvm/lib/MC/MCContext.cpp
@@ -161,6 +161,9 @@
   return new (Name, *this) MCSymbolMachO(Name, IsTemporary);
 case 

[PATCH] D58930: Add XCOFF triple object format type for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu updated this revision to Diff 189514.
jasonliu added a comment.

Address comments in last revision.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D58930/new/

https://reviews.llvm.org/D58930

Files:
  clang/lib/CodeGen/BackendUtil.cpp
  clang/lib/CodeGen/CodeGenModule.cpp
  lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
  llvm/include/llvm/ADT/Triple.h
  llvm/include/llvm/MC/MCObjectFileInfo.h
  llvm/lib/MC/MCContext.cpp
  llvm/lib/MC/MCObjectFileInfo.cpp
  llvm/lib/MC/MCParser/AsmParser.cpp
  llvm/lib/Support/Triple.cpp
  llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
  llvm/unittests/ADT/TripleTest.cpp

Index: llvm/unittests/ADT/TripleTest.cpp
===
--- llvm/unittests/ADT/TripleTest.cpp
+++ llvm/unittests/ADT/TripleTest.cpp
@@ -1258,6 +1258,11 @@
   EXPECT_EQ(Triple::Wasm,
 Triple("wasm64-unknown-wasi-musl-wasm").getObjectFormat());
 
+  EXPECT_EQ(Triple::XCOFF, Triple("powerpc-ibm-aix").getObjectFormat());
+  EXPECT_EQ(Triple::XCOFF, Triple("powerpc64-ibm-aix").getObjectFormat());
+  EXPECT_EQ(Triple::XCOFF, Triple("powerpc---xcoff").getObjectFormat());
+  EXPECT_EQ(Triple::XCOFF, Triple("powerpc64---xcoff").getObjectFormat());
+
   Triple MSVCNormalized(Triple::normalize("i686-pc-windows-msvc-elf"));
   EXPECT_EQ(Triple::ELF, MSVCNormalized.getObjectFormat());
 
@@ -1276,6 +1281,9 @@
 
   T.setObjectFormat(Triple::MachO);
   EXPECT_EQ(Triple::MachO, T.getObjectFormat());
+  
+  T.setObjectFormat(Triple::XCOFF);
+  EXPECT_EQ(Triple::XCOFF, T.getObjectFormat());
 }
 
 TEST(TripleTest, NormalizeWindows) {
Index: llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
===
--- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -5594,6 +5594,9 @@
   case MCObjectFileInfo::IsWasm:
 CurrentFormat = WASM;
 break;
+  case MCObjectFileInfo::IsXCOFF:
+llvm_unreachable("unexpected object format");
+break;
   }
 
   if (~Prefix->SupportedFormats & CurrentFormat) {
Index: llvm/lib/Support/Triple.cpp
===
--- llvm/lib/Support/Triple.cpp
+++ llvm/lib/Support/Triple.cpp
@@ -534,6 +534,9 @@
 
 static Triple::ObjectFormatType parseFormat(StringRef EnvironmentName) {
   return StringSwitch(EnvironmentName)
+// "xcoff" must come before "coff" because of the order-dependendent
+// pattern matching.
+.EndsWith("xcoff", Triple::XCOFF)
 .EndsWith("coff", Triple::COFF)
 .EndsWith("elf", Triple::ELF)
 .EndsWith("macho", Triple::MachO)
@@ -622,6 +625,7 @@
   case Triple::ELF: return "elf";
   case Triple::MachO: return "macho";
   case Triple::Wasm: return "wasm";
+  case Triple::XCOFF: return "xcoff";
   }
   llvm_unreachable("unknown object format type");
 }
@@ -686,6 +690,8 @@
   case Triple::ppc64:
 if (T.isOSDarwin())
   return Triple::MachO;
+else if (T.isOSAIX())
+  return Triple::XCOFF;
 return Triple::ELF;
 
   case Triple::wasm32:
Index: llvm/lib/MC/MCParser/AsmParser.cpp
===
--- llvm/lib/MC/MCParser/AsmParser.cpp
+++ llvm/lib/MC/MCParser/AsmParser.cpp
@@ -710,6 +710,9 @@
   case MCObjectFileInfo::IsWasm:
 PlatformParser.reset(createWasmAsmParser());
 break;
+  case MCObjectFileInfo::IsXCOFF:
+// TODO: Need to implement createXCOFFAsmParser for XCOFF format.
+break;
   }
 
   PlatformParser->Initialize(*this);
Index: llvm/lib/MC/MCObjectFileInfo.cpp
===
--- llvm/lib/MC/MCObjectFileInfo.cpp
+++ llvm/lib/MC/MCObjectFileInfo.cpp
@@ -801,6 +801,10 @@
 Env = IsWasm;
 initWasmMCObjectFileInfo(TT);
 break;
+  case Triple::XCOFF:
+Env = IsXCOFF;
+// TODO: Initialize MCObjectFileInfo for XCOFF format when MCSectionXCOFF is ready.
+break;
   case Triple::UnknownObjectFormat:
 report_fatal_error("Cannot initialize MC for unknown object file format.");
 break;
@@ -816,6 +820,7 @@
   case Triple::MachO:
   case Triple::COFF:
   case Triple::Wasm:
+  case Triple::XCOFF:
   case Triple::UnknownObjectFormat:
 report_fatal_error("Cannot get DWARF comdat section for this object file "
"format: not implemented.");
Index: llvm/lib/MC/MCContext.cpp
===
--- llvm/lib/MC/MCContext.cpp
+++ llvm/lib/MC/MCContext.cpp
@@ -161,6 +161,9 @@
   return new (Name, *this) MCSymbolMachO(Name, IsTemporary);
 case MCObjectFileInfo::IsWasm:
   return new (Name, *this) MCSymbolWasm(Name, IsTemporary);
+case MCObjectFileInfo::IsXCOFF:
+  // TODO: Need to implement class MCSymbolXCOFF.
+  break;
 }
   }
   return new (Name, *this) MCSymbol(MCSymbol::SymbolKindUnset, Name,
Index: 

[PATCH] D58930: Add XCOFF triple object format type for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu marked 2 inline comments as done.
jasonliu added inline comments.



Comment at: 
lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp:2079
+  if (log)
+log->Printf("sorry: unimplemented for XCOFF");
+  return false;

hubert.reinterpretcast wrote:
> davide wrote:
> > hubert.reinterpretcast wrote:
> > > JDevlieghere wrote:
> > > > jasonliu wrote:
> > > > > JDevlieghere wrote:
> > > > > > jasonliu wrote:
> > > > > > > apaprocki wrote:
> > > > > > > > No need to be `sorry:` :) This should probably just say `error: 
> > > > > > > > XCOFF is unimplemented` to be more direct in case anything is 
> > > > > > > > expecting "error:" in the output.
> > > > > > > Sure. Will address in next revision.
> > > > > > Just bundle this with the WASM case, the error message is correct 
> > > > > > for both.
> > > > > I think they are different. 
> > > > > The error message for WASM seems to suggest that it will never ever 
> > > > > get supported on WASM. 
> > > > > But it is not the case for XCOFF, we want to indicate that it is not 
> > > > > implemented yet.  
> > > > I don't think the error message suggests that at all, and it's 
> > > > definitely not true. At this point neither XCOFF nor WASM is supported, 
> > > > and that's exactly what the log message says.
> > > > 
> > > I agree that the error message for WASM does not indicate that the lack 
> > > of support is inherent or intended to be permanent; however, it is not 
> > > indicative either of an intent to implement the support. I am not sure 
> > > what the intent is for WASM, but I do know that the intent for XCOFF is 
> > > to eventually implement the support. I do not see how using an ambiguous 
> > > message in this commit (when we know what the intent is) is superior to 
> > > the alternative of having an unambiguous message.
> > I think we should keep this consistent with the other target so my vote is 
> > for grouping XCOFF with WASM. After all, if it's going to be implemented 
> > soon, the message will go away :)
> Well, I don't know about "soon"...
> Using the WASM message for XCOFF is not actually wrong; so, I can be okay 
> with it.
Okay. Shared message it is. 



Comment at: llvm/lib/MC/MCContext.cpp:165
+case MCObjectFileInfo::IsXCOFF:
+  // TODO: Need to implement class MCSymbolXCOFF.
+  break;

sfertile wrote:
> jasonliu wrote:
> > JDevlieghere wrote:
> > > See previous comment.
> > It is certain that we will need MCSymbolXCOFF. But before we run into cases 
> > where we actually need a MCSymbolXCOFF, we could use the generic MCSymbol 
> > first for XCOFF platform. So I don't want to put a llvm_unreachable here. 
> Would it make sense to add an llvm_unreachable now, and the first patch that 
> actually uses an MCSymbol stubs out the class and removes the unreachable?
The first patch that uses MCSymbol do not necessarily need to stub out 
MCSymbolXCOFF, as MCSymbol seems to be generic and usable until we are doing 
some XCOFF specific things that needs to be represented by MCSymbolXCOFF. If 
the intention is MCSymbol should never get used, and different object file 
should have their own MCSymbolXXX class from the start, then I could add in the 
llvm_unreachable here, and I would also propose to replace the "return new 
(Name, *this) MCSymbol(MCSymbol::SymbolKindUnset, Name, IsTemporary);" with an 
llvm_unreachable as well. 



Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
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[PATCH] D58930: Add XCOFF triple object format type for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu marked 3 inline comments as done.
jasonliu added inline comments.



Comment at: clang/lib/CodeGen/BackendUtil.cpp:1470
+  case Triple::XCOFF:
+// TODO: Falling through for XCOFF format for now.
+break;

JDevlieghere wrote:
> This is confusing, you say fall through but you break? I would prefer a 
> `llvm_unreachable("XCOFF not yet implemented");` here and elsewhere in this 
> patch. 
> 
Thanks for the comment. Will address in next revision. 



Comment at: clang/lib/CodeGen/BackendUtil.cpp:1486
+  case Triple::XCOFF:
+// TODO: Falling through for XCOFF format for now.
+break;

JDevlieghere wrote:
> See previous comment.
Will address in next revision.



Comment at: clang/lib/CodeGen/CodeGenModule.cpp:4410
+  case llvm::Triple::XCOFF:
+llvm_unreachable("to be determined for XCOFF format");
   case llvm::Triple::COFF:

JDevlieghere wrote:
> See previous comment.
Will address in next revision.


Repository:
  rG LLVM Github Monorepo

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[PATCH] D58930: Add XCOFF triple object format type for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu updated this revision to Diff 189387.
jasonliu added a comment.

Address some review comments


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D58930/new/

https://reviews.llvm.org/D58930

Files:
  clang/lib/CodeGen/BackendUtil.cpp
  clang/lib/CodeGen/CodeGenModule.cpp
  lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
  llvm/include/llvm/ADT/Triple.h
  llvm/include/llvm/MC/MCObjectFileInfo.h
  llvm/lib/MC/MCContext.cpp
  llvm/lib/MC/MCObjectFileInfo.cpp
  llvm/lib/MC/MCParser/AsmParser.cpp
  llvm/lib/Support/Triple.cpp
  llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
  llvm/unittests/ADT/TripleTest.cpp

Index: llvm/unittests/ADT/TripleTest.cpp
===
--- llvm/unittests/ADT/TripleTest.cpp
+++ llvm/unittests/ADT/TripleTest.cpp
@@ -1258,6 +1258,11 @@
   EXPECT_EQ(Triple::Wasm,
 Triple("wasm64-unknown-wasi-musl-wasm").getObjectFormat());
 
+  EXPECT_EQ(Triple::XCOFF, Triple("powerpc-ibm-aix").getObjectFormat());
+  EXPECT_EQ(Triple::XCOFF, Triple("powerpc64-ibm-aix").getObjectFormat());
+  EXPECT_EQ(Triple::XCOFF, Triple("powerpc---xcoff").getObjectFormat());
+  EXPECT_EQ(Triple::XCOFF, Triple("powerpc64---xcoff").getObjectFormat());
+
   Triple MSVCNormalized(Triple::normalize("i686-pc-windows-msvc-elf"));
   EXPECT_EQ(Triple::ELF, MSVCNormalized.getObjectFormat());
 
@@ -1276,6 +1281,9 @@
 
   T.setObjectFormat(Triple::MachO);
   EXPECT_EQ(Triple::MachO, T.getObjectFormat());
+  
+  T.setObjectFormat(Triple::XCOFF);
+  EXPECT_EQ(Triple::XCOFF, T.getObjectFormat());
 }
 
 TEST(TripleTest, NormalizeWindows) {
Index: llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
===
--- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -5594,6 +5594,9 @@
   case MCObjectFileInfo::IsWasm:
 CurrentFormat = WASM;
 break;
+  case MCObjectFileInfo::IsXCOFF:
+llvm_unreachable("unexpected object format");
+break;
   }
 
   if (~Prefix->SupportedFormats & CurrentFormat) {
Index: llvm/lib/Support/Triple.cpp
===
--- llvm/lib/Support/Triple.cpp
+++ llvm/lib/Support/Triple.cpp
@@ -534,6 +534,9 @@
 
 static Triple::ObjectFormatType parseFormat(StringRef EnvironmentName) {
   return StringSwitch(EnvironmentName)
+// "xcoff" must come before "coff" because of the order-dependendent
+// pattern matching.
+.EndsWith("xcoff", Triple::XCOFF)
 .EndsWith("coff", Triple::COFF)
 .EndsWith("elf", Triple::ELF)
 .EndsWith("macho", Triple::MachO)
@@ -622,6 +625,7 @@
   case Triple::ELF: return "elf";
   case Triple::MachO: return "macho";
   case Triple::Wasm: return "wasm";
+  case Triple::XCOFF: return "xcoff";
   }
   llvm_unreachable("unknown object format type");
 }
@@ -686,6 +690,8 @@
   case Triple::ppc64:
 if (T.isOSDarwin())
   return Triple::MachO;
+else if (T.isOSAIX())
+  return Triple::XCOFF;
 return Triple::ELF;
 
   case Triple::wasm32:
Index: llvm/lib/MC/MCParser/AsmParser.cpp
===
--- llvm/lib/MC/MCParser/AsmParser.cpp
+++ llvm/lib/MC/MCParser/AsmParser.cpp
@@ -710,6 +710,9 @@
   case MCObjectFileInfo::IsWasm:
 PlatformParser.reset(createWasmAsmParser());
 break;
+  case MCObjectFileInfo::IsXCOFF:
+// TODO: Need to implement createXCOFFAsmParser for XCOFF format.
+break;
   }
 
   PlatformParser->Initialize(*this);
Index: llvm/lib/MC/MCObjectFileInfo.cpp
===
--- llvm/lib/MC/MCObjectFileInfo.cpp
+++ llvm/lib/MC/MCObjectFileInfo.cpp
@@ -801,6 +801,10 @@
 Env = IsWasm;
 initWasmMCObjectFileInfo(TT);
 break;
+  case Triple::XCOFF:
+Env = IsXCOFF;
+// TODO: Initialize MCObjectFileInfo for XCOFF format when MCSectionXCOFF is ready.
+break;
   case Triple::UnknownObjectFormat:
 report_fatal_error("Cannot initialize MC for unknown object file format.");
 break;
@@ -816,6 +820,7 @@
   case Triple::MachO:
   case Triple::COFF:
   case Triple::Wasm:
+  case Triple::XCOFF:
   case Triple::UnknownObjectFormat:
 report_fatal_error("Cannot get DWARF comdat section for this object file "
"format: not implemented.");
Index: llvm/lib/MC/MCContext.cpp
===
--- llvm/lib/MC/MCContext.cpp
+++ llvm/lib/MC/MCContext.cpp
@@ -161,6 +161,9 @@
   return new (Name, *this) MCSymbolMachO(Name, IsTemporary);
 case MCObjectFileInfo::IsWasm:
   return new (Name, *this) MCSymbolWasm(Name, IsTemporary);
+case MCObjectFileInfo::IsXCOFF:
+  // TODO: Need to implement class MCSymbolXCOFF.
+  break;
 }
   }
   return new (Name, *this) MCSymbol(MCSymbol::SymbolKindUnset, Name,
Index: 

[PATCH] D58930: Add XCOFF triple object format type for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu marked 2 inline comments as done.
jasonliu added inline comments.



Comment at: 
lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp:2079
+  if (log)
+log->Printf("sorry: unimplemented for XCOFF");
+  return false;

apaprocki wrote:
> No need to be `sorry:` :) This should probably just say `error: XCOFF is 
> unimplemented` to be more direct in case anything is expecting "error:" in 
> the output.
Sure. Will address in next revision.



Comment at: llvm/lib/Support/Triple.cpp:537
   return StringSwitch(EnvironmentName)
+// FIXME: We have to put XCOFF before COFF;
+// perhaps an order-independent pattern matching is desired?

apaprocki wrote:
> hubert.reinterpretcast wrote:
> > If the conclusion is that checking XCOFF before COFF is fine, then we 
> > should remove the FIXME and just leave a normal comment.
> Agreed, existing code seems fine as long as there is a comment explaining 
> that `xcoff` must come before `coff` in case it isn't obvious at a quick 
> glance.
Sounds good. I will remove FIXME and leave a normal comment to indicate the 
order dependency. 


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[PATCH] D58930: Add XCOFF triple object format type for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu marked an inline comment as done.
jasonliu added inline comments.



Comment at: 
lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp:2079
+  if (log)
+log->Printf("sorry: unimplemented for XCOFF");
+  return false;

JDevlieghere wrote:
> jasonliu wrote:
> > apaprocki wrote:
> > > No need to be `sorry:` :) This should probably just say `error: XCOFF is 
> > > unimplemented` to be more direct in case anything is expecting "error:" 
> > > in the output.
> > Sure. Will address in next revision.
> Just bundle this with the WASM case, the error message is correct for both.
I think they are different. 
The error message for WASM seems to suggest that it will never ever get 
supported on WASM. 
But it is not the case for XCOFF, we want to indicate that it is not 
implemented yet.  


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[PATCH] D58930: Add XCOFF triple object format type for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu marked an inline comment as done.
jasonliu added inline comments.



Comment at: llvm/lib/MC/MCContext.cpp:165
+case MCObjectFileInfo::IsXCOFF:
+  // TODO: Need to implement class MCSymbolXCOFF.
+  break;

JDevlieghere wrote:
> See previous comment.
It is certain that we will need MCSymbolXCOFF. But before we run into cases 
where we actually need a MCSymbolXCOFF, we could use the generic MCSymbol first 
for XCOFF platform. So I don't want to put a llvm_unreachable here. 


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[PATCH] D59048: Add AIX Target Info

[Jason Liu via Phabricator via cfe-commits]

jasonliu added a comment.

I'm seeing some build bot failures because of the newly added test case: 
max_align.c.
So I reverted the previous committed change. 
Please fix the test case and let me know so that I can help you commit again.


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[PATCH] D59048: Add AIX Target Info

[Jason Liu via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rC356060: Add AIX Target Info (authored by jasonliu, committed 
by ).

Changed prior to commit:
  https://reviews.llvm.org/D59048?vs=190133=190425#toc

Repository:
  rC Clang

CHANGES SINCE LAST ACTION
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Files:
  lib/Basic/Targets.cpp
  lib/Basic/Targets/OSTargets.h
  lib/Basic/Targets/PPC.cpp
  lib/Basic/Targets/PPC.h
  test/Driver/types.c
  test/Headers/max_align.c
  test/Preprocessor/init.c
  test/Sema/varargs-aix.c

Index: test/Preprocessor/init.c
===
--- test/Preprocessor/init.c
+++ test/Preprocessor/init.c
@@ -6409,6 +6409,209 @@
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc64-none-none -target-feature +float128 -target-cpu power9 -fno-signed-char < /dev/null | FileCheck -check-prefix PPC-FLOAT128 %s
 // PPC-FLOAT128:#define __FLOAT128__ 1
 //
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc64-ibm-aix7.1.0.0 -fno-signed-char < /dev/null | FileCheck -match-full-lines -check-prefix PPC64-AIX %s
+//
+// PPC64-AIX:#define _AIX 1
+// PPC64-AIX:#define _ARCH_PPC 1
+// PPC64-AIX:#define _ARCH_PPC64 1
+// PPC64-AIX:#define _BIG_ENDIAN 1
+// PPC64-AIX:#define _IBMR2 1
+// PPC64-AIX-NOT:#define _ILP32 1
+// PPC64-AIX:#define _LONG_LONG 1
+// PPC64-AIX:#define _LP64 1
+// PPC64-AIX:#define _POWER 1
+// PPC64-AIX:#define __64BIT__ 1
+// PPC64-AIX:#define __BIGGEST_ALIGNMENT__ 8
+// PPC64-AIX:#define __BIG_ENDIAN__ 1
+// PPC64-AIX:#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__
+// PPC64-AIX:#define __CHAR16_TYPE__ unsigned short
+// PPC64-AIX:#define __CHAR32_TYPE__ unsigned int
+// PPC64-AIX:#define __CHAR_BIT__ 8
+// PPC64-AIX:#define __CHAR_UNSIGNED__ 1
+// PPC64-AIX:#define __DBL_DENORM_MIN__ 4.9406564584124654e-324
+// PPC64-AIX:#define __DBL_DIG__ 15
+// PPC64-AIX:#define __DBL_EPSILON__ 2.2204460492503131e-16
+// PPC64-AIX:#define __DBL_HAS_DENORM__ 1
+// PPC64-AIX:#define __DBL_HAS_INFINITY__ 1
+// PPC64-AIX:#define __DBL_HAS_QUIET_NAN__ 1
+// PPC64-AIX:#define __DBL_MANT_DIG__ 53
+// PPC64-AIX:#define __DBL_MAX_10_EXP__ 308
+// PPC64-AIX:#define __DBL_MAX_EXP__ 1024
+// PPC64-AIX:#define __DBL_MAX__ 1.7976931348623157e+308
+// PPC64-AIX:#define __DBL_MIN_10_EXP__ (-307)
+// PPC64-AIX:#define __DBL_MIN_EXP__ (-1021)
+// PPC64-AIX:#define __DBL_MIN__ 2.2250738585072014e-308
+// PPC64-AIX:#define __DECIMAL_DIG__ __LDBL_DECIMAL_DIG__
+// PPC64-AIX:#define __FLT_DENORM_MIN__ 1.40129846e-45F
+// PPC64-AIX:#define __FLT_DIG__ 6
+// PPC64-AIX:#define __FLT_EPSILON__ 1.19209290e-7F
+// PPC64-AIX:#define __FLT_EVAL_METHOD__ 1
+// PPC64-AIX:#define __FLT_HAS_DENORM__ 1
+// PPC64-AIX:#define __FLT_HAS_INFINITY__ 1
+// PPC64-AIX:#define __FLT_HAS_QUIET_NAN__ 1
+// PPC64-AIX:#define __FLT_MANT_DIG__ 24
+// PPC64-AIX:#define __FLT_MAX_10_EXP__ 38
+// PPC64-AIX:#define __FLT_MAX_EXP__ 128
+// PPC64-AIX:#define __FLT_MAX__ 3.40282347e+38F
+// PPC64-AIX:#define __FLT_MIN_10_EXP__ (-37)
+// PPC64-AIX:#define __FLT_MIN_EXP__ (-125)
+// PPC64-AIX:#define __FLT_MIN__ 1.17549435e-38F
+// PPC64-AIX:#define __FLT_RADIX__ 2
+// PPC64-AIX-NOT:#define __ILP32__ 1
+// PPC64-AIX:#define __INT16_C_SUFFIX__
+// PPC64-AIX:#define __INT16_FMTd__ "hd"
+// PPC64-AIX:#define __INT16_FMTi__ "hi"
+// PPC64-AIX:#define __INT16_MAX__ 32767
+// PPC64-AIX:#define __INT16_TYPE__ short
+// PPC64-AIX:#define __INT32_C_SUFFIX__
+// PPC64-AIX:#define __INT32_FMTd__ "d"
+// PPC64-AIX:#define __INT32_FMTi__ "i"
+// PPC64-AIX:#define __INT32_MAX__ 2147483647
+// PPC64-AIX:#define __INT32_TYPE__ int
+// PPC64-AIX:#define __INT64_C_SUFFIX__ L
+// PPC64-AIX:#define __INT64_FMTd__ "ld"
+// PPC64-AIX:#define __INT64_FMTi__ "li"
+// PPC64-AIX:#define __INT64_MAX__ 9223372036854775807L
+// PPC64-AIX:#define __INT64_TYPE__ long int
+// PPC64-AIX:#define __INT8_C_SUFFIX__
+// PPC64-AIX:#define __INT8_FMTd__ "hhd"
+// PPC64-AIX:#define __INT8_FMTi__ "hhi"
+// PPC64-AIX:#define __INT8_MAX__ 127
+// PPC64-AIX:#define __INT8_TYPE__ signed char
+// PPC64-AIX:#define __INTMAX_C_SUFFIX__ L
+// PPC64-AIX:#define __INTMAX_FMTd__ "ld"
+// PPC64-AIX:#define __INTMAX_FMTi__ "li"
+// PPC64-AIX:#define __INTMAX_MAX__ 9223372036854775807L
+// PPC64-AIX:#define __INTMAX_TYPE__ long int
+// PPC64-AIX:#define __INTMAX_WIDTH__ 64
+// PPC64-AIX:#define __INTPTR_FMTd__ "ld"
+// PPC64-AIX:#define __INTPTR_FMTi__ "li"
+// PPC64-AIX:#define __INTPTR_MAX__ 9223372036854775807L
+// PPC64-AIX:#define __INTPTR_TYPE__ long int
+// PPC64-AIX:#define __INTPTR_WIDTH__ 64
+// PPC64-AIX:#define __INT_FAST16_FMTd__ "hd"
+// PPC64-AIX:#define __INT_FAST16_FMTi__ "hi"
+// PPC64-AIX:#define __INT_FAST16_MAX__ 32767
+// PPC64-AIX:#define __INT_FAST16_TYPE__ short
+// PPC64-AIX:#define __INT_FAST32_FMTd__ "d"
+// PPC64-AIX:#define __INT_FAST32_FMTi__ "i"
+// PPC64-AIX:#define __INT_FAST32_MAX__ 2147483647
+// PPC64-AIX:#define __INT_FAST32_TYPE__ int
+// 

[PATCH] D58930: Add XCOFF triple object format type for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu updated this revision to Diff 189713.
jasonliu added a comment.

Share the same "unsupported error" message with WASM.


Repository:
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Files:
  clang/lib/CodeGen/BackendUtil.cpp
  clang/lib/CodeGen/CodeGenModule.cpp
  lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
  llvm/include/llvm/ADT/Triple.h
  llvm/include/llvm/MC/MCObjectFileInfo.h
  llvm/lib/MC/MCContext.cpp
  llvm/lib/MC/MCObjectFileInfo.cpp
  llvm/lib/MC/MCParser/AsmParser.cpp
  llvm/lib/Support/Triple.cpp
  llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
  llvm/unittests/ADT/TripleTest.cpp

Index: llvm/unittests/ADT/TripleTest.cpp
===
--- llvm/unittests/ADT/TripleTest.cpp
+++ llvm/unittests/ADT/TripleTest.cpp
@@ -1258,6 +1258,11 @@
   EXPECT_EQ(Triple::Wasm,
 Triple("wasm64-unknown-wasi-musl-wasm").getObjectFormat());
 
+  EXPECT_EQ(Triple::XCOFF, Triple("powerpc-ibm-aix").getObjectFormat());
+  EXPECT_EQ(Triple::XCOFF, Triple("powerpc64-ibm-aix").getObjectFormat());
+  EXPECT_EQ(Triple::XCOFF, Triple("powerpc---xcoff").getObjectFormat());
+  EXPECT_EQ(Triple::XCOFF, Triple("powerpc64---xcoff").getObjectFormat());
+
   Triple MSVCNormalized(Triple::normalize("i686-pc-windows-msvc-elf"));
   EXPECT_EQ(Triple::ELF, MSVCNormalized.getObjectFormat());
 
@@ -1276,6 +1281,9 @@
 
   T.setObjectFormat(Triple::MachO);
   EXPECT_EQ(Triple::MachO, T.getObjectFormat());
+  
+  T.setObjectFormat(Triple::XCOFF);
+  EXPECT_EQ(Triple::XCOFF, T.getObjectFormat());
 }
 
 TEST(TripleTest, NormalizeWindows) {
Index: llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
===
--- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -5594,6 +5594,9 @@
   case MCObjectFileInfo::IsWasm:
 CurrentFormat = WASM;
 break;
+  case MCObjectFileInfo::IsXCOFF:
+llvm_unreachable("unexpected object format");
+break;
   }
 
   if (~Prefix->SupportedFormats & CurrentFormat) {
Index: llvm/lib/Support/Triple.cpp
===
--- llvm/lib/Support/Triple.cpp
+++ llvm/lib/Support/Triple.cpp
@@ -534,6 +534,9 @@
 
 static Triple::ObjectFormatType parseFormat(StringRef EnvironmentName) {
   return StringSwitch(EnvironmentName)
+// "xcoff" must come before "coff" because of the order-dependendent
+// pattern matching.
+.EndsWith("xcoff", Triple::XCOFF)
 .EndsWith("coff", Triple::COFF)
 .EndsWith("elf", Triple::ELF)
 .EndsWith("macho", Triple::MachO)
@@ -622,6 +625,7 @@
   case Triple::ELF: return "elf";
   case Triple::MachO: return "macho";
   case Triple::Wasm: return "wasm";
+  case Triple::XCOFF: return "xcoff";
   }
   llvm_unreachable("unknown object format type");
 }
@@ -686,6 +690,8 @@
   case Triple::ppc64:
 if (T.isOSDarwin())
   return Triple::MachO;
+else if (T.isOSAIX())
+  return Triple::XCOFF;
 return Triple::ELF;
 
   case Triple::wasm32:
Index: llvm/lib/MC/MCParser/AsmParser.cpp
===
--- llvm/lib/MC/MCParser/AsmParser.cpp
+++ llvm/lib/MC/MCParser/AsmParser.cpp
@@ -710,6 +710,9 @@
   case MCObjectFileInfo::IsWasm:
 PlatformParser.reset(createWasmAsmParser());
 break;
+  case MCObjectFileInfo::IsXCOFF:
+// TODO: Need to implement createXCOFFAsmParser for XCOFF format.
+break;
   }
 
   PlatformParser->Initialize(*this);
Index: llvm/lib/MC/MCObjectFileInfo.cpp
===
--- llvm/lib/MC/MCObjectFileInfo.cpp
+++ llvm/lib/MC/MCObjectFileInfo.cpp
@@ -801,6 +801,10 @@
 Env = IsWasm;
 initWasmMCObjectFileInfo(TT);
 break;
+  case Triple::XCOFF:
+Env = IsXCOFF;
+// TODO: Initialize MCObjectFileInfo for XCOFF format when MCSectionXCOFF is ready.
+break;
   case Triple::UnknownObjectFormat:
 report_fatal_error("Cannot initialize MC for unknown object file format.");
 break;
@@ -816,6 +820,7 @@
   case Triple::MachO:
   case Triple::COFF:
   case Triple::Wasm:
+  case Triple::XCOFF:
   case Triple::UnknownObjectFormat:
 report_fatal_error("Cannot get DWARF comdat section for this object file "
"format: not implemented.");
Index: llvm/lib/MC/MCContext.cpp
===
--- llvm/lib/MC/MCContext.cpp
+++ llvm/lib/MC/MCContext.cpp
@@ -161,6 +161,9 @@
   return new (Name, *this) MCSymbolMachO(Name, IsTemporary);
 case MCObjectFileInfo::IsWasm:
   return new (Name, *this) MCSymbolWasm(Name, IsTemporary);
+case MCObjectFileInfo::IsXCOFF:
+  // TODO: Need to implement class MCSymbolXCOFF.
+  break;
 }
   }
   return new (Name, *this) MCSymbol(MCSymbol::SymbolKindUnset, Name,

[PATCH] D58930: Add XCOFF triple object format type for AIX

[Jason Liu via Phabricator via cfe-commits]

This revision was not accepted when it landed; it landed in state "Needs 
Review".
This revision was automatically updated to reflect the committed changes.
Closed by commit rL355989: Add XCOFF triple object format type for AIX 
(authored by jasonliu, committed by ).
Herald added a subscriber: kristina.

Changed prior to commit:
  https://reviews.llvm.org/D58930?vs=189713=190346#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D58930/new/

https://reviews.llvm.org/D58930

Files:
  cfe/trunk/lib/CodeGen/BackendUtil.cpp
  cfe/trunk/lib/CodeGen/CodeGenModule.cpp
  lldb/trunk/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
  llvm/trunk/include/llvm/ADT/Triple.h
  llvm/trunk/include/llvm/MC/MCObjectFileInfo.h
  llvm/trunk/lib/MC/MCContext.cpp
  llvm/trunk/lib/MC/MCObjectFileInfo.cpp
  llvm/trunk/lib/MC/MCParser/AsmParser.cpp
  llvm/trunk/lib/Support/Triple.cpp
  llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
  llvm/trunk/unittests/ADT/TripleTest.cpp

Index: llvm/trunk/include/llvm/ADT/Triple.h
===
--- llvm/trunk/include/llvm/ADT/Triple.h
+++ llvm/trunk/include/llvm/ADT/Triple.h
@@ -219,6 +219,7 @@
 ELF,
 MachO,
 Wasm,
+XCOFF,
   };
 
 private:
@@ -598,6 +599,11 @@
!isAndroid();
   }
 
+  /// Tests whether the OS is AIX.
+  bool isOSAIX() const {
+return getOS() == Triple::AIX;
+  }
+
   /// Tests whether the OS uses the ELF binary format.
   bool isOSBinFormatELF() const {
 return getObjectFormat() == Triple::ELF;
@@ -618,6 +624,11 @@
 return getObjectFormat() == Triple::Wasm;
   }
 
+  /// Tests whether the OS uses the XCOFF binary format.
+  bool isOSBinFormatXCOFF() const {
+return getObjectFormat() == Triple::XCOFF;
+  }
+
   /// Tests whether the target is the PS4 CPU
   bool isPS4CPU() const {
 return getArch() == Triple::x86_64 &&
Index: llvm/trunk/include/llvm/MC/MCObjectFileInfo.h
===
--- llvm/trunk/include/llvm/MC/MCObjectFileInfo.h
+++ llvm/trunk/include/llvm/MC/MCObjectFileInfo.h
@@ -380,7 +380,7 @@
 return EHFrameSection;
   }
 
-  enum Environment { IsMachO, IsELF, IsCOFF, IsWasm };
+  enum Environment { IsMachO, IsELF, IsCOFF, IsWasm, IsXCOFF };
   Environment getObjectFileType() const { return Env; }
 
   bool isPositionIndependent() const { return PositionIndependent; }
Index: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
===
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -5594,6 +5594,9 @@
   case MCObjectFileInfo::IsWasm:
 CurrentFormat = WASM;
 break;
+  case MCObjectFileInfo::IsXCOFF:
+llvm_unreachable("unexpected object format");
+break;
   }
 
   if (~Prefix->SupportedFormats & CurrentFormat) {
Index: llvm/trunk/lib/Support/Triple.cpp
===
--- llvm/trunk/lib/Support/Triple.cpp
+++ llvm/trunk/lib/Support/Triple.cpp
@@ -534,6 +534,9 @@
 
 static Triple::ObjectFormatType parseFormat(StringRef EnvironmentName) {
   return StringSwitch(EnvironmentName)
+// "xcoff" must come before "coff" because of the order-dependendent
+// pattern matching.
+.EndsWith("xcoff", Triple::XCOFF)
 .EndsWith("coff", Triple::COFF)
 .EndsWith("elf", Triple::ELF)
 .EndsWith("macho", Triple::MachO)
@@ -622,6 +625,7 @@
   case Triple::ELF: return "elf";
   case Triple::MachO: return "macho";
   case Triple::Wasm: return "wasm";
+  case Triple::XCOFF: return "xcoff";
   }
   llvm_unreachable("unknown object format type");
 }
@@ -686,6 +690,8 @@
   case Triple::ppc64:
 if (T.isOSDarwin())
   return Triple::MachO;
+else if (T.isOSAIX())
+  return Triple::XCOFF;
 return Triple::ELF;
 
   case Triple::wasm32:
Index: llvm/trunk/lib/MC/MCParser/AsmParser.cpp
===
--- llvm/trunk/lib/MC/MCParser/AsmParser.cpp
+++ llvm/trunk/lib/MC/MCParser/AsmParser.cpp
@@ -710,6 +710,9 @@
   case MCObjectFileInfo::IsWasm:
 PlatformParser.reset(createWasmAsmParser());
 break;
+  case MCObjectFileInfo::IsXCOFF:
+// TODO: Need to implement createXCOFFAsmParser for XCOFF format.
+break;
   }
 
   PlatformParser->Initialize(*this);
Index: llvm/trunk/lib/MC/MCContext.cpp
===
--- llvm/trunk/lib/MC/MCContext.cpp
+++ llvm/trunk/lib/MC/MCContext.cpp
@@ -161,6 +161,9 @@
   return new (Name, *this) MCSymbolMachO(Name, IsTemporary);
 case MCObjectFileInfo::IsWasm:
   return new (Name, *this) MCSymbolWasm(Name, IsTemporary);
+case MCObjectFileInfo::IsXCOFF:
+  // TODO: Need to implement class MCSymbolXCOFF.
+  break;
 }
   }
   return new (Name, *this) MCSymbol(MCSymbol::SymbolKindUnset, Name,

[PATCH] D68340: Add AIX toolchain and basic linker functionality

[Jason Liu via Phabricator via cfe-commits]

jasonliu accepted this revision.
jasonliu added a comment.
This revision is now accepted and ready to land.

Aside from the nit comment that can be addressed when checkin. 
LGTM.




Comment at: clang/lib/Driver/ToolChains/AIX.cpp:59
+
+  auto getCrt0Basename = [, ] {
+// Enable gprofiling when "-pg" is specified.

nit: There is no need to capture IsArch32Bit by reference. 


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[PATCH] D68340: Add AIX toolchain and basic linker functionality

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jasonliu added inline comments.



Comment at: clang/lib/Driver/CMakeLists.txt:33
   ToolChains/Arch/X86.cpp
+  ToolChains/AIX.cpp
   ToolChains/Ananas.cpp

Looks like this list is following alphabetical order here, which means we 
should probably put "ToolChains/AIX.cpp" right after "ToolChain.cpp".


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[PATCH] D68340: Add AIX toolchain and basic linker functionality

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/lib/Driver/ToolChains/AIX.h:19
+
+/// aix -- Directly call system default and linker.
+// TODO: Enable direct call to system default assembler.

remove "and".



Comment at: clang/lib/Driver/ToolChains/AIX.h:36
+
+} // end namespace aix.
+

Sorry, I don't think we need '.' for any of the "end namespace ..." comment. 



Comment at: clang/lib/Driver/ToolChains/AIX.h:63
+
+#endif // LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_AIX_H.

We don't need '.' here as well. 


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[PATCH] D70675: [AIX] Disable clang python binding tests

[Jason Liu via Phabricator via cfe-commits]

jasonliu accepted this revision.
jasonliu added a comment.
This revision is now accepted and ready to land.

LGTM.


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[PATCH] D68340: Add AIX toolchain and basic linker functionality

[Jason Liu via Phabricator via cfe-commits]

jasonliu added a comment.

Any reason we are testing library search path using libgcc.a? We could use any 
dummy path there, and upload a dummy archive library for the testing purpose.




Comment at: clang/lib/Driver/ToolChains/AIX.cpp:112
+
+AIX::~AIX() {}
+

We are not doing anything with the destructor. Do we need to declare and define 
it?



Comment at: clang/lib/Driver/ToolChains/AIX.h:1
+//===--- AIX.h - AIX ToolChain Implementations --*- C++ -*-===//
+//

The length of this line should match with line 7. 


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[PATCH] D68340: Add AIX toolchain and basic linker functionality

[Jason Liu via Phabricator via cfe-commits]

jasonliu added a comment.

nit: We might want to add period consistently for all the comments in the patch.


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[PATCH] D68340: Add AIX toolchain and basic linker functionality

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/lib/Driver/ToolChains/AIX.cpp:35
+  // Only support 32 and 64 bit
+  if (!IsArch32Bit && !IsArch64Bit)
+llvm_unreachable("Unsupported bit width value");

Xiangling_L wrote:
> Is there any reason to use llvm_unreachable here? I think we should use  
> 'assertion' instead here:
> 
> ```
> assert((IsArch32Bit || IsArch64Bit) && "...");
> ```
IsArch64Bit used only in the assertion could cause warning when the assertion 
is turned off. 


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[PATCH] D72644: [clang] Add -fignore-exceptions

[Jason Liu via Phabricator via cfe-commits]

jasonliu added a comment.

In D72644#1871662 , @lebedev.ri wrote:

> This review omitted cfe-commits list


Didn't realized that. Since this is approved and committed, I guess I will keep 
monitor messages in this review, and address any post-commit comments. I could 
revert the commit if the comments gets controversial. 
Thanks.


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[PATCH] D72644: [clang] Add -fignore-exceptions

[Jason Liu via Phabricator via cfe-commits]

jasonliu added a comment.

In D72644#1868812 , @aaron.ballman 
wrote:

> Sorry about the delayed review. I think this patch basically LG, thank you!


Thanks Aaron. Addressed your comments in the commits.


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[PATCH] D72644: [clang] Add -fignore-exceptions

[Jason Liu via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG55e2678fcd4d: [clang] Add -fignore-exceptions (authored by 
jasonliu).
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

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Files:
  clang/include/clang/Basic/LangOptions.def
  clang/include/clang/Driver/Options.td
  clang/lib/CodeGen/CGException.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/test/CodeGen/ignore-exceptions.cpp

Index: clang/test/CodeGen/ignore-exceptions.cpp
===
--- /dev/null
+++ clang/test/CodeGen/ignore-exceptions.cpp
@@ -0,0 +1,25 @@
+// RUN: %clang_cc1 %s -triple powerpc64-linux -fexceptions -fcxx-exceptions -fignore-exceptions -emit-llvm -o - | FileCheck %s
+
+struct A {
+  ~A(){}
+};
+
+void f(void) {
+// CHECK-NOT: personality i8* bitcast (i32 (...)* @__gcc_personality_v0 to i8*)
+  A a;
+  try {
+throw 1;
+  } catch(...) {
+  }
+// CHECK:  %a = alloca %struct.A, align 1
+// CHECK:  %exception = call i8* @__cxa_allocate_exception(i64 4) #1
+// CHECK:  %0 = bitcast i8* %exception to i32*
+// CHECK:  store i32 1, i32* %0, align 16
+// CHECK:  call void @__cxa_throw(i8* %exception, i8* bitcast (i8** @_ZTIi to i8*), i8* null) #2
+// CHECK:  unreachable
+
+// CHECK-NOT: invoke
+// CHECK-NOT: landingpad
+// CHECK-NOT: __cxa_begin_catch
+// CHECK-NOT: __cxa_end_catch
+}
Index: clang/lib/Frontend/CompilerInvocation.cpp
===
--- clang/lib/Frontend/CompilerInvocation.cpp
+++ clang/lib/Frontend/CompilerInvocation.cpp
@@ -2773,6 +2773,7 @@
   if (Args.hasArg(OPT_fno_threadsafe_statics))
 Opts.ThreadsafeStatics = 0;
   Opts.Exceptions = Args.hasArg(OPT_fexceptions);
+  Opts.IgnoreExceptions = Args.hasArg(OPT_fignore_exceptions);
   Opts.ObjCExceptions = Args.hasArg(OPT_fobjc_exceptions);
   Opts.CXXExceptions = Args.hasArg(OPT_fcxx_exceptions);
 
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -463,6 +463,11 @@
 }
   }
 
+  // OPT_fignore_exceptions means exception could still be thrown,
+  // but no clean up or catch would happen in current module.
+  // So we do not set EH to false.
+  Args.AddLastArg(CmdArgs, options::OPT_fignore_exceptions);
+
   if (EH)
 CmdArgs.push_back("-fexceptions");
 }
Index: clang/lib/CodeGen/CGException.cpp
===
--- clang/lib/CodeGen/CGException.cpp
+++ clang/lib/CodeGen/CGException.cpp
@@ -703,12 +703,12 @@
   assert(EHStack.requiresLandingPad());
   assert(!EHStack.empty());
 
-  // If exceptions are disabled and SEH is not in use, then there is no invoke
-  // destination. SEH "works" even if exceptions are off. In practice, this
-  // means that C++ destructors and other EH cleanups don't run, which is
+  // If exceptions are disabled/ignored and SEH is not in use, then there is no
+  // invoke destination. SEH "works" even if exceptions are off. In practice,
+  // this means that C++ destructors and other EH cleanups don't run, which is
   // consistent with MSVC's behavior.
   const LangOptions  = CGM.getLangOpts();
-  if (!LO.Exceptions) {
+  if (!LO.Exceptions || LO.IgnoreExceptions) {
 if (!LO.Borland && !LO.MicrosoftExt)
   return nullptr;
 if (!currentFunctionUsesSEHTry())
@@ -751,7 +751,9 @@
 
 llvm::BasicBlock *CodeGenFunction::EmitLandingPad() {
   assert(EHStack.requiresLandingPad());
-
+  assert(!CGM.getLangOpts().IgnoreExceptions &&
+ "LandingPad should not be emitted when -fignore-exceptions are in "
+ "effect.");
   EHScope  = *EHStack.find(EHStack.getInnermostEHScope());
   switch (innermostEHScope.getKind()) {
   case EHScope::Terminate:
Index: clang/include/clang/Driver/Options.td
===
--- clang/include/clang/Driver/Options.td
+++ clang/include/clang/Driver/Options.td
@@ -932,6 +932,8 @@
   Flags<[CC1Option]>, HelpText<"Use SEH style exceptions">;
 def fwasm_exceptions : Flag<["-"], "fwasm-exceptions">, Group,
   Flags<[CC1Option]>, HelpText<"Use WebAssembly style exceptions">;
+def fignore_exceptions : Flag<["-"], "fignore-exceptions">, Group, Flags<[CC1Option]>,
+  HelpText<"Enable support for ignoring exception handling constructs">;
 def fexcess_precision_EQ : Joined<["-"], "fexcess-precision=">,
 Group;
 def : Flag<["-"], "fexpensive-optimizations">, Group;
Index: clang/include/clang/Basic/LangOptions.def
===
--- clang/include/clang/Basic/LangOptions.def
+++ 

[PATCH] D74015: [AIX][Frontend] C++ ABI customizations for AIX boilerplate

[Jason Liu via Phabricator via cfe-commits]

jasonliu added a comment.

Just kindly reminder that you might want to update the Summary in the commit 
message to reflect the new name we picked.


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[PATCH] D76130: [PPC][AIX] Implement variadic function handling in LowerFormalArguments_AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu added a comment.

This is landed in 
https://github.com/llvm/llvm-project/commit/085689d44cb95604072d0f2b130167d9410ea155.
Not sure why it does not close automatically.


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[PATCH] D76130: [PPC][AIX] Implement variadic function handling in LowerFormalArguments_AIX

[Jason Liu via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG085689d44cb9: [PPC][AIX] Implement variadic function 
handling in LowerFormalArguments_AIX (authored by jasonliu).

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Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
  llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll

Index: llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
@@ -0,0 +1,357 @@
+; RUN: llc -O2 -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \
+; RUN: FileCheck --check-prefixes=CHECK,64BIT %s
+
+; RUN: llc -O2 -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \
+; RUN: -mtriple powerpc64-ibm-aix-xcoff < %s | \
+; RUN: FileCheck --check-prefixes=CHECKASM,ASM64 %s
+
+  define i32 @int_va_arg(i32 %a, ...) local_unnamed_addr  {
+  entry:
+%arg1 = alloca i8*, align 8
+%arg2 = alloca i8*, align 8
+%0 = bitcast i8** %arg1 to i8*
+call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %0)
+%1 = bitcast i8** %arg2 to i8*
+call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %1)
+call void @llvm.va_start(i8* nonnull %0)
+call void @llvm.va_copy(i8* nonnull %1, i8* nonnull %0)
+%2 = va_arg i8** %arg1, i32
+%add = add nsw i32 %2, %a
+%3 = va_arg i8** %arg2, i32
+%mul = shl i32 %3, 1
+%add3 = add nsw i32 %add, %mul
+call void @llvm.va_end(i8* nonnull %0)
+call void @llvm.va_end(i8* nonnull %1)
+call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %1)
+call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %0)
+ret i32 %add3
+  }
+
+  declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
+  declare void @llvm.va_start(i8*)
+  declare void @llvm.va_copy(i8*, i8*)
+  declare void @llvm.va_end(i8*)
+  declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
+
+; 64BIT-LABEL:   name:int_va_arg
+; 64BIT-LABEL:   liveins:
+; 64BIT-DAG: - { reg: '$x3', virtual-reg: '' }
+; 64BIT-DAG: - { reg: '$x4', virtual-reg: '' }
+; 64BIT-DAG: - { reg: '$x5', virtual-reg: '' }
+; 64BIT-DAG: - { reg: '$x6', virtual-reg: '' }
+; 64BIT-DAG: - { reg: '$x7', virtual-reg: '' }
+; 64BIT-DAG: - { reg: '$x8', virtual-reg: '' }
+; 64BIT-DAG: - { reg: '$x9', virtual-reg: '' }
+; 64BIT-DAG: - { reg: '$x10', virtual-reg: '' }
+
+; 64BIT-LABEL:   fixedStack:
+; 64BIT-DAG: - { id: 0, type: default, offset: 56, size: 8
+
+; 64BIT-LABEL:   stack:
+; 64BIT-DAG: - { id: 0, name: arg1, type: default, offset: 0, size: 8
+; 64BIT-DAG: - { id: 1, name: arg2, type: default, offset: 0, size: 8
+
+; 64BIT-LABEL:   body: |
+; 64BIT-DAG: bb.0.entry:
+; 64BIT-DAG: liveins: $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10
+; 64BIT-DAG: STD killed renamable $x4, 0, %fixed-stack.0 :: (store 8 into %fixed-stack.0)
+; 64BIT-DAG: STD killed renamable $x5, 8, %fixed-stack.0 :: (store 8 into %fixed-stack.0 + 8)
+; 64BIT-DAG: STD killed renamable $x6, 16, %fixed-stack.0 :: (store 8)
+; 64BIT-DAG: STD killed renamable $x7, 24, %fixed-stack.0 :: (store 8)
+; 64BIT-DAG: STD killed renamable $x8, 32, %fixed-stack.0 :: (store 8)
+; 64BIT-DAG: STD killed renamable $x9, 40, %fixed-stack.0 :: (store 8)
+; 64BIT-DAG: STD killed renamable $x10, 48, %fixed-stack.0 :: (store 8)
+; 64BIT-DAG: renamable $x11 = ADDI8 %fixed-stack.0, 0
+; 64BIT-DAG: STD renamable $x11, 0, %stack.1.arg2 :: (store 8 into %ir.1)
+; 64BIT-DAG: renamable $x4 = LD 0, %stack.1.arg2 :: (load 8 from %ir.arg2)
+; 64BIT-DAG: renamable $x7 = ADDI8 renamable $x4, 4
+; 64BIT-DAG: renamable $x5 = ADDI8 %fixed-stack.0, 4
+; 64BIT-DAG: renamable $r6 = LWZ 0, %fixed-stack.0 :: (load 4 from %fixed-stack.0, align 8)
+; 64BIT-DAG: STD killed renamable $x11, 0, %stack.0.arg1 :: (store 8 into %ir.0)
+; 64BIT-DAG: STD killed renamable $x5, 0, %stack.0.arg1 :: (store 8 into %ir.arg1)
+; 64BIT-DAG: STD killed renamable $x7, 0, %stack.1.arg2 :: (store 8 into %ir.arg2)
+; 64BIT-DAG: renamable $r4 = LWZ 0, killed renamable $x4 :: (load 4)
+; 64BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r6, renamable $r3, implicit killed $x3
+; 64BIT-DAG: renamable $r4 = RLWINM killed renamable $r4, 1, 0, 30
+; 64BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r4, implicit-def $x3
+; 64BIT-DAG: BLR8 implicit $lr8, implicit $rm, implicit $x3
+
+; ASM64-LABEL:   .int_va_arg:
+; ASM64-DAG: std 4, 56(1)
+; ASM64-DAG: addi 4, 1, 56
+; ASM64-DAG: std 4, -16(1)
+; ASM64-DAG: std 4, -8(1)
+; ASM64-DAG: ld 4, -16(1)
+; ASM64-DAG: std 

[PATCH] D76932: [AIX] emit .extern and .weak directive linkage

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:1500
+  if (cast(Name)->hasContainingCsect())
+emitLinkage(, Name);
+

DiggerLin wrote:
> jasonliu wrote:
> > 1. We need to rebase here, as it is called `hasRepresentedCsectSet()` 
> > instead of `hasContainingCsect()` now.
> > 2. I'm slightly worried here to rely on `hasRepresentedCsectSet()` to check 
> > if a linkage should be emitted. This is based on the assumption that we 
> > will not ever change our implementation for `.bl foo` to `.bl foo[PR]`. But 
> > in https://reviews.llvm.org/D77080#inline-706207, we discussed about this 
> > possibility. So this assumption might not be true in the future. However, 
> > I'm not sure if there is another way to check if this function have been 
> > called directly. 
> > So if there is another way to check, we should pursue the alternative 
> > instead. If there is not, then we need to add an assert here, like 
> > `assert(Name->getName().equals(cast(Name)->getUnqualifiedName())`
> >  to make sure we don't get a qualname here. 
> > 3. 
> > Have a comment here and tell people what we are doing here.
> > For example, 
> > // If there is a direct call to external function, then we need to emit 
> > linkage for its function entry point. 
> when we implement .bl foo to .bl foo[PR]
> the SymbolName will change from .bl[SMC] and check the 
> .bl[SMC]->hasRepresentedCsectSet()
Yes, but foo[PR]->hasRepresentedCsectSet() will always return true, because 
whenever we created a qualname will always have csect set. How will we know if 
foo() function is called directly then? 


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[PATCH] D76360: [PPC][AIX] Emit correct Vaarg for 32BIT-AIX in clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/test/CodeGen/ppc32-struct-return.c:53
+
+// AIX-SVR4: fatal error: error in backend: -msvr4-struct-return not supported 
on AIX
+ 

If certain front end option is not supported on certain target, I think it 
makes more sense to have a standard diagnostic in the driver component, instead 
of "crash" in the backend. 
i.e. What if we specify this option on a Windows machine? Maybe we should 
pursue the same behavior. 


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[PATCH] D76932: [AIX] emit .extern and .weak directive linkage

[Jason Liu via Phabricator via cfe-commits]

jasonliu accepted this revision.
jasonliu added a comment.
This revision is now accepted and ready to land.

LGTM. Please wait a day or two to see if @hubert.reinterpretcast have further 
comments.


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[PATCH] D76932: [AIX] emit .extern and .weak directive linkage

[Jason Liu via Phabricator via cfe-commits]

jasonliu added a comment.

Thanks for splitting the test case. I think it helps a lot for reading and 
maintainability.




Comment at: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:1490
   continue;
 GlobalValue::VisibilityTypes V = F.getVisibility();
+

This line is not used before XCOFF specialized code, we should move it down. 



Comment at: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:1495
+  if (F.isIntrinsic())
+continue;
+

If I understand correctly, we do not want to touch how we interact with 
visibility in this patch. 
If that's the case, we don't want to `continue` here and in line 1512 since the 
early `continue` will change the code flow for visibility. 
Suggestion:
if (TM.getTargetTriple().isOSBinFormatXCOFF() && !F.isIntrinsic()) {
and remove continue in line 1512. 



Comment at: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:1498
+  // Get the function entry point symbol.
+  Name = OutContext.getOrCreateSymbol("." + Name->getName());
+  if (cast(Name)->hasContainingCsect())

nit: I don't think it's a good idea here to assign back to `Name` here, as 
`Name` will also get used in  `emitVisibility` below and we want to keep it as 
it is. Let's create a new MCSymbol* here.  



Comment at: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:1500
+  if (cast(Name)->hasContainingCsect())
+emitLinkage(, Name);
+

1. We need to rebase here, as it is called `hasRepresentedCsectSet()` instead 
of `hasContainingCsect()` now.
2. I'm slightly worried here to rely on `hasRepresentedCsectSet()` to check if 
a linkage should be emitted. This is based on the assumption that we will not 
ever change our implementation for `.bl foo` to `.bl foo[PR]`. But in 
https://reviews.llvm.org/D77080#inline-706207, we discussed about this 
possibility. So this assumption might not be true in the future. However, I'm 
not sure if there is another way to check if this function have been called 
directly. 
So if there is another way to check, we should pursue the alternative instead. 
If there is not, then we need to add an assert here, like 
`assert(Name->getName().equals(cast(Name)->getUnqualifiedName())`
 to make sure we don't get a qualname here. 
3. 
Have a comment here and tell people what we are doing here.
For example, 
// If there is a direct call to external function, then we need to emit linkage 
for its function entry point. 



Comment at: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:1503
+  if (F.hasAddressTaken()) {
+// Indirect call reference of the extern function.
+// for example c source code as :

Comment need to mention what we are trying to do here: 
// If address is taken from an extern function, we need to emit linkage for its 
function descriptor symbol.



Comment at: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:1504
+// Indirect call reference of the extern function.
+// for example c source code as :
+// extern int bar_ext();

nit: for -> For,
and we don't need space between `as` and  `:`



Comment at: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:1510
+Name = Csect->getQualNameSymbol();
+emitLinkage(, Name);
+  }

nit: We don't need to assign it back to `Name`.
emitLinkage(, Csect->getQualNameSymbol());



Comment at: llvm/test/CodeGen/PowerPC/aix-WeakODRLinkage.ll:10
+  ret void
+}
+

Do we also want to test WeakAnyLinkage?


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[PATCH] D76130: [PPC][AIX] Implement variadic function handling in LowerFormalArguments_AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu accepted this revision.
jasonliu added a comment.
This revision is now accepted and ready to land.

Not sure if you want to wait for the feedback from @sfertile and @cebowleratibm 
, but I'm good with the current revision.


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[PATCH] D78506: [NFC] Common up TargetCodeGenInfo for all PowerPC target.

[Jason Liu via Phabricator via cfe-commits]

jasonliu added a comment.

To reviewers:
Although the patch is showing changes on various ABIInfo classes. But those 
classes are actually untouched.
This patch only touches PowerPC TargetCodeGenInfo related classes.


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[PATCH] D78506: [NFC] Common up TargetCodeGenInfo for all PowerPC target.

[Jason Liu via Phabricator via cfe-commits]

jasonliu created this revision.
jasonliu added reviewers: sfertile, nemanjai, hubert.reinterpretcast, 
cebowleratibm.
Herald added subscribers: steven.zhang, shchenz.
jasonliu added a reviewer: PowerPC.
jasonliu added a comment.

To reviewers:
Although the patch is showing changes on various ABIInfo classes. But those 
classes are actually untouched.
This patch only touches PowerPC TargetCodeGenInfo related classes.


There is little differences across all power pc related target for 
TargetCodeGenInfo implementation.
The biggest difference is the different ABIInfo classes it takes. 
But we don't necessarily need so many TargetCodeGenInfo for different PowerPC 
architect. 
So it might be beneficial to common them up as one PPCTargetCodeGenInfo.


https://reviews.llvm.org/D78506

Files:
  clang/lib/CodeGen/TargetInfo.cpp

Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -4172,8 +4172,9 @@
   /*allowHigherAlign*/ false);
 }
 
-// PowerPC-32
+// PowerPC
 namespace {
+// PowerPC-32
 /// PPC32_SVR4_ABIInfo - The 32-bit PowerPC ELF (SVR4) ABI information.
 class PPC32_SVR4_ABIInfo : public DefaultABIInfo {
   bool IsSoftFloatABI;
@@ -4188,10 +4189,136 @@
 QualType Ty) const override;
 };
 
-class PPC32TargetCodeGenInfo : public TargetCodeGenInfo {
+// PowerPC-64
+/// PPC64_SVR4_ABIInfo - The 64-bit PowerPC ELF (SVR4) ABI information.
+class PPC64_SVR4_ABIInfo : public SwiftABIInfo {
+public:
+  enum ABIKind {
+ELFv1 = 0,
+ELFv2
+  };
+
+private:
+  static const unsigned GPRBits = 64;
+  ABIKind Kind;
+  bool HasQPX;
+  bool IsSoftFloatABI;
+
+  // A vector of float or double will be promoted to <4 x f32> or <4 x f64> and
+  // will be passed in a QPX register.
+  bool IsQPXVectorTy(const Type *Ty) const {
+if (!HasQPX)
+  return false;
+
+if (const VectorType *VT = Ty->getAs()) {
+  unsigned NumElements = VT->getNumElements();
+  if (NumElements == 1)
+return false;
+
+  if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) {
+if (getContext().getTypeSize(Ty) <= 256)
+  return true;
+  } else if (VT->getElementType()->
+   isSpecificBuiltinType(BuiltinType::Float)) {
+if (getContext().getTypeSize(Ty) <= 128)
+  return true;
+  }
+}
+
+return false;
+  }
+
+  bool IsQPXVectorTy(QualType Ty) const {
+return IsQPXVectorTy(Ty.getTypePtr());
+  }
+
+public:
+  PPC64_SVR4_ABIInfo(CodeGen::CodeGenTypes , ABIKind Kind, bool HasQPX,
+ bool SoftFloatABI)
+  : SwiftABIInfo(CGT), Kind(Kind), HasQPX(HasQPX),
+IsSoftFloatABI(SoftFloatABI) {}
+
+  bool isPromotableTypeForABI(QualType Ty) const;
+  CharUnits getParamTypeAlignment(QualType Ty) const;
+
+  ABIArgInfo classifyReturnType(QualType RetTy) const;
+  ABIArgInfo classifyArgumentType(QualType Ty) const;
+
+  bool isHomogeneousAggregateBaseType(QualType Ty) const override;
+  bool isHomogeneousAggregateSmallEnough(const Type *Ty,
+ uint64_t Members) const override;
+
+  // TODO: We can add more logic to computeInfo to improve performance.
+  // Example: For aggregate arguments that fit in a register, we could
+  // use getDirectInReg (as is done below for structs containing a single
+  // floating-point value) to avoid pushing them to memory on function
+  // entry.  This would require changing the logic in PPCISelLowering
+  // when lowering the parameters in the caller and args in the callee.
+  void computeInfo(CGFunctionInfo ) const override {
+if (!getCXXABI().classifyReturnType(FI))
+  FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
+for (auto  : FI.arguments()) {
+  // We rely on the default argument classification for the most part.
+  // One exception:  An aggregate containing a single floating-point
+  // or vector item must be passed in a register if one is available.
+  const Type *T = isSingleElementStruct(I.type, getContext());
+  if (T) {
+const BuiltinType *BT = T->getAs();
+if (IsQPXVectorTy(T) ||
+(T->isVectorType() && getContext().getTypeSize(T) == 128) ||
+(BT && BT->isFloatingPoint())) {
+  QualType QT(T, 0);
+  I.info = ABIArgInfo::getDirectInReg(CGT.ConvertType(QT));
+  continue;
+}
+  }
+  I.info = classifyArgumentType(I.type);
+}
+  }
+
+  Address EmitVAArg(CodeGenFunction , Address VAListAddr,
+QualType Ty) const override;
+
+  bool shouldPassIndirectlyForSwift(ArrayRef scalars,
+bool asReturnValue) const override {
+return occupiesMoreThan(CGT, scalars, /*total*/ 4);
+  }
+
+  bool isSwiftErrorInRegister() const override {
+return false;
+  }
+};
+
+class PPCTargetCodeGenInfo : public 

[PATCH] D76932: [AIX] emit .extern and .weak directive linkage

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: llvm/test/CodeGen/PowerPC/aix-extern.ll:14
+
+; Function Attrs: noinline nounwind optnone
+define void @foo() #0 {

nit: Function Attrs and `#0` could be removed


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jasonliu added inline comments.



Comment at: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:1500
+  if (cast(Name)->hasContainingCsect())
+emitLinkage(, Name);
+

DiggerLin wrote:
> jasonliu wrote:
> > DiggerLin wrote:
> > > jasonliu wrote:
> > > > 1. We need to rebase here, as it is called `hasRepresentedCsectSet()` 
> > > > instead of `hasContainingCsect()` now.
> > > > 2. I'm slightly worried here to rely on `hasRepresentedCsectSet()` to 
> > > > check if a linkage should be emitted. This is based on the assumption 
> > > > that we will not ever change our implementation for `.bl foo` to `.bl 
> > > > foo[PR]`. But in https://reviews.llvm.org/D77080#inline-706207, we 
> > > > discussed about this possibility. So this assumption might not be true 
> > > > in the future. However, I'm not sure if there is another way to check 
> > > > if this function have been called directly. 
> > > > So if there is another way to check, we should pursue the alternative 
> > > > instead. If there is not, then we need to add an assert here, like 
> > > > `assert(Name->getName().equals(cast(Name)->getUnqualifiedName())`
> > > >  to make sure we don't get a qualname here. 
> > > > 3. 
> > > > Have a comment here and tell people what we are doing here.
> > > > For example, 
> > > > // If there is a direct call to external function, then we need to emit 
> > > > linkage for its function entry point. 
> > > when we implement .bl foo to .bl foo[PR]
> > > the SymbolName will change from .bl[SMC] and check the 
> > > .bl[SMC]->hasRepresentedCsectSet()
> > Yes, but foo[PR]->hasRepresentedCsectSet() will always return true, because 
> > whenever we created a qualname will always have csect set. How will we know 
> > if foo() function is called directly then? 
> we only deal with extern function(we do not deal with definition function) 
> here, for extern function, it not always has MCSectionXCOFF, it only create 
> the extern function be called directly in the 
> llvm/lib/CodeGen/MachineModuleInfo.cpp line 108~116, unless we delete the 
> code later. if the code is not changed. for extern function foo , the 
> .foo[PR] -> hasRepresentedCsectSet()  when directly call. otherwise false.
Okk. I think I got what you mean. If .foo[PR] is created then it means there is 
a direct call. Otherwise, we will not have a .foo[PR], and of course that newly 
created .foo[PR] will not have a RepresentedCsect.
Thanks.


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[PATCH] D76932: [AIX] emit .extern and .weak directive linkage

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:1497
+  OutContext.getOrCreateSymbol("." + Name->getName());
+  assert(FnEntryPointSym->getName().equals(
+ cast(FnEntryPointSym)->getUnqualifiedName()) &&

Based on our discussion, this assertion could be removed.
And please add a comment saying
// If there is a direct call to this extern function, we need to emit linkage 
for its function entry point symbol.



Comment at: llvm/test/CodeGen/PowerPC/aix-extern-weak.ll:11
+
+@foo_ext_weak_p = global void (...)* bitcast (void ()* @foo_ext_weak to void 
(...)*)
+

hubert.reinterpretcast wrote:
> I would prefer to test the function call and the take-address-of-function 
> cases separately here.
I think this is to test when the function is both taken address, and get called 
directly, will we emit linkage for both  function entry point and function 
descriptor symbol? The original implementation only emit one of them.
Maybe it makes sense to have a separate test case like this to test the linkage 
emit in all circumstance: 
```
void foo_called();
void foo_refed();
void foo_called_refed();

void (*foo_refed_p)() = foo_refed;
void (*foo_called_refed_p)() = foo_called_refed;

void bar(){
  foo_called();
  foo_called_refed();
}
```


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[PATCH] D76360: [PPC][AIX] Emit correct Vaarg for 32BIT-AIX in clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4205
 
-CharUnits PPC32_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
+CharUnits PowerPC32ABIInfo::getParamTypeAlignment(QualType Ty) const {
   // Complex types are passed just like their elements

sfertile wrote:
> jasonliu wrote:
> > So for AIX we are taking PowerPC32ABIInfo right now. And we know EmitVAArg 
> > of this target does the right thing on AIX after the change. 
> > But for other functions, for example, getParamTypeAlignment, 
> > initDwarfEHRegSizeTable... Are we sure it's doing the right thing on AIX?
> > If we are not sure, is there anything we want to do (etc, put a comment on 
> > where it gets used or at the function definition)? Or are we fine to just 
> > leave it as it is and have a TODO in our head?
> Looking at the values in `initDwarfEHRegSizeTable` it has the right sizes for 
> all the registers. Even though the OS is different the underlying hardware is 
> the same. I'm not sure it's something that makes sense to support for AIX 
> though, in which case I think its valid to return `true` to indicate its not 
> supported. 
> 
> `getParamTypeAlignment` is used only in the context of the alignment for 
> vaarg, we should make sure its correct for AIX since supporting vaarg is the 
> scope of this patch.
In that case, is it better if we have lit test to actually exercise the path in 
getParamTypeAlignment to show that we actually confirmed the behavior is 
correct for AIX? And if it is some path we do not care for now(ComplexType? 
VectorType?), then we would want TODOs on them to show we need further 
investigation later. 


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[PATCH] D76932: [AIX] emit .extern and .weak directive linkage

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:1492
+
+if (MAI->hasDotExternDirective()) {
+  MCSymbol *Name = getSymbol();

This query asked if the target supports .extern. However, .extern is not the 
only directive that could get emitted here. We could also emit .weak.



Comment at: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:1498
+  }
+  emitLinkage(, Name);
+  continue;

I'm surprised we do not enter here for `foo_ext_weak()`. The result of that is 
we need to do something in `lowerConstant()`, which I would want to avoid if 
possible. 
Should we look into why `isDeclarationForLinker()` returns false for 
`foo_ext_weak()` here?
My guess is we returned false for `!F->isMaterializable()`. And I'm not sure if 
`foo_ext_weak` is materializable is the correct answer here. 


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[PATCH] D76932: [AIX] emit .extern and .weak directive linkage

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:1498
+  }
+  emitLinkage(, Name);
+  continue;

jasonliu wrote:
> I'm surprised we do not enter here for `foo_ext_weak()`. The result of that 
> is we need to do something in `lowerConstant()`, which I would want to avoid 
> if possible. 
> Should we look into why `isDeclarationForLinker()` returns false for 
> `foo_ext_weak()` here?
> My guess is we returned false for `!F->isMaterializable()`. And I'm not sure 
> if `foo_ext_weak` is materializable is the correct answer here. 
Sorry, ignore the above comment. I think we did entered here for emitLinkage 
for `foo_ext_weak`. But the hasContainingCsect query blocked the emission 
there. 


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[PATCH] D76932: [AIX] emit .extern and .weak directive linkage

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1589
 : getObjFileLowering().getSectionForFunctionDescriptor(F, TM));
-
+if (F->isDeclaration()) {
+  MCSymbolXCOFF *FSym = cast(getSymbol(F));

If it's possible, I would like to not emitLinkage here. I don't think it's the 
right place. Could we emitLinkage for the symbols needed in 
AsmPrinter::doFinalization instead?


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[PATCH] D76932: [AIX] emit .extern and .weak directive linkage

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1548
+
+  if (XCOFFSym->hasContainingCsect()) {
+MCSymbolXCOFF *QualName =

I hope we can find a better solution here. IMO, we don't even want to override 
this function in this patch. 
GVSym should be the right one from what caller passed in. It's caller's 
responsibility to pass in the right GVSym. 
When caller calls emitLinkage, we should emitLinkage. It's weird when 
emitLinkage is called, but none is emitted (when hasContainingCsect() returns 
false).


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[PATCH] D76360: [PPC][AIX] Emit correct Vaarg for 32BIT-AIX in clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:10019
+  return SetCGInfo(
+  new PPCAIX32TargetCodeGenInfo(Types, CodeGenOpts.FloatABI == 
"soft"));
 return SetCGInfo(

Does AIX have soft Float? If not, do we want to always pass in 'false'? 



Comment at: clang/test/CodeGen/aix-vararg.c:4
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -emit-llvm -o - %s | 
FileCheck %s --check-prefix=32BIT
+#include 
+

Any reason we don't use __builtin_va... any more?


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[PATCH] D76360: [PPC][AIX] Emit correct Vaarg for 32BIT-AIX in clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:10019
+  return SetCGInfo(
+  new PPCAIX32TargetCodeGenInfo(Types, CodeGenOpts.FloatABI == 
"soft"));
 return SetCGInfo(

ZarkoCA wrote:
> jasonliu wrote:
> > Does AIX have soft Float? If not, do we want to always pass in 'false'? 
> Thanks, missed changing this.  I set it to hard.
I don't think `CodeGenOpts.FloatABI == "hard"` is what we want though. 
Currently it means if CodeGenOpts.FloatABI is really "hard", then it will pass 
in `true` for `SoftFloatABI` to indicate we are soft float ABI.


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[PATCH] D76130: [PPC][AIX] Implement variadic function handling in LowerFormalArguments_AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll:8
+
+  target datalayout = "E-m:e-p:32:32-i64:64-n32"
+  target triple = "powerpc-ibm-aix-xcoff"

minor nit: I don't think these target datalayout and triple are necessary. 


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[PATCH] D76932: [AIX] emit .extern and .weak directive linkage

[Jason Liu via Phabricator via cfe-commits]

jasonliu added a comment.

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[PATCH] D76932: [AIX] emit .extern and .weak directive linkage

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:1486
 
   // Emit visibility info for declarations
   for (const Function  : M) {

Comment should change to something similar to:
`Emit linkage(XCOFF) and visibility info for declarations.`



Comment at: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:1510
+  continue;
+}
+

What if we have
```
void foo();
void (*foo_ptr)() = foo;
int bar() {
  foo();
}
```
We would need both `.extern .foo` and `.extern foo[DS]`.
Also, please have a similar case into the lit test. 



Comment at: llvm/lib/MC/MCXCOFFStreamer.cpp:38
   case MCSA_Global:
+  case llvm::MCSA_Extern:
 Symbol->setStorageClass(XCOFF::C_EXT);

Please remove `llvm::` for MCSA_Extern and MCSA_Weak to make the style 
consistent. 



Comment at: llvm/lib/MC/MCXCOFFStreamer.cpp:48
+Symbol->setStorageClass(XCOFF::C_WEAKEXT);
+Symbol->setExternal(true);
+break;

Maybe we should just move `Symbol->setExternal(true);` outside of the switch, 
as it is set for every attribute that we are going to emit. 



Comment at: llvm/lib/MC/XCOFFObjectWriter.cpp:351
+  if (nameShouldBeInStringTable(ContainingCsect->getSectionName()))
+Strings.add(ContainingCsect->getSectionName());
+}

We should `continue` here if the rest of the logic does not matter. 



Comment at: llvm/lib/MC/XCOFFObjectWriter.cpp:352
+Strings.add(ContainingCsect->getSectionName());
+}
   // If the symbol is the csect itself, we don't need to put the symbol

A new line after '}'.



Comment at: llvm/lib/MC/XCOFFObjectWriter.cpp:353
+}
   // If the symbol is the csect itself, we don't need to put the symbol
   // into csect's Syms.

line 353 to 365 did not align properly. 



Comment at: llvm/test/CodeGen/PowerPC/aix-extern-weak.ll:17
+
+define weak void @foo_weak() #0 {
+entry:

Nit: Please remove #0, #1 from the test case.



Comment at: llvm/test/CodeGen/PowerPC/aix-extern-weak.ll:55
+
+; COMMON:  .weak   foo_weak[DS]# -- Begin function foo_weak
+; COMMON-NEXT: .weak   .foo_weak

A proper space alignment would make the expected result more readable. 


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[PATCH] D76932: [AIX] emit .extern and .weak directive linkage

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:407
   case GlobalValue::WeakAnyLinkage:
   case GlobalValue::WeakODRLinkage:
 if (MAI->hasWeakDefDirective()) {

Could we verify if these Linkage should also always emit .weak?
We do have one test case that tests LinkOnceODRLinkage in 
llvm/test/CodeGen/PowerPC/aix-LinkOnceODRLinkage.ll, but no other linkages here 
is tested and confirmed the behavior is right for AIX.
Also LinkOnceODRLinkage.ll test needs to get update as well, since we will emit 
`.weak _Z3fooIiEvT_[DS]` now. 


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[PATCH] D79033: [NFC][clang] Replace raw new/delete with unique_ptr to store ABIInfo in TargetCodeGenInfo

[Jason Liu via Phabricator via cfe-commits]

jasonliu created this revision.
jasonliu added reviewers: hubert.reinterpretcast, sfertile, nemanjai, 
Xiangling_L.
Herald added subscribers: s.egerton, simoncook, fedor.sergeev, aheejin, dschuff.
Herald added a project: clang.

Use unique_ptr to manage the lifetime of ABIInfo member inside 
TargetCodeGenInfo.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D79033

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/CodeGen/TargetInfo.h

Index: clang/lib/CodeGen/TargetInfo.h
===
--- clang/lib/CodeGen/TargetInfo.h
+++ clang/lib/CodeGen/TargetInfo.h
@@ -43,12 +43,11 @@
 /// codegeneration issues, like target-specific attributes, builtins and so
 /// on.
 class TargetCodeGenInfo {
-  ABIInfo *Info;
+  std::unique_ptr Info = nullptr;
 
 public:
-  // WARNING: Acquires the ownership of ABIInfo.
-  TargetCodeGenInfo(ABIInfo *info = nullptr) : Info(info) {}
-  virtual ~TargetCodeGenInfo();
+  TargetCodeGenInfo(std::unique_ptr Info)
+  : Info(std::move(Info)) {}
 
   /// getABIInfo() - Returns ABI info helper for the target.
   const ABIInfo () const { return *Info; }
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -385,8 +385,6 @@
   return Address(PHI, Align);
 }
 
-TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; }
-
 // If someone can figure out a general rule for this, that would be great.
 // It's probably just doomed to be platform-dependent, though.
 unsigned TargetCodeGenInfo::getSizeOfUnwindException() const {
@@ -682,7 +680,7 @@
 class DefaultTargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes )
-: TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
+  : TargetCodeGenInfo(std::make_unique(CGT)) {}
 };
 
 ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const {
@@ -772,7 +770,7 @@
 public:
   explicit WebAssemblyTargetCodeGenInfo(CodeGen::CodeGenTypes ,
 WebAssemblyABIInfo::ABIKind K)
-  : TargetCodeGenInfo(new WebAssemblyABIInfo(CGT, K)) {}
+  : TargetCodeGenInfo(std::make_unique(CGT, K)) {}
 
   void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule ) const override {
@@ -898,8 +896,8 @@
 
 class PNaClTargetCodeGenInfo : public TargetCodeGenInfo {
  public:
-  PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes )
-: TargetCodeGenInfo(new PNaClABIInfo(CGT)) {}
+   PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes )
+   : TargetCodeGenInfo(std::make_unique(CGT)) {}
 };
 
 void PNaClABIInfo::computeInfo(CGFunctionInfo ) const {
@@ -1140,7 +1138,7 @@
   X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes , bool DarwinVectorABI,
   bool RetSmallStructInRegABI, bool Win32StructABI,
   unsigned NumRegisterParameters, bool SoftFloatABI)
-  : TargetCodeGenInfo(new X86_32ABIInfo(
+  : TargetCodeGenInfo(std::make_unique(
 CGT, DarwinVectorABI, RetSmallStructInRegABI, Win32StructABI,
 NumRegisterParameters, SoftFloatABI)) {}
 
@@ -2334,7 +2332,7 @@
 class X86_64TargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes , X86AVXABILevel AVXLevel)
-  : TargetCodeGenInfo(new X86_64ABIInfo(CGT, AVXLevel)) {}
+  : TargetCodeGenInfo(std::make_unique(CGT, AVXLevel)) {}
 
   const X86_64ABIInfo () const {
 return static_cast(TargetCodeGenInfo::getABIInfo());
@@ -2478,7 +2476,7 @@
 public:
   WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes ,
  X86AVXABILevel AVXLevel)
-  : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT, AVXLevel)) {}
+  : TargetCodeGenInfo(std::make_unique(CGT, AVXLevel)) {}
 
   void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule ) const override;
@@ -4204,8 +4202,8 @@
 public:
   PPC32TargetCodeGenInfo(CodeGenTypes , bool SoftFloatABI,
  bool RetSmallStructInRegABI)
-  : TargetCodeGenInfo(new PPC32_SVR4_ABIInfo(CGT, SoftFloatABI,
- RetSmallStructInRegABI)) {}
+  : TargetCodeGenInfo(std::make_unique(
+CGT, SoftFloatABI, RetSmallStructInRegABI)) {}
 
   static bool isStructReturnInRegABI(const llvm::Triple ,
  const CodeGenOptions );
@@ -4595,8 +4593,8 @@
   PPC64_SVR4_TargetCodeGenInfo(CodeGenTypes ,
PPC64_SVR4_ABIInfo::ABIKind Kind, bool HasQPX,
bool SoftFloatABI)
-  : TargetCodeGenInfo(new PPC64_SVR4_ABIInfo(CGT, Kind, HasQPX,
- SoftFloatABI)) {}
+  : TargetCodeGenInfo(std::make_unique(
+CGT, Kind, HasQPX, SoftFloatABI)) {}
 
   

[PATCH] D79033: [NFC][clang] Replace raw new/delete with unique_ptr to store ABIInfo in TargetCodeGenInfo

[Jason Liu via Phabricator via cfe-commits]

jasonliu updated this revision to Diff 260766.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79033/new/

https://reviews.llvm.org/D79033

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/CodeGen/TargetInfo.h

Index: clang/lib/CodeGen/TargetInfo.h
===
--- clang/lib/CodeGen/TargetInfo.h
+++ clang/lib/CodeGen/TargetInfo.h
@@ -43,11 +43,10 @@
 /// codegeneration issues, like target-specific attributes, builtins and so
 /// on.
 class TargetCodeGenInfo {
-  ABIInfo *Info;
+  std::unique_ptr Info = nullptr;
 
 public:
-  // WARNING: Acquires the ownership of ABIInfo.
-  TargetCodeGenInfo(ABIInfo *info = nullptr) : Info(info) {}
+  TargetCodeGenInfo(std::unique_ptr Info) : Info(std::move(Info)) {}
   virtual ~TargetCodeGenInfo();
 
   /// getABIInfo() - Returns ABI info helper for the target.
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -385,7 +385,7 @@
   return Address(PHI, Align);
 }
 
-TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; }
+TargetCodeGenInfo::~TargetCodeGenInfo() = default;
 
 // If someone can figure out a general rule for this, that would be great.
 // It's probably just doomed to be platform-dependent, though.
@@ -682,7 +682,7 @@
 class DefaultTargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes )
-: TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
+  : TargetCodeGenInfo(std::make_unique(CGT)) {}
 };
 
 ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const {
@@ -772,7 +772,7 @@
 public:
   explicit WebAssemblyTargetCodeGenInfo(CodeGen::CodeGenTypes ,
 WebAssemblyABIInfo::ABIKind K)
-  : TargetCodeGenInfo(new WebAssemblyABIInfo(CGT, K)) {}
+  : TargetCodeGenInfo(std::make_unique(CGT, K)) {}
 
   void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule ) const override {
@@ -898,8 +898,8 @@
 
 class PNaClTargetCodeGenInfo : public TargetCodeGenInfo {
  public:
-  PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes )
-: TargetCodeGenInfo(new PNaClABIInfo(CGT)) {}
+   PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes )
+   : TargetCodeGenInfo(std::make_unique(CGT)) {}
 };
 
 void PNaClABIInfo::computeInfo(CGFunctionInfo ) const {
@@ -1140,7 +1140,7 @@
   X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes , bool DarwinVectorABI,
   bool RetSmallStructInRegABI, bool Win32StructABI,
   unsigned NumRegisterParameters, bool SoftFloatABI)
-  : TargetCodeGenInfo(new X86_32ABIInfo(
+  : TargetCodeGenInfo(std::make_unique(
 CGT, DarwinVectorABI, RetSmallStructInRegABI, Win32StructABI,
 NumRegisterParameters, SoftFloatABI)) {}
 
@@ -2334,7 +2334,7 @@
 class X86_64TargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes , X86AVXABILevel AVXLevel)
-  : TargetCodeGenInfo(new X86_64ABIInfo(CGT, AVXLevel)) {}
+  : TargetCodeGenInfo(std::make_unique(CGT, AVXLevel)) {}
 
   const X86_64ABIInfo () const {
 return static_cast(TargetCodeGenInfo::getABIInfo());
@@ -2478,7 +2478,7 @@
 public:
   WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes ,
  X86AVXABILevel AVXLevel)
-  : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT, AVXLevel)) {}
+  : TargetCodeGenInfo(std::make_unique(CGT, AVXLevel)) {}
 
   void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule ) const override;
@@ -4204,8 +4204,8 @@
 public:
   PPC32TargetCodeGenInfo(CodeGenTypes , bool SoftFloatABI,
  bool RetSmallStructInRegABI)
-  : TargetCodeGenInfo(new PPC32_SVR4_ABIInfo(CGT, SoftFloatABI,
- RetSmallStructInRegABI)) {}
+  : TargetCodeGenInfo(std::make_unique(
+CGT, SoftFloatABI, RetSmallStructInRegABI)) {}
 
   static bool isStructReturnInRegABI(const llvm::Triple ,
  const CodeGenOptions );
@@ -4595,8 +4595,8 @@
   PPC64_SVR4_TargetCodeGenInfo(CodeGenTypes ,
PPC64_SVR4_ABIInfo::ABIKind Kind, bool HasQPX,
bool SoftFloatABI)
-  : TargetCodeGenInfo(new PPC64_SVR4_ABIInfo(CGT, Kind, HasQPX,
- SoftFloatABI)) {}
+  : TargetCodeGenInfo(std::make_unique(
+CGT, Kind, HasQPX, SoftFloatABI)) {}
 
   int getDwarfEHStackPointer(CodeGen::CodeGenModule ) const override {
 // This is recovered from gcc output.
@@ -5154,7 +5154,7 @@
 class AArch64TargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   AArch64TargetCodeGenInfo(CodeGenTypes , AArch64ABIInfo::ABIKind Kind)
-  : 

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu created this revision.
jasonliu added reviewers: Xiangling_L, sfertile, hubert.reinterpretcast, 
cebowleratibm, ZarkoCA.
Herald added subscribers: kbarton, nemanjai.
Herald added a project: clang.

Created AIXABIInfo and AIXTargetCodeGenInfo for AIX ABI.

Some investigation and FAQ on why we created AIXABIInfo:

Use or derive PPC32/PPC64 ABIInfo for AIX: 
There are a lot of subtle differences between PPC32 and PPC64 variation. For 
AIX we do not have a huge differences between 32 bit and 64 bit for the ABI 
rules. Which means if we decide to use PPC32 for 32 bit on AIX and PPC64 for 64 
bit on AIX, we will need to add in a lot of target check to make them 
symmetric. The code flow will be really hard to follow and verify for every 
target that is trying to use them. And it’s easy for us to take a lot of 
unwanted change that really is meant for SVR targets. 
Use one ABIInfo class for both 32 bit and 64 bit on AIX will make the code much 
clear and easier to follow through. And that was one of the reason for us to 
create LowerCall_AIX/LowerFormalArgument_AIX instead of just rename and use the 
existing SVR4/Darwin one.

Derive from DefaultABIInfo:
We are going to override most of the methods in DefaultABIInfo anyway if we 
look at the analysis below.

Derive from SwiftABIInfo:
I don't think we want to claim Swift support on AIX right now.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D79035

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc64-dwarf.c

Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-dwarf.c
===
--- /dev/null
+++ clang/test/CodeGen/ppc32-dwarf.c
@@ -0,0 +1,126 @@
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC32
+static unsigned char dwarf_reg_size_table[1024];
+
+int test() {
+  __builtin_init_dwarf_reg_size_table(dwarf_reg_size_table);
+
+  return __builtin_dwarf_sp_column();
+}
+
+// CHECK-LABEL: define i32 @test()
+// CHECK: store i8 4, i8* getelementptr inbounds ([1024 x i8], [1024 x 

[PATCH] D79033: [NFC][clang] Replace raw new/delete with unique_ptr to store ABIInfo in TargetCodeGenInfo

[Jason Liu via Phabricator via cfe-commits]

jasonliu updated this revision to Diff 260746.
jasonliu added a comment.

Provide default virtual destructor.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79033/new/

https://reviews.llvm.org/D79033

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/CodeGen/TargetInfo.h

Index: clang/lib/CodeGen/TargetInfo.h
===
--- clang/lib/CodeGen/TargetInfo.h
+++ clang/lib/CodeGen/TargetInfo.h
@@ -43,12 +43,11 @@
 /// codegeneration issues, like target-specific attributes, builtins and so
 /// on.
 class TargetCodeGenInfo {
-  ABIInfo *Info;
+  std::unique_ptr Info = nullptr;
 
 public:
-  // WARNING: Acquires the ownership of ABIInfo.
-  TargetCodeGenInfo(ABIInfo *info = nullptr) : Info(info) {}
-  virtual ~TargetCodeGenInfo();
+  TargetCodeGenInfo(std::unique_ptr Info) : Info(std::move(Info)) {}
+  virtual ~TargetCodeGenInfo() = default;
 
   /// getABIInfo() - Returns ABI info helper for the target.
   const ABIInfo () const { return *Info; }
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -385,8 +385,6 @@
   return Address(PHI, Align);
 }
 
-TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; }
-
 // If someone can figure out a general rule for this, that would be great.
 // It's probably just doomed to be platform-dependent, though.
 unsigned TargetCodeGenInfo::getSizeOfUnwindException() const {
@@ -682,7 +680,7 @@
 class DefaultTargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes )
-: TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
+  : TargetCodeGenInfo(std::make_unique(CGT)) {}
 };
 
 ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const {
@@ -772,7 +770,7 @@
 public:
   explicit WebAssemblyTargetCodeGenInfo(CodeGen::CodeGenTypes ,
 WebAssemblyABIInfo::ABIKind K)
-  : TargetCodeGenInfo(new WebAssemblyABIInfo(CGT, K)) {}
+  : TargetCodeGenInfo(std::make_unique(CGT, K)) {}
 
   void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule ) const override {
@@ -898,8 +896,8 @@
 
 class PNaClTargetCodeGenInfo : public TargetCodeGenInfo {
  public:
-  PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes )
-: TargetCodeGenInfo(new PNaClABIInfo(CGT)) {}
+   PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes )
+   : TargetCodeGenInfo(std::make_unique(CGT)) {}
 };
 
 void PNaClABIInfo::computeInfo(CGFunctionInfo ) const {
@@ -1140,7 +1138,7 @@
   X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes , bool DarwinVectorABI,
   bool RetSmallStructInRegABI, bool Win32StructABI,
   unsigned NumRegisterParameters, bool SoftFloatABI)
-  : TargetCodeGenInfo(new X86_32ABIInfo(
+  : TargetCodeGenInfo(std::make_unique(
 CGT, DarwinVectorABI, RetSmallStructInRegABI, Win32StructABI,
 NumRegisterParameters, SoftFloatABI)) {}
 
@@ -2334,7 +2332,7 @@
 class X86_64TargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes , X86AVXABILevel AVXLevel)
-  : TargetCodeGenInfo(new X86_64ABIInfo(CGT, AVXLevel)) {}
+  : TargetCodeGenInfo(std::make_unique(CGT, AVXLevel)) {}
 
   const X86_64ABIInfo () const {
 return static_cast(TargetCodeGenInfo::getABIInfo());
@@ -2478,7 +2476,7 @@
 public:
   WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes ,
  X86AVXABILevel AVXLevel)
-  : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT, AVXLevel)) {}
+  : TargetCodeGenInfo(std::make_unique(CGT, AVXLevel)) {}
 
   void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule ) const override;
@@ -4204,8 +4202,8 @@
 public:
   PPC32TargetCodeGenInfo(CodeGenTypes , bool SoftFloatABI,
  bool RetSmallStructInRegABI)
-  : TargetCodeGenInfo(new PPC32_SVR4_ABIInfo(CGT, SoftFloatABI,
- RetSmallStructInRegABI)) {}
+  : TargetCodeGenInfo(std::make_unique(
+CGT, SoftFloatABI, RetSmallStructInRegABI)) {}
 
   static bool isStructReturnInRegABI(const llvm::Triple ,
  const CodeGenOptions );
@@ -4595,8 +4593,8 @@
   PPC64_SVR4_TargetCodeGenInfo(CodeGenTypes ,
PPC64_SVR4_ABIInfo::ABIKind Kind, bool HasQPX,
bool SoftFloatABI)
-  : TargetCodeGenInfo(new PPC64_SVR4_ABIInfo(CGT, Kind, HasQPX,
- SoftFloatABI)) {}
+  : TargetCodeGenInfo(std::make_unique(
+CGT, Kind, HasQPX, SoftFloatABI)) {}
 
   int getDwarfEHStackPointer(CodeGen::CodeGenModule ) const override {
 // This is recovered from gcc output.
@@ -5154,7 +5152,7 @@
 class 

[PATCH] D78563: [AIX] Port power alignment rules to clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/include/clang/AST/RecordLayout.h:81
 
+  /// AIXOffsetAlignment - The special AIX Alignment for the object that
+  /// contains floating-point member or sub-member. This is for AIX-abi only.

AIX Alignment -> AIX alignment



Comment at: clang/lib/AST/RecordLayoutBuilder.cpp:1013
+  UpdateAlignment(BaseAlign, UnpackedBaseAlign,
+  /*AIXOffsetAlignment : used by AIX-ABI*/
+  BaseAlign);

Consistent spelling as: AIX-abi?



Comment at: clang/lib/AST/RecordLayoutBuilder.cpp:1853
 
+  // AIX abi has this special rule that in aggregates, the first member of
+  // floating point data type(or aggregate type contains floating point data

Consistent spelling as AIX-abi?



Comment at: clang/test/Layout/aix-double-struct-member.cpp:136
+// CHECK-NEXT:|  nvsize=12, nvalign=4]
+}; // namespace test4

jasonliu wrote:
> 1. I think we also want to test empty base class with a derived class 
> contains double as first. And also a non-empty base class with derived 
> contains double as first to show that it has effect on basic inheritance as 
> well.
> 2. We need one more test for seeing how pack align interact with AIX 
> alignment. 
We also want to test if MaxFieldAlignment could override the AIX alignment.


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[PATCH] D78563: [AIX] Port power alignment rules to clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/test/Layout/aix-double-struct-member.cpp:136
+// CHECK-NEXT:|  nvsize=12, nvalign=4]
+}; // namespace test4

1. I think we also want to test empty base class with a derived class contains 
double as first. And also a non-empty base class with derived contains double 
as first to show that it has effect on basic inheritance as well.
2. We need one more test for seeing how pack align interact with AIX alignment. 


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[PATCH] D78563: [AIX] Port power alignment rules to clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/include/clang/AST/RecordLayout.h:177
 
+  /// getAIXOffsetAlignment - Get the record of aixOffset alignment in
+  /// characters.

Not sure if aixOffset is a thing? Might be better to just say "aix offset 
alignment"? 


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[PATCH] D79044: [AIX] Avoid structor alias; die before bad alias codegen

[Jason Liu via Phabricator via cfe-commits]

jasonliu accepted this revision.
jasonliu added a comment.
This revision is now accepted and ready to land.

LGTM.


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu marked 2 inline comments as done.
jasonliu added inline comments.



Comment at: clang/test/CodeGen/ppc32-dwarf.c:2
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm %s -o - | FileCheck 
%s
+// RUN: %clang_cc1 -triple powerpc-unknown-unknown -emit-llvm %s -o - | 
FileCheck %s --check-prefixes=CHECK,PPC32
+static unsigned char dwarf_reg_size_table[1024];

Xiangling_L wrote:
> Minor comment:
> Would `PPC32SVR4` compared to `PPC32` make the checking content clearer since 
> PPC32 actually includes AIX target?
Technically, it's PPC32 target except AIX (not restrict to SVR4). So PPC32SVR4 
is not that accurate either. 



Comment at: clang/test/CodeGen/ppc64-dwarf.c:2
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | 
FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | 
FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];

Xiangling_L wrote:
> Same comment as above.
> s/PPC64/PPC64SVR4?
Same above, and for PPC64 we have Darwin that's actually not SVR4.


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu marked 2 inline comments as done.
jasonliu added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4317
+  if (isAggregateTypeForABI(RetTy))
+return getNaturalAlignIndirect(RetTy);
+

Xiangling_L wrote:
> This method uses the ABI alignment of the given aggregate type which I think 
> is not ideal due to our AIX special alignment rule. We need to use preferred 
> alignment in this case.
> Btw also I think it's not necessary for you to rebase your patch on the power 
> alignment patch, I can refresh the testcase when I am dealing with that one.
As it is right now in master, there is no difference between natural alignment 
and preferred alignment for AIX. The tentative direction is to use preferred 
alignment to record the actual alignment on AIX, but it is not finalized yet. I 
would rather leave this part of the work for the patch that's going to 
implement the power alignment rule for AIX.



Comment at: clang/test/CodeGen/aix-vaargs.c:3
+// REQUIRES: asserts
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm -o - %s | FileCheck 
%s --check-prefixes=AIX-COM,AIX-M32
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm -o - %s | 
FileCheck %s --check-prefixes=AIX-COM,AIX-M64

Xiangling_L wrote:
> Consistent with other testcases to use `AIX32/AIX64`?
I chose AIX-M32/AIX-M64 mainly because the length is the same as AIX-COM so we 
don't need to worry about aligning the space. I would prefer to keep it that.


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[PATCH] D79033: [NFC][clang] Replace raw new/delete with unique_ptr to store ABIInfo in TargetCodeGenInfo

[Jason Liu via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGe0c356582d2f: [NFC][clang] Replace raw new/delete with 
unique_ptr to store ABIInfo in… (authored by jasonliu).

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Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/CodeGen/TargetInfo.h

Index: clang/lib/CodeGen/TargetInfo.h
===
--- clang/lib/CodeGen/TargetInfo.h
+++ clang/lib/CodeGen/TargetInfo.h
@@ -43,11 +43,10 @@
 /// codegeneration issues, like target-specific attributes, builtins and so
 /// on.
 class TargetCodeGenInfo {
-  ABIInfo *Info;
+  std::unique_ptr Info = nullptr;
 
 public:
-  // WARNING: Acquires the ownership of ABIInfo.
-  TargetCodeGenInfo(ABIInfo *info = nullptr) : Info(info) {}
+  TargetCodeGenInfo(std::unique_ptr Info) : Info(std::move(Info)) {}
   virtual ~TargetCodeGenInfo();
 
   /// getABIInfo() - Returns ABI info helper for the target.
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -385,7 +385,7 @@
   return Address(PHI, Align);
 }
 
-TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; }
+TargetCodeGenInfo::~TargetCodeGenInfo() = default;
 
 // If someone can figure out a general rule for this, that would be great.
 // It's probably just doomed to be platform-dependent, though.
@@ -682,7 +682,7 @@
 class DefaultTargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes )
-: TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
+  : TargetCodeGenInfo(std::make_unique(CGT)) {}
 };
 
 ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const {
@@ -772,7 +772,7 @@
 public:
   explicit WebAssemblyTargetCodeGenInfo(CodeGen::CodeGenTypes ,
 WebAssemblyABIInfo::ABIKind K)
-  : TargetCodeGenInfo(new WebAssemblyABIInfo(CGT, K)) {}
+  : TargetCodeGenInfo(std::make_unique(CGT, K)) {}
 
   void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule ) const override {
@@ -898,8 +898,8 @@
 
 class PNaClTargetCodeGenInfo : public TargetCodeGenInfo {
  public:
-  PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes )
-: TargetCodeGenInfo(new PNaClABIInfo(CGT)) {}
+   PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes )
+   : TargetCodeGenInfo(std::make_unique(CGT)) {}
 };
 
 void PNaClABIInfo::computeInfo(CGFunctionInfo ) const {
@@ -1140,7 +1140,7 @@
   X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes , bool DarwinVectorABI,
   bool RetSmallStructInRegABI, bool Win32StructABI,
   unsigned NumRegisterParameters, bool SoftFloatABI)
-  : TargetCodeGenInfo(new X86_32ABIInfo(
+  : TargetCodeGenInfo(std::make_unique(
 CGT, DarwinVectorABI, RetSmallStructInRegABI, Win32StructABI,
 NumRegisterParameters, SoftFloatABI)) {}
 
@@ -2343,7 +2343,7 @@
 class X86_64TargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes , X86AVXABILevel AVXLevel)
-  : TargetCodeGenInfo(new X86_64ABIInfo(CGT, AVXLevel)) {}
+  : TargetCodeGenInfo(std::make_unique(CGT, AVXLevel)) {}
 
   const X86_64ABIInfo () const {
 return static_cast(TargetCodeGenInfo::getABIInfo());
@@ -2487,7 +2487,7 @@
 public:
   WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes ,
  X86AVXABILevel AVXLevel)
-  : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT, AVXLevel)) {}
+  : TargetCodeGenInfo(std::make_unique(CGT, AVXLevel)) {}
 
   void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule ) const override;
@@ -4235,8 +4235,8 @@
 public:
   PPC32TargetCodeGenInfo(CodeGenTypes , bool SoftFloatABI,
  bool RetSmallStructInRegABI)
-  : TargetCodeGenInfo(new PPC32_SVR4_ABIInfo(CGT, SoftFloatABI,
- RetSmallStructInRegABI)) {}
+  : TargetCodeGenInfo(std::make_unique(
+CGT, SoftFloatABI, RetSmallStructInRegABI)) {}
 
   static bool isStructReturnInRegABI(const llvm::Triple ,
  const CodeGenOptions );
@@ -4626,8 +4626,8 @@
   PPC64_SVR4_TargetCodeGenInfo(CodeGenTypes ,
PPC64_SVR4_ABIInfo::ABIKind Kind, bool HasQPX,
bool SoftFloatABI)
-  : TargetCodeGenInfo(new PPC64_SVR4_ABIInfo(CGT, Kind, HasQPX,
- SoftFloatABI)) {}
+  : TargetCodeGenInfo(std::make_unique(
+CGT, Kind, HasQPX, SoftFloatABI)) {}
 
   int getDwarfEHStackPointer(CodeGen::CodeGenModule ) const override {
 // This is recovered from gcc 

[PATCH] D76360: [PPC][AIX] Emit correct Vaarg for 32BIT-AIX in clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/test/CodeGen/ppc32-struct-return.c:53
+
+// AIX-SVR4: fatal error: error in backend: -msvr4-struct-return not supported 
on AIX
+ 

jasonliu wrote:
> sfertile wrote:
> > jasonliu wrote:
> > > If certain front end option is not supported on certain target, I think 
> > > it makes more sense to have a standard diagnostic in the driver 
> > > component, instead of "crash" in the backend. 
> > > i.e. What if we specify this option on a Windows machine? Maybe we should 
> > > pursue the same behavior. 
> > Its not that we don't intend to support the option on AIX, but that support 
> > for the option takes further verification on AIX.  Since there is a 
> > difference how  AIX justifies subregister sized values in its argument 
> > passing, we can't just assume that this option will pack the return values 
> > the same way on AIX and Linux. 
> > 
> > The focus of this patch was originally to enable and verify the proper IR 
> > generation of va-arg/va-lis/va-start, however the scope of the patch has 
> > kept growing. If there are codegen differences in packing the return 
> > register with the svr4-return option enabled it will grow this patch once 
> > again. The fatal error lets us limit the scope of this patch, while not 
> > silently emiting bad codegen if there is a difference in how gcc 
> > initializes the return  registers. If during verification we decide we 
> > don't want to support the option on AIX, then adopting  a standard 
> > diagnostic in the driver component becomes the appropriate behavior. 
> It wasn't clear for me from the code that this is not a permanent thing.  In 
> that case, does it make sense to leave a TODO here and say we need to 
> re-evaluate this in the future to decide if we want to support it or not on 
> AIX?
> On another note, I'm not sure if this is really needed on AIX target though. 
> But I guess we could discuss it down the road. 
Just to avoid ambiguity, I meant I'm not sure if we really need this *option* 
on AIX.


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[PATCH] D76360: [PPC][AIX] Emit correct Vaarg for 32BIT-AIX in clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/test/CodeGen/ppc32-struct-return.c:53
+
+// AIX-SVR4: fatal error: error in backend: -msvr4-struct-return not supported 
on AIX
+ 

sfertile wrote:
> jasonliu wrote:
> > If certain front end option is not supported on certain target, I think it 
> > makes more sense to have a standard diagnostic in the driver component, 
> > instead of "crash" in the backend. 
> > i.e. What if we specify this option on a Windows machine? Maybe we should 
> > pursue the same behavior. 
> Its not that we don't intend to support the option on AIX, but that support 
> for the option takes further verification on AIX.  Since there is a 
> difference how  AIX justifies subregister sized values in its argument 
> passing, we can't just assume that this option will pack the return values 
> the same way on AIX and Linux. 
> 
> The focus of this patch was originally to enable and verify the proper IR 
> generation of va-arg/va-lis/va-start, however the scope of the patch has kept 
> growing. If there are codegen differences in packing the return register with 
> the svr4-return option enabled it will grow this patch once again. The fatal 
> error lets us limit the scope of this patch, while not silently emiting bad 
> codegen if there is a difference in how gcc initializes the return  
> registers. If during verification we decide we don't want to support the 
> option on AIX, then adopting  a standard diagnostic in the driver component 
> becomes the appropriate behavior. 
It wasn't clear for me from the code that this is not a permanent thing.  In 
that case, does it make sense to leave a TODO here and say we need to 
re-evaluate this in the future to decide if we want to support it or not on AIX?
On another note, I'm not sure if this is really needed on AIX target though. 
But I guess we could discuss it down the road. 


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[PATCH] D76932: [AIX] emit .extern and .weak directive linkage

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:441
+  case GlobalValue::ExternalWeakLinkage:
+if (TM.getTargetTriple().isOSBinFormatXCOFF()) {
+  OutStreamer->emitSymbolAttribute(GVSym, MCSA_Weak);

Maybe an assert on isOSBinFormatXCOFF is better?
If not, could we remove the else and llvm_unreachable to let it fall through? 
Will it have warnings?
Or we could just only remove `else` here.



Comment at: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:1496
+
+MCSymbol *Name = getSymbol();
+if (TM.getTargetTriple().isOSBinFormatXCOFF() && !F.isIntrinsic()) {

This block of code and D78045 will have conflict. One of us will need to rebase.



Comment at: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1641
 
   // External global variables are already handled.
+  if (GV->isDeclaration()) {

This comment does not apply any more.



Comment at: llvm/test/CodeGen/PowerPC/aix-extern-weak.ll:10
+; RUN: llvm-readobj  --symbols %t.o | FileCheck --check-prefix=CHECKSYM %s
+
+@foo_ext_weak_p = global void (...)* bitcast (void ()* @foo_ext_weak_ref to 
void (...)*)

Do we care to check the 64 bit object generation error here and for other test 
cases that are applicable?



Comment at: llvm/test/CodeGen/PowerPC/aix-extern-weak.ll:29
+; COMMON-NEXT:.globl   .main
+; COMMON-NEXT:   .align4
+; COMMON-NEXT:   .csect main[DS]

Could we align the assembly output in aix-extern-weak.ll, aix-extern.ll, 
aix-weak.ll?



Comment at: llvm/test/CodeGen/PowerPC/aix-extern-weak.ll:48
+; COMMON-NEXT:.weak   b_w[UA]
+; COMMON-NEXT:.weak   foo_ext_weak_ref[DS]
+; COMMON-NEXT:.weak   .foo_ext_weak

If the plan is not emit function entry point if it's not necessary, let's 
CHECK-NOT that. 



Comment at: llvm/test/CodeGen/PowerPC/aix-extern.ll:14
+
+; Function Attrs: noinline nounwind optnone
+define void @foo() #0 {

jasonliu wrote:
> nit: Function Attrs and `#0` could be removed
This comment is not addressed. 


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu marked an inline comment as done.
jasonliu added inline comments.



Comment at: clang/test/Frontend/aix-unsupported.c:10
+// RUN:   -c %s 2>&1 | FileCheck %s
+// CHECK: unsupported option

Xiangling_L wrote:
> One thing I am not so sure about is that for these two options 
> `-maix-struct-return`,  `-msvr4-struct-return`, do we need to update the 
> `ClangCommandLineReference.rst` since we emit diags `unsupported option 
> '-maix-struct-return' for target 'powerpc-unknown-aix'`
I think the error message is clear enough in itself what user should expect. I 
don't think it's necessary to add to the doc.


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu updated this revision to Diff 262250.
jasonliu marked 12 inline comments as done.
jasonliu added a comment.

Rebase and address comments.


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Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc32-struct-return.c
  clang/test/CodeGen/ppc64-dwarf.c
  clang/test/Driver/ppc-unsupported.c

Index: clang/test/Driver/ppc-unsupported.c
===
--- clang/test/Driver/ppc-unsupported.c
+++ clang/test/Driver/ppc-unsupported.c
@@ -7,4 +7,12 @@
 // RUN:   -c %s 2>&1 | FileCheck %s
 // RUN: not %clang -target powerpc64le-unknown-linux -msvr4-struct-return \
 // RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
 // CHECK: unsupported option
Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-struct-return.c
===
--- clang/test/CodeGen/ppc32-struct-return.c
+++ /dev/null
@@ -1,88 +0,0 @@
-// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -triple powerpc-unknown-freebsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-linux \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -maix-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -msvr4-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-netbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu updated this revision to Diff 262252.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79035/new/

https://reviews.llvm.org/D79035

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc32-struct-return.c
  clang/test/CodeGen/ppc64-dwarf.c
  clang/test/Driver/ppc-unsupported.c

Index: clang/test/Driver/ppc-unsupported.c
===
--- clang/test/Driver/ppc-unsupported.c
+++ clang/test/Driver/ppc-unsupported.c
@@ -7,4 +7,12 @@
 // RUN:   -c %s 2>&1 | FileCheck %s
 // RUN: not %clang -target powerpc64le-unknown-linux -msvr4-struct-return \
 // RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
 // CHECK: unsupported option
Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-struct-return.c
===
--- clang/test/CodeGen/ppc32-struct-return.c
+++ /dev/null
@@ -1,88 +0,0 @@
-// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -triple powerpc-unknown-freebsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-linux \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -maix-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -msvr4-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-netbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-openbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4368
+
+  return emitVoidPtrVAArg(CGF, VAListAddr, Ty, /*Indirect*/ false, TypeInfo,
+  SlotSize, /*AllowHigher*/ true);

ZarkoCA wrote:
> Is there a reason why Indirect is set to `false` instead of querying for it 
> using `classifyArgumentType(Ty).isIndirect()`?
For how we handle Vaarg in backend, we just expect everything on register(no 
ByVal) even when it's a structure. So the indirect should always be false 
unless there is change in backend implementation.  



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4641
 return false;
   case CodeGenOptions::SRCK_InRegs: // -msvr4-struct-return
 return true;

ZarkoCA wrote:
> Has this option been verified to work correctly on AIX? In 
> https://reviews.llvm.org/D76360 we added a defensive error because we weren't 
> sure whether padding was handled correctly as described in the code. 
Thanks. I think we should disable this option in this patch.



Comment at: clang/test/CodeGen/ppc32-and-aix-struct-return.c:8
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
+// RUN: %clang_cc1 -triple powerpc-unknown-linux \
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX

Xiangling_L wrote:
> Do you mean to check AIX or SVR4?
This file is actually from llvm-project/clang/test/CodeGen/ppc32-struct-return.c
What I did is only adding the check for AIX triple. And apparently, the default 
behavior of powerpc-unknown-linux triple is CHECK-AIX.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79035/new/

https://reviews.llvm.org/D79035



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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu updated this revision to Diff 262869.
jasonliu added a comment.

Address comments.
Add in over aligned structure and structure containing vector type handling for 
argument on AIX.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79035/new/

https://reviews.llvm.org/D79035

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc32-struct-return.c
  clang/test/CodeGen/ppc64-dwarf.c
  clang/test/Driver/ppc-unsupported.c

Index: clang/test/Driver/ppc-unsupported.c
===
--- clang/test/Driver/ppc-unsupported.c
+++ clang/test/Driver/ppc-unsupported.c
@@ -7,4 +7,12 @@
 // RUN:   -c %s 2>&1 | FileCheck %s
 // RUN: not %clang -target powerpc64le-unknown-linux -msvr4-struct-return \
 // RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
 // CHECK: unsupported option
Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-struct-return.c
===
--- clang/test/CodeGen/ppc32-struct-return.c
+++ /dev/null
@@ -1,88 +0,0 @@
-// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -triple powerpc-unknown-freebsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-linux \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -maix-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -msvr4-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-netbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s 

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu updated this revision to Diff 263864.
jasonliu added a comment.

Remove driver's error.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79035/new/

https://reviews.llvm.org/D79035

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc32-struct-return.c
  clang/test/CodeGen/ppc64-dwarf.c
  clang/test/Frontend/aix-unsupported.c

Index: clang/test/Frontend/aix-unsupported.c
===
--- /dev/null
+++ clang/test/Frontend/aix-unsupported.c
@@ -0,0 +1,10 @@
+// REQUIRES: powerpc-registered-target
+// RUN: not %clang_cc1 -triple powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// CHECK: unsupported option
Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-struct-return.c
===
--- clang/test/CodeGen/ppc32-struct-return.c
+++ /dev/null
@@ -1,88 +0,0 @@
-// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -triple powerpc-unknown-freebsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-linux \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -maix-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -msvr4-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-netbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-openbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-openbsd 

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu updated this revision to Diff 262878.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79035/new/

https://reviews.llvm.org/D79035

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc32-struct-return.c
  clang/test/CodeGen/ppc64-dwarf.c
  clang/test/Driver/ppc-unsupported.c

Index: clang/test/Driver/ppc-unsupported.c
===
--- clang/test/Driver/ppc-unsupported.c
+++ clang/test/Driver/ppc-unsupported.c
@@ -7,4 +7,12 @@
 // RUN:   -c %s 2>&1 | FileCheck %s
 // RUN: not %clang -target powerpc64le-unknown-linux -msvr4-struct-return \
 // RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
 // CHECK: unsupported option
Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-struct-return.c
===
--- clang/test/CodeGen/ppc32-struct-return.c
+++ /dev/null
@@ -1,88 +0,0 @@
-// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -triple powerpc-unknown-freebsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-linux \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -maix-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -msvr4-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-netbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-openbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu updated this revision to Diff 263502.
jasonliu added a comment.

Add error report in clang_cc1 for unsupported option on AIX.


CHANGES SINCE LAST ACTION
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Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc32-struct-return.c
  clang/test/CodeGen/ppc64-dwarf.c
  clang/test/Driver/ppc-unsupported.c
  clang/test/Frontend/aix-unsupported.c

Index: clang/test/Frontend/aix-unsupported.c
===
--- /dev/null
+++ clang/test/Frontend/aix-unsupported.c
@@ -0,0 +1,10 @@
+// REQUIRES: powerpc-registered-target
+// RUN: not %clang_cc1 -triple powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// CHECK: unsupported option
Index: clang/test/Driver/ppc-unsupported.c
===
--- clang/test/Driver/ppc-unsupported.c
+++ clang/test/Driver/ppc-unsupported.c
@@ -7,4 +7,12 @@
 // RUN:   -c %s 2>&1 | FileCheck %s
 // RUN: not %clang -target powerpc64le-unknown-linux -msvr4-struct-return \
 // RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
 // CHECK: unsupported option
Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-struct-return.c
===
--- 

[PATCH] D76360: [PPC][AIX] Emit correct Vaarg for 32BIT-AIX in clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/test/CodeGen/aix-vararg.c:10
+  va_arg(arg, int);
+  va_end(arg);
+}

As part of a "va_..." family, do we also want to test va_copy? 


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[PATCH] D76130: [PPC][AIX] Implement variadic function handling in LowerFormalArguments_AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: llvm/test/CodeGen/PowerPC/aix-cc-abi-va_args-32.ll:1
+; RUN: llc -O2 -mtriple powerpc-ibm-aix-xcoff -stop-after=machine-cp 
-mattr=-altivec -verify-machineinstrs < %s | \
+; RUN: FileCheck --check-prefixes=CHECK,32BIT %s

Do we need '-O2' specified here and below?



Comment at: llvm/test/CodeGen/PowerPC/aix-cc-abi-va_args-32.ll:15
+
+@a = local_unnamed_addr global i32 1, align 4
+@b = local_unnamed_addr global i32 2, align 4

These variables didn't get used anywhere.


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[PATCH] D76130: [PPC][AIX] Implement variadic function handling in LowerFormalArguments_AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: llvm/test/CodeGen/PowerPC/aix-cc-abi-va_args-32.ll:7
+; RUN: FileCheck --check-prefixes=CHECKASM,ASM32PWR4 %s
+
+declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)

A general comment about how to test va_arg.
I think the two test cases we have here are not enough. 
On top of my head I would probably add in getting double as va_arg argument, 
uses of va_copy and so on. 
It's probably worth checking how other targets test va_arg. Grep "va_start" in 
llvm/test/CodeGen would give you a lot of hit. 


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[PATCH] D76130: [PPC][AIX] Implement variadic function handling in LowerFormalArguments_AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:7014
 
 if (VA.isRegLoc()) {
   MVT::SimpleValueType SVT = ValVT.getSimpleVT().SimpleTy;

Do we need  `&& !VA.needsCustom() ` here?


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[PATCH] D76130: [PPC][AIX] Implement variadic function handling in LowerFormalArguments_AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:7076
+static const MCPhysReg GPR_64[] = {PPC::X3, PPC::X4, PPC::X5, PPC::X6,
+   PPC::X7, PPC::X8, PPC::X9, PPC::X10};
+unsigned const NumGPArgRegs = array_lengthof(GPR_32);

This two array gets used to in CC_AIX and here. It would be great if we only 
have one set of copy. 



Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:7077
+   PPC::X7, PPC::X8, PPC::X9, PPC::X10};
+unsigned const NumGPArgRegs = array_lengthof(GPR_32);
+

Could we add an assert to make sure "array_lengthof(GPR_32) == 
array_lengthof(GPR_64)"
nit: 
unsigned const -> const unsigned



Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:7087
+  if (!IsPPC64)
+VReg = MF.addLiveIn(GPR_32[GPRIndex], ::GPRCRegClass);
+  else

Could we do 

```
const unsigned VReg = IsPPC64 ? MF.addLiveIn(GPR_64[GPRIndex], 
::G8RCRegClass)
  : MF.addLiveIn(GPR_32[GPRIndex], 
::GPRCRegClass);
```



Comment at: llvm/test/CodeGen/PowerPC/aix-cc-abi-va_args-32.ll:27
+; Function Attrs: nounwind
+define i32 @va_arg1(i32 %a, ...) local_unnamed_addr {
+entry:

These tests used for loops to call va_arg mutliple times. 
Maybe it's just me, but I found the test cases are much harder to read. 
I would suggest maybe just unroll the for loop and generate as much as the 
va_arg call that you need? 

For the cases below, I suppose you would want to call va_arg 9 times, and 2 
times respectfully. Maybe it's not that bad. If the tests gets too long, you 
could consider split the tests into separate files. 



Comment at: llvm/test/CodeGen/PowerPC/aix-cc-abi-va_args-32.ll:33
+  call void @llvm.va_start(i8* nonnull %0)
+  %cmp7 = icmp sgt i32 %a, 0
+  br i1 %cmp7, label %for.body.preheader, label %for.end

a is 1, so we would only call va_arg once, despite we have 9 vaarg argument. Is 
this the intention of the test?



Comment at: llvm/test/CodeGen/PowerPC/aix-cc-abi-va_args-32.ll:162
+  %add7 = add nsw i32 %add6, %eight
+  %cmp15 = icmp sgt i32 %eight, 0
+  br i1 %cmp15, label %for.body.preheader, label %for.end

We only have 2 va_arg arguments here, but we called va_arg 8 times? I think 
that's undefined behavior. 


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[PATCH] D76130: [PPC][AIX] Implement variadic function handling in LowerFormalArguments_AIX in 32-bit mode.

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/lib/Basic/Targets/PPC.h:373
+// This is the ELF definition, and is overridden by the Darwin and AIX
+// sub-target
 return TargetInfo::PowerABIBuiltinVaList;

nit: add '.' to the comment while we are at it.



Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:7067
+
+  const static MCPhysReg GPR_32[] = {PPC::R3, PPC::R4, PPC::R5, PPC::R6,
+ PPC::R7, PPC::R8, PPC::R9, PPC::R10};

The style in this file is "static const" instead of "const static".



Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:7029
   continue;
+} else if (VA.isMemLoc()) {
+  const unsigned LocSize = LocVT.getStoreSize();

Would it be better if we remove the "else if" and make it 

if (VA.isMemloc()){
...
continue;
}

Since this matches the last if statement, and also the style in LowerCall_AIX.



Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:7038
+CurArgOffset += LocSize - ValSize;
+  MachineFrameInfo  = MF.getFrameInfo();
+  // Potential tail calls could cause overwriting of argument stack slots.

We could remove this definition if we have one defined outside.



Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:7077
+
+  FuncInfo->setVarArgsNumGPR(
+  CCInfo.getFirstUnallocated(IsPPC64 ? GPR_64 : GPR_32));

This only gets used by 32bit-SVR4 target, I don't think we need to set it. 



Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:7082
+  SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
+  // The fixed integer arguments of a variadic function are stored to the
+  // VarArgsFrameIndex on the stack so that they may be loaded by

start a new line before the comment. 



Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:7088
+   GPRIndex < NumGPArgRegs; ++GPRIndex) {
+unsigned VReg = MF.getRegInfo().getLiveInVirtReg(
+IsPPC64 ? GPR_64[GPRIndex] : GPR_32[GPRIndex]);

Just curious, in what scenario would we already have the GPR stored in a 
virtual register before we store that GPR on that stack?



Comment at: llvm/test/CodeGen/PowerPC/aix-cc-abi-va_args-32.ll:9
+; Function Attrs: argmemonly nounwind willreturn
+declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1
+

I'm not seeing any attribute here, so I'm assuming every "#number" and comments 
about "Function Attrs" in the test could be removed. 


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[PATCH] D76360: [PPC][AIX] Emit correct Vaarg for 32BIT-AIX in clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4205
 
-CharUnits PPC32_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
+CharUnits PowerPC32ABIInfo::getParamTypeAlignment(QualType Ty) const {
   // Complex types are passed just like their elements

So for AIX we are taking PowerPC32ABIInfo right now. And we know EmitVAArg of 
this target does the right thing on AIX after the change. 
But for other functions, for example, getParamTypeAlignment, 
initDwarfEHRegSizeTable... Are we sure it's doing the right thing on AIX?
If we are not sure, is there anything we want to do (etc, put a comment on 
where it gets used or at the function definition)? Or are we fine to just leave 
it as it is and have a TODO in our head?


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[PATCH] D76130: [PPC][AIX] Implement variadic function handling in LowerFormalArguments_AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:7091
+
+static const MCPhysReg Gpr_32[] = {PPC::R3, PPC::R4, PPC::R5, PPC::R6,
+   PPC::R7, PPC::R8, PPC::R9, PPC::R10};

I'd prefer us to keep the original naming convention(GPR_32) for these two 
arrays, so that it's easy for us to common them up later in an NFC patch. 



Comment at: llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll:17
+call void @llvm.va_start(i8* nonnull %0)
+call void @llvm.va_copy(i8* nonnull %0, i8* nonnull %0)
+%argp.cur = load i8*, i8** %arg, align 4

I think it would be more clear if we actually have another va_list to copy 
instead of just va_copying itself. The same applies to all the places we call 
va_copy. 
Also it's not very clear to me which part in the check result actually tells me 
about the effect of the va_copy though.



Comment at: llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll:97
+  
+  declare void @llvm.stackprotector(i8*, i8**)
+  

llvm.stackprotector could be removed?


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu updated this revision to Diff 262958.
jasonliu marked 2 inline comments as done.
jasonliu added a comment.

Address Zarko's comment.


CHANGES SINCE LAST ACTION
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Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc32-struct-return.c
  clang/test/CodeGen/ppc64-dwarf.c
  clang/test/Driver/ppc-unsupported.c

Index: clang/test/Driver/ppc-unsupported.c
===
--- clang/test/Driver/ppc-unsupported.c
+++ clang/test/Driver/ppc-unsupported.c
@@ -7,4 +7,12 @@
 // RUN:   -c %s 2>&1 | FileCheck %s
 // RUN: not %clang -target powerpc64le-unknown-linux -msvr4-struct-return \
 // RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
 // CHECK: unsupported option
Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-struct-return.c
===
--- clang/test/CodeGen/ppc32-struct-return.c
+++ /dev/null
@@ -1,88 +0,0 @@
-// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -triple powerpc-unknown-freebsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-linux \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -maix-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -msvr4-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-netbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple 

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu updated this revision to Diff 262964.
jasonliu marked 5 inline comments as done.
jasonliu added a comment.

Address Xiangling's comment.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79035/new/

https://reviews.llvm.org/D79035

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc32-struct-return.c
  clang/test/CodeGen/ppc64-dwarf.c
  clang/test/Driver/ppc-unsupported.c

Index: clang/test/Driver/ppc-unsupported.c
===
--- clang/test/Driver/ppc-unsupported.c
+++ clang/test/Driver/ppc-unsupported.c
@@ -7,4 +7,12 @@
 // RUN:   -c %s 2>&1 | FileCheck %s
 // RUN: not %clang -target powerpc64le-unknown-linux -msvr4-struct-return \
 // RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
 // CHECK: unsupported option
Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-struct-return.c
===
--- clang/test/CodeGen/ppc32-struct-return.c
+++ /dev/null
@@ -1,88 +0,0 @@
-// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -triple powerpc-unknown-freebsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-linux \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -maix-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -msvr4-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-netbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple 

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:1547
 
   // Otherwise, if the type contains an SSE vector type, the alignment is 16.
+  if (Align >= 16 && (isSIMDVectorType(getContext(), Ty) ||

Xiangling_L wrote:
> Also update the comment?
I think the comment is fine. It's still SSE vector type even if we changed the 
query to SIMD. SSE is for x86 and altivec is for Power, but they are both SIMD 
vectors.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4684
 return false;
   case CodeGenOptions::SRCK_InRegs: // -msvr4-struct-return
 return true;

Xiangling_L wrote:
> I noticed that in patch https://reviews.llvm.org/D76360, Zarko added a check 
> to emit an error for using this option within cc1. But in your patch, this 
> option only emit error when invoked by the driver. Does that mean we are 
> pretty sure this option is doing what we want on AIX?
Are you able to set this CodeGen option when it is disabled in the 
Frontend/CompilerInvocation.cpp?


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[PATCH] D79719: [AIX] Implement AIX special alignment rule about double/long double

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/include/clang/AST/RecordLayout.h:74
+  /// The maximum allowed field alignment. This is set by #pragma pack.
+  CharUnits MaxFieldAlignment;
+

efriedma wrote:
> If we have to keep around extra data anyway, probably better to add a field 
> for the preferred alignment, so we can keep the preferred alignment handling 
> together.
We could get the MaxFieldAlignment in the same way 
ItaniumRecordLayoutBuilder::InitializeLayout get. Do we need to keep an extra 
data?


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

[Jason Liu via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG7f5d91d3ffed: [clang][AIX] Implement ABIInfo and 
TargetCodeGenInfo for AIX (authored by jasonliu).

Changed prior to commit:
  https://reviews.llvm.org/D79035?vs=263864=264922#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79035/new/

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Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc32-struct-return.c
  clang/test/CodeGen/ppc64-dwarf.c
  clang/test/Frontend/aix-unsupported.c

Index: clang/test/Frontend/aix-unsupported.c
===
--- /dev/null
+++ clang/test/Frontend/aix-unsupported.c
@@ -0,0 +1,10 @@
+// REQUIRES: powerpc-registered-target
+// RUN: not %clang_cc1 -triple powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// CHECK: unsupported option
Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-dwarf.c
===
--- /dev/null
+++ clang/test/CodeGen/ppc32-dwarf.c
@@ -0,0 +1,126 @@
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC32
+static unsigned char dwarf_reg_size_table[1024];
+
+int test() {
+  __builtin_init_dwarf_reg_size_table(dwarf_reg_size_table);
+
+  return __builtin_dwarf_sp_column();
+}
+
+// CHECK-LABEL: define i32 @test()
+// CHECK: store i8 4, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i32 0, i32 0), align 1
+// CHECK-NEXT:store i8 4, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i32 0, i32 1), align 1
+// CHECK-NEXT: 

[PATCH] D79719: [AIX] Implement AIX special alignment rule about double/long double

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/lib/AST/ASTContext.cpp:2533
+  hasFloatingPointAsFirstMember(RD, MaxFieldAlignment))
+return std::max(ABIAlign, 
(unsigned)toBits(CharUnits::fromQuantity(8)));
+}

I guess another thing that worth considering is how we support "pragma 
align(nature)" in the future. It requires us to get a normal alignment for AIX 
which means double will be aligned 8 byte in the structure.
Right now, we always set the double to be aligned 4 byte in PPC.h, but it's not 
necessary the case if that pragma is in effect. How double should be aligned in 
a structure is really position dependent (is the structure comes after `pragma 
align(nature)` or `pragma align(power)`?)  I'm not very clear on how we would 
handle that with the current architect. 


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[PATCH] D88737: [AIX] Turn -fdata-sections on by default in Clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu updated this revision to Diff 296665.
jasonliu added a comment.

Change lld's forwarder function's signature to match LLVM style.


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Files:
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/aix-data-sections.c
  clang/tools/clang-fuzzer/handle-llvm/handle_llvm.cpp
  lld/COFF/LTO.cpp
  lld/Common/TargetOptionsCommandFlags.cpp
  lld/ELF/LTO.cpp
  lld/include/lld/Common/TargetOptionsCommandFlags.h
  lld/wasm/LTO.cpp
  llvm/include/llvm/ADT/Triple.h
  llvm/include/llvm/CodeGen/CommandFlags.h
  llvm/lib/CodeGen/CommandFlags.cpp
  llvm/test/CodeGen/PowerPC/aix-alias.ll
  llvm/test/CodeGen/PowerPC/aix-bytestring.ll
  llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
  llvm/test/CodeGen/PowerPC/aix-extern.ll
  llvm/test/CodeGen/PowerPC/aix-overflow-toc.py
  llvm/test/CodeGen/PowerPC/aix-readonly-with-relocation.ll
  llvm/test/CodeGen/PowerPC/aix-reference-func-addr-const.ll
  llvm/test/CodeGen/PowerPC/aix-return55.ll
  llvm/test/CodeGen/PowerPC/aix-weak.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-used.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-visibility.ll
  llvm/tools/gold/gold-plugin.cpp
  llvm/tools/llc/llc.cpp
  llvm/tools/lli/lli.cpp
  llvm/tools/llvm-isel-fuzzer/llvm-isel-fuzzer.cpp
  llvm/tools/llvm-lto/llvm-lto.cpp
  llvm/tools/llvm-lto2/llvm-lto2.cpp
  llvm/tools/llvm-opt-fuzzer/llvm-opt-fuzzer.cpp
  llvm/tools/lto/lto.cpp
  llvm/tools/opt/opt.cpp

Index: llvm/tools/opt/opt.cpp
===
--- llvm/tools/opt/opt.cpp
+++ llvm/tools/opt/opt.cpp
@@ -698,7 +698,8 @@
   Triple ModuleTriple(M->getTargetTriple());
   std::string CPUStr, FeaturesStr;
   TargetMachine *Machine = nullptr;
-  const TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  const TargetOptions Options =
+  codegen::InitTargetOptionsFromCodeGenFlags(ModuleTriple);
 
   if (ModuleTriple.getArch()) {
 CPUStr = codegen::getCPUStr();
Index: llvm/tools/lto/lto.cpp
===
--- llvm/tools/lto/lto.cpp
+++ llvm/tools/lto/lto.cpp
@@ -218,7 +218,8 @@
 
 lto_module_t lto_module_create(const char* path) {
   lto_initialize();
-  llvm::TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  llvm::TargetOptions Options =
+  codegen::InitTargetOptionsFromCodeGenFlags(Triple());
   ErrorOr> M =
   LTOModule::createFromFile(*LTOContext, StringRef(path), Options);
   if (!M)
@@ -228,7 +229,8 @@
 
 lto_module_t lto_module_create_from_fd(int fd, const char *path, size_t size) {
   lto_initialize();
-  llvm::TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  llvm::TargetOptions Options =
+  codegen::InitTargetOptionsFromCodeGenFlags(Triple());
   ErrorOr> M = LTOModule::createFromOpenFile(
   *LTOContext, fd, StringRef(path), size, Options);
   if (!M)
@@ -241,7 +243,8 @@
  size_t map_size,
  off_t offset) {
   lto_initialize();
-  llvm::TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  llvm::TargetOptions Options =
+  codegen::InitTargetOptionsFromCodeGenFlags(Triple());
   ErrorOr> M = LTOModule::createFromOpenFileSlice(
   *LTOContext, fd, StringRef(path), map_size, offset, Options);
   if (!M)
@@ -251,7 +254,8 @@
 
 lto_module_t lto_module_create_from_memory(const void* mem, size_t length) {
   lto_initialize();
-  llvm::TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  llvm::TargetOptions Options =
+  codegen::InitTargetOptionsFromCodeGenFlags(Triple());
   ErrorOr> M =
   LTOModule::createFromBuffer(*LTOContext, mem, length, Options);
   if (!M)
@@ -263,7 +267,8 @@
  size_t length,
  const char *path) {
   lto_initialize();
-  llvm::TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  llvm::TargetOptions Options =
+  codegen::InitTargetOptionsFromCodeGenFlags(Triple());
   ErrorOr> M = LTOModule::createFromBuffer(
   *LTOContext, mem, length, Options, StringRef(path));
   if (!M)
@@ -274,7 +279,8 @@
 lto_module_t lto_module_create_in_local_context(const void *mem, size_t length,
 const char *path) {
   lto_initialize();
-  llvm::TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  

[PATCH] D88737: [AIX] Turn -fdata-sections on by default in Clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu marked an inline comment as done.
jasonliu added inline comments.



Comment at: clang/test/Driver/aix-data-sections.c:7
+// RUN:   | FileCheck %s
+// CHECK: "-fdata-sections"

DiggerLin wrote:
> may be good to check the whether other OS platform behavior be changed or 
> not? 
I think there are existing lit tests checked other platform's behavior.

linux platform behavior is tested in clang/test/Driver/function-sections.c
cloudABI platform behavior is tested in clang/test/Driver/cloudabi.c
msvc behavior is tested in clang/test/Driver/cl-options.c



Comment at: lld/Common/TargetOptionsCommandFlags.cpp:17
+llvm::TargetOptions
+lld::initTargetOptionsFromCodeGenFlags(const llvm::Triple ) {
+  return llvm::codegen::InitTargetOptionsFromCodeGenFlags(TheTriple);

MaskRay wrote:
> Currently lld does not need Triple. Consider not changing the signature of 
> `initTargetOptionsFromCodeGenFlags`.
This function acts like a forwarder for 
llvm::codegen::InitTargetOptionsFromCodeGenFlags.
I think it still makes sense to change the signature in this case to minimize 
the different variation of the function, as those variations cause confusion to 
people. 
I will change the name to match the LLVM style.


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[PATCH] D88737: [AIX] Turn -fdata-sections on by default in Clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu updated this revision to Diff 296965.

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Files:
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/aix-data-sections.c
  clang/tools/clang-fuzzer/handle-llvm/handle_llvm.cpp
  lld/Common/TargetOptionsCommandFlags.cpp
  llvm/include/llvm/ADT/Triple.h
  llvm/include/llvm/CodeGen/CommandFlags.h
  llvm/lib/CodeGen/CommandFlags.cpp
  llvm/test/CodeGen/PowerPC/aix-alias.ll
  llvm/test/CodeGen/PowerPC/aix-bytestring.ll
  llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
  llvm/test/CodeGen/PowerPC/aix-extern.ll
  llvm/test/CodeGen/PowerPC/aix-overflow-toc.py
  llvm/test/CodeGen/PowerPC/aix-readonly-with-relocation.ll
  llvm/test/CodeGen/PowerPC/aix-reference-func-addr-const.ll
  llvm/test/CodeGen/PowerPC/aix-return55.ll
  llvm/test/CodeGen/PowerPC/aix-weak.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-used.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-visibility.ll
  llvm/tools/gold/gold-plugin.cpp
  llvm/tools/llc/llc.cpp
  llvm/tools/lli/lli.cpp
  llvm/tools/llvm-isel-fuzzer/llvm-isel-fuzzer.cpp
  llvm/tools/llvm-lto/llvm-lto.cpp
  llvm/tools/llvm-lto2/llvm-lto2.cpp
  llvm/tools/llvm-opt-fuzzer/llvm-opt-fuzzer.cpp
  llvm/tools/lto/lto.cpp
  llvm/tools/opt/opt.cpp

Index: llvm/tools/opt/opt.cpp
===
--- llvm/tools/opt/opt.cpp
+++ llvm/tools/opt/opt.cpp
@@ -698,7 +698,8 @@
   Triple ModuleTriple(M->getTargetTriple());
   std::string CPUStr, FeaturesStr;
   TargetMachine *Machine = nullptr;
-  const TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  const TargetOptions Options =
+  codegen::InitTargetOptionsFromCodeGenFlags(ModuleTriple);
 
   if (ModuleTriple.getArch()) {
 CPUStr = codegen::getCPUStr();
Index: llvm/tools/lto/lto.cpp
===
--- llvm/tools/lto/lto.cpp
+++ llvm/tools/lto/lto.cpp
@@ -218,7 +218,8 @@
 
 lto_module_t lto_module_create(const char* path) {
   lto_initialize();
-  llvm::TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  llvm::TargetOptions Options =
+  codegen::InitTargetOptionsFromCodeGenFlags(Triple());
   ErrorOr> M =
   LTOModule::createFromFile(*LTOContext, StringRef(path), Options);
   if (!M)
@@ -228,7 +229,8 @@
 
 lto_module_t lto_module_create_from_fd(int fd, const char *path, size_t size) {
   lto_initialize();
-  llvm::TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  llvm::TargetOptions Options =
+  codegen::InitTargetOptionsFromCodeGenFlags(Triple());
   ErrorOr> M = LTOModule::createFromOpenFile(
   *LTOContext, fd, StringRef(path), size, Options);
   if (!M)
@@ -241,7 +243,8 @@
  size_t map_size,
  off_t offset) {
   lto_initialize();
-  llvm::TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  llvm::TargetOptions Options =
+  codegen::InitTargetOptionsFromCodeGenFlags(Triple());
   ErrorOr> M = LTOModule::createFromOpenFileSlice(
   *LTOContext, fd, StringRef(path), map_size, offset, Options);
   if (!M)
@@ -251,7 +254,8 @@
 
 lto_module_t lto_module_create_from_memory(const void* mem, size_t length) {
   lto_initialize();
-  llvm::TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  llvm::TargetOptions Options =
+  codegen::InitTargetOptionsFromCodeGenFlags(Triple());
   ErrorOr> M =
   LTOModule::createFromBuffer(*LTOContext, mem, length, Options);
   if (!M)
@@ -263,7 +267,8 @@
  size_t length,
  const char *path) {
   lto_initialize();
-  llvm::TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  llvm::TargetOptions Options =
+  codegen::InitTargetOptionsFromCodeGenFlags(Triple());
   ErrorOr> M = LTOModule::createFromBuffer(
   *LTOContext, mem, length, Options, StringRef(path));
   if (!M)
@@ -274,7 +279,8 @@
 lto_module_t lto_module_create_in_local_context(const void *mem, size_t length,
 const char *path) {
   lto_initialize();
-  llvm::TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  llvm::TargetOptions Options =
+  codegen::InitTargetOptionsFromCodeGenFlags(Triple());
 
   // Create a local context. Ownership will be transferred to LTOModule.
   std::unique_ptr Context = std::make_unique();

[PATCH] D87451: add new option -mignore-xcoff-visibility

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: llvm/include/llvm/Target/TargetOptions.h:126
   FunctionSections(false), DataSections(false),
-  UniqueSectionNames(true), UniqueBasicBlockSectionNames(false),
-  TrapUnreachable(false), NoTrapAfterNoreturn(false), TLSSize(0),
-  EmulatedTLS(false), ExplicitEmulatedTLS(false), EnableIPRA(false),
+  IgnoreXCOFFVisibility(false), UniqueSectionNames(true),
+  UniqueBasicBlockSectionNames(false), TrapUnreachable(false),

Should the default be true for this option?
As this is an XCOFF only option, and the default for clang is true, so it would 
be better for llc to match as well?


Repository:
  rG LLVM Github Monorepo

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[PATCH] D87702: [Frontend] Add pragma align natural and sort out pragma pack stack effect

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/include/clang/Basic/LangOptions.def:340
 
+LANGOPT(AIXPragmaPack, 1, 0, "AIX #pragma pack handling")
+

Not sure if AIXPragmaPack is the best name here. 
It's more like IBM xl pragma pack handling on AIX.
Would it be better if we name it `XLPragmaPackOnAIX`?



Comment at: clang/include/clang/Sema/Sema.h:493
+  PackNumber(M == Packed ? 1
+ : (M == Mac68k ? Mac68kAlignmentSentinel
+: UninitPackVal)),

I think one of the idea is to use `enum Mode::Mac68k` to replace the need of 
Mac68kAlignmentSentinel.
Is there any reason that you would still need PackNumber to contain 
`Mac68kAlignmentSentinel`?



Comment at: clang/include/clang/Sema/Sema.h:497
+
+AlignPackInfo() : AlignPackInfo(Native, false) {}
+

We could have a empty stack on AIX that returns false when it was asked if it's 
an AIX stack?
It's a bit confusing here. 



Comment at: clang/include/clang/Sema/Sema.h:637
   PragmaStack VtorDispStack;
-  // #pragma pack.
-  // Sentinel to represent when the stack is set to mac68k alignment.
-  static const unsigned kMac68kAlignmentSentinel = ~0U;
-  PragmaStack PackStack;
+  PragmaStack PackStack;
   // The current #pragma pack values and locations at each #include.

We should consider renaming PackStack to AlignPackStack across Clang. Maybe 
even as a NFC first. As it is right now, clang already uses one stack to record 
those two informations from `Pragma align` and `Pragma pack`. Leave it as 
PackStack is too confusing, and people could actually ignore the pragma Align 
when developing with PackStack. 



Comment at: clang/include/clang/Sema/Sema.h:488
+AlignPackInfo(AlignPackInfo::Mode M, int Num, bool IsAIX)
+: PackAttr(true), AlignMode(M), PackNumber(Num), AIXStack(IsAIX) {}
+

Xiangling_L wrote:
> jasonliu wrote:
> > I noticed PackNumber is an unsigned char and we are passing an int type 
> > into it.
> > Could we add an assertion in the constructor to make sure Num would never 
> > be something that's going to get truncated when it converts to an unsigned 
> > char?
> I think the warning/error `expected #pragma pack parameter to be '1', '2', 
> '4', '8', or '16'` have already guaranteed that for us? Or maybe using 
> `unsigned int` makes people more comfortable?
Using a char instead of an int could make this class more compact, especially 
when we actually don't need to represent a big range. 
I understand there is a warning/error somewhere to prevent out of range from 
happening. But an assert here would make sure that no one could pass in an 
unexpected value into here by accident when developing. 



Comment at: clang/include/clang/Sema/Sema.h:515
+bool operator==(AlignPackInfo Info) const {
+  return AlignMode == Info.AlignMode && PackNumber == Info.PackNumber;
+}

Xiangling_L wrote:
> jasonliu wrote:
> > This could return true when `PackAttr` in AlignPackInfo are not the same. 
> > Wouldn't that cause an issue?
> (1) You mean we have two `AlignPackInfo` with same AlignMode and PackNumber, 
> but one is PackAttr and the other one is AlignAttr?
> The example I can think of is:
> 
> 
> ```
> a)#pragma align(packed)
>   #pragma pack(1)   //AlignMode = Packed, PackNumber = 1
> 
> b) #pragma align(packed)  //AlignMode = Packed, PackNumber = 1
> ```
> 
> But I don't think we have any issue in this case. Before and after my patch, 
> a == b.
> Please let me know any other cases concerning you if any.
> 
> (2) However, your concerns leads me to think of another case, where behavior 
> changes with my patch.
> 
> ```
> a) 
> #pragma align(natural)
> #pragma pack(1)   /AlignMode = Native,  PackNumber = 1
> 
> b)
> #pragma align(packed) ///AlignMode = Packed, PackNumber = 1
> 
> ```
> Without this patch, a == b for other targets.
> And I suppose a != b for AIX.
> 
In your first example, if I understand correctly,
a) would return true for IsPackAttr()
b) would return false for IsPackAttr()
and yet a == b ?
I think that's confusing. 

Any reason why you don't want to just compare all the data members to make sure 
they are all equal?



Comment at: clang/lib/Sema/SemaAttr.cpp:367
+  // AIX pragma pack does not support identifier syntax.
+  if (getLangOpts().AIXPragmaPack && !SlotLabel.empty()) {
+Diag(PragmaLoc, diag::warn_pragma_pack_identifer_not_supported);

Although IBM xl compiler does not support this form, do we see a harm for us to 
support this form in clang on AIX?
Also, if this is indeed not desired to support, we could move this check to the 
top of this function for an early return. 



Comment at: clang/lib/Sema/SemaAttr.cpp:403
   // Warn about modified alignment after #includes.
   if 

[PATCH] D88737: [AIX] Turn -fdata-sections on by default in Clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: lld/Common/TargetOptionsCommandFlags.cpp:17
+llvm::TargetOptions
+lld::initTargetOptionsFromCodeGenFlags(const llvm::Triple ) {
+  return llvm::codegen::InitTargetOptionsFromCodeGenFlags(TheTriple);

MaskRay wrote:
> jasonliu wrote:
> > MaskRay wrote:
> > > Currently lld does not need Triple. Consider not changing the signature 
> > > of `initTargetOptionsFromCodeGenFlags`.
> > This function acts like a forwarder for 
> > llvm::codegen::InitTargetOptionsFromCodeGenFlags.
> > I think it still makes sense to change the signature in this case to 
> > minimize the different variation of the function, as those variations cause 
> > confusion to people. 
> > I will change the name to match the LLVM style.
> If you want to change `InitTargetOptionsFromCodeGenFlags` in an incompatible 
> way, you can by the way rename it to `initTarget*`.
> 
> lld functions should always stick with the `camelCase` rule. If there is no 
> meaningful triple, I'd prefer leave out the parameter.
Sorry, didn't realize lld has this `camelCase` rule. 
I don't have a better naming for it, so I will just leave the function 
signature untouched. 


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[PATCH] D88737: [AIX] Turn -fdata-sections on by default in Clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/include/clang/Basic/CodeGenOptions.def:47
+CODEGENOPT(DataSections  , 1, 0) ///< Set by default, or when 
-f[no-]data-sections.
+CODEGENOPT(HasExplicitDataSections, 1, 0) ///< Set when -f[no-]data-sections 
is set.
 CODEGENOPT(UniqueSectionNames, 1, 1) ///< Set for -funique-section-names.

MaskRay wrote:
> From the current code. I don't see HasExplicitDataSections is necessary. 
> Please remove the lld changes.
The reason I need `HasExplicitDataSections` goes back to D88493(which I haven't 
land yet, because I actually need to land these two patches together to avoid 
build break). In D88493, I'm trying to get the llc's default for -data-sections 
to be correct for AIX and introduced `HasExplicitDataSections`. If 
`HasExplicitDataSections` is not set, then llc would think there is 
-data-sections set, so it would just take the target triple's default, which 
makes `DataSections` setting to be useless. 
It seems there is no good way to set a certain TargetOption's default to be 
dependant on the current target triple. As I already mentioned in my own 
comment in this patch, one of the way to achieve that could be make 
DataSections an enum option in TargetOptions, so that it could have a `Default` 
enum which could mean true or false depending on the triple setting. But it 
could mean a bigger refactoring to this option. 


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[PATCH] D88737: [AIX] Turn -fdata-sections on by default in Clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu created this revision.
jasonliu added reviewers: hubert.reinterpretcast, daltenty, sfertile, 
Xiangling_L, DiggerLin.
Herald added subscribers: dang, dexonsmith, steven_wu, hiraditya, arichardson, 
sbc100, emaste.
Herald added a reviewer: espindola.
Herald added a reviewer: MaskRay.
jasonliu requested review of this revision.
Herald added a subscriber: aheejin.

This is the follow up on D88493  where we 
flipped the default for llc on AIX.
We would also want to flip the default for Clang as well.


https://reviews.llvm.org/D88737

Files:
  clang/include/clang/Basic/CodeGenOptions.def
  clang/include/clang/Driver/Options.td
  clang/lib/CodeGen/BackendUtil.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/test/Driver/function-sections.c
  lld/COFF/LTO.cpp
  lld/ELF/LTO.cpp
  lld/wasm/LTO.cpp

Index: lld/wasm/LTO.cpp
===
--- lld/wasm/LTO.cpp
+++ lld/wasm/LTO.cpp
@@ -45,6 +45,7 @@
 
   // Always emit a section per function/data with LTO.
   c.Options.FunctionSections = true;
+  c.Options.HasExplicitDataSections = true;
   c.Options.DataSections = true;
 
   c.DisableVerify = config->disableVerify;
Index: lld/ELF/LTO.cpp
===
--- lld/ELF/LTO.cpp
+++ lld/ELF/LTO.cpp
@@ -86,6 +86,7 @@
 
   // Always emit a section per function/datum with LTO.
   c.Options.FunctionSections = true;
+  c.Options.HasExplicitDataSections = true;
   c.Options.DataSections = true;
 
   // Check if basic block sections must be used.
Index: lld/COFF/LTO.cpp
===
--- lld/COFF/LTO.cpp
+++ lld/COFF/LTO.cpp
@@ -66,6 +66,7 @@
   // Always emit a section per function/datum with LTO. LLVM LTO should get most
   // of the benefit of linker GC, but there are still opportunities for ICF.
   c.Options.FunctionSections = true;
+  c.Options.HasExplicitDataSections = true;
   c.Options.DataSections = true;
 
   // Use static reloc model on 32-bit x86 because it usually results in more
Index: clang/test/Driver/function-sections.c
===
--- clang/test/Driver/function-sections.c
+++ clang/test/Driver/function-sections.c
@@ -3,13 +3,15 @@
 // CHECK-FS: -ffunction-sections
 // CHECK-NOFS-NOT: -ffunction-sections
 // CHECK-DS: -fdata-sections
-// CHECK-NODS-NOT: -fdata-sections
+// CHECK-NODS: -fno-data-sections
+// CHECK-DS-DEFAULT-NOT: -fdata-sections
+// CHECK-DS-DEFAULT-NOT: -fno-data-sections
 // CHECK-US-NOT: -fno-unique-section-names
 // CHECK-NOUS: -fno-unique-section-names
 
 // RUN: %clang -no-canonical-prefixes %s -### -fsyntax-only 2>&1   \
 // RUN: -target i386-unknown-linux \
-// RUN:   | FileCheck --check-prefix=CHECK-NOFS --check-prefix=CHECK-NODS %s
+// RUN:   | FileCheck --check-prefix=CHECK-NOFS --check-prefix=CHECK-DS-DEFAULT %s
 
 // RUN: %clang -no-canonical-prefixes %s -### -fsyntax-only 2>&1   \
 // RUN: -target i386-unknown-linux \
Index: clang/lib/Frontend/CompilerInvocation.cpp
===
--- clang/lib/Frontend/CompilerInvocation.cpp
+++ clang/lib/Frontend/CompilerInvocation.cpp
@@ -991,6 +991,13 @@
   Args.hasArg(OPT_ffunction_sections) ||
   (Opts.BBSections != "none" && Opts.BBSections != "labels");
 
+  if (Args.getLastArg(OPT_fdata_sections) ||
+  Args.getLastArg(OPT_fno_data_sections)) {
+Opts.HasExplicitDataSections = true;
+Opts.DataSections =
+Args.hasFlag(OPT_fdata_sections, OPT_fno_data_sections, false);
+  }
+
   Opts.DataSections = Args.hasArg(OPT_fdata_sections);
   Opts.StackSizeSection = Args.hasArg(OPT_fstack_size_section);
   Opts.UniqueSectionNames = !Args.hasArg(OPT_fno_unique_section_names);
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -4906,8 +4906,13 @@
 }
   }
 
-  if (Args.hasFlag(options::OPT_fdata_sections, options::OPT_fno_data_sections,
-   UseSeparateSections)) {
+  if (Arg *A = Args.getLastArg(options::OPT_fdata_sections,
+   options::OPT_fno_data_sections)) {
+if (A->getOption().matches(options::OPT_fdata_sections))
+  CmdArgs.push_back("-fdata-sections");
+else
+  CmdArgs.push_back("-fno-data-sections");
+  } else if (UseSeparateSections) {
 CmdArgs.push_back("-fdata-sections");
   }
 
Index: clang/lib/CodeGen/BackendUtil.cpp
===
--- clang/lib/CodeGen/BackendUtil.cpp
+++ clang/lib/CodeGen/BackendUtil.cpp
@@ -517,6 +517,7 @@
   Options.EnableMachineFunctionSplitter = CodeGenOpts.SplitMachineFunctions;
   Options.FunctionSections = CodeGenOpts.FunctionSections;
   Options.DataSections = 

[PATCH] D88737: [AIX] Turn -fdata-sections on by default in Clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu added a comment.

Not sure if there is a better way to do this. But I have to admit this approach 
along with D88493  is a bit fragile. 
If plug-in writer forgets to set `HasExplicitDataSections` to true, then the 
final result that TargetMachine give for `getDataSections()` could be false on 
most platform even when they deliberately set `DataSections` to true.
We have other targets in LLVM that have -fdata-sections by default as well. And 
they do it differently as well, which makes this a bit more complicate to be 
consistent. 
For example, cloudABI would pass -fdata-sections through the Clang Driver by 
default. But that approach means if some user just invoke llc directly, they 
could get the wrong default on llc for that platform. 
Wasm would just overwrite the `DataSections` option to true in their 
TargetMachine. But that means you could not set it to false even if you want to.
I've thought about making the `DataSections` option in TargetOptions an enum 
instead of boolean value, where you could have `Default`, `On` and `Off` to 
represent what we actually want for the options. That's not a trivial change, 
as a lot of consumers for TargetOptions are relying it to be a boolean.
If you think it's a better way to solve this problem and I should explore, let 
me know.


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[PATCH] D88737: [AIX] Turn -fdata-sections on by default in Clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu added a comment.

In D88737#2321921 , @MaskRay wrote:

> A less intrusive approach is to not touch the existing 
> InitTargetOptionsFromCodeGenFlags without parameters. You can add an 
> `initTargetOptionsFromCodeGenFlags` with `const Tripe &` as its parameter.

I thought about that. But would prefer people think about whether or not a 
proper Triple is actually needed in that scenario before they make a call to 
`InitTargetOptionsFromCodeGenFlags`. 
Have an `InitTargetOptionsFromCodeGenFlags` without parameter, or has Triple() 
as default parameter could potentially results in people choose the wrong one 
to call because it's just more convenient.


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[PATCH] D88737: [AIX] Turn -fdata-sections on by default in Clang

[Jason Liu via Phabricator via cfe-commits]

jasonliu added a comment.

Hi Fangrui(@MaskRay), are you okay with this patch to land as is?


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[PATCH] D88737: [AIX] Turn -fdata-sections on by default in Clang

[Jason Liu via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGf85bcc21ddad: [AIX] Turn -fdata-sections on by default in 
Clang (authored by jasonliu).
Herald added a project: clang.

Changed prior to commit:
  https://reviews.llvm.org/D88737?vs=296965=298160#toc

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Files:
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/aix-data-sections.c
  clang/tools/clang-fuzzer/handle-llvm/handle_llvm.cpp
  lld/Common/TargetOptionsCommandFlags.cpp
  llvm/include/llvm/ADT/Triple.h
  llvm/include/llvm/CodeGen/CommandFlags.h
  llvm/lib/CodeGen/CommandFlags.cpp
  llvm/test/CodeGen/PowerPC/aix-alias.ll
  llvm/test/CodeGen/PowerPC/aix-bytestring.ll
  llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
  llvm/test/CodeGen/PowerPC/aix-extern.ll
  llvm/test/CodeGen/PowerPC/aix-ignore-xcoff-visibility.ll
  llvm/test/CodeGen/PowerPC/aix-overflow-toc.py
  llvm/test/CodeGen/PowerPC/aix-readonly-with-relocation.ll
  llvm/test/CodeGen/PowerPC/aix-reference-func-addr-const.ll
  llvm/test/CodeGen/PowerPC/aix-return55.ll
  llvm/test/CodeGen/PowerPC/aix-weak.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-used.ll
  llvm/test/CodeGen/PowerPC/aix-xcoff-visibility.ll
  llvm/tools/gold/gold-plugin.cpp
  llvm/tools/llc/llc.cpp
  llvm/tools/lli/lli.cpp
  llvm/tools/llvm-isel-fuzzer/llvm-isel-fuzzer.cpp
  llvm/tools/llvm-lto/llvm-lto.cpp
  llvm/tools/llvm-lto2/llvm-lto2.cpp
  llvm/tools/llvm-opt-fuzzer/llvm-opt-fuzzer.cpp
  llvm/tools/lto/lto.cpp
  llvm/tools/opt/opt.cpp

Index: llvm/tools/opt/opt.cpp
===
--- llvm/tools/opt/opt.cpp
+++ llvm/tools/opt/opt.cpp
@@ -698,7 +698,8 @@
   Triple ModuleTriple(M->getTargetTriple());
   std::string CPUStr, FeaturesStr;
   TargetMachine *Machine = nullptr;
-  const TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  const TargetOptions Options =
+  codegen::InitTargetOptionsFromCodeGenFlags(ModuleTriple);
 
   if (ModuleTriple.getArch()) {
 CPUStr = codegen::getCPUStr();
Index: llvm/tools/lto/lto.cpp
===
--- llvm/tools/lto/lto.cpp
+++ llvm/tools/lto/lto.cpp
@@ -218,7 +218,8 @@
 
 lto_module_t lto_module_create(const char* path) {
   lto_initialize();
-  llvm::TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  llvm::TargetOptions Options =
+  codegen::InitTargetOptionsFromCodeGenFlags(Triple());
   ErrorOr> M =
   LTOModule::createFromFile(*LTOContext, StringRef(path), Options);
   if (!M)
@@ -228,7 +229,8 @@
 
 lto_module_t lto_module_create_from_fd(int fd, const char *path, size_t size) {
   lto_initialize();
-  llvm::TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  llvm::TargetOptions Options =
+  codegen::InitTargetOptionsFromCodeGenFlags(Triple());
   ErrorOr> M = LTOModule::createFromOpenFile(
   *LTOContext, fd, StringRef(path), size, Options);
   if (!M)
@@ -241,7 +243,8 @@
  size_t map_size,
  off_t offset) {
   lto_initialize();
-  llvm::TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  llvm::TargetOptions Options =
+  codegen::InitTargetOptionsFromCodeGenFlags(Triple());
   ErrorOr> M = LTOModule::createFromOpenFileSlice(
   *LTOContext, fd, StringRef(path), map_size, offset, Options);
   if (!M)
@@ -251,7 +254,8 @@
 
 lto_module_t lto_module_create_from_memory(const void* mem, size_t length) {
   lto_initialize();
-  llvm::TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  llvm::TargetOptions Options =
+  codegen::InitTargetOptionsFromCodeGenFlags(Triple());
   ErrorOr> M =
   LTOModule::createFromBuffer(*LTOContext, mem, length, Options);
   if (!M)
@@ -263,7 +267,8 @@
  size_t length,
  const char *path) {
   lto_initialize();
-  llvm::TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags();
+  llvm::TargetOptions Options =
+  codegen::InitTargetOptionsFromCodeGenFlags(Triple());
   ErrorOr> M = LTOModule::createFromBuffer(
   *LTOContext, mem, length, Options, StringRef(path));
   if (!M)
@@ -274,7 +279,8 @@
 lto_module_t lto_module_create_in_local_context(const void *mem, size_t length,
 

[PATCH] D88260: [NFC][FE] Replace TypeSize with StorageUnitSize

[Jason Liu via Phabricator via cfe-commits]

jasonliu accepted this revision.
jasonliu added a comment.
This revision is now accepted and ready to land.

LGTM.




Comment at: clang/lib/AST/RecordLayoutBuilder.cpp:1749-1750
 
-// Otherwise, allocate just the number of bytes required to store
-// the bitfield.
+  // Otherwise, allocate just the number of bytes required to store
+  // the bitfield.
 } else {

nit: drive-by fix? 
I think we should move this block of comments into the else block.



Comment at: clang/lib/AST/RecordLayoutBuilder.cpp:1768-1770
+// Otherwise, bump the data size up to include the bitfield,
+// including padding up to char alignment, and then remember how
+// bits we didn't use.

nit: same as the above driver-by fix.


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[PATCH] D87451: add new clang option -mno-xcoff-visibility

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: clang/docs/ClangCommandLineReference.rst:2310
 
+.. option:: -mno-xcoff-visibility
+

It's rare to see an option with only the negative form. Could we rename and 
make it a positive form somehow?
Also we would need to move this option to where the m group belongs. 




Comment at: clang/test/CodeGen/aix-no-xcoff-visibility.cpp:1
+// RUN: %clang -target powerpc-unknown-aix -emit-llvm -o - -S  %s  |\
+// RUN:   FileCheck --check-prefix=VISIBILITY-IR %s

I don't think we should call the driver directly in here. 
We should have a separate driver test where we invoke `clang`, and we should 
invoke the front end `clang_cc1` here.



Comment at: clang/test/CodeGen/aix-no-xcoff-visibility.cpp:75
+
+// VISIBILITY-IR:@b = protected global i32 0
+// VISIBILITY-IR:@pramb = hidden global i32 0

Not sure if the IR check is really necessary, since we haven't made any IR 
change here. It's going to be all the same with or without the new -m option. 


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[PATCH] D87451: add new clang option -mno-xcoff-visibility

[Jason Liu via Phabricator via cfe-commits]

jasonliu added inline comments.



Comment at: llvm/include/llvm/Target/TargetMachine.h:265
+  /// corresponding to -mno-xcoff-visibility.
+  bool getNoXCOFFVisibility() const { return Options.NoXCOFFVisibility; }
+

DiggerLin wrote:
> daltenty wrote:
> > This seems like it needs the corresponding comand-line option for llc added 
> > and an llc test.
> I think it will be in another separate  patch.
I would actually prefer to have that in the same patch, as that would give us a 
full picture. It's not a huge patch even if we combine them. 


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[PATCH] D87029: [AIX] Implement AIX special bitfield related alignment rules

[Jason Liu via Phabricator via cfe-commits]

jasonliu added a comment.

I think it would help the review if we could put the NFC portion(e.g. TypeSize 
-> StorageUnitSize) to a new patch, and give some rationale about the NFC 
change.




Comment at: clang/lib/AST/RecordLayoutBuilder.cpp:624
   /// a byte, but larger units are used if IsMsStruct.
   unsigned char UnfilledBitsInLastUnit;
+  /// LastBitfieldStorageUnitSize - If IsMsStruct, represents the size of the




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[PATCH] D87904: [AIX][Clang][Driver] Add handling of nostartfiles option

[Jason Liu via Phabricator via cfe-commits]

jasonliu accepted this revision.
jasonliu added a comment.
This revision is now accepted and ready to land.

LGTM.


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