[incubator-nuttx] branch master updated: arch/stm32f7: Fix nxstyle errors
This is an automated email from the ASF dual-hosted git repository. jerpelea pushed a commit to branch master in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git The following commit(s) were added to refs/heads/master by this push: new 13816de arch/stm32f7: Fix nxstyle errors 13816de is described below commit 13816de7ac78af4c0e8eccdcfe3f7647adc0b0b6 Author: Nathan Hartman <59230071+hartmannat...@users.noreply.github.com> AuthorDate: Mon Mar 15 09:46:27 2021 -0400 arch/stm32f7: Fix nxstyle errors arch/arm/include/stm32f7/chip.h: arch/arm/include/stm32f7/irq.h: arch/arm/include/stm32f7/stm32f72xx73xx_irq.h: arch/arm/include/stm32f7/stm32f74xx75xx_irq.h: arch/arm/include/stm32f7/stm32f76xx77xx_irq.h: * Fix nxstyle errors. --- arch/arm/include/stm32f7/chip.h | 16 +- arch/arm/include/stm32f7/irq.h| 40 ++-- arch/arm/include/stm32f7/stm32f72xx73xx_irq.h | 46 ++--- arch/arm/include/stm32f7/stm32f74xx75xx_irq.h | 40 ++-- arch/arm/include/stm32f7/stm32f76xx77xx_irq.h | 258 +- 5 files changed, 210 insertions(+), 190 deletions(-) diff --git a/arch/arm/include/stm32f7/chip.h b/arch/arm/include/stm32f7/chip.h index 1a31384..a77dae3 100644 --- a/arch/arm/include/stm32f7/chip.h +++ b/arch/arm/include/stm32f7/chip.h @@ -1,4 +1,4 @@ -/ +/ * arch/arm/include/stm32f7/chip.h * * Copyright (C) 2015-2017 Gregory Nutt. All rights reserved. @@ -33,20 +33,21 @@ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * - / + / #ifndef __ARCH_ARM_INCLUDE_STM32F7_CHIP_H #define __ARCH_ARM_INCLUDE_STM32F7_CHIP_H -/ +/ * Included Files - / + / #include -/ +/ * Pre-processor Definitions - / + / + /* STM32F722xx, STM32F723xx, * STM32F745xx, STM32F746xx, STM32F756xx, STM32F765xx, STM32F767xx, STM32F768xx, * STM32F769xx, STM32F777xx and STM32F779xx Differences between family members: @@ -373,7 +374,8 @@ #define STM32F7_NDFSDM 0 /* No Digital filters */ #endif -/* NVIC priority levels */ +/* NVIC priority levels */ + /* 16 Programmable interrupt levels */ #define NVIC_SYSH_PRIORITY_MIN 0xf0 /* All bits set in minimum priority */ diff --git a/arch/arm/include/stm32f7/irq.h b/arch/arm/include/stm32f7/irq.h index eb4042d..2147d54 100644 --- a/arch/arm/include/stm32f7/irq.h +++ b/arch/arm/include/stm32f7/irq.h @@ -1,4 +1,4 @@ -/ +/ * arch/arm/include/stm32f7/irq.h * * Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved. @@ -32,7 +32,7 @@ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * - / + / /* This file should never be included directly but, rather, * only indirectly through nuttx/irq.h @@ -41,19 +41,19 @@ #ifndef __ARCH_ARM_INCLUDE_STM32F7_IRQ_H #define __ARCH_ARM_INCLUDE_STM32F7_IRQ_H -/ +/ * Included Files - / + / #include
[incubator-nuttx] branch master updated: arch/stm32f7: Fix nxstyle errors
This is an automated email from the ASF dual-hosted git repository. aguettouche pushed a commit to branch master in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git The following commit(s) were added to refs/heads/master by this push: new 75eb3e8 arch/stm32f7: Fix nxstyle errors 75eb3e8 is described below commit 75eb3e8ec200a78f1e9dbbe4ecd3c5e48c1fa73b Author: Nathan Hartman <59230071+hartmannat...@users.noreply.github.com> AuthorDate: Mon Mar 1 09:53:36 2021 -0500 arch/stm32f7: Fix nxstyle errors arch/arm/src/stm32f7/stm32_lowputc.c: * Fix nxstyle errors. --- arch/arm/src/stm32f7/stm32_lowputc.c | 24 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/arch/arm/src/stm32f7/stm32_lowputc.c b/arch/arm/src/stm32f7/stm32_lowputc.c index 013169d..2d83cbd 100644 --- a/arch/arm/src/stm32f7/stm32_lowputc.c +++ b/arch/arm/src/stm32f7/stm32_lowputc.c @@ -271,8 +271,9 @@ # undef USE_OVER8 - /* Calculate USART BAUD rate divider */ - /* Baud rate for standard USART (SPI mode included): + /* Calculate USART BAUD rate divider + * + * Baud rate for standard USART (SPI mode included): * * In case of oversampling by 16, the equation is: * baud= fCK / UARTDIV @@ -289,7 +290,9 @@ # define STM32_USARTDIV16 \ ((STM32_APBCLOCK + (STM32_CONSOLE_BAUD >> 1)) / STM32_CONSOLE_BAUD) - /* Use oversampling by 8 only if the divisor is small. But what is small? */ + /* Use oversampling by 8 only if the divisor is small. But what is + * small? + */ # if STM32_USARTDIV8 > 100 #define STM32_BRR_VALUE STM32_USARTDIV16 @@ -337,9 +340,11 @@ void arm_lowputc(char ch) #ifdef HAVE_CONSOLE /* Wait until the TX data register is empty */ - while ((getreg32(STM32_CONSOLE_BASE + STM32_USART_ISR_OFFSET) & USART_ISR_TXE) == 0); + while ((getreg32(STM32_CONSOLE_BASE + + STM32_USART_ISR_OFFSET) & USART_ISR_TXE) == 0); #ifdef STM32_CONSOLE_RS485_DIR - stm32_gpiowrite(STM32_CONSOLE_RS485_DIR, STM32_CONSOLE_RS485_DIR_POLARITY); + stm32_gpiowrite(STM32_CONSOLE_RS485_DIR, + STM32_CONSOLE_RS485_DIR_POLARITY); #endif /* Then send the character */ @@ -347,8 +352,10 @@ void arm_lowputc(char ch) putreg32((uint32_t)ch, STM32_CONSOLE_BASE + STM32_USART_TDR_OFFSET); #ifdef STM32_CONSOLE_RS485_DIR - while ((getreg32(STM32_CONSOLE_BASE + STM32_USART_ISR_OFFSET) & USART_ISR_TC) == 0); - stm32_gpiowrite(STM32_CONSOLE_RS485_DIR, !STM32_CONSOLE_RS485_DIR_POLARITY); + while ((getreg32(STM32_CONSOLE_BASE + + STM32_USART_ISR_OFFSET) & USART_ISR_TC) == 0); + stm32_gpiowrite(STM32_CONSOLE_RS485_DIR, + !STM32_CONSOLE_RS485_DIR_POLARITY); #endif #endif /* HAVE_CONSOLE */ @@ -391,7 +398,8 @@ void stm32_lowsetup(void) #ifdef STM32_CONSOLE_RS485_DIR stm32_configgpio(STM32_CONSOLE_RS485_DIR); - stm32_gpiowrite(STM32_CONSOLE_RS485_DIR, !STM32_CONSOLE_RS485_DIR_POLARITY); + stm32_gpiowrite(STM32_CONSOLE_RS485_DIR, + !STM32_CONSOLE_RS485_DIR_POLARITY); #endif /* Enable and configure the selected console device */
[incubator-nuttx] branch master updated: arch/stm32f7: Fix nxstyle errors
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
The following commit(s) were added to refs/heads/master by this push:
new c90fffc arch/stm32f7: Fix nxstyle errors
c90fffc is described below
commit c90fffcc0963e94df459bbf5b2ff9e119f684928
Author: Nathan Hartman <59230071+hartmannat...@users.noreply.github.com>
AuthorDate: Mon Feb 22 14:58:38 2021 -0500
arch/stm32f7: Fix nxstyle errors
arch/arm/src/stm32f7/stm32_pwr.c,
arch/arm/src/stm32f7/stm32_pwr.h,
arch/arm/src/stm32f7/stm32_usbhost.h:
* Fix nxstyle errors.
---
arch/arm/src/stm32f7/stm32_pwr.c | 110 +++
arch/arm/src/stm32f7/stm32_pwr.h | 53 -
arch/arm/src/stm32f7/stm32_usbhost.h | 43 +++---
3 files changed, 109 insertions(+), 97 deletions(-)
diff --git a/arch/arm/src/stm32f7/stm32_pwr.c b/arch/arm/src/stm32f7/stm32_pwr.c
index 12de8bb..538fa53 100644
--- a/arch/arm/src/stm32f7/stm32_pwr.c
+++ b/arch/arm/src/stm32f7/stm32_pwr.c
@@ -1,4 +1,4 @@
-/
+/
* arch/arm/src/stm32f7/stm32_pwr.c
*
* Copyright (C) 2011 Uros Platise. All rights reserved.
@@ -34,11 +34,11 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
-
/
+ /
-/
+/
* Included Files
-
/
+ /
#include
#include
@@ -52,15 +52,15 @@
#if defined(CONFIG_STM32F7_PWR)
-/
+/
* Private Data
-
/
+ /
static uint16_t g_bkp_writable_counter = 0;
-/
+/
* Private Functions
-
/
+ /
static inline uint16_t stm32_pwr_getreg(uint8_t offset)
{
@@ -72,22 +72,25 @@ static inline void stm32_pwr_putreg(uint8_t offset,
uint16_t value)
putreg32((uint32_t)value, STM32_PWR_BASE + (uint32_t)offset);
}
-static inline void stm32_pwr_modifyreg(uint8_t offset, uint16_t clearbits,
uint16_t setbits)
+static inline void stm32_pwr_modifyreg(uint8_t offset, uint16_t clearbits,
+ uint16_t setbits)
{
- modifyreg32(STM32_PWR_BASE + (uint32_t)offset, (uint32_t)clearbits,
(uint32_t)setbits);
+ modifyreg32(STM32_PWR_BASE + (uint32_t)offset,
+ (uint32_t)clearbits,
+ (uint32_t)setbits);
}
-/
+/
* Public Functions
-
/
+ /
-/
+/
* Name: stm32_pwr_initbkp
*
* Description:
- * Insures the referenced count access to the backup domain (RTC registers,
- * RTC backup data registers and backup SRAM is consistent with the HW state
- * without relying on a variable.
+ * Insures the referenced count access to the backup domain (RTC
+ * registers, RTC backup data registers and backup SRAM is consistent with
+ * the HW state without relying on a variable.
*
* NOTE: This function should only be called by SoC Start up code.
*
@@ -97,7 +100,7 @@ static inline void stm32_pwr_modifyreg(uint8_t offset,
uint16_t clearbits, uint1
* Returned Value:
* None
*
-
/
+ /
void stm32_pwr_initbkp(bool writable)
{
@@ -115,16 +118,17 @@
