date:20150706

[coreboot] minnowboardmax coreboot intel uefi payload :Failed to find the required acpi table

2015-07-06 Thread DM365

Hello!
  I tested intel uefi payload instead of seabios in coreboot minnowboard 
max .
  It failed with Failed to find the required acpi table .
  If I use seabios payload ,the bios runs ok!
  I followed http://www.elinux.org/Minnowboard:MinnowMaxCoreboot; to build 
coreboot.
  I used https://firmware.intel.com/develop/; 
2014-WW26-UEFI.coreboot.Payload.zip to builed uefi in coreboot.
  The whole terminal log is :
   POST: 0x4a
POST: 0x4b
POST: 0x4c
POST: 0x4d
POST: 0x4e
POST: 0x4f
POST: 0x39
POST: 0x80
POST: 0x70
POST: 0x71
POST: 0x72
POST: 0x24
POST: 0x25
POST: 0x24
POST: 0x25
POST: 0x55
POST: 0x24
POST: 0x25
POST: 0x55
POST: 0x55
POST: 0x73
APIC: 00 missing read_resources
PCI: 00:00.0 missing set_resources
POST: 0x74
POST: 0x75
POST: 0x75
POST: 0x93
POST: 0x9b
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
Warning: PCI Device 2 does not have an IRQ entry, skipping it
POST: 0x75
POST: 0x75
POST: 0x76
POST: 0x77
find_current_mrc_cache_local: No valid fast boot cache found.
POST: 0x79
POST: 0x9c
POST: 0x9e
POST: 0x9d
POST: 0x7a
POST: 0x7b
POST: 0xf8
PROGRESS CODE: V03020003 I0
Loading PEIM at 0x080EC20 EntryPoint=0x080EE80 CbSupportPeim.efi
PROGRESS CODE: V03020002 I0
0.  - 0FFF [10]
1. 1000 - 0009 [01]
2. 000A - 000F [02]
3. 0010 - 7ACBCFFF [01]
4. 7ACBD000 - 7ADF [10]
5. 7AE0 - 7FFF [02]
6. E000 - EFFF [02]
7. FEB0 - FEC00FFF [02]
8. FED01000 - FED01FFF [02]
9. FED03000 - FED03FFF [02]
10. FED05000 - FED05FFF [02]
11. FED08000 - FED08FFF [02]
12. FED0C000 - FED0 [02]
13. FED1C000 - FED1CFFF [02]
14. FEE0 - FEE00FFF [02]
15. FEF0 - FEFF [02]
16. FF80 -  [02]
Low memory 0x7ACBD000, High Memory 0x0
LowMemorySize: 0x7ACBD000.
HighMemorySize: 0x0.
PeiMemBase: 0x76CB.
PeiMemSize: 0x400.
PeiInstallPeiMemory MemoryBegin 0x76CB, MemoryLength 0x400
Found one valid fv : 0x82.
Install PPI: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
Notify: PPI Guid: 49EDB1C1-BF21-4761-BB12-EB0031AABB39, Peim notify entry 
point: 801BC0
The 1th FV start address is 0x082, size is 0x003E, handle is 
0x82
Install PPI: 7408D748-FC8C-4EE6-9288-C4BEC092A410
Actual Coreboot header: 0x7ACBD000.
Failed to find the required acpi table


PEI_ASSERT!: d:\myworkspace\CorebootModulePkg\CbSupportPei\CbSupportPei.c 
(338): ((BOOLEAN)(0==1))-- 
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[coreboot] ACPI resource problem

2015-07-06 Thread WANG Siyuan

Hi,
I have a question about acpi resource.

My device need the resource:
Name(_CRS, ResourceTemplate() {
  IRQ(Edge, ActiveHigh, Exclusive) {3}
  Memory32Fixed(ReadWrite, 0xFEDC2000, 0x1000)
})
In Win8's device manager, I got error This device cannot find enough free
resources that it can use.

I reserve resource (0xFEDC2000 - 0xFEDC2FFF) using flag resource-flags =
IORESOURCE_MEM | IORESOURCE_RESERVE | IORESOURCE_FIXED | IORESOURCE_STORED
|  IORESOURCE_ASSIGNED; I still got this error.

I have 2 questions:
1) Do I need to reserve MMIO for (0xFEDC2000 - 0xFEDC2FFF)?
2) Do I need to do some thing for IRQ(Edge, ActiveHigh, Exclusive) {3}?

Any replay is appreciated!

Yours sincerely,
WANG Siyuan
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[coreboot] HEADS UP: Bug in automatic testing on gerrit/jenkins

2015-07-06 Thread Patrick Georgi

Hi all,

today I noticed that our test builders at http://qa.coreboot.org/
weren't actually testing the commits that are pending review on
http://review.coreboot.org/ as they were asked to, but (most of the
time) a commit from early-June.

We fixed the issue (Jenkins, the tool that orchestrates
qa.coreboot.org, dropped some configuration value during an update
that we needed to set again), but unfortunately some commits sneaked
in that broke the tree.

Fixes for these bugs are in, but when pushing changes for code review,
the builders may still report errors that are unrelated to your
change. See http://qa.coreboot.org/job/coreboot-gerrit/27371/ for an
example.

That's because the builders use exactly the commit you pushed, without
applying any new changes to it. If you run into that situation, please
rebase your commits to the current master, since (as of a couple of
minutes ago) it includes the bug fixes.

$ git pull
$ git rebase master $your_local_branch
$ git push (as usual)


Sorry for the inconvenience,
Patrick
-- 
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Registergericht und -nummer: Hamburg, HRB 86891, Sitz der Gesellschaft: Hamburg
Geschäftsführer: Graham Law, Christine Elizabeth Flores

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[coreboot] New on blogs.coreboot.org: [GSoC] EC/H8S firmware week #5

2015-07-06 Thread WordPress

A new post titled "[GSoC] EC/H8S firmware week #5" has been published on the coreboot blog. Find the full post at http://blogs.coreboot.org/blog/2015/07/06/gsoc-ech8s-firmware-week-5/

The T40 is flashing leds! The toolchain is still a little bit tricky. Im using the debian package gcc-h8300-hms, written a small linker script and took the startup assembly routine from Johann Gysins led radiator.
Now I can flash leds. But what about booting the board? I would say its enough to put

(!MAINOFF) = high
FAN ON = high
pulse high on (!PWRSW_H8)

But its not enough. Also the FAN isnt starting to rotate. Ill try to debug every pin this week and solder some debug pins for the 2nd EC (PMHx) to the my modified T40 as well as to an unmodified T42p. The H8S is talking to the PMHx via SPI, while the H8S is the master and is doing bit banging SPI in software, because it doesnt have a hardware unit for that. Ill also use these pins for testing my SPI implementation. Ill try to reuse an open source SPI implementation.
I also asked me if its a good idea to port coreboot for the T40 before continuing any efforts to the EC, but its a little bit harder, because the T40 uses a LPC/FWH flash in a TSOP40 case. Another option is changing the hardware to a board which is already supported by coreboot like a x60/t60 or x201. But its much more harder to access the 8 pins for flashing the EC on these boards.
Before switching to another board, the powersequencing must work and I need a robust recovery way, because when you kill the EC by flashing a new firmware, you dont get a second chance, unless you solder a lot. Chrome EC fix this problem by splitting the EC firmware into 2 parts. One read-only part and one read-writeable part. Only the second part gets updated and the read-only part can at least boots the device.
Before starting the H8S port for Chrome EC I want to have a bootloader. Because it would improve developing speed. I think implement this is much faster than doing the full Chrome EC support and most of the bootloader code can be re-used for Chrome EC.
Im also not perfectly sure Chrome EC is the best solution. Its special use-case is EC, which is perfect. But neither the documentation (I think there is more than one page) nor the bugtracker is public. Thus it makes difficult to use. Im also not sure if Chrome EC would apply my H8S port into their repository.

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[coreboot] minnowboardmax coreboot intel uefi payload :Failed to find the required acpi table

2015-07-06 Thread DM365

Hello!
  I tested intel uefi payload instead of seabios in coreboot minnowboard 
max .
  It failed with Failed to find the required acpi table .
  If I use seabios payload ,the bios runs ok!
  I followed http://www.elinux.org/Minnowboard:MinnowMaxCoreboot; to build 
coreboot.
  I used https://firmware.intel.com/develop/; 
2014-WW26-UEFI.coreboot.Payload.zip to builed uefi in coreboot.
  The whole terminal log is :
   POST: 0x4a
POST: 0x4b
POST: 0x4c
POST: 0x4d
POST: 0x4e
POST: 0x4f
POST: 0x39
POST: 0x80
POST: 0x70
POST: 0x71
POST: 0x72
POST: 0x24
POST: 0x25
POST: 0x24
POST: 0x25
POST: 0x55
POST: 0x24
POST: 0x25
POST: 0x55
POST: 0x55
POST: 0x73
APIC: 00 missing read_resources
PCI: 00:00.0 missing set_resources
POST: 0x74
POST: 0x75
POST: 0x75
POST: 0x93
POST: 0x9b
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
Warning: PCI Device 2 does not have an IRQ entry, skipping it
POST: 0x75
POST: 0x75
POST: 0x76
POST: 0x77
find_current_mrc_cache_local: No valid fast boot cache found.
POST: 0x79
POST: 0x9c
POST: 0x9e
POST: 0x9d
POST: 0x7a
POST: 0x7b
POST: 0xf8
PROGRESS CODE: V03020003 I0
Loading PEIM at 0x080EC20 EntryPoint=0x080EE80 CbSupportPeim.efi
PROGRESS CODE: V03020002 I0
0.  - 0FFF [10]
1. 1000 - 0009 [01]
2. 000A - 000F [02]
3. 0010 - 7ACBCFFF [01]
4. 7ACBD000 - 7ADF [10]
5. 7AE0 - 7FFF [02]
6. E000 - EFFF [02]
7. FEB0 - FEC00FFF [02]
8. FED01000 - FED01FFF [02]
9. FED03000 - FED03FFF [02]
10. FED05000 - FED05FFF [02]
11. FED08000 - FED08FFF [02]
12. FED0C000 - FED0 [02]
13. FED1C000 - FED1CFFF [02]
14. FEE0 - FEE00FFF [02]
15. FEF0 - FEFF [02]
16. FF80 -  [02]
Low memory 0x7ACBD000, High Memory 0x0
LowMemorySize: 0x7ACBD000.
HighMemorySize: 0x0.
PeiMemBase: 0x76CB.
PeiMemSize: 0x400.
PeiInstallPeiMemory MemoryBegin 0x76CB, MemoryLength 0x400
Found one valid fv : 0x82.
Install PPI: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
Notify: PPI Guid: 49EDB1C1-BF21-4761-BB12-EB0031AABB39, Peim notify entry 
point: 801BC0
The 1th FV start address is 0x082, size is 0x003E, handle is 
0x82
Install PPI: 7408D748-FC8C-4EE6-9288-C4BEC092A410
Actual Coreboot header: 0x7ACBD000.
Failed to find the required acpi table


PEI_ASSERT!: d:\myworkspace\CorebootModulePkg\CbSupportPei\CbSupportPei.c 
(338): ((BOOLEAN)(0==1))-- 
coreboot mailing list: coreboot@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] minnowboardmax coreboot intel uefi payload :Failed to find the required acpi table

[coreboot] ACPI resource problem

[coreboot] HEADS UP: Bug in automatic testing on gerrit/jenkins

[coreboot] New on blogs.coreboot.org: [GSoC] EC/H8S firmware week #5

[coreboot] minnowboardmax coreboot intel uefi payload :Failed to find the required acpi table

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