[dpdk-dev] Missing prefetch in non-vector rx function

[Arnon Warshavsky]

Hi All

Moving from dpdk 1.5 to 2.0 we observed a PPS performance degradation of
~30%.
After chasing this one for a while we found the problem:

A) Between the 2 versions rte_mbuf was increased in size from 1 to 2 cache
lines.
B) The standard (non-vector)  rx function does not perform a prefetch for
the 2nd cache line of the mbuf (I see this bug exists in 2.1 as well) and
it touches it setting the next pointer to NULL.
I tested it in ixgbe, but it looks like it exists in all drivers in the
*_rx_recv_pkts() and *_rx_recv_scattered_pkts() functions.
Once added the prefetch for the 2nd line, we were back in our previous
numbers.

I believe this one slipped under the radar as the vector mode is now the
default.
We stumbled into it because we work in non-vector mode due to a different
mempool bug in 2.0 which sometimes crashes the application upon port stop.

I have 2 questions
1)
Could anyone tell if the regression tests are comparing performance while
building DPDK with the default set of flags alone, or are multiple options
examined?

2)
How are issues like that being tracked and later associated to a patch?


Thanks
/Arnon





*Arnon Warshavsky*
*Qwilt | work: +972-72-2221634 | mobile: +972-50-8583058 | arnon at qwilt.com
*

[dpdk-dev] [PATCH] librte_vhost: eventfd_link: Update the makefile to build against an arbitrary kernel

[Thomas Monjalon]

2015-09-23 16:03, Aaron Conole:
> The vHost eventlink driver is a kernel module that requires a kernel
> source/build directory to build the ko. Convert the fixed kernel build
> directory specifier to one which may be user specified on the command-line.
> 
> Signed-off-by: Aaron Conole 

Applied, thanks

[dpdk-dev] [PATCH 4/4 v2] vhost: fix wrong usage of eventfd_t

[Yuanhan Liu]

Hi Thomas,

Would you consider to apply these 4 patches please? The 4th patch
affects quite many lines of code, and the sooner we apply it, the
fewer chance it will introduce conflicts for later patches.

Thanks.

--yliu

On Wed, Sep 09, 2015 at 05:44:51AM +, Xie, Huawei wrote:
> 
> Acked-by: Huawei Xie 
> 
> Thanks for fixing this.
> 
> On 9/9/2015 1:32 PM, Yuanhan Liu wrote:
> > According to eventfd man page:
> >
> > typedef uint64_t eventfd_t;
> >
> > int eventfd_read(int fd, eventfd_t *value);
> > int eventfd_write(int fd, eventfd_t value);
> >
> > eventfd_t is defined for the second arg(value), but not for fd.
> >
> > Here I redefine those fd fields to `int' type, which also removes
> > the redundant (int) cast. And as the man page stated, we should
> > cast 1 to eventfd_t type for eventfd_write().
> >
> > v2: cast 1 with `eventfd_t' type.
> >
> > Signed-off-by: Yuanhan Liu 
> > ---
> >  examples/vhost/main.c |  6 ++---
> >  lib/librte_vhost/rte_virtio_net.h |  4 ++--
> >  lib/librte_vhost/vhost_rxtx.c |  6 ++---
> >  lib/librte_vhost/vhost_user/virtio-net-user.c | 16 +++---
> >  lib/librte_vhost/virtio-net.c | 32 
> > +--
> >  5 files changed, 32 insertions(+), 32 deletions(-)
> >

[dpdk-dev] [PATCH] vhost: vhost injects interrupts to guest for each packet

[Thomas Monjalon]

Please reword the title (no need to re-send the patch),
so that you describe what the patch do (batch interrupt).

2015-09-21 16:16, Huawei Xie:
> In merge-able RX path, vhost injects interrupts to guest for each packet.
> This should degrade performance a lot.
> This patch fixes this issue by injecting one interrupt for a batch of 
> packets. 

[dpdk-dev] [PATCH] librte: Link status interrupt race condition, IGB E1000

[Tim Shearer]

I encountered an issue with DPDK 2.1.0  which occasionally causes the link 
status interrupt callback not to be called after the interface is started for 
the first time. I traced the problem back to the function 
eth_igb_link_update(), which is used to determine if the link has changed state 
since the previous time it was called. It appears that this function can be 
called simultaneously from two different threads:

(1) From the main application/configuration thread, via rte_eth_dev_start() - 
pointed to by (*dev->dev_ops->link_update)
(2) From the eal interrupt thread, via eth_igb_interrupt_action(), to check if 
the link state has transitioned up or down. The user callback is only executed 
if the link has changed state.

The race condition manifests itself as follows:
 - Main thread configures the interface with link status interrupt (LSI) 
enabled, sets up the queues etc.
 - Main thread calls rte_eth_dev_start. The interface is started and then we 
call eth_igb_link_update()
 - While in this call, the link goes up. Accordingly, we  detect the 
transition, and write the new link state (up) into the global rte_eth_dev struct
 - The interrupt fires, which also drops into the eth_igb_link_update function, 
finds that the global link status has already been set to up (no change)
 - Therefore, the handler thinks the interrupt was spurious, and the callback 
doesn't get called.

I suspect that rte_eth_dev_start shouldn't be checking the link state if 
interrupts are enabled. Would someone mind taking a quick look at the patch 
below?

Thanks!
Tim

--- a/lib/librte_ether/rte_ethdev.c
+++ b/lib/librte_ether/rte_ethdev.c
@@ -1300,7 +1300,7 @@ rte_eth_dev_start(uint8_t port_id)

rte_eth_dev_config_restore(port_id);

-   if (dev->data->dev_conf.intr_conf.lsc != 0) {
+   if (dev->data->dev_conf.intr_conf.lsc == 0) {
FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
(*dev->dev_ops->link_update)(dev, 0);
}

[dpdk-dev] [PATCH v3] doc: add performance test guide to the linux gsg

[Qian Xu]

Add a new guide doc as part of the Linux Getting Started Guide.

The document is a step-by-step guide on how to get high performance
with DPDK on an Intel platform.

It is designed for users who are not familiar with DPDK but would like
to get the best performance with NICs.

Signed-off-by: Qian Xu 
---

Changes in v3:
* Refined the svg file.
* Made the perf guide more general, not specific with Intel NICs.
* Update BIOS settings.
* Update rst file format.
* Put it into linux_gsg folder.

Changes in v2:
* Created a svg file.
* Add one part about how to check memory channels by dmidecode.
* Add the command about how to check PCIe slot's speed.
* Some doc updates according to the comments.

diff --git a/doc/guides/linux_gsg/build_dpdk.rst 
b/doc/guides/linux_gsg/build_dpdk.rst
index 2680e66..a7d2cda 100644
--- a/doc/guides/linux_gsg/build_dpdk.rst
+++ b/doc/guides/linux_gsg/build_dpdk.rst
@@ -28,6 +28,8 @@
 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+.. _linux_gsg_compiling_dpdk:
+
 Compiling the DPDK Target from Source
 =

diff --git a/doc/guides/linux_gsg/img/intel_perf_test_setup.svg 
b/doc/guides/linux_gsg/img/intel_perf_test_setup.svg
new file mode 100644
index 000..31c60a6
--- /dev/null
+++ b/doc/guides/linux_gsg/img/intel_perf_test_setup.svg
@@ -0,0 +1,507 @@
+
+
+
+http://purl.org/dc/elements/1.1/;
+   xmlns:cc="http://creativecommons.org/ns#;
+   xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#;
+   xmlns:svg="http://www.w3.org/2000/svg;
+   xmlns="http://www.w3.org/2000/svg;
+   xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd;
+   xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape;
+   width="750.94739"
+   height="466.69046"
+   id="svg2"
+   version="1.1"
+   inkscape:version="0.48.4 r9939"
+   sodipodi:docname="performance_test_setup.svg">
+  
+
+  
+
+
+  
+
+
+  
+
+
+  
+
+
+  
+
+
+  
+
+
+  
+
+  
+  
+  
+
+  
+image/svg+xml
+http://purl.org/dc/dcmitype/StillImage; />
+
+  
+
+  
+  
+
+
+IXIA
+
+
+Dest
 MAC: Port 0Dest IP: 2.1.1.1Src IP: Random
+Port
 A
+
+
+Dest MAC: Port 1Dest IP: 1.1.1.1Src IP: Random
+Port
 B
+
+
+
+Intel XL 71040G Ethernet
+Port
 0
+Flow 2
+Flow 1
+
+Port
 X
+  
+  
+
+
+
+Intel XL 71040G Ethernet
+
+Port
 1
+
+Port
 X
+
+Port
 0 to Port 1Port
 1 to Port 0 
+Forwarding
+IA
 Platform(Socket 1)
+  
+
diff --git a/doc/guides/linux_gsg/index.rst b/doc/guides/linux_gsg/index.rst
index 89800cc..f8b5086 100644
--- a/doc/guides/linux_gsg/index.rst
+++ b/doc/guides/linux_gsg/index.rst
@@ -47,3 +47,4 @@ Contents
 build_sample_apps
 enable_func
 quick_start
+perf_test_intel_platform_nic
diff --git a/doc/guides/linux_gsg/perf_test_intel_platform_nic.rst 
b/doc/guides/linux_gsg/perf_test_intel_platform_nic.rst
new file mode 100644
index 000..e235c5e
--- /dev/null
+++ b/doc/guides/linux_gsg/perf_test_intel_platform_nic.rst
@@ -0,0 +1,260 @@
+How to get best performance with NICs on Intel platforms
+
+
+This document is a step-by-step guide for getting high performance from DPDK 
applications on Intel platforms.
+
+
+Hardware and Memory Requirements
+
+
+For best performance use an Intel Xeon class server system such as Ivy Bridge, 
Haswell or newer.
+
+Ensure that each memory channel has at least one memory DIMM inserted, and 
that the memory size for each is at least 4GB.
+**Note**: this has one of the most direct effects on performance.
+
+You can check the memory configuration using ``dmidecode`` as follows::
+
+  dmidecode -t memory | grep Locator
+
+  Locator: DIMM_A1
+  Bank Locator: NODE 1
+  Locator: DIMM_A2
+  Bank Locator: NODE 1
+  Locator: DIMM_B1
+  Bank Locator: NODE 1
+  Locator: DIMM_B2
+  Bank Locator: NODE 1
+  ...
+  Locator: DIMM_G1
+  Bank Locator: NODE 2
+  Locator: DIMM_G2
+  Bank Locator: NODE 2
+  Locator: DIMM_H1
+  Bank Locator: NODE 2
+  Locator: DIMM_H2
+  Bank Locator: NODE 2
+
+The sample output above shows a total of 8 channels, from ``A`` to ``H``, 
where each channel has 2 DIMMs.
+
+You can also use ``dmidecode`` to determine the memory frequency::
+
+  dmidecode -t memory | grep Speed
+
+  Speed: 2133 MHz
+  Configured Clock Speed: 2134 MHz
+  Speed: Unknown
+  Configured Clock Speed: Unknown
+  Speed: 2133 MHz
+  Configured Clock Speed: 2134 MHz
+  Speed: Unknown
+  ...
+  Speed: 2133 MHz
+  Configured Clock Speed: 2134 MHz
+  Speed: Unknown
+  Configured Clock Speed: Unknown
+  Speed: 

[dpdk-dev] [PATCH] virtio: fix used ring address calculation

[Xie, Huawei]

On 9/25/2015 12:36 AM, Stephen Hemminger wrote:
> On Thu, 24 Sep 2015 07:30:41 +
> "Xie, Huawei"  wrote:
>
>> On 9/21/2015 11:39 AM, Xie, Huawei wrote:
>> vring_size calculation should consider both used_event_idx at the tail
>> of avail ring and avail_event_idx at the tail of used ring.
>> Will merge those two fixes and send a new patch.
>>> used event idx is put at the end of available ring. It isn't taken into 
>>> account
>>> when we calculate the address of used ring. Fortunately, it doesn't 
>>> introduce
>>> the bug with fixed queue number 256 and 4KB alignment.
>>>
>>> Signed-off-by: hxie5 
>>> ---
>>>  drivers/net/virtio/virtio_ring.h | 2 +-
>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/net/virtio/virtio_ring.h 
>>> b/drivers/net/virtio/virtio_ring.h
>>> index a16c499..92e430d 100644
>>> --- a/drivers/net/virtio/virtio_ring.h
>>> +++ b/drivers/net/virtio/virtio_ring.h
>>> @@ -145,7 +145,7 @@ vring_init(struct vring *vr, unsigned int num, uint8_t 
>>> *p,
>>> vr->avail = (struct vring_avail *) (p +
>>> num * sizeof(struct vring_desc));
>>> vr->used = (void *)
>>> -   RTE_ALIGN_CEIL((uintptr_t)(>avail->ring[num]), align);
>>> +   RTE_ALIGN_CEIL((uintptr_t)(>avail->ring[num + 1]), align);
>>>  }
>>>  
>>>  /*
> Why aren't we just using the standard Linux includes for this?
> See  and the function vring_init()
>
> Keeping parallel copies of headers is prone to failures.
Agree.
Using standard Linux includes then at least we don't need to redefine
the feature and other related MACRO.
This applies to vhost as well.
For vring, vring_init, we could also reuse the linux implementation
unless we have strong reason to define our own structure.
One reason was to support both FreeBSD and Linux. FreeBSD should have
its own header file. To avoid the case they have different vring
structure or VIRTIO_F_xx macro name, they are redefined here.

>

[dpdk-dev] [PATCH v2] doc: update the dpdk 2.2 release notes

[John McNamara]

Update the DPDK 2.2 release notes with recent fixes:

  7e01e3 i40e: fix base driver allocation when not using first numa node
  5e73f4 ixgbe: remove burst size restriction of vector Rx
  7fcd13 ixgbe: fix X550 DCB
  d49e0f hash: fix memory allocation of cuckoo key table
  9db649 eal/linux: fix epoll timeout

Signed-off-by: John McNamara 
---

V2
* Added section headers to Resolved Issues.


 doc/guides/rel_notes/release_2_2.rst | 47 
 1 file changed, 47 insertions(+)

diff --git a/doc/guides/rel_notes/release_2_2.rst 
b/doc/guides/rel_notes/release_2_2.rst
index 682f468..547c071 100644
--- a/doc/guides/rel_notes/release_2_2.rst
+++ b/doc/guides/rel_notes/release_2_2.rst
@@ -8,6 +8,53 @@ New Features
 Resolved Issues
 ---

+EAL
+~~~
+
+* **eal/linux: Fixed epoll timeout.**
+
+  Fixed issue where the ``rte_epoll_wait()`` function didn't return when the
+  underlying call to ``epoll_wait()`` timed out.
+
+
+Libraries
+~
+
+* **hash: Fixed memory allocation of Cuckoo Hash key table.**
+
+  Fixed issue where an incorrect Cuckoo Hash key table size could be
+  calculated limiting the size to 4GB.
+
+  Fixes: 48a399119619 ("hash: replace with cuckoo hash implementation")
+
+
+Drivers
+~~~
+
+* **i40e: Fixed base driver allocation when not using first numa node.**
+
+  Fixed i40e issue that occurred when a DPDK application didn't initialize
+  ports if memory wasn't available on socket 0.
+
+
+* **ixgbe: Fixed issue with X550 DCB.**
+
+  Fixed a DCB issue with x550 where for 8 TCs (Traffic Classes), if a packet
+  with user priority 6 or 7 was injected to the NIC, then the NIC would only
+  put 3 packets into the queue. There was also a similar issue for 4 TCs.
+
+* **ixgbe: Removed burst size restriction of vector RX.**
+
+  Fixed issue where a burst size less than 32 didn't receive anything.
+
+
+Examples
+
+
+
+Other
+~
+

 Known Issues
 
-- 
1.8.1.4

[dpdk-dev] [PATCH] ixgbe: prefetch cacheline after pointer becomes valid

[Zoltan Kiss]

At the original point the rx_pkts[pos( + n)] pointers are not initialized, so
the code is prefetching random data.

Signed-off-by: Zoltan Kiss 

diff --git a/drivers/net/ixgbe/ixgbe_rxtx_vec.c 
b/drivers/net/ixgbe/ixgbe_rxtx_vec.c
index 3c6d8c5..ccd93c7 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx_vec.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx_vec.c
@@ -284,13 +284,6 @@ _recv_raw_pkts_vec(struct ixgbe_rx_queue *rxq, struct 
rte_mbuf **rx_pkts,
__m128i zero, staterr, sterr_tmp1, sterr_tmp2;
__m128i mbp1, mbp2; /* two mbuf pointer in one XMM reg. */

-   if (split_packet) {
-   rte_prefetch0(_pkts[pos]->cacheline1);
-   rte_prefetch0(_pkts[pos + 1]->cacheline1);
-   rte_prefetch0(_pkts[pos + 2]->cacheline1);
-   rte_prefetch0(_pkts[pos + 3]->cacheline1);
-   }
-
/* B.1 load 1 mbuf point */
mbp1 = _mm_loadu_si128((__m128i *)_ring[pos]);

@@ -312,6 +305,13 @@ _recv_raw_pkts_vec(struct ixgbe_rx_queue *rxq, struct 
rte_mbuf **rx_pkts,
/* B.2 copy 2 mbuf point into rx_pkts  */
_mm_storeu_si128((__m128i *)_pkts[pos+2], mbp2);

+   if (split_packet) {
+   rte_prefetch0(_pkts[pos]->cacheline1);
+   rte_prefetch0(_pkts[pos + 1]->cacheline1);
+   rte_prefetch0(_pkts[pos + 2]->cacheline1);
+   rte_prefetch0(_pkts[pos + 3]->cacheline1);
+   }
+
/* A* mask out 0~3 bits RSS type */
descs[3] = _mm_and_si128(descs0[3], desc_mask);
descs[2] = _mm_and_si128(descs0[2], desc_mask);

[dpdk-dev] DPDK PktGen: sending multiple streams

[Harish Patil]

Hi,
I?m trying to figure out how to send multiple streams of traffic (say by
changing port/ipaddr) from the peer to SUT to test multiqueue with RSS
functionality. I?m using DPDK PktGen on the SUT as well to bind each
receive queue to different cores for spreading the load.
Can we use pcap option for that?
-s P:file: The PCAP packet file to stream. P is the port number.
If so, can you pls give the exact example?
Thanks,
Harish




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[dpdk-dev] [PATCH v1] Move rte_mbuf macros to common header file

[Stephen Hemminger]

On Thu, 24 Sep 2015 15:50:41 -0700
Ravi Kerur  wrote:

> Macros RTE_MBUF_DATA_DMA_ADDR and RTE_MBUF_DATA_DMA_ADDR_DEFAULT
> are defined in each PMD driver file. Move those macros into common
> lib/librte_mbuf/rte_mbuf.h file. All PMD drivers include rte_mbuf.h
> file directly/indirectly hence no additionl header file inclusion
> is necessary.
> 
> Compiled for:
> > x86_64-native-linuxapp-clang
> > x86_64-native-linuxapp-gcc
> > i686-native-linuxapp-gcc
> > x86_64-native-bsdapp-gcc
> > x86_64-native-bsdapp-clang  
> 
> Tested on:
> > x86_64 Ubuntu 14.04, testpmd and 'make test'
> > FreeBSD 10.1, testpmd  
> 
> Signed-off-by: Ravi Kerur 

I like the idea, should have been done long ago.

My only gripe is that you should do this as inline functions
rather than macros. Inline functions are type safe, macros are not.

[dpdk-dev] [PATCH v3] doc: add performance test guide to the linux gsg

[Mcnamara, John]

> -Original Message-
> From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Qian Xu
> Sent: Thursday, September 24, 2015 12:49 PM
> To: dev at dpdk.org
> Subject: [dpdk-dev] [PATCH v3] doc: add performance test guide to the
> linux gsg
> 
> Add a new guide doc as part of the Linux Getting Started Guide.
> 
> The document is a step-by-step guide on how to get high performance with
> DPDK on an Intel platform.
> 
> It is designed for users who are not familiar with DPDK but would like to
> get the best performance with NICs.
> 
> Signed-off-by: Qian Xu 

Acked-by: John McNamara 

[dpdk-dev] [PATCH v1] Move rte_mbuf macros to common header file

[Ravi Kerur]

Macros RTE_MBUF_DATA_DMA_ADDR and RTE_MBUF_DATA_DMA_ADDR_DEFAULT
are defined in each PMD driver file. Move those macros into common
lib/librte_mbuf/rte_mbuf.h file. All PMD drivers include rte_mbuf.h
file directly/indirectly hence no additionl header file inclusion
is necessary.

Compiled for:
> x86_64-native-linuxapp-clang
> x86_64-native-linuxapp-gcc
> i686-native-linuxapp-gcc
> x86_64-native-bsdapp-gcc
> x86_64-native-bsdapp-clang

Tested on:
> x86_64 Ubuntu 14.04, testpmd and 'make test'
> FreeBSD 10.1, testpmd

Signed-off-by: Ravi Kerur 
---
 drivers/net/bnx2x/bnx2x.h  | 3 ---
 drivers/net/cxgbe/sge.c| 3 ---
 drivers/net/e1000/em_rxtx.c| 6 --
 drivers/net/e1000/igb_rxtx.c   | 6 --
 drivers/net/i40e/i40e_rxtx.c   | 6 --
 drivers/net/ixgbe/ixgbe_rxtx.h | 6 --
 drivers/net/virtio/virtqueue.h | 3 ---
 drivers/net/vmxnet3/vmxnet3_rxtx.c | 6 --
 lib/librte_mbuf/rte_mbuf.h | 6 ++
 9 files changed, 6 insertions(+), 39 deletions(-)

diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h
index 867b92a..28bd83f 100644
--- a/drivers/net/bnx2x/bnx2x.h
+++ b/drivers/net/bnx2x/bnx2x.h
@@ -141,9 +141,6 @@ struct bnx2x_device_type {
char *bnx2x_name;
 };

-#define RTE_MBUF_DATA_DMA_ADDR(mb) \
-   ((uint64_t)((mb)->buf_physaddr + (mb)->data_off))
-
 #define BNX2X_PAGE_SHIFT   12
 #define BNX2X_PAGE_SIZE(1 << BNX2X_PAGE_SHIFT)
 #define BNX2X_PAGE_MASK(~(BNX2X_PAGE_SIZE - 1))
diff --git a/drivers/net/cxgbe/sge.c b/drivers/net/cxgbe/sge.c
index 6eb1244..8f4c025 100644
--- a/drivers/net/cxgbe/sge.c
+++ b/drivers/net/cxgbe/sge.c
@@ -1267,9 +1267,6 @@ static struct rte_mbuf *t4_pktgl_to_mbuf(const struct 
pkt_gl *gl)
return t4_pktgl_to_mbuf_usembufs(gl);
 }

-#define RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mb) \
-   ((dma_addr_t) ((mb)->buf_physaddr + (mb)->data_off))
-
 /**
  * t4_ethrx_handler - process an ingress ethernet packet
  * @q: the response queue that received the packet
diff --git a/drivers/net/e1000/em_rxtx.c b/drivers/net/e1000/em_rxtx.c
index 3b8776d..c7d97c1 100644
--- a/drivers/net/e1000/em_rxtx.c
+++ b/drivers/net/e1000/em_rxtx.c
@@ -88,12 +88,6 @@ rte_rxmbuf_alloc(struct rte_mempool *mp)
return (m);
 }

-#define RTE_MBUF_DATA_DMA_ADDR(mb) \
-   (uint64_t) ((mb)->buf_physaddr + (mb)->data_off)
-
-#define RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mb) \
-   (uint64_t) ((mb)->buf_physaddr + RTE_PKTMBUF_HEADROOM)
-
 /**
  * Structure associated with each descriptor of the RX ring of a RX queue.
  */
diff --git a/drivers/net/e1000/igb_rxtx.c b/drivers/net/e1000/igb_rxtx.c
index 19905fd..a217cea 100644
--- a/drivers/net/e1000/igb_rxtx.c
+++ b/drivers/net/e1000/igb_rxtx.c
@@ -88,12 +88,6 @@ rte_rxmbuf_alloc(struct rte_mempool *mp)
return (m);
 }

-#define RTE_MBUF_DATA_DMA_ADDR(mb) \
-   (uint64_t) ((mb)->buf_physaddr + (mb)->data_off)
-
-#define RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mb) \
-   (uint64_t) ((mb)->buf_physaddr + RTE_PKTMBUF_HEADROOM)
-
 /**
  * Structure associated with each descriptor of the RX ring of a RX queue.
  */
diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c
index fd656d5..5ba6d27 100644
--- a/drivers/net/i40e/i40e_rxtx.c
+++ b/drivers/net/i40e/i40e_rxtx.c
@@ -78,12 +78,6 @@
PKT_TX_L4_MASK | \
PKT_TX_OUTER_IP_CKSUM)

-#define RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mb) \
-   (uint64_t) ((mb)->buf_physaddr + RTE_PKTMBUF_HEADROOM)
-
-#define RTE_MBUF_DATA_DMA_ADDR(mb) \
-   ((uint64_t)((mb)->buf_physaddr + (mb)->data_off))
-
 static const struct rte_memzone *
 i40e_ring_dma_zone_reserve(struct rte_eth_dev *dev,
   const char *ring_name,
diff --git a/drivers/net/ixgbe/ixgbe_rxtx.h b/drivers/net/ixgbe/ixgbe_rxtx.h
index b9eca67..dbb9f00 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.h
+++ b/drivers/net/ixgbe/ixgbe_rxtx.h
@@ -40,12 +40,6 @@

 #define RTE_IXGBE_DESCS_PER_LOOP4

-#define RTE_MBUF_DATA_DMA_ADDR(mb) \
-   (uint64_t) ((mb)->buf_physaddr + (mb)->data_off)
-
-#define RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mb) \
-   (uint64_t) ((mb)->buf_physaddr + RTE_PKTMBUF_HEADROOM)
-
 #ifdef RTE_IXGBE_INC_VECTOR
 #define RTE_IXGBE_RXQ_REARM_THRESH  32
 #define RTE_IXGBE_MAX_RX_BURST  RTE_IXGBE_RXQ_REARM_THRESH
diff --git a/drivers/net/virtio/virtqueue.h b/drivers/net/virtio/virtqueue.h
index 7789411..9ea9b96 100644
--- a/drivers/net/virtio/virtqueue.h
+++ b/drivers/net/virtio/virtqueue.h
@@ -68,9 +68,6 @@ struct rte_mbuf;

 #define VIRTQUEUE_MAX_NAME_SZ 32

-#define RTE_MBUF_DATA_DMA_ADDR(mb) \
-   (uint64_t) ((mb)->buf_physaddr + (mb)->data_off)
-
 #define VTNET_SQ_RQ_QUEUE_IDX 0
 #define VTNET_SQ_TQ_QUEUE_IDX 1
 #define VTNET_SQ_CQ_QUEUE_IDX 2
diff --git a/drivers/net/vmxnet3/vmxnet3_rxtx.c 
b/drivers/net/vmxnet3/vmxnet3_rxtx.c
index 4de5d89..bb2648b 100644
--- a/drivers/net/vmxnet3/vmxnet3_rxtx.c
+++ 

[dpdk-dev] [PATCH v1] Move rte_mbuf macros to common header file

[Ravi Kerur]

Macros RTE_MBUF_DATA_DMA_ADDR and RTE_MBUF_DATA_DMA_ADDR_DEFAULT
are defined in each PMD driver file. Move those macros into common
lib/librte_mbuf/rte_mbuf.h file. All PMD drivers include rte_mbuf.h
file directly/indirectly hence no additionl header file inclusion 
is necessary.

Ravi Kerur (1):
  Move rte_buf macros to common header file

 drivers/net/bnx2x/bnx2x.h  | 3 ---
 drivers/net/cxgbe/sge.c| 3 ---
 drivers/net/e1000/em_rxtx.c| 6 --
 drivers/net/e1000/igb_rxtx.c   | 6 --
 drivers/net/i40e/i40e_rxtx.c   | 6 --
 drivers/net/ixgbe/ixgbe_rxtx.h | 6 --
 drivers/net/virtio/virtqueue.h | 3 ---
 drivers/net/vmxnet3/vmxnet3_rxtx.c | 6 --
 lib/librte_mbuf/rte_mbuf.h | 6 ++
 9 files changed, 6 insertions(+), 39 deletions(-)

-- 
1.9.1

[dpdk-dev] DPDK.org Community Call - Sept 24 - Discuss Growth, Improvements

[Butler, Siobhan A]

Super discussions today on the community call. Looking forward to continuing 
the open and honest dialogue in Dublin in two weeks' time.
Don't forget if you have registered for DPDK Userspace 2015 and can't make it 
please let me know as we have a waiting list.
Thanks
Siobh?n 

> -Original Message-
> From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of St
> Leger, Jim
> Sent: Thursday, September 24, 2015 12:56 AM
> To: Dave Neary; dev at dpdk.org
> Subject: Re: [dpdk-dev] DPDK.org Community Call - Sept 24 -
> Discuss Growth, Improvements
> 
> This call is aimed to get more open dialogue in the
> community.  Yes, the slot at DPDK Userspace should delve
> deeper into the subject. But rather than wait it has been
> desired by several people to get some discussion going now
> ahead of the Dublin gathering.  I hope the community can
> start the conversation now and then tee up some areas to dig
> into deeper when people are face-to-face in Dublin (those
> who can make it anyway.) And of course if people aren't going
> to Dublin this is an easy path to be heard and contribute to the
> discussion.
> I hope that helps.
> Jim
> 
> -Original Message-
> From: Dave Neary [mailto:dneary at redhat.com]
> Sent: Wednesday, September 23, 2015 2:00 PM
> To: St Leger, Jim; dev at dpdk.org
> Subject: Re: [dpdk-dev] DPDK.org Community Call - Sept 24 -
> Discuss Growth, Improvements
> 
> Hi Jim,
> 
> I see that there is a session loosely aligned with the agenda
> below on the agenda for DPDK Userspace in Dublin:
> https://dpdksummit.com/us/en/userspace2015 (current
> speaker is TBC).
> Will this call serve as a preparation call for that face to face
> meeting? In which case, is this the best opportunity that
> people who cannot travel to Dublin will have to make any
> concerns/proposals known so that they can be discussed
> there?
> 
> Thanks,
> Dave.
> 
> On 09/22/2015 03:14 AM, St Leger, Jim wrote:
> > I am going to host a community call on Thursday Sept 24 at
> 7:00am Pacific daylight time.  The conference call dial-in info
> via GoToMeeting is pasted below.  Here is the background and
> objective of the discussion.
> >
> > The DPDK community continues to grow.  Here are some
> stats on the 2.1 release from August 17th:
> > => 827 commits. A growth of ~50% over the 2.0 release.
> > => 82 individual committers. A growth of ~33% over the 2.0
> release.
> > The number of companies contributing has also continued to
> grow.
> >
> > There is a strong desire to continue to grow and solidify the
> community. But the growth brings up the question of how the
> community is structured to scale.   Additionally, there are
> many private DPDK repositories across the industry (e.g. ARM
> ports, for example.)  There are a myriad of reasons why
> companies have elected to keep their DPDK code and ports
> private versus put them into the DPDK.org community. We as
> a community need to understand and explore these reasons
> and work towards enabling inclusion.
> >
> > During this gathering I'd like to bring together the DPDK
> community including:
> > a) the DPDK code contributors,
> > b) the consumers of DPDK downstream (VNF vendors, etc.),
> > c) private branch DPDK creators/consumers, and
> > d) anyone else interested in the growth and future of the
> DPDK open source software project.
> >
> > The call will focus on two topics:
> >
> > 1)Structure for growth:
> >
> > Do we have the community practices, policies, and
> procedures in place to allow us to continue to grow on our
> current trajectory?
> >
> >
> >
> > 2)Gaps Limiting Participation:
> >
> > What gaps do companies who would like to
> participate/contribute to DPDK.org see?
> >
> > What changes would they like to see made to improve the
> project?
> >
> > I hope people can attend AND that they will join and speak
> up and be heard. The success and growth of the community
> depends on YOU!
> >
> > Thanks,
> > Jim
> > =
> > DPDK Community Call
> >
> > Thu, Sep 24, 2015 3:00 PM - 4:00 PM GMT Daylight Time
> Please join my
> > meeting from your computer, tablet or smartphone.
> > https://global.gotomeeting.com/join/766709085
> >
> > You can also dial in using your phone.
> >
> > Access Code: 766-709-085
> > Dial-in phone numbers
> > United States : +1 (312) 757-3117
> > Australia : +61 2 8355 1031
> > Austria : +43 (0) 7 2088 1033
> > Belgium : +32 (0) 28 93 7001
> > Canada : +1 (647) 497-9371
> > Denmark : +45 (0) 69 91 89 33
> > Finland : +358 (0) 942 41 5770
> > France : +33 (0) 170 950 585
> > Germany : +49 (0) 692 5736 7303
> > Ireland : +353 (0) 19 030 050
> > Italy : +39 0 693 38 75 50
> > Netherlands : +31 (0) 208 080 208
> > New Zealand : +64 9 925 0481
> > Norway : +47 21 54 82 21
> > Spain : +34 911 82 9890
> > Sweden : +46 (0) 853 527 817
> > Switzerland : +41 (0) 435 0167 65
> > United Kingdom : +44 (0) 20 3713 5010
> >
> >
> 
> --
> Dave Neary - NFV/SDN Community Strategy
> Open Source and Standards, Red 

[dpdk-dev] [PATCH 2/2] app/testpmd: add test commands for selecting different GRE key sizes

[Helin Zhang]

Test commands are added to support selecting differnt length of
GRE key.

Signed-off-by: Helin Zhang 
Signed-off-by: Andrey Chilikin 
---
 app/test-pmd/cmdline.c | 52 ++
 1 file changed, 52 insertions(+)

diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 06bc26e..50003c8 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -6623,6 +6623,57 @@ cmdline_parse_inst_t cmd_tunnel_udp_config = {
},
 };

+/* *** GLOBAL CONFIG *** */
+struct cmd_global_config_result {
+   cmdline_fixed_string_t cmd;
+   uint8_t port_id;
+   cmdline_fixed_string_t cfg_type;
+   uint8_t len;
+};
+
+static void
+cmd_global_config_parsed(void *parsed_result,
+__attribute__((unused)) struct cmdline *cl,
+__attribute__((unused)) void *data)
+{
+   struct cmd_global_config_result *res = parsed_result;
+   struct rte_eth_global_cfg conf;
+   int ret;
+
+   memset(, 0, sizeof(conf));
+   conf.cfg_type = RTE_ETH_GLOBAL_CFG_TYPE_GRE_KEY_LEN;
+   conf.cfg.gre_key_len = res->len;
+   ret = rte_eth_dev_filter_ctrl(res->port_id, RTE_ETH_FILTER_NONE,
+ RTE_ETH_FILTER_SET, );
+   if (ret != 0)
+   printf("Global config error\n");
+}
+
+cmdline_parse_token_string_t cmd_global_config_cmd =
+   TOKEN_STRING_INITIALIZER(struct cmd_global_config_result, cmd,
+   "global_config");
+cmdline_parse_token_num_t cmd_global_config_port_id =
+   TOKEN_NUM_INITIALIZER(struct cmd_global_config_result, port_id, UINT8);
+cmdline_parse_token_string_t cmd_global_config_type =
+   TOKEN_STRING_INITIALIZER(struct cmd_global_config_result,
+   cfg_type, "gre-key-len");
+cmdline_parse_token_num_t cmd_global_config_gre_key_len =
+   TOKEN_NUM_INITIALIZER(struct cmd_global_config_result,
+   len, UINT8);
+
+cmdline_parse_inst_t cmd_global_config = {
+   .f = cmd_global_config_parsed,
+   .data = (void *)NULL,
+   .help_str = "global_config  gre-key-len ",
+   .tokens = {
+   (void *)_global_config_cmd,
+   (void *)_global_config_port_id,
+   (void *)_global_config_type,
+   (void *)_global_config_gre_key_len,
+   NULL,
+   },
+};
+
 /* *** CONFIGURE VM MIRROR VLAN/POOL RULE *** */
 struct cmd_set_mirror_mask_result {
cmdline_fixed_string_t set;
@@ -9122,6 +9173,7 @@ cmdline_parse_ctx_t main_ctx[] = {
(cmdline_parse_inst_t *)_vf_rate_limit,
(cmdline_parse_inst_t *)_tunnel_filter,
(cmdline_parse_inst_t *)_tunnel_udp_config,
+   (cmdline_parse_inst_t *)_global_config,
(cmdline_parse_inst_t *)_set_mirror_mask,
(cmdline_parse_inst_t *)_set_mirror_link,
(cmdline_parse_inst_t *)_reset_mirror_rule,
-- 
1.9.3

[dpdk-dev] [PATCH 1/2] i40e: add selecting GRE key length

[Helin Zhang]

By default, only first 3 bytes of GRE key will be used for hash or
filter calculation. With these changes, it can select 3 or 4 bytes
of GRE key for hash calculation.

Signed-off-by: Helin Zhang 
Signed-off-by: Andrey Chilikin 
---
 drivers/net/i40e/i40e_ethdev.c  | 86 +++--
 lib/librte_ether/rte_eth_ctrl.h | 20 ++
 2 files changed, 103 insertions(+), 3 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 77e6906..b88a2f0 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -5328,7 +5328,7 @@ i40e_pf_config_rss(struct i40e_pf *pf)

 static int
 i40e_tunnel_filter_param_check(struct i40e_pf *pf,
-   struct rte_eth_tunnel_filter_conf *filter)
+  struct rte_eth_tunnel_filter_conf *filter)
 {
if (pf == NULL || filter == NULL) {
PMD_DRV_LOG(ERR, "Invalid parameter");
@@ -5360,9 +5360,84 @@ i40e_tunnel_filter_param_check(struct i40e_pf *pf,
return 0;
 }

+#define I40E_GL_PRS_FVBM(_i) (0x00269760 + ((_i) * 4))
 static int
-i40e_tunnel_filter_handle(struct rte_eth_dev *dev, enum rte_filter_op 
filter_op,
-   void *arg)
+i40e_dev_set_gre_key_len(struct i40e_hw *hw, uint8_t len)
+{
+   uint32_t val, reg;
+   int ret = -EINVAL;
+
+   val = I40E_READ_REG(hw, I40E_GL_PRS_FVBM(2));
+   PMD_DRV_LOG(DEBUG, "Read original GL_PRS_FVBM with 0x%08x\n", val);
+
+   if (len == 3) {
+   reg = val | 0x8000;
+   } else if (len == 4) {
+   reg = val & ~0x8000;
+   } else {
+   PMD_DRV_LOG(ERR, "Unsupported GRE key length of %u", len);
+   return ret;
+   }
+
+   if (reg != val) {
+   ret = i40e_aq_debug_write_register(hw, I40E_GL_PRS_FVBM(2),
+  reg, NULL);
+   if (ret != 0)
+   return ret;
+   } else {
+   ret = 0;
+   }
+   PMD_DRV_LOG(DEBUG, "Read modified GL_PRS_FVBM with 0x%08x\n",
+   I40E_READ_REG(hw, I40E_GL_PRS_FVBM(2)));
+
+   return ret;
+}
+
+static int
+i40e_dev_global_config_set(struct i40e_hw *hw, struct rte_eth_global_cfg *cfg)
+{
+   int ret = -EINVAL;
+
+   if (!hw || !cfg)
+   return -EINVAL;
+
+   switch (cfg->cfg_type) {
+   case RTE_ETH_GLOBAL_CFG_TYPE_GRE_KEY_LEN:
+   ret = i40e_dev_set_gre_key_len(hw, cfg->cfg.gre_key_len);
+   break;
+   default:
+   PMD_DRV_LOG(ERR, "Unknown config type %u", cfg->cfg_type);
+   break;
+   }
+
+   return ret;
+}
+
+static int
+i40e_filter_ctrl_global_config(struct rte_eth_dev *dev,
+  enum rte_filter_op filter_op,
+  void *arg)
+{
+   struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+   int ret = I40E_ERR_PARAM;
+
+   switch (filter_op) {
+   case RTE_ETH_FILTER_SET:
+   ret = i40e_dev_global_config_set(hw,
+   (struct rte_eth_global_cfg *)arg);
+   break;
+   default:
+   PMD_DRV_LOG(ERR, "unknown operation %u", filter_op);
+   break;
+   }
+
+   return ret;
+}
+
+static int
+i40e_tunnel_filter_handle(struct rte_eth_dev *dev,
+ enum rte_filter_op filter_op,
+ void *arg)
 {
struct rte_eth_tunnel_filter_conf *filter;
struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
@@ -5377,6 +5452,7 @@ i40e_tunnel_filter_handle(struct rte_eth_dev *dev, enum 
rte_filter_op filter_op,
case RTE_ETH_FILTER_NOP:
if (!(pf->flags & I40E_FLAG_VXLAN))
ret = I40E_NOT_SUPPORTED;
+   break;
case RTE_ETH_FILTER_ADD:
ret = i40e_dev_tunnel_filter_set(pf, filter, 1);
break;
@@ -6268,6 +6344,10 @@ i40e_dev_filter_ctrl(struct rte_eth_dev *dev,
return -EINVAL;

switch (filter_type) {
+   case RTE_ETH_FILTER_NONE:
+   /* For global configuration */
+   ret = i40e_filter_ctrl_global_config(dev, filter_op, arg);
+   break;
case RTE_ETH_FILTER_HASH:
ret = i40e_hash_filter_ctrl(dev, filter_op, arg);
break;
diff --git a/lib/librte_ether/rte_eth_ctrl.h b/lib/librte_ether/rte_eth_ctrl.h
index a7f2ee7..78f5cd1 100644
--- a/lib/librte_ether/rte_eth_ctrl.h
+++ b/lib/librte_ether/rte_eth_ctrl.h
@@ -295,6 +295,26 @@ struct rte_eth_tunnel_filter_conf {
uint16_t queue_id;  /** < queue number. */
 };

+/**
+ * Global eth device configuration type.
+ */
+enum rte_eth_global_cfg_type {
+   RTE_ETH_GLOBAL_CFG_TYPE_UNKNOWN = 0,
+   RTE_ETH_GLOBAL_CFG_TYPE_GRE_KEY_LEN,
+   RTE_ETH_GLOBAL_CFG_TYPE_MAX,
+};
+
+/**
+ * Global eth 

[dpdk-dev] [PATCH 0/2] add selecting different GRE key length

[Helin Zhang]

By default, only 3 bytes of GRE key will be used for hash or filter
calculation. Here adds a workaround for selecting 3 or 4 bytes of GRE
key for that purpose.

Helin Zhang (2):
  i40e: add selecting GRE key length
  app/testpmd: add test commands for selecting different GRE key sizes

 app/test-pmd/cmdline.c  | 52 +
 drivers/net/i40e/i40e_ethdev.c  | 86 +++--
 lib/librte_ether/rte_eth_ctrl.h | 20 ++
 3 files changed, 155 insertions(+), 3 deletions(-)

-- 
1.9.3

[dpdk-dev] [PATCH v1] Add support for I217 and I218 Intel 1G chipsets.

[Ravi Kerur]

This patch adds I217 and I218 Intel chipsets.

Compiled for:
> i686-native-linuxapp-gcc
> x86_64-native-linuxapp-clang
> x86_64-native-linuxapp-gcc
> x86_x32-native-linuxapp-gcc

Tested on:
> x86_64 Ubuntu 14.04 with Intel I218-V and I217-LM chipsets.

Signed-off-by: Ravi Kerur 
---
 drivers/net/e1000/base/e1000_api.c  |  1 +
 drivers/net/e1000/base/e1000_hw.h   |  1 +
 drivers/net/e1000/base/e1000_ich8lan.c  | 30 +++-
 drivers/net/e1000/base/e1000_osdep.h| 24 +++
 drivers/net/e1000/em_ethdev.c   | 31 -
 lib/librte_eal/common/include/rte_pci_dev_ids.h |  6 +
 6 files changed, 65 insertions(+), 28 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_api.c 
b/drivers/net/e1000/base/e1000_api.c
index a064565..018a9a3 100644
--- a/drivers/net/e1000/base/e1000_api.c
+++ b/drivers/net/e1000/base/e1000_api.c
@@ -292,6 +292,7 @@ s32 e1000_set_mac_type(struct e1000_hw *hw)
case E1000_DEV_ID_PCH_LPT_I217_V:
case E1000_DEV_ID_PCH_LPTLP_I218_LM:
case E1000_DEV_ID_PCH_LPTLP_I218_V:
+   case E1000_DEV_ID_PCH_LPTLP_I218_V2:
mac->type = e1000_pch_lpt;
break;
case E1000_DEV_ID_82575EB_COPPER:
diff --git a/drivers/net/e1000/base/e1000_hw.h 
b/drivers/net/e1000/base/e1000_hw.h
index 4dd92a3..c4b6212 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -132,6 +132,7 @@ struct e1000_hw;
 #define E1000_DEV_ID_PCH_LPT_I217_V0x153B
 #define E1000_DEV_ID_PCH_LPTLP_I218_LM 0x155A
 #define E1000_DEV_ID_PCH_LPTLP_I218_V  0x1559
+#define E1000_DEV_ID_PCH_LPTLP_I218_V2 0x15A1
 #define E1000_DEV_ID_82576 0x10C9
 #define E1000_DEV_ID_82576_FIBER   0x10E6
 #define E1000_DEV_ID_82576_SERDES  0x10E7
diff --git a/drivers/net/e1000/base/e1000_ich8lan.c 
b/drivers/net/e1000/base/e1000_ich8lan.c
index 3b1627b..c7fa1ad 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -1386,29 +1386,15 @@ STATIC s32 e1000_check_for_copper_link_ich8lan(struct 
e1000_hw *hw)
if (!mac->get_link_status)
return E1000_SUCCESS;

-   if ((hw->mac.type < e1000_pch_lpt) ||
-   (hw->device_id == E1000_DEV_ID_PCH_LPT_I217_LM) ||
-   (hw->device_id == E1000_DEV_ID_PCH_LPT_I217_V)) {
-   /* First we want to see if the MII Status Register reports
-* link.  If so, then we want to get the current speed/duplex
-* of the PHY.
-*/
-   ret_val = e1000_phy_has_link_generic(hw, 1, 0, );
-   if (ret_val)
-   return ret_val;
-   } else {
-   /* Check the MAC's STATUS register to determine link state
-* since the PHY could be inaccessible while in ULP mode.
-*/
-   link = !!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU);
-   if (link)
-   ret_val = e1000_disable_ulp_lpt_lp(hw, false);
-   else
-   ret_val = e1000_enable_ulp_lpt_lp(hw, false);
+   /* First we want to see if the MII Status Register reports
+* link.  If so, then we want to get the current speed/duplex
+* of the PHY.
+*/
+   ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT, 10, 
);
+   if (ret_val)
+   return ret_val;

-   if (ret_val)
-   return ret_val;
-   }
+   DEBUGOUT1("After phy_has_link_generic link state is %d\n", link);

if (hw->mac.type == e1000_pchlan) {
ret_val = e1000_k1_gig_workaround_hv(hw, link);
diff --git a/drivers/net/e1000/base/e1000_osdep.h 
b/drivers/net/e1000/base/e1000_osdep.h
index d04ec73..3255d37 100644
--- a/drivers/net/e1000/base/e1000_osdep.h
+++ b/drivers/net/e1000/base/e1000_osdep.h
@@ -96,13 +96,22 @@ typedef int bool;

 #define E1000_PCI_REG(reg) (*((volatile uint32_t *)(reg)))

+#define E1000_PCI_REG16(reg) (*((volatile uint16_t *)(reg)))
+
 #define E1000_PCI_REG_WRITE(reg, value) do { \
E1000_PCI_REG((reg)) = (rte_cpu_to_le_32(value)); \
 } while (0)

+#define E1000_PCI_REG_WRITE16(reg, value) do { \
+   E1000_PCI_REG16((reg)) = (value); \
+} while (0)
+
 #define E1000_PCI_REG_ADDR(hw, reg) \
((volatile uint32_t *)((char *)(hw)->hw_addr + (reg)))

+#define E1000_PCI_REG_FLASH_ADDR(hw, reg) \
+   ((volatile uint32_t *)((char *)(hw)->flash_address + (reg)))
+
 #define E1000_PCI_REG_ARRAY_ADDR(hw, reg, index) \
E1000_PCI_REG_ADDR((hw), (reg) + ((index) << 2))

@@ -111,6 +120,11 @@ static inline uint32_t e1000_read_addr(volatile void* addr)
return rte_le_to_cpu_32(E1000_PCI_REG(addr));
 }

+static inline uint16_t e1000_read_addr16(volatile void* addr)
+{
+   return 

[dpdk-dev] [PATCH v1] Add support for Intel chipsets

[Ravi Kerur]

M. Jay(Jayakumar, Muthurajan) and I
discussed and decided to include support for I217/I218 chipsets since
these chipsets are found everywhere f.e. on laptops, low-end servers and
we found it useful and helpful for testing simple functionality. Hence we
decided to send this patch to be included in the mainline.

Ravi Kerur (1):
  Add support for I217 and I218 Intel 1G chipsets.

 drivers/net/e1000/base/e1000_api.c  |  1 +
 drivers/net/e1000/base/e1000_hw.h   |  1 +
 drivers/net/e1000/base/e1000_ich8lan.c  | 30 +++-
 drivers/net/e1000/base/e1000_osdep.h| 24 +++
 drivers/net/e1000/em_ethdev.c   | 31 -
 lib/librte_eal/common/include/rte_pci_dev_ids.h |  6 +
 6 files changed, 65 insertions(+), 28 deletions(-)

-- 
1.9.1

[dpdk-dev] [PATCH v3 2/2] app/testpmd: add test commands for RSS granularity

[Helin Zhang]

Test commands are added to support clearing input set, or setting
with new input set per different pctype.

Signed-off-by: Helin Zhang 
Signed-off-by: Andrey Chilikin 
---
 app/test-pmd/cmdline.c | 115 +
 1 file changed, 115 insertions(+)

v3 changes:
Support selecting more input set fields.

diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 0f8f48f..06bc26e 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -8851,6 +8851,120 @@ cmdline_parse_inst_t cmd_set_hash_global_config = {
},
 };

+/* Set hash input set */
+struct cmd_set_hash_input_set_result {
+   cmdline_fixed_string_t set_hash_input_set;
+   uint8_t port_id;
+   cmdline_fixed_string_t flow_type;
+   cmdline_fixed_string_t inset_field;
+   cmdline_fixed_string_t enable;
+};
+
+static enum rte_eth_input_set_field
+str2inset(char *string)
+{
+   uint16_t i;
+
+   static const struct {
+   char str[32];
+   enum rte_eth_input_set_field inset;
+   } inset_table[] = {
+   {"src-ipv4", RTE_ETH_INPUT_SET_L3_SRC_IP4},
+   {"dst-ipv4", RTE_ETH_INPUT_SET_L3_DST_IP4},
+   {"src-ipv6", RTE_ETH_INPUT_SET_L3_SRC_IP6},
+   {"dst-ipv6", RTE_ETH_INPUT_SET_L3_DST_IP6},
+   {"udp-src-port", RTE_ETH_INPUT_SET_L4_UDP_SRC_PORT},
+   {"udp-dst-port", RTE_ETH_INPUT_SET_L4_UDP_DST_PORT},
+   {"tcp-src-port", RTE_ETH_INPUT_SET_L4_TCP_SRC_PORT},
+   {"tcp-dst-port", RTE_ETH_INPUT_SET_L4_TCP_DST_PORT},
+   {"sctp-src-port", RTE_ETH_INPUT_SET_L4_SCTP_SRC_PORT},
+   {"sctp-dst-port", RTE_ETH_INPUT_SET_L4_SCTP_DST_PORT},
+   {"sctp-veri-tag", RTE_ETH_INPUT_SET_L4_SCTP_VERIFICATION_TAG},
+   {"gre-ver", RTE_ETH_INPUT_SET_TUNNEL_GRE_VERSION},
+   {"gre-proto-type", RTE_ETH_INPUT_SET_TUNNEL_GRE_PROTOCOL_TYPE},
+   {"gre-key", RTE_ETH_INPUT_SET_TUNNEL_GRE_KEY},
+   {"fld-1st", RTE_ETH_INPUT_SET_FLEX_PAYLOAD_1ST_WORD},
+   {"fld-2nd", RTE_ETH_INPUT_SET_FLEX_PAYLOAD_2ND_WORD},
+   {"fld-3rd", RTE_ETH_INPUT_SET_FLEX_PAYLOAD_3RD_WORD},
+   {"fld-4th", RTE_ETH_INPUT_SET_FLEX_PAYLOAD_4TH_WORD},
+   {"fld-5th", RTE_ETH_INPUT_SET_FLEX_PAYLOAD_5TH_WORD},
+   {"fld-6th", RTE_ETH_INPUT_SET_FLEX_PAYLOAD_6TH_WORD},
+   {"fld-7th", RTE_ETH_INPUT_SET_FLEX_PAYLOAD_7TH_WORD},
+   {"fld-8th", RTE_ETH_INPUT_SET_FLEX_PAYLOAD_8TH_WORD},
+   {"all", RTE_ETH_INPUT_SET_ALL},
+   };
+
+   for (i = 0; i < RTE_DIM(inset_table); i++) {
+   if (!strcmp(string, inset_table[i].str))
+   return inset_table[i].inset;
+   }
+
+   return RTE_ETH_INPUT_SET_UNKNOWN;
+}
+
+static void
+cmd_set_hash_input_set_parsed(void *parsed_result,
+ __rte_unused struct cmdline *cl,
+ __rte_unused void *data)
+{
+   struct cmd_set_hash_input_set_result *res = parsed_result;
+   struct rte_eth_hash_filter_info info;
+
+   memset(, 0, sizeof(info));
+   info.info_type = RTE_ETH_HASH_FILTER_INPUT_SET_SELECT;
+   info.info.input_set_conf.flow_type = str2flowtype(res->flow_type);
+   info.info.input_set_conf.field[0] = str2inset(res->inset_field);
+   info.info.input_set_conf.inset_size = 1;
+   if (!strcmp(res->enable, "enable"))
+   info.info.input_set_conf.enable = 1;
+   else
+   info.info.input_set_conf.enable = 0;
+   rte_eth_dev_filter_ctrl(res->port_id, RTE_ETH_FILTER_HASH,
+   RTE_ETH_FILTER_SET, );
+}
+
+cmdline_parse_token_string_t cmd_set_hash_input_set_cmd =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_hash_input_set_result,
+   set_hash_input_set, "set_hash_input_set");
+cmdline_parse_token_num_t cmd_set_hash_input_set_port_id =
+   TOKEN_NUM_INITIALIZER(struct cmd_set_hash_input_set_result,
+   port_id, UINT8);
+cmdline_parse_token_string_t cmd_set_hash_input_set_flow_type =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_hash_input_set_result,
+   flow_type,
+   "ipv4#ipv4-frag#ipv4-tcp#ipv4-udp#ipv4-sctp#ipv4-other#ipv6#"
+   "ipv6-frag#ipv6-tcp#ipv6-udp#ipv6-sctp#ipv6-other#l2_payload");
+cmdline_parse_token_string_t cmd_set_hash_input_set_field =
+   TOKEN_STRING_INITIALIZER(struct cmd_set_hash_input_set_result,
+   inset_field,
+   "src-ipv4#dst-ipv4#src-ipv6#dst-ipv6#udp-src-port#"
+   "udp-dst-port#tcp-src-port#tcp-dst-port#sctp-src-port#"
+   "sctp-dst-port#sctp-veri-tag#gre-ver#gre-proto-type#fld-1st#"
+   "fld-2nd#fld-3rd#fld-4th#fld-5th#fld-6th#fld-7th#fld-8th#all");
+cmdline_parse_token_string_t cmd_set_hash_input_set_enable =
+   TOKEN_STRING_INITIALIZER(struct 

[dpdk-dev] [PATCH v3 1/2] i40e: add RSS granularity configuration

[Helin Zhang]

The default fields of a received packet are loaded from firmware,
which cannot be modified even users want to use different fields
for RSS or filtering. Here adds a workaround to open more
flexibilities of selecting packet fields for hash calculation or
flow director to users.

Signed-off-by: Helin Zhang 
Signed-off-by: Andrey Chilikin 
---
 drivers/net/i40e/i40e_ethdev.c  | 628 
 drivers/net/i40e/i40e_ethdev.h  |   6 +
 drivers/net/i40e/i40e_fdir.c|  31 ++
 lib/librte_ether/rte_eth_ctrl.h | 108 ++-
 4 files changed, 769 insertions(+), 4 deletions(-)

v2 changes:
Solved the compilation issues.

v3 changes:
Support selecting more input set fields.

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 2dd9fdc..77e6906 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -113,6 +113,135 @@
 #define I40E_PRTTSYN_TSYNENA  0x8000
 #define I40E_PRTTSYN_TSYNTYPE 0x0e00

+#define I40E_PRTQF_FD_INSET(_i, _j)  (0x0025 + ((_i) * 64 + (_j) * 32))
+#define I40E_GLQF_FD_MSK(_i, _j) (0x00267200 + ((_i) * 4 + (_j) * 8))
+#define I40E_GLQF_HASH_INSET(_i, _j) (0x00267600 + ((_i) * 4 + (_j) * 8))
+#define I40E_GLQF_HASH_MSK(_i, _j)   (0x00267A00 + ((_i) * 4 + (_j) * 8))
+
+#define I40E_INSET_UNKNOWN0x0ULL
+
+/* bit0 ~ bit 7 */
+#define I40E_INSET_DMAC0x0001ULL
+#define I40E_INSET_SMAC0x0002ULL
+#define I40E_INSET_VLAN_OUTER  0x0004ULL
+#define I40E_INSET_VLAN_INNER  0x0008ULL
+#define I40E_INSET_VLAN_TUNNEL 0x0010ULL
+
+/* bit 8 ~ bit 15 */
+#define I40E_INSET_IPV4_SRC0x0100ULL
+#define I40E_INSET_IPV4_DST0x0200ULL
+#define I40E_INSET_IPV6_SRC0x0400ULL
+#define I40E_INSET_IPV6_DST0x0800ULL
+#define I40E_INSET_SRC_PORT0x1000ULL
+#define I40E_INSET_DST_PORT0x2000ULL
+#define I40E_INSET_SCTP_VT 0x4000ULL
+
+/* bit 16 ~ bit 31 */
+#define I40E_INSET_IPV4_TOS0x0001ULL
+#define I40E_INSET_IPV4_PROTO  0x0002ULL
+#define I40E_INSET_IPV4_TTL0x0004ULL
+#define I40E_INSET_IPV6_TC 0x0008ULL
+#define I40E_INSET_IPV6_FLOW   0x0010ULL
+#define I40E_INSET_IPV6_NEXT_HDR   0x0020ULL
+#define I40E_INSET_IPV6_HOP_LIMIT  0x0040ULL
+#define I40E_INSET_TCP_FLAGS   0x0080ULL
+
+/* bit 32 ~ bit 47, tunnel fields */
+#define I40E_INSET_TUNNEL_IPV4_DST   0x0001ULL
+#define I40E_INSET_TUNNEL_IPV6_DST   0x0002ULL
+#define I40E_INSET_TUNNEL_DMAC   0x0004ULL
+#define I40E_INSET_TUNNEL_SRC_PORT   0x0008ULL
+#define I40E_INSET_TUNNEL_DST_PORT   0x0010ULL
+#define I40E_INSET_TUNNEL_GRE_VER0x0020ULL
+#define I40E_INSET_TUNNEL_GRE_PROTO_TYPE 0x0040ULL
+#define I40E_INSET_TUNNEL_GRE_KEY0x0080ULL
+
+/* bit 48 ~ bit 55 */
+#define I40E_INSET_LAST_ETHER_TYPE 0x0001ULL
+
+/* bit 56 ~ bit 63, Flex Payload */
+#define I40E_INSET_FLEX_PAYLOAD_W1 0x0100ULL
+#define I40E_INSET_FLEX_PAYLOAD_W2 0x0200ULL
+#define I40E_INSET_FLEX_PAYLOAD_W3 0x0400ULL
+#define I40E_INSET_FLEX_PAYLOAD_W4 0x0800ULL
+#define I40E_INSET_FLEX_PAYLOAD_W5 0x1000ULL
+#define I40E_INSET_FLEX_PAYLOAD_W6 0x2000ULL
+#define I40E_INSET_FLEX_PAYLOAD_W7 0x4000ULL
+#define I40E_INSET_FLEX_PAYLOAD_W8 0x8000ULL
+#define I40E_INSET_FLEX_PAYLOAD \
+   (I40E_INSET_FLEX_PAYLOAD_W1 | I40E_INSET_FLEX_PAYLOAD_W2 | \
+   I40E_INSET_FLEX_PAYLOAD_W3 | I40E_INSET_FLEX_PAYLOAD_W3 | \
+   I40E_INSET_FLEX_PAYLOAD_W5 | I40E_INSET_FLEX_PAYLOAD_W6 | \
+   I40E_INSET_FLEX_PAYLOAD_W7 | I40E_INSET_FLEX_PAYLOAD_W8)
+
+#define I40E_INSET_ALL 0xULL
+
+/**
+ * Below are values for writing un-exposed registers suggested
+ * by silicon experts
+ */
+/* Destination MAC address */
+#define I40E_REG_INSET_L2_DMAC   0xE000ULL
+/* Source MAC address */
+#define I40E_REG_INSET_L2_SMAC   0x1C00ULL
+/* VLAN tag in the outer L2 header */
+#define I40E_REG_INSET_L2_OUTER_VLAN 0x0080ULL
+/* VLAN tag in the inner L2 header */
+#define I40E_REG_INSET_L2_INNER_VLAN 0x0100ULL
+/* Source IPv4 address */
+#define I40E_REG_INSET_L3_SRC_IP40x00018000ULL
+/* Destination IPv4 address */
+#define I40E_REG_INSET_L3_DST_IP40x0018ULL
+/* Source IPv6 address */
+#define I40E_REG_INSET_L3_SRC_IP60x0007F800ULL
+/* Destination IPv6 address */
+#define I40E_REG_INSET_L3_DST_IP6

[dpdk-dev] [PATCH v3 0/2] i40e: RSS granularity configuration

[Helin Zhang]

The default fields of a received packet are loaded from firmware,
which cannot be modified even users want to use different fields
for RSS or filtering. Here adds a workaround to open more
flexibilities of selecting packet fields for hash calculation or
flow director to users. It also includes the modifications in
testpmd to support the testing.

v2 changes:
Solved the compilation issues.

v3 changes:
Support selecting more input set fields.

Helin Zhang (2):
  i40e: add RSS granularity configuration
  app/testpmd: add test commands for RSS granularity

 app/test-pmd/cmdline.c  | 115 
 drivers/net/i40e/i40e_ethdev.c  | 628 
 drivers/net/i40e/i40e_ethdev.h  |   6 +
 drivers/net/i40e/i40e_fdir.c|  31 ++
 lib/librte_ether/rte_eth_ctrl.h | 108 ++-
 5 files changed, 884 insertions(+), 4 deletions(-)

-- 
1.9.3

[dpdk-dev] [PATCH] vhost: fix qemu shutdown issue

[Thomas Monjalon]

2015-08-20 12:01, Ouyang Changchun:
> This patch originates from the patch:
> [dpdk-dev] [PATCH 1/2] Patch for Qemu wrapper for US-VHost to ensure Qemu 
> process ends when VM is shutdown
> http://dpdk.org/ml/archives/dev/2014-June/003606.html
> 
> Aslo update the vhost sample guide doc.
> 
> Signed-off-by: Claire Murphy 
> Signed-off-by: Changchun Ouyang 

Applied, thanks

[dpdk-dev] RSS granularity configuration

[Chilikin, Andrey]

Hi Vinod,

Could you provide more information or probably an example of any "non-standard" 
packets?

Regards,
Andrey

-Original Message-
From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Krishna, Vinod
Sent: Thursday, September 24, 2015 12:55 PM
To: dev at dpdk.org
Subject: [dpdk-dev] RSS granularity configuration

Hi All,

RSS could me more flexible if it can support non-standard packets.

Thanks,
VK

-Original Message-
From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of dev-requ...@dpdk.org
Sent: Thursday, September 24, 2015 12:39 PM
To: dev at dpdk.org
Subject: dev Digest, Vol 59, Issue 28

Send dev mailing list submissions to
dev at dpdk.org

To subscribe or unsubscribe via the World Wide Web, visit
http://dpdk.org/ml/listinfo/dev
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When replying, please edit your Subject line so it is more specific than "Re: 
Contents of dev digest..."


Today's Topics:

   1. [PATCH v3 0/2] i40e: RSS granularity configuration (Helin Zhang)
   2. [PATCH v3 1/2] i40e: add RSS granularity configuration
  (Helin Zhang)


--

Message: 1
Date: Thu, 24 Sep 2015 15:08:15 +0800
From: Helin Zhang 
To: dev at dpdk.org
Cc: yulong.pei at intel.com
Subject: [dpdk-dev] [PATCH v3 0/2] i40e: RSS granularity configuration
Message-ID: <1443078497-20602-1-git-send-email-helin.zhang at intel.com>

The default fields of a received packet are loaded from firmware, which cannot 
be modified even users want to use different fields for RSS or filtering. Here 
adds a workaround to open more flexibilities of selecting packet fields for 
hash calculation or flow director to users. It also includes the modifications 
in testpmd to support the testing.

v2 changes:
Solved the compilation issues.

v3 changes:
Support selecting more input set fields.

Helin Zhang (2):
  i40e: add RSS granularity configuration
  app/testpmd: add test commands for RSS granularity

 app/test-pmd/cmdline.c  | 115 
 drivers/net/i40e/i40e_ethdev.c  | 628 
 drivers/net/i40e/i40e_ethdev.h  |   6 +
 drivers/net/i40e/i40e_fdir.c|  31 ++
 lib/librte_ether/rte_eth_ctrl.h | 108 ++-
 5 files changed, 884 insertions(+), 4 deletions(-)

--
1.9.3



--

Message: 2
Date: Thu, 24 Sep 2015 15:08:16 +0800
From: Helin Zhang 
To: dev at dpdk.org
Cc: yulong.pei at intel.com
Subject: [dpdk-dev] [PATCH v3 1/2] i40e: add RSS granularity
configuration
Message-ID: <1443078497-20602-2-git-send-email-helin.zhang at intel.com>

The default fields of a received packet are loaded from firmware, which cannot 
be modified even users want to use different fields for RSS or filtering. Here 
adds a workaround to open more flexibilities of selecting packet fields for 
hash calculation or flow director to users.

Signed-off-by: Helin Zhang 
Signed-off-by: Andrey Chilikin 
---
 drivers/net/i40e/i40e_ethdev.c  | 628 
 drivers/net/i40e/i40e_ethdev.h  |   6 +
 drivers/net/i40e/i40e_fdir.c|  31 ++
 lib/librte_ether/rte_eth_ctrl.h | 108 ++-
 4 files changed, 769 insertions(+), 4 deletions(-)

v2 changes:
Solved the compilation issues.

v3 changes:
Support selecting more input set fields.

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c 
index 2dd9fdc..77e6906 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -113,6 +113,135 @@
 #define I40E_PRTTSYN_TSYNENA  0x8000  #define I40E_PRTTSYN_TSYNTYPE 
0x0e00

+#define I40E_PRTQF_FD_INSET(_i, _j)  (0x0025 + ((_i) * 64 + (_j) * 32))
+#define I40E_GLQF_FD_MSK(_i, _j) (0x00267200 + ((_i) * 4 + (_j) * 8))
+#define I40E_GLQF_HASH_INSET(_i, _j) (0x00267600 + ((_i) * 4 + (_j) * 8))
+#define I40E_GLQF_HASH_MSK(_i, _j)   (0x00267A00 + ((_i) * 4 + (_j) * 8))
+
+#define I40E_INSET_UNKNOWN0x0ULL
+
+/* bit0 ~ bit 7 */
+#define I40E_INSET_DMAC0x0001ULL
+#define I40E_INSET_SMAC0x0002ULL
+#define I40E_INSET_VLAN_OUTER  0x0004ULL
+#define I40E_INSET_VLAN_INNER  0x0008ULL
+#define I40E_INSET_VLAN_TUNNEL 0x0010ULL
+
+/* bit 8 ~ bit 15 */
+#define I40E_INSET_IPV4_SRC0x0100ULL
+#define I40E_INSET_IPV4_DST0x0200ULL
+#define I40E_INSET_IPV6_SRC0x0400ULL
+#define I40E_INSET_IPV6_DST0x0800ULL
+#define I40E_INSET_SRC_PORT0x1000ULL
+#define I40E_INSET_DST_PORT0x2000ULL
+#define I40E_INSET_SCTP_VT 0x4000ULL
+
+/* bit 16 ~ bit 31 */
+#define I40E_INSET_IPV4_TOS0x0001ULL
+#define 

[dpdk-dev] [PATCH 8/8] app/testpmd: set up DCB forwarding based on traffic class

[Jingjing Wu]

This patch changes the testpmd DCB forwarding stream to make it
based on traffic class.
It also fixes some coding style issues.

Signed-off-by: Jingjing Wu 
---
 app/test-pmd/cmdline.c |  39 +++-
 app/test-pmd/config.c  | 159 +
 app/test-pmd/testpmd.c | 151 +-
 app/test-pmd/testpmd.h |  23 +--
 4 files changed, 176 insertions(+), 196 deletions(-)

diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 0f8f48f..2ec855f 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -1999,37 +1999,46 @@ cmd_config_dcb_parsed(void *parsed_result,
 __attribute__((unused)) void *data)
 {
struct cmd_config_dcb *res = parsed_result;
-   struct dcb_config dcb_conf;
portid_t port_id = res->port_id;
struct rte_port *port;
+   uint8_t pfc_en;
+   int ret;

port = [port_id];
/** Check if the port is not started **/
if (port->port_status != RTE_PORT_STOPPED) {
-   printf("Please stop port %d first\n",port_id);
+   printf("Please stop port %d first\n", port_id);
return;
}

-   dcb_conf.num_tcs = (enum rte_eth_nb_tcs) res->num_tcs;
-   if ((dcb_conf.num_tcs != ETH_4_TCS) && (dcb_conf.num_tcs != ETH_8_TCS)){
-   printf("The invalid number of traffic class,only 4 or 8 
allowed\n");
+   if ((res->num_tcs != ETH_4_TCS) && (res->num_tcs != ETH_8_TCS)) {
+   printf("The invalid number of traffic class,"
+   " only 4 or 8 allowed.\n");
return;
}

-   /* DCB in VT mode */
-   if (!strncmp(res->vt_en, "on",2))
-   dcb_conf.dcb_mode = DCB_VT_ENABLED;
+   if (nb_fwd_lcores < res->num_tcs) {
+   printf("nb_cores shouldn't be less than number of TCs.\n");
+   return;
+   }
+   if (!strncmp(res->pfc_en, "on", 2))
+   pfc_en = 1;
else
-   dcb_conf.dcb_mode = DCB_ENABLED;
+   pfc_en = 0;

-   if (!strncmp(res->pfc_en, "on",2)) {
-   dcb_conf.pfc_en = 1;
-   }
+   /* DCB in VT mode */
+   if (!strncmp(res->vt_en, "on", 2))
+   ret = init_port_dcb_config(port_id, DCB_VT_ENABLED,
+   (enum rte_eth_nb_tcs)res->num_tcs,
+   pfc_en);
else
-   dcb_conf.pfc_en = 0;
+   ret = init_port_dcb_config(port_id, DCB_ENABLED,
+   (enum rte_eth_nb_tcs)res->num_tcs,
+   pfc_en);
+

-   if (init_port_dcb_config(port_id,_conf) != 0) {
-   printf("Cannot initialize network ports\n");
+   if (ret != 0) {
+   printf("Cannot initialize network ports.\n");
return;
}

diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index cf2aa6e..e10da57 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -1128,113 +1128,92 @@ rss_fwd_config_setup(void)
}
 }

-/*
- * In DCB and VT on,the mapping of 128 receive queues to 128 transmit queues.
- */
-static void
-dcb_rxq_2_txq_mapping(queueid_t rxq, queueid_t *txq)
-{
-   if(dcb_q_mapping == DCB_4_TCS_Q_MAPPING) {
-
-   if (rxq < 32)
-   /* tc0: 0-31 */
-   *txq = rxq;
-   else if (rxq < 64) {
-   /* tc1: 64-95 */
-   *txq =  (uint16_t)(rxq + 32);
-   }
-   else {
-   /* tc2: 96-111;tc3:112-127 */
-   *txq =  (uint16_t)(rxq/2 + 64);
-   }
-   }
-   else {
-   if (rxq < 16)
-   /* tc0 mapping*/
-   *txq = rxq;
-   else if (rxq < 32) {
-   /* tc1 mapping*/
-*txq = (uint16_t)(rxq + 16);
-   }
-   else if (rxq < 64) {
-   /*tc2,tc3 mapping */
-   *txq =  (uint16_t)(rxq + 32);
-   }
-   else {
-   /* tc4,tc5,tc6 and tc7 mapping */
-   *txq =  (uint16_t)(rxq/2 + 64);
-   }
-   }
-}
-
 /**
- * For the DCB forwarding test, each core is assigned on every port 
multi-transmit
- * queue.
+ * For the DCB forwarding test, each core is assigned on each traffic class.
  *
  * Each core is assigned a multi-stream, each stream being composed of
  * a RX queue to poll on a RX port for input messages, associated with
- * a TX queue of a TX port where to send forwarded packets.
- * All packets received on the RX queue of index "RxQj" of the RX port "RxPi"
- * are sent on the TX queue "TxQl" of the TX port "TxPk" according to the two
- * following rules:
- * In VT mode,
- *- TxPk = (RxPi + 1) if RxPi is even, (RxPi - 1) if 

[dpdk-dev] [PATCH 7/8] i40e: get_dcb_info ops implement

[Jingjing Wu]

This patch implements the get_dcb_info ops in i40e driver.

Signed-off-by: Jingjing Wu 
---
 drivers/net/i40e/i40e_ethdev.c | 42 ++
 1 file changed, 42 insertions(+)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 7d252fa..76e2353 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -220,6 +220,8 @@ static int i40e_dev_filter_ctrl(struct rte_eth_dev *dev,
enum rte_filter_type filter_type,
enum rte_filter_op filter_op,
void *arg);
+static void i40e_dev_get_dcb_info(struct rte_eth_dev *dev,
+ struct rte_eth_dcb_info *dcb_info);
 static void i40e_configure_registers(struct i40e_hw *hw);
 static void i40e_hw_init(struct i40e_hw *hw);
 static int i40e_config_qinq(struct i40e_hw *hw, struct i40e_vsi *vsi);
@@ -292,6 +294,7 @@ static const struct eth_dev_ops i40e_eth_dev_ops = {
.timesync_disable = i40e_timesync_disable,
.timesync_read_rx_timestamp   = i40e_timesync_read_rx_timestamp,
.timesync_read_tx_timestamp   = i40e_timesync_read_tx_timestamp,
+   .get_dcb_info = i40e_dev_get_dcb_info,
 };

 static struct eth_driver rte_i40e_pmd = {
@@ -6808,3 +6811,42 @@ i40e_dcb_setup(struct rte_eth_dev *dev)
}
return 0;
 }
+
+static void
+i40e_dev_get_dcb_info(struct rte_eth_dev *dev,
+ struct rte_eth_dcb_info *dcb_info)
+{
+   struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
+   struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+   struct i40e_vsi *vsi = pf->main_vsi;
+   struct i40e_dcbx_config *dcb_cfg = >local_dcbx_config;
+   uint16_t bsf, tc_mapping;
+   int i;
+
+   if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_DCB_FLAG)
+   dcb_info->nb_tcs =
+   dev->data->dev_conf.rx_adv_conf.dcb_rx_conf.nb_tcs;
+   else
+   dcb_info->nb_tcs = 1;
+   for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
+   dcb_info->prio_tc[i] = dcb_cfg->etscfg.prioritytable[i];
+   for (i = 0; i < dcb_info->nb_tcs; i++)
+   dcb_info->tc_bws[i] = dcb_cfg->etscfg.tcbwtable[i];
+
+   for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
+   if (vsi->enabled_tc & (1 << i)) {
+   tc_mapping = rte_le_to_cpu_16(vsi->info.tc_mapping[i]);
+   /* only main vsi support multi TCs */
+   dcb_info->tc_queue.tc_rxq[0][i].base =
+   (tc_mapping & I40E_AQ_VSI_TC_QUE_OFFSET_MASK) >>
+   I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT;
+   dcb_info->tc_queue.tc_txq[0][i].base =
+   dcb_info->tc_queue.tc_rxq[0][i].base;
+   bsf = (tc_mapping & I40E_AQ_VSI_TC_QUE_NUMBER_MASK) >>
+   I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT;
+   dcb_info->tc_queue.tc_rxq[0][i].nb_queue = 1 << bsf;
+   dcb_info->tc_queue.tc_txq[0][i].nb_queue =
+   dcb_info->tc_queue.tc_rxq[0][i].nb_queue;
+   }
+   }
+}
-- 
2.4.0

[dpdk-dev] [PATCH 6/8] ixgbe: get_dcb_info ops implement

[Jingjing Wu]

This patch implements the get_dcb_info ops in ixgbe driver.

Signed-off-by: Jingjing Wu 
---
 drivers/net/ixgbe/ixgbe_ethdev.c | 77 
 1 file changed, 77 insertions(+)

diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index a7dca55..91944bc 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -304,6 +304,8 @@ static int ixgbevf_dev_set_mtu(struct rte_eth_dev *dev, 
uint16_t mtu);
 static int ixgbe_dev_set_mc_addr_list(struct rte_eth_dev *dev,
  struct ether_addr *mc_addr_set,
  uint32_t nb_mc_addr);
+static void ixgbe_dev_get_dcb_info(struct rte_eth_dev *dev,
+  struct rte_eth_dcb_info *dcb_info);

 static int ixgbe_get_reg_length(struct rte_eth_dev *dev);
 static int ixgbe_get_regs(struct rte_eth_dev *dev,
@@ -465,6 +467,7 @@ static const struct eth_dev_ops ixgbe_eth_dev_ops = {
.get_eeprom_length= ixgbe_get_eeprom_length,
.get_eeprom   = ixgbe_get_eeprom,
.set_eeprom   = ixgbe_set_eeprom,
+   .get_dcb_info = ixgbe_dev_get_dcb_info,
 };

 /*
@@ -5644,6 +5647,80 @@ ixgbe_set_eeprom(struct rte_eth_dev *dev,
return eeprom->ops.write_buffer(hw,  first, length, data);
 }

+static void
+ixgbe_dev_get_dcb_info(struct rte_eth_dev *dev,
+   struct rte_eth_dcb_info *dcb_info)
+{
+   struct ixgbe_dcb_config *dcb_config =
+   IXGBE_DEV_PRIVATE_TO_DCB_CFG(dev->data->dev_private);
+   uint8_t i, j;
+
+   if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_DCB_FLAG)
+   dcb_info->nb_tcs = dcb_config->num_tcs.pg_tcs;
+   else
+   dcb_info->nb_tcs = 1;
+
+   if (dcb_config->vt_mode) { /* vt is enabled*/
+   struct rte_eth_vmdq_dcb_conf *vmdq_rx_conf =
+   >data->dev_conf.rx_adv_conf.vmdq_dcb_conf;
+   for (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++)
+   dcb_info->prio_tc[i] = vmdq_rx_conf->dcb_tc[i];
+   for (i = 0; i < vmdq_rx_conf->nb_queue_pools; i++) {
+   for (j = 0; j < dcb_info->nb_tcs; j++) {
+   dcb_info->tc_queue.tc_rxq[i][j].base =
+   i * dcb_info->nb_tcs + j;
+   dcb_info->tc_queue.tc_rxq[i][j].nb_queue = 1;
+   dcb_info->tc_queue.tc_txq[i][j].base =
+   i * dcb_info->nb_tcs + j;
+   dcb_info->tc_queue.tc_txq[i][j].nb_queue = 1;
+   }
+   }
+   } else { /* vt is disabled*/
+   struct rte_eth_dcb_rx_conf *rx_conf =
+   >data->dev_conf.rx_adv_conf.dcb_rx_conf;
+   for (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++)
+   dcb_info->prio_tc[i] = rx_conf->dcb_tc[i];
+   if (dcb_info->nb_tcs == ETH_4_TCS) {
+   for (i = 0; i < dcb_info->nb_tcs; i++) {
+   dcb_info->tc_queue.tc_rxq[0][i].base = i * 32;
+   dcb_info->tc_queue.tc_rxq[0][i].nb_queue = 16;
+   }
+   dcb_info->tc_queue.tc_txq[0][0].base = 0;
+   dcb_info->tc_queue.tc_txq[0][1].base = 64;
+   dcb_info->tc_queue.tc_txq[0][2].base = 96;
+   dcb_info->tc_queue.tc_txq[0][3].base = 112;
+   dcb_info->tc_queue.tc_txq[0][0].nb_queue = 64;
+   dcb_info->tc_queue.tc_txq[0][1].nb_queue = 32;
+   dcb_info->tc_queue.tc_txq[0][2].nb_queue = 16;
+   dcb_info->tc_queue.tc_txq[0][3].nb_queue = 16;
+   } else if (dcb_info->nb_tcs == ETH_8_TCS) {
+   for (i = 0; i < dcb_info->nb_tcs; i++) {
+   dcb_info->tc_queue.tc_rxq[0][i].base = i * 16;
+   dcb_info->tc_queue.tc_rxq[0][i].nb_queue = 16;
+   }
+   dcb_info->tc_queue.tc_txq[0][0].base = 0;
+   dcb_info->tc_queue.tc_txq[0][1].base = 32;
+   dcb_info->tc_queue.tc_txq[0][2].base = 64;
+   dcb_info->tc_queue.tc_txq[0][3].base = 80;
+   dcb_info->tc_queue.tc_txq[0][4].base = 96;
+   dcb_info->tc_queue.tc_txq[0][5].base = 104;
+   dcb_info->tc_queue.tc_txq[0][6].base = 112;
+   dcb_info->tc_queue.tc_txq[0][7].base = 120;
+   dcb_info->tc_queue.tc_txq[0][0].nb_queue = 32;
+   dcb_info->tc_queue.tc_txq[0][1].nb_queue = 32;
+   dcb_info->tc_queue.tc_txq[0][2].nb_queue = 16;
+   

[dpdk-dev] [PATCH 5/8] ethdev: new API to get dcb related information

[Jingjing Wu]

This patch adds one new API to get dcb related info.
  rte_eth_dev_get_dcb_info

Signed-off-by: Jingjing Wu 
---
 lib/librte_ether/rte_ethdev.c | 18 
 lib/librte_ether/rte_ethdev.h | 50 +++
 2 files changed, 68 insertions(+)

diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c
index f4bbca6..44a2d55 100644
--- a/lib/librte_ether/rte_ethdev.c
+++ b/lib/librte_ether/rte_ethdev.c
@@ -3371,3 +3371,21 @@ rte_eth_dev_set_eeprom(uint8_t port_id, struct 
rte_dev_eeprom_info *info)
FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
return (*dev->dev_ops->set_eeprom)(dev, info);
 }
+
+void
+rte_eth_dev_get_dcb_info(uint8_t port_id,
+struct rte_eth_dcb_info *dcb_info)
+{
+   struct rte_eth_dev *dev;
+
+   if (!rte_eth_dev_is_valid_port(port_id)) {
+   PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id);
+   return;
+   }
+
+   dev = _eth_devices[port_id];
+   memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
+
+   FUNC_PTR_OR_RET(*dev->dev_ops->get_dcb_info);
+   (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
+}
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index 0aa00a6..e6b7271 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -962,6 +962,38 @@ struct rte_eth_xstats {
uint64_t value;
 };

+#define ETH_DCB_NUM_TCS8
+#define ETH_MAX_VMDQ_POOL  64
+
+/**
+ * A structure used to get the information of queue and
+ * TC mapping on both TX and RX paths.
+ */
+struct rte_eth_dcb_tc_queue_mapping {
+   /** rx queues assigned to tc per Pool */
+   struct {
+   uint8_t base;
+   uint8_t nb_queue;
+   } tc_rxq[ETH_MAX_VMDQ_POOL][ETH_DCB_NUM_TCS];
+   /** rx queues assigned to tc per Pool */
+   struct {
+   uint8_t base;
+   uint8_t nb_queue;
+   } tc_txq[ETH_MAX_VMDQ_POOL][ETH_DCB_NUM_TCS];
+};
+
+/**
+ * A structure used to get the information of DCB.
+ * It includes TC UP mapping and queue TC mapping.
+ */
+struct rte_eth_dcb_info {
+   uint8_t nb_tcs;/**< number of TCs */
+   uint8_t prio_tc[ETH_DCB_NUM_USER_PRIORITIES]; /**< Priority to tc */
+   uint8_t tc_bws[ETH_DCB_NUM_TCS]; /**< TX BW percentage for each TC */
+   /** rx queues assigned to tc */
+   struct rte_eth_dcb_tc_queue_mapping tc_queue;
+};
+
 struct rte_eth_dev;

 struct rte_eth_dev_callback;
@@ -1354,6 +1386,10 @@ typedef int (*eth_filter_ctrl_t)(struct rte_eth_dev *dev,
 void *arg);
 /**< @internal Take operations to assigned filter type on an Ethernet device */

+typedef void (*eth_get_dcb_info)(struct rte_eth_dev *dev,
+struct rte_eth_dcb_info *dcb_info);
+/**< @internal Get dcb information on an Ethernet device */
+
 /**
  * @internal A structure containing the functions exported by an Ethernet 
driver.
  */
@@ -1476,6 +1512,9 @@ struct eth_dev_ops {
eth_timesync_read_rx_timestamp_t timesync_read_rx_timestamp;
/** Read the IEEE1588/802.1AS TX timestamp. */
eth_timesync_read_tx_timestamp_t timesync_read_tx_timestamp;
+
+   /** Get DCB information */
+   eth_get_dcb_info get_dcb_info;
 };

 /**
@@ -3701,6 +3740,17 @@ int rte_eth_dev_filter_ctrl(uint8_t port_id, enum 
rte_filter_type filter_type,
enum rte_filter_op filter_op, void *arg);

 /**
+ * Get DCB information on an Ethernet device.
+ *
+ * @param port_id
+ *   The port identifier of the Ethernet device.
+ * @param dcb_info
+ *   dcb information.
+ */
+void rte_eth_dev_get_dcb_info(uint8_t port_id,
+struct rte_eth_dcb_info *dcb_info);
+
+/**
  * Add a callback to be called on packet RX on a given port and queue.
  *
  * This API configures a function to be called for each burst of
-- 
2.4.0

[dpdk-dev] [PATCH 4/8] ixgbe: enable DCB+RSS multi-queue mode

[Jingjing Wu]

This patch enables DCB+RSS multi-queue mode, and also fix some coding
style.

Signed-off-by: Jingjing Wu 
---
 drivers/net/ixgbe/ixgbe_rxtx.c | 48 +-
 1 file changed, 29 insertions(+), 19 deletions(-)

diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index d331ef5..1dc05f0 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -3144,9 +3144,13 @@ ixgbe_dcb_rx_hw_config(struct ixgbe_hw *hw,
reg = (reg & ~IXGBE_MRQC_MRQE_MASK) |
IXGBE_MRQC_VMDQRT4TCEN;
else {
+   /* no matter the mode is DCB or DCB_RSS, just
+* set the MRQE to RSSXTCEN. RSS is controlled
+* by RSS_FIELD
+*/
IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, 0);
reg = (reg & ~IXGBE_MRQC_MRQE_MASK) |
-   IXGBE_MRQC_RT4TCEN;
+   IXGBE_MRQC_RTRSS4TCEN;
}
}
if (dcb_config->num_tcs.pg_tcs == 8) {
@@ -3156,7 +3160,7 @@ ixgbe_dcb_rx_hw_config(struct ixgbe_hw *hw,
else {
IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, 0);
reg = (reg & ~IXGBE_MRQC_MRQE_MASK) |
-   IXGBE_MRQC_RT8TCEN;
+   IXGBE_MRQC_RTRSS8TCEN;
}
}

@@ -3261,16 +3265,17 @@ ixgbe_dcb_hw_configure(struct rte_eth_dev *dev,
 *get dcb and VT rx configuration parameters
 *from rte_eth_conf
 */
-   ixgbe_vmdq_dcb_rx_config(dev,dcb_config);
+   ixgbe_vmdq_dcb_rx_config(dev, dcb_config);
/*Configure general VMDQ and DCB RX parameters*/
ixgbe_vmdq_dcb_configure(dev);
}
break;
case ETH_MQ_RX_DCB:
+   case ETH_MQ_RX_DCB_RSS:
dcb_config->vt_mode = false;
config_dcb_rx = DCB_RX_CONFIG;
/* Get dcb TX configuration parameters from rte_eth_conf */
-   ixgbe_dcb_rx_config(dev,dcb_config);
+   ixgbe_dcb_rx_config(dev, dcb_config);
/*Configure general DCB RX parameters*/
ixgbe_dcb_rx_hw_config(hw, dcb_config);
break;
@@ -3292,7 +3297,7 @@ ixgbe_dcb_hw_configure(struct rte_eth_dev *dev,
dcb_config->vt_mode = false;
config_dcb_tx = DCB_TX_CONFIG;
/*get DCB TX configuration parameters from rte_eth_conf*/
-   ixgbe_dcb_tx_config(dev,dcb_config);
+   ixgbe_dcb_tx_config(dev, dcb_config);
/*Configure general DCB TX parameters*/
ixgbe_dcb_tx_hw_config(hw, dcb_config);
break;
@@ -3433,14 +3438,15 @@ void ixgbe_configure_dcb(struct rte_eth_dev *dev)

/* check support mq_mode for DCB */
if ((dev_conf->rxmode.mq_mode != ETH_MQ_RX_VMDQ_DCB) &&
-   (dev_conf->rxmode.mq_mode != ETH_MQ_RX_DCB))
+   (dev_conf->rxmode.mq_mode != ETH_MQ_RX_DCB) &&
+   (dev_conf->rxmode.mq_mode != ETH_MQ_RX_DCB_RSS))
return;

if (dev->data->nb_rx_queues != ETH_DCB_NUM_QUEUES)
return;

/** Configure DCB hardware **/
-   ixgbe_dcb_hw_configure(dev,dcb_cfg);
+   ixgbe_dcb_hw_configure(dev, dcb_cfg);

return;
 }
@@ -3682,21 +3688,25 @@ ixgbe_dev_mq_rx_configure(struct rte_eth_dev *dev)
 * any DCB/RSS w/o VMDq multi-queue setting
 */
switch (dev->data->dev_conf.rxmode.mq_mode) {
-   case ETH_MQ_RX_RSS:
-   ixgbe_rss_configure(dev);
-   break;
+   case ETH_MQ_RX_RSS:
+   case ETH_MQ_RX_DCB_RSS:
+   case ETH_MQ_RX_VMDQ_RSS:
+   ixgbe_rss_configure(dev);
+   break;

-   case ETH_MQ_RX_VMDQ_DCB:
-   ixgbe_vmdq_dcb_configure(dev);
-   break;
+   case ETH_MQ_RX_VMDQ_DCB:
+   ixgbe_vmdq_dcb_configure(dev);
+   break;

-   case ETH_MQ_RX_VMDQ_ONLY:
-   ixgbe_vmdq_rx_hw_configure(dev);
-   break;
+   case ETH_MQ_RX_VMDQ_ONLY:
+   ixgbe_vmdq_rx_hw_configure(dev);
+   break;

-   case ETH_MQ_RX_NONE:
-   /* if mq_mode is none, disable rss mode.*/
-

[dpdk-dev] [PATCH 3/8] i40e: enable DCB feature on FVL

[Jingjing Wu]

This patch enables DCB feature on Intel XL710/X710 NICs. It includes:
  Receive queue classification based on traffic class
  Round Robin ETS schedule (rx and tx)
  Priority flow control

Signed-off-by: Jingjing Wu 
---
 drivers/net/i40e/i40e_ethdev.c | 532 -
 drivers/net/i40e/i40e_ethdev.h |  14 ++
 drivers/net/i40e/i40e_rxtx.c   |  32 ++-
 drivers/net/i40e/i40e_rxtx.h   |   2 +
 4 files changed, 567 insertions(+), 13 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 2dd9fdc..7d252fa 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -56,6 +56,7 @@
 #include "base/i40e_adminq_cmd.h"
 #include "base/i40e_type.h"
 #include "base/i40e_register.h"
+#include "base/i40e_dcb.h"
 #include "i40e_ethdev.h"
 #include "i40e_rxtx.h"
 #include "i40e_pf.h"
@@ -166,6 +167,8 @@ static int i40e_pf_parameter_init(struct rte_eth_dev *dev);
 static int i40e_pf_setup(struct i40e_pf *pf);
 static int i40e_dev_rxtx_init(struct i40e_pf *pf);
 static int i40e_vmdq_setup(struct rte_eth_dev *dev);
+static int i40e_dcb_init_configure(struct rte_eth_dev *dev, bool sw_dcb);
+static int i40e_dcb_setup(struct rte_eth_dev *dev);
 static void i40e_stat_update_32(struct i40e_hw *hw, uint32_t reg,
bool offset_loaded, uint64_t *offset, uint64_t *stat);
 static void i40e_stat_update_48(struct i40e_hw *hw,
@@ -469,11 +472,6 @@ eth_i40e_dev_init(struct rte_eth_dev *dev)
 ((hw->nvm.version >> 4) & 0xff),
 (hw->nvm.version & 0xf), hw->nvm.eetrack);

-   /* Disable LLDP */
-   ret = i40e_aq_stop_lldp(hw, true, NULL);
-   if (ret != I40E_SUCCESS) /* Its failure can be ignored */
-   PMD_INIT_LOG(INFO, "Failed to stop lldp");
-
/* Clear PXE mode */
i40e_clear_pxe_mode(hw);

@@ -588,6 +586,13 @@ eth_i40e_dev_init(struct rte_eth_dev *dev)
/* initialize mirror rule list */
TAILQ_INIT(>mirror_list);

+   /* Init dcb to sw mode by default */
+   ret = i40e_dcb_init_configure(dev, TRUE);
+   if (ret != I40E_SUCCESS) {
+   PMD_INIT_LOG(INFO, "Failed to init dcb.");
+   pf->flags &= ~I40E_FLAG_DCB;
+   }
+
return 0;

 err_mac_alloc:
@@ -709,6 +714,15 @@ i40e_dev_configure(struct rte_eth_dev *dev)
if (ret)
goto err;
}
+
+   if (mq_mode & ETH_MQ_RX_DCB_FLAG) {
+   ret = i40e_dcb_setup(dev);
+   if (ret) {
+   PMD_DRV_LOG(ERR, "failed to configure DCB.");
+   goto err;
+   }
+   }
+
return 0;
 err:
i40e_fdir_teardown(pf);
@@ -2313,6 +2327,9 @@ i40e_pf_parameter_init(struct rte_eth_dev *dev)
 */
}

+   if (hw->func_caps.dcb)
+   pf->flags |= I40E_FLAG_DCB;
+
if (sum_vsis > pf->max_num_vsi ||
sum_queues > hw->func_caps.num_rx_qp) {
PMD_INIT_LOG(ERR, "VSI/QUEUE setting can't be satisfied");
@@ -2718,7 +2735,7 @@ i40e_vsi_config_tc_queue_mapping(struct i40e_vsi *vsi,
 struct i40e_aqc_vsi_properties_data *info,
 uint8_t enabled_tcmap)
 {
-   int ret, total_tc = 0, i;
+   int ret, i, total_tc = 0;
uint16_t qpnum_per_tc, bsf, qp_idx;

ret = validate_tcmap_parameter(vsi, enabled_tcmap);
@@ -5269,11 +5286,6 @@ i40e_pf_config_mq_rx(struct i40e_pf *pf)
int ret = 0;
enum rte_eth_rx_mq_mode mq_mode = pf->dev_data->dev_conf.rxmode.mq_mode;

-   if (mq_mode & ETH_MQ_RX_DCB_FLAG) {
-   PMD_INIT_LOG(ERR, "i40e doesn't support DCB yet");
-   return -ENOTSUP;
-   }
-
/* RSS setup */
if (mq_mode & ETH_MQ_RX_RSS_FLAG)
ret = i40e_pf_config_rss(pf);
@@ -6298,3 +6310,501 @@ i40e_timesync_read_tx_timestamp(struct rte_eth_dev *dev,

return  0;
 }
+
+/* return bit map of enabled traffic classes, should be nonzero */
+static inline uint8_t
+nb2bitmap(uint8_t nb_tcs)
+{
+   int i;
+   uint8_t tc_map = 0;
+
+   if (nb_tcs > I40E_MAX_TRAFFIC_CLASS)
+   return UINT8_MAX;
+   if (nb_tcs == 0)
+   return 1; /* tc0 only */
+
+   for (i = 0; i < nb_tcs; i++)
+   tc_map |= (uint8_t)1 << i;
+
+   return tc_map;
+}
+
+/*
+ * i40e_parse_dcb_configure - parse dcb configure from user
+ * @dev: the device being configured
+ * @dcb_cfg: pointer of the result of parse
+ * @*tc_map: bit map of enabled traffic classes
+ *
+ * Returns 0 on success, negative value on failure
+ */
+static int
+i40e_parse_dcb_configure(struct rte_eth_dev *dev,
+struct i40e_dcbx_config *dcb_cfg,
+uint8_t *tc_map)
+{
+   struct rte_eth_dcb_rx_conf *dcb_rx_conf;
+   uint8_t i, tc_bw, bw_lf;
+
+   memset(dcb_cfg, 0, sizeof(struct 

[dpdk-dev] [PATCH 2/8] ethdev: move the multi-queue checking to specific drivers

[Jingjing Wu]

Differnet NIC has its specific constraint on the multi-queue
configuration, so move the checking from ethdev lib to drivers.

Signed-off-by: Jingjing Wu 
---
 drivers/net/e1000/igb_ethdev.c   |  84 -
 drivers/net/ixgbe/ixgbe_ethdev.c | 171 +
 drivers/net/ixgbe/ixgbe_ethdev.h |   3 +
 lib/librte_ether/rte_ethdev.c| 199 ---
 4 files changed, 257 insertions(+), 200 deletions(-)

diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c
index 848ef6e..d9c13d9 100644
--- a/drivers/net/e1000/igb_ethdev.c
+++ b/drivers/net/e1000/igb_ethdev.c
@@ -866,16 +866,98 @@ rte_igbvf_pmd_init(const char *name __rte_unused, const 
char *params __rte_unuse
 }

 static int
+igb_check_mq_mode(struct rte_eth_dev *dev)
+{
+   enum rte_eth_rx_mq_mode rx_mq_mode = dev->data->dev_conf.rxmode.mq_mode;
+   enum rte_eth_tx_mq_mode tx_mq_mode = dev->data->dev_conf.txmode.mq_mode;
+   uint16_t nb_rx_q = dev->data->nb_rx_queues;
+   uint16_t nb_tx_q = dev->data->nb_rx_queues;
+
+   if ((rx_mq_mode & ETH_MQ_RX_DCB_FLAG) ||
+   tx_mq_mode == ETH_MQ_TX_DCB ||
+   tx_mq_mode == ETH_MQ_TX_VMDQ_DCB) {
+   PMD_INIT_LOG(ERR, "DCB mode is not supported.");
+   return -EINVAL;
+   }
+   if (RTE_ETH_DEV_SRIOV(dev).active != 0) {
+   /* Check multi-queue mode.
+* To no break software we accept ETH_MQ_RX_NONE as this might
+* be used to turn off VLAN filter.
+*/
+
+   if (rx_mq_mode == ETH_MQ_RX_NONE ||
+   rx_mq_mode == ETH_MQ_RX_VMDQ_ONLY) {
+   dev->data->dev_conf.rxmode.mq_mode = 
ETH_MQ_RX_VMDQ_ONLY;
+   RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool = 1;
+   } else {
+   /* Only support one queue on VFs.
+* RSS together with SRIOV is not supported.
+*/
+   PMD_INIT_LOG(ERR, "SRIOV is active,"
+   " wrong mq_mode rx %d.",
+   rx_mq_mode);
+   return -EINVAL;
+   }
+   /* TX mode is not used here, so mode might be ignored.*/
+   if (tx_mq_mode != ETH_MQ_TX_VMDQ_ONLY) {
+   /* SRIOV only works in VMDq enable mode */
+   PMD_INIT_LOG(WARNING, "SRIOV is active,"
+   " TX mode %d is not supported. "
+   " Driver will behave as %d mode.",
+   tx_mq_mode, ETH_MQ_TX_VMDQ_ONLY);
+   }
+
+   /* check valid queue number */
+   if ((nb_rx_q > 1) || (nb_tx_q > 1)) {
+   PMD_INIT_LOG(ERR, "SRIOV is active,"
+   " only support one queue on VFs.");
+   return -EINVAL;
+   }
+   } else {
+   /* To no break software that set invalid mode, only display
+* warning if invalid mode is used.
+*/
+   if (rx_mq_mode != ETH_MQ_RX_NONE &&
+   rx_mq_mode != ETH_MQ_RX_VMDQ_ONLY &&
+   rx_mq_mode != ETH_MQ_RX_RSS) {
+   /* RSS together with VMDq not supported*/
+   PMD_INIT_LOG(ERR, "RX mode %d is not supported.",
+rx_mq_mode);
+   return -EINVAL;
+   }
+
+   if (tx_mq_mode != ETH_MQ_TX_NONE &&
+   tx_mq_mode != ETH_MQ_TX_VMDQ_ONLY) {
+   PMD_INIT_LOG(WARNING, "TX mode %d is not supported."
+   " Due to txmode is meaningless in this"
+   " driver, just ignore.",
+   tx_mq_mode);
+   }
+   }
+   return 0;
+}
+
+static int
 eth_igb_configure(struct rte_eth_dev *dev)
 {
struct e1000_interrupt *intr =
E1000_DEV_PRIVATE_TO_INTR(dev->data->dev_private);
+   int ret;

PMD_INIT_FUNC_TRACE();
+
+   /* multipe queue mode checking */
+   ret  = igb_check_mq_mode(dev);
+   if (ret != 0) {
+   PMD_DRV_LOG(ERR, "igb_check_mq_mode fails with %d.",
+   ret);
+   return ret;
+   }
+
intr->flags |= E1000_FLAG_NEED_LINK_UPDATE;
PMD_INIT_FUNC_TRACE();

-   return (0);
+   return 0;
 }

 static int
diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index ec2918c..a7dca55 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -1636,14 +1636,185 @@ ixgbe_vmdq_vlan_hw_filter_enable(struct rte_eth_dev 
*dev)
 }

 static int
+ixgbe_check_vf_rss_rxq_num(struct rte_eth_dev 

[dpdk-dev] [PATCH 1/8] ethdev: rename dcb_queue to dcb_tc in dcb config struct

[Jingjing Wu]

Signed-off-by: Jingjing Wu 
---
 app/test-pmd/testpmd.c |  8 
 drivers/net/ixgbe/ixgbe_rxtx.c | 10 +-
 examples/vmdq_dcb/main.c   |  4 ++--
 lib/librte_ether/rte_ethdev.h  | 14 +++---
 4 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c
index 386bf84..c8ae909 100644
--- a/app/test-pmd/testpmd.c
+++ b/app/test-pmd/testpmd.c
@@ -1866,8 +1866,8 @@ get_eth_dcb_conf(struct rte_eth_conf *eth_conf, struct 
dcb_config *dcb_conf)
vmdq_rx_conf.pool_map[i].pools = 1 << (i % 
vmdq_rx_conf.nb_queue_pools);
}
for (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++) {
-   vmdq_rx_conf.dcb_queue[i] = i;
-   vmdq_tx_conf.dcb_queue[i] = i;
+   vmdq_rx_conf.dcb_tc[i] = i;
+   vmdq_tx_conf.dcb_tc[i] = i;
}

/*set DCB mode of RX and TX of multiple queues*/
@@ -1897,8 +1897,8 @@ get_eth_dcb_conf(struct rte_eth_conf *eth_conf, struct 
dcb_config *dcb_conf)
tx_conf.nb_tcs = dcb_conf->num_tcs;

for (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++){
-   rx_conf.dcb_queue[i] = i;
-   tx_conf.dcb_queue[i] = i;
+   rx_conf.dcb_tc[i] = i;
+   tx_conf.dcb_tc[i] = i;
}
eth_conf->rxmode.mq_mode = ETH_MQ_RX_DCB;
eth_conf->txmode.mq_mode = ETH_MQ_TX_DCB;
diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index a598a72..d331ef5 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -2903,7 +2903,7 @@ ixgbe_vmdq_dcb_configure(struct rte_eth_dev *dev)
 * mapping is done with 3 bits per priority,
 * so shift by i*3 each time
 */
-   queue_mapping |= ((cfg->dcb_queue[i] & 0x07) << (i * 3));
+   queue_mapping |= ((cfg->dcb_tc[i] & 0x07) << (i * 3));

IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, queue_mapping);

@@ -3038,7 +3038,7 @@ ixgbe_vmdq_dcb_rx_config(struct rte_eth_dev *dev,
}
/* User Priority to Traffic Class mapping */
for (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++) {
-   j = vmdq_rx_conf->dcb_queue[i];
+   j = vmdq_rx_conf->dcb_tc[i];
tc = _config->tc_config[j];
tc->path[IXGBE_DCB_RX_CONFIG].up_to_tc_bitmap =
(uint8_t)(1 << j);
@@ -3066,7 +3066,7 @@ ixgbe_dcb_vt_tx_config(struct rte_eth_dev *dev,

/* User Priority to Traffic Class mapping */
for (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++) {
-   j = vmdq_tx_conf->dcb_queue[i];
+   j = vmdq_tx_conf->dcb_tc[i];
tc = _config->tc_config[j];
tc->path[IXGBE_DCB_TX_CONFIG].up_to_tc_bitmap =
(uint8_t)(1 << j);
@@ -3088,7 +3088,7 @@ ixgbe_dcb_rx_config(struct rte_eth_dev *dev,

/* User Priority to Traffic Class mapping */
for (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++) {
-   j = rx_conf->dcb_queue[i];
+   j = rx_conf->dcb_tc[i];
tc = _config->tc_config[j];
tc->path[IXGBE_DCB_RX_CONFIG].up_to_tc_bitmap =
(uint8_t)(1 << j);
@@ -3109,7 +3109,7 @@ ixgbe_dcb_tx_config(struct rte_eth_dev *dev,

/* User Priority to Traffic Class mapping */
for (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++) {
-   j = tx_conf->dcb_queue[i];
+   j = tx_conf->dcb_tc[i];
tc = _config->tc_config[j];
tc->path[IXGBE_DCB_TX_CONFIG].up_to_tc_bitmap =
(uint8_t)(1 << j);
diff --git a/examples/vmdq_dcb/main.c b/examples/vmdq_dcb/main.c
index c31c2ce..b90ac28 100644
--- a/examples/vmdq_dcb/main.c
+++ b/examples/vmdq_dcb/main.c
@@ -107,7 +107,7 @@ static const struct rte_eth_conf vmdq_dcb_conf_default = {
.default_pool = 0,
.nb_pool_maps = 0,
.pool_map = {{0, 0},},
-   .dcb_queue = {0},
+   .dcb_tc = {0},
},
},
 };
@@ -144,7 +144,7 @@ get_eth_conf(struct rte_eth_conf *eth_conf, enum 
rte_eth_nb_pools num_pools)
conf.pool_map[i].pools = 1 << (i % num_pools);
}
for (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++){
-   conf.dcb_queue[i] = (uint8_t)(i % (NUM_QUEUES/num_pools));
+   conf.dcb_tc[i] = (uint8_t)(i % (NUM_QUEUES/num_pools));
}
(void)(rte_memcpy(eth_conf, _dcb_conf_default, sizeof(*eth_conf)));
(void)(rte_memcpy(_conf->rx_adv_conf.vmdq_dcb_conf, ,
diff --git a/lib/librte_ether/rte_ethdev.h 

[dpdk-dev] [PATCH 0/8] enable DCB feature on Intel XL710/X710 NIC

[Jingjing Wu]

The patch set enables DCB feature on Intel XL710/X710 NICs, including:
  Receive queue classification based on traffic class
  Round Robin ETS schedule (rx and tx).
  Priority flow control
To make the testpmd and ethdev lib more generic on DCB feature, this patch
set also
  adds a new API to get DCB related information on NICs.
  changes the DCB test forwarding in testpmd to be on traffic class.
  move specific validation from lib and application to drivers. 
Additionally, this patch set also corrects some coding style issues.

The patch set is developed based on another previous patch set "[PATCH
 00/52] update i40e base driver" 
http://www.dpdk.org/ml/archives/dev/2015-September/023283.html


Jingjing Wu (8):
  ethdev: rename dcb_queue to dcb_tc in dcb config struct
  ethdev: move the multi-queue checking to specific drivers
  i40e: enable DCB feature on FVL
  ixgbe: enable DCB+RSS multi-queue mode
  ethdev: new API to get dcb related information
  ixgbe: get_dcb_info ops implement
  i40e: get_dcb_info ops implement
  app/testpmd: set up DCB forwarding based on traffic class

 app/test-pmd/cmdline.c   |  39 ++-
 app/test-pmd/config.c| 159 +--
 app/test-pmd/testpmd.c   | 151 +-
 app/test-pmd/testpmd.h   |  23 +-
 drivers/net/e1000/igb_ethdev.c   |  84 +-
 drivers/net/i40e/i40e_ethdev.c   | 574 ++-
 drivers/net/i40e/i40e_ethdev.h   |  14 +
 drivers/net/i40e/i40e_rxtx.c |  32 ++-
 drivers/net/i40e/i40e_rxtx.h |   2 +
 drivers/net/ixgbe/ixgbe_ethdev.c | 248 +
 drivers/net/ixgbe/ixgbe_ethdev.h |   3 +
 drivers/net/ixgbe/ixgbe_rxtx.c   |  58 ++--
 examples/vmdq_dcb/main.c |   4 +-
 lib/librte_ether/rte_ethdev.c| 217 ++-
 lib/librte_ether/rte_ethdev.h|  64 -
 15 files changed, 1230 insertions(+), 442 deletions(-)

-- 
2.4.0

[dpdk-dev] [PATCH] virtio: fix used ring address calculation

[Stephen Hemminger]

On Thu, 24 Sep 2015 18:35:37 +
"Xie, Huawei"  wrote:

> On 9/25/2015 12:36 AM, Stephen Hemminger wrote:
> > On Thu, 24 Sep 2015 07:30:41 +
> > "Xie, Huawei"  wrote:
> >
> >> On 9/21/2015 11:39 AM, Xie, Huawei wrote:
> >> vring_size calculation should consider both used_event_idx at the tail
> >> of avail ring and avail_event_idx at the tail of used ring.
> >> Will merge those two fixes and send a new patch.
> >>> used event idx is put at the end of available ring. It isn't taken into 
> >>> account
> >>> when we calculate the address of used ring. Fortunately, it doesn't 
> >>> introduce
> >>> the bug with fixed queue number 256 and 4KB alignment.
> >>>
> >>> Signed-off-by: hxie5 
> >>> ---
> >>>  drivers/net/virtio/virtio_ring.h | 2 +-
> >>>  1 file changed, 1 insertion(+), 1 deletion(-)
> >>>
> >>> diff --git a/drivers/net/virtio/virtio_ring.h 
> >>> b/drivers/net/virtio/virtio_ring.h
> >>> index a16c499..92e430d 100644
> >>> --- a/drivers/net/virtio/virtio_ring.h
> >>> +++ b/drivers/net/virtio/virtio_ring.h
> >>> @@ -145,7 +145,7 @@ vring_init(struct vring *vr, unsigned int num, 
> >>> uint8_t *p,
> >>>   vr->avail = (struct vring_avail *) (p +
> >>>   num * sizeof(struct vring_desc));
> >>>   vr->used = (void *)
> >>> - RTE_ALIGN_CEIL((uintptr_t)(>avail->ring[num]), align);
> >>> + RTE_ALIGN_CEIL((uintptr_t)(>avail->ring[num + 1]), align);
> >>>  }
> >>>  
> >>>  /*
> > Why aren't we just using the standard Linux includes for this?
> > See  and the function vring_init()
> >
> > Keeping parallel copies of headers is prone to failures.
> Agree.
> Using standard Linux includes then at least we don't need to redefine
> the feature and other related MACRO.
> This applies to vhost as well.
> For vring, vring_init, we could also reuse the linux implementation
> unless we have strong reason to define our own structure.
> One reason was to support both FreeBSD and Linux. FreeBSD should have
> its own header file. To avoid the case they have different vring
> structure or VIRTIO_F_xx macro name, they are redefined here.
> 
> >
> 

The Linux headers for virtio are explictly BSD licensed.
You could at least just have a local copy of same code.

[dpdk-dev] DPDK v2.1.0 tilegx on TileraMDE-4.2.2.169597

[Arthas]

Hi, Zhigang,
  I checked error code and got a error information "(No more IOTLB entries)." & 
 xmit function gxio_mpipe_equeue_try_reserve_fast got "Insufficient DMA 
credits"!

Command: run ./testpmd -c 0x -m 6144 -n 1 -r 1 --vdev xgbe1 -- --rx=1 
--tx=2 --forward-mode=txonly -a --port-topology=chained
gxio_mpipe_init instance 0
gxio_mpipe_init instance 1
EAL: Detected lcore 0 as core 0 on socket 0
EAL: Detected lcore 1 as core 1 on socket 0
EAL: Detected lcore 2 as core 2 on socket 0
EAL: Detected lcore 3 as core 3 on socket 0
EAL: Detected lcore 4 as core 4 on socket 0
EAL: Detected lcore 5 as core 5 on socket 0
EAL: Detected lcore 6 as core 6 on socket 0
EAL: Detected lcore 7 as core 7 on socket 0
EAL: Detected lcore 8 as core 8 on socket 0
EAL: Detected lcore 9 as core 9 on socket 0
EAL: Detected lcore 10 as core 10 on socket 0
EAL: Detected lcore 11 as core 11 on socket 0
EAL: Detected lcore 12 as core 12 on socket 0
EAL: Detected lcore 13 as core 13 on socket 0
EAL: Detected lcore 14 as core 14 on socket 0
EAL: Detected lcore 15 as core 15 on socket 0
EAL: Detected lcore 16 as core 16 on socket 0
EAL: Detected lcore 17 as core 17 on socket 0
EAL: Detected lcore 18 as core 18 on socket 0
EAL: Detected lcore 19 as core 19 on socket 0
EAL: Detected lcore 20 as core 20 on socket 0
EAL: Detected lcore 21 as core 21 on socket 0
EAL: Detected lcore 22 as core 22 on socket 0
EAL: Detected lcore 23 as core 23 on socket 0
EAL: Detected lcore 24 as core 24 on socket 0
EAL: Detected lcore 25 as core 25 on socket 0
EAL: Detected lcore 26 as core 26 on socket 0
EAL: Detected lcore 27 as core 27 on socket 0
EAL: Detected lcore 28 as core 28 on socket 0
EAL: Detected lcore 29 as core 29 on socket 0
EAL: Detected lcore 30 as core 30 on socket 0
EAL: Detected lcore 31 as core 31 on socket 0
EAL: Detected lcore 32 as core 32 on socket 0
EAL: Detected lcore 33 as core 33 on socket 0
EAL: Detected lcore 34 as core 34 on socket 0
EAL: Detected lcore 35 as core 35 on socket 0
EAL: Support maximum 36 logical core(s) by configuration.
EAL: Detected 36 lcore(s)
EAL: Setting up physically contiguous memory...
EAL: Ask a virtual area of 0x8000 bytes
EAL: Virtual area found at 0x1ff6800 (size = 0x8000)
EAL: Ask a virtual area of 0xc00 bytes
EAL: Virtual area found at 0x1ff5b00 (size = 0xc00)
EAL: Ask a virtual area of 0xf400 bytes
EAL: Virtual area found at 0x1fe6600 (size = 0xf400)
EAL: Requesting 384 pages of size 16MB from socket 0
EAL: TSC frequency is ~119 KHz
EAL: WARNING: cpu flags constant_tsc=no nonstop_tsc=no -> using unreliable 
clock cycles !
EAL: Master lcore 0 is ready (tid=f7f94690;cpuset=[0])
PMD: mpipe init xgbe1
PMD: xgbe1: Initialized mpipe device(mac ee:d1:53:72:82:5a).
EAL: lcore 1 is ready (tid=eaf3f060;cpuset=[1])
EAL: lcore 2 is ready (tid=ea73f060;cpuset=[2])
EAL: lcore 3 is ready (tid=e9f3f060;cpuset=[3])
EAL: lcore 4 is ready (tid=e973f060;cpuset=[4])
EAL: lcore 5 is ready (tid=e8f3f060;cpuset=[5])
EAL: lcore 6 is ready (tid=67fff060;cpuset=[6])
EAL: lcore 7 is ready (tid=677ff060;cpuset=[7])
EAL: lcore 8 is ready (tid=5afff060;cpuset=[8])
EAL: lcore 9 is ready (tid=5a7ff060;cpuset=[9])
EAL: lcore 10 is ready (tid=65fff060;cpuset=[10])
EAL: lcore 11 is ready (tid=657ff060;cpuset=[11])
EAL: lcore 12 is ready (tid=64fff060;cpuset=[12])
EAL: lcore 13 is ready (tid=647ff060;cpuset=[13])
EAL: lcore 14 is ready (tid=3060;cpuset=[14])
EAL: lcore 15 is ready (tid=3f7ff060;cpuset=[15])
EAL: lcore 16 is ready (tid=3efff060;cpuset=[16])
EAL: lcore 17 is ready (tid=3e7ff060;cpuset=[17])
EAL: lcore 18 is ready (tid=3dfff060;cpuset=[18])
EAL: lcore 19 is ready (tid=3d7ff060;cpuset=[19])
EAL: lcore 20 is ready (tid=3cfff060;cpuset=[20])
EAL: lcore 21 is ready (tid=3c7ff060;cpuset=[21])
EAL: lcore 22 is ready (tid=1bfff060;cpuset=[22])
EAL: lcore 23 is ready (tid=1b7ff060;cpuset=[23])
EAL: lcore 24 is ready (tid=1afff060;cpuset=[24])
EAL: lcore 25 is ready (tid=1a7ff060;cpuset=[25])
EAL: lcore 26 is ready (tid=19fff060;cpuset=[26])
EAL: lcore 27 is ready (tid=197ff060;cpuset=[27])
EAL: lcore 28 is ready (tid=18fff060;cpuset=[28])
EAL: lcore 29 is ready (tid=187ff060;cpuset=[29])
EAL: lcore 30 is ready (tid=f7fff060;cpuset=[30])
EAL: lcore 31 is ready (tid=f77ff060;cpuset=[31])
Set txonly packet forwarding mode
Auto-start selected
Configuring Port 0 (socket 0)
PMD: xgbe1: Could not register memseg @0x1ff6800, -(No more IOTLB 
entries).
PMD: xgbe1: Could not register memseg @0x1ff5b00, -(No more IOTLB 
entries).
PMD: xgbe1: Could not register memseg @0x1fe6600, -(No more IOTLB 
entries).
PMD: xgbe1: Buffer stack memory 0x1ff6378 - 0x1ff637d557f.
PMD: xgbe1: eDMA ring memory 0x1ff637d8000 - 0x1ff637d9fff.
PMD: xgbe1: iDMA ring 0 memory 0x1ff6377c000 - 0x1ff6377dfff.
PMD: rte_eth_dev_config_restore: port 0: MAC address array not supported
PMD: rte_eth_allmulticast_disable: Function not supported
Port 0: EE:D1:53:72:82:5A
Checking link 

[dpdk-dev] [PATCH v1 11/11] doc: release note update for intr mode

[Cunming Liang]

Signed-off-by: Cunming Liang 
---
 doc/guides/rel_notes/release_2_2.rst | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/doc/guides/rel_notes/release_2_2.rst 
b/doc/guides/rel_notes/release_2_2.rst
index 682f468..73dba47 100644
--- a/doc/guides/rel_notes/release_2_2.rst
+++ b/doc/guides/rel_notes/release_2_2.rst
@@ -4,10 +4,12 @@ DPDK Release 2.2
 New Features
 

+* Support interrupt mode on i40e

 Resolved Issues
 ---

+* Fix ixgbe/igb rx interrupt compatible issue with mbox

 Known Issues
 
-- 
2.4.3

[dpdk-dev] [PATCH v1 10/11] i40evf: add rx interrupt support

[Cunming Liang]

The patch enables rx interrupt support on i40e VF and some necessary change on 
PF IOV mode to support VF.
On PF side, running in IOV mode via uio won't allow rx interrupt which is 
exclusive with mbox interrupt
in single vector competition.
On VF side, one single vector is shared for all the rx queues.

Signed-off-by: Cunming Liang 
---
 drivers/net/i40e/i40e_ethdev.c|  46 +++--
 drivers/net/i40e/i40e_ethdev.h|  15 
 drivers/net/i40e/i40e_ethdev_vf.c | 141 ++
 drivers/net/i40e/i40e_pf.c|   5 --
 4 files changed, 169 insertions(+), 38 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 33b5296..7937e37 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -75,11 +75,6 @@
 /* Maximun number of VSI */
 #define I40E_MAX_NUM_VSIS  (384UL)

-/* Default queue interrupt throttling time in microseconds */
-#define I40E_ITR_INDEX_DEFAULT  0
-#define I40E_QUEUE_ITR_INTERVAL_DEFAULT 32 /* 32 us */
-#define I40E_QUEUE_ITR_INTERVAL_MAX 8160 /* 8160 us */
-
 #define I40E_PRE_TX_Q_CFG_WAIT_US   10 /* 10 us */

 /* Mask of PF interrupt causes */
@@ -764,16 +759,6 @@ i40e_vsi_queues_unbind_intr(struct i40e_vsi *vsi)
I40E_WRITE_FLUSH(hw);
 }

-static inline uint16_t
-i40e_calc_itr_interval(int16_t interval)
-{
-   if (interval < 0 || interval > I40E_QUEUE_ITR_INTERVAL_MAX)
-   interval = I40E_QUEUE_ITR_INTERVAL_DEFAULT;
-
-   /* Convert to hardware count, as writing each 1 represents 2 us */
-   return (interval/2);
-}
-
 static void
 __vsi_queues_bind_intr(struct i40e_vsi *vsi, uint16_t msix_vect,
   int base_queue, int nb_queue)
@@ -832,13 +817,24 @@ __vsi_queues_bind_intr(struct i40e_vsi *vsi, uint16_t 
msix_vect,
} else {
uint32_t reg;

-   /* num_msix_vectors_vf needs to minus irq0 */
-   reg = (hw->func_caps.num_msix_vectors_vf - 1) *
-   vsi->user_param + (msix_vect - 1);
+   if (msix_vect == MISC_VEC_ID) {
+   I40E_WRITE_REG(hw,
+  I40E_VPINT_LNKLST0(vsi->user_param),
+  (base_queue <<
+   I40E_VPINT_LNKLST0_FIRSTQ_INDX_SHIFT) |
+  (0x0 <<
+   I40E_VPINT_LNKLST0_FIRSTQ_TYPE_SHIFT));
+   } else {
+   /* num_msix_vectors_vf needs to minus irq0 */
+   reg = (hw->func_caps.num_msix_vectors_vf - 1) *
+   vsi->user_param + (msix_vect - 1);

-   I40E_WRITE_REG(hw, I40E_VPINT_LNKLSTN(reg), (base_queue <<
-   I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT) |
-   (0x0 << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT));
+   I40E_WRITE_REG(hw, I40E_VPINT_LNKLSTN(reg),
+  (base_queue <<
+   I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT) |
+  (0x0 <<
+   I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT));
+   }
}

I40E_WRITE_FLUSH(hw);
@@ -861,6 +857,14 @@ i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi)
I40E_WRITE_REG(hw, I40E_QINT_RQCTL(vsi->base_queue + i), 0);
}

+   /* VF bind interrupt */
+   if (vsi->type == I40E_VSI_SRIOV) {
+   __vsi_queues_bind_intr(vsi, msix_vect,
+  vsi->base_queue, vsi->nb_qps);
+   return;
+   }
+
+   /* PF & VMDq bind interrupt */
if (rte_intr_dp_is_en(intr_handle)) {
if (vsi->type == I40E_VSI_MAIN) {
queue_idx = 0;
diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
index 727ee2d..52fb3f9 100644
--- a/drivers/net/i40e/i40e_ethdev.h
+++ b/drivers/net/i40e/i40e_ethdev.h
@@ -151,6 +151,11 @@ enum i40e_flxpld_layer_idx {
(1ULL << I40E_FILTER_PCTYPE_FCOE_OTHER) | \
(1ULL << I40E_FILTER_PCTYPE_L2_PAYLOAD))

+/* Default queue interrupt throttling time in microseconds */
+#define I40E_ITR_INDEX_DEFAULT  0
+#define I40E_QUEUE_ITR_INTERVAL_DEFAULT 32 /* 32 us */
+#define I40E_QUEUE_ITR_INTERVAL_MAX 8160 /* 8160 us */
+
 struct i40e_adapter;

 /**
@@ -573,6 +578,16 @@ i40e_align_floor(int n)
return 1 << (sizeof(n) * CHAR_BIT - 1 - __builtin_clz(n));
 }

+static inline uint16_t
+i40e_calc_itr_interval(int16_t interval)
+{
+   if (interval < 0 || interval > I40E_QUEUE_ITR_INTERVAL_MAX)
+   interval = I40E_QUEUE_ITR_INTERVAL_DEFAULT;
+
+   /* Convert to hardware count, as writing each 1 represents 2 us */
+   return (interval / 2);
+}
+
 #define I40E_VALID_FLOW(flow_type) \
((flow_type) == 

[dpdk-dev] [PATCH v1 09/11] i40e: add rx interrupt support

[Cunming Liang]

The patch enables rx interrupt support on i40e PF non-IOV mode.
Per queue rx interrupt works on vfio, however on uio, all rx queues share one 
interrupt vector.

Signed-off-by: Cunming Liang 
---
 drivers/net/i40e/i40e_ethdev.c | 319 +++--
 drivers/net/i40e/i40e_ethdev.h |   2 +
 drivers/net/i40e/i40e_pf.c |   2 +
 3 files changed, 282 insertions(+), 41 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 2dd9fdc..33b5296 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -39,6 +39,7 @@
 #include 
 #include 
 #include 
+#include 

 #include 
 #include 
@@ -174,7 +175,7 @@ static void i40e_stat_update_48(struct i40e_hw *hw,
   bool offset_loaded,
   uint64_t *offset,
   uint64_t *stat);
-static void i40e_pf_config_irq0(struct i40e_hw *hw);
+static void i40e_pf_config_irq0(struct i40e_hw *hw, int no_queue);
 static void i40e_dev_interrupt_handler(
__rte_unused struct rte_intr_handle *handle, void *param);
 static int i40e_res_pool_init(struct i40e_res_pool_info *pool,
@@ -232,6 +233,10 @@ static int i40e_timesync_read_rx_timestamp(struct 
rte_eth_dev *dev,
   uint32_t flags);
 static int i40e_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
   struct timespec *timestamp);
+static int i40e_dev_rx_queue_intr_enable(struct rte_eth_dev *dev,
+uint16_t queue_id);
+static int i40e_dev_rx_queue_intr_disable(struct rte_eth_dev *dev,
+ uint16_t queue_id);

 static const struct rte_pci_id pci_id_i40e_map[] = {
 #define RTE_PCI_DEV_ID_DECL_I40E(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
@@ -265,6 +270,10 @@ static const struct eth_dev_ops i40e_eth_dev_ops = {
.tx_queue_start   = i40e_dev_tx_queue_start,
.tx_queue_stop= i40e_dev_tx_queue_stop,
.rx_queue_setup   = i40e_dev_rx_queue_setup,
+#ifdef RTE_NEXT_ABI
+   .rx_queue_intr_enable = i40e_dev_rx_queue_intr_enable,
+   .rx_queue_intr_disable= i40e_dev_rx_queue_intr_disable,
+#endif
.rx_queue_release = i40e_dev_rx_queue_release,
.rx_queue_count   = i40e_dev_rx_queue_count,
.rx_descriptor_done   = i40e_dev_rx_descriptor_done,
@@ -579,7 +588,7 @@ eth_i40e_dev_init(struct rte_eth_dev *dev)
i40e_dev_interrupt_handler, (void *)dev);

/* configure and enable device interrupt */
-   i40e_pf_config_irq0(hw);
+   i40e_pf_config_irq0(hw, 1);
i40e_pf_enable_irq0(hw);

/* enable uio intr after callback register */
@@ -718,6 +727,8 @@ err:
 void
 i40e_vsi_queues_unbind_intr(struct i40e_vsi *vsi)
 {
+   struct rte_eth_dev *dev = vsi->adapter->eth_dev;
+   struct rte_intr_handle *intr_handle = >pci_dev->intr_handle;
struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
uint16_t msix_vect = vsi->msix_intr;
uint16_t i;
@@ -729,15 +740,26 @@ i40e_vsi_queues_unbind_intr(struct i40e_vsi *vsi)
}

if (vsi->type != I40E_VSI_SRIOV) {
-   I40E_WRITE_REG(hw, I40E_PFINT_LNKLSTN(msix_vect - 1), 0);
-   I40E_WRITE_REG(hw, I40E_PFINT_ITRN(I40E_ITR_INDEX_DEFAULT,
-   msix_vect - 1), 0);
+   if (!rte_intr_allow_others(intr_handle)) {
+   I40E_WRITE_REG(hw, I40E_PFINT_LNKLST0,
+  I40E_PFINT_LNKLST0_FIRSTQ_INDX_MASK);
+   I40E_WRITE_REG(hw,
+  I40E_PFINT_ITR0(I40E_ITR_INDEX_DEFAULT),
+  0);
+   } else {
+   I40E_WRITE_REG(hw, I40E_PFINT_LNKLSTN(msix_vect - 1),
+  I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK);
+   I40E_WRITE_REG(hw,
+  I40E_PFINT_ITRN(I40E_ITR_INDEX_DEFAULT,
+  msix_vect - 1), 0);
+   }
} else {
uint32_t reg;
reg = (hw->func_caps.num_msix_vectors_vf - 1) *
vsi->user_param + (msix_vect - 1);

-   I40E_WRITE_REG(hw, I40E_VPINT_LNKLSTN(reg), 0);
+   I40E_WRITE_REG(hw, I40E_VPINT_LNKLSTN(reg),
+  I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
}
I40E_WRITE_FLUSH(hw);
 }
@@ -752,29 +774,26 @@ i40e_calc_itr_interval(int16_t interval)
return (interval/2);
 }

-void
-i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi)
+static void
+__vsi_queues_bind_intr(struct i40e_vsi *vsi, uint16_t msix_vect,
+  int base_queue, int nb_queue)
 {
+   int i;
uint32_t val;

[dpdk-dev] [PATCH v1 08/11] igb: fix rx intr compatible issue with PF mbox

[Cunming Liang]

When igb runs as a PF, mbox interrupt is prerequisite to make VF start normally.
And PF sometimes won't 'dev_start', so the mbox interrupt register during 
'dev_init' is required.
The patch rolls back the interrupt register for mbox,lsc to the 'dev_init'.
As UIO doesn't support multiple vector, mbox has to occupy the only one.
It adds condition check on 'dev_start', rxq interrupt is not allowed when PF 
running in IOV mode via UIO.

Signed-off-by: Cunming Liang 
---
 drivers/net/e1000/igb_ethdev.c | 44 +-
 1 file changed, 31 insertions(+), 13 deletions(-)

diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c
index 03400f4..967506c 100644
--- a/drivers/net/e1000/igb_ethdev.c
+++ b/drivers/net/e1000/igb_ethdev.c
@@ -651,6 +651,13 @@ eth_igb_dev_init(struct rte_eth_dev *eth_dev)
 eth_dev->data->port_id, pci_dev->id.vendor_id,
 pci_dev->id.device_id);

+   rte_intr_callback_register(&(pci_dev->intr_handle),
+  eth_igb_interrupt_handler,
+  (void *)eth_dev);
+
+   /* enable uio/vfio intr/eventfd mapping */
+   rte_intr_enable(&(pci_dev->intr_handle));
+
/* enable support intr */
igb_intr_enable(eth_dev);

@@ -929,13 +936,16 @@ eth_igb_start(struct rte_eth_dev *dev)
igb_pf_host_configure(dev);

/* check and configure queue intr-vector mapping */
-   if (dev->data->dev_conf.intr_conf.rxq != 0)
+   if (((RTE_ETH_DEV_SRIOV(dev).active &&
+ rte_intr_cap_multiple(intr_handle)) ||
+!RTE_ETH_DEV_SRIOV(dev).active) &&
+   dev->data->dev_conf.intr_conf.rxq != 0) {
intr_vector = dev->data->nb_rx_queues;
+   if (rte_intr_efd_enable(intr_handle, intr_vector))
+   return -1;
+   }

-   if (rte_intr_efd_enable(intr_handle, intr_vector))
-   return -1;
-
-   if (rte_intr_dp_is_en(intr_handle)) {
+   if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
dev->data->nb_rx_queues * sizeof(int), 0);
@@ -1028,20 +1038,22 @@ eth_igb_start(struct rte_eth_dev *dev)
}
e1000_setup_link(hw);

-   /* check if lsc interrupt feature is enabled */
-   if (dev->data->dev_conf.intr_conf.lsc != 0) {
-   if (rte_intr_allow_others(intr_handle)) {
-   rte_intr_callback_register(intr_handle,
-  eth_igb_interrupt_handler,
-  (void *)dev);
+   if (rte_intr_allow_others(intr_handle)) {
+   /* check if lsc interrupt is enabled */
+   if (dev->data->dev_conf.intr_conf.lsc != 0)
eth_igb_lsc_interrupt_setup(dev);
-   } else
+   } else {
+   rte_intr_callback_unregister(intr_handle,
+eth_igb_interrupt_handler,
+(void *)dev);
+   if (dev->data->dev_conf.intr_conf.lsc != 0)
PMD_INIT_LOG(INFO, "lsc won't enable because of"
 " no intr multiplex\n");
}

/* check if rxq interrupt is enabled */
-   if (dev->data->dev_conf.intr_conf.rxq != 0)
+   if (dev->data->dev_conf.intr_conf.rxq != 0 &&
+   rte_intr_dp_is_en(intr_handle))
eth_igb_rxq_interrupt_setup(dev);

/* enable uio/vfio intr/eventfd mapping */
@@ -1134,6 +1146,12 @@ eth_igb_stop(struct rte_eth_dev *dev)
}
filter_info->twotuple_mask = 0;

+   if (!rte_intr_allow_others(intr_handle))
+   /* resume to the default handler */
+   rte_intr_callback_register(intr_handle,
+  eth_igb_interrupt_handler,
+  (void *)dev);
+
/* Clean datapath event and queue/vec mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec != NULL) {
-- 
2.4.3

[dpdk-dev] [PATCH v1 07/11] ixgbevf: cleanup unnecessary interrupt handler

[Cunming Liang]

As ixgbe vf doesn't support lsc, the patch removes those unused code.
In addition, it does some tiny cleanup.

Signed-off-by: Cunming Liang 
---
 drivers/net/ixgbe/ixgbe_ethdev.c | 85 +---
 1 file changed, 10 insertions(+), 75 deletions(-)

diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index f180d75..1d46320 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -206,8 +206,6 @@ static void ixgbe_dcb_init(struct ixgbe_hw *hw,struct 
ixgbe_dcb_config *dcb_conf
 /* For Virtual Function support */
 static int eth_ixgbevf_dev_init(struct rte_eth_dev *eth_dev);
 static int eth_ixgbevf_dev_uninit(struct rte_eth_dev *eth_dev);
-static int ixgbevf_dev_interrupt_get_status(struct rte_eth_dev *dev);
-static int ixgbevf_dev_interrupt_action(struct rte_eth_dev *dev);
 static int  ixgbevf_dev_configure(struct rte_eth_dev *dev);
 static int  ixgbevf_dev_start(struct rte_eth_dev *dev);
 static void ixgbevf_dev_stop(struct rte_eth_dev *dev);
@@ -223,8 +221,6 @@ static void ixgbevf_vlan_strip_queue_set(struct rte_eth_dev 
*dev,
uint16_t queue, int on);
 static void ixgbevf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
 static void ixgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on);
-static void ixgbevf_dev_interrupt_handler(struct rte_intr_handle *handle,
- void *param);
 static int ixgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev,
uint16_t queue_id);
 static int ixgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev,
@@ -2670,30 +2666,6 @@ ixgbe_dev_interrupt_get_status(struct rte_eth_dev *dev)
return 0;
 }

-static int
-ixgbevf_dev_interrupt_get_status(struct rte_eth_dev *dev)
-{
-   uint32_t eicr;
-   struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-   struct ixgbe_interrupt *intr =
-   IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private);
-
-   /* clear all cause mask */
-   ixgbevf_intr_disable(hw);
-
-   /* read-on-clear nic registers here */
-   eicr = IXGBE_READ_REG(hw, IXGBE_VTEICR);
-   PMD_DRV_LOG(INFO, "eicr %x", eicr);
-
-   intr->flags = 0;
-
-   /* set flag for async link update */
-   if (eicr & IXGBE_EICR_LSC)
-   intr->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
-
-   return 0;
-}
-
 /**
  * It gets and then prints the link status.
  *
@@ -2789,18 +2761,6 @@ ixgbe_dev_interrupt_action(struct rte_eth_dev *dev)
return 0;
 }

-static int
-ixgbevf_dev_interrupt_action(struct rte_eth_dev *dev)
-{
-   struct ixgbe_hw *hw =
-   IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-
-   PMD_DRV_LOG(DEBUG, "enable intr immediately");
-   ixgbevf_intr_enable(hw);
-   rte_intr_enable(>pci_dev->intr_handle);
-   return 0;
-}
-
 /**
  * Interrupt handler which shall be registered for alarm callback for delayed
  * handling specific interrupt to wait for the stable nic state. As the
@@ -2863,16 +2823,6 @@ ixgbe_dev_interrupt_handler(__rte_unused struct 
rte_intr_handle *handle,
ixgbe_dev_interrupt_action(dev);
 }

-static void
-ixgbevf_dev_interrupt_handler(__rte_unused struct rte_intr_handle *handle,
- void *param)
-{
-   struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
-
-   ixgbevf_dev_interrupt_get_status(dev);
-   ixgbevf_dev_interrupt_action(dev);
-}
-
 static int
 ixgbe_dev_led_on(struct rte_eth_dev *dev)
 {
@@ -3466,11 +3416,11 @@ ixgbevf_dev_start(struct rte_eth_dev *dev)
ixgbevf_dev_rxtx_start(dev);

/* check and configure queue intr-vector mapping */
-   if (dev->data->dev_conf.intr_conf.rxq != 0)
+   if (dev->data->dev_conf.intr_conf.rxq != 0) {
intr_vector = dev->data->nb_rx_queues;
-
-   if (rte_intr_efd_enable(intr_handle, intr_vector))
-   return -1;
+   if (rte_intr_efd_enable(intr_handle, intr_vector))
+   return -1;
+   }

if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec =
@@ -3484,16 +3434,6 @@ ixgbevf_dev_start(struct rte_eth_dev *dev)
}
ixgbevf_configure_msix(dev);

-   if (dev->data->dev_conf.intr_conf.lsc != 0) {
-   if (rte_intr_allow_others(intr_handle))
-   rte_intr_callback_register(intr_handle,
-   ixgbevf_dev_interrupt_handler,
-   (void *)dev);
-   else
-   PMD_INIT_LOG(INFO, "lsc won't enable because of"
-" no intr multiplex\n");
-   }
-
rte_intr_enable(intr_handle);

/* Re-enable interrupt for VF */
@@ -3539,7 +3479,6 @@ static void
 ixgbevf_dev_close(struct rte_eth_dev *dev)
 {
struct ixgbe_hw *hw = 

[dpdk-dev] [PATCH v1 06/11] ixgbe: fix rx intr compatible issue with PF mbox

[Cunming Liang]

When ixgbe runs as a PF, mbox interrupt is prerequisite to make VF start 
normally.
And PF sometimes won't 'dev_start', so the mbox interrupt register during 
'dev_init' is required.
The patch rolls back the interrupt register for mbox,lsc to the 'dev_init'.
As UIO doesn't support multiple vector, mbox has to occupy the only one.
It adds condition check on 'dev_start', rxq interrupt is not allowed when PF 
running in IOV mode via UIO.

Signed-off-by: Cunming Liang 
---
 drivers/net/ixgbe/ixgbe_ethdev.c | 45 +++-
 1 file changed, 31 insertions(+), 14 deletions(-)

diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index dbc0cd4..f180d75 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -1028,6 +1028,13 @@ eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev)
eth_dev->data->port_id, pci_dev->id.vendor_id,
pci_dev->id.device_id);

+   rte_intr_callback_register(&(pci_dev->intr_handle),
+  ixgbe_dev_interrupt_handler,
+  (void *)eth_dev);
+
+   /* enable uio/vfio intr/eventfd mapping */
+   rte_intr_enable(&(pci_dev->intr_handle));
+
/* enable support intr */
ixgbe_enable_intr(eth_dev);

@@ -1704,17 +1711,19 @@ ixgbe_dev_start(struct rte_eth_dev *dev)
ixgbe_pf_host_configure(dev);

/* check and configure queue intr-vector mapping */
-   if (dev->data->dev_conf.intr_conf.rxq != 0)
+   if (((RTE_ETH_DEV_SRIOV(dev).active &&
+ rte_intr_cap_multiple(intr_handle)) ||
+!RTE_ETH_DEV_SRIOV(dev).active) &&
+   dev->data->dev_conf.intr_conf.rxq != 0) {
intr_vector = dev->data->nb_rx_queues;
-
-   if (rte_intr_efd_enable(intr_handle, intr_vector))
-   return -1;
+   if (rte_intr_efd_enable(intr_handle, intr_vector))
+   return -1;
+   }

if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
-   dev->data->nb_rx_queues * sizeof(int),
-   0);
+   dev->data->nb_rx_queues * sizeof(int), 0);
if (intr_handle->intr_vec == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
 " intr_vec\n", dev->data->nb_rx_queues);
@@ -1801,20 +1810,22 @@ ixgbe_dev_start(struct rte_eth_dev *dev)

 skip_link_setup:

-   /* check if lsc interrupt is enabled */
-   if (dev->data->dev_conf.intr_conf.lsc != 0) {
-   if (rte_intr_allow_others(intr_handle)) {
-   rte_intr_callback_register(intr_handle,
-  ixgbe_dev_interrupt_handler,
-  (void *)dev);
+   if (rte_intr_allow_others(intr_handle)) {
+   /* check if lsc interrupt is enabled */
+   if (dev->data->dev_conf.intr_conf.lsc != 0)
ixgbe_dev_lsc_interrupt_setup(dev);
-   } else
+   } else {
+   rte_intr_callback_unregister(intr_handle,
+ixgbe_dev_interrupt_handler,
+(void *)dev);
+   if (dev->data->dev_conf.intr_conf.lsc != 0)
PMD_INIT_LOG(INFO, "lsc won't enable because of"
 " no intr multiplex\n");
}

/* check if rxq interrupt is enabled */
-   if (dev->data->dev_conf.intr_conf.rxq != 0)
+   if (dev->data->dev_conf.intr_conf.rxq != 0 &&
+   rte_intr_dp_is_en(intr_handle))
ixgbe_dev_rxq_interrupt_setup(dev);

/* enable uio/vfio intr/eventfd mapping */
@@ -1926,6 +1937,12 @@ ixgbe_dev_stop(struct rte_eth_dev *dev)
memset(filter_info->fivetuple_mask, 0,
sizeof(uint32_t) * IXGBE_5TUPLE_ARRAY_SIZE);

+   if (!rte_intr_allow_others(intr_handle))
+   /* resume to the default handler */
+   rte_intr_callback_register(intr_handle,
+  ixgbe_dev_interrupt_handler,
+  (void *)dev);
+
/* Clean datapath event and queue/vec mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec != NULL) {
-- 
2.4.3

[dpdk-dev] [PATCH v1 05/11] eal/linux: add intr api to report multi-vector capability

[Cunming Liang]

VFIO allows multiple MSI-X vector, others doesn't, but maybe will allow it in 
the future.
Device drivers need to be aware of the capability.
It's better to avoid condition check on interrupt type(VFIO) everywhere, instead
a capability api is more flexible for the condition change.

Signed-off-by: Cunming Liang 
---
 lib/librte_eal/linuxapp/eal/eal_interrupts.c  |  9 +
 lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h | 10 ++
 lib/librte_eal/linuxapp/eal/rte_eal_version.map   |  7 +++
 3 files changed, 26 insertions(+)

diff --git a/lib/librte_eal/linuxapp/eal/eal_interrupts.c 
b/lib/librte_eal/linuxapp/eal/eal_interrupts.c
index 96226d6..c90bc4d 100644
--- a/lib/librte_eal/linuxapp/eal/eal_interrupts.c
+++ b/lib/librte_eal/linuxapp/eal/eal_interrupts.c
@@ -1196,3 +1196,12 @@ rte_intr_allow_others(struct rte_intr_handle 
*intr_handle)
else
return !!(intr_handle->max_intr - intr_handle->nb_efd);
 }
+
+int
+rte_intr_cap_multiple(struct rte_intr_handle *intr_handle)
+{
+   if (intr_handle->type == RTE_INTR_HANDLE_VFIO_MSIX)
+   return 1;
+
+   return 0;
+}
diff --git a/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h 
b/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
index 6a2f495..a7b2be4 100644
--- a/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
+++ b/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
@@ -215,4 +215,14 @@ rte_intr_dp_is_en(struct rte_intr_handle *intr_handle);
 int
 rte_intr_allow_others(struct rte_intr_handle *intr_handle);

+/**
+ * The multiple interrupt vector capability of interrupt handle instance.
+ * It returns zero if no multiple interrupt vector support.
+ *
+ * @param intr_handle
+ *   Pointer to the interrupt handle.
+ */
+int
+rte_intr_cap_multiple(struct rte_intr_handle *intr_handle);
+
 #endif /* _RTE_LINUXAPP_INTERRUPTS_H_ */
diff --git a/lib/librte_eal/linuxapp/eal/rte_eal_version.map 
b/lib/librte_eal/linuxapp/eal/rte_eal_version.map
index dbb8fa1..cb9f4d6 100644
--- a/lib/librte_eal/linuxapp/eal/rte_eal_version.map
+++ b/lib/librte_eal/linuxapp/eal/rte_eal_version.map
@@ -128,3 +128,10 @@ DPDK_2.1 {
rte_memzone_free;

 } DPDK_2.0;
+
+DPDK_2.2 {
+   global:
+
+   rte_intr_cap_multiple;
+
+} DPDK_2.1;
\ No newline at end of file
-- 
2.4.3

[dpdk-dev] [PATCH v1 04/11] eal/linux: not allow to enable zero intr efd

[Cunming Liang]

The patch adds condition check to avoid enable nothing.
In disable state, both max_intr and nb_efd are zero.

Signed-off-by: Cunming Liang 
---
 lib/librte_eal/bsdapp/eal/include/exec-env/rte_interrupts.h   | 3 ++-
 lib/librte_eal/linuxapp/eal/eal_interrupts.c  | 8 +++-
 lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h | 3 ++-
 3 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/lib/librte_eal/bsdapp/eal/include/exec-env/rte_interrupts.h 
b/lib/librte_eal/bsdapp/eal/include/exec-env/rte_interrupts.h
index 88d4ae1..cd8817d 100644
--- a/lib/librte_eal/bsdapp/eal/include/exec-env/rte_interrupts.h
+++ b/lib/librte_eal/bsdapp/eal/include/exec-env/rte_interrupts.h
@@ -82,8 +82,9 @@ rte_intr_rx_ctl(struct rte_intr_handle *intr_handle,
  *
  * @param intr_handle
  *   Pointer to the interrupt handle.
- * @param nb_vec
+ * @param nb_efd
  *   Number of interrupt vector trying to enable.
+ *   The value 0 is not allowed.
  * @return
  *   - On success, zero.
  *   - On failure, a negative value.
diff --git a/lib/librte_eal/linuxapp/eal/eal_interrupts.c 
b/lib/librte_eal/linuxapp/eal/eal_interrupts.c
index 8e76a7a..96226d6 100644
--- a/lib/librte_eal/linuxapp/eal/eal_interrupts.c
+++ b/lib/librte_eal/linuxapp/eal/eal_interrupts.c
@@ -45,6 +45,7 @@
 #include 
 #include 
 #include 
+#include 

 #include 
 #include 
@@ -1132,6 +1133,8 @@ rte_intr_efd_enable(struct rte_intr_handle *intr_handle, 
uint32_t nb_efd)
int fd;
uint32_t n = RTE_MIN(nb_efd, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);

+   assert(nb_efd != 0);
+
if (intr_handle->type == RTE_INTR_HANDLE_VFIO_MSIX) {
for (i = 0; i < n; i++) {
fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
@@ -1188,5 +1191,8 @@ rte_intr_dp_is_en(struct rte_intr_handle *intr_handle)
 int
 rte_intr_allow_others(struct rte_intr_handle *intr_handle)
 {
-   return !!(intr_handle->max_intr - intr_handle->nb_efd);
+   if (!rte_intr_dp_is_en(intr_handle))
+   return 1;
+   else
+   return !!(intr_handle->max_intr - intr_handle->nb_efd);
 }
diff --git a/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h 
b/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
index b8fd318..6a2f495 100644
--- a/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
+++ b/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
@@ -176,8 +176,9 @@ rte_intr_rx_ctl(struct rte_intr_handle *intr_handle,
  *
  * @param intr_handle
  *   Pointer to the interrupt handle.
- * @param nb_vec
+ * @param nb_efd
  *   Number of interrupt vector trying to enable.
+ *   The value 0 is not allowed.
  * @return
  *   - On success, zero.
  *   - On failure, a negative value.
-- 
2.4.3

[dpdk-dev] [PATCH v1 03/11] igb: reserve intr vector zero for misc cause

[Cunming Liang]

According to the VFIO interrupt mapping, the interrupt vector id for rxq starts 
from RX_VEC_START.
It doesn't impact the UIO cases.

Signed-off-by: Cunming Liang 
---
 drivers/net/e1000/igb_ethdev.c | 19 ++-
 1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c
index 848ef6e..03400f4 100644
--- a/drivers/net/e1000/igb_ethdev.c
+++ b/drivers/net/e1000/igb_ethdev.c
@@ -4210,7 +4210,10 @@ eth_igb_configure_msix_intr(struct rte_eth_dev *dev)
uint32_t tmpval, regval, intr_mask;
struct e1000_hw *hw =
E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-   uint32_t vec = 0;
+   uint32_t vec = MISC_VEC_ID;
+   uint32_t base = MISC_VEC_ID;
+   uint32_t misc_shift = 0;
+
struct rte_intr_handle *intr_handle = >pci_dev->intr_handle;

/* won't configure msix register if no mapping is done
@@ -4219,6 +4222,11 @@ eth_igb_configure_msix_intr(struct rte_eth_dev *dev)
if (!rte_intr_dp_is_en(intr_handle))
return;

+   if (rte_intr_allow_others(intr_handle)) {
+   vec = base = RX_VEC_START;
+   misc_shift = 1;
+   }
+
/* set interrupt vector for other causes */
if (hw->mac.type == e1000_82575) {
tmpval = E1000_READ_REG(hw, E1000_CTRL_EXT);
@@ -4247,8 +4255,8 @@ eth_igb_configure_msix_intr(struct rte_eth_dev *dev)
E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE |
E1000_GPIE_PBA | E1000_GPIE_EIAME |
E1000_GPIE_NSICR);
-
-   intr_mask = (1 << intr_handle->max_intr) - 1;
+   intr_mask = RTE_LEN2MASK(intr_handle->nb_efd, uint32_t) <<
+   misc_shift;
regval = E1000_READ_REG(hw, E1000_EIAC);
E1000_WRITE_REG(hw, E1000_EIAC, regval | intr_mask);

@@ -4262,14 +4270,15 @@ eth_igb_configure_msix_intr(struct rte_eth_dev *dev)
/* use EIAM to auto-mask when MSI-X interrupt
 * is asserted, this saves a register write for every interrupt
 */
-   intr_mask = (1 << intr_handle->nb_efd) - 1;
+   intr_mask = RTE_LEN2MASK(intr_handle->nb_efd, uint32_t) <<
+   misc_shift;
regval = E1000_READ_REG(hw, E1000_EIAM);
E1000_WRITE_REG(hw, E1000_EIAM, regval | intr_mask);

for (queue_id = 0; queue_id < dev->data->nb_rx_queues; queue_id++) {
eth_igb_assign_msix_vector(hw, 0, queue_id, vec);
intr_handle->intr_vec[queue_id] = vec;
-   if (vec < intr_handle->nb_efd - 1)
+   if (vec < base + intr_handle->nb_efd - 1)
vec++;
}

-- 
2.4.3

[dpdk-dev] [PATCH v1 02/11] ixgbe: reserve intr vector zero for misc cause

[Cunming Liang]

According to the VFIO interrupt mapping, the interrupt vector id for rxq starts 
from RX_VEC_START.
It doesn't impact the UIO cases.

Signed-off-by: Cunming Liang 
---
 drivers/net/ixgbe/ixgbe_ethdev.c | 14 +-
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index ec2918c..dbc0cd4 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -4249,7 +4249,8 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)
struct rte_intr_handle *intr_handle = >pci_dev->intr_handle;
struct ixgbe_hw *hw =
IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-   uint32_t queue_id, vec = 0;
+   uint32_t queue_id, base = MISC_VEC_ID;
+   uint32_t vec = MISC_VEC_ID;
uint32_t mask;
uint32_t gpie;

@@ -4259,6 +4260,9 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)
if (!rte_intr_dp_is_en(intr_handle))
return;

+   if (rte_intr_allow_others(intr_handle))
+   vec = base = RX_VEC_START;
+
/* setup GPIE for MSI-x mode */
gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
gpie |= IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
@@ -4282,23 +4286,23 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)
/* by default, 1:1 mapping */
ixgbe_set_ivar_map(hw, 0, queue_id, vec);
intr_handle->intr_vec[queue_id] = vec;
-   if (vec < intr_handle->nb_efd - 1)
+   if (vec < base + intr_handle->nb_efd - 1)
vec++;
}

switch (hw->mac.type) {
case ixgbe_mac_82598EB:
ixgbe_set_ivar_map(hw, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
-  intr_handle->max_intr - 1);
+  MISC_VEC_ID);
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
-   ixgbe_set_ivar_map(hw, -1, 1, intr_handle->max_intr - 1);
+   ixgbe_set_ivar_map(hw, -1, 1, MISC_VEC_ID);
break;
default:
break;
}
-   IXGBE_WRITE_REG(hw, IXGBE_EITR(queue_id),
+   IXGBE_WRITE_REG(hw, IXGBE_EITR(MISC_VEC_ID),
IXGBE_MIN_INTER_INTERRUPT_INTERVAL_DEFAULT & 0xFFF);

/* set up to autoclear timer, and the vectors */
-- 
2.4.3

[dpdk-dev] [PATCH v1 01/11] eal/linux: vfio map misc intr to vector zero

[Cunming Liang]

During VFIO_DEVICE_SET_IRQS, the previous order is {Q0_fd, ... Qn_fd, misc_fd}.
The vector number of misc is indeterminable which is ugly to some NIC(e.g. 
i40e, fm10k).
The patch adjusts the order in {misc_fd, Q0_fd, ... Qn_fd}, always reserve the 
first vector to misc interrupt.

Signed-off-by: Cunming Liang 
---
 lib/librte_eal/linuxapp/eal/eal_interrupts.c   | 18 --
 .../linuxapp/eal/include/exec-env/rte_interrupts.h |  3 +++
 2 files changed, 15 insertions(+), 6 deletions(-)

diff --git a/lib/librte_eal/linuxapp/eal/eal_interrupts.c 
b/lib/librte_eal/linuxapp/eal/eal_interrupts.c
index 078318c..8e76a7a 100644
--- a/lib/librte_eal/linuxapp/eal/eal_interrupts.c
+++ b/lib/librte_eal/linuxapp/eal/eal_interrupts.c
@@ -300,8 +300,10 @@ vfio_enable_msix(struct rte_intr_handle *intr_handle) {
irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;
irq_set->start = 0;
fd_ptr = (int *) _set->data;
-   memcpy(fd_ptr, intr_handle->efds, sizeof(intr_handle->efds));
-   fd_ptr[intr_handle->max_intr - 1] = intr_handle->fd;
+   fd_ptr[MISC_VEC_ID] = intr_handle->fd;
+   /* follow up with misc(0) interrupt */
+   memcpy(_ptr[RX_VEC_START], intr_handle->efds,
+   sizeof(*intr_handle->efds) * intr_handle->nb_efd);

ret = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);

@@ -1068,10 +1070,13 @@ rte_intr_rx_ctl(struct rte_intr_handle *intr_handle, 
int epfd,
struct rte_epoll_event *rev;
struct rte_epoll_data *epdata;
int epfd_op;
+   unsigned int efd_idx;
int rc = 0;

+   efd_idx = (vec >= RX_VEC_START) ? (vec - RX_VEC_START) : vec;
+
if (!intr_handle || intr_handle->nb_efd == 0 ||
-   vec >= intr_handle->nb_efd) {
+   efd_idx >= intr_handle->nb_efd) {
RTE_LOG(ERR, EAL, "Wrong intr vector number.\n");
return -EPERM;
}
@@ -1079,7 +1084,7 @@ rte_intr_rx_ctl(struct rte_intr_handle *intr_handle, int 
epfd,
switch (op) {
case RTE_INTR_EVENT_ADD:
epfd_op = EPOLL_CTL_ADD;
-   rev = _handle->elist[vec];
+   rev = _handle->elist[efd_idx];
if (rev->status != RTE_EPOLL_INVALID) {
RTE_LOG(INFO, EAL, "Event already been added.\n");
return -EEXIST;
@@ -1091,7 +1096,8 @@ rte_intr_rx_ctl(struct rte_intr_handle *intr_handle, int 
epfd,
epdata->data   = data;
epdata->cb_fun = (rte_intr_event_cb_t)eal_intr_proc_rxtx_intr;
epdata->cb_arg = (void *)intr_handle;
-   rc = rte_epoll_ctl(epfd, epfd_op, intr_handle->efds[vec], rev);
+   rc = rte_epoll_ctl(epfd, epfd_op,
+  intr_handle->efds[efd_idx], rev);
if (!rc)
RTE_LOG(DEBUG, EAL,
"efd %d associated with vec %d added on epfd %d"
@@ -1101,7 +1107,7 @@ rte_intr_rx_ctl(struct rte_intr_handle *intr_handle, int 
epfd,
break;
case RTE_INTR_EVENT_DEL:
epfd_op = EPOLL_CTL_DEL;
-   rev = _handle->elist[vec];
+   rev = _handle->elist[efd_idx];
if (rev->status == RTE_EPOLL_INVALID) {
RTE_LOG(INFO, EAL, "Event does not exist.\n");
return -EPERM;
diff --git a/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h 
b/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
index 45071b7..b8fd318 100644
--- a/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
+++ b/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
@@ -77,6 +77,9 @@ struct rte_epoll_event {
struct rte_epoll_data epdata;
 };

+#define MISC_VEC_ID(0)
+#define RX_VEC_START   (MISC_VEC_ID + 1)
+
 /** Handle for interrupts. */
 struct rte_intr_handle {
union {
-- 
2.4.3

[dpdk-dev] [PATCH v1 00/11] interrupt mode for i40e

[Cunming Liang]

This patch series contains four major parts.

1. always reserve vector zero for misc cause in vfio mapping
2. add api to declare the capability of multiple interrupt vector support
3. fix the rx interrupt compatible issue with mbox in ixgbe/igb IOV-PF
4. add rx interrupt support in i40e PF and VF

Cunming Liang (11):
  eal/linux: vfio map misc intr to vector zero
  ixgbe: reserve intr vector zero for misc cause
  igb: reserve intr vector zero for misc cause
  eal/linux: not allow to enable zero intr efd
  eal/linux: add intr api to report multi-vector capability
  ixgbe: fix rx intr compatible issue with PF mbox
  ixgbevf: cleanup unnecessary interrupt handler
  igb: fix rx intr compatible issue with PF mbox
  i40e: add rx interrupt support
  i40evf: add rx interrupt support
  doc: release note update for intr mode

 doc/guides/rel_notes/release_2_2.rst   |   2 +
 drivers/net/e1000/igb_ethdev.c |  63 ++--
 drivers/net/i40e/i40e_ethdev.c | 359 +
 drivers/net/i40e/i40e_ethdev.h |  17 +
 drivers/net/i40e/i40e_ethdev_vf.c  | 141 +++-
 drivers/net/i40e/i40e_pf.c |   7 +-
 drivers/net/ixgbe/ixgbe_ethdev.c   | 144 +++--
 .../bsdapp/eal/include/exec-env/rte_interrupts.h   |   3 +-
 lib/librte_eal/linuxapp/eal/eal_interrupts.c   |  35 +-
 .../linuxapp/eal/include/exec-env/rte_interrupts.h |  16 +-
 lib/librte_eal/linuxapp/eal/rte_eal_version.map|   7 +
 11 files changed, 597 insertions(+), 197 deletions(-)

-- 
2.4.3

[dpdk-dev] [PATCH v5 resend 03/12] vhost: vring queue setup for multiple queue support

[Marcel Apfelbaum]

On 09/23/2015 06:46 AM, Yuanhan Liu wrote:
> On Tue, Sep 22, 2015 at 05:51:02PM +0300, Marcel Apfelbaum wrote:
[...]
>>> It's proved to work after the fix (at least in my testing), but
>>> it's late here and I'm gonna send a new version tomorrow, including
>>> some other comments addressing. Please do more test then :)
>>>
>
> It's unlikely that I will send another version unless I have clear clue
> how to address a comment from Michael about vring flush.

Hi,

I don't pretend to understand how exactly this works in DPDK, but since the 
objective
is to not have packets in vring you could:

1. Disable the vq processing of new packets. (You introduced the 'enable' flag)
2. Wait a reasonable amount of time until the processing cores
finish dealing with current packets.
3. Check the vqs that no packets are waiting for processing.

Again, this is only a suggestion and may be incomplete (or naive).

>
> But anyway, you still could help me to prove the fix works. You can
> apply the attachment on top of my old patchset, and it should work.
>

I tested it and it works just fine!

Thanks again,
Marcel

>   --yliu
>>
>> Those are very good news!
>> Tomorrow we have holidays but the day after that I'll try it for sure.
>

[dpdk-dev] [PATCH v3] doc: add performance test guide to the linux gsg

[Mcnamara, John]

> -Original Message-
> From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Qian Xu
> Sent: Thursday, September 24, 2015 12:49 PM
> To: dev at dpdk.org
> Subject: [dpdk-dev] [PATCH v3] doc: add performance test guide to the
> linux gsg
> 
> Add a new guide doc as part of the Linux Getting Started Guide.
> 
> The document is a step-by-step guide on how to get high performance with
> DPDK on an Intel platform.
> 
> It is designed for users who are not familiar with DPDK but would like to
> get the best performance with NICs.
> 
> Signed-off-by: Qian Xu 

Acked-by: John McNamara 

[dpdk-dev] [PATCH] doc: fix for vhost sample parameter

[Thomas Monjalon]

2015-08-18 10:51, Ouyang Changchun:
> This commit removes the dev-index, so update the doc for this change:
> 17b8320a3e11e146868906d0082b6e402d5f2255
> "vhost: remove index parameter"
> 
> Signed-off-by: Changchun Ouyang 

Applied, thanks

[dpdk-dev] [PATCH v2 3/3] examples/ip_pipeline: add mp/mc and frag/ras swq

[Piotr Azarewicz]

Add integrated MP/MC and fragmentation/reassembly support to SWQs

Signed-off-by: Piotr Azarewicz 
---
 examples/ip_pipeline/app.h  |   14 +++
 examples/ip_pipeline/config_check.c |   45 +++-
 examples/ip_pipeline/config_parse.c |  195 +--
 examples/ip_pipeline/init.c |  165 -
 examples/ip_pipeline/main.c |4 +-
 examples/ip_pipeline/pipeline_be.h  |   18 
 6 files changed, 402 insertions(+), 39 deletions(-)

diff --git a/examples/ip_pipeline/app.h b/examples/ip_pipeline/app.h
index 521e3a0..943466e 100644
--- a/examples/ip_pipeline/app.h
+++ b/examples/ip_pipeline/app.h
@@ -107,6 +107,14 @@ struct app_pktq_swq_params {
uint32_t dropless;
uint64_t n_retries;
uint32_t cpu_socket_id;
+   uint32_t ipv4_frag;
+   uint32_t ipv6_frag;
+   uint32_t ipv4_ras;
+   uint32_t ipv6_ras;
+   uint32_t mtu;
+   uint32_t metadata_size;
+   uint32_t mempool_direct_id;
+   uint32_t mempool_indirect_id;
 };

 #ifndef APP_FILE_NAME_SIZE
@@ -405,6 +413,10 @@ struct app_params {
char app_name[APP_APPNAME_SIZE];
const char *config_file;
const char *script_file;
+   const char *parser_file;
+   const char *output_file;
+   const char *preproc;
+   const char *preproc_args;
uint64_t port_mask;
uint32_t log_level;

@@ -880,6 +892,8 @@ int app_config_init(struct app_params *app);
 int app_config_args(struct app_params *app,
int argc, char **argv);

+int app_config_preproc(struct app_params *app);
+
 int app_config_parse(struct app_params *app,
const char *file_name);

diff --git a/examples/ip_pipeline/config_check.c 
b/examples/ip_pipeline/config_check.c
index 07f4c8b..8052bc4 100644
--- a/examples/ip_pipeline/config_check.c
+++ b/examples/ip_pipeline/config_check.c
@@ -33,6 +33,8 @@

 #include 

+#include 
+
 #include "app.h"

 static void
@@ -193,6 +195,7 @@ check_swqs(struct app_params *app)
struct app_pktq_swq_params *p = >swq_params[i];
uint32_t n_readers = app_swq_get_readers(app, p);
uint32_t n_writers = app_swq_get_writers(app, p);
+   uint32_t n_flags;

APP_CHECK((p->size > 0),
"%s size is 0\n", p->name);
@@ -217,14 +220,48 @@ check_swqs(struct app_params *app)
APP_CHECK((n_readers != 0),
"%s has no reader\n", p->name);

-   APP_CHECK((n_readers == 1),
-   "%s has more than one reader\n", p->name);
+   if (n_readers > 1)
+   APP_LOG(app, LOW, "%s has more than one reader", 
p->name);

APP_CHECK((n_writers != 0),
"%s has no writer\n", p->name);

-   APP_CHECK((n_writers == 1),
-   "%s has more than one writer\n", p->name);
+   if (n_writers > 1)
+   APP_LOG(app, LOW, "%s has more than one writer", 
p->name);
+
+   n_flags = p->ipv4_frag + p->ipv6_frag + p->ipv4_ras + 
p->ipv6_ras;
+
+   APP_CHECK((n_flags < 2),
+   "%s has more than one fragmentation or reassembly mode 
enabled\n",
+   p->name);
+
+   APP_CHECK((!((n_readers > 1) && (n_flags == 1))),
+   "%s has more than one reader when fragmentation or 
reassembly"
+   " mode enabled\n",
+   p->name);
+
+   APP_CHECK((!((n_writers > 1) && (n_flags == 1))),
+   "%s has more than one writer when fragmentation or 
reassembly"
+   " mode enabled\n",
+   p->name);
+
+   n_flags = p->ipv4_ras + p->ipv6_ras;
+
+   APP_CHECK((!((p->dropless == 1) && (n_flags == 1))),
+   "%s has dropless when reassembly mode enabled\n", 
p->name);
+
+   n_flags = p->ipv4_frag + p->ipv6_frag;
+
+   if (n_flags == 1) {
+   uint16_t ip_hdr_size = (p->ipv4_frag) ? sizeof(struct 
ipv4_hdr) :
+   sizeof(struct ipv6_hdr);
+
+   APP_CHECK((p->mtu > ip_hdr_size),
+   "%s mtu size is smaller than ip header\n", 
p->name);
+
+   APP_CHECK((!((p->mtu - ip_hdr_size) % 8)),
+   "%s mtu size is incorrect\n", p->name);
+   }
}
 }

diff --git a/examples/ip_pipeline/config_parse.c 
b/examples/ip_pipeline/config_parse.c
index c9b78f9..a35bd3e 100644
--- a/examples/ip_pipeline/config_parse.c
+++ b/examples/ip_pipeline/config_parse.c
@@ -156,6 +156,14 @@ static const struct app_pktq_swq_params default_swq_params 
= {
.dropless = 0,
.n_retries = 0,
.cpu_socket_id = 0,
+   .ipv4_frag = 0,
+   .ipv6_frag = 0,
+   .ipv4_ras = 0,
+  

[dpdk-dev] [PATCH v2 2/3] port: fix ras ring ports

[Piotr Azarewicz]

Bug fixes for ring ports with IPv4/IPv6 reassembly support.
Previous implementation can't work properly due to incorrect choosing
process function.
Also, assuming that, when processing ip packet, ip header is know we can
set l3_len parameter here.

Signed-off-by: Piotr Azarewicz 
---
 lib/librte_port/rte_port_ras.c |8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/lib/librte_port/rte_port_ras.c b/lib/librte_port/rte_port_ras.c
index 6bd0f8c..e45d450 100644
--- a/lib/librte_port/rte_port_ras.c
+++ b/lib/librte_port/rte_port_ras.c
@@ -144,7 +144,7 @@ rte_port_ring_writer_ras_create(void *params, int 
socket_id, int is_ipv4)
port->tx_burst_sz = conf->tx_burst_sz;
port->tx_buf_count = 0;

-   port->f_ras = (is_ipv4 == 0) ? process_ipv4 : process_ipv6;
+   port->f_ras = (is_ipv4 == 1) ? process_ipv4 : process_ipv6;

return port;
 }
@@ -182,7 +182,7 @@ process_ipv4(struct rte_port_ring_writer_ras *p, struct 
rte_mbuf *pkt)
/* Assume there is no ethernet header */
struct ipv4_hdr *pkt_hdr = rte_pktmbuf_mtod(pkt, struct ipv4_hdr *);

-   /* Get "Do not fragment" flag and fragment offset */
+   /* Get "More fragments" flag and fragment offset */
uint16_t frag_field = rte_be_to_cpu_16(pkt_hdr->fragment_offset);
uint16_t frag_offset = (uint16_t)(frag_field & IPV4_HDR_OFFSET_MASK);
uint16_t frag_flag = (uint16_t)(frag_field & IPV4_HDR_MF_FLAG);
@@ -195,6 +195,8 @@ process_ipv4(struct rte_port_ring_writer_ras *p, struct 
rte_mbuf *pkt)
struct rte_ip_frag_tbl *tbl = p->frag_tbl;
struct rte_ip_frag_death_row *dr = >death_row;

+   pkt->l3_len = sizeof(*pkt_hdr);
+
/* Process this fragment */
mo = rte_ipv4_frag_reassemble_packet(tbl, dr, pkt, rte_rdtsc(),
pkt_hdr);
@@ -224,6 +226,8 @@ process_ipv6(struct rte_port_ring_writer_ras *p, struct 
rte_mbuf *pkt)
struct rte_ip_frag_tbl *tbl = p->frag_tbl;
struct rte_ip_frag_death_row *dr = >death_row;

+   pkt->l3_len = sizeof(*pkt_hdr) + sizeof(*frag_hdr);
+
/* Process this fragment */
mo = rte_ipv6_frag_reassemble_packet(tbl, dr, pkt, rte_rdtsc(), 
pkt_hdr,
frag_hdr);
-- 
1.7.9.5

[dpdk-dev] [PATCH v2 1/3] port: add mp/mc ring ports

[Piotr Azarewicz]

ring_multi_reader input port (on top of multi consumer rte_ring)
ring_multi_writer output port (on top of multi producer rte_ring)

Signed-off-by: Piotr Azarewicz 
---
 lib/librte_port/rte_port_ring.c |  311 +++
 lib/librte_port/rte_port_ring.h |   35 -
 2 files changed, 316 insertions(+), 30 deletions(-)

diff --git a/lib/librte_port/rte_port_ring.c b/lib/librte_port/rte_port_ring.c
index 9461c05..755dfc1 100644
--- a/lib/librte_port/rte_port_ring.c
+++ b/lib/librte_port/rte_port_ring.c
@@ -63,15 +63,19 @@ struct rte_port_ring_reader {
 };

 static void *
-rte_port_ring_reader_create(void *params, int socket_id)
+rte_port_ring_reader_create_internal(void *params, int socket_id,
+   uint32_t is_multi)
 {
struct rte_port_ring_reader_params *conf =
(struct rte_port_ring_reader_params *) params;
struct rte_port_ring_reader *port;

/* Check input parameters */
-   if (conf == NULL) {
-   RTE_LOG(ERR, PORT, "%s: params is NULL\n", __func__);
+   if ((conf == NULL) ||
+   (conf->ring == NULL) ||
+   (conf->ring->cons.sc_dequeue && is_multi) ||
+   (!(conf->ring->cons.sc_dequeue) && !is_multi)) {
+   RTE_LOG(ERR, PORT, "%s: Invalid Parameters\n", __func__);
return NULL;
}

@@ -89,6 +93,18 @@ rte_port_ring_reader_create(void *params, int socket_id)
return port;
 }

+static void *
+rte_port_ring_reader_create(void *params, int socket_id)
+{
+   return rte_port_ring_reader_create_internal(params, socket_id, 0);
+}
+
+static void *
+rte_port_ring_multi_reader_create(void *params, int socket_id)
+{
+   return rte_port_ring_reader_create_internal(params, socket_id, 1);
+}
+
 static int
 rte_port_ring_reader_rx(void *port, struct rte_mbuf **pkts, uint32_t n_pkts)
 {
@@ -102,6 +118,19 @@ rte_port_ring_reader_rx(void *port, struct rte_mbuf 
**pkts, uint32_t n_pkts)
 }

 static int
+rte_port_ring_multi_reader_rx(void *port, struct rte_mbuf **pkts,
+   uint32_t n_pkts)
+{
+   struct rte_port_ring_reader *p = (struct rte_port_ring_reader *) port;
+   uint32_t nb_rx;
+
+   nb_rx = rte_ring_mc_dequeue_burst(p->ring, (void **) pkts, n_pkts);
+   RTE_PORT_RING_READER_STATS_PKTS_IN_ADD(p, nb_rx);
+
+   return nb_rx;
+}
+
+static int
 rte_port_ring_reader_free(void *port)
 {
if (port == NULL) {
@@ -155,10 +184,12 @@ struct rte_port_ring_writer {
uint32_t tx_burst_sz;
uint32_t tx_buf_count;
uint64_t bsz_mask;
+   uint32_t is_multi;
 };

 static void *
-rte_port_ring_writer_create(void *params, int socket_id)
+rte_port_ring_writer_create_internal(void *params, int socket_id,
+   uint32_t is_multi)
 {
struct rte_port_ring_writer_params *conf =
(struct rte_port_ring_writer_params *) params;
@@ -166,7 +197,9 @@ rte_port_ring_writer_create(void *params, int socket_id)

/* Check input parameters */
if ((conf == NULL) ||
-   (conf->ring == NULL) ||
+   (conf->ring == NULL) ||
+   (conf->ring->prod.sp_enqueue && is_multi) ||
+   (!(conf->ring->prod.sp_enqueue) && !is_multi) ||
(conf->tx_burst_sz > RTE_PORT_IN_BURST_SIZE_MAX)) {
RTE_LOG(ERR, PORT, "%s: Invalid Parameters\n", __func__);
return NULL;
@@ -185,10 +218,23 @@ rte_port_ring_writer_create(void *params, int socket_id)
port->tx_burst_sz = conf->tx_burst_sz;
port->tx_buf_count = 0;
port->bsz_mask = 1LLU << (conf->tx_burst_sz - 1);
+   port->is_multi = is_multi;

return port;
 }

+static void *
+rte_port_ring_writer_create(void *params, int socket_id)
+{
+   return rte_port_ring_writer_create_internal(params, socket_id, 0);
+}
+
+static void *
+rte_port_ring_multi_writer_create(void *params, int socket_id)
+{
+   return rte_port_ring_writer_create_internal(params, socket_id, 1);
+}
+
 static inline void
 send_burst(struct rte_port_ring_writer *p)
 {
@@ -204,6 +250,21 @@ send_burst(struct rte_port_ring_writer *p)
p->tx_buf_count = 0;
 }

+static inline void
+send_burst_mp(struct rte_port_ring_writer *p)
+{
+   uint32_t nb_tx;
+
+   nb_tx = rte_ring_mp_enqueue_burst(p->ring, (void **)p->tx_buf,
+   p->tx_buf_count);
+
+   RTE_PORT_RING_WRITER_STATS_PKTS_DROP_ADD(p, p->tx_buf_count - nb_tx);
+   for ( ; nb_tx < p->tx_buf_count; nb_tx++)
+   rte_pktmbuf_free(p->tx_buf[nb_tx]);
+
+   p->tx_buf_count = 0;
+}
+
 static int
 rte_port_ring_writer_tx(void *port, struct rte_mbuf *pkt)
 {
@@ -218,9 +279,23 @@ rte_port_ring_writer_tx(void *port, struct rte_mbuf *pkt)
 }

 static int
-rte_port_ring_writer_tx_bulk(void *port,
+rte_port_ring_multi_writer_tx(void *port, struct rte_mbuf *pkt)
+{
+   struct rte_port_ring_writer *p = (struct rte_port_ring_writer *) port;
+
+   

[dpdk-dev] [PATCH v2 0/3] ip_pipeline: add MP/MC and frag/ras support to SWQs

[Piotr Azarewicz]

This patch set enhancement ip_pipeline application:
- librte_port: add support for multi-producer/multi-consumer ring ports
- librte_port: bug fixes for ring ports with IPv4/IPv6 reassembly support
- ip_pipeline application: integrate MP/MC and fragmentation/reassembly support
 to SWQs

v2 changes:
- rte_port_ring:
- fixed checkpatch errors
- interlace the implementation of multi into the implementation of 
single
- reduced the amount of code duplication

Piotr Azarewicz (3):
  port: add mp/mc ring ports
  port: fix ras ring ports
  examples/ip_pipeline: add mp/mc and frag/ras swq

 examples/ip_pipeline/app.h  |   14 ++
 examples/ip_pipeline/config_check.c |   45 -
 examples/ip_pipeline/config_parse.c |  195 --
 examples/ip_pipeline/init.c |  165 ---
 examples/ip_pipeline/main.c |4 +-
 examples/ip_pipeline/pipeline_be.h  |   18 ++
 lib/librte_port/rte_port_ras.c  |8 +-
 lib/librte_port/rte_port_ring.c |  311 ---
 lib/librte_port/rte_port_ring.h |   35 +++-
 9 files changed, 724 insertions(+), 71 deletions(-)

-- 
1.7.9.5

[dpdk-dev] RSS granularity configuration

[Krishna, Vinod]

Hi All,

RSS could me more flexible if it can support non-standard packets.

Thanks,
VK

-Original Message-
From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of dev-requ...@dpdk.org
Sent: Thursday, September 24, 2015 12:39 PM
To: dev at dpdk.org
Subject: dev Digest, Vol 59, Issue 28

Send dev mailing list submissions to
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To subscribe or unsubscribe via the World Wide Web, visit
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When replying, please edit your Subject line so it is more specific than "Re: 
Contents of dev digest..."


Today's Topics:

   1. [PATCH v3 0/2] i40e: RSS granularity configuration (Helin Zhang)
   2. [PATCH v3 1/2] i40e: add RSS granularity configuration
  (Helin Zhang)


--

Message: 1
Date: Thu, 24 Sep 2015 15:08:15 +0800
From: Helin Zhang 
To: dev at dpdk.org
Cc: yulong.pei at intel.com
Subject: [dpdk-dev] [PATCH v3 0/2] i40e: RSS granularity configuration
Message-ID: <1443078497-20602-1-git-send-email-helin.zhang at intel.com>

The default fields of a received packet are loaded from firmware, which cannot 
be modified even users want to use different fields for RSS or filtering. Here 
adds a workaround to open more flexibilities of selecting packet fields for 
hash calculation or flow director to users. It also includes the modifications 
in testpmd to support the testing.

v2 changes:
Solved the compilation issues.

v3 changes:
Support selecting more input set fields.

Helin Zhang (2):
  i40e: add RSS granularity configuration
  app/testpmd: add test commands for RSS granularity

 app/test-pmd/cmdline.c  | 115 
 drivers/net/i40e/i40e_ethdev.c  | 628 
 drivers/net/i40e/i40e_ethdev.h  |   6 +
 drivers/net/i40e/i40e_fdir.c|  31 ++
 lib/librte_ether/rte_eth_ctrl.h | 108 ++-
 5 files changed, 884 insertions(+), 4 deletions(-)

--
1.9.3



--

Message: 2
Date: Thu, 24 Sep 2015 15:08:16 +0800
From: Helin Zhang 
To: dev at dpdk.org
Cc: yulong.pei at intel.com
Subject: [dpdk-dev] [PATCH v3 1/2] i40e: add RSS granularity
configuration
Message-ID: <1443078497-20602-2-git-send-email-helin.zhang at intel.com>

The default fields of a received packet are loaded from firmware,
which cannot be modified even users want to use different fields
for RSS or filtering. Here adds a workaround to open more
flexibilities of selecting packet fields for hash calculation or
flow director to users.

Signed-off-by: Helin Zhang 
Signed-off-by: Andrey Chilikin 
---
 drivers/net/i40e/i40e_ethdev.c  | 628 
 drivers/net/i40e/i40e_ethdev.h  |   6 +
 drivers/net/i40e/i40e_fdir.c|  31 ++
 lib/librte_ether/rte_eth_ctrl.h | 108 ++-
 4 files changed, 769 insertions(+), 4 deletions(-)

v2 changes:
Solved the compilation issues.

v3 changes:
Support selecting more input set fields.

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 2dd9fdc..77e6906 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -113,6 +113,135 @@
 #define I40E_PRTTSYN_TSYNENA  0x8000
 #define I40E_PRTTSYN_TSYNTYPE 0x0e00

+#define I40E_PRTQF_FD_INSET(_i, _j)  (0x0025 + ((_i) * 64 + (_j) * 32))
+#define I40E_GLQF_FD_MSK(_i, _j) (0x00267200 + ((_i) * 4 + (_j) * 8))
+#define I40E_GLQF_HASH_INSET(_i, _j) (0x00267600 + ((_i) * 4 + (_j) * 8))
+#define I40E_GLQF_HASH_MSK(_i, _j)   (0x00267A00 + ((_i) * 4 + (_j) * 8))
+
+#define I40E_INSET_UNKNOWN0x0ULL
+
+/* bit0 ~ bit 7 */
+#define I40E_INSET_DMAC0x0001ULL
+#define I40E_INSET_SMAC0x0002ULL
+#define I40E_INSET_VLAN_OUTER  0x0004ULL
+#define I40E_INSET_VLAN_INNER  0x0008ULL
+#define I40E_INSET_VLAN_TUNNEL 0x0010ULL
+
+/* bit 8 ~ bit 15 */
+#define I40E_INSET_IPV4_SRC0x0100ULL
+#define I40E_INSET_IPV4_DST0x0200ULL
+#define I40E_INSET_IPV6_SRC0x0400ULL
+#define I40E_INSET_IPV6_DST0x0800ULL
+#define I40E_INSET_SRC_PORT0x1000ULL
+#define I40E_INSET_DST_PORT0x2000ULL
+#define I40E_INSET_SCTP_VT 0x4000ULL
+
+/* bit 16 ~ bit 31 */
+#define I40E_INSET_IPV4_TOS0x0001ULL
+#define I40E_INSET_IPV4_PROTO  0x0002ULL
+#define I40E_INSET_IPV4_TTL0x0004ULL
+#define I40E_INSET_IPV6_TC 0x0008ULL
+#define I40E_INSET_IPV6_FLOW   0x0010ULL
+#define I40E_INSET_IPV6_NEXT_HDR   0x0020ULL
+#define I40E_INSET_IPV6_HOP_LIMIT  

[dpdk-dev] DPDK v2.1.0 tilegx on TileraMDE-4.2.2.169597

[Arthas]

Hi, Zhigang
   I used "--hvx hugepagesz=16m --hvx hugepages=256", but testpmd still not 
work and exit. 
Command: run cat /proc/meminfo
MemTotal:8230464 kB
MemFree: 3872576 kB
Buffers:   0 kB
Cached:12480 kB
SwapCached:0 kB
Active:11200 kB
Inactive:   5888 kB
Active(anon):  11200 kB
Inactive(anon): 5888 kB
Active(file):  0 kB
Inactive(file):0 kB
Unevictable:   0 kB
Mlocked:   0 kB
SwapTotal: 0 kB
SwapFree:  0 kB
Dirty: 0 kB
Writeback: 0 kB
AnonPages:  4736 kB
Mapped: 3072 kB
Shmem: 12480 kB
Slab:  16256 kB
SReclaimable:768 kB
SUnreclaim:15488 kB
KernelStack:   11648 kB
PageTables: 4096 kB
NFS_Unstable:  0 kB
Bounce:0 kB
WritebackTmp:  0 kB
CommitLimit: 2018048 kB
Committed_AS:  19328 kB
VmallocTotal:4194304 kB
VmallocUsed:  224704 kB
VmallocChunk:3964864 kB
Sequestered:   37184 kB
HugePages_Total: 256
HugePages_Free:  256
HugePages_Rsvd:0
HugePages_Surp:0
Hugepagesize:  16384 kB

Command: run ./testpmd -c 0x -m 2048 -n 1 -r 1 --vdev xgbe1 -- --rx=1 
--tx=2 --forward-mode=txonly -a --port-topology=chained
gxio_mpipe_init instance 0
gxio_mpipe_init instance 1
EAL: Detected lcore 0 as core 0 on socket 0
EAL: Detected lcore 1 as core 1 on socket 0
EAL: Detected lcore 2 as core 2 on socket 0
EAL: Detected lcore 3 as core 3 on socket 0
EAL: Detected lcore 4 as core 4 on socket 0
EAL: Detected lcore 5 as core 5 on socket 0
EAL: Detected lcore 6 as core 6 on socket 0
EAL: Detected lcore 7 as core 7 on socket 0
EAL: Detected lcore 8 as core 8 on socket 0
EAL: Detected lcore 9 as core 9 on socket 0
EAL: Detected lcore 10 as core 10 on socket 0
EAL: Detected lcore 11 as core 11 on socket 0
EAL: Detected lcore 12 as core 12 on socket 0
EAL: Detected lcore 13 as core 13 on socket 0
EAL: Detected lcore 14 as core 14 on socket 0
EAL: Detected lcore 15 as core 15 on socket 0
EAL: Detected lcore 16 as core 16 on socket 0
EAL: Detected lcore 17 as core 17 on socket 0
EAL: Detected lcore 18 as core 18 on socket 0
EAL: Detected lcore 19 as core 19 on socket 0
EAL: Detected lcore 20 as core 20 on socket 0
EAL: Detected lcore 21 as core 21 on socket 0
EAL: Detected lcore 22 as core 22 on socket 0
EAL: Detected lcore 23 as core 23 on socket 0
EAL: Detected lcore 24 as core 24 on socket 0
EAL: Detected lcore 25 as core 25 on socket 0
EAL: Detected lcore 26 as core 26 on socket 0
EAL: Detected lcore 27 as core 27 on socket 0
EAL: Detected lcore 28 as core 28 on socket 0
EAL: Detected lcore 29 as core 29 on socket 0
EAL: Detected lcore 30 as core 30 on socket 0
EAL: Detected lcore 31 as core 31 on socket 0
EAL: Detected lcore 32 as core 32 on socket 0
EAL: Detected lcore 33 as core 33 on socket 0
EAL: Detected lcore 34 as core 34 on socket 0
EAL: Detected lcore 35 as core 35 on socket 0
EAL: Support maximum 36 logical core(s) by configuration.
EAL: Detected 36 lcore(s)
EAL: Setting up physically contiguous memory...
EAL: Ask a virtual area of 0xc00 bytes
EAL: Virtual area found at 0x1ffdb00 (size = 0xc00)
EAL: Ask a virtual area of 0xf400 bytes
EAL: Virtual area found at 0x1fee600 (size = 0xf400)
EAL: Requesting 128 pages of size 16MB from socket 0
EAL: TSC frequency is ~119 KHz
EAL: WARNING: cpu flags constant_tsc=no nonstop_tsc=no -> using unreliable 
clock cycles !
EAL: Master lcore 0 is ready (tid=f7f04690;cpuset=[0])
PMD: mpipe init xgbe1
PMD: xgbe1: Initialized mpipe device(mac ee:d1:53:72:82:5a).
EAL: lcore 1 is ready (tid=eafaf060;cpuset=[1])
EAL: lcore 2 is ready (tid=ea7af060;cpuset=[2])
EAL: lcore 3 is ready (tid=e9faf060;cpuset=[3])
EAL: lcore 4 is ready (tid=e97af060;cpuset=[4])
EAL: lcore 5 is ready (tid=e8faf060;cpuset=[5])
EAL: lcore 6 is ready (tid=e87af060;cpuset=[6])
EAL: lcore 7 is ready (tid=e7faf060;cpuset=[7])
EAL: lcore 8 is ready (tid=dafff060;cpuset=[8])
EAL: lcore 9 is ready (tid=da7ff060;cpuset=[9])
EAL: lcore 10 is ready (tid=d9fff060;cpuset=[10])
EAL: lcore 11 is ready (tid=d97ff060;cpuset=[11])
EAL: lcore 12 is ready (tid=d8fff060;cpuset=[12])
EAL: lcore 14 is ready (tid=b3fff060;cpuset=[14])
EAL: lcore 13 is ready (tid=d87ff060;cpuset=[13])
EAL: lcore 15 is ready (tid=b37ff060;cpuset=[15])
EAL: lcore 16 is ready (tid=b2fff060;cpuset=[16])
EAL: lcore 17 is ready (tid=b27ff060;cpuset=[17])
EAL: lcore 18 is ready (tid=b1fff060;cpuset=[18])
EAL: lcore 19 is ready (tid=b17ff060;cpuset=[19])
EAL: lcore 20 is ready (tid=b0fff060;cpuset=[20])
EAL: lcore 21 is ready (tid=b07ff060;cpuset=[21])
EAL: lcore 22 is ready (tid=8060;cpuset=[22])
EAL: lcore 23 is ready (tid=8f7ff060;cpuset=[23])
EAL: lcore 24 is ready (tid=8efff060;cpuset=[24])
EAL: lcore 25 is ready (tid=8e7ff060;cpuset=[25])
EAL: lcore 26 is ready (tid=8dfff060;cpuset=[26])
EAL: lcore 27 is 

[dpdk-dev] [PATCH 3/3] scripts: teach ABI validator about CONFIG_RTE_KNI_KMOD

[Panu Matilainen]

The validator attempts to disable all kernel modules but since
commit 36080ff96b0eb37a6da8c4fec1a2f8a57dfadf5b fails to do so
for KNI, causing the build stage to fail if kernel headers are missing.

With the introduction of CONFIG_RTE_KNI_KMOD, CONFIG_RTE_LIBRTE_KNI=n
can eventually be dropped but leaving it around for now as its
needed with pre-2.1 versions.

Signed-off-by: Panu Matilainen 
---
 scripts/validate-abi.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/scripts/validate-abi.sh b/scripts/validate-abi.sh
index 12946d4..cbf9d7f 100755
--- a/scripts/validate-abi.sh
+++ b/scripts/validate-abi.sh
@@ -88,6 +88,7 @@ fixup_config() {
sed -i -e"$ a\CONFIG_RTE_NEXT_ABI=n" config/defconfig_$TARGET
sed -i -e"$ a\CONFIG_RTE_EAL_IGB_UIO=n" config/defconfig_$TARGET
sed -i -e"$ a\CONFIG_RTE_LIBRTE_KNI=n" config/defconfig_$TARGET
+   sed -i -e"$ a\CONFIG_RTE_KNI_KMOD=n" config/defconfig_$TARGET
 }

 ###
-- 
2.4.3

[dpdk-dev] [PATCH 2/3] scripts: move two identical config fixups into a function

[Panu Matilainen]

Signed-off-by: Panu Matilainen 
---
 scripts/validate-abi.sh | 23 +++
 1 file changed, 11 insertions(+), 12 deletions(-)

diff --git a/scripts/validate-abi.sh b/scripts/validate-abi.sh
index b9c9989..12946d4 100755
--- a/scripts/validate-abi.sh
+++ b/scripts/validate-abi.sh
@@ -81,6 +81,15 @@ cleanup_and_exit() {
exit $1
 }

+# Make sure we configure SHARED libraries
+# Also turn off IGB and KNI as those require kernel headers to build
+fixup_config() {
+   sed -i -e"$ a\CONFIG_RTE_BUILD_SHARED_LIB=y" config/defconfig_$TARGET
+   sed -i -e"$ a\CONFIG_RTE_NEXT_ABI=n" config/defconfig_$TARGET
+   sed -i -e"$ a\CONFIG_RTE_EAL_IGB_UIO=n" config/defconfig_$TARGET
+   sed -i -e"$ a\CONFIG_RTE_LIBRTE_KNI=n" config/defconfig_$TARGET
+}
+
 ###
 #START
 
@@ -154,12 +163,7 @@ log "INFO" "Checking out version $TAG1 of the dpdk"
 # Move to the old version of the tree
 git checkout $TAG1

-# Make sure we configure SHARED libraries
-# Also turn off IGB and KNI as those require kernel headers to build
-sed -i -e"$ a\CONFIG_RTE_BUILD_SHARED_LIB=y" config/defconfig_$TARGET
-sed -i -e"$ a\CONFIG_RTE_NEXT_ABI=n" config/defconfig_$TARGET
-sed -i -e"$ a\CONFIG_RTE_EAL_IGB_UIO=n" config/defconfig_$TARGET
-sed -i -e"$ a\CONFIG_RTE_LIBRTE_KNI=n" config/defconfig_$TARGET
+fixup_config

 # Checking abi compliance relies on using the dwarf information in
 # The shared objects.  Thats only included in the DSO's if we build
@@ -196,12 +200,7 @@ git reset --hard
 log "INFO" "Checking out version $TAG2 of the dpdk"
 git checkout $TAG2

-# Make sure we configure SHARED libraries
-# Also turn off IGB and KNI as those require kernel headers to build
-sed -i -e"$ a\CONFIG_RTE_BUILD_SHARED_LIB=y" config/defconfig_$TARGET
-sed -i -e"$ a\CONFIG_RTE_NEXT_ABI=n" config/defconfig_$TARGET
-sed -i -e"$ a\CONFIG_RTE_EAL_IGB_UIO=n" config/defconfig_$TARGET
-sed -i -e"$ a\CONFIG_RTE_LIBRTE_KNI=n" config/defconfig_$TARGET
+fixup_config

 # Now configure the build
 log "INFO" "Configuring DPDK $TAG2"
-- 
2.4.3

[dpdk-dev] [PATCH 1/3] scripts: permit passing extra compiler & linker flags to ABI validator

[Panu Matilainen]

Its sometimes necessary to disable warnings etc to get an older
version of code to build.

Signed-off-by: Panu Matilainen 
---
 scripts/validate-abi.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/scripts/validate-abi.sh b/scripts/validate-abi.sh
index 4476433..b9c9989 100755
--- a/scripts/validate-abi.sh
+++ b/scripts/validate-abi.sh
@@ -164,8 +164,8 @@ sed -i -e"$ a\CONFIG_RTE_LIBRTE_KNI=n" 
config/defconfig_$TARGET
 # Checking abi compliance relies on using the dwarf information in
 # The shared objects.  Thats only included in the DSO's if we build
 # with -g
-export EXTRA_CFLAGS=-g
-export EXTRA_LDFLAGS=-g
+export EXTRA_CFLAGS="$EXTRA_CFLAGS -g"
+export EXTRA_LDFLAGS="$EXTRA_LDFLAGS -g"

 # Now configure the build
 log "INFO" "Configuring DPDK $TAG1"
-- 
2.4.3

[dpdk-dev] [PATCH 0/3 v2] Minor abi-validator improvements

[Panu Matilainen]

For giggles, tried running abi-validator between 2.0 and 2.1 on
my Fedora 22 laptop, didn't work due to various build failures.
With this patch series the following now succeeds:

EXTRA_CFLAGS="-Wno-error" scripts/validate-abi.sh v2.0.0 v2.1.0 
x86_64-native-linuxapp-gcc

Panu Matilainen (3):
  scripts: permit passing extra compiler & linker flags to ABI validator
  scripts: move two identical config fixups into a function
  scripts: teach ABI validator about CONFIG_RTE_KNI_KMOD

 scripts/validate-abi.sh | 28 ++--
 1 file changed, 14 insertions(+), 14 deletions(-)

-- 
2.4.3

[dpdk-dev] [PATCH 2/3] scripts: move two identical config fixups into a function

[Panu Matilainen]

On 09/24/2015 10:34 AM, Panu Matilainen wrote:

>   # Checking abi compliance relies on using the dwarf information in
>   # The shared objects.  Thats only included in the DSO's if we build
> @@ -167,6 +171,8 @@ sed -i -e"$ a\CONFIG_RTE_LIBRTE_KNI=n" 
> config/defconfig_$TARGET
>   export EXTRA_CFLAGS="$EXTRA_CFLAGS -g"
>   export EXTRA_LDFLAGS="$EXTRA_LDFLAGS -g"
>
> +fixup_config
> +
>   # Now configure the build
>   log "INFO" "Configuring DPDK $TAG1"
>   make config T=$TARGET O=$TARGET > $VERBOSE 2>&1
> @@ -196,13 +202,6 @@ git reset --hard
>   log "INFO" "Checking out version $TAG2 of the dpdk"
>   git checkout $TAG2
>
> -# Make sure we configure SHARED libraries
> -# Also turn off IGB and KNI as those require kernel headers to build
> -sed -i -e"$ a\CONFIG_RTE_BUILD_SHARED_LIB=y" config/defconfig_$TARGET
> -sed -i -e"$ a\CONFIG_RTE_NEXT_ABI=n" config/defconfig_$TARGET
> -sed -i -e"$ a\CONFIG_RTE_EAL_IGB_UIO=n" config/defconfig_$TARGET
> -sed -i -e"$ a\CONFIG_RTE_LIBRTE_KNI=n" config/defconfig_$TARGET
> -

Doh. Obvious brain damage here, will send v2 after fetching apparently 
needed additional coffee.

- Panu -

[dpdk-dev] DPDK.org Community Call - Sept 24 - Discuss Growth, Improvements

[Simon Kågström]

On 2015-09-24 10:36, Thomas Monjalon wrote:
> 2015-09-23 23:56, St Leger, Jim:
>> This call is aimed to get more open dialogue in the community.
> 
> I wonder how a call can "get more open dialogue"?
> Because of being "live", a lot of people cannot attend at this time.
> A call is also a place where only people having the strongest voice will be 
> heard.
> Finally it will be really well understood only by english-native people
> (depending on the accent of speakers).
> 
> I know only one way to be really open and we are using it for this discussion.

One good thing would be if someone could write a summary of the
community call discussion for further discussion on the mailing list.

// Simon

[dpdk-dev] DPDK.org Community Call - Sept 24 - Discuss Growth, Improvements

[Thomas Monjalon]

2015-09-23 23:56, St Leger, Jim:
> This call is aimed to get more open dialogue in the community.

I wonder how a call can "get more open dialogue"?
Because of being "live", a lot of people cannot attend at this time.
A call is also a place where only people having the strongest voice will be 
heard.
Finally it will be really well understood only by english-native people
(depending on the accent of speakers).

I know only one way to be really open and we are using it for this discussion.

[dpdk-dev] [PATCH 3/3] scripts: teach ABI validator about CONFIG_RTE_KNI_KMOD

[Panu Matilainen]

The validator attempts to disable all kernel modules but since
commit 36080ff96b0eb37a6da8c4fec1a2f8a57dfadf5b fails to do so
for KNI, causing the build stage to fail if kernel headers are missing.

With the introduction of CONFIG_RTE_KNI_KMOD, CONFIG_RTE_LIBRTE_KNI=n
can eventually be dropped but leaving it around for now as its
needed with pre-2.1 versions.

Signed-off-by: Panu Matilainen 
---
 scripts/validate-abi.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/scripts/validate-abi.sh b/scripts/validate-abi.sh
index 4b555de..6be67d0 100755
--- a/scripts/validate-abi.sh
+++ b/scripts/validate-abi.sh
@@ -88,6 +88,7 @@ fixup_config() {
sed -i -e"$ a\CONFIG_RTE_NEXT_ABI=n" config/defconfig_$TARGET
sed -i -e"$ a\CONFIG_RTE_EAL_IGB_UIO=n" config/defconfig_$TARGET
sed -i -e"$ a\CONFIG_RTE_LIBRTE_KNI=n" config/defconfig_$TARGET
+   sed -i -e"$ a\CONFIG_RTE_KNI_KMOD=n" config/defconfig_$TARGET
 }

 ###
-- 
2.4.3

[dpdk-dev] [PATCH 2/3] scripts: move two identical config fixups into a function

[Panu Matilainen]

Signed-off-by: Panu Matilainen 
---
 scripts/validate-abi.sh | 25 -
 1 file changed, 12 insertions(+), 13 deletions(-)

diff --git a/scripts/validate-abi.sh b/scripts/validate-abi.sh
index b9c9989..4b555de 100755
--- a/scripts/validate-abi.sh
+++ b/scripts/validate-abi.sh
@@ -81,6 +81,15 @@ cleanup_and_exit() {
exit $1
 }

+# Make sure we configure SHARED libraries
+# Also turn off IGB and KNI as those require kernel headers to build
+fixup_config() {
+   sed -i -e"$ a\CONFIG_RTE_BUILD_SHARED_LIB=y" config/defconfig_$TARGET
+   sed -i -e"$ a\CONFIG_RTE_NEXT_ABI=n" config/defconfig_$TARGET
+   sed -i -e"$ a\CONFIG_RTE_EAL_IGB_UIO=n" config/defconfig_$TARGET
+   sed -i -e"$ a\CONFIG_RTE_LIBRTE_KNI=n" config/defconfig_$TARGET
+}
+
 ###
 #START
 
@@ -154,12 +163,7 @@ log "INFO" "Checking out version $TAG1 of the dpdk"
 # Move to the old version of the tree
 git checkout $TAG1

-# Make sure we configure SHARED libraries
-# Also turn off IGB and KNI as those require kernel headers to build
-sed -i -e"$ a\CONFIG_RTE_BUILD_SHARED_LIB=y" config/defconfig_$TARGET
-sed -i -e"$ a\CONFIG_RTE_NEXT_ABI=n" config/defconfig_$TARGET
-sed -i -e"$ a\CONFIG_RTE_EAL_IGB_UIO=n" config/defconfig_$TARGET
-sed -i -e"$ a\CONFIG_RTE_LIBRTE_KNI=n" config/defconfig_$TARGET
+fixup_config

 # Checking abi compliance relies on using the dwarf information in
 # The shared objects.  Thats only included in the DSO's if we build
@@ -167,6 +171,8 @@ sed -i -e"$ a\CONFIG_RTE_LIBRTE_KNI=n" 
config/defconfig_$TARGET
 export EXTRA_CFLAGS="$EXTRA_CFLAGS -g"
 export EXTRA_LDFLAGS="$EXTRA_LDFLAGS -g"

+fixup_config
+
 # Now configure the build
 log "INFO" "Configuring DPDK $TAG1"
 make config T=$TARGET O=$TARGET > $VERBOSE 2>&1
@@ -196,13 +202,6 @@ git reset --hard
 log "INFO" "Checking out version $TAG2 of the dpdk"
 git checkout $TAG2

-# Make sure we configure SHARED libraries
-# Also turn off IGB and KNI as those require kernel headers to build
-sed -i -e"$ a\CONFIG_RTE_BUILD_SHARED_LIB=y" config/defconfig_$TARGET
-sed -i -e"$ a\CONFIG_RTE_NEXT_ABI=n" config/defconfig_$TARGET
-sed -i -e"$ a\CONFIG_RTE_EAL_IGB_UIO=n" config/defconfig_$TARGET
-sed -i -e"$ a\CONFIG_RTE_LIBRTE_KNI=n" config/defconfig_$TARGET
-
 # Now configure the build
 log "INFO" "Configuring DPDK $TAG2"
 make config T=$TARGET O=$TARGET > $VERBOSE 2>&1
-- 
2.4.3

[dpdk-dev] [PATCH 1/3] scripts: permit passing extra compiler & linker flags to ABI validator

[Panu Matilainen]

Its sometimes necessary to disable warnings etc to get an older
version of code to build.

Signed-off-by: Panu Matilainen 
---
 scripts/validate-abi.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/scripts/validate-abi.sh b/scripts/validate-abi.sh
index 4476433..b9c9989 100755
--- a/scripts/validate-abi.sh
+++ b/scripts/validate-abi.sh
@@ -164,8 +164,8 @@ sed -i -e"$ a\CONFIG_RTE_LIBRTE_KNI=n" 
config/defconfig_$TARGET
 # Checking abi compliance relies on using the dwarf information in
 # The shared objects.  Thats only included in the DSO's if we build
 # with -g
-export EXTRA_CFLAGS=-g
-export EXTRA_LDFLAGS=-g
+export EXTRA_CFLAGS="$EXTRA_CFLAGS -g"
+export EXTRA_LDFLAGS="$EXTRA_LDFLAGS -g"

 # Now configure the build
 log "INFO" "Configuring DPDK $TAG1"
-- 
2.4.3

[dpdk-dev] [PATCH 0/3] Minor abi-validator improvements

[Panu Matilainen]

For giggles, tried running abi-validator between 2.0 and 2.1 on
my Fedora 22 laptop, didn't work due to various build failures.
With this patch series the following now succeeds:

EXTRA_CFLAGS="-Wno-error" scripts/validate-abi.sh v2.0.0 v2.1.0 
x86_64-native-linuxapp-gcc

Panu Matilainen (3):
  scripts: permit passing extra compiler & linker flags to ABI validator
  scripts: move two identical config fixups into a function
  scripts: teach ABI validator about CONFIG_RTE_KNI_KMOD

 scripts/validate-abi.sh | 30 +++---
 1 file changed, 15 insertions(+), 15 deletions(-)

-- 
2.4.3

[dpdk-dev] [PATCH v2 0/3] ip_pipeline: add MP/MC and frag/ras support to SWQs

[Dumitrescu, Cristian]

> -Original Message-
> From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Piotr Azarewicz
> Sent: Thursday, September 24, 2015 12:56 PM
> To: dev at dpdk.org
> Subject: [dpdk-dev] [PATCH v2 0/3] ip_pipeline: add MP/MC and frag/ras
> support to SWQs
> 
> 
> v2 changes:
> - rte_port_ring:
>   - fixed checkpatch errors
>   - interlace the implementation of multi into the implementation of
> single
>   - reduced the amount of code duplication
> 

Acked-by: Cristian Dumitrescu 

[dpdk-dev] DPDK v2.1.0 tilegx on TileraMDE-4.2.2.169597

[Tony Lu]

Hi, Arthas

Seems like something wrong with memseg, could you try with
" --hvx hugepagesz=1G --hvx hugepages=4" to boot Gx card? This
helps reserve hugepages for DPDK, and check there are still such errors.

With regard to MDE-4.3.3, please contact your local tech support.

Thanks
-Zhigang

>-Original Message-
>From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Arthas
>Sent: Wednesday, September 23, 2015 11:56 PM
>To: zlu; dev
>Subject: Re: [dpdk-dev] DPDK v2.1.0 tilegx on TileraMDE-4.2.2.169597
>
>Hi, ZhiGang,
>  Can you tell me where can download TileraMDE-4.3.3 package?  My tilegx
>tech supporter only send me TileraMDE-4.2.4 version!
>:)
>
>Thanks,
>  Arthas
>
>
>
>
>-- Original --
>From:  "Arthas";;
>Date:  Wed, Sep 23, 2015 06:41 PM
>To:  "zlu"; "dev";
>
>Subject:  Re: [dpdk-dev] DPDK v2.1.0 tilegx on TileraMDE-4.2.2.169597
>
>
>
>Hi, ZhiGang
>  I checked source code and debug it , found dpdk function rte_eth_tx_burst
>with tilegx return 0 and no other error.  Can I contact  you directly?
>Regards,
>  Arthas
>
>
>
>-- Original --
>From:  "Arthas";;
>Date:  Wed, Sep 23, 2015 06:35 PM
>To:  "zlu"; "dev";
>
>Subject:  Re: [dpdk-dev] DPDK v2.1.0 tilegx on TileraMDE-4.2.2.169597
>
>
>
>Hi, ZhiGang
>   My tilegx boot parameter is "tile-monitor --dev gxpci${1} --hv-bin-dir
>/tilegx/tile/hv-bin-dir424/ --hvx dataplane=1-64".
>and testpmd start parameter is
>tile-monitor  --dev gxpci0 --resume --upload testpmd  testpmd  --run
>-+-  ./testpmd   -c 0x -m 2048 -n 1 -r 1 --vdev xgbe1 --  --rx=1
--tx=2
>--forward-mode=txonly -a --port-topology=chained -+-
>
> but xgbe1 can't xmit any packet.
>This is my run log:
>
>EAL: Detected lcore 0 as core 0 on socket 0
>EAL: Detected lcore 1 as core 1 on socket 0
>EAL: Detected lcore 2 as core 2 on socket 0
>EAL: Detected lcore 3 as core 3 on socket 0
>EAL: Detected lcore 4 as core 4 on socket 0
>EAL: Detected lcore 5 as core 5 on socket 0
>EAL: Detected lcore 6 as core 6 on socket 0
>EAL: Detected lcore 7 as core 7 on socket 0
>EAL: Detected lcore 8 as core 8 on socket 0
>EAL: Detected lcore 9 as core 9 on socket 0
>EAL: Detected lcore 10 as core 10 on socket 0
>EAL: Detected lcore 11 as core 11 on socket 0
>EAL: Detected lcore 12 as core 12 on socket 0
>EAL: Detected lcore 13 as core 13 on socket 0
>EAL: Detected lcore 14 as core 14 on socket 0
>EAL: Detected lcore 15 as core 15 on socket 0
>EAL: Detected lcore 16 as core 16 on socket 0
>EAL: Detected lcore 17 as core 17 on socket 0
>EAL: Detected lcore 18 as core 18 on socket 0
>EAL: Detected lcore 19 as core 19 on socket 0
>EAL: Detected lcore 20 as core 20 on socket 0
>EAL: Detected lcore 21 as core 21 on socket 0
>EAL: Detected lcore 22 as core 22 on socket 0
>EAL: Detected lcore 23 as core 23 on socket 0
>EAL: Detected lcore 24 as core 24 on socket 0
>EAL: Detected lcore 25 as core 25 on socket 0
>EAL: Detected lcore 26 as core 26 on socket 0
>EAL: Detected lcore 27 as core 27 on socket 0
>EAL: Detected lcore 28 as core 28 on socket 0
>EAL: Detected lcore 29 as core 29 on socket 0
>EAL: Detected lcore 30 as core 30 on socket 0
>EAL: Detected lcore 31 as core 31 on socket 0
>EAL: Detected lcore 32 as core 32 on socket 0
>EAL: Detected lcore 33 as core 33 on socket 0
>EAL: Detected lcore 34 as core 34 on socket 0
>EAL: Detected lcore 35 as core 35 on socket 0
>EAL: Support maximum 36 logical core(s) by configuration.
>EAL: Detected 36 lcore(s)
>EAL: No free hugepages reported in hugepages-1024kB
>EAL: Setting up physically contiguous memory...
>EAL: Ask a virtual area of 0x1600 bytes
>EAL: Virtual area found at 0x1ffd100 (size = 0x1600)
>EAL: Ask a virtual area of 0x9000 bytes
>EAL: Virtual area found at 0x1ff4000 (size = 0x9000)
>EAL: Ask a virtual area of 0x200 bytes
>EAL: Virtual area found at 0x1ff3d00 (size = 0x200)
>EAL: Ask a virtual area of 0x1000 bytes
>EAL: Virtual area found at 0x1ff2c00 (size = 0x1000)
>EAL: Ask a virtual area of 0x4600 bytes
>EAL: Virtual area found at 0x1fee500 (size = 0x4600)
>EAL: Ask a virtual area of 0x200 bytes
>EAL: Virtual area found at 0x1fee200 (size = 0x200)
>EAL: Requesting 128 pages of size 16MB from socket 0
>EAL: TSC frequency is ~119 KHz
>EAL: WARNING: cpu flags constant_tsc=no nonstop_tsc=no -> using unreliable
>clock cycles !
>EAL: Master lcore 0 is ready (tid=f7fa4690;cpuset=[0])
>PMD: mpipe init xgbe1
>PMD: xgbe1: Initialized mpipe device(mac ee:d1:53:72:82:5a).
>EAL: lcore 1 is ready (tid=eb04f060;cpuset=[1])
>EAL: lcore 2 is ready (tid=ea84f060;cpuset=[2])
>EAL: lcore 3 is ready (tid=ea04f060;cpuset=[3])
>EAL: lcore 4 is ready (tid=e984f060;cpuset=[4])
>EAL: lcore 5 is ready (tid=d0fff060;cpuset=[5])
>EAL: lcore 6 is ready (tid=d07ff060;cpuset=[6])
>EAL: lcore 7 is ready (tid=e904f060;cpuset=[7])
>EAL: lcore 8 is ready (tid=e884f060;cpuset=[8])
>EAL: lcore 9 is ready (tid=e804f060;cpuset=[9])
>EAL: lcore 10 is 

[dpdk-dev] [PATCH] mk: Quote $(KERNELCC) to allow ccache builds

[Simon Kagstrom]

Otherwise building with KERNELCC="ccache gcc" will fail:

 == Build lib/librte_eal/linuxapp/igb_uio
 /usr/src/linux-headers-3.13.0-63-generic/arch/x86/Makefile:98: stack protector 
enabled but no compiler support
 /usr/src/linux-headers-3.13.0-63-generic/arch/x86/Makefile:113: CONFIG_X86_X32 
enabled but no binutils support
 ccache: invalid option -- 'p'
 Usage:
 ccache [options]
 ccache compiler [compiler options]
 compiler [compiler options]  (via symbolic link)

 Options:
 -c, --cleanup delete old files and recalculate size counters
   (normally not needed as this is done automatically)
 -C, --clear   clear the cache completely
 -F, --max-files=N set maximum number of files in cache to N (use 0 for
   no limit)
 -M, --max-size=SIZE   set maximum size of cache to SIZE (use 0 for no
   limit; available suffixes: G, M and K; default
   suffix: G)
 -s, --show-stats  show statistics summary
 -z, --zero-stats  zero statistics counters

 -h, --helpprint this help text
 -V, --version print version and copyright information

Signed-off-by: Simon Kagstrom 
---
 mk/rte.module.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mk/rte.module.mk b/mk/rte.module.mk
index 7bf77c1..53ed4fe 100644
--- a/mk/rte.module.mk
+++ b/mk/rte.module.mk
@@ -78,7 +78,7 @@ build: _postbuild
 $(MODULE).ko: $(SRCS_LINKS)
@if [ ! -f $(notdir Makefile) ]; then ln -nfs $(SRCDIR)/Makefile . ; fi
@$(MAKE) -C $(RTE_KERNELDIR) M=$(CURDIR) O=$(RTE_KERNELDIR) \
-   CC=$(KERNELCC) CROSS_COMPILE=$(CROSS) V=$(if $V,1,0)
+   CC="$(KERNELCC)" CROSS_COMPILE=$(CROSS) V=$(if $V,1,0)

 # install module in $(RTE_OUTPUT)/kmod
 $(RTE_OUTPUT)/kmod/$(MODULE).ko: $(MODULE).ko
-- 
1.9.1

[dpdk-dev] [PATCH] virtio: fix used ring address calculation

[Stephen Hemminger]

On Thu, 24 Sep 2015 07:30:41 +
"Xie, Huawei"  wrote:

> On 9/21/2015 11:39 AM, Xie, Huawei wrote:
> vring_size calculation should consider both used_event_idx at the tail
> of avail ring and avail_event_idx at the tail of used ring.
> Will merge those two fixes and send a new patch.
> > used event idx is put at the end of available ring. It isn't taken into 
> > account
> > when we calculate the address of used ring. Fortunately, it doesn't 
> > introduce
> > the bug with fixed queue number 256 and 4KB alignment.
> >
> > Signed-off-by: hxie5 
> > ---
> >  drivers/net/virtio/virtio_ring.h | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/net/virtio/virtio_ring.h 
> > b/drivers/net/virtio/virtio_ring.h
> > index a16c499..92e430d 100644
> > --- a/drivers/net/virtio/virtio_ring.h
> > +++ b/drivers/net/virtio/virtio_ring.h
> > @@ -145,7 +145,7 @@ vring_init(struct vring *vr, unsigned int num, uint8_t 
> > *p,
> > vr->avail = (struct vring_avail *) (p +
> > num * sizeof(struct vring_desc));
> > vr->used = (void *)
> > -   RTE_ALIGN_CEIL((uintptr_t)(>avail->ring[num]), align);
> > +   RTE_ALIGN_CEIL((uintptr_t)(>avail->ring[num + 1]), align);
> >  }
> >  
> >  /*
> 

Why aren't we just using the standard Linux includes for this?
See  and the function vring_init()

Keeping parallel copies of headers is prone to failures.

[dpdk-dev] [PATCH] virtio: fix used ring address calculation

[Xie, Huawei]

On 9/21/2015 11:39 AM, Xie, Huawei wrote:
vring_size calculation should consider both used_event_idx at the tail
of avail ring and avail_event_idx at the tail of used ring.
Will merge those two fixes and send a new patch.
> used event idx is put at the end of available ring. It isn't taken into 
> account
> when we calculate the address of used ring. Fortunately, it doesn't introduce
> the bug with fixed queue number 256 and 4KB alignment.
>
> Signed-off-by: hxie5 
> ---
>  drivers/net/virtio/virtio_ring.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/virtio/virtio_ring.h 
> b/drivers/net/virtio/virtio_ring.h
> index a16c499..92e430d 100644
> --- a/drivers/net/virtio/virtio_ring.h
> +++ b/drivers/net/virtio/virtio_ring.h
> @@ -145,7 +145,7 @@ vring_init(struct vring *vr, unsigned int num, uint8_t *p,
>   vr->avail = (struct vring_avail *) (p +
>   num * sizeof(struct vring_desc));
>   vr->used = (void *)
> - RTE_ALIGN_CEIL((uintptr_t)(>avail->ring[num]), align);
> + RTE_ALIGN_CEIL((uintptr_t)(>avail->ring[num + 1]), align);
>  }
>  
>  /*

[dpdk-dev] [PATCH 0/3 v2] Minor abi-validator improvements

[Neil Horman]

On Thu, Sep 24, 2015 at 10:50:56AM +0300, Panu Matilainen wrote:
> For giggles, tried running abi-validator between 2.0 and 2.1 on
> my Fedora 22 laptop, didn't work due to various build failures.
> With this patch series the following now succeeds:
> 
> EXTRA_CFLAGS="-Wno-error" scripts/validate-abi.sh v2.0.0 v2.1.0 
> x86_64-native-linuxapp-gcc
> 
> Panu Matilainen (3):
>   scripts: permit passing extra compiler & linker flags to ABI validator
>   scripts: move two identical config fixups into a function
>   scripts: teach ABI validator about CONFIG_RTE_KNI_KMOD
> 
>  scripts/validate-abi.sh | 28 ++--
>  1 file changed, 14 insertions(+), 14 deletions(-)
> 
> -- 
> 2.4.3
> 
> 

series
Acked-by: Neil Horman 

[dpdk-dev] DPDK.org Community Call - Sept 24 - Discuss Growth, Improvements

[St Leger, Jim]

This call is aimed to get more open dialogue in the community.  Yes, the slot 
at DPDK Userspace should delve deeper into the subject. But rather than wait it 
has been desired by several people to get some discussion going now ahead of 
the Dublin gathering.  I hope the community can start the conversation now and 
then tee up some areas to dig into deeper when people are face-to-face in 
Dublin (those who can make it anyway.) And of course if people aren't going to 
Dublin this is an easy path to be heard and contribute to the discussion.
I hope that helps.
Jim

-Original Message-
From: Dave Neary [mailto:dne...@redhat.com] 
Sent: Wednesday, September 23, 2015 2:00 PM
To: St Leger, Jim; dev at dpdk.org
Subject: Re: [dpdk-dev] DPDK.org Community Call - Sept 24 - Discuss Growth, 
Improvements

Hi Jim,

I see that there is a session loosely aligned with the agenda below on the 
agenda for DPDK Userspace in Dublin: 
https://dpdksummit.com/us/en/userspace2015 (current speaker is TBC). 
Will this call serve as a preparation call for that face to face meeting? In 
which case, is this the best opportunity that people who cannot travel to 
Dublin will have to make any concerns/proposals known so that they can be 
discussed there?

Thanks,
Dave.

On 09/22/2015 03:14 AM, St Leger, Jim wrote:
> I am going to host a community call on Thursday Sept 24 at 7:00am Pacific 
> daylight time.  The conference call dial-in info via GoToMeeting is pasted 
> below.  Here is the background and objective of the discussion.
>
> The DPDK community continues to grow.  Here are some stats on the 2.1 release 
> from August 17th:
> => 827 commits. A growth of ~50% over the 2.0 release.
> => 82 individual committers. A growth of ~33% over the 2.0 release.
> The number of companies contributing has also continued to grow.
>
> There is a strong desire to continue to grow and solidify the community. But 
> the growth brings up the question of how the community is structured to 
> scale.   Additionally, there are many private DPDK repositories across the 
> industry (e.g. ARM ports, for example.)  There are a myriad of reasons why 
> companies have elected to keep their DPDK code and ports private versus put 
> them into the DPDK.org community. We as a community need to understand and 
> explore these reasons and work towards enabling inclusion.
>
> During this gathering I'd like to bring together the DPDK community including:
> a) the DPDK code contributors,
> b) the consumers of DPDK downstream (VNF vendors, etc.),
> c) private branch DPDK creators/consumers, and
> d) anyone else interested in the growth and future of the DPDK open source 
> software project.
>
> The call will focus on two topics:
>
> 1)Structure for growth:
>
> Do we have the community practices, policies, and procedures in place to 
> allow us to continue to grow on our current trajectory?
>
>
>
> 2)Gaps Limiting Participation:
>
> What gaps do companies who would like to participate/contribute to DPDK.org 
> see?
>
> What changes would they like to see made to improve the project?
>
> I hope people can attend AND that they will join and speak up and be heard. 
> The success and growth of the community depends on YOU!
>
> Thanks,
> Jim
> =
> DPDK Community Call
>
> Thu, Sep 24, 2015 3:00 PM - 4:00 PM GMT Daylight Time Please join my 
> meeting from your computer, tablet or smartphone.
> https://global.gotomeeting.com/join/766709085
>
> You can also dial in using your phone.
>
> Access Code: 766-709-085
> Dial-in phone numbers
> United States : +1 (312) 757-3117
> Australia : +61 2 8355 1031
> Austria : +43 (0) 7 2088 1033
> Belgium : +32 (0) 28 93 7001
> Canada : +1 (647) 497-9371
> Denmark : +45 (0) 69 91 89 33
> Finland : +358 (0) 942 41 5770
> France : +33 (0) 170 950 585
> Germany : +49 (0) 692 5736 7303
> Ireland : +353 (0) 19 030 050
> Italy : +39 0 693 38 75 50
> Netherlands : +31 (0) 208 080 208
> New Zealand : +64 9 925 0481
> Norway : +47 21 54 82 21
> Spain : +34 911 82 9890
> Sweden : +46 (0) 853 527 817
> Switzerland : +41 (0) 435 0167 65
> United Kingdom : +44 (0) 20 3713 5010
>
>

--
Dave Neary - NFV/SDN Community Strategy
Open Source and Standards, Red Hat - http://community.redhat.com
Ph: +1-978-399-2182 / Cell: +1-978-799-3338

[dpdk-dev] DPDK v2.1.0 tilegx on TileraMDE-4.2.2.169597

[Arthas]

Hi, ZhiGang,
  Can you tell me where can download TileraMDE-4.3.3 package?  My tilegx tech 
supporter only send me TileraMDE-4.2.4 version!
:)

Thanks,
  Arthas 




-- Original --
From:  "Arthas";;
Date:  Wed, Sep 23, 2015 06:41 PM
To:  "zlu"; "dev"; 

Subject:  Re: [dpdk-dev] DPDK v2.1.0 tilegx on TileraMDE-4.2.2.169597



Hi, ZhiGang
  I checked source code and debug it , found dpdk function rte_eth_tx_burst 
with tilegx return 0 and no other error.  Can I contact 
 you directly?
Regards,
  Arthas



-- Original --
From:  "Arthas";;
Date:  Wed, Sep 23, 2015 06:35 PM
To:  "zlu"; "dev"; 

Subject:  Re: [dpdk-dev] DPDK v2.1.0 tilegx on TileraMDE-4.2.2.169597



Hi, ZhiGang
   My tilegx boot parameter is "tile-monitor --dev gxpci${1} --hv-bin-dir 
/tilegx/tile/hv-bin-dir424/ --hvx dataplane=1-64". 
and testpmd start parameter is 
tile-monitor  --dev gxpci0 --resume --upload testpmd  testpmd  --run  -+-  
./testpmd   -c 0x -m 2048 -n 1 -r 1 --vdev xgbe1 --  --rx=1  --tx=2 
--forward-mode=txonly -a --port-topology=chained -+-

 but xgbe1 can't xmit any packet.  
This is my run log:

EAL: Detected lcore 0 as core 0 on socket 0
EAL: Detected lcore 1 as core 1 on socket 0
EAL: Detected lcore 2 as core 2 on socket 0
EAL: Detected lcore 3 as core 3 on socket 0
EAL: Detected lcore 4 as core 4 on socket 0
EAL: Detected lcore 5 as core 5 on socket 0
EAL: Detected lcore 6 as core 6 on socket 0
EAL: Detected lcore 7 as core 7 on socket 0
EAL: Detected lcore 8 as core 8 on socket 0
EAL: Detected lcore 9 as core 9 on socket 0
EAL: Detected lcore 10 as core 10 on socket 0
EAL: Detected lcore 11 as core 11 on socket 0
EAL: Detected lcore 12 as core 12 on socket 0
EAL: Detected lcore 13 as core 13 on socket 0
EAL: Detected lcore 14 as core 14 on socket 0
EAL: Detected lcore 15 as core 15 on socket 0
EAL: Detected lcore 16 as core 16 on socket 0
EAL: Detected lcore 17 as core 17 on socket 0
EAL: Detected lcore 18 as core 18 on socket 0
EAL: Detected lcore 19 as core 19 on socket 0
EAL: Detected lcore 20 as core 20 on socket 0
EAL: Detected lcore 21 as core 21 on socket 0
EAL: Detected lcore 22 as core 22 on socket 0
EAL: Detected lcore 23 as core 23 on socket 0
EAL: Detected lcore 24 as core 24 on socket 0
EAL: Detected lcore 25 as core 25 on socket 0
EAL: Detected lcore 26 as core 26 on socket 0
EAL: Detected lcore 27 as core 27 on socket 0
EAL: Detected lcore 28 as core 28 on socket 0
EAL: Detected lcore 29 as core 29 on socket 0
EAL: Detected lcore 30 as core 30 on socket 0
EAL: Detected lcore 31 as core 31 on socket 0
EAL: Detected lcore 32 as core 32 on socket 0
EAL: Detected lcore 33 as core 33 on socket 0
EAL: Detected lcore 34 as core 34 on socket 0
EAL: Detected lcore 35 as core 35 on socket 0
EAL: Support maximum 36 logical core(s) by configuration.
EAL: Detected 36 lcore(s)
EAL: No free hugepages reported in hugepages-1024kB
EAL: Setting up physically contiguous memory...
EAL: Ask a virtual area of 0x1600 bytes
EAL: Virtual area found at 0x1ffd100 (size = 0x1600)
EAL: Ask a virtual area of 0x9000 bytes
EAL: Virtual area found at 0x1ff4000 (size = 0x9000)
EAL: Ask a virtual area of 0x200 bytes
EAL: Virtual area found at 0x1ff3d00 (size = 0x200)
EAL: Ask a virtual area of 0x1000 bytes
EAL: Virtual area found at 0x1ff2c00 (size = 0x1000)
EAL: Ask a virtual area of 0x4600 bytes
EAL: Virtual area found at 0x1fee500 (size = 0x4600)
EAL: Ask a virtual area of 0x200 bytes
EAL: Virtual area found at 0x1fee200 (size = 0x200)
EAL: Requesting 128 pages of size 16MB from socket 0
EAL: TSC frequency is ~119 KHz
EAL: WARNING: cpu flags constant_tsc=no nonstop_tsc=no -> using unreliable 
clock cycles !
EAL: Master lcore 0 is ready (tid=f7fa4690;cpuset=[0])
PMD: mpipe init xgbe1
PMD: xgbe1: Initialized mpipe device(mac ee:d1:53:72:82:5a).
EAL: lcore 1 is ready (tid=eb04f060;cpuset=[1])
EAL: lcore 2 is ready (tid=ea84f060;cpuset=[2])
EAL: lcore 3 is ready (tid=ea04f060;cpuset=[3])
EAL: lcore 4 is ready (tid=e984f060;cpuset=[4])
EAL: lcore 5 is ready (tid=d0fff060;cpuset=[5])
EAL: lcore 6 is ready (tid=d07ff060;cpuset=[6])
EAL: lcore 7 is ready (tid=e904f060;cpuset=[7])
EAL: lcore 8 is ready (tid=e884f060;cpuset=[8])
EAL: lcore 9 is ready (tid=e804f060;cpuset=[9])
EAL: lcore 10 is ready (tid=e784f060;cpuset=[10])
EAL: lcore 11 is ready (tid=b3fff060;cpuset=[11])
EAL: lcore 12 is ready (tid=b37ff060;cpuset=[12])
EAL: lcore 13 is ready (tid=b2fff060;cpuset=[13])
EAL: lcore 14 is ready (tid=b27ff060;cpuset=[14])
EAL: lcore 15 is ready (tid=b1fff060;cpuset=[15])
EAL: lcore 16 is ready (tid=b17ff060;cpuset=[16])
EAL: lcore 17 is ready (tid=b0fff060;cpuset=[17])
EAL: lcore 18 is ready (tid=2060;cpuset=[18])
EAL: lcore 19 is ready (tid=b07ff060;cpuset=[19])
EAL: lcore 20 is ready (tid=abfff060;cpuset=[20])
EAL: lcore 21 is ready 

[dpdk-dev] [PATCH v5 1/4] vhost: eventfd_link: refactoring EVENTFD_COPY handler

[Pavel Boldin]

Ping.

On Fri, Aug 28, 2015 at 9:51 PM, Pavel Boldin  wrote:

> * Move ioctl `EVENTFD_COPY' code to a separate function
> * Remove extra #includes
> * Introduce function fget_from_files
> * Fix ioctl return values
>
> Signed-off-by: Pavel Boldin 
> ---
>  lib/librte_vhost/eventfd_link/eventfd_link.c | 188
> +++
>  1 file changed, 103 insertions(+), 85 deletions(-)
>
> diff --git a/lib/librte_vhost/eventfd_link/eventfd_link.c
> b/lib/librte_vhost/eventfd_link/eventfd_link.c
> index 62c45c8..5ba1068 100644
> --- a/lib/librte_vhost/eventfd_link/eventfd_link.c
> +++ b/lib/librte_vhost/eventfd_link/eventfd_link.c
> @@ -22,18 +22,11 @@
>   *   Intel Corporation
>   */
>
> -#include 
>  #include 
>  #include 
> -#include 
> -#include 
>  #include 
> -#include 
> -#include 
> -#include 
> -#include 
> -#include 
>  #include 
> +#include 
>
>  #include "eventfd_link.h"
>
> @@ -65,9 +58,26 @@ put_files_struct(struct files_struct *files)
> BUG();
>  }
>
> +static struct file *
> +fget_from_files(struct files_struct *files, unsigned fd)
> +{
> +   struct file *file;
> +
> +   rcu_read_lock();
> +   file = fcheck_files(files, fd);
> +   if (file)
> +   {
> +   if (file->f_mode & FMODE_PATH
> +   || !atomic_long_inc_not_zero(>f_count))
> +   file = NULL;
> +   }
> +   rcu_read_unlock();
> +
> +   return file;
> +}
>
>  static long
> -eventfd_link_ioctl(struct file *f, unsigned int ioctl, unsigned long arg)
> +eventfd_link_ioctl_copy(unsigned long arg)
>  {
> void __user *argp = (void __user *) arg;
> struct task_struct *task_target = NULL;
> @@ -75,91 +85,99 @@ eventfd_link_ioctl(struct file *f, unsigned int ioctl,
> unsigned long arg)
> struct files_struct *files;
> struct fdtable *fdt;
> struct eventfd_copy eventfd_copy;
> +   long ret = -EFAULT;
>
> -   switch (ioctl) {
> -   case EVENTFD_COPY:
> -   if (copy_from_user(_copy, argp,
> -   sizeof(struct eventfd_copy)))
> -   return -EFAULT;
> -
> -   /*
> -* Find the task struct for the target pid
> -*/
> -   task_target =
> -   pid_task(find_vpid(eventfd_copy.target_pid),
> PIDTYPE_PID);
> -   if (task_target == NULL) {
> -   pr_debug("Failed to get mem ctx for target pid\n");
> -   return -EFAULT;
> -   }
> -
> -   files = get_files_struct(current);
> -   if (files == NULL) {
> -   pr_debug("Failed to get files struct\n");
> -   return -EFAULT;
> -   }
> -
> -   rcu_read_lock();
> -   file = fcheck_files(files, eventfd_copy.source_fd);
> -   if (file) {
> -   if (file->f_mode & FMODE_PATH ||
> -   !atomic_long_inc_not_zero(>f_count))
> -   file = NULL;
> -   }
> -   rcu_read_unlock();
> -   put_files_struct(files);
> +   if (copy_from_user(_copy, argp, sizeof(struct
> eventfd_copy)))
> +   goto out;
> +
> +   /*
> +* Find the task struct for the target pid
> +*/
> +   ret = -ESRCH;
> +
> +   task_target =
> +   get_pid_task(find_vpid(eventfd_copy.target_pid),
> PIDTYPE_PID);
> +   if (task_target == NULL) {
> +   pr_info("Unable to find pid %d\n",
> eventfd_copy.target_pid);
> +   goto out;
> +   }
> +
> +   ret = -ESTALE;
> +   files = get_files_struct(current);
> +   if (files == NULL) {
> +   pr_info("Failed to get current files struct\n");
> +   goto out_task;
> +   }
>
> -   if (file == NULL) {
> -   pr_debug("Failed to get file from source pid\n");
> -   return 0;
> -   }
> -
> -   /*
> -* Release the existing eventfd in the source process
> -*/
> -   spin_lock(>file_lock);
> -   fput(file);
> -   filp_close(file, files);
> -   fdt = files_fdtable(files);
> -   fdt->fd[eventfd_copy.source_fd] = NULL;
> -   spin_unlock(>file_lock);
> -
> -   /*
> -* Find the file struct associated with the target fd.
> -*/
> -
> -   files = get_files_struct(task_target);
> -   if (files == NULL) {
> -   pr_debug("Failed to get files struct\n");
> -   return -EFAULT;
> -   }
> -
> -   rcu_read_lock();
> -   file = fcheck_files(files, eventfd_copy.target_fd);
> -   if (file) {
> -   if (file->f_mode & FMODE_PATH ||
> -