Re: hw/mcu/sifive/fe310/src/hal_timer.c question
Hi Jack, I know what you mean. I also tried swapping code1/code2 which probably broke some other interrupt handling. When I tested, first interrupt for PWM handled timer and removed it from queue, in user provided timer handler timer was added again with time value from the future. Second (unwanted interrupt) checked conditions again but did not removed future timer handlers. I tested with different timer settings though (f=32150, timer value much higher then 0x6A, that seems to be value that you have). I will check some more... If you come up with something don't hesitate to let me know. br Jerzy wt., 16 mar 2021 o 13:29 范姜徐霖 napisał(a): > > Hi, Jeray, > > thank you for your help. > The "repeatly pwm interrupt" is gone. > > But I encounter another problem. > > when pwm interrupt happen, this func ( external_interrupt_handler ) will be > called. > I check the PLIC document, it said that gateway will be re-enabled after > code1 execute. > At this moment, pwm IP is still set, because pwm IP is cleared at code2. > so code3 will read pwm interrupt ID again . > > for 1 pwm timeout event, it will do 2 times pwm interrupt-handler. > this cause problems that eventually all timers are removed. > > I try swap code1 <--> code2, but has some other side-effect and doesnt work. > > > Jack > in plic.c > > void > external_interrupt_handler(uintptr_t mcause) > { > int num = PLIC_REG(PLIC_CLAIM_OFFSET); > /* > * Interrupts have some overhead, handle all pending interrupts. > */ > while (num) { > /* Confirm interrupt*/ > PLIC_REG(PLIC_CLAIM_OFFSET) = num; --->code1 > /* Call interrupt handler */ > plic_interrupts[num](num); >code2 > /* Check if other interupt is already pending */ > num = PLIC_REG(PLIC_CLAIM_OFFSET); > code3 > } > } > > > Jerzy Kasenberg 於 2021年3月16日 週二 上午12:48寫道: > > > Hi Jack > > > > Place that you found had wrong condition that resulted in stack in low > > frequencies. > > > > There is pending pull request that should fix your problem > > https://github.com/apache/mynewt-core/pull/2530 > > > > Could you verify that this fixes you issue? > > > > br > > Jerzy > > > > pon., 15 mar 2021 o 11:44 范姜徐霖 napisał(a): > > > > > > Hi, Jerzy, > > > > > > my program first call hal_timer_config( freq_hz=32768 ) > > > pwm2 reg setting after call hal_timer_config() : PWM2_CMP0=0x, > > > PWM2_CMP1=0x, PWM_CFG=0x1209 > > > > > > and some time after, > > > the problem happen at calling hal_timer_start_at(ticks) function which > > > parameter ticks is < 0x but > PWM_S > > > in my case ticks = PWM_S+0x6a > > > > > > and inside hal_timer_start_at function it will call > > fe310_tmr_check_first(), > > > --- > > > > > > static void > > > fe310_tmr_check_first(struct fe310_hal_tmr *tmr) > > > { > > > struct hal_timer *ht; > > > > > > ht = TAILQ_FIRST(>sht_timers); > > > if (ht) { > > > uint32_t cnt = hal_timer_cnt(tmr); > > > int32_t ticks = (int32_t)(ht->expiry - cnt); ---> 0x6a > > > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) { ---> 0x6a < > > 0x > > > _REG32(tmr->pwm_regs, PWM_CMP1) = ticks;---> pwm_cmp1 > > > is assigned 0x6a, and now pwm_s > 0x6a > > > plic_enable_interrupt(tmr->pwmxcmp0_int + 1); --->enable > > > pwm_cmp1 interrupt > > > return; > > > } > > > } > > > _REG32(tmr->pwm_regs, PWM_CMP1) = _REG32(tmr->pwm_regs, PWM_CMP0); > > > /* Disable PWMxCMP1 interrupt, leaving only CMP0 which is used > > > all the time */ > > > plic_disable_interrupt(tmr->pwmxcmp0_int + 1); > > > } > > > > > > then interrupt forever.. > > > > > > > > > > > > Jack > > > > > > Jerzy Kasenberg 於 2021年3月15日 週一 下午5:23寫道: > > > > > > > Hi Jack, > > > > > > > > I setup blinky-like project with default settings that hifive1 bsp set > > > > with one > > > > modification: > > > > > > > > SYS_CLOCK: HFXOSC_16_MHZ > > > > > > > > I also added two cpu timers like this: > > > > > > > > os_cputime_timer_init(_timer1, cpu_timer1_cb, NULL); > > > > os_cputime_timer_relative(_timer1, CPU_TIMER1_TIMEOUT); > > > > > > > > os_cputime_timer_init(_timer2, cpu_timer2_cb, NULL); > > > > os_cputime_timer_relative(_timer2, CPU_TIMER2_TIMEOUT); > > > > > > > > Code is using cpu timer that is using PWM2 that should be similar to > > > > what you have. > > > > My timer callbacks just toggle some GPIO to verify that frequencies are > > > > correct. > > > > So far everything works as expected. > > > > > > > > 1. Maybe you could share timer/clock related content of your syscfg. > > > > 2. Maybe timer usage is different then mine (hal_timer api instead of > > > > cpu_timer that I used for quick check) > > > > > > > > br > > > > Jerzy > > > > > > > > pon., 15 mar 2021 o 09:05 范姜徐霖 napisał(a): > > > > > > > > > > 3. frequency on PWM timer: 32768 > > > > > > > > > > Jack > > > > > > > > > > 范姜徐霖 於 2021年3月15日
Re: hw/mcu/sifive/fe310/src/hal_timer.c question
Hi, Jeray, thank you for your help. The "repeatly pwm interrupt" is gone. But I encounter another problem. when pwm interrupt happen, this func ( external_interrupt_handler ) will be called. I check the PLIC document, it said that gateway will be re-enabled after code1 execute. At this moment, pwm IP is still set, because pwm IP is cleared at code2. so code3 will read pwm interrupt ID again . for 1 pwm timeout event, it will do 2 times pwm interrupt-handler. this cause problems that eventually all timers are removed. I try swap code1 <--> code2, but has some other side-effect and doesnt work. Jack in plic.c void external_interrupt_handler(uintptr_t mcause) { int num = PLIC_REG(PLIC_CLAIM_OFFSET); /* * Interrupts have some overhead, handle all pending interrupts. */ while (num) { /* Confirm interrupt*/ PLIC_REG(PLIC_CLAIM_OFFSET) = num; --->code1 /* Call interrupt handler */ plic_interrupts[num](num); >code2 /* Check if other interupt is already pending */ num = PLIC_REG(PLIC_CLAIM_OFFSET); > code3 } } Jerzy Kasenberg 於 2021年3月16日 週二 上午12:48寫道: > Hi Jack > > Place that you found had wrong condition that resulted in stack in low > frequencies. > > There is pending pull request that should fix your problem > https://github.com/apache/mynewt-core/pull/2530 > > Could you verify that this fixes you issue? > > br > Jerzy > > pon., 15 mar 2021 o 11:44 范姜徐霖 napisał(a): > > > > Hi, Jerzy, > > > > my program first call hal_timer_config( freq_hz=32768 ) > > pwm2 reg setting after call hal_timer_config() : PWM2_CMP0=0x, > > PWM2_CMP1=0x, PWM_CFG=0x1209 > > > > and some time after, > > the problem happen at calling hal_timer_start_at(ticks) function which > > parameter ticks is < 0x but > PWM_S > > in my case ticks = PWM_S+0x6a > > > > and inside hal_timer_start_at function it will call > fe310_tmr_check_first(), > > --- > > > > static void > > fe310_tmr_check_first(struct fe310_hal_tmr *tmr) > > { > > struct hal_timer *ht; > > > > ht = TAILQ_FIRST(>sht_timers); > > if (ht) { > > uint32_t cnt = hal_timer_cnt(tmr); > > int32_t ticks = (int32_t)(ht->expiry - cnt); ---> 0x6a > > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) { ---> 0x6a < > 0x > > _REG32(tmr->pwm_regs, PWM_CMP1) = ticks;---> pwm_cmp1 > > is assigned 0x6a, and now pwm_s > 0x6a > > plic_enable_interrupt(tmr->pwmxcmp0_int + 1); --->enable > > pwm_cmp1 interrupt > > return; > > } > > } > > _REG32(tmr->pwm_regs, PWM_CMP1) = _REG32(tmr->pwm_regs, PWM_CMP0); > > /* Disable PWMxCMP1 interrupt, leaving only CMP0 which is used > > all the time */ > > plic_disable_interrupt(tmr->pwmxcmp0_int + 1); > > } > > > > then interrupt forever.. > > > > > > > > Jack > > > > Jerzy Kasenberg 於 2021年3月15日 週一 下午5:23寫道: > > > > > Hi Jack, > > > > > > I setup blinky-like project with default settings that hifive1 bsp set > > > with one > > > modification: > > > > > > SYS_CLOCK: HFXOSC_16_MHZ > > > > > > I also added two cpu timers like this: > > > > > > os_cputime_timer_init(_timer1, cpu_timer1_cb, NULL); > > > os_cputime_timer_relative(_timer1, CPU_TIMER1_TIMEOUT); > > > > > > os_cputime_timer_init(_timer2, cpu_timer2_cb, NULL); > > > os_cputime_timer_relative(_timer2, CPU_TIMER2_TIMEOUT); > > > > > > Code is using cpu timer that is using PWM2 that should be similar to > > > what you have. > > > My timer callbacks just toggle some GPIO to verify that frequencies are > > > correct. > > > So far everything works as expected. > > > > > > 1. Maybe you could share timer/clock related content of your syscfg. > > > 2. Maybe timer usage is different then mine (hal_timer api instead of > > > cpu_timer that I used for quick check) > > > > > > br > > > Jerzy > > > > > > pon., 15 mar 2021 o 09:05 范姜徐霖 napisał(a): > > > > > > > > 3. frequency on PWM timer: 32768 > > > > > > > > Jack > > > > > > > > 范姜徐霖 於 2021年3月15日 週一 下午3:33寫道: > > > > > > > > > Hi, > > > > > > > > > > 1. system clock frequency:16MHz > > > > > 2. which PWM: PWM2 > > > > > 3. frequency on PWM timer: 32758 > > > > > > > > > > Jack > > > > > > > > > > Jerzy Kasenberg 於 2021年3月15日 週一 > > > 下午3:33寫道: > > > > > > > > > >> Hi, > > > > >> > > > > >> I don't remember details to answer number 3 out of my head. But we > > > > >> will find out soon. > > > > >> In the meanwhile can you give me: > > > > >> 1. system clock frequency that you have selected > > > > >> 2. which PWM is causing problem. > > > > >> 3. what is frequency on PWM timer. > > > > >> Those will help me setup environment closer to what you have. > > > > >> > > > > >> br > > > > >> Jerzy > > > > >> > > > > >> niedz., 14 mar 2021 o 02:28 范姜徐霖 > napisał(a): > > > > >> > > > > > >> > Hi, > > > > >> > > > > > >> > 1. Do you know if tick is negative at line that you marked > > > > >> > if (ticks <
Re: hw/mcu/sifive/fe310/src/hal_timer.c question
Hi Jack, I pushed more changes to the PR, since my previous mail. It would be great if you confirmed that it helps with your problem. There is no one else verifying riscv code that I know of, PR is already approved but confirmation from someone that actually uses code would be valuable. Thanks for finding out problem. Best regards Jerzy pon., 15 mar 2021 o 11:44 范姜徐霖 napisał(a): > > Hi, Jerzy, > > my program first call hal_timer_config( freq_hz=32768 ) > pwm2 reg setting after call hal_timer_config() : PWM2_CMP0=0x, > PWM2_CMP1=0x, PWM_CFG=0x1209 > > and some time after, > the problem happen at calling hal_timer_start_at(ticks) function which > parameter ticks is < 0x but > PWM_S > in my case ticks = PWM_S+0x6a > > and inside hal_timer_start_at function it will call fe310_tmr_check_first(), > --- > > static void > fe310_tmr_check_first(struct fe310_hal_tmr *tmr) > { > struct hal_timer *ht; > > ht = TAILQ_FIRST(>sht_timers); > if (ht) { > uint32_t cnt = hal_timer_cnt(tmr); > int32_t ticks = (int32_t)(ht->expiry - cnt); ---> 0x6a > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) { ---> 0x6a < 0x > _REG32(tmr->pwm_regs, PWM_CMP1) = ticks;---> pwm_cmp1 > is assigned 0x6a, and now pwm_s > 0x6a > plic_enable_interrupt(tmr->pwmxcmp0_int + 1); --->enable > pwm_cmp1 interrupt > return; > } > } > _REG32(tmr->pwm_regs, PWM_CMP1) = _REG32(tmr->pwm_regs, PWM_CMP0); > /* Disable PWMxCMP1 interrupt, leaving only CMP0 which is used > all the time */ > plic_disable_interrupt(tmr->pwmxcmp0_int + 1); > } > > then interrupt forever.. > > > > Jack > > Jerzy Kasenberg 於 2021年3月15日 週一 下午5:23寫道: > > > Hi Jack, > > > > I setup blinky-like project with default settings that hifive1 bsp set > > with one > > modification: > > > > SYS_CLOCK: HFXOSC_16_MHZ > > > > I also added two cpu timers like this: > > > > os_cputime_timer_init(_timer1, cpu_timer1_cb, NULL); > > os_cputime_timer_relative(_timer1, CPU_TIMER1_TIMEOUT); > > > > os_cputime_timer_init(_timer2, cpu_timer2_cb, NULL); > > os_cputime_timer_relative(_timer2, CPU_TIMER2_TIMEOUT); > > > > Code is using cpu timer that is using PWM2 that should be similar to > > what you have. > > My timer callbacks just toggle some GPIO to verify that frequencies are > > correct. > > So far everything works as expected. > > > > 1. Maybe you could share timer/clock related content of your syscfg. > > 2. Maybe timer usage is different then mine (hal_timer api instead of > > cpu_timer that I used for quick check) > > > > br > > Jerzy > > > > pon., 15 mar 2021 o 09:05 范姜徐霖 napisał(a): > > > > > > 3. frequency on PWM timer: 32768 > > > > > > Jack > > > > > > 范姜徐霖 於 2021年3月15日 週一 下午3:33寫道: > > > > > > > Hi, > > > > > > > > 1. system clock frequency:16MHz > > > > 2. which PWM: PWM2 > > > > 3. frequency on PWM timer: 32758 > > > > > > > > Jack > > > > > > > > Jerzy Kasenberg 於 2021年3月15日 週一 > > 下午3:33寫道: > > > > > > > >> Hi, > > > >> > > > >> I don't remember details to answer number 3 out of my head. But we > > > >> will find out soon. > > > >> In the meanwhile can you give me: > > > >> 1. system clock frequency that you have selected > > > >> 2. which PWM is causing problem. > > > >> 3. what is frequency on PWM timer. > > > >> Those will help me setup environment closer to what you have. > > > >> > > > >> br > > > >> Jerzy > > > >> > > > >> niedz., 14 mar 2021 o 02:28 范姜徐霖 napisał(a): > > > >> > > > > >> > Hi, > > > >> > > > > >> > 1. Do you know if tick is negative at line that you marked > > > >> > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) {> > >> > > > > >> > In my program : PWM_CMP0=0x, PWM_CMP1=0x, > > PEM_CFG=0xc0001209, > > > >> ticks > > > >> > =0x6a > > > >> > my observation: 0x6a written in PWM_CMP1, this trigger pwm interrupt > > > >> > (fe310_pwm_cmp1_handler) > > > >> > and the handler call fe310_tmr_check_first again, then trigger pwm > > > >> > interrupt, and so on.. > > > >> > > > > >> > 2. I am sorry I can not share project with you, it is company > > project. > > > >> > I can provide program running info > > > >> > > > > >> > 3. I have a question about hal_timer_cnt function . > > > >> > how does the code check overflow condition? > > > >> > > > > >> > Thanks for your help. > > > >> > > > > >> > -- > > > >> > static uint32_t > > > >> > hal_timer_cnt(struct fe310_hal_tmr *tmr) > > > >> > { > > > >> > uint32_t cnt; > > > >> > int sr; > > > >> > uint32_t regs = (uint32_t) tmr->pwm_regs; > > > >> > > > > >> > __HAL_DISABLE_INTERRUPTS(sr); > > > >> > cnt = _REG32(regs, PWM_S) + tmr->value; > > > >> > /* Check if just overflowed */ > > > >> > if (_REG32(regs, PWM_CFG) & PWM_CMP0) { > > >> > cnt += _REG32(regs, PWM_CMP0) + 1; > > > >> > } > > > >> >
Re: hw/mcu/sifive/fe310/src/hal_timer.c question
Hi Jack Place that you found had wrong condition that resulted in stack in low frequencies. There is pending pull request that should fix your problem https://github.com/apache/mynewt-core/pull/2530 Could you verify that this fixes you issue? br Jerzy pon., 15 mar 2021 o 11:44 范姜徐霖 napisał(a): > > Hi, Jerzy, > > my program first call hal_timer_config( freq_hz=32768 ) > pwm2 reg setting after call hal_timer_config() : PWM2_CMP0=0x, > PWM2_CMP1=0x, PWM_CFG=0x1209 > > and some time after, > the problem happen at calling hal_timer_start_at(ticks) function which > parameter ticks is < 0x but > PWM_S > in my case ticks = PWM_S+0x6a > > and inside hal_timer_start_at function it will call fe310_tmr_check_first(), > --- > > static void > fe310_tmr_check_first(struct fe310_hal_tmr *tmr) > { > struct hal_timer *ht; > > ht = TAILQ_FIRST(>sht_timers); > if (ht) { > uint32_t cnt = hal_timer_cnt(tmr); > int32_t ticks = (int32_t)(ht->expiry - cnt); ---> 0x6a > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) { ---> 0x6a < 0x > _REG32(tmr->pwm_regs, PWM_CMP1) = ticks;---> pwm_cmp1 > is assigned 0x6a, and now pwm_s > 0x6a > plic_enable_interrupt(tmr->pwmxcmp0_int + 1); --->enable > pwm_cmp1 interrupt > return; > } > } > _REG32(tmr->pwm_regs, PWM_CMP1) = _REG32(tmr->pwm_regs, PWM_CMP0); > /* Disable PWMxCMP1 interrupt, leaving only CMP0 which is used > all the time */ > plic_disable_interrupt(tmr->pwmxcmp0_int + 1); > } > > then interrupt forever.. > > > > Jack > > Jerzy Kasenberg 於 2021年3月15日 週一 下午5:23寫道: > > > Hi Jack, > > > > I setup blinky-like project with default settings that hifive1 bsp set > > with one > > modification: > > > > SYS_CLOCK: HFXOSC_16_MHZ > > > > I also added two cpu timers like this: > > > > os_cputime_timer_init(_timer1, cpu_timer1_cb, NULL); > > os_cputime_timer_relative(_timer1, CPU_TIMER1_TIMEOUT); > > > > os_cputime_timer_init(_timer2, cpu_timer2_cb, NULL); > > os_cputime_timer_relative(_timer2, CPU_TIMER2_TIMEOUT); > > > > Code is using cpu timer that is using PWM2 that should be similar to > > what you have. > > My timer callbacks just toggle some GPIO to verify that frequencies are > > correct. > > So far everything works as expected. > > > > 1. Maybe you could share timer/clock related content of your syscfg. > > 2. Maybe timer usage is different then mine (hal_timer api instead of > > cpu_timer that I used for quick check) > > > > br > > Jerzy > > > > pon., 15 mar 2021 o 09:05 范姜徐霖 napisał(a): > > > > > > 3. frequency on PWM timer: 32768 > > > > > > Jack > > > > > > 范姜徐霖 於 2021年3月15日 週一 下午3:33寫道: > > > > > > > Hi, > > > > > > > > 1. system clock frequency:16MHz > > > > 2. which PWM: PWM2 > > > > 3. frequency on PWM timer: 32758 > > > > > > > > Jack > > > > > > > > Jerzy Kasenberg 於 2021年3月15日 週一 > > 下午3:33寫道: > > > > > > > >> Hi, > > > >> > > > >> I don't remember details to answer number 3 out of my head. But we > > > >> will find out soon. > > > >> In the meanwhile can you give me: > > > >> 1. system clock frequency that you have selected > > > >> 2. which PWM is causing problem. > > > >> 3. what is frequency on PWM timer. > > > >> Those will help me setup environment closer to what you have. > > > >> > > > >> br > > > >> Jerzy > > > >> > > > >> niedz., 14 mar 2021 o 02:28 范姜徐霖 napisał(a): > > > >> > > > > >> > Hi, > > > >> > > > > >> > 1. Do you know if tick is negative at line that you marked > > > >> > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) {> > >> > > > > >> > In my program : PWM_CMP0=0x, PWM_CMP1=0x, > > PEM_CFG=0xc0001209, > > > >> ticks > > > >> > =0x6a > > > >> > my observation: 0x6a written in PWM_CMP1, this trigger pwm interrupt > > > >> > (fe310_pwm_cmp1_handler) > > > >> > and the handler call fe310_tmr_check_first again, then trigger pwm > > > >> > interrupt, and so on.. > > > >> > > > > >> > 2. I am sorry I can not share project with you, it is company > > project. > > > >> > I can provide program running info > > > >> > > > > >> > 3. I have a question about hal_timer_cnt function . > > > >> > how does the code check overflow condition? > > > >> > > > > >> > Thanks for your help. > > > >> > > > > >> > -- > > > >> > static uint32_t > > > >> > hal_timer_cnt(struct fe310_hal_tmr *tmr) > > > >> > { > > > >> > uint32_t cnt; > > > >> > int sr; > > > >> > uint32_t regs = (uint32_t) tmr->pwm_regs; > > > >> > > > > >> > __HAL_DISABLE_INTERRUPTS(sr); > > > >> > cnt = _REG32(regs, PWM_S) + tmr->value; > > > >> > /* Check if just overflowed */ > > > >> > if (_REG32(regs, PWM_CFG) & PWM_CMP0) { > > >> > cnt += _REG32(regs, PWM_CMP0) + 1; > > > >> > } > > > >> > __HAL_ENABLE_INTERRUPTS(sr); > > > >> > > > > >> > return cnt; > > > >> > } > > > >> >
Re: hw/mcu/sifive/fe310/src/hal_timer.c question
Hi, Jerzy, my program first call hal_timer_config( freq_hz=32768 ) pwm2 reg setting after call hal_timer_config() : PWM2_CMP0=0x, PWM2_CMP1=0x, PWM_CFG=0x1209 and some time after, the problem happen at calling hal_timer_start_at(ticks) function which parameter ticks is < 0x but > PWM_S in my case ticks = PWM_S+0x6a and inside hal_timer_start_at function it will call fe310_tmr_check_first(), --- static void fe310_tmr_check_first(struct fe310_hal_tmr *tmr) { struct hal_timer *ht; ht = TAILQ_FIRST(>sht_timers); if (ht) { uint32_t cnt = hal_timer_cnt(tmr); int32_t ticks = (int32_t)(ht->expiry - cnt); ---> 0x6a if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) { ---> 0x6a < 0x _REG32(tmr->pwm_regs, PWM_CMP1) = ticks;---> pwm_cmp1 is assigned 0x6a, and now pwm_s > 0x6a plic_enable_interrupt(tmr->pwmxcmp0_int + 1); --->enable pwm_cmp1 interrupt return; } } _REG32(tmr->pwm_regs, PWM_CMP1) = _REG32(tmr->pwm_regs, PWM_CMP0); /* Disable PWMxCMP1 interrupt, leaving only CMP0 which is used all the time */ plic_disable_interrupt(tmr->pwmxcmp0_int + 1); } then interrupt forever.. Jack Jerzy Kasenberg 於 2021年3月15日 週一 下午5:23寫道: > Hi Jack, > > I setup blinky-like project with default settings that hifive1 bsp set > with one > modification: > > SYS_CLOCK: HFXOSC_16_MHZ > > I also added two cpu timers like this: > > os_cputime_timer_init(_timer1, cpu_timer1_cb, NULL); > os_cputime_timer_relative(_timer1, CPU_TIMER1_TIMEOUT); > > os_cputime_timer_init(_timer2, cpu_timer2_cb, NULL); > os_cputime_timer_relative(_timer2, CPU_TIMER2_TIMEOUT); > > Code is using cpu timer that is using PWM2 that should be similar to > what you have. > My timer callbacks just toggle some GPIO to verify that frequencies are > correct. > So far everything works as expected. > > 1. Maybe you could share timer/clock related content of your syscfg. > 2. Maybe timer usage is different then mine (hal_timer api instead of > cpu_timer that I used for quick check) > > br > Jerzy > > pon., 15 mar 2021 o 09:05 范姜徐霖 napisał(a): > > > > 3. frequency on PWM timer: 32768 > > > > Jack > > > > 范姜徐霖 於 2021年3月15日 週一 下午3:33寫道: > > > > > Hi, > > > > > > 1. system clock frequency:16MHz > > > 2. which PWM: PWM2 > > > 3. frequency on PWM timer: 32758 > > > > > > Jack > > > > > > Jerzy Kasenberg 於 2021年3月15日 週一 > 下午3:33寫道: > > > > > >> Hi, > > >> > > >> I don't remember details to answer number 3 out of my head. But we > > >> will find out soon. > > >> In the meanwhile can you give me: > > >> 1. system clock frequency that you have selected > > >> 2. which PWM is causing problem. > > >> 3. what is frequency on PWM timer. > > >> Those will help me setup environment closer to what you have. > > >> > > >> br > > >> Jerzy > > >> > > >> niedz., 14 mar 2021 o 02:28 范姜徐霖 napisał(a): > > >> > > > >> > Hi, > > >> > > > >> > 1. Do you know if tick is negative at line that you marked > > >> > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) {> >> > > > >> > In my program : PWM_CMP0=0x, PWM_CMP1=0x, > PEM_CFG=0xc0001209, > > >> ticks > > >> > =0x6a > > >> > my observation: 0x6a written in PWM_CMP1, this trigger pwm interrupt > > >> > (fe310_pwm_cmp1_handler) > > >> > and the handler call fe310_tmr_check_first again, then trigger pwm > > >> > interrupt, and so on.. > > >> > > > >> > 2. I am sorry I can not share project with you, it is company > project. > > >> > I can provide program running info > > >> > > > >> > 3. I have a question about hal_timer_cnt function . > > >> > how does the code check overflow condition? > > >> > > > >> > Thanks for your help. > > >> > > > >> > -- > > >> > static uint32_t > > >> > hal_timer_cnt(struct fe310_hal_tmr *tmr) > > >> > { > > >> > uint32_t cnt; > > >> > int sr; > > >> > uint32_t regs = (uint32_t) tmr->pwm_regs; > > >> > > > >> > __HAL_DISABLE_INTERRUPTS(sr); > > >> > cnt = _REG32(regs, PWM_S) + tmr->value; > > >> > /* Check if just overflowed */ > > >> > if (_REG32(regs, PWM_CFG) & PWM_CMP0) { > >> > cnt += _REG32(regs, PWM_CMP0) + 1; > > >> > } > > >> > __HAL_ENABLE_INTERRUPTS(sr); > > >> > > > >> > return cnt; > > >> > } > > >> > - > > >> > > > >> > Jerzy Kasenberg 於 2021年3月13日 週六 > > >> 下午11:35寫道: > > >> > > > >> > > Hi, > > >> > > > > >> > > 1. Do you know if tick is negative at line that you marked > > >> > > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) { > >> > > > > >> > > 2. Can you share your project with me somehow so I could take a > look > > >> > > (presuming it is running on hifive1 board)? > > >> > > > > >> > > I can take a look at this next Monday. > > >> > > > > >> > > best regards > > >> > > Jerzy > > >> > > > > >> > > sob., 13 mar 2021 o
Re: hw/mcu/sifive/fe310/src/hal_timer.c question
Hi Jack, I tested some more and did not found any problems. What may be confusing is that when CPU is stopped in the debugger timers continue to run so interrupts will be generated all the time, then it may appear that code stuck in timer interrupt. Same goes for watchdog. 1. Can you confirm that code stacks in timer interrupt handler without debugger (maybe some GPIO toggling)? br Jerzy pon., 15 mar 2021 o 10:23 Jerzy Kasenberg napisał(a): > > Hi Jack, > > I setup blinky-like project with default settings that hifive1 bsp set with > one > modification: > > SYS_CLOCK: HFXOSC_16_MHZ > > I also added two cpu timers like this: > > os_cputime_timer_init(_timer1, cpu_timer1_cb, NULL); > os_cputime_timer_relative(_timer1, CPU_TIMER1_TIMEOUT); > > os_cputime_timer_init(_timer2, cpu_timer2_cb, NULL); > os_cputime_timer_relative(_timer2, CPU_TIMER2_TIMEOUT); > > Code is using cpu timer that is using PWM2 that should be similar to > what you have. > My timer callbacks just toggle some GPIO to verify that frequencies are > correct. > So far everything works as expected. > > 1. Maybe you could share timer/clock related content of your syscfg. > 2. Maybe timer usage is different then mine (hal_timer api instead of > cpu_timer that I used for quick check) > > br > Jerzy > > pon., 15 mar 2021 o 09:05 范姜徐霖 napisał(a): > > > > 3. frequency on PWM timer: 32768 > > > > Jack > > > > 范姜徐霖 於 2021年3月15日 週一 下午3:33寫道: > > > > > Hi, > > > > > > 1. system clock frequency:16MHz > > > 2. which PWM: PWM2 > > > 3. frequency on PWM timer: 32758 > > > > > > Jack > > > > > > Jerzy Kasenberg 於 2021年3月15日 週一 下午3:33寫道: > > > > > >> Hi, > > >> > > >> I don't remember details to answer number 3 out of my head. But we > > >> will find out soon. > > >> In the meanwhile can you give me: > > >> 1. system clock frequency that you have selected > > >> 2. which PWM is causing problem. > > >> 3. what is frequency on PWM timer. > > >> Those will help me setup environment closer to what you have. > > >> > > >> br > > >> Jerzy > > >> > > >> niedz., 14 mar 2021 o 02:28 范姜徐霖 napisał(a): > > >> > > > >> > Hi, > > >> > > > >> > 1. Do you know if tick is negative at line that you marked > > >> > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) {> >> > > > >> > In my program : PWM_CMP0=0x, PWM_CMP1=0x, PEM_CFG=0xc0001209, > > >> ticks > > >> > =0x6a > > >> > my observation: 0x6a written in PWM_CMP1, this trigger pwm interrupt > > >> > (fe310_pwm_cmp1_handler) > > >> > and the handler call fe310_tmr_check_first again, then trigger pwm > > >> > interrupt, and so on.. > > >> > > > >> > 2. I am sorry I can not share project with you, it is company project. > > >> > I can provide program running info > > >> > > > >> > 3. I have a question about hal_timer_cnt function . > > >> > how does the code check overflow condition? > > >> > > > >> > Thanks for your help. > > >> > > > >> > -- > > >> > static uint32_t > > >> > hal_timer_cnt(struct fe310_hal_tmr *tmr) > > >> > { > > >> > uint32_t cnt; > > >> > int sr; > > >> > uint32_t regs = (uint32_t) tmr->pwm_regs; > > >> > > > >> > __HAL_DISABLE_INTERRUPTS(sr); > > >> > cnt = _REG32(regs, PWM_S) + tmr->value; > > >> > /* Check if just overflowed */ > > >> > if (_REG32(regs, PWM_CFG) & PWM_CMP0) { > >> > cnt += _REG32(regs, PWM_CMP0) + 1; > > >> > } > > >> > __HAL_ENABLE_INTERRUPTS(sr); > > >> > > > >> > return cnt; > > >> > } > > >> > - > > >> > > > >> > Jerzy Kasenberg 於 2021年3月13日 週六 > > >> 下午11:35寫道: > > >> > > > >> > > Hi, > > >> > > > > >> > > 1. Do you know if tick is negative at line that you marked > > >> > > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) { > >> > > > > >> > > 2. Can you share your project with me somehow so I could take a look > > >> > > (presuming it is running on hifive1 board)? > > >> > > > > >> > > I can take a look at this next Monday. > > >> > > > > >> > > best regards > > >> > > Jerzy > > >> > > > > >> > > sob., 13 mar 2021 o 12:24 范姜徐霖 napisał(a): > > >> > > > > > >> > > > I want to run ble_app sample code using SIFIVE mcu. > > >> > > > I modify the bsp from nordic to my board and change mcu to sifive. > > >> > > > I copy apache-mynewt-nimble/nimble/drivers/native and > > >> > > > modify it to simulate radio hardware. for now it just for not stuck > > >> code > > >> > > > running. > > >> > > > > > >> > > > I load code and run , I got some ble log messages below. > > >> > > > > > >> > > > after checking code, I found > > >> > > > inside hal_timer_start_at() function, it call fe310_tmr_check_first > > >> and > > >> > > > it seems not operate correctly. > > >> > > > It will issue pwm interrupt continuely, so it stuck. > > >> > > > > > >> > > > is there anyone help ? or I missing something? > > >> > > > > > >> > > > > > >>
Re: hw/mcu/sifive/fe310/src/hal_timer.c question
Hi Jack, I setup blinky-like project with default settings that hifive1 bsp set with one modification: SYS_CLOCK: HFXOSC_16_MHZ I also added two cpu timers like this: os_cputime_timer_init(_timer1, cpu_timer1_cb, NULL); os_cputime_timer_relative(_timer1, CPU_TIMER1_TIMEOUT); os_cputime_timer_init(_timer2, cpu_timer2_cb, NULL); os_cputime_timer_relative(_timer2, CPU_TIMER2_TIMEOUT); Code is using cpu timer that is using PWM2 that should be similar to what you have. My timer callbacks just toggle some GPIO to verify that frequencies are correct. So far everything works as expected. 1. Maybe you could share timer/clock related content of your syscfg. 2. Maybe timer usage is different then mine (hal_timer api instead of cpu_timer that I used for quick check) br Jerzy pon., 15 mar 2021 o 09:05 范姜徐霖 napisał(a): > > 3. frequency on PWM timer: 32768 > > Jack > > 范姜徐霖 於 2021年3月15日 週一 下午3:33寫道: > > > Hi, > > > > 1. system clock frequency:16MHz > > 2. which PWM: PWM2 > > 3. frequency on PWM timer: 32758 > > > > Jack > > > > Jerzy Kasenberg 於 2021年3月15日 週一 下午3:33寫道: > > > >> Hi, > >> > >> I don't remember details to answer number 3 out of my head. But we > >> will find out soon. > >> In the meanwhile can you give me: > >> 1. system clock frequency that you have selected > >> 2. which PWM is causing problem. > >> 3. what is frequency on PWM timer. > >> Those will help me setup environment closer to what you have. > >> > >> br > >> Jerzy > >> > >> niedz., 14 mar 2021 o 02:28 范姜徐霖 napisał(a): > >> > > >> > Hi, > >> > > >> > 1. Do you know if tick is negative at line that you marked > >> > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) {>> > > >> > In my program : PWM_CMP0=0x, PWM_CMP1=0x, PEM_CFG=0xc0001209, > >> ticks > >> > =0x6a > >> > my observation: 0x6a written in PWM_CMP1, this trigger pwm interrupt > >> > (fe310_pwm_cmp1_handler) > >> > and the handler call fe310_tmr_check_first again, then trigger pwm > >> > interrupt, and so on.. > >> > > >> > 2. I am sorry I can not share project with you, it is company project. > >> > I can provide program running info > >> > > >> > 3. I have a question about hal_timer_cnt function . > >> > how does the code check overflow condition? > >> > > >> > Thanks for your help. > >> > > >> > -- > >> > static uint32_t > >> > hal_timer_cnt(struct fe310_hal_tmr *tmr) > >> > { > >> > uint32_t cnt; > >> > int sr; > >> > uint32_t regs = (uint32_t) tmr->pwm_regs; > >> > > >> > __HAL_DISABLE_INTERRUPTS(sr); > >> > cnt = _REG32(regs, PWM_S) + tmr->value; > >> > /* Check if just overflowed */ > >> > if (_REG32(regs, PWM_CFG) & PWM_CMP0) { >> > cnt += _REG32(regs, PWM_CMP0) + 1; > >> > } > >> > __HAL_ENABLE_INTERRUPTS(sr); > >> > > >> > return cnt; > >> > } > >> > - > >> > > >> > Jerzy Kasenberg 於 2021年3月13日 週六 > >> 下午11:35寫道: > >> > > >> > > Hi, > >> > > > >> > > 1. Do you know if tick is negative at line that you marked > >> > > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) { >> > > > >> > > 2. Can you share your project with me somehow so I could take a look > >> > > (presuming it is running on hifive1 board)? > >> > > > >> > > I can take a look at this next Monday. > >> > > > >> > > best regards > >> > > Jerzy > >> > > > >> > > sob., 13 mar 2021 o 12:24 范姜徐霖 napisał(a): > >> > > > > >> > > > I want to run ble_app sample code using SIFIVE mcu. > >> > > > I modify the bsp from nordic to my board and change mcu to sifive. > >> > > > I copy apache-mynewt-nimble/nimble/drivers/native and > >> > > > modify it to simulate radio hardware. for now it just for not stuck > >> code > >> > > > running. > >> > > > > >> > > > I load code and run , I got some ble log messages below. > >> > > > > >> > > > after checking code, I found > >> > > > inside hal_timer_start_at() function, it call fe310_tmr_check_first > >> and > >> > > > it seems not operate correctly. > >> > > > It will issue pwm interrupt continuely, so it stuck. > >> > > > > >> > > > is there anyone help ? or I missing something? > >> > > > > >> > > > > >> --- > >> > > > static void > >> > > > fe310_tmr_check_first(struct fe310_hal_tmr *tmr) > >> > > > { > >> > > > struct hal_timer *ht; > >> > > > > >> > > > ht = TAILQ_FIRST(>sht_timers); > >> > > > if (ht) { > >> > > > uint32_t cnt = hal_timer_cnt(tmr); > >> > > > int32_t ticks = (int32_t)(ht->expiry - cnt); > >> > > > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) { > >> >> > > > _REG32(tmr->pwm_regs, PWM_CMP1) = ticks; > >> >> > > > plic_enable_interrupt(tmr->pwmxcmp0_int + 1); > >> > > >> > > > code > >> > > > return; > >> > > > } > >> > > > } > >> >
Re: hw/mcu/sifive/fe310/src/hal_timer.c question
3. frequency on PWM timer: 32768 Jack 范姜徐霖 於 2021年3月15日 週一 下午3:33寫道: > Hi, > > 1. system clock frequency:16MHz > 2. which PWM: PWM2 > 3. frequency on PWM timer: 32758 > > Jack > > Jerzy Kasenberg 於 2021年3月15日 週一 下午3:33寫道: > >> Hi, >> >> I don't remember details to answer number 3 out of my head. But we >> will find out soon. >> In the meanwhile can you give me: >> 1. system clock frequency that you have selected >> 2. which PWM is causing problem. >> 3. what is frequency on PWM timer. >> Those will help me setup environment closer to what you have. >> >> br >> Jerzy >> >> niedz., 14 mar 2021 o 02:28 范姜徐霖 napisał(a): >> > >> > Hi, >> > >> > 1. Do you know if tick is negative at line that you marked >> > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) {> > >> > In my program : PWM_CMP0=0x, PWM_CMP1=0x, PEM_CFG=0xc0001209, >> ticks >> > =0x6a >> > my observation: 0x6a written in PWM_CMP1, this trigger pwm interrupt >> > (fe310_pwm_cmp1_handler) >> > and the handler call fe310_tmr_check_first again, then trigger pwm >> > interrupt, and so on.. >> > >> > 2. I am sorry I can not share project with you, it is company project. >> > I can provide program running info >> > >> > 3. I have a question about hal_timer_cnt function . >> > how does the code check overflow condition? >> > >> > Thanks for your help. >> > >> > -- >> > static uint32_t >> > hal_timer_cnt(struct fe310_hal_tmr *tmr) >> > { >> > uint32_t cnt; >> > int sr; >> > uint32_t regs = (uint32_t) tmr->pwm_regs; >> > >> > __HAL_DISABLE_INTERRUPTS(sr); >> > cnt = _REG32(regs, PWM_S) + tmr->value; >> > /* Check if just overflowed */ >> > if (_REG32(regs, PWM_CFG) & PWM_CMP0) { > > cnt += _REG32(regs, PWM_CMP0) + 1; >> > } >> > __HAL_ENABLE_INTERRUPTS(sr); >> > >> > return cnt; >> > } >> > - >> > >> > Jerzy Kasenberg 於 2021年3月13日 週六 >> 下午11:35寫道: >> > >> > > Hi, >> > > >> > > 1. Do you know if tick is negative at line that you marked >> > > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) { > > > >> > > 2. Can you share your project with me somehow so I could take a look >> > > (presuming it is running on hifive1 board)? >> > > >> > > I can take a look at this next Monday. >> > > >> > > best regards >> > > Jerzy >> > > >> > > sob., 13 mar 2021 o 12:24 范姜徐霖 napisał(a): >> > > > >> > > > I want to run ble_app sample code using SIFIVE mcu. >> > > > I modify the bsp from nordic to my board and change mcu to sifive. >> > > > I copy apache-mynewt-nimble/nimble/drivers/native and >> > > > modify it to simulate radio hardware. for now it just for not stuck >> code >> > > > running. >> > > > >> > > > I load code and run , I got some ble log messages below. >> > > > >> > > > after checking code, I found >> > > > inside hal_timer_start_at() function, it call fe310_tmr_check_first >> and >> > > > it seems not operate correctly. >> > > > It will issue pwm interrupt continuely, so it stuck. >> > > > >> > > > is there anyone help ? or I missing something? >> > > > >> > > > >> --- >> > > > static void >> > > > fe310_tmr_check_first(struct fe310_hal_tmr *tmr) >> > > > { >> > > > struct hal_timer *ht; >> > > > >> > > > ht = TAILQ_FIRST(>sht_timers); >> > > > if (ht) { >> > > > uint32_t cnt = hal_timer_cnt(tmr); >> > > > int32_t ticks = (int32_t)(ht->expiry - cnt); >> > > > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) { >> > > > > _REG32(tmr->pwm_regs, PWM_CMP1) = ticks; >> > > > > plic_enable_interrupt(tmr->pwmxcmp0_int + 1); >> > > > > > > code >> > > > return; >> > > > } >> > > > } >> > > > _REG32(tmr->pwm_regs, PWM_CMP1) = _REG32(tmr->pwm_regs, >> PWM_CMP0); >> > > > /* Disable PWMxCMP1 interrupt, leaving only CMP0 which is used >> all >> > > the >> > > > time */ >> > > > plic_disable_interrupt(tmr->pwmxcmp0_int + 1); >> > > > } >> > > > >> > > >> -- >> > > > >> > > > >> > > > = >> > > > 00 [ts=0us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x0 >> > > ocf=0x0 >> > > > 01 [ts=7812us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x03 >> > > ocf=0x0003 >> > > > len=0 >> > > > 02 [ts=15624us, mod=4 level=0] 0x03 0x0c 0x00 >> > > > 02 [ts=15624us, mod=4 level=0] Command complete: cmd_pkts=1 >> ogf=0x3 >> > > > ocf=0x3 status=0 >> > > > 03 [ts=23436us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x04 >> > > ocf=0x0001 >> > > > len=0 >> > > > 04 [ts=31248us, mod=4 level=0] 0x01 0x10 0x00 >> > > > 05 [ts=39060us, mod=4 level=0] Command complete: cmd_pkts=1 >> ogf=0x4 >> > > > ocf=0x1 status=0
Re: hw/mcu/sifive/fe310/src/hal_timer.c question
Hi, 1. system clock frequency:16MHz 2. which PWM: PWM2 3. frequency on PWM timer: 32758 Jack Jerzy Kasenberg 於 2021年3月15日 週一 下午3:33寫道: > Hi, > > I don't remember details to answer number 3 out of my head. But we > will find out soon. > In the meanwhile can you give me: > 1. system clock frequency that you have selected > 2. which PWM is causing problem. > 3. what is frequency on PWM timer. > Those will help me setup environment closer to what you have. > > br > Jerzy > > niedz., 14 mar 2021 o 02:28 范姜徐霖 napisał(a): > > > > Hi, > > > > 1. Do you know if tick is negative at line that you marked > > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) {> > > In my program : PWM_CMP0=0x, PWM_CMP1=0x, PEM_CFG=0xc0001209, > ticks > > =0x6a > > my observation: 0x6a written in PWM_CMP1, this trigger pwm interrupt > > (fe310_pwm_cmp1_handler) > > and the handler call fe310_tmr_check_first again, then trigger pwm > > interrupt, and so on.. > > > > 2. I am sorry I can not share project with you, it is company project. > > I can provide program running info > > > > 3. I have a question about hal_timer_cnt function . > > how does the code check overflow condition? > > > > Thanks for your help. > > > > -- > > static uint32_t > > hal_timer_cnt(struct fe310_hal_tmr *tmr) > > { > > uint32_t cnt; > > int sr; > > uint32_t regs = (uint32_t) tmr->pwm_regs; > > > > __HAL_DISABLE_INTERRUPTS(sr); > > cnt = _REG32(regs, PWM_S) + tmr->value; > > /* Check if just overflowed */ > > if (_REG32(regs, PWM_CFG) & PWM_CMP0) { > cnt += _REG32(regs, PWM_CMP0) + 1; > > } > > __HAL_ENABLE_INTERRUPTS(sr); > > > > return cnt; > > } > > - > > > > Jerzy Kasenberg 於 2021年3月13日 週六 下午11:35寫道: > > > > > Hi, > > > > > > 1. Do you know if tick is negative at line that you marked > > > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) { > > > > > 2. Can you share your project with me somehow so I could take a look > > > (presuming it is running on hifive1 board)? > > > > > > I can take a look at this next Monday. > > > > > > best regards > > > Jerzy > > > > > > sob., 13 mar 2021 o 12:24 范姜徐霖 napisał(a): > > > > > > > > I want to run ble_app sample code using SIFIVE mcu. > > > > I modify the bsp from nordic to my board and change mcu to sifive. > > > > I copy apache-mynewt-nimble/nimble/drivers/native and > > > > modify it to simulate radio hardware. for now it just for not stuck > code > > > > running. > > > > > > > > I load code and run , I got some ble log messages below. > > > > > > > > after checking code, I found > > > > inside hal_timer_start_at() function, it call fe310_tmr_check_first > and > > > > it seems not operate correctly. > > > > It will issue pwm interrupt continuely, so it stuck. > > > > > > > > is there anyone help ? or I missing something? > > > > > > > > > --- > > > > static void > > > > fe310_tmr_check_first(struct fe310_hal_tmr *tmr) > > > > { > > > > struct hal_timer *ht; > > > > > > > > ht = TAILQ_FIRST(>sht_timers); > > > > if (ht) { > > > > uint32_t cnt = hal_timer_cnt(tmr); > > > > int32_t ticks = (int32_t)(ht->expiry - cnt); > > > > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) { code > > > > _REG32(tmr->pwm_regs, PWM_CMP1) = ticks; code > > > > plic_enable_interrupt(tmr->pwmxcmp0_int + 1); > > > > > > code > > > > return; > > > > } > > > > } > > > > _REG32(tmr->pwm_regs, PWM_CMP1) = _REG32(tmr->pwm_regs, > PWM_CMP0); > > > > /* Disable PWMxCMP1 interrupt, leaving only CMP0 which is used > all > > > the > > > > time */ > > > > plic_disable_interrupt(tmr->pwmxcmp0_int + 1); > > > > } > > > > > > > > -- > > > > > > > > > > > > = > > > > 00 [ts=0us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x0 > > > ocf=0x0 > > > > 01 [ts=7812us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x03 > > > ocf=0x0003 > > > > len=0 > > > > 02 [ts=15624us, mod=4 level=0] 0x03 0x0c 0x00 > > > > 02 [ts=15624us, mod=4 level=0] Command complete: cmd_pkts=1 > ogf=0x3 > > > > ocf=0x3 status=0 > > > > 03 [ts=23436us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x04 > > > ocf=0x0001 > > > > len=0 > > > > 04 [ts=31248us, mod=4 level=0] 0x01 0x10 0x00 > > > > 05 [ts=39060us, mod=4 level=0] Command complete: cmd_pkts=1 > ogf=0x4 > > > > ocf=0x1 status=0 hci_ver=9 hci_rev=0 lmp_ver=9 mfrg=65535 > lmp_subver=0 > > > > 06 [ts=46872us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x03 > > > ocf=0x0001 > > > > len=8 > > > > 07 [ts=54684us, mod=4 level=0] 0x01 0x0c 0x08 0x90 0x80 0x00 0x02
Re: hw/mcu/sifive/fe310/src/hal_timer.c question
Hi, I don't remember details to answer number 3 out of my head. But we will find out soon. In the meanwhile can you give me: 1. system clock frequency that you have selected 2. which PWM is causing problem. 3. what is frequency on PWM timer. Those will help me setup environment closer to what you have. br Jerzy niedz., 14 mar 2021 o 02:28 范姜徐霖 napisał(a): > > Hi, > > 1. Do you know if tick is negative at line that you marked > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) {> In my program : PWM_CMP0=0x, PWM_CMP1=0x, PEM_CFG=0xc0001209, ticks > =0x6a > my observation: 0x6a written in PWM_CMP1, this trigger pwm interrupt > (fe310_pwm_cmp1_handler) > and the handler call fe310_tmr_check_first again, then trigger pwm > interrupt, and so on.. > > 2. I am sorry I can not share project with you, it is company project. > I can provide program running info > > 3. I have a question about hal_timer_cnt function . > how does the code check overflow condition? > > Thanks for your help. > > -- > static uint32_t > hal_timer_cnt(struct fe310_hal_tmr *tmr) > { > uint32_t cnt; > int sr; > uint32_t regs = (uint32_t) tmr->pwm_regs; > > __HAL_DISABLE_INTERRUPTS(sr); > cnt = _REG32(regs, PWM_S) + tmr->value; > /* Check if just overflowed */ > if (_REG32(regs, PWM_CFG) & PWM_CMP0) { cnt += _REG32(regs, PWM_CMP0) + 1; > } > __HAL_ENABLE_INTERRUPTS(sr); > > return cnt; > } > - > > Jerzy Kasenberg 於 2021年3月13日 週六 下午11:35寫道: > > > Hi, > > > > 1. Do you know if tick is negative at line that you marked > > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) { > > > 2. Can you share your project with me somehow so I could take a look > > (presuming it is running on hifive1 board)? > > > > I can take a look at this next Monday. > > > > best regards > > Jerzy > > > > sob., 13 mar 2021 o 12:24 范姜徐霖 napisał(a): > > > > > > I want to run ble_app sample code using SIFIVE mcu. > > > I modify the bsp from nordic to my board and change mcu to sifive. > > > I copy apache-mynewt-nimble/nimble/drivers/native and > > > modify it to simulate radio hardware. for now it just for not stuck code > > > running. > > > > > > I load code and run , I got some ble log messages below. > > > > > > after checking code, I found > > > inside hal_timer_start_at() function, it call fe310_tmr_check_first and > > > it seems not operate correctly. > > > It will issue pwm interrupt continuely, so it stuck. > > > > > > is there anyone help ? or I missing something? > > > > > > --- > > > static void > > > fe310_tmr_check_first(struct fe310_hal_tmr *tmr) > > > { > > > struct hal_timer *ht; > > > > > > ht = TAILQ_FIRST(>sht_timers); > > > if (ht) { > > > uint32_t cnt = hal_timer_cnt(tmr); > > > int32_t ticks = (int32_t)(ht->expiry - cnt); > > > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) { > > _REG32(tmr->pwm_regs, PWM_CMP1) = ticks; > > plic_enable_interrupt(tmr->pwmxcmp0_int + 1); > > > > code > > > return; > > > } > > > } > > > _REG32(tmr->pwm_regs, PWM_CMP1) = _REG32(tmr->pwm_regs, PWM_CMP0); > > > /* Disable PWMxCMP1 interrupt, leaving only CMP0 which is used all > > the > > > time */ > > > plic_disable_interrupt(tmr->pwmxcmp0_int + 1); > > > } > > > > > -- > > > > > > > > > = > > > 00 [ts=0us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x0 > > ocf=0x0 > > > 01 [ts=7812us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x03 > > ocf=0x0003 > > > len=0 > > > 02 [ts=15624us, mod=4 level=0] 0x03 0x0c 0x00 > > > 02 [ts=15624us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x3 > > > ocf=0x3 status=0 > > > 03 [ts=23436us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x04 > > ocf=0x0001 > > > len=0 > > > 04 [ts=31248us, mod=4 level=0] 0x01 0x10 0x00 > > > 05 [ts=39060us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x4 > > > ocf=0x1 status=0 hci_ver=9 hci_rev=0 lmp_ver=9 mfrg=65535 lmp_subver=0 > > > 06 [ts=46872us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x03 > > ocf=0x0001 > > > len=8 > > > 07 [ts=54684us, mod=4 level=0] 0x01 0x0c 0x08 0x90 0x80 0x00 0x02 > > 0x00 > > > 0x80 0x00 0x20 > > > 08 [ts=62496us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x3 > > > ocf=0x1 status=0 > > > 09 [ts=70308us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x03 > > ocf=0x0063 > > > len=8 > > > 10 [ts=78120us, mod=4 level=0] 0x63 0x0c 0x08 0x00 0x00 0x80 0x00 > > 0x00 > > > 0x00 0x00 0x00 > > > 11 [ts=85932us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x3 > > > ocf=0x63
Re: hw/mcu/sifive/fe310/src/hal_timer.c question
Hi, 1. Do you know if tick is negative at line that you marked if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) {pwm_regs; __HAL_DISABLE_INTERRUPTS(sr); cnt = _REG32(regs, PWM_S) + tmr->value; /* Check if just overflowed */ if (_REG32(regs, PWM_CFG) & PWM_CMP0) { Hi, > > 1. Do you know if tick is negative at line that you marked > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) { > 2. Can you share your project with me somehow so I could take a look > (presuming it is running on hifive1 board)? > > I can take a look at this next Monday. > > best regards > Jerzy > > sob., 13 mar 2021 o 12:24 范姜徐霖 napisał(a): > > > > I want to run ble_app sample code using SIFIVE mcu. > > I modify the bsp from nordic to my board and change mcu to sifive. > > I copy apache-mynewt-nimble/nimble/drivers/native and > > modify it to simulate radio hardware. for now it just for not stuck code > > running. > > > > I load code and run , I got some ble log messages below. > > > > after checking code, I found > > inside hal_timer_start_at() function, it call fe310_tmr_check_first and > > it seems not operate correctly. > > It will issue pwm interrupt continuely, so it stuck. > > > > is there anyone help ? or I missing something? > > > > --- > > static void > > fe310_tmr_check_first(struct fe310_hal_tmr *tmr) > > { > > struct hal_timer *ht; > > > > ht = TAILQ_FIRST(>sht_timers); > > if (ht) { > > uint32_t cnt = hal_timer_cnt(tmr); > > int32_t ticks = (int32_t)(ht->expiry - cnt); > > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) { > _REG32(tmr->pwm_regs, PWM_CMP1) = ticks; > plic_enable_interrupt(tmr->pwmxcmp0_int + 1); > > code > > return; > > } > > } > > _REG32(tmr->pwm_regs, PWM_CMP1) = _REG32(tmr->pwm_regs, PWM_CMP0); > > /* Disable PWMxCMP1 interrupt, leaving only CMP0 which is used all > the > > time */ > > plic_disable_interrupt(tmr->pwmxcmp0_int + 1); > > } > > > -- > > > > > > = > > 00 [ts=0us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x0 > ocf=0x0 > > 01 [ts=7812us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x03 > ocf=0x0003 > > len=0 > > 02 [ts=15624us, mod=4 level=0] 0x03 0x0c 0x00 > > 02 [ts=15624us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x3 > > ocf=0x3 status=0 > > 03 [ts=23436us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x04 > ocf=0x0001 > > len=0 > > 04 [ts=31248us, mod=4 level=0] 0x01 0x10 0x00 > > 05 [ts=39060us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x4 > > ocf=0x1 status=0 hci_ver=9 hci_rev=0 lmp_ver=9 mfrg=65535 lmp_subver=0 > > 06 [ts=46872us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x03 > ocf=0x0001 > > len=8 > > 07 [ts=54684us, mod=4 level=0] 0x01 0x0c 0x08 0x90 0x80 0x00 0x02 > 0x00 > > 0x80 0x00 0x20 > > 08 [ts=62496us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x3 > > ocf=0x1 status=0 > > 09 [ts=70308us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x03 > ocf=0x0063 > > len=8 > > 10 [ts=78120us, mod=4 level=0] 0x63 0x0c 0x08 0x00 0x00 0x80 0x00 > 0x00 > > 0x00 0x00 0x00 > > 11 [ts=85932us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x3 > > ocf=0x63 status=0 > > 12 [ts=93744us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x08 > ocf=0x0001 > > len=8 > > 13 [ts=101556us, mod=4 level=0] 0x01 0x20 0x08 0x7f 0xfe 0x0f 0x00 > 0x00 > > 0x00 0x00 0x00 > > 14 [ts=109368us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x8 > > ocf=0x1 status=0 > > 15 [ts=117180us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x08 > > ocf=0x0002 len=0 > > 16 [ts=124992us, mod=4 level=0] 0x02 0x20 0x00 > > 16 [ts=124992us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x8 > > ocf=0x2 status=0 > > 17 [ts=132804us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x08 >
Re: hw/mcu/sifive/fe310/src/hal_timer.c question
Hi, 1. Do you know if tick is negative at line that you marked if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) {> I want to run ble_app sample code using SIFIVE mcu. > I modify the bsp from nordic to my board and change mcu to sifive. > I copy apache-mynewt-nimble/nimble/drivers/native and > modify it to simulate radio hardware. for now it just for not stuck code > running. > > I load code and run , I got some ble log messages below. > > after checking code, I found > inside hal_timer_start_at() function, it call fe310_tmr_check_first and > it seems not operate correctly. > It will issue pwm interrupt continuely, so it stuck. > > is there anyone help ? or I missing something? > > --- > static void > fe310_tmr_check_first(struct fe310_hal_tmr *tmr) > { > struct hal_timer *ht; > > ht = TAILQ_FIRST(>sht_timers); > if (ht) { > uint32_t cnt = hal_timer_cnt(tmr); > int32_t ticks = (int32_t)(ht->expiry - cnt); > if (ticks < _REG32(tmr->pwm_regs, PWM_CMP0)) { _REG32(tmr->pwm_regs, PWM_CMP1) = ticks; plic_enable_interrupt(tmr->pwmxcmp0_int + 1); code > return; > } > } > _REG32(tmr->pwm_regs, PWM_CMP1) = _REG32(tmr->pwm_regs, PWM_CMP0); > /* Disable PWMxCMP1 interrupt, leaving only CMP0 which is used all the > time */ > plic_disable_interrupt(tmr->pwmxcmp0_int + 1); > } > -- > > > = > 00 [ts=0us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x0 ocf=0x0 > 01 [ts=7812us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x03 ocf=0x0003 > len=0 > 02 [ts=15624us, mod=4 level=0] 0x03 0x0c 0x00 > 02 [ts=15624us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x3 > ocf=0x3 status=0 > 03 [ts=23436us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x04 ocf=0x0001 > len=0 > 04 [ts=31248us, mod=4 level=0] 0x01 0x10 0x00 > 05 [ts=39060us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x4 > ocf=0x1 status=0 hci_ver=9 hci_rev=0 lmp_ver=9 mfrg=65535 lmp_subver=0 > 06 [ts=46872us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x03 ocf=0x0001 > len=8 > 07 [ts=54684us, mod=4 level=0] 0x01 0x0c 0x08 0x90 0x80 0x00 0x02 0x00 > 0x80 0x00 0x20 > 08 [ts=62496us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x3 > ocf=0x1 status=0 > 09 [ts=70308us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x03 ocf=0x0063 > len=8 > 10 [ts=78120us, mod=4 level=0] 0x63 0x0c 0x08 0x00 0x00 0x80 0x00 0x00 > 0x00 0x00 0x00 > 11 [ts=85932us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x3 > ocf=0x63 status=0 > 12 [ts=93744us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x08 ocf=0x0001 > len=8 > 13 [ts=101556us, mod=4 level=0] 0x01 0x20 0x08 0x7f 0xfe 0x0f 0x00 0x00 > 0x00 0x00 0x00 > 14 [ts=109368us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x8 > ocf=0x1 status=0 > 15 [ts=117180us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x08 > ocf=0x0002 len=0 > 16 [ts=124992us, mod=4 level=0] 0x02 0x20 0x00 > 16 [ts=124992us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x8 > ocf=0x2 status=0 > 17 [ts=132804us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x08 > ocf=0x0003 len=0 > 18 [ts=140616us, mod=4 level=0] 0x03 0x20 0x00 > 19 [ts=148428us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x8 > ocf=0x3 status=0 > 20 [ts=156240us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x04 > ocf=0x0009 len=0 > 20 [ts=156240us, mod=4 level=0] 0x09 0x10 0x00 > 21 [ts=164052us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x4 > ocf=0x9 status=0 bd_addr=0:0:0:0:0:0 > 22 [ts=171864us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x08 > ocf=0x002d len=1 > 23 [ts=179676us, mod=4 level=0] 0x2d 0x20 0x01 0x00 > 24 [ts=187488us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x8 > ocf=0x2d status=0 > 25 [ts=195300us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x08 > ocf=0x0029 len=0 > 26 [ts=203112us, mod=4 level=0] 0x29 0x20 0x00 > 26 [ts=203112us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x8 > ocf=0x29 status=0 > 27 [ts=210924us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x08 > ocf=0x002d len=1 > 28 [ts=218736us, mod=4 level=0] 0x2d 0x20 0x01 0x01 > 29 [ts=226548us, mod=4 level=0] Command complete: cmd_pkts=1 ogf=0x8 > ocf=0x2d status=0 > 30 [ts=234360us, mod=4 level=1] GAP procedure initiated: stop > advertising. > 30 [ts=234360us, mod=4 level=0] ble_hs_hci_cmd_send: ogf=0x08 > ocf=0x000a len=1 > 31 [ts=242172us, mod=4 level=0] 0x0a 0x20 0x01 0x00 > 32 [ts=249984us, mod=4