Re: [edk2-devel] [edk2-platforms][PATCH v1 00/35] Consolidate SpiFlashCommonLib instances

2021-05-18 Thread Michael Kubacki 

Hi Nate,

The v1 series was based on commit 7545558.

It did not apply cleanly for me on the current master due to some 
conflicting changes that have gone in since the series, mainly a series 
related to ucode PCDs in the FDFs and another related to 
ReportCpuHobLib. I rebased the series in v2 and it applied cleanly on 
the current edk2-platforms master (32183bd) for me.


V2 series: https://edk2.groups.io/g/devel/message/75306

However, IntelSiliconPkg currently has a build error due to a change 
that went in last week. Bug is filed 
https://bugzilla.tianocore.org/show_bug.cgi?id=3404 and patch is sent 
for that - https://edk2.groups.io/g/devel/message/75342.


**MAINTAINERS**: This patch series has been on the list for over 1 month 
and has only received a couple of reviews. PLEASE be more prompt with v2.


Thanks,
Michael

On 5/13/2021 2:18 PM, Desimone, Nathaniel L wrote:

Hi Michael,

You patch series does not apply to edk2-platforms master branch. I tried both 
today's tip and a snapshot from Apr. 15 and I could not get your series to 
apply at either point in history. Based on some of the SHA data I see in the 
series I suspect you didn't have the parent of this patch series derive from a 
commit on master branch at the time you generated it. Please rebase your patch 
series to latest master branch and send it again.

Thanks,
Nate

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Michael Kubacki
Sent: Thursday, April 15, 2021 7:31 PM
To: devel@edk2.groups.io
Cc: Agyeman, Prince ; Chiu, Chasel ; Kethi Reddy, Deepika 
; Dong, Eric ; Luo, Heng ; Jeremy Soller 
; Esakkithevar, Kathappan ; Liming Gao ; 
Desimone, Nathaniel L ; Chaganty, Rangasai V 
Subject: [edk2-devel] [edk2-platforms][PATCH v1 00/35] Consolidate 
SpiFlashCommonLib instances

From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

SpiFlashCommonLib is duplicated in multiple places across the MinPlatform 
design in edk2-platforms.I'm planning to build some additional functionality on 
top of SpiFlashCommonLib and, ideally, this duplication will be consolidated 
into a single instance usable across all current library consumers.

This patch series focuses on consolidating the various SpiFlashCommonLib 
instances as agreed upon in https://edk2.groups.io/g/devel/message/71701.

Read the BZ for more general background around this series.

I only have an UpXtreme board on hand so maintainers/reviewers of other board 
packages should test these changes on those boards.

Cc: Agyeman Prince 
Cc: Chasel Chiu 
Cc: Deepika Kethi Reddy 
Cc: Eric Dong 
Cc: Heng Luo 
Cc: Jeremy Soller 
Cc: Kathappan Esakkithevar 
Cc: Liming Gao 
Cc: Nate DeSimone 
Cc: Rangasai V Chaganty 
Signed-off-by: Michael Kubacki 

Michael Kubacki (35):
   CometlakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry
   WhiskeylakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry
   CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Add missing GUID to INF
   IntelSiliconPkg: Add BIOS area base address and size PCDs
   IntelSiliconPkg: Add microcode FV PCDs
   IntelSiliconPkg: Add PCH SPI PPI
   IntelSiliconPkg: Add PCH SPI Protocol
   IntelSiliconPkg: Add SpiFlashCommonLib
   IntelSiliconPkg: Add SmmSpiFlashCommonLib
   IntelSiliconPkg: Add MM SPI FVB services
   CometlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
   KabylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
   SimicsOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
   TigerlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
   WhiskeylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
   CoffeelakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
   KabylakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
   SimicsIch10Pkg: Use IntelSiliconPkg BIOS area and ucode PCDs
   TigerlakeSiliconPkg: Use IntelSiliconPkg BIOS are and ucode PCDs
   CometlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
   KabylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
   SimicsOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
   TigerlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
   WhiskeylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
   MinPlatformPkg: Remove SpiFvbService modules
   CoffeelakeSiliconPkg: Remove SmmSpiFlashCommonLib
   KabylakeSiliconPkg: Remove SmmSpiFlashCommonLib
   SimicsIch10Pkg: Remove SmmSpiFlashCommonLib
   TigerlakeOpenBoardPkg: Remove SmmSpiFlashCommonLib
   MinPlatformPkg: Remove SpiFlashCommonLibNull
   KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Add IntelSiliconPkg.dec
   CoffeelakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
   KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
   SimicsIch10Pkg: Remove PCH SPI SMM Protocol from package
   TigerlakeSiliconPkg: Remove PCH SPI PPI and Protocol from package

  
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c

[edk2-devel] [edk2-platforms][PATCH v1 1/1] IntelSiliconPkg: Cast UINT32 to UINT8 conversion in ReportCpuHobLib

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3404

Commit d3c10d3 introduced a build error in ReportCpuHobLib.c:

IntelSiliconPkg\Library\ReportCpuHobLib\ReportCpuHobLib.c(30):
  error C2220: warning treated as error - no 'object' file generated
IntelSiliconPkg\Library\ReportCpuHobLib\ReportCpuHobLib.c(30):
  warning C4244: '=': conversion from 'UINT32' to 'UINT8',
  possible loss of data

This commit explicitly cast the assignment to fix the build error.

Cc: Ray Ni 
Cc: Rangasai V Chaganty 
Cc: SofiaX Chuang 
Signed-off-by: Michael Kubacki 
---
 Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git 
a/Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.c 
b/Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.c
index 3f67b477d25a..56d63a35edcb 100644
--- a/Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.c
+++ b/Silicon/Intel/IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.c
@@ -27,7 +27,7 @@ ReportCpuHob (
   AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, , NULL, NULL, 
NULL);
   if (AddressSizeEax.Uint32 >= CPUID_VIR_PHY_ADDRESS_SIZE) {
 AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, , NULL, NULL, 
NULL);
-PhysicalAddressBits = AddressSizeEax.Bits.PhysicalAddressBits;
+PhysicalAddressBits = (UINT8)AddressSizeEax.Bits.PhysicalAddressBits;
   } else {
 PhysicalAddressBits = 36;
   }
-- 
2.28.0.windows.1



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[edk2-devel] [edk2-platforms][PATCH v2 35/35] TigerlakeSiliconPkg: Remove PCH SPI PPI and Protocol from package

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

The following PPI and Protocols have moved to IntelSiliconPkg. The
remaining definitions in TigerlakeSiliconPkg are removed and libs/
modules that need to reference IntelSiliconPkg are updated.

1. gPchSpiProtocolGuid
2. gPchSmmSpiProtocolGuid
3. gPchSpiPpiGuid

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Heng Luo 
Signed-off-by: Michael Kubacki 
---
 Silicon/Intel/TigerlakeSiliconPkg/Include/Protocol/Spi.h   
| 301 
 
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf
 |   1 +
 Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf   
|   1 +
 Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTgl.inf
|   1 +
 Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec
|   3 -
 5 files changed, 3 insertions(+), 304 deletions(-)

diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Include/Protocol/Spi.h 
b/Silicon/Intel/TigerlakeSiliconPkg/Include/Protocol/Spi.h
deleted file mode 100644
index c13dc5a5f5f5..
--- a/Silicon/Intel/TigerlakeSiliconPkg/Include/Protocol/Spi.h
+++ /dev/null
@@ -1,301 +0,0 @@
-/** @file
-  This file defines the PCH SPI Protocol which implements the
-  Intel(R) PCH SPI Host Controller Compatibility Interface.
-
-  Copyright (c) 2021, Intel Corporation. All rights reserved.
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-#ifndef _PCH_SPI_PROTOCOL_H_
-#define _PCH_SPI_PROTOCOL_H_
-
-//
-// Extern the GUID for protocol users.
-//
-extern EFI_GUID   gPchSpiProtocolGuid;
-extern EFI_GUID   gPchSmmSpiProtocolGuid;
-
-//
-// Forward reference for ANSI C compatibility
-//
-typedef struct _PCH_SPI_PROTOCOL  PCH_SPI_PROTOCOL;
-
-//
-// SPI protocol data structures and definitions
-//
-
-/**
-  Flash Region Type
-**/
-typedef enum {
-  FlashRegionDescriptor,
-  FlashRegionBios,
-  FlashRegionMe,
-  FlashRegionGbE,
-  FlashRegionPlatformData,
-  FlashRegionDer,
-  FlashRegionSecondaryBios,
-  FlashRegionuCodePatch,
-  FlashRegionEC,
-  FlashRegionDeviceExpansion2,
-  FlashRegionIE,
-  FlashRegion10Gbe_A,
-  FlashRegion10Gbe_B,
-  FlashRegion13,
-  FlashRegion14,
-  FlashRegion15,
-  FlashRegionAll,
-  FlashRegionMax
-} FLASH_REGION_TYPE;
-//
-// Protocol member functions
-//
-
-/**
-  Read data from the flash part.
-
-  @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
-  @param[in] FlashRegionType  The Flash Region type for flash cycle which 
is listed in the Descriptor.
-  @param[in] Address  The Flash Linear Address must fall within a 
region for which BIOS has access permissions.
-  @param[in] ByteCountNumber of bytes in the data portion of the 
SPI cycle.
-  @param[out] Buffer  The Pointer to caller-allocated buffer 
containing the dada received.
-  It is the caller's responsibility to make 
sure Buffer is large enough for the total number of bytes read.
-
-  @retval EFI_SUCCESS Command succeed.
-  @retval EFI_INVALID_PARAMETER   The parameters specified are not valid.
-  @retval EFI_DEVICE_ERRORDevice error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ) (
-  IN PCH_SPI_PROTOCOL   *This,
-  IN FLASH_REGION_TYPE  FlashRegionType,
-  IN UINT32 Address,
-  IN UINT32 ByteCount,
-  OUTUINT8  *Buffer
-  );
-
-/**
-  Write data to the flash part. Remark: Erase may be needed before write to 
the flash part.
-
-  @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
-  @param[in] FlashRegionType  The Flash Region type for flash cycle which 
is listed in the Descriptor.
-  @param[in] Address  The Flash Linear Address must fall within a 
region for which BIOS has access permissions.
-  @param[in] ByteCountNumber of bytes in the data portion of the 
SPI cycle.
-  @param[in] Buffer   Pointer to caller-allocated buffer 
containing the data sent during the SPI cycle.
-
-  @retval EFI_SUCCESS Command succeed.
-  @retval EFI_INVALID_PARAMETER   The parameters specified are not valid.
-  @retval EFI_DEVICE_ERRORDevice error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_WRITE) (
-  IN PCH_SPI_PROTOCOL   *This,
-  IN FLASH_REGION_TYPE  FlashRegionType,
-  IN UINT32 Address,
-  IN UINT32 ByteCount,
-  IN UINT8  *Buffer
-  );
-
-/**
-  Erase some area on the flash part.
-
-  @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
-  @param[in] FlashRegionType  The Flash Region type for flash cycle which 
is listed in the Descriptor.
-  @param[in] Address  The

[edk2-devel] [edk2-platforms][PATCH v2 34/35] SimicsIch10Pkg: Remove PCH SPI SMM Protocol from package

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

gEfiSmmSpiProtocolGuid is now declared in IntelSiliconPkg.dec. This
change updates Ich10Pkg to remove the protocol declaration in the
package and update libraries and modules to use the protocol from
IntelSiliconPkg.

Cc: Agyeman Prince 
Signed-off-by: Michael Kubacki 
---
 Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c |  
24 +-
 Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c   |  
 4 +-
 Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec   |  
 5 -
 Silicon/Intel/SimicsIch10Pkg/Include/Protocol/Spi.h | 
295 
 Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h   |  
26 +-
 Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf  |  
 3 +-
 6 files changed, 29 insertions(+), 328 deletions(-)

diff --git 
a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c 
b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
index f2907ef53bfc..fc2a8be76b6a 100644
--- 
a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
+++ 
b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
@@ -158,7 +158,7 @@ PchPmTimerStallRuntimeSafe (
 EFI_STATUS
 EFIAPI
 SpiProtocolFlashRead (
-  IN EFI_SPI_PROTOCOL   *This,
+  IN PCH_SPI_PROTOCOL   *This,
   IN FLASH_REGION_TYPE  FlashRegionType,
   IN UINT32 Address,
   IN UINT32 ByteCount,
@@ -197,7 +197,7 @@ SpiProtocolFlashRead (
 EFI_STATUS
 EFIAPI
 SpiProtocolFlashWrite (
-  IN EFI_SPI_PROTOCOL   *This,
+  IN PCH_SPI_PROTOCOL   *This,
   IN FLASH_REGION_TYPE  FlashRegionType,
   IN UINT32 Address,
   IN UINT32 ByteCount,
@@ -235,7 +235,7 @@ SpiProtocolFlashWrite (
 EFI_STATUS
 EFIAPI
 SpiProtocolFlashErase (
-  IN EFI_SPI_PROTOCOL   *This,
+  IN PCH_SPI_PROTOCOL   *This,
   IN FLASH_REGION_TYPE  FlashRegionType,
   IN UINT32 Address,
   IN UINT32 ByteCount
@@ -274,7 +274,7 @@ SpiProtocolFlashErase (
 EFI_STATUS
 EFIAPI
 SpiProtocolFlashReadSfdp (
-  IN EFI_SPI_PROTOCOL   *This,
+  IN PCH_SPI_PROTOCOL   *This,
   IN UINT8  ComponentNumber,
   IN UINT32 Address,
   IN UINT32 ByteCount,
@@ -328,7 +328,7 @@ SpiProtocolFlashReadSfdp (
 EFI_STATUS
 EFIAPI
 SpiProtocolFlashReadJedecId (
-  IN EFI_SPI_PROTOCOL   *This,
+  IN PCH_SPI_PROTOCOL   *This,
   IN UINT8  ComponentNumber,
   IN UINT32 ByteCount,
   OUTUINT8  *JedecId
@@ -379,7 +379,7 @@ SpiProtocolFlashReadJedecId (
 EFI_STATUS
 EFIAPI
 SpiProtocolFlashWriteStatus (
-  IN EFI_SPI_PROTOCOL   *This,
+  IN PCH_SPI_PROTOCOL   *This,
   IN UINT32 ByteCount,
   IN UINT8  *StatusValue
   )
@@ -414,7 +414,7 @@ SpiProtocolFlashWriteStatus (
 EFI_STATUS
 EFIAPI
 SpiProtocolFlashReadStatus (
-  IN EFI_SPI_PROTOCOL   *This,
+  IN PCH_SPI_PROTOCOL   *This,
   IN UINT32 ByteCount,
   OUTUINT8  *StatusValue
   )
@@ -450,7 +450,7 @@ SpiProtocolFlashReadStatus (
 EFI_STATUS
 EFIAPI
 SpiProtocolGetRegionAddress (
-  IN EFI_SPI_PROTOCOL   *This,
+  IN PCH_SPI_PROTOCOL   *This,
   IN FLASH_REGION_TYPE  FlashRegionType,
   OUTUINT32 *BaseAddress,
   OUTUINT32 *RegionSize
@@ -510,7 +510,7 @@ SpiProtocolGetRegionAddress (
 EFI_STATUS
 EFIAPI
 SpiProtocolReadPchSoftStrap (
-  IN EFI_SPI_PROTOCOL   *This,
+  IN PCH_SPI_PROTOCOL   *This,
   IN UINT32 SoftStrapAddr,
   IN UINT32 ByteCount,
   OUTVOID   *SoftStrapValue
@@ -568,7 +568,7 @@ SpiProtocolReadPchSoftStrap (
 EFI_STATUS
 EFIAPI
 SpiProtocolReadCpuSoftStrap (
-  IN EFI_SPI_PROTOCOL   *This,
+  IN PCH_SPI_PROTOCOL   *This,
   IN UINT32 SoftStrapAddr,
   IN UINT32 ByteCount,
   OUTVOID   *SoftStrapValue
@@ -626,7 +626,7 @@ SpiProtocolReadCpuSoftStrap (
 **/
 EFI_STATUS
 SendSpiCmd (
-  IN EFI_SPI_PROTOCOL   *This,
+  IN PCH_SPI_PROTOCOL   *This,
   IN FLASH_REGION_TYPE  FlashRegionType,
   IN FLASH_CYCLE_TYPE   FlashCycleType,
   IN UINT32 Address,
@@ -897,7 +897,7 @@ SendSpiCmd (
 **/
 BOOLEAN
 WaitForSpiCycleComplete (
-  IN EFI_SPI_PROTOCOL   *This,
+  IN PCH_SPI_PROTOCOL   *This,
   IN UINTN  PchSpiBar0,
   IN BOOLEANErrorCheck
   )
diff --git a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c 
b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c
index 0baf730a4823..e4a81f91316c 100644
--- a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c
+++ b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c
@@ -92,11 +92,11 @@ InstallPchSpi (

[edk2-devel] [edk2-platforms][PATCH v2 26/35] CoffeelakeSiliconPkg: Remove SmmSpiFlashCommonLib

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

The library has been consolidated with instances in other Intel
silicon packages as a single instance in IntelSiliconPkg.

Cc: Chasel Chiu 
Cc: Sai Chaganty 
Signed-off-by: Michael Kubacki 
Reviewed-by: Chasel Chiu 
---
 
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
 | 196 
 
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
   |  54 --
 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h 
  |  98 --
 
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
 |  51 -
 4 files changed, 399 deletions(-)

diff --git 
a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
 
b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
deleted file mode 100644
index 53711db6325f..
--- 
a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
+++ /dev/null
@@ -1,196 +0,0 @@
-/** @file
-  Wrap EFI_SPI_PROTOCOL to provide some library level interfaces
-  for module use.
-
-  Copyright (c) 2019 Intel Corporation. All rights reserved. 
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-
-PCH_SPI_PROTOCOL   *mSpiProtocol;
-
-//
-// FlashAreaBaseAddress and Size for boottime and runtime usage.
-//
-UINTN mFlashAreaBaseAddress = 0;
-UINTN mFlashAreaSize= 0;
-
-/**
-  Enable block protection on the Serial Flash device.
-
-  @retval EFI_SUCCESS   Opertion is successful.
-  @retval EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
-  VOID
-  )
-{
-  return EFI_SUCCESS;
-}
-
-/**
-  Read NumBytes bytes of data from the address specified by
-  PAddress into Buffer.
-
-  @param[in]  Address   The starting physical address of the read.
-  @param[in,out]  NumBytes  On input, the number of bytes to read. On 
output, the number
-of bytes actually read.
-  @param[out] BufferThe destination data buffer for the read.
-
-  @retval EFI_SUCCESS   Opertion is successful.
-  @retval EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
-  IN UINTNAddress,
-  IN OUT UINT32   *NumBytes,
- OUT UINT8*Buffer
-  )
-{
-  ASSERT ((NumBytes != NULL) && (Buffer != NULL));
-  if ((NumBytes == NULL) || (Buffer == NULL)) {
-return EFI_INVALID_PARAMETER;
-  }
-
-  //
-  // This function is implemented specifically for those platforms
-  // at which the SPI device is memory mapped for read. So this
-  // function just do a memory copy for Spi Flash Read.
-  //
-  CopyMem (Buffer, (VOID *) Address, *NumBytes);
-
-  return EFI_SUCCESS;
-}
-
-/**
-  Write NumBytes bytes of data from Buffer to the address specified by
-  PAddresss.
-
-  @param[in]  Address The starting physical address of the write.
-  @param[in,out]  NumBytesOn input, the number of bytes to write. On 
output,
-  the actual number of bytes written.
-  @param[in]  Buffer  The source data buffer for the write.
-
-  @retval EFI_SUCCESS   Opertion is successful.
-  @retval EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
-  IN UINTN  Address,
-  IN OUT UINT32 *NumBytes,
-  IN UINT8  *Buffer
-  )
-{
-  EFI_STATUSStatus;
-  UINTN Offset;
-  UINT32Length;
-  UINT32RemainingBytes;
-
-  ASSERT ((NumBytes != NULL) && (Buffer != NULL));
-  if ((NumBytes == NULL) || (Buffer == NULL)) {
-return EFI_INVALID_PARAMETER;
-  }
-
-  ASSERT (Address >= mFlashAreaBaseAddress);
-
-  Offset = Address - mFlashAreaBaseAddress;
-
-  ASSERT ((*NumBytes + Offset) <= mFlashAreaSize);
-
-  Status = EFI_SUCCESS;
-  RemainingBytes = *NumBytes;
-
-
-  while (RemainingBytes > 0) {
-if (RemainingBytes > SECTOR_SIZE_4KB) {
-  Length = SECTOR_SIZE_4KB;
-} else {
-  Length = RemainingBytes;
-}
-Status = mSpiProtocol->FlashWrite (
- mSpiProtocol,
- FlashRegionBios,
- (UINT32) Offset,
- Length,
- Buffer
- );
-if (EFI_ERROR (Status)) {
-  break;
-}
-RemainingBytes -= Length;
-Offset += Length;
-Buffer += Length;
-  }
-
-  //
-  // Actual number of bytes written
-  //
-  *NumBytes -= RemainingBytes;
-
-  return Status;
-}
-
-/**
-  Erase the

[edk2-devel] [edk2-platforms][PATCH v2 30/35] MinPlatformPkg: Remove SpiFlashCommonLibNull

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

The library instance has moved to IntelSiliconPkg.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Liming Gao 
Cc: Eric Dong 
Signed-off-by: Michael Kubacki 
---
 
Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c
   | 101 
 
Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
 |  29 --
 Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h  
 |  98 ---
 Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec   
 |   2 -
 Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc   
 |   4 -
 5 files changed, 234 deletions(-)

diff --git 
a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c
 
b/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c
deleted file mode 100644
index 403b16a1b421..
--- 
a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/** @file
-  Null Library instance of SPI Flash Common Library Class
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include 
-#include 
-
-/**
-  Enable block protection on the Serial Flash device.
-
-  @retval EFI_SUCCESS   Opertion is successful.
-  @retval EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
-  VOID
-  )
-{
-  return EFI_SUCCESS;
-}
-
-/**
-  Read NumBytes bytes of data from the address specified by
-  PAddress into Buffer.
-
-  @param[in]  Address   The starting physical address of the read.
-  @param[in,out]  NumBytes  On input, the number of bytes to read. On 
output, the number
-of bytes actually read.
-  @param[out] BufferThe destination data buffer for the read.
-
-  @retval EFI_SUCCESS   Opertion is successful.
-  @retval EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
-  IN UINTNAddress,
-  IN OUT UINT32   *NumBytes,
- OUT UINT8*Buffer
-  )
-{
-  ASSERT(FALSE);
-  return EFI_SUCCESS;
-}
-
-/**
-  Write NumBytes bytes of data from Buffer to the address specified by
-  PAddresss.
-
-  @param[in]  Address The starting physical address of the write.
-  @param[in,out]  NumBytesOn input, the number of bytes to write. On 
output,
-  the actual number of bytes written.
-  @param[in]  Buffer  The source data buffer for the write.
-
-  @retval EFI_SUCCESS   Opertion is successful.
-  @retval EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
-  IN UINTN  Address,
-  IN OUT UINT32 *NumBytes,
-  IN UINT8  *Buffer
-  )
-{
-  ASSERT(FALSE);
-  return EFI_SUCCESS;
-}
-
-/**
-  Erase the block starting at Address.
-
-  @param[in]  Address The starting physical address of the block to be 
erased.
-  This library assume that caller garantee that 
the PAddress
-  is at the starting address of this block.
-  @param[in]  NumBytesOn input, the number of bytes of the logical 
block to be erased.
-  On output, the actual number of bytes erased.
-
-  @retval EFI_SUCCESS.  Opertion is successful.
-  @retval EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashBlockErase (
-  INUINTN Address,
-  INUINTN *NumBytes
-  )
-{
-  ASSERT(FALSE);
-  return EFI_SUCCESS;
-}
-
diff --git 
a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
 
b/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
deleted file mode 100644
index 75ef1cb921df..
--- 
a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
+++ /dev/null
@@ -1,29 +0,0 @@
-### @file
-# NULL instance of Spi Flash Common Library Class
-#
-# Copyright (c) 2017, Intel Corporation. All rights reserved.
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-###
-
-[Defines]
-  INF_VERSION= 0x00010017
-  BASE_NAME  = SpiFlashCommonLibNull
-  FILE_GUID  = F35BBEE7-A681-443E-BB15-07AF9FABBDED
-  VERSION_STRING = 1.0
-  MODULE_TYPE= BASE
-  LIBRARY_CLASS  = SpiFlashCommonLib
-#
-# The following information is for reference only and not required by

[edk2-devel] [edk2-platforms][PATCH v2 32/35] CoffeelakeSiliconPkg: Remove PCH SPI PPI and Protocol from package

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

The following PPI and Protocols have moved to IntelSiliconPkg. The
remaining definitions in CoffeelakeSiliconPkg are removed and libs/
modules that need to reference IntelSiliconPkg are updated.

1. gPchSpiProtocolGuid
2. gPchSmmSpiProtocolGuid
3. gPchSpiPpiGuid

Cc: Chasel Chiu 
Cc: Sai Chaganty 
Signed-off-by: Michael Kubacki 
---
 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Ppi/Spi.h   
|  27 --
 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h  
| 295 
 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf 
|   1 +
 
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
 |   1 +
 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf   
|   1 +
 Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec   
|   3 -
 6 files changed, 3 insertions(+), 325 deletions(-)

diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Ppi/Spi.h 
b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Ppi/Spi.h
deleted file mode 100644
index d3ff152742cf..
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Ppi/Spi.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/** @file
-  This file defines the PCH SPI PPI which implements the
-  Intel(R) PCH SPI Host Controller Compatibility Interface.
-
-  Copyright (c) 2019 Intel Corporation. All rights reserved. 
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#ifndef _PCH_SPI_PPI_H_
-#define _PCH_SPI_PPI_H_
-
-#include 
-
-//
-// Extern the GUID for PPI users.
-//
-extern EFI_GUID   gPchSpiPpiGuid;
-
-/**
-  Reuse the PCH_SPI_PROTOCOL definitions
-  This is possible becaues the PPI implementation does not rely on a 
PeiService pointer,
-  as it uses EDKII Glue Lib to do IO accesses
-**/
-typedef PCH_SPI_PROTOCOL PCH_SPI_PPI;
-
-#endif
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h 
b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h
deleted file mode 100644
index 22df7fe35147..
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h
+++ /dev/null
@@ -1,295 +0,0 @@
-/** @file
-  This file defines the PCH SPI Protocol which implements the
-  Intel(R) PCH SPI Host Controller Compatibility Interface.
-
-  Copyright (c) 2019 Intel Corporation. All rights reserved. 
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#ifndef _PCH_SPI_PROTOCOL_H_
-#define _PCH_SPI_PROTOCOL_H_
-
-//
-// Extern the GUID for protocol users.
-//
-extern EFI_GUID   gPchSpiProtocolGuid;
-extern EFI_GUID   gPchSmmSpiProtocolGuid;
-
-//
-// Forward reference for ANSI C compatibility
-//
-typedef struct _PCH_SPI_PROTOCOL  PCH_SPI_PROTOCOL;
-
-//
-// SPI protocol data structures and definitions
-//
-
-/**
-  Flash Region Type
-**/
-typedef enum {
-  FlashRegionDescriptor,
-  FlashRegionBios,
-  FlashRegionMe,
-  FlashRegionGbE,
-  FlashRegionPlatformData,
-  FlashRegionDer,
-  FlashRegionEC = 8,
-  FlashRegionAll,
-  FlashRegionMax
-} FLASH_REGION_TYPE;
-
-//
-// Protocol member functions
-//
-
-/**
-  Read data from the flash part.
-
-  @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
-  @param[in] FlashRegionType  The Flash Region type for flash cycle which 
is listed in the Descriptor.
-  @param[in] Address  The Flash Linear Address must fall within a 
region for which BIOS has access permissions.
-  @param[in] ByteCountNumber of bytes in the data portion of the 
SPI cycle.
-  @param[out] Buffer  The Pointer to caller-allocated buffer 
containing the dada received.
-  It is the caller's responsibility to make 
sure Buffer is large enough for the total number of bytes read.
-
-  @retval EFI_SUCCESS Command succeed.
-  @retval EFI_INVALID_PARAMETER   The parameters specified are not valid.
-  @retval EFI_DEVICE_ERRORDevice error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ) (
-  IN PCH_SPI_PROTOCOL   *This,
-  IN FLASH_REGION_TYPE  FlashRegionType,
-  IN UINT32 Address,
-  IN UINT32 ByteCount,
-  OUTUINT8  *Buffer
-  );
-
-/**
-  Write data to the flash part. Remark: Erase may be needed before write to 
the flash part.
-
-  @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
-  @param[in] FlashRegionType  The Flash Region type for flash cycle which 
is listed in the Descriptor.
-  @param[in] Address  The Flash Linear Address must fall within a 
region for which BIOS has access permissions.
-  @param[in] ByteCountNumber of bytes in the data portion of the 
SPI cycle.
-  @param[in]

[edk2-devel] [edk2-platforms][PATCH v2 20/35] CometlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates CometlakeOpenBoardPkg to use the SmmSpiFlashCommonLib
instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in
IntelSiliconPkg.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Rangasai V Chaganty 
Cc: Deepika Kethi Reddy 
Cc: Kathappan Esakkithevar 
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc | 7 +--
 Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf | 2 +-
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git 
a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc 
b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc
index 44a1bd54d6e9..316100e9a599 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc
@@ -254,7 +254,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER]
   ###
   # Silicon Initialization Package
   ###
-  
SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+  
SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
 
   ###
   # Platform Package
@@ -401,6 +401,10 @@ [Components.X64]
   $(PLATFORM_SI_PACKAGE)/SystemAgent/SaInit/Dxe/SaInitDxe.inf
   $(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
 
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
+  IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
   ###
   # Platform Package
   ###
@@ -421,7 +425,6 @@ [Components.X64]
 
 !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
 
-  $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
   $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
 
   $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf {
diff --git 
a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf 
b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
index 6397d80d3895..e341285f4b1a 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
@@ -407,7 +407,7 @@ [FV.FvOsBootUncompact]
 !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
 INF  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
 INF  $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
-INF  $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF  IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
 
 INF  $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
 INF  $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf
-- 
2.28.0.windows.1



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[edk2-devel] [edk2-platforms][PATCH v2 27/35] KabylakeSiliconPkg: Remove SmmSpiFlashCommonLib

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

The library has been consolidated with instances in other Intel
silicon packages as a single instance in IntelSiliconPkg

Cc: Chasel Chiu 
Cc: Sai Chaganty 
Signed-off-by: Michael Kubacki 
---
 
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
 | 196 
 
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
   |  54 --
 Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h   
|  98 --
 
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
 |  53 --
 4 files changed, 401 deletions(-)

diff --git 
a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
 
b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
deleted file mode 100644
index 7ee7ffab5001..
--- 
a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
+++ /dev/null
@@ -1,196 +0,0 @@
-/** @file
-  Wrap EFI_SPI_PROTOCOL to provide some library level interfaces
-  for module use.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-
-PCH_SPI_PROTOCOL   *mSpiProtocol;
-
-//
-// FlashAreaBaseAddress and Size for boottime and runtime usage.
-//
-UINTN mFlashAreaBaseAddress = 0;
-UINTN mFlashAreaSize= 0;
-
-/**
-  Enable block protection on the Serial Flash device.
-
-  @retval EFI_SUCCESS   Opertion is successful.
-  @retval EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
-  VOID
-  )
-{
-  return EFI_SUCCESS;
-}
-
-/**
-  Read NumBytes bytes of data from the address specified by
-  PAddress into Buffer.
-
-  @param[in]  Address   The starting physical address of the read.
-  @param[in,out]  NumBytes  On input, the number of bytes to read. On 
output, the number
-of bytes actually read.
-  @param[out] BufferThe destination data buffer for the read.
-
-  @retval EFI_SUCCESS   Opertion is successful.
-  @retval EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
-  IN UINTNAddress,
-  IN OUT UINT32   *NumBytes,
- OUT UINT8*Buffer
-  )
-{
-  ASSERT ((NumBytes != NULL) && (Buffer != NULL));
-  if ((NumBytes == NULL) || (Buffer == NULL)) {
-return EFI_INVALID_PARAMETER;
-  }
-
-  //
-  // This function is implemented specifically for those platforms
-  // at which the SPI device is memory mapped for read. So this
-  // function just do a memory copy for Spi Flash Read.
-  //
-  CopyMem (Buffer, (VOID *) Address, *NumBytes);
-
-  return EFI_SUCCESS;
-}
-
-/**
-  Write NumBytes bytes of data from Buffer to the address specified by
-  PAddresss.
-
-  @param[in]  Address The starting physical address of the write.
-  @param[in,out]  NumBytesOn input, the number of bytes to write. On 
output,
-  the actual number of bytes written.
-  @param[in]  Buffer  The source data buffer for the write.
-
-  @retval EFI_SUCCESS   Opertion is successful.
-  @retval EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
-  IN UINTN  Address,
-  IN OUT UINT32 *NumBytes,
-  IN UINT8  *Buffer
-  )
-{
-  EFI_STATUSStatus;
-  UINTN Offset;
-  UINT32Length;
-  UINT32RemainingBytes;
-
-  ASSERT ((NumBytes != NULL) && (Buffer != NULL));
-  if ((NumBytes == NULL) || (Buffer == NULL)) {
-return EFI_INVALID_PARAMETER;
-  }
-
-  ASSERT (Address >= mFlashAreaBaseAddress);
-
-  Offset = Address - mFlashAreaBaseAddress;
-
-  ASSERT ((*NumBytes + Offset) <= mFlashAreaSize);
-
-  Status = EFI_SUCCESS;
-  RemainingBytes = *NumBytes;
-
-
-  while (RemainingBytes > 0) {
-if (RemainingBytes > SECTOR_SIZE_4KB) {
-  Length = SECTOR_SIZE_4KB;
-} else {
-  Length = RemainingBytes;
-}
-Status = mSpiProtocol->FlashWrite (
- mSpiProtocol,
- FlashRegionBios,
- (UINT32) Offset,
- Length,
- Buffer
- );
-if (EFI_ERROR (Status)) {
-  break;
-}
-RemainingBytes -= Length;
-Offset += Length;
-Buffer += Length;
-  }
-
-  //
-  // Actual number of bytes written
-  //
-  *NumBytes -= RemainingBytes;
-
-  return Status;
-}
-
-/**
-  Erase the block starting at Address.
-
-  @param[in]

[edk2-devel] [edk2-platforms][PATCH v2 21/35] KabylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates KabylakeOpenBoardPkg to use the SmmSpiFlashCommonLib
instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in
IntelSiliconPkg.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Jeremy Soller 
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc   | 7 +--
 Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf   | 2 +-
 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc | 7 +--
 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf | 2 +-
 4 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
index 302cb679b5eb..89be744a9038 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
@@ -228,7 +228,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER]
   ###
   # Silicon Initialization Package
   ###
-  
SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+  
SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
 
   ###
   # Platform Package
@@ -377,6 +377,10 @@ [Components.X64]
   IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf
   $(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
 
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
+  IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
   ###
   # Platform Package
   ###
@@ -393,7 +397,6 @@ [Components.X64]
 
 !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
 
-  $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
   $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
 
   $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf {
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
index 39432d21b8b5..239b6b720a6a 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
@@ -401,7 +401,7 @@ [FV.FvOsBootUncompact]
 !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
 INF  $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.inf
 INF  $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
-INF  $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF  IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
 
 INF  $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
 INF  $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc 
b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
index 8523ab3f4fc1..f29393579c06 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
@@ -268,7 +268,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER]
   ###
   # Silicon Initialization Package
   ###
-  
SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+  
SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
 
   ###
   # Platform Package
@@ -456,6 +456,10 @@ [Components.X64]
   IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf
   $(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
 
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
+  IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
   ###
   # Platform Package
   ###
@@ -472,7 +476,6 @@ [Components.X64]
 
 !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
 
-  $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
   $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
 
   $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf {
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf 
b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
index f003dda0ddfc..23f9be5cf2a2 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf
@@ -408,7 +408,7 @@ [FV.FvOsBootUncompact]
 !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
 INF  $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.inf
 INF

[edk2-devel] [edk2-platforms][PATCH v2 29/35] TigerlakeOpenBoardPkg: Remove SmmSpiFlashCommonLib

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

The library has been consolidated with instances in other Intel
silicon packages as a single instance in IntelSiliconPkg

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Heng Luo 
Signed-off-by: Michael Kubacki 
---
 
Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
 | 210 
 
Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
   |  58 --
 
Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
 |  49 -
 3 files changed, 317 deletions(-)

diff --git 
a/Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
 
b/Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
deleted file mode 100644
index f86896dd1ff5..
--- 
a/Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
+++ /dev/null
@@ -1,210 +0,0 @@
-/** @file
-  Wrap EFI_SPI_PROTOCOL to provide some library level interfaces
-  for module use.
-
-  Copyright (c) 2021, Intel Corporation. All rights reserved.
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include 
-#include 
-#include 
-
-PCH_SPI_PROTOCOL   *mSpiProtocol;
-
-//
-// Variables for boottime and runtime usage.
-//
-UINTN mBiosAreaBaseAddress = 0;
-UINTN mBiosSize= 0;
-UINTN mBiosOffset  = 0;
-
-/**
-  Enable block protection on the Serial Flash device.
-
-  @retval EFI_SUCCESS   Opertion is successful.
-  @retval EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
-  VOID
-  )
-{
-  return EFI_SUCCESS;
-}
-
-/**
-  Read NumBytes bytes of data from the address specified by
-  PAddress into Buffer.
-
-  @param[in]  Address   The starting physical address of the read.
-  @param[in,out]  NumBytes  On input, the number of bytes to read. On 
output, the number
-of bytes actually read.
-  @param[out] BufferThe destination data buffer for the read.
-
-  @retval EFI_SUCCESS   Operation is successful.
-  @retval EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
-  IN UINTNAddress,
-  IN OUT UINT32   *NumBytes,
- OUT UINT8*Buffer
-  )
-{
-  ASSERT ((NumBytes != NULL) && (Buffer != NULL));
-  if ((NumBytes == NULL) || (Buffer == NULL)) {
-return EFI_INVALID_PARAMETER;
-  }
-
-  //
-  // This function is implemented specifically for those platforms
-  // at which the SPI device is memory mapped for read. So this
-  // function just do a memory copy for Spi Flash Read.
-  //
-  CopyMem (Buffer, (VOID *) Address, *NumBytes);
-
-  return EFI_SUCCESS;
-}
-
-/**
-  Write NumBytes bytes of data from Buffer to the address specified by
-  PAddresss.
-
-  @param[in]  Address The starting physical address of the write.
-  @param[in,out]  NumBytesOn input, the number of bytes to write. On 
output,
-  the actual number of bytes written.
-  @param[in]  Buffer  The source data buffer for the write.
-
-  @retval EFI_SUCCESSOperation is successful.
-  @retval EFI_DEVICE_ERROR   If there is any device errors.
-  @retval EFI_INVALID_PARAMETER  Invalid parameter.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
-  IN UINTN  Address,
-  IN OUT UINT32 *NumBytes,
-  IN UINT8  *Buffer
-  )
-{
-  EFI_STATUSStatus;
-  UINTN Offset;
-  UINT32Length;
-  UINT32RemainingBytes;
-
-  ASSERT ((NumBytes != NULL) && (Buffer != NULL));
-  if ((NumBytes == NULL) || (Buffer == NULL)) {
-return EFI_INVALID_PARAMETER;
-  }
-
-  ASSERT (Address >= mBiosAreaBaseAddress);
-  if (Address < mBiosAreaBaseAddress) {
-return EFI_INVALID_PARAMETER;
-  }
-
-  Offset = Address - mBiosAreaBaseAddress;
-
-  ASSERT ((*NumBytes + Offset) <= mBiosSize);
-  if ((*NumBytes + Offset) > mBiosSize) {
-return EFI_INVALID_PARAMETER;
-  }
-
-  Status = EFI_SUCCESS;
-  RemainingBytes = *NumBytes;
-
-
-  while (RemainingBytes > 0) {
-if (RemainingBytes > SECTOR_SIZE_4KB) {
-  Length = SECTOR_SIZE_4KB;
-} else {
-  Length = RemainingBytes;
-}
-Status = mSpiProtocol->FlashWrite (
- mSpiProtocol,
- FlashRegionBios,
- (UINT32) Offset,
- Length,
- Buffer
- );
-if (EFI_ERROR (Status)) {
-  break;
-}
-RemainingBytes -= Length;
-Offset += Length;
-Buffer += Length;
-  }
-
-  //
-  // Actual number of bytes written
-  //
-

[edk2-devel] [edk2-platforms][PATCH v2 31/35] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Add IntelSiliconPkg.dec

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

This library now uses gPchSpiPpiGuid from IntelSiliconPkg.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Signed-off-by: Michael Kubacki 
---
 
Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
 | 1 +
 1 file changed, 1 insertion(+)

diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
 
b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
index 31518fb40ba7..b959cd1f4612 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
@@ -32,6 +32,7 @@ [Packages]
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
   MinPlatformPkg/MinPlatformPkg.dec
+  IntelSiliconPkg/IntelSiliconPkg.dec
   KabylakeSiliconPkg/SiPkg.dec
   KabylakeOpenBoardPkg/OpenBoardPkg.dec
 
-- 
2.28.0.windows.1



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[edk2-devel] [edk2-platforms][PATCH v2 33/35] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

The following PPI and Protocols have moved to IntelSiliconPkg. The
remaining definitions in KabylakeSiliconPkg are removed and libs
modules that need to reference IntelSiliconPkg are updated.

1. gPchSpiProtocolGuid
2. gPchSmmSpiProtocolGuid
3. gPchSpiPpiGuid

Cc: Chasel Chiu 
Cc: Sai Chaganty 
Signed-off-by: Michael Kubacki 
Reviewed-by: Chasel Chiu 
---
 Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf |   3 +-
 Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h   |  26 --
 Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h  | 293 

 Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf |   1 +
 Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf   |   1 +
 Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec   |   3 -
 6 files changed, 4 insertions(+), 323 deletions(-)

diff --git a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf 
b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
index 52e3b6ceba3e..bd12fa691d40 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
@@ -46,6 +46,7 @@ [Sources]
 [Packages]
   MdePkg/MdePkg.dec
   UefiCpuPkg/UefiCpuPkg.dec
+  IntelSiliconPkg/IntelSiliconPkg.dec
   KabylakeSiliconPkg/SiPkg.dec
   SecurityPkg/SecurityPkg.dec
 
@@ -92,7 +93,7 @@ [Protocols]
   gEfiMpServiceProtocolGuid  ## CONSUMES
   gDxeSiPolicyProtocolGuid   ## CONSUMES
   gHstiPublishCompleteProtocolGuid   ## PRODUCES
-  
+
 [FixedPcd]
   gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1
   gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h 
b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h
deleted file mode 100644
index e11f82edcaea..
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/** @file
-  This file defines the PCH SPI PPI which implements the
-  Intel(R) PCH SPI Host Controller Compatibility Interface.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-#ifndef _PCH_SPI_PPI_H_
-#define _PCH_SPI_PPI_H_
-
-#include 
-
-//
-// Extern the GUID for PPI users.
-//
-extern EFI_GUID   gPchSpiPpiGuid;
-
-/**
-  Reuse the PCH_SPI_PROTOCOL definitions
-  This is possible becaues the PPI implementation does not rely on a 
PeiService pointer,
-  as it uses EDKII Glue Lib to do IO accesses
-**/
-typedef PCH_SPI_PROTOCOL PCH_SPI_PPI;
-
-#endif
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h 
b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h
deleted file mode 100644
index 8c66e5063fa9..
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h
+++ /dev/null
@@ -1,293 +0,0 @@
-/** @file
-  This file defines the PCH SPI Protocol which implements the
-  Intel(R) PCH SPI Host Controller Compatibility Interface.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-#ifndef _PCH_SPI_PROTOCOL_H_
-#define _PCH_SPI_PROTOCOL_H_
-
-//
-// Extern the GUID for protocol users.
-//
-extern EFI_GUID   gPchSpiProtocolGuid;
-extern EFI_GUID   gPchSmmSpiProtocolGuid;
-
-//
-// Forward reference for ANSI C compatibility
-//
-typedef struct _PCH_SPI_PROTOCOL  PCH_SPI_PROTOCOL;
-
-//
-// SPI protocol data structures and definitions
-//
-
-/**
-  Flash Region Type
-**/
-typedef enum {
-  FlashRegionDescriptor,
-  FlashRegionBios,
-  FlashRegionMe,
-  FlashRegionGbE,
-  FlashRegionPlatformData,
-  FlashRegionDer,
-  FlashRegionAll,
-  FlashRegionMax
-} FLASH_REGION_TYPE;
-
-//
-// Protocol member functions
-//
-
-/**
-  Read data from the flash part.
-
-  @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
-  @param[in] FlashRegionType  The Flash Region type for flash cycle which 
is listed in the Descriptor.
-  @param[in] Address  The Flash Linear Address must fall within a 
region for which BIOS has access permissions.
-  @param[in] ByteCountNumber of bytes in the data portion of the 
SPI cycle.
-  @param[out] Buffer  The Pointer to caller-allocated buffer 
containing the dada received.
-  It is the caller's responsibility to make 
sure Buffer is large enough for the total number of bytes read.
-
-  @retval EFI_SUCCESS Command succeed.
-  @retval EFI_INVALID_PARAMETER   The parameters specified are not valid.
-  @retval EFI_DEVICE_ERRORDevice error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ) (
-  IN PCH_SPI_PROTOCOL   *This,
-  IN FLASH_REGION_TYPE  FlashRegionType,
-  IN UINT32 Address,
-  IN UINT32

[edk2-devel] [edk2-platforms][PATCH v2 28/35] SimicsIch10Pkg: Remove SmmSpiFlashCommonLib

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

The library has been consolidated with instances in other Intel
silicon packages as a single instance in IntelSiliconPkg

Cc: Agyeman Prince 
Signed-off-by: Michael Kubacki 
---
 Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c 
| 194 
 
Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
   |  54 --
 Silicon/Intel/SimicsIch10Pkg/Include/Library/SpiFlashCommonLib.h   
|  98 --
 
Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
 |  50 -
 4 files changed, 396 deletions(-)

diff --git 
a/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c 
b/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
deleted file mode 100644
index 9e3461cbd600..
--- a/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
+++ /dev/null
@@ -1,194 +0,0 @@
-/** @file
-  Wrap EFI_SPI_PROTOCOL to provide some library level interfaces
-  for module use.
-
-  Copyright (c) 2019 Intel Corporation. All rights reserved. 
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include 
-#include 
-#include 
-#include 
-
-
-EFI_SPI_PROTOCOL   *mSpiProtocol;
-
-//
-// FlashAreaBaseAddress and Size for boottime and runtime usage.
-//
-UINTN mFlashAreaBaseAddress = 0;
-UINTN mFlashAreaSize= 0;
-
-/**
-  Enable block protection on the Serial Flash device.
-
-  @retval EFI_SUCCESS   Opertion is successful.
-  @retval EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashLock (
-  VOID
-  )
-{
-  return EFI_SUCCESS;
-}
-
-/**
-  Read NumBytes bytes of data from the address specified by
-  PAddress into Buffer.
-
-  @param[in]  Address   The starting physical address of the read.
-  @param[in,out]  NumBytes  On input, the number of bytes to read. On 
output, the number
-of bytes actually read.
-  @param[out] BufferThe destination data buffer for the read.
-
-  @retval EFI_SUCCESS   Opertion is successful.
-  @retval EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashRead (
-  IN UINTNAddress,
-  IN OUT UINT32   *NumBytes,
- OUT UINT8*Buffer
-  )
-{
-  ASSERT ((NumBytes != NULL) && (Buffer != NULL));
-  if ((NumBytes == NULL) || (Buffer == NULL)) {
-return EFI_INVALID_PARAMETER;
-  }
-
-  //
-  // This function is implemented specifically for those platforms
-  // at which the SPI device is memory mapped for read. So this
-  // function just do a memory copy for Spi Flash Read.
-  //
-  CopyMem (Buffer, (VOID *) Address, *NumBytes);
-
-  return EFI_SUCCESS;
-}
-
-/**
-  Write NumBytes bytes of data from Buffer to the address specified by
-  PAddresss.
-
-  @param[in]  Address The starting physical address of the write.
-  @param[in,out]  NumBytesOn input, the number of bytes to write. On 
output,
-  the actual number of bytes written.
-  @param[in]  Buffer  The source data buffer for the write.
-
-  @retval EFI_SUCCESS   Opertion is successful.
-  @retval EFI_DEVICE_ERROR  If there is any device errors.
-
-**/
-EFI_STATUS
-EFIAPI
-SpiFlashWrite (
-  IN UINTN  Address,
-  IN OUT UINT32 *NumBytes,
-  IN UINT8  *Buffer
-  )
-{
-  EFI_STATUSStatus;
-  UINTN Offset;
-  UINT32Length;
-  UINT32RemainingBytes;
-
-  ASSERT ((NumBytes != NULL) && (Buffer != NULL));
-  if ((NumBytes == NULL) || (Buffer == NULL)) {
-return EFI_INVALID_PARAMETER;
-  }
-
-  ASSERT (Address >= mFlashAreaBaseAddress);
-
-  Offset = Address - mFlashAreaBaseAddress;
-
-  ASSERT ((*NumBytes + Offset) <= mFlashAreaSize);
-
-  Status = EFI_SUCCESS;
-  RemainingBytes = *NumBytes;
-
-
-  while (RemainingBytes > 0) {
-if (RemainingBytes > SECTOR_SIZE_4KB) {
-  Length = SECTOR_SIZE_4KB;
-} else {
-  Length = RemainingBytes;
-}
-Status = mSpiProtocol->FlashWrite (
- mSpiProtocol,
- FlashRegionBios,
- (UINT32) Offset,
- Length,
- Buffer
- );
-if (EFI_ERROR (Status)) {
-  break;
-}
-RemainingBytes -= Length;
-Offset += Length;
-Buffer += Length;
-  }
-
-  //
-  // Actual number of bytes written
-  //
-  *NumBytes -= RemainingBytes;
-
-  return Status;
-}
-
-/**
-  Erase the block starting at Address.
-
-  @param[in]  Address The starting physical address of the block to be 
erased.
-

[edk2-devel] [edk2-platforms][PATCH v2 23/35] TigerlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates TigerlakeOpenBoardPkg to use the SmmSpiFlashCommonLib
instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in
IntelSiliconPkg.

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Heng Luo 
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc | 7 +--
 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf | 2 +-
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git 
a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc 
b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
index 1adf63403450..758b966fee81 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc
@@ -173,7 +173,7 @@ [LibraryClasses.X64]
   !include $(PLATFORM_SI_PACKAGE)/SiPkgDxeLib.dsc
 
 [LibraryClasses.X64.DXE_SMM_DRIVER]
-  
SpiFlashCommonLib|$(PLATFORM_BOARD_PACKAGE)/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+  
SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
 !if $(TARGET) == DEBUG
   
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/SmmTestPointCheckLib.inf
 !endif
@@ -297,6 +297,10 @@ [Components.X64]
   !include $(PLATFORM_SI_PACKAGE)/SiPkgDxe.dsc
   $(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
 
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
+  IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
   #
   # SmmAccess
   #
@@ -326,7 +330,6 @@ [Components.X64]
   NULL|$(PROJECT)/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.inf
   }
 
-  $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
   $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
 
   UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf {
diff --git 
a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf 
b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
index e3b2f048524c..b802c2167d06 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
@@ -434,7 +434,7 @@ [FV.FvOsBootUncompact]
 !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
 INF  $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.inf
 INF  $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
-INF  $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF  IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
 
 INF  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
 INF  $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
-- 
2.28.0.windows.1



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[edk2-devel] [edk2-platforms][PATCH v2 25/35] MinPlatformPkg: Remove SpiFvbService modules

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

SpiFvbServiceSmm and SpiFvbServiceStandaloneMm have moved to
IntelSiliconPkg.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Liming Gao 
Cc: Eric Dong 
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c
 |  94 --
 Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.c
 | 903 
 Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.c
 | 271 --
 Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c  
 |  32 -
 Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c 
 |  32 -
 Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.h
 | 158 
 Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.h
 |  22 -
 Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf 
 |  68 --
 
Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf 
|  67 --
 Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc   
 |   2 -
 10 files changed, 1649 deletions(-)

diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c 
b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c
deleted file mode 100644
index 7f2678fa9e5a..
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/**@file
-  Defines data structure that is the volume header found.
-  These data is intent to decouple FVB driver with FV header.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "SpiFvbServiceCommon.h"
-
-#define FIRMWARE_BLOCK_SIZE 0x1
-#define FVB_MEDIA_BLOCK_SIZEFIRMWARE_BLOCK_SIZE
-
-#define NV_STORAGE_BASE_ADDRESS 
FixedPcdGet32(PcdFlashNvStorageVariableBase)
-#define SYSTEM_NV_BLOCK_NUM 
((FixedPcdGet32(PcdFlashNvStorageVariableSize)+ 
FixedPcdGet32(PcdFlashNvStorageFtwWorkingSize) + 
FixedPcdGet32(PcdFlashNvStorageFtwSpareSize))/ FVB_MEDIA_BLOCK_SIZE)
-
-typedef struct {
-  EFI_PHYSICAL_ADDRESSBaseAddress;
-  EFI_FIRMWARE_VOLUME_HEADER  FvbInfo;
-  EFI_FV_BLOCK_MAP_ENTRY  End[1];
-} EFI_FVB2_MEDIA_INFO;
-
-//
-// This data structure contains a template of all correct FV headers, which is 
used to restore
-// Fv header if it's corrupted.
-//
-EFI_FVB2_MEDIA_INFO mPlatformFvbMediaInfo[] = {
-  //
-  // Systen NvStorage FVB
-  //
-  {
-NV_STORAGE_BASE_ADDRESS,
-{
-  {0,}, //ZeroVector[16]
-  EFI_SYSTEM_NV_DATA_FV_GUID,
-  FVB_MEDIA_BLOCK_SIZE * SYSTEM_NV_BLOCK_NUM,
-  EFI_FVH_SIGNATURE,
-  0x0004feff, // check MdePkg/Include/Pi/PiFirmwareVolume.h for details on 
EFI_FVB_ATTRIBUTES_2
-  sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENTRY),
-  0,//CheckSum which will be calucated dynamically.
-  0,//ExtHeaderOffset
-  {0,}, //Reserved[1]
-  2,//Revision
-  {
-{
-  SYSTEM_NV_BLOCK_NUM,
-  FVB_MEDIA_BLOCK_SIZE,
-}
-  }
-},
-{
-  {
-0,
-0
-  }
-}
-  }
-};
-
-EFI_STATUS
-GetFvbInfo (
-  IN  EFI_PHYSICAL_ADDRESS FvBaseAddress,
-  OUT EFI_FIRMWARE_VOLUME_HEADER   **FvbInfo
-  )
-{
-  UINTN   Index;
-  EFI_FIRMWARE_VOLUME_HEADER  *FvHeader;
-
-  for (Index = 0; Index < sizeof (mPlatformFvbMediaInfo) / sizeof 
(EFI_FVB2_MEDIA_INFO); Index++) {
-if (mPlatformFvbMediaInfo[Index].BaseAddress == FvBaseAddress) {
-  FvHeader = [Index].FvbInfo;
-
-  //
-  // Update the checksum value of FV header.
-  //
-  FvHeader->Checksum = CalculateCheckSum16 ( (UINT16 *) FvHeader, 
FvHeader->HeaderLength);
-
-  *FvbInfo = FvHeader;
-
-  DEBUG ((DEBUG_INFO, "BaseAddr: 0x%lx \n", FvBaseAddress));
-  DEBUG ((DEBUG_INFO, "FvLength: 0x%lx \n", (*FvbInfo)->FvLength));
-  DEBUG ((DEBUG_INFO, "HeaderLength: 0x%x \n", (*FvbInfo)->HeaderLength));
-  DEBUG ((DEBUG_INFO, "Header Checksum: 0x%X\n", (*FvbInfo)->Checksum));
-  DEBUG ((DEBUG_INFO, "FvBlockMap[0].NumBlocks: 0x%x \n", 
(*FvbInfo)->BlockMap[0].NumBlocks));
-  DEBUG ((DEBUG_INFO, "FvBlockMap[0].BlockLength: 0x%x \n", 
(*FvbInfo)->BlockMap[0].Length));
-  DEBUG ((DEBUG_INFO, "FvBlockMap[1].NumBlocks: 0x%x \n", 
(*FvbInfo)->BlockMap[1].NumBlocks));
-  DEBUG ((DEBUG_INFO, "FvBlockMap[1].BlockLength: 0x%x \n\n", 
(*FvbInfo)->BlockMap[1].Length));
-
-  return EFI_SUCCESS;
-}
-  }
-  return EFI_NOT_FOUND;
-}
diff --git 
a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.c 
b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.c
deleted file mode 100644
index 113c749d04ff..
--- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.c
+++ /dev/null
@@ -1,903

[edk2-devel] [edk2-platforms][PATCH v2 24/35] WhiskeylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates WhiskeylakeOpenBoardPkg to use the SmmSpiFlashCommonLib
instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in
IntelSiliconPkg.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc| 7 
+--
 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf| 2 +-
 Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc | 7 
+--
 Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf | 2 +-
 4 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc 
b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
index ee2aedd978e0..e9c1751df9ba 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc
@@ -254,7 +254,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER]
   ###
   # Silicon Initialization Package
   ###
-  
SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+  
SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
 
   ###
   # Platform Package
@@ -395,6 +395,10 @@ [Components.X64]
   $(PLATFORM_SI_PACKAGE)/SystemAgent/SaInit/Dxe/SaInitDxe.inf
   $(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
 
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
+  IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
   ###
   # Platform Package
   ###
@@ -415,7 +419,6 @@ [Components.X64]
 
 !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
 
-  $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
   $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
 
   $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf {
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf 
b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
index 8aea5aa475a0..ae0ba27c1f34 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf
@@ -413,7 +413,7 @@ [FV.FvOsBootUncompact]
 !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
 INF  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
 INF  $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
-INF  $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF  IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
 
 INF  $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf
 INF  $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf
diff --git 
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc 
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
index b69cc8deb0a0..e3cf99639620 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
@@ -254,7 +254,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER]
   ###
   # Silicon Initialization Package
   ###
-  
SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+  
SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
 
   ###
   # Platform Package
@@ -401,6 +401,10 @@ [Components.X64]
   $(PLATFORM_SI_PACKAGE)/SystemAgent/SaInit/Dxe/SaInitDxe.inf
   $(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf
 
+!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
+  IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+!endif
+
   ###
   # Platform Package
   ###
@@ -421,7 +425,6 @@ [Components.X64]
 
 !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
 
-  $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
   $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
 
   $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf {
diff --git 
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf 
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf
index f0601984338c..414780eb05f1 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf
@@ -407,7 +407,7 @@ [FV.FvOsBootUncompact]
 !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
 INF  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
 INF

[edk2-devel] [edk2-platforms][PATCH v2 19/35] TigerlakeSiliconPkg: Use IntelSiliconPkg BIOS are and ucode PCDs

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Removes the PCDs from SiPkg.dec since they are defined in
IntelSiliconPkg.dec.

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Heng Luo 
Signed-off-by: Michael Kubacki 
---
 Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec | 5 -
 1 file changed, 5 deletions(-)

diff --git a/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec 
b/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec
index 0c0f2db1048d..37f61cc5ee18 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec
@@ -837,15 +837,10 @@ [PcdsFixedAtBuild]
 ## NOTE: The size restriction may be changed in next generation processor.
 ## Please refer to Processor BWG for detail.
 ##
-gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress|0xFF80|UINT32|0x1001
-gSiPkgTokenSpaceGuid.PcdBiosSize|0x0080|UINT32|0x1002
 gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xfef0|UINT32|0x00010028
 gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x2000|UINT32|0x00010029
 gSiPkgTokenSpaceGuid.PcdTopMemoryCacheSize|0x0|UINT32|0x0001002A
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|0xFFE6|UINT32|0x3004
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize|0x000A|UINT32|0x3005
 gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset|0x0060|UINT32|0x3013
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|0x0066|UINT32|0x3006
 ##
 ## The CPU Trace Hub's BARs base and size
 ##
-- 
2.28.0.windows.1



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[edk2-devel] [edk2-platforms][PATCH v2 22/35] SimicsOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates SimicsOpenBoardPkg to use the SmmSpiFlashCommonLib
instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in
IntelSiliconPkg.

Cc: Agyeman Prince 
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc | 6 ++
 Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf | 2 +-
 2 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc 
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
index 93a7d1df55ae..a3c54a19739c 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
@@ -169,7 +169,7 @@ [LibraryClasses.common.DXE_SMM_DRIVER]
   ###
   # Silicon Initialization Package
   ###
-  
SpiFlashCommonLib|$(PCH_PKG)/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+  
SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
 
 ###
 # PEI Components
@@ -288,6 +288,7 @@ [Components.X64]
   $(PCH_PKG)/SmmControl/RuntimeDxe/SmmControl2Dxe.inf
   $(PCH_PKG)/Spi/Smm/PchSpiSmm.inf
   $(SKT_PKG)/Smm/Access/SmmAccess2Dxe.inf
+  IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
 !endif
 
   #
@@ -295,9 +296,6 @@ [Components.X64]
   #
   $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitDxe/PlatformInitDxe.inf
   $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf
-!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
-  $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf
-!endif
 
   ###
   # Board Package
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf 
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
index 99bf60777553..1719513d3ac2 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
@@ -210,7 +210,7 @@ [FV.DXEFV]
 
 INF  MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
 INF  MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
-INF  MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf
+INF  IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf
 INF  MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
 INF  BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
 INF  BoardModulePkg/BoardBdsHookDxe/BoardBdsHookDxe.inf
-- 
2.28.0.windows.1



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[edk2-devel] [edk2-platforms][PATCH v2 18/35] SimicsIch10Pkg: Use IntelSiliconPkg BIOS area and ucode PCDs

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.

The previous PCDs are removed from Ich10Pkg.dec.

Cc: Agyeman Prince 
Signed-off-by: Michael Kubacki 
---
 Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
 | 2 +-
 Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec  
 | 6 --
 
Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
 | 5 +++--
 3 files changed, 4 insertions(+), 9 deletions(-)

diff --git 
a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c 
b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
index 3e7dffedfbe9..f2907ef53bfc 100644
--- 
a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
+++ 
b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
@@ -69,7 +69,7 @@ SpiProtocolConstructor (
 SpiInstance->WritePermission));
 
   //
-  SpiInstance->TotalFlashSize = PcdGet32(PcdFlashAreaSize);
+  SpiInstance->TotalFlashSize = PcdGet32 (PcdBiosSize);
   DEBUG ((DEBUG_INFO, "Total Flash Size : %0x\n", 
SpiInstance->TotalFlashSize));
   return EFI_SUCCESS;
 }
diff --git a/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec 
b/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec
index 0eb2e5530c3a..8d395a8b4370 100644
--- a/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec
+++ b/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec
@@ -16,11 +16,5 @@ [Includes]
 
 [Ppis]
 
-[Guids]
-  gEfiPchTokenSpaceGuid = { 0x89a1b278, 0xa1a1, 0x4df7, { 0xb1, 0x37, 0xde, 
0x5a, 0xd7, 0xc4, 0x79, 0x13 } }
 [Protocols]
   gEfiSmmSpiProtocolGuid = {0xbd75fe35, 0xfdce, 0x49d7, {0xa9, 0xdd, 0xb2, 
0x6f, 0x1f, 0xc6, 0xb4, 0x37}}
-
-[PcdsFixedAtBuild]
-  gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFFE0|UINT32|0x1001
-  gEfiPchTokenSpaceGuid.PcdFlashAreaSize|0x0020|UINT32|0x1002
\ No newline at end of file
diff --git 
a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
 
b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
index df1da274a642..b5aa13c1c56d 100644
--- 
a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
+++ 
b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
@@ -20,6 +20,7 @@ [Sources]
 
 [Packages]
   MdePkg/MdePkg.dec
+  IntelSiliconPkg/IntelSiliconPkg.dec
   SimicsIch10Pkg/Ich10Pkg.dec
 
 [LibraryClasses]
@@ -27,5 +28,5 @@ [LibraryClasses]
   DebugLib
 
 [Pcd]
-  gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress  ## CONSUMES
-  gEfiPchTokenSpaceGuid.PcdFlashAreaSize ## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress   ## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize  ## CONSUMES
-- 
2.28.0.windows.1



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[edk2-devel] [edk2-platforms][PATCH v2 16/35] CoffeelakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.

The previous PCDs are removed from CoffeelakeSiliconPkg.dec.

Cc: Chasel Chiu 
Cc: Sai Chaganty 
Signed-off-by: Michael Kubacki 
---
 
Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf
 | 4 ++--
 Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec   
| 5 -
 2 files changed, 2 insertions(+), 7 deletions(-)

diff --git 
a/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf
 
b/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf
index f793432bf049..ca57b5b31e0a 100644
--- 
a/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf
+++ 
b/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf
@@ -48,8 +48,8 @@ [Ppis]
 gSiPreMemPolicyPpiGuid  ## CONSUMES
 
 [FixedPcd]
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
 
 [Pcd]
 gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode  ## Produces
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec 
b/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec
index 6cf894498d6b..5ea6fbb28411 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec
@@ -474,13 +474,8 @@ [PcdsFixedAtBuild]
 ## NOTE: The size restriction may be changed in next generation processor.
 ## Please refer to Processor BWG for detail.
 ##
-gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress|0xFF80|UINT32|0x1001
-gSiPkgTokenSpaceGuid.PcdBiosSize|0x0080|UINT32|0x1002
 gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xfef0|UINT32|0x00010028
 gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x2000|UINT32|0x00010029
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|0xFFE6|UINT32|0x3004
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize|0x000A|UINT32|0x3005
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|0x0066|UINT32|0x3006
 
 ##
 ## PcdEfiGcdAllocateType is using for EFI_GCD_ALLOCATE_TYPE selection
-- 
2.28.0.windows.1



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[edk2-devel] [edk2-platforms][PATCH v2 15/35] WhiskeylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf   
 |  4 +--
 Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf  
 |  4 +--
 
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclude.fdf 
|  4 +--
 
Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
 |  2 +-
 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf   
 | 36 ++--
 
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/FlashMapInclude.fdf
  |  4 +--
 Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf
 | 36 ++--
 7 files changed, 45 insertions(+), 45 deletions(-)

diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf 
b/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
index a9687d93dee1..0a807ad84f4d 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -36,8 +36,8 @@ [Packages]
   MinPlatformPkg/MinPlatformPkg.dec
 
 [Pcd]
-  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase## CONSUMES
-  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase## 
CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize## 
CONSUMES
 
 [Sources]
   BiosInfo.c
diff --git 
a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf 
b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf
index 3233375d6568..537d507ed7d6 100644
--- 
a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf
+++ 
b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf
@@ -47,8 +47,8 @@ [Packages]
 
 [Pcd]
   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## 
CONSUMES
-  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase  ## 
CONSUMES
-  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize  ## 
CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase## 
CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize## 
CONSUMES
   gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdIntelGopEnable
   gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdPlatformFlavor
   gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdPlatformType
diff --git 
a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclude.fdf
 
b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclude.fdf
index f7aa730ae7d2..5895eebc5a79 100644
--- 
a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclude.fdf
+++ 
b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclude.fdf
@@ -38,8 +38,8 @@
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize  = 
0x0017  #
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset  = 
0x0049  # Flash addr (0xFFDE)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize= 
0x0007  #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset  = 
0x0050  # Flash addr (0xFFE5)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize= 
0x0005  #
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset= 
0x0050  # Flash addr (0xFFE5)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize  = 
0x0005  #
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset  = 
0x0055  # Flash addr (0xFFEA)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize= 
0x000EA000  #
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset  = 
0x0063A000  # Flash addr (0xFFF8A000)
diff --git 
a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
 
b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
index 2903bdacaebd..091d2118c7b3 100644
--- 
a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
+++ 
b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
@@ -293,7 +293,7 @@ [Pcd]
   gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize
   gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize
   gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize
-

[edk2-devel] [edk2-platforms][PATCH v2 17/35] KabylakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.

Cc: Chasel Chiu 
Cc: Sai Chaganty 
Signed-off-by: Michael Kubacki 
---
 
Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf
 |  4 ++--
 Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec 
  | 10 +++---
 2 files changed, 5 insertions(+), 9 deletions(-)

diff --git 
a/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf
 
b/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf
index d3b4d9e318b8..3ca373a23c0a 100644
--- 
a/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf
+++ 
b/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyLib.inf
@@ -45,8 +45,8 @@ [Ppis]
 gSiPolicyPpiGuid ## CONSUMES
 
 [FixedPcd]
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
+gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
 
 [Pcd]
 gSiPkgTokenSpaceGuid.PcdSmmbaseSwSmi
diff --git a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec 
b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
index 3881671757a3..5ff7b39ca60e 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
@@ -63,7 +63,7 @@ [Guids]
 gEfiCapsuleVendorGuid  =  {0x711c703f, 0xc285, 0x4b10, {0xa3, 0xb0, 
0x36, 0xec, 0xbd, 0x3c, 0x8b, 0xe2}}
 gEfiConsoleOutDeviceGuid   =  {0xd3b36f2c, 0xd551, 0x11d4, {0x9a, 0x46, 
0x0,  0x90, 0x27, 0x3f, 0xc1, 0x4d}}
 ##
-## 
+##
 ##
 gSmbiosProcessorInfoHobGuid =  {0xe6d73d92, 0xff56, 0x4146, {0xaf, 0xac, 0x1c, 
0x18, 0x81, 0x7d, 0x68, 0x71}}
 gSmbiosCacheInfoHobGuid =  {0xd805b74e, 0x1460, 0x4755, {0xbb, 0x36, 0x1e, 
0x8c, 0x8a, 0xd6, 0x78, 0xd7}}
@@ -264,7 +264,7 @@ [Protocols]
 ##
 gEfiSmmVariableProtocolGuid  =  {0xed32d533, 0x99e6, 0x4209, {0x9c, 0xc0, 
0x2d, 0x72, 0xcd, 0xd9, 0x98, 0xa7}}
 ##
-## 
+##
 ##
 gSmbiosProcessorInfoHobGuid=  {0xe6d73d92, 0xff56, 0x4146, {0xaf, 
0xac, 0x1c, 0x18, 0x81, 0x7d, 0x68, 0x71}}
 
@@ -453,13 +453,9 @@ [PcdsFixedAtBuild]
 ## NOTE: The size restriction may be changed in next generation processor.
 ## Please refer to Processor BWG for detail.
 ##
-gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF80|UINT32|0x1001
-gSiPkgTokenSpaceGuid.PcdFlashAreaSize|0x0080|UINT32|0x1002
 gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xfef0|UINT32|0x00010028
 gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x2000|UINT32|0x00010029
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|0xFFE6|UINT32|0x3004
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize|0x000A|UINT32|0x3005
-gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|0x0066|UINT32|0x3006
+
 ##
 ## PcdEfiGcdAllocateType is using for EFI_GCD_ALLOCATE_TYPE selection
 ## value of the struct
-- 
2.28.0.windows.1



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[edk2-devel] [edk2-platforms][PATCH v2 10/35] IntelSiliconPkg: Add MM SPI FVB services

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Adds a Traditional MM and Standalone MM SPI FVB Service driver to
IntelSiliconPkg. These drivers produce the firmware volume block
protocol for SPI flash devices compliant with the Intel Serial
Flash Interface Compatibility Specification.

Cc: Ray Ni 
Cc: Rangasai V Chaganty 
Signed-off-by: Michael Kubacki 
---
 Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c
 |  94 ++
 
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.c 
| 903 
 Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.c
 | 271 ++
 
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c
   |  32 +
 
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c
  |  32 +
 
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCommon.h 
| 158 
 Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.h
 |  22 +
 Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf 
 |  68 ++
 
Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf
 |  67 ++
 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc  
 |  11 +
 10 files changed, 1658 insertions(+)

diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c 
b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c
new file mode 100644
index ..7f2678fa9e5a
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c
@@ -0,0 +1,94 @@
+/**@file
+  Defines data structure that is the volume header found.
+  These data is intent to decouple FVB driver with FV header.
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SpiFvbServiceCommon.h"
+
+#define FIRMWARE_BLOCK_SIZE 0x1
+#define FVB_MEDIA_BLOCK_SIZEFIRMWARE_BLOCK_SIZE
+
+#define NV_STORAGE_BASE_ADDRESS 
FixedPcdGet32(PcdFlashNvStorageVariableBase)
+#define SYSTEM_NV_BLOCK_NUM 
((FixedPcdGet32(PcdFlashNvStorageVariableSize)+ 
FixedPcdGet32(PcdFlashNvStorageFtwWorkingSize) + 
FixedPcdGet32(PcdFlashNvStorageFtwSpareSize))/ FVB_MEDIA_BLOCK_SIZE)
+
+typedef struct {
+  EFI_PHYSICAL_ADDRESSBaseAddress;
+  EFI_FIRMWARE_VOLUME_HEADER  FvbInfo;
+  EFI_FV_BLOCK_MAP_ENTRY  End[1];
+} EFI_FVB2_MEDIA_INFO;
+
+//
+// This data structure contains a template of all correct FV headers, which is 
used to restore
+// Fv header if it's corrupted.
+//
+EFI_FVB2_MEDIA_INFO mPlatformFvbMediaInfo[] = {
+  //
+  // Systen NvStorage FVB
+  //
+  {
+NV_STORAGE_BASE_ADDRESS,
+{
+  {0,}, //ZeroVector[16]
+  EFI_SYSTEM_NV_DATA_FV_GUID,
+  FVB_MEDIA_BLOCK_SIZE * SYSTEM_NV_BLOCK_NUM,
+  EFI_FVH_SIGNATURE,
+  0x0004feff, // check MdePkg/Include/Pi/PiFirmwareVolume.h for details on 
EFI_FVB_ATTRIBUTES_2
+  sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENTRY),
+  0,//CheckSum which will be calucated dynamically.
+  0,//ExtHeaderOffset
+  {0,}, //Reserved[1]
+  2,//Revision
+  {
+{
+  SYSTEM_NV_BLOCK_NUM,
+  FVB_MEDIA_BLOCK_SIZE,
+}
+  }
+},
+{
+  {
+0,
+0
+  }
+}
+  }
+};
+
+EFI_STATUS
+GetFvbInfo (
+  IN  EFI_PHYSICAL_ADDRESS FvBaseAddress,
+  OUT EFI_FIRMWARE_VOLUME_HEADER   **FvbInfo
+  )
+{
+  UINTN   Index;
+  EFI_FIRMWARE_VOLUME_HEADER  *FvHeader;
+
+  for (Index = 0; Index < sizeof (mPlatformFvbMediaInfo) / sizeof 
(EFI_FVB2_MEDIA_INFO); Index++) {
+if (mPlatformFvbMediaInfo[Index].BaseAddress == FvBaseAddress) {
+  FvHeader = [Index].FvbInfo;
+
+  //
+  // Update the checksum value of FV header.
+  //
+  FvHeader->Checksum = CalculateCheckSum16 ( (UINT16 *) FvHeader, 
FvHeader->HeaderLength);
+
+  *FvbInfo = FvHeader;
+
+  DEBUG ((DEBUG_INFO, "BaseAddr: 0x%lx \n", FvBaseAddress));
+  DEBUG ((DEBUG_INFO, "FvLength: 0x%lx \n", (*FvbInfo)->FvLength));
+  DEBUG ((DEBUG_INFO, "HeaderLength: 0x%x \n", (*FvbInfo)->HeaderLength));
+  DEBUG ((DEBUG_INFO, "Header Checksum: 0x%X\n", (*FvbInfo)->Checksum));
+  DEBUG ((DEBUG_INFO, "FvBlockMap[0].NumBlocks: 0x%x \n", 
(*FvbInfo)->BlockMap[0].NumBlocks));
+  DEBUG ((DEBUG_INFO, "FvBlockMap[0].BlockLength: 0x%x \n", 
(*FvbInfo)->BlockMap[0].Length));
+  DEBUG ((DEBUG_INFO, "FvBlockMap[1].NumBlocks: 0x%x \n", 
(*FvbInfo)->BlockMap[1].NumBlocks));
+  DEBUG ((DEBUG_INFO, "FvBlockMap[1].BlockLength: 0x%x \n\n", 
(*FvbInfo)->BlockMap[1].Length));
+
+  return EFI_SUCCESS;
+}
+  }
+  return EFI_NOT_FOUND;
+}
diff --git

[edk2-devel] [edk2-platforms][PATCH v2 13/35] SimicsOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.

Cc: Agyeman Prince 
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc | 8 

 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git 
a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc 
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc
index 9c2436c3ad38..69a566307551 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc
@@ -45,10 +45,10 @@
 SET gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwSpareBase = 
gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwWorkingBase + 
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
 SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = 0x1
 
-SET gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress = 0xFFE0
-SET gEfiPchTokenSpaceGuid.PcdFlashAreaSize = 0x0020
+SET gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress = $(FW_BASE_ADDRESS)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize = $(FW_SIZE)
 
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = 
gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = 
gEfiPchTokenSpaceGuid.PcdFlashAreaSize
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = 
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = 
gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize
 
 DEFINE MEMFD_BASE_ADDRESS = 0x80
-- 
2.28.0.windows.1



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[edk2-devel] [edk2-platforms][PATCH v2 09/35] IntelSiliconPkg: Add SmmSpiFlashCommonLib

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Adds the SMM instance of SpiFlashCommonLib. The code is based on
refactoring existing library instances into a consolidated version
with no functional impact.

Cc: Ray Ni 
Cc: Rangasai V Chaganty 
Signed-off-by: Michael Kubacki 
---
 
Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c
   |  58 ++
 Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
 | 209 
 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc  
 |   5 +
 
Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
 |  48 +
 4 files changed, 320 insertions(+)

diff --git 
a/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c
 
b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c
new file mode 100644
index ..7941b8f8720c
--- /dev/null
+++ 
b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c
@@ -0,0 +1,58 @@
+/** @file
+  SMM Library instance of SPI Flash Common Library Class
+
+  Copyright (c) 2021, Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+#include 
+#include 
+
+extern PCH_SPI_PROTOCOL   *mSpiProtocol;
+
+extern UINTN mBiosAreaBaseAddress;
+extern UINTN mBiosSize;
+extern UINTN mBiosOffset;
+
+/**
+  The library constructuor.
+
+  The function does the necessary initialization work for this library
+  instance.
+
+  @param[in]  ImageHandle   The firmware allocated handle for the UEFI 
image.
+  @param[in]  SystemTable   A pointer to the EFI system table.
+
+  @retval EFI_SUCCESS   The function always return EFI_SUCCESS for now.
+It will ASSERT on error for debug version.
+  @retval EFI_ERROR Please reference LocateProtocol for error code 
details.
+**/
+EFI_STATUS
+EFIAPI
+SmmSpiFlashCommonLibConstructor (
+  IN EFI_HANDLEImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
+  )
+{
+  EFI_STATUS Status;
+  UINT32 BaseAddr;
+  UINT32 RegionSize;
+
+  mBiosAreaBaseAddress = (UINTN)PcdGet32 (PcdBiosAreaBaseAddress);
+  mBiosSize= (UINTN)PcdGet32 (PcdBiosSize);
+
+  //
+  // Locate the SMM SPI protocol.
+  //
+  Status = gSmst->SmmLocateProtocol (
+,
+NULL,
+(VOID **) 
+);
+  ASSERT_EFI_ERROR (Status);
+
+  mSpiProtocol->GetRegionAddress (mSpiProtocol, FlashRegionBios, , 
);
+  mBiosOffset = BaseAddr;
+  return Status;
+}
diff --git 
a/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c 
b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
new file mode 100644
index ..daebaf8e5e33
--- /dev/null
+++ 
b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
@@ -0,0 +1,209 @@
+/** @file
+  Wrap PCH_SPI_PROTOCOL to provide some library level interfaces
+  for module use.
+
+  Copyright (c) 2021, Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+#include 
+#include 
+
+PCH_SPI_PROTOCOL   *mSpiProtocol;
+
+//
+// Variables for boottime and runtime usage.
+//
+UINTN mBiosAreaBaseAddress = 0;
+UINTN mBiosSize= 0;
+UINTN mBiosOffset  = 0;
+
+/**
+  Enable block protection on the Serial Flash device.
+
+  @retval EFI_SUCCESS   Opertion is successful.
+  @retval EFI_DEVICE_ERROR  If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashLock (
+  VOID
+  )
+{
+  return EFI_SUCCESS;
+}
+
+/**
+  Read NumBytes bytes of data from the address specified by
+  PAddress into Buffer.
+
+  @param[in]  Address   The starting physical address of the read.
+  @param[in,out]  NumBytes  On input, the number of bytes to read. On 
output, the number
+of bytes actually read.
+  @param[out] BufferThe destination data buffer for the read.
+
+  @retval EFI_SUCCESS   Operation is successful.
+  @retval EFI_DEVICE_ERROR  If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashRead (
+  IN UINTNAddress,
+  IN OUT UINT32   *NumBytes,
+ OUT UINT8*Buffer
+  )
+{
+  ASSERT ((NumBytes != NULL) && (Buffer != NULL));
+  if ((NumBytes == NULL) || (Buffer == NULL)) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  //
+  // This function is implemented specifically for those platforms
+  // at which the SPI device is memory mapped for read. So this
+  // function just do a memory copy for Spi Flash Read.
+  //
+  CopyMem (Buffer, (VOID *) Address, *NumBytes);
+
+  return EFI_SUCCESS;
+}
+
+/**
+  Write NumBytes bytes of data from Buffer to the address specified by
+  PAddresss.
+
+  @param[in]

[edk2-devel] [edk2-platforms][PATCH v2 14/35] TigerlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Heng Luo 
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf 
|  8 ++---
 
Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf
 |  4 +--
 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
| 38 ++--
 3 files changed, 25 insertions(+), 25 deletions(-)

diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf 
b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
index 66c8814c97bb..56da991ab544 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -39,8 +39,8 @@ [Packages]
   BoardModulePkg/BoardModulePkg.dec
 
 [Pcd]
-  gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES
-  gSiPkgTokenSpaceGuid.PcdBiosSize## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress   ## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize  ## CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase## CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize## CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase  ## CONSUMES
@@ -61,8 +61,8 @@ [Pcd]
   gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize## CONSUMES
   gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase  ## CONSUMES
   gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize  ## CONSUMES
-  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase## CONSUMES
-  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase  ## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize  ## CONSUMES
   gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase## CONSUMES
   gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize## CONSUMES
   gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase## CONSUMES
diff --git 
a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf
 
b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf
index b21ae6401f12..24e2a963ba64 100644
--- 
a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf
+++ 
b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf
@@ -37,8 +37,8 @@
 ## Build script checks the requirement.
 SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset   = 
0x0080  # Flash addr (0xFFC0)
 SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize = 
0x0008  # Keep 0x8 or larger
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset= 
0x0088  # Flash addr (0xFFC8)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize  = 
0x0007  # Keep 0x7 or larger, change MicrocodeFv.fdf in case that this 
value change
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset  = 
0x0088  # Flash addr (0xFFC8)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize= 
0x0007  # Keep 0x7 or larger, change MicrocodeFv.fdf in case that this 
value change
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset  = 
0x008F  # Flash addr (0xFFC0)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize= 
0x0008  #
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset= 
0x0097  # Flash addr (0xFFD7)
diff --git 
a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf 
b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
index c1fd2be6af54..e3b2f048524c 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf
@@ -29,8 +29,8 @@ [FD.TigerlakeURvp]
 # assigned with PCD values. Instead, it uses the definitions for its variety, 
which
 # are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
 #
-BaseAddress   = $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress  
#The base address of the FLASH Device.
-Size  = $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize 
#The size in bytes of the FLASH Device
+BaseAddress   = $(FLASH_BASE) | 
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress  #The base address of the 
FLASH Device.
+Size  = $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize 
#The size in bytes of the FLASH Device
 ErasePolarity = 1
 BlockSize

[edk2-devel] [edk2-platforms][PATCH v2 12/35] KabylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Jeremy Soller 
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf  
 |  4 +--
 Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapInclude.fdf 
 |  4 +--
 Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
 | 38 ++--
 
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashMapInclude.fdf
|  4 +--
 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf  
 | 38 ++--
 
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
 |  4 +--
 6 files changed, 46 insertions(+), 46 deletions(-)

diff --git a/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf 
b/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
index e5e40144a68a..6607ea6edfc3 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -36,8 +36,8 @@ [Packages]
   MinPlatformPkg/MinPlatformPkg.dec
 
 [Pcd]
-  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase## CONSUMES
-  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase## 
CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize## 
CONSUMES
 
 [Sources]
   BiosInfo.c
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapInclude.fdf
 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapInclude.fdf
index 6cb6d54f558f..ce809a277b6e 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapInclude.fdf
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapInclude.fdf
@@ -36,8 +36,8 @@
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize= 
0x0014  #
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset= 
0x002E  # Flash addr (0xFFD0)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize  = 
0x000B  #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset  = 
0x0039  # Flash addr (0xFFDB)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize= 
0x000A  #
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset= 
0x0039  # Flash addr (0xFFDB)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize  = 
0x000A  #
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset  = 
0x0043  # Flash addr (0xFFE5)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize= 
0x0006  #
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset  = 
0x0049  # Flash addr (0xFFEB)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
index bcd1ade72ba5..39432d21b8b5 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
@@ -29,8 +29,8 @@ [FD.GalagoPro3]
 # assigned with PCD values. Instead, it uses the definitions for its variety, 
which
 # are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
 #
-BaseAddress   = $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress   
   #The base address of the FLASH Device.
-Size  = $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdFlashAreaSize  
   #The size in bytes of the FLASH Device
+BaseAddress   = $(FLASH_BASE) | 
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress  #The base address of 
the FLASH Device.
+Size  = $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize 
#The size in bytes of the FLASH Device
 ErasePolarity = 1
 BlockSize = $(FLASH_BLOCK_SIZE)
 NumBlocks = $(FLASH_NUM_BLOCKS)
@@ -39,23 +39,23 @@ [FD.GalagoPro3]
 DEFINE SIPKG_PEI_BIN  = INF
 
 # Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because macro 
expression is not supported.
-# So, PlatformSecLib uses PcdFlashAreaBaseAddress + PcdNemCodeCacheBase to get 
the real CodeCache base address.
+# So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase to get 
the real CodeCache base address.
 SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase = 
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =

[edk2-devel] [edk2-platforms][PATCH v2 11/35] CometlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the
PCDs are declared in IntelSiliconPkg.dec.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Rangasai V Chaganty 
Cc: Deepika Kethi Reddy 
Cc: Kathappan Esakkithevar 
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf 
|  4 +--
 
Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInclude.fdf
 |  4 +--
 Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
| 36 ++--
 Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.inf
|  4 +--
 4 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf 
b/Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
index 9208aeda5d2a..6ca0ada751f6 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -36,8 +36,8 @@ [Packages]
   MinPlatformPkg/MinPlatformPkg.dec
 
 [Pcd]
-  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase## CONSUMES
-  gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase  ## CONSUMES
+  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize  ## CONSUMES
 
 [Sources]
   BiosInfo.c
diff --git 
a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInclude.fdf
 
b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInclude.fdf
index d9959a79d0bb..7d2f4b2c0cb2 100644
--- 
a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInclude.fdf
+++ 
b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInclude.fdf
@@ -34,8 +34,8 @@
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize= 
0x0019  #
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset= 
0x0032  # Flash addr (0xFFB2)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize  = 
0x0017  #
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset  = 
0x0049  # Flash addr (0xFFC9)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize= 
0x000B  #
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset= 
0x0049  # Flash addr (0xFFC9)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize  = 
0x000B  #
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset  = 
0x0054  # Flash addr (0xFFD4)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize= 
0x0007  #
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset  = 
0x005B  # Flash addr (0xFFDB)
diff --git 
a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf 
b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
index 795cc0da75d8..6397d80d3895 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf
@@ -31,8 +31,8 @@ [FD.CometlakeURvp]
 # assigned with PCD values. Instead, it uses the definitions for its variety, 
which
 # are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS.
 #
-BaseAddress   = $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
  #The base address of the FLASH Device.
-Size  = $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize 
#The size in bytes of the FLASH Device
+BaseAddress   = $(FLASH_BASE) | 
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress  #The base address of the 
FLASH Device.
+Size  = $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize 
#The size in bytes of the FLASH Device
 ErasePolarity = 1
 BlockSize = $(FLASH_BLOCK_SIZE)
 NumBlocks = $(FLASH_NUM_BLOCKS)
@@ -43,21 +43,21 @@ [FD.CometlakeURvp]
 # Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because macro 
expression is not supported.
 # So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase to get 
the real CodeCache base address.
 SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase = 
$(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = 
$(gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + 
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset)
-SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize)
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = 
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60
-SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = 
$(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =

[edk2-devel] [edk2-platforms][PATCH v2 07/35] IntelSiliconPkg: Add PCH SPI Protocol

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

These SPI Protocol definitions are intended to serve as the single
definitions for Intel platform and silicon packages.

1. gPchSpiProtocolGuid
2. gPchSmmSpiProtocolGuid

Cc: Ray Ni 
Cc: Rangasai V Chaganty 
Signed-off-by: Michael Kubacki 
---
 Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h | 301 
 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec|   5 +
 2 files changed, 306 insertions(+)

diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h 
b/Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h
new file mode 100644
index ..c13dc5a5f5f5
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h
@@ -0,0 +1,301 @@
+/** @file
+  This file defines the PCH SPI Protocol which implements the
+  Intel(R) PCH SPI Host Controller Compatibility Interface.
+
+  Copyright (c) 2021, Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _PCH_SPI_PROTOCOL_H_
+#define _PCH_SPI_PROTOCOL_H_
+
+//
+// Extern the GUID for protocol users.
+//
+extern EFI_GUID   gPchSpiProtocolGuid;
+extern EFI_GUID   gPchSmmSpiProtocolGuid;
+
+//
+// Forward reference for ANSI C compatibility
+//
+typedef struct _PCH_SPI_PROTOCOL  PCH_SPI_PROTOCOL;
+
+//
+// SPI protocol data structures and definitions
+//
+
+/**
+  Flash Region Type
+**/
+typedef enum {
+  FlashRegionDescriptor,
+  FlashRegionBios,
+  FlashRegionMe,
+  FlashRegionGbE,
+  FlashRegionPlatformData,
+  FlashRegionDer,
+  FlashRegionSecondaryBios,
+  FlashRegionuCodePatch,
+  FlashRegionEC,
+  FlashRegionDeviceExpansion2,
+  FlashRegionIE,
+  FlashRegion10Gbe_A,
+  FlashRegion10Gbe_B,
+  FlashRegion13,
+  FlashRegion14,
+  FlashRegion15,
+  FlashRegionAll,
+  FlashRegionMax
+} FLASH_REGION_TYPE;
+//
+// Protocol member functions
+//
+
+/**
+  Read data from the flash part.
+
+  @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+  @param[in] FlashRegionType  The Flash Region type for flash cycle which 
is listed in the Descriptor.
+  @param[in] Address  The Flash Linear Address must fall within a 
region for which BIOS has access permissions.
+  @param[in] ByteCountNumber of bytes in the data portion of the 
SPI cycle.
+  @param[out] Buffer  The Pointer to caller-allocated buffer 
containing the dada received.
+  It is the caller's responsibility to make 
sure Buffer is large enough for the total number of bytes read.
+
+  @retval EFI_SUCCESS Command succeed.
+  @retval EFI_INVALID_PARAMETER   The parameters specified are not valid.
+  @retval EFI_DEVICE_ERRORDevice error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_READ) (
+  IN PCH_SPI_PROTOCOL   *This,
+  IN FLASH_REGION_TYPE  FlashRegionType,
+  IN UINT32 Address,
+  IN UINT32 ByteCount,
+  OUTUINT8  *Buffer
+  );
+
+/**
+  Write data to the flash part. Remark: Erase may be needed before write to 
the flash part.
+
+  @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+  @param[in] FlashRegionType  The Flash Region type for flash cycle which 
is listed in the Descriptor.
+  @param[in] Address  The Flash Linear Address must fall within a 
region for which BIOS has access permissions.
+  @param[in] ByteCountNumber of bytes in the data portion of the 
SPI cycle.
+  @param[in] Buffer   Pointer to caller-allocated buffer 
containing the data sent during the SPI cycle.
+
+  @retval EFI_SUCCESS Command succeed.
+  @retval EFI_INVALID_PARAMETER   The parameters specified are not valid.
+  @retval EFI_DEVICE_ERRORDevice error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_WRITE) (
+  IN PCH_SPI_PROTOCOL   *This,
+  IN FLASH_REGION_TYPE  FlashRegionType,
+  IN UINT32 Address,
+  IN UINT32 ByteCount,
+  IN UINT8  *Buffer
+  );
+
+/**
+  Erase some area on the flash part.
+
+  @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+  @param[in] FlashRegionType  The Flash Region type for flash cycle which 
is listed in the Descriptor.
+  @param[in] Address  The Flash Linear Address must fall within a 
region for which BIOS has access permissions.
+  @param[in] ByteCountNumber of bytes in the data portion of the 
SPI cycle.
+
+  @retval EFI_SUCCESS Command succeed.
+  @retval EFI_INVALID_PARAMETER   The parameters specified are not valid.
+  @retval EFI_DEVICE_ERRORDevice error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_ERASE) (
+  IN PCH_SPI_PROTOCOL   *This,
+  IN FLASH_REGION_TYPE  FlashRegionType,
+  IN UINT32 Address,

[edk2-devel] [edk2-platforms][PATCH v2 03/35] CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Add missing GUID to INF

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

gEfiMemoryTypeInformationGuid is used in PeiSaPolicyUpdatePreMem.c
but not in the [Guids] section in PeiPolicyUpdateLib.inf.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Rangasai V Chaganty 
Cc: Deepika Kethi Reddy 
Cc: Kathappan Esakkithevar 
Signed-off-by: Michael Kubacki 
---
 
Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
 | 1 +
 1 file changed, 1 insertion(+)

diff --git 
a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
 
b/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
index fd51e2b8c40b..5213253f7313 100644
--- 
a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
+++ 
b/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
@@ -270,3 +270,4 @@ [Ppis]
 [Guids]
   gTianoLogoGuid## CONSUMES
   gSiConfigGuid ## CONSUMES
+  gEfiMemoryTypeInformationGuid ## PRODUCES
-- 
2.28.0.windows.1



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[edk2-devel] [edk2-platforms][PATCH v2 05/35] IntelSiliconPkg: Add microcode FV PCDs

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Adds the following PCDs to IntelSiliconPkg.dec to consolidate the
PCD to a single silicon declaration file. This allows libraries
modules in IntelSiliconPkg to be able to use this PCD.

  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase
  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
  gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset

Cc: Ray Ni 
Cc: Rangasai V Chaganty 
Signed-off-by: Michael Kubacki 
---
 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec 
b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index 097c4ca4d795..fb8391000347 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -91,6 +91,9 @@ [PcdsFeatureFlag]
 [PcdsFixedAtBuild]
   
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress|0xFF80|UINT32|0x0007
   gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize|0x0080|UINT32|0x0008
+  
gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|0xFFE6|UINT32|0x0009
+  
gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize|0x000A|UINT32|0x000A
+  
gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|0x0066|UINT32|0x000B
 
 [PcdsFixedAtBuild, PcdsPatchableInModule]
   ## Error code for VTd error.
-- 
2.28.0.windows.1



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[edk2-devel] [edk2-platforms][PATCH v2 08/35] IntelSiliconPkg: Add SpiFlashCommonLib

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Adds the SpiFlashCommonLib interface to IntelSiliconPkg. The initial
library instance added in this change is the NULL instance.

Cc: Ray Ni 
Cc: Rangasai V Chaganty 
Signed-off-by: Michael Kubacki 
---
 
Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c
   | 101 
 Silicon/Intel/IntelSiliconPkg/Include/Library/SpiFlashCommonLib.h  
   |  98 +++
 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec  
   |   4 +
 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc  
   |   1 +
 
Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf
 |  28 ++
 5 files changed, 232 insertions(+)

diff --git 
a/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c
 
b/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c
new file mode 100644
index ..c5f46829869c
--- /dev/null
+++ 
b/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.c
@@ -0,0 +1,101 @@
+/** @file
+  Null Library instance of SPI Flash Common Library Class
+
+Copyright (c) 2017, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+
+/**
+  Enable block protection on the Serial Flash device.
+
+  @retval EFI_SUCCESS   Operation is successful.
+  @retval EFI_DEVICE_ERROR  If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashLock (
+  VOID
+  )
+{
+  return EFI_SUCCESS;
+}
+
+/**
+  Read NumBytes bytes of data from the address specified by
+  PAddress into Buffer.
+
+  @param[in]  Address   The starting physical address of the read.
+  @param[in,out]  NumBytes  On input, the number of bytes to read. On 
output, the number
+of bytes actually read.
+  @param[out] BufferThe destination data buffer for the read.
+
+  @retval EFI_SUCCESS   Operation is successful.
+  @retval EFI_DEVICE_ERROR  If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashRead (
+  IN UINTNAddress,
+  IN OUT UINT32   *NumBytes,
+ OUT UINT8*Buffer
+  )
+{
+  ASSERT(FALSE);
+  return EFI_SUCCESS;
+}
+
+/**
+  Write NumBytes bytes of data from Buffer to the address specified by
+  PAddresss.
+
+  @param[in]  Address The starting physical address of the write.
+  @param[in,out]  NumBytesOn input, the number of bytes to write. On 
output,
+  the actual number of bytes written.
+  @param[in]  Buffer  The source data buffer for the write.
+
+  @retval EFI_SUCCESS   Operation is successful.
+  @retval EFI_DEVICE_ERROR  If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashWrite (
+  IN UINTN  Address,
+  IN OUT UINT32 *NumBytes,
+  IN UINT8  *Buffer
+  )
+{
+  ASSERT(FALSE);
+  return EFI_SUCCESS;
+}
+
+/**
+  Erase the block starting at Address.
+
+  @param[in]  Address The starting physical address of the block to be 
erased.
+  This library assume that caller guarantee that 
the PAddress
+  is at the starting address of this block.
+  @param[in]  NumBytesOn input, the number of bytes of the logical 
block to be erased.
+  On output, the actual number of bytes erased.
+
+  @retval EFI_SUCCESS.  Operation is successful.
+  @retval EFI_DEVICE_ERROR  If there is any device errors.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiFlashBlockErase (
+  INUINTN Address,
+  INUINTN *NumBytes
+  )
+{
+  ASSERT(FALSE);
+  return EFI_SUCCESS;
+}
diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Library/SpiFlashCommonLib.h 
b/Silicon/Intel/IntelSiliconPkg/Include/Library/SpiFlashCommonLib.h
new file mode 100644
index ..ef62ba238d71
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/Library/SpiFlashCommonLib.h
@@ -0,0 +1,98 @@
+/** @file
+  The header file includes the common header files, defines
+  internal structure and functions used by SpiFlashCommonLib.
+
+  Copyright (c) 2019 Intel Corporation. All rights reserved. 
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __SPI_FLASH_COMMON_LIB_H__
+#define __SPI_FLASH_COMMON_LIB_H__
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define SECTOR_SIZE_4KB   0x1000  // Common 4kBytes sector size
+/**
+  Enable block protection on the Serial Flash device.
+
+  @retval EFI_SUCCESS   Opertion is successful.
+  @retval EFI_DEVICE_ERROR  If there is any

[edk2-devel] [edk2-platforms][PATCH v2 06/35] IntelSiliconPkg: Add PCH SPI PPI

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

This SPI PPI definition is intended to serve as the single
definition for Intel platform and silicon packages.

Cc: Ray Ni 
Cc: Rangasai V Chaganty 
Signed-off-by: Michael Kubacki 
---
 Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h   | 25 
 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec |  3 +++
 2 files changed, 28 insertions(+)

diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h 
b/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h
new file mode 100644
index ..b2410bd17300
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h
@@ -0,0 +1,25 @@
+/** @file
+  This file defines the PCH SPI PPI which implements the
+  Intel(R) PCH SPI Host Controller Compatibility Interface.
+
+  Copyright (c) 2019, Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _PCH_SPI_PPI_H_
+#define _PCH_SPI_PPI_H_
+
+#include 
+
+//
+// Extern the GUID for PPI users.
+//
+extern EFI_GUID   gPchSpiPpiGuid;
+
+/**
+  Reuse the PCH_SPI_PROTOCOL definitions
+  This is possible becaues the PPI implementation does not rely on a 
PeiService pointer,
+  as it uses EDKII Glue Lib to do IO accesses
+**/
+typedef PCH_SPI_PROTOCOL PCH_SPI_PPI;
+
+#endif
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec 
b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index fb8391000347..70f030e3a295 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -71,6 +71,9 @@ [Guids]
   gEdkiiMicrocodeStorageTypeFlashGuid = { 0x2cba01b3, 0xd391, 0x4598, { 0x8d, 
0x89, 0xb7, 0xfc, 0x39, 0x22, 0xfd, 0x71 } }
 
 [Ppis]
+  ## Include/Ppi/Spi.h
+  gPchSpiPpiGuid = {0xdade7ce3, 0x6971, 0x4b75, {0x82, 0x5e, 0xe, 0xe0, 0xeb, 
0x17, 0x72, 0x2d}}
+
   gEdkiiVTdInfoPpiGuid = { 0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 0x67, 
0xaf, 0x2b, 0x25, 0x68, 0x4a } }
   gEdkiiVTdNullRootEntryTableGuid = { 0x3de0593f, 0x6e3e, 0x4542, { 0xa1, 
0xcb, 0xcb, 0xb2, 0xdb, 0xeb, 0xd8, 0xff } }
 
-- 
2.28.0.windows.1



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[edk2-devel] [edk2-platforms][PATCH v2 04/35] IntelSiliconPkg: Add BIOS area base address and size PCDs

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Adds the following PCDs to IntelSiliconPkg.dec to consolidate the
PCD to a single silicon declaration file. This allows libraries
and modules in IntelSiliconPkg to be able to use this PCD.

  gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress
  gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize

Cc: Ray Ni 
Cc: Rangasai V Chaganty 
Signed-off-by: Michael Kubacki 
---
 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 4 
 1 file changed, 4 insertions(+)

diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec 
b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index 2461ab8e06e7..097c4ca4d795 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -88,6 +88,10 @@ [PcdsFeatureFlag]
   # @Prompt Shadow all microcode update patches.
   gIntelSiliconPkgTokenSpaceGuid.PcdShadowAllMicrocode|FALSE|BOOLEAN|0x0006
 
+[PcdsFixedAtBuild]
+  
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress|0xFF80|UINT32|0x0007
+  gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize|0x0080|UINT32|0x0008
+
 [PcdsFixedAtBuild, PcdsPatchableInModule]
   ## Error code for VTd error.
   #  EDKII_ERROR_CODE_VTD_ERROR = (EFI_IO_BUS_UNSPECIFIED | (EFI_OEM_SPECIFIC 
| 0x)) = 0x02008000
-- 
2.28.0.windows.1



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[edk2-devel] [edk2-platforms][PATCH v2 02/35] WhiskeylakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Removes extra IntelSiliconPkg.dec entry in PeiPolicyUpdateLib.inf.

Cc: Ray Ni 
Cc: Rangasai V Chaganty 
Signed-off-by: Michael Kubacki 
---
 
Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
 | 1 -
 1 file changed, 1 deletion(-)

diff --git 
a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
 
b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
index 252f92f48736..b36dc2b4097c 100644
--- 
a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
+++ 
b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
@@ -52,7 +52,6 @@ [Packages]
   SecurityPkg/SecurityPkg.dec
   IntelSiliconPkg/IntelSiliconPkg.dec
   MinPlatformPkg/MinPlatformPkg.dec
-  IntelSiliconPkg/IntelSiliconPkg.dec
 
 [FixedPcd]
   gSiPkgTokenSpaceGuid.PcdTsegSize ## CONSUMES
-- 
2.28.0.windows.1



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[edk2-devel] [edk2-platforms][PATCH v2 00/35] Consolidate SpiFlashCommonLib instances

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

SpiFlashCommonLib is duplicated in multiple places across the MinPlatform
design in edk2-platforms. I'm planning to build some additional
functionality on top of SpiFlashCommonLib and, ideally, this duplication
will be consolidated into a single instance usable across all current library
consumers.

This patch series focuses on consolidating the various SpiFlashCommonLib
instances as agreed upon in https://edk2.groups.io/g/devel/message/71701.

Read the BZ for more general background around this series.

I only have an UpXtreme board on hand so maintainers/reviewers of other
board packages should test these changes on those boards.

V2 changes:
- Rebased patch series on current edk2-platforms master (32183bdaa91)

Note: Patch series only received a couple review comments after being
on the mailing list for over 1 month. Please be more prompt with v2.

Cc: Agyeman Prince 
Cc: Chasel Chiu 
Cc: Deepika Kethi Reddy 
Cc: Eric Dong 
Cc: Heng Luo 
Cc: Jeremy Soller 
Cc: Kathappan Esakkithevar 
Cc: Liming Gao 
Cc: Nate DeSimone 
Cc: Rangasai V Chaganty 
Signed-off-by: Michael Kubacki 

Michael Kubacki (35):
  CometlakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry
  WhiskeylakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry
  CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Add missing GUID to INF
  IntelSiliconPkg: Add BIOS area base address and size PCDs
  IntelSiliconPkg: Add microcode FV PCDs
  IntelSiliconPkg: Add PCH SPI PPI
  IntelSiliconPkg: Add PCH SPI Protocol
  IntelSiliconPkg: Add SpiFlashCommonLib
  IntelSiliconPkg: Add SmmSpiFlashCommonLib
  IntelSiliconPkg: Add MM SPI FVB services
  CometlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
  KabylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
  SimicsOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
  TigerlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
  WhiskeylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
  CoffeelakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
  KabylakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs
  SimicsIch10Pkg: Use IntelSiliconPkg BIOS area and ucode PCDs
  TigerlakeSiliconPkg: Use IntelSiliconPkg BIOS are and ucode PCDs
  CometlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
  KabylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
  SimicsOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
  TigerlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
  WhiskeylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib
  MinPlatformPkg: Remove SpiFvbService modules
  CoffeelakeSiliconPkg: Remove SmmSpiFlashCommonLib
  KabylakeSiliconPkg: Remove SmmSpiFlashCommonLib
  SimicsIch10Pkg: Remove SmmSpiFlashCommonLib
  TigerlakeOpenBoardPkg: Remove SmmSpiFlashCommonLib
  MinPlatformPkg: Remove SpiFlashCommonLibNull
  KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Add IntelSiliconPkg.dec
  CoffeelakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
  KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
  SimicsIch10Pkg: Remove PCH SPI SMM Protocol from package
  TigerlakeSiliconPkg: Remove PCH SPI PPI and Protocol from package

 
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c

  | 196 -
 
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c

|  54 
 {Platform/Intel/MinPlatformPkg => 
Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/FvbInfo.c
|   0
 {Platform/Intel/MinPlatformPkg => 
Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceCommon.c
|   4 +-
 {Platform/Intel/MinPlatformPkg => 
Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceMm.c
|   8 +-
 {Platform/Intel/MinPlatformPkg => 
Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.c
  |   0
 {Platform/Intel/MinPlatformPkg => 
Silicon/Intel/IntelSiliconPkg/Feature}/Flash/SpiFvbService/SpiFvbServiceTraditionalMm.c
 |   0
 
Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c
 => 
Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c
 |   0
 {Platform/Intel/TigerlakeOpenBoardPkg => 
Silicon/Intel/IntelSiliconPkg}/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
 |   3 +-
 {Platform/Intel/MinPlatformPkg/Flash

[edk2-devel] [edk2-platforms][PATCH v2 01/35] CometlakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry

2021-05-18 Thread Michael Kubacki 
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307

Removes extra IntelSiliconPkg.dec entry in PeiPolicyUpdateLib.inf.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Rangasai V Chaganty 
Cc: Deepika Kethi Reddy 
Cc: Kathappan Esakkithevar 
Signed-off-by: Michael Kubacki 
---
 
Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
 | 1 -
 1 file changed, 1 deletion(-)

diff --git 
a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
 
b/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
index 014967c7f65a..fd51e2b8c40b 100644
--- 
a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
+++ 
b/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
@@ -52,7 +52,6 @@ [Packages]
   SecurityPkg/SecurityPkg.dec
   IntelSiliconPkg/IntelSiliconPkg.dec
   MinPlatformPkg/MinPlatformPkg.dec
-  IntelSiliconPkg/IntelSiliconPkg.dec
 
 [FixedPcd]
   gSiPkgTokenSpaceGuid.PcdTsegSize ## CONSUMES
-- 
2.28.0.windows.1



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回复: [edk2-devel] [PATCH] BaseTools: Add -ffat-lto-objects option in GCC5 tool chain

2021-05-18 Thread gaoliming 
Yes. GCC5 DEBUG/RELEASE/NOOPT is in current CI build. 

Thanks
Liming
> -邮件原件-
> 发件人: Yao, Jiewen 
> 发送时间: 2021年5月19日 10:36
> 收件人: devel@edk2.groups.io; gaolim...@byosoft.com.cn
> 抄送: Sergei Dmitrouk ; Feng, Bob C
> ; Ard Biesheuvel 
> 主题: RE: [edk2-devel] [PATCH] BaseTools: Add -ffat-lto-objects option in
> GCC5 tool chain
> 
> Thanks Liming.
> Acked-by: Jiewen Yao 
> 
> Just want to make sure, that this toolchain is covered in the existing CI
build
> process, right?
> 
> Thank you
> Yao Jiewen
> 
> > -Original Message-
> > From: devel@edk2.groups.io  On Behalf Of
> gaoliming
> > Sent: Wednesday, May 19, 2021 10:27 AM
> > To: devel@edk2.groups.io
> > Cc: Sergei Dmitrouk ; Feng, Bob C
> ;
> > Ard Biesheuvel 
> > Subject: [edk2-devel] [PATCH] BaseTools: Add -ffat-lto-objects option in
> GCC5
> > tool chain
> >
> > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3403
> >
> > This option can trig the uninitialized warning when lto is enabled.
> > The image size data is also collected for OVMF. There is no impact.
> >
> > Cc: Sergei Dmitrouk 
> > Cc: Bob Feng 
> > Cc: Ard Biesheuvel 
> > Signed-off-by: Liming Gao 
> > ---
> >  BaseTools/Conf/tools_def.template | 16 
> >  1 file changed, 8 insertions(+), 8 deletions(-)
> >
> > diff --git a/BaseTools/Conf/tools_def.template
> > b/BaseTools/Conf/tools_def.template
> > index 498696e583..aad5297385 100755
> > --- a/BaseTools/Conf/tools_def.template
> > +++ b/BaseTools/Conf/tools_def.template
> > @@ -2315,10 +2315,10 @@ RELEASE_GCC49_AARCH64_DLINK_XIPFLAGS
> = -z
> > common-page-size=0x20
> >  *_GCC5_IA32_OBJCOPY_FLAGS=
> >  *_GCC5_IA32_NASM_FLAGS   = -f elf32
> >
> > -  DEBUG_GCC5_IA32_CC_FLAGS   = DEF(GCC5_IA32_CC_FLAGS)
> -flto -Os
> > +  DEBUG_GCC5_IA32_CC_FLAGS   = DEF(GCC5_IA32_CC_FLAGS)
> -ffat-lto-
> > objects -flto -Os
> >DEBUG_GCC5_IA32_DLINK_FLAGS=
> DEF(GCC5_IA32_X64_DLINK_FLAGS) -
> > flto -Os -Wl,-m,elf_i386,--oformat=elf32-i386
> >
> > -RELEASE_GCC5_IA32_CC_FLAGS   = DEF(GCC5_IA32_CC_FLAGS)
> -flto -Os -
> > Wno-unused-but-set-variable -Wno-unused-const-variable
> > +RELEASE_GCC5_IA32_CC_FLAGS   = DEF(GCC5_IA32_CC_FLAGS)
> -ffat-lto-
> > objects -flto -Os -Wno-unused-but-set-variable
-Wno-unused-const-variable
> >  RELEASE_GCC5_IA32_DLINK_FLAGS=
> DEF(GCC5_IA32_X64_DLINK_FLAGS) -
> > flto -Os -Wl,-m,elf_i386,--oformat=elf32-i386
> >
> >NOOPT_GCC5_IA32_CC_FLAGS   = DEF(GCC5_IA32_CC_FLAGS)
> -O0
> > @@ -2347,10 +2347,10 @@ RELEASE_GCC5_IA32_DLINK_FLAGS=
> > DEF(GCC5_IA32_X64_DLINK_FLAGS) -flto -Os -Wl,
> >  *_GCC5_X64_OBJCOPY_FLAGS =
> >  *_GCC5_X64_NASM_FLAGS= -f elf64
> >
> > -  DEBUG_GCC5_X64_CC_FLAGS= DEF(GCC5_X64_CC_FLAGS)
> -flto -
> > DUSING_LTO -Os
> > +  DEBUG_GCC5_X64_CC_FLAGS= DEF(GCC5_X64_CC_FLAGS)
> -ffat-lto-
> > objects -flto -DUSING_LTO -Os
> >DEBUG_GCC5_X64_DLINK_FLAGS =
> DEF(GCC5_X64_DLINK_FLAGS) -flto -Os
> >
> > -RELEASE_GCC5_X64_CC_FLAGS= DEF(GCC5_X64_CC_FLAGS)
> -flto -
> > DUSING_LTO -Os -Wno-unused-but-set-variable
> -Wno-unused-const-variable
> > +RELEASE_GCC5_X64_CC_FLAGS= DEF(GCC5_X64_CC_FLAGS)
> -ffat-lto-
> > objects -flto -DUSING_LTO -Os -Wno-unused-but-set-variable
> -Wno-unused-
> > const-variable
> >  RELEASE_GCC5_X64_DLINK_FLAGS = DEF(GCC5_X64_DLINK_FLAGS)
> -flto -Os
> >
> >NOOPT_GCC5_X64_CC_FLAGS= DEF(GCC5_X64_CC_FLAGS)
> -O0
> > @@ -2382,10 +2382,10 @@ RELEASE_GCC5_X64_DLINK_FLAGS =
> > DEF(GCC5_X64_DLINK_FLAGS) -flto -Os
> >  *_GCC5_ARM_VFRPP_FLAGS   = $(ARCHCC_FLAGS)
> $(PLATFORM_FLAGS)
> > DEF(GCC_VFRPP_FLAGS)
> >  *_GCC5_ARM_CC_XIPFLAGS   =
> DEF(GCC5_ARM_CC_XIPFLAGS)
> >
> > -  DEBUG_GCC5_ARM_CC_FLAGS= DEF(GCC5_ARM_CC_FLAGS)
> -flto -Wno-
> > unused-but-set-variable -Wno-unused-const-variable
> > +  DEBUG_GCC5_ARM_CC_FLAGS= DEF(GCC5_ARM_CC_FLAGS)
> -ffat-lto-
> > objects -flto -Wno-unused-but-set-variable -Wno-unused-const-variable
> >DEBUG_GCC5_ARM_DLINK_FLAGS =
> DEF(GCC5_ARM_DLINK_FLAGS) -flto -
> > Os -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-arm
> -Wl,-plugin-opt=-pass-
> > through=-llto-arm
> >
> > -RELEASE_GCC5_ARM_CC_FLAGS= DEF(GCC5_ARM_CC_FLAGS)
> -flto -Wno-
> > unused-but-set-variable -Wno-unused-const-variable
> > +RELEASE_GCC5_ARM_CC_FLAGS= DEF(GCC5_ARM_CC_FLAGS)
> -ffat-lto-
> > objects -flto -Wno-unused-but-set-variable -Wno-unused-const-variable
> >  RELEASE_GCC5_ARM_DLINK_FLAGS =
> DEF(GCC5_ARM_DLINK_FLAGS) -flto -
> > Os -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-arm
> -Wl,-plugin-opt=-pass-
> > through=-llto-arm
> >
> >NOOPT_GCC5_ARM_CC_FLAGS= DEF(GCC5_ARM_CC_FLAGS)
> -O0
> > @@ -2416,11 +2416,11 @@ RELEASE_GCC5_ARM_DLINK_FLAGS =
> > DEF(GCC5_ARM_DLINK_FLAGS) -flto -Os -L$(WORKS
> >  *_GCC5_AARCH64_VFRPP_FLAGS   = $(ARCHCC_FLAGS)
> $(PLATFORM_FLAGS)
> > DEF(GCC_VFRPP_FLAGS)
> >  *_GCC5_AARCH64_CC_XIPFLAGS   =
> DEF(GCC5_AARCH64_CC_XIPFLAGS)

Re: [edk2-devel] [PATCH] BaseTools: Add -ffat-lto-objects option in GCC5 tool chain

2021-05-18 Thread Yao, Jiewen 
Thanks Liming.
Acked-by: Jiewen Yao 

Just want to make sure, that this toolchain is covered in the existing CI build 
process, right?

Thank you
Yao Jiewen

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of gaoliming
> Sent: Wednesday, May 19, 2021 10:27 AM
> To: devel@edk2.groups.io
> Cc: Sergei Dmitrouk ; Feng, Bob C ;
> Ard Biesheuvel 
> Subject: [edk2-devel] [PATCH] BaseTools: Add -ffat-lto-objects option in GCC5
> tool chain
> 
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3403
> 
> This option can trig the uninitialized warning when lto is enabled.
> The image size data is also collected for OVMF. There is no impact.
> 
> Cc: Sergei Dmitrouk 
> Cc: Bob Feng 
> Cc: Ard Biesheuvel 
> Signed-off-by: Liming Gao 
> ---
>  BaseTools/Conf/tools_def.template | 16 
>  1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/BaseTools/Conf/tools_def.template
> b/BaseTools/Conf/tools_def.template
> index 498696e583..aad5297385 100755
> --- a/BaseTools/Conf/tools_def.template
> +++ b/BaseTools/Conf/tools_def.template
> @@ -2315,10 +2315,10 @@ RELEASE_GCC49_AARCH64_DLINK_XIPFLAGS = -z
> common-page-size=0x20
>  *_GCC5_IA32_OBJCOPY_FLAGS=
>  *_GCC5_IA32_NASM_FLAGS   = -f elf32
> 
> -  DEBUG_GCC5_IA32_CC_FLAGS   = DEF(GCC5_IA32_CC_FLAGS) -flto -Os
> +  DEBUG_GCC5_IA32_CC_FLAGS   = DEF(GCC5_IA32_CC_FLAGS) -ffat-lto-
> objects -flto -Os
>DEBUG_GCC5_IA32_DLINK_FLAGS= DEF(GCC5_IA32_X64_DLINK_FLAGS) -
> flto -Os -Wl,-m,elf_i386,--oformat=elf32-i386
> 
> -RELEASE_GCC5_IA32_CC_FLAGS   = DEF(GCC5_IA32_CC_FLAGS) -flto -Os -
> Wno-unused-but-set-variable -Wno-unused-const-variable
> +RELEASE_GCC5_IA32_CC_FLAGS   = DEF(GCC5_IA32_CC_FLAGS) -ffat-lto-
> objects -flto -Os -Wno-unused-but-set-variable -Wno-unused-const-variable
>  RELEASE_GCC5_IA32_DLINK_FLAGS= DEF(GCC5_IA32_X64_DLINK_FLAGS) -
> flto -Os -Wl,-m,elf_i386,--oformat=elf32-i386
> 
>NOOPT_GCC5_IA32_CC_FLAGS   = DEF(GCC5_IA32_CC_FLAGS) -O0
> @@ -2347,10 +2347,10 @@ RELEASE_GCC5_IA32_DLINK_FLAGS=
> DEF(GCC5_IA32_X64_DLINK_FLAGS) -flto -Os -Wl,
>  *_GCC5_X64_OBJCOPY_FLAGS =
>  *_GCC5_X64_NASM_FLAGS= -f elf64
> 
> -  DEBUG_GCC5_X64_CC_FLAGS= DEF(GCC5_X64_CC_FLAGS) -flto -
> DUSING_LTO -Os
> +  DEBUG_GCC5_X64_CC_FLAGS= DEF(GCC5_X64_CC_FLAGS) -ffat-lto-
> objects -flto -DUSING_LTO -Os
>DEBUG_GCC5_X64_DLINK_FLAGS = DEF(GCC5_X64_DLINK_FLAGS) -flto -Os
> 
> -RELEASE_GCC5_X64_CC_FLAGS= DEF(GCC5_X64_CC_FLAGS) -flto -
> DUSING_LTO -Os -Wno-unused-but-set-variable -Wno-unused-const-variable
> +RELEASE_GCC5_X64_CC_FLAGS= DEF(GCC5_X64_CC_FLAGS) -ffat-lto-
> objects -flto -DUSING_LTO -Os -Wno-unused-but-set-variable -Wno-unused-
> const-variable
>  RELEASE_GCC5_X64_DLINK_FLAGS = DEF(GCC5_X64_DLINK_FLAGS) -flto -Os
> 
>NOOPT_GCC5_X64_CC_FLAGS= DEF(GCC5_X64_CC_FLAGS) -O0
> @@ -2382,10 +2382,10 @@ RELEASE_GCC5_X64_DLINK_FLAGS =
> DEF(GCC5_X64_DLINK_FLAGS) -flto -Os
>  *_GCC5_ARM_VFRPP_FLAGS   = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS)
> DEF(GCC_VFRPP_FLAGS)
>  *_GCC5_ARM_CC_XIPFLAGS   = DEF(GCC5_ARM_CC_XIPFLAGS)
> 
> -  DEBUG_GCC5_ARM_CC_FLAGS= DEF(GCC5_ARM_CC_FLAGS) -flto -Wno-
> unused-but-set-variable -Wno-unused-const-variable
> +  DEBUG_GCC5_ARM_CC_FLAGS= DEF(GCC5_ARM_CC_FLAGS) -ffat-lto-
> objects -flto -Wno-unused-but-set-variable -Wno-unused-const-variable
>DEBUG_GCC5_ARM_DLINK_FLAGS = DEF(GCC5_ARM_DLINK_FLAGS) -flto -
> Os -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-arm -Wl,-plugin-opt=-pass-
> through=-llto-arm
> 
> -RELEASE_GCC5_ARM_CC_FLAGS= DEF(GCC5_ARM_CC_FLAGS) -flto -Wno-
> unused-but-set-variable -Wno-unused-const-variable
> +RELEASE_GCC5_ARM_CC_FLAGS= DEF(GCC5_ARM_CC_FLAGS) -ffat-lto-
> objects -flto -Wno-unused-but-set-variable -Wno-unused-const-variable
>  RELEASE_GCC5_ARM_DLINK_FLAGS = DEF(GCC5_ARM_DLINK_FLAGS) -flto -
> Os -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-arm -Wl,-plugin-opt=-pass-
> through=-llto-arm
> 
>NOOPT_GCC5_ARM_CC_FLAGS= DEF(GCC5_ARM_CC_FLAGS) -O0
> @@ -2416,11 +2416,11 @@ RELEASE_GCC5_ARM_DLINK_FLAGS =
> DEF(GCC5_ARM_DLINK_FLAGS) -flto -Os -L$(WORKS
>  *_GCC5_AARCH64_VFRPP_FLAGS   = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS)
> DEF(GCC_VFRPP_FLAGS)
>  *_GCC5_AARCH64_CC_XIPFLAGS   = DEF(GCC5_AARCH64_CC_XIPFLAGS)
> 
> -  DEBUG_GCC5_AARCH64_CC_FLAGS= DEF(GCC5_AARCH64_CC_FLAGS) -flto
> -Wno-unused-but-set-variable -Wno-unused-const-variable
> +  DEBUG_GCC5_AARCH64_CC_FLAGS= DEF(GCC5_AARCH64_CC_FLAGS) -
> ffat-lto-objects -flto -Wno-unused-but-set-variable -Wno-unused-const-variable
>DEBUG_GCC5_AARCH64_DLINK_FLAGS = DEF(GCC5_AARCH64_DLINK_FLAGS)
> -flto -Os -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-aarch64 -Wl,-plugin-
> opt=-pass-through=-llto-aarch64 -Wno-lto-type-mismatch
>DEBUG_GCC5_AARCH64_DLINK_XIPFLAGS = -z common-page-size=0x20
> 
> -RELEASE_GCC5_AARCH64_CC_FLAGS=

[edk2-devel] [PATCH] BaseTools: Add -ffat-lto-objects option in GCC5 tool chain

2021-05-18 Thread gaoliming 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3403

This option can trig the uninitialized warning when lto is enabled.
The image size data is also collected for OVMF. There is no impact.

Cc: Sergei Dmitrouk 
Cc: Bob Feng 
Cc: Ard Biesheuvel 
Signed-off-by: Liming Gao 
---
 BaseTools/Conf/tools_def.template | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/BaseTools/Conf/tools_def.template 
b/BaseTools/Conf/tools_def.template
index 498696e583..aad5297385 100755
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -2315,10 +2315,10 @@ RELEASE_GCC49_AARCH64_DLINK_XIPFLAGS = -z 
common-page-size=0x20
 *_GCC5_IA32_OBJCOPY_FLAGS=
 *_GCC5_IA32_NASM_FLAGS   = -f elf32
 
-  DEBUG_GCC5_IA32_CC_FLAGS   = DEF(GCC5_IA32_CC_FLAGS) -flto -Os
+  DEBUG_GCC5_IA32_CC_FLAGS   = DEF(GCC5_IA32_CC_FLAGS) -ffat-lto-objects 
-flto -Os
   DEBUG_GCC5_IA32_DLINK_FLAGS= DEF(GCC5_IA32_X64_DLINK_FLAGS) -flto -Os 
-Wl,-m,elf_i386,--oformat=elf32-i386
 
-RELEASE_GCC5_IA32_CC_FLAGS   = DEF(GCC5_IA32_CC_FLAGS) -flto -Os 
-Wno-unused-but-set-variable -Wno-unused-const-variable
+RELEASE_GCC5_IA32_CC_FLAGS   = DEF(GCC5_IA32_CC_FLAGS) -ffat-lto-objects 
-flto -Os -Wno-unused-but-set-variable -Wno-unused-const-variable
 RELEASE_GCC5_IA32_DLINK_FLAGS= DEF(GCC5_IA32_X64_DLINK_FLAGS) -flto -Os 
-Wl,-m,elf_i386,--oformat=elf32-i386
 
   NOOPT_GCC5_IA32_CC_FLAGS   = DEF(GCC5_IA32_CC_FLAGS) -O0
@@ -2347,10 +2347,10 @@ RELEASE_GCC5_IA32_DLINK_FLAGS= 
DEF(GCC5_IA32_X64_DLINK_FLAGS) -flto -Os -Wl,
 *_GCC5_X64_OBJCOPY_FLAGS =
 *_GCC5_X64_NASM_FLAGS= -f elf64
 
-  DEBUG_GCC5_X64_CC_FLAGS= DEF(GCC5_X64_CC_FLAGS) -flto -DUSING_LTO -Os
+  DEBUG_GCC5_X64_CC_FLAGS= DEF(GCC5_X64_CC_FLAGS) -ffat-lto-objects 
-flto -DUSING_LTO -Os
   DEBUG_GCC5_X64_DLINK_FLAGS = DEF(GCC5_X64_DLINK_FLAGS) -flto -Os
 
-RELEASE_GCC5_X64_CC_FLAGS= DEF(GCC5_X64_CC_FLAGS) -flto -DUSING_LTO 
-Os -Wno-unused-but-set-variable -Wno-unused-const-variable
+RELEASE_GCC5_X64_CC_FLAGS= DEF(GCC5_X64_CC_FLAGS) -ffat-lto-objects 
-flto -DUSING_LTO -Os -Wno-unused-but-set-variable -Wno-unused-const-variable
 RELEASE_GCC5_X64_DLINK_FLAGS = DEF(GCC5_X64_DLINK_FLAGS) -flto -Os
 
   NOOPT_GCC5_X64_CC_FLAGS= DEF(GCC5_X64_CC_FLAGS) -O0
@@ -2382,10 +2382,10 @@ RELEASE_GCC5_X64_DLINK_FLAGS = 
DEF(GCC5_X64_DLINK_FLAGS) -flto -Os
 *_GCC5_ARM_VFRPP_FLAGS   = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) 
DEF(GCC_VFRPP_FLAGS)
 *_GCC5_ARM_CC_XIPFLAGS   = DEF(GCC5_ARM_CC_XIPFLAGS)
 
-  DEBUG_GCC5_ARM_CC_FLAGS= DEF(GCC5_ARM_CC_FLAGS) -flto 
-Wno-unused-but-set-variable -Wno-unused-const-variable
+  DEBUG_GCC5_ARM_CC_FLAGS= DEF(GCC5_ARM_CC_FLAGS) -ffat-lto-objects 
-flto -Wno-unused-but-set-variable -Wno-unused-const-variable
   DEBUG_GCC5_ARM_DLINK_FLAGS = DEF(GCC5_ARM_DLINK_FLAGS) -flto -Os 
-L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-arm 
-Wl,-plugin-opt=-pass-through=-llto-arm
 
-RELEASE_GCC5_ARM_CC_FLAGS= DEF(GCC5_ARM_CC_FLAGS) -flto 
-Wno-unused-but-set-variable -Wno-unused-const-variable
+RELEASE_GCC5_ARM_CC_FLAGS= DEF(GCC5_ARM_CC_FLAGS) -ffat-lto-objects 
-flto -Wno-unused-but-set-variable -Wno-unused-const-variable
 RELEASE_GCC5_ARM_DLINK_FLAGS = DEF(GCC5_ARM_DLINK_FLAGS) -flto -Os 
-L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-arm 
-Wl,-plugin-opt=-pass-through=-llto-arm
 
   NOOPT_GCC5_ARM_CC_FLAGS= DEF(GCC5_ARM_CC_FLAGS) -O0
@@ -2416,11 +2416,11 @@ RELEASE_GCC5_ARM_DLINK_FLAGS = 
DEF(GCC5_ARM_DLINK_FLAGS) -flto -Os -L$(WORKS
 *_GCC5_AARCH64_VFRPP_FLAGS   = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) 
DEF(GCC_VFRPP_FLAGS)
 *_GCC5_AARCH64_CC_XIPFLAGS   = DEF(GCC5_AARCH64_CC_XIPFLAGS)
 
-  DEBUG_GCC5_AARCH64_CC_FLAGS= DEF(GCC5_AARCH64_CC_FLAGS) -flto 
-Wno-unused-but-set-variable -Wno-unused-const-variable
+  DEBUG_GCC5_AARCH64_CC_FLAGS= DEF(GCC5_AARCH64_CC_FLAGS) 
-ffat-lto-objects -flto -Wno-unused-but-set-variable -Wno-unused-const-variable
   DEBUG_GCC5_AARCH64_DLINK_FLAGS = DEF(GCC5_AARCH64_DLINK_FLAGS) -flto -Os 
-L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-aarch64 
-Wl,-plugin-opt=-pass-through=-llto-aarch64 -Wno-lto-type-mismatch
   DEBUG_GCC5_AARCH64_DLINK_XIPFLAGS = -z common-page-size=0x20
 
-RELEASE_GCC5_AARCH64_CC_FLAGS= DEF(GCC5_AARCH64_CC_FLAGS) -flto 
-Wno-unused-but-set-variable -Wno-unused-const-variable
+RELEASE_GCC5_AARCH64_CC_FLAGS= DEF(GCC5_AARCH64_CC_FLAGS) 
-ffat-lto-objects -flto -Wno-unused-but-set-variable -Wno-unused-const-variable
 RELEASE_GCC5_AARCH64_DLINK_FLAGS = DEF(GCC5_AARCH64_DLINK_FLAGS) -flto -Os 
-L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-aarch64 
-Wl,-plugin-opt=-pass-through=-llto-aarch64 -Wno-lto-type-mismatch
 RELEASE_GCC5_AARCH64_DLINK_XIPFLAGS = -z common-page-size=0x20
 
-- 
2.27.0.windows.1




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View/Reply Online (#75303):

Re: [edk2-devel] [PATCH v2 1/3] ShellPkg/HttpDynamicCommand: Fix possible uninitialized use

2021-05-18 Thread Gao, Zhichao 
Reviewed-by: Zhichao Gao 

Thanks,
Zhichao

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of
> gaoliming
> Sent: Wednesday, May 19, 2021 9:13 AM
> To: devel@edk2.groups.io; ser...@posteo.net
> Cc: Ni, Ray ; Gao, Zhichao 
> Subject: 回复: [edk2-devel] [PATCH v2 1/3] ShellPkg/HttpDynamicCommand:
> Fix possible uninitialized use
> 
> Reviewed-by: Liming Gao 
> 
> This fix is clear.
> 
> Thanks
> Liming
> > -邮件原件-
> > 发件人: devel@edk2.groups.io  代表 Sergei
> Dmitrouk
> > 发送时间: 2021年5月19日 0:10
> > 收件人: devel@edk2.groups.io
> > 抄送: Ray Ni ; Zhichao Gao 
> > 主题: [edk2-devel] [PATCH v2 1/3] ShellPkg/HttpDynamicCommand: Fix
> > possible uninitialized use
> >
> > `Status` can be used uninitialized:
> >
> > /* Evaluates to FALSE */
> > if (ShellGetExecutionBreakFlag ()) {
> > Status = EFI_ABORTED;
> > break;
> > }
> >
> > /* Evaluates to FALSE */
> > if (!Context->ContentDownloaded && !Context->ResponseToken.Event)
> {
> > Status = ...;
> > ASSERT_EFI_ERROR (Status);
> > } else {
> > ResponseMessage.Data.Response = NULL;
> > }
> >
> > /* UNINITIALIZED USE */
> > if (EFI_ERROR (Status)) {
> > break;
> > }
> >
> > Cc: Ray Ni 
> > Cc: Zhichao Gao 
> > Signed-off-by: Sergei Dmitrouk 
> > ---
> >  ShellPkg/DynamicCommand/HttpDynamicCommand/Http.c | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/ShellPkg/DynamicCommand/HttpDynamicCommand/Http.c
> > b/ShellPkg/DynamicCommand/HttpDynamicCommand/Http.c
> > index 3735a4a7e645..7b9b2d238015 100644
> > --- a/ShellPkg/DynamicCommand/HttpDynamicCommand/Http.c
> > +++ b/ShellPkg/DynamicCommand/HttpDynamicCommand/Http.c
> > @@ -1524,6 +1524,7 @@ GetResponse (
> >Context->ResponseToken.Message = 
> >Context->ContentLength = 0;
> >Context->Status = REQ_OK;
> > +  Status = EFI_SUCCESS;
> >MsgParser = NULL;
> >ResponseData.StatusCode = HTTP_STATUS_UNSUPPORTED_STATUS;
> >ResponseMessage.Data.Response = 
> > --
> > 2.17.6
> >
> >
> >
> >
> >
> 
> 
> 
> 
> 
> 
> 



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Re: [edk2-devel] [PATCH EDK2 v1 1/1] MdeModulePkg/HiiDatabaseDxe: remove dead code

2021-05-18 Thread Dandan Bi 
Reviewed-by: Dandan Bi 


Thanks,
Dandan
> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of
> wenyi,xie via groups.io
> Sent: Tuesday, May 18, 2021 3:17 PM
> To: devel@edk2.groups.io; Wang, Jian J ; Wu, Hao A
> ; Bi, Dandan ; Dong, Eric
> 
> Cc: songdongku...@huawei.com; xiewen...@huawei.com
> Subject: [edk2-devel] [PATCH EDK2 v1 1/1] MdeModulePkg/HiiDatabaseDxe:
> remove dead code
> 
> Outer condition is 'BlockData->Name==NULL' and inner condition is
> 'BlockData->Name!=NULL', Opposite 'if'
> condition leads to a dead code block.
> 
> Cc: Jian J Wang 
> Cc: Hao A Wu 
> Cc: Dandan Bi 
> Cc: Eric Dong 
> Signed-off-by: Wenyi Xie 
> ---
>  MdeModulePkg/Universal/HiiDatabaseDxe/ConfigRouting.c | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/MdeModulePkg/Universal/HiiDatabaseDxe/ConfigRouting.c
> b/MdeModulePkg/Universal/HiiDatabaseDxe/ConfigRouting.c
> index d492b769d51c..17a914208c6d 100644
> --- a/MdeModulePkg/Universal/HiiDatabaseDxe/ConfigRouting.c
> +++ b/MdeModulePkg/Universal/HiiDatabaseDxe/ConfigRouting.c
> @@ -2871,9 +2871,6 @@ ParseIfrData (
>  //
>  if ((BlockData->Name == NULL) && ((BlockData->Offset + BlockData-
> >Width) > VarStorageData->Size)) {
>Status = EFI_INVALID_PARAMETER;
> -  if (BlockData->Name != NULL) {
> -FreePool (BlockData->Name);
> -  }
>FreePool (BlockData);
>goto Done;
>  }
> --
> 2.20.1.windows.1
> 
> 
> 
> 
> 



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Re: [edk2-devel] GSoC 2021: audio output protocol

2021-05-18 Thread Andrew Fish via groups.io 



> On May 18, 2021, at 9:14 AM, Ethin Probst  wrote:
> 
> Greetings everyone!
> 
> I've been selected as a student coder for the audio output protocol
> project with Ray Ni and Leif Lindholm as my mentors. This is my first
> time doing GSoC and working on EDK II so this will be very enjoyable
> and a wonderful learning opportunity for me. (It'll also give me
> something to do over the summer, which is always a plus.)
> 
> Some of you have already communicated with me in the past, both about
> this proposal and about UEFI accessibility in general, and I'm glad to
> be working with you guys again. I'm primarily on Linux (Arch Linux to
> be exact) and I've already got my development environment set up and
> can fully compile OVMF. However, though I've read a bit through the
> UEFI driver manual, I certainly haven't read all of it, and I'm still
> quite unfamiliar with the EDK II code as a whole. So, how can I use
> this community bonding period to get to grips with the development
> process? What else do I need to learn?
> 
> I apologize for not having many questions to ask -- this is my first
> time so I'm not really sure. :-) I can't wait to begin working with
> all of you this summer!
> 

Ethin,

Maybe try making a simple Hello World App and figure out how to debug it. Also 
maybe make a stub driver that produces a protocol and write an app to access 
the protocol. That way you could practice using the environment for a simple 
task. 

Maybe other folks have other ideas?

Thanks,

Andrew Fish

> -- 
> Signed,
> Ethin D. Probst
> 
> 
> 
> 
> 



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回复: 回复: [edk2-devel] [PATCH v1 3/3] CryptoPkg/BaseCryptLib: Fix possible uninitialized use

2021-05-18 Thread gaoliming 
Sergei:
  Thanks for your confirmation. I will send the patch to update GCC5 tool chain 
with this option. 

Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 Sergei
> Dmitrouk
> 发送时间: 2021年5月19日 0:03
> 收件人: devel@edk2.groups.io; gaolim...@byosoft.com.cn
> 抄送: jiewen@intel.com; 'Wang, Jian J' ; 'Lu,
> XiaoyuX' ; 'Jiang, Guomin' 
> 主题: Re: 回复: [edk2-devel] [PATCH v1 3/3] CryptoPkg/BaseCryptLib: Fix
> possible uninitialized use
> 
> Yes, adding `-ffat-lto-objects` makes the warning appear even with GCC 5.5.0.
> 
> Regards,
> Sergei
> 
> On Tue, May 18, 2021 at 08:59:05AM +0800, gaoliming wrote:
> > Sergei:
> >   Yes. GCC49 is LTO disable GCC tool chain. GCC5 is LTO enable tool chain.
> > They both work on the different GCC version, such as gcc5, gcc6..
> >
> >   https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90844 mentions
> > -ffat-lto-objects option that can trig the warning with LTO option. Do you
> > try it?
> >
> >   If this option works, we can update GCC5 tool chain definition in
> > tools_def.txt, then this issue can be detected in CI GCC5 build.
> >
> > Thanks
> > Liming
> > > -邮件原件-
> > > 发件人: devel@edk2.groups.io  代表 Sergei
> > > Dmitrouk
> > > 发送时间: 2021年5月15日 21:01
> > > 收件人: devel@edk2.groups.io; jiewen@intel.com
> > > 抄送: Wang, Jian J ; Lu, XiaoyuX
> > > ; Jiang, Guomin 
> > > 主题: Re: [edk2-devel] [PATCH v1 3/3] CryptoPkg/BaseCryptLib: Fix
> possible
> > > uninitialized use
> > >
> > > Hello Jiewen,
> > >
> > > I get the error only for GCC49 and not for GCC5 toolchain.  CI uses GCC5.
> > >
> > > So I compared build commands and this seems to depend on LTO.  Adding
> > > `-flto`
> > > impedes compiler's ability to detect such simple issues.
> > >
> > > I've found relevant bug report, there is even fix suggestion from last
> > month:
> > >
> > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90844
> > >
> > > Regards,
> > > Sergei
> > >
> > > On Sat, May 15, 2021 at 12:30:44AM +, Yao, Jiewen wrote:
> > > > Hi Sergei
> > > > Thank you very much for the fix.
> > > > Reviewed-by: Jiewen Yao 
> > > >
> > > > I am a little surprised why it is not caught before. It is an obvious
> > logic issue.
> > > >
> > > > Do you think we can do anything on CI, to catch it during pre-check-in
> > in the
> > > future?
> > > > I just feel it is burden to make it post-check-in fix.
> > > >
> > > >
> > > > Thank you
> > > > Yao Jiewen
> > > >
> > > > > -Original Message-
> > > > > From: Sergei Dmitrouk 
> > > > > Sent: Friday, May 14, 2021 8:17 PM
> > > > > To: devel@edk2.groups.io
> > > > > Cc: Yao, Jiewen ; Wang, Jian J
> > > ;
> > > > > Lu, XiaoyuX ; Jiang, Guomin
> > > 
> > > > > Subject: [PATCH v1 3/3] CryptoPkg/BaseCryptLib: Fix possible
> > uninitialized
> > > use
> > > > >
> > > > > `Result` can be used uninitialized in both functions after following
> > > > > either first or second `goto` statement.
> > > > >
> > > > > Cc: Jiewen Yao 
> > > > > Cc: Jian J Wang 
> > > > > Cc: Xiaoyu Lu 
> > > > > Cc: Guomin Jiang 
> > > > > Signed-off-by: Sergei Dmitrouk 
> > > > > ---
> > > > >  CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c | 1 +
> > > > >  CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c | 1 +
> > > > >  2 files changed, 2 insertions(+)
> > > > >
> > > > > diff --git a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
> > > > > b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
> > > > > index 4009d37d5f91..0b2960f06c4c 100644
> > > > > --- a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
> > > > > +++ b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
> > > > > @@ -82,6 +82,7 @@ RsaPssVerify (
> > > > >EVP_PKEY_CTX *KeyCtx;
> > > > >CONST EVP_MD  *HashAlg;
> > > > >
> > > > > +  Result = FALSE;
> > > > >EvpRsaKey = NULL;
> > > > >EvpVerifyCtx = NULL;
> > > > >KeyCtx = NULL;
> > > > > diff --git a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c
> > > > > b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c
> > > > > index b66b6f7296ad..ece765f9ae0a 100644
> > > > > --- a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c
> > > > > +++ b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c
> > > > > @@ -97,6 +97,7 @@ RsaPssSign (
> > > > >EVP_PKEY_CTX  *KeyCtx;
> > > > >CONST EVP_MD  *HashAlg;
> > > > >
> > > > > +  Result = FALSE;
> > > > >EvpRsaKey = NULL;
> > > > >EvpVerifyCtx = NULL;
> > > > >KeyCtx = NULL;
> > > > > --
> > > > > 2.17.6
> > >
> > >
> > >
> > >
> >
> >
> >
> >
> >
> >
> >
> >
> 
> 
> 
> 





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回复: [edk2-devel] [PATCH v2 0/3] Fix possible uninitialized uses

2021-05-18 Thread gaoliming 
Hi, all
  This patch set has passed the review. I create PR
https://github.com/tianocore/edk2/pull/1656 for this patch set. 

Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 Sergei
> Dmitrouk
> 发送时间: 2021年5月19日 0:10
> 收件人: devel@edk2.groups.io
> 主题: [edk2-devel] [PATCH v1 0/3] Fix possible uninitialized uses
> 
> v1:
> 
> Compiling for IA32 target with gcc-5.5.0 emits "maybe-uninitialized"
> warnings.
> Compilation command: build -a IA32 -p OvmfPkg/OvmfPkgIa32.dsc -t GCC49
> 
> Unlike other cases mentioned in
> https://bugzilla.tianocore.org/show_bug.cgi?id=3228
> these seem to be actual issues in the code.  Read patches for specifics.
> 
> v2:
> 
> Second patch was simplified.
> 
> Sergei Dmitrouk (3):
>   ShellPkg/HttpDynamicCommand: Fix possible uninitialized use
>   MdeModulePkg/PciBusDxe: Fix possible uninitialized use
>   CryptoPkg/BaseCryptLib: Fix possible uninitialized use
> 
>  CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c | 1 +
>  CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c | 1 +
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 5 ++---
>  ShellPkg/DynamicCommand/HttpDynamicCommand/Http.c   | 1 +
>  4 files changed, 5 insertions(+), 3 deletions(-)
> 
> --
> 2.17.6
> 
> 
> 
> 
> 





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回复: [edk2-devel] [PATCH v2 1/3] ShellPkg/HttpDynamicCommand: Fix possible uninitialized use

2021-05-18 Thread gaoliming 
Reviewed-by: Liming Gao 

This fix is clear. 

Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 Sergei
> Dmitrouk
> 发送时间: 2021年5月19日 0:10
> 收件人: devel@edk2.groups.io
> 抄送: Ray Ni ; Zhichao Gao 
> 主题: [edk2-devel] [PATCH v2 1/3] ShellPkg/HttpDynamicCommand: Fix
> possible uninitialized use
> 
> `Status` can be used uninitialized:
> 
> /* Evaluates to FALSE */
> if (ShellGetExecutionBreakFlag ()) {
> Status = EFI_ABORTED;
> break;
> }
> 
> /* Evaluates to FALSE */
> if (!Context->ContentDownloaded && !Context->ResponseToken.Event) {
> Status = ...;
> ASSERT_EFI_ERROR (Status);
> } else {
> ResponseMessage.Data.Response = NULL;
> }
> 
> /* UNINITIALIZED USE */
> if (EFI_ERROR (Status)) {
> break;
> }
> 
> Cc: Ray Ni 
> Cc: Zhichao Gao 
> Signed-off-by: Sergei Dmitrouk 
> ---
>  ShellPkg/DynamicCommand/HttpDynamicCommand/Http.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/ShellPkg/DynamicCommand/HttpDynamicCommand/Http.c
> b/ShellPkg/DynamicCommand/HttpDynamicCommand/Http.c
> index 3735a4a7e645..7b9b2d238015 100644
> --- a/ShellPkg/DynamicCommand/HttpDynamicCommand/Http.c
> +++ b/ShellPkg/DynamicCommand/HttpDynamicCommand/Http.c
> @@ -1524,6 +1524,7 @@ GetResponse (
>Context->ResponseToken.Message = 
>Context->ContentLength = 0;
>Context->Status = REQ_OK;
> +  Status = EFI_SUCCESS;
>MsgParser = NULL;
>ResponseData.StatusCode = HTTP_STATUS_UNSUPPORTED_STATUS;
>ResponseMessage.Data.Response = 
> --
> 2.17.6
> 
> 
> 
> 
> 





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[edk2-devel] 回复: [PATCH v2 04/13] MdePkg/Register/Amd: define GHCB macro for Register GPA structure

2021-05-18 Thread gaoliming 
Erdem:
  Laszlo is right. The rule is to align spec definition. 

Thanks
Liming
> -邮件原件-
> 发件人: Laszlo Ersek 
> 发送时间: 2021年5月19日 0:02
> 收件人: Erdem Aktas ; Brijesh Singh
> 
> 抄送: devel@edk2.groups.io; James Bottomley ; Min
> Xu ; Jiewen Yao ; Tom
> Lendacky ; Jordan Justen
> ; Ard Biesheuvel ;
> Michael D Kinney ; Liming Gao
> ; Zhiguang Liu 
> 主题: Re: [PATCH v2 04/13] MdePkg/Register/Amd: define GHCB macro for
> Register GPA structure
> 
> On 05/17/21 20:25, Erdem Aktas wrote:
> > I verified that the values align with the GHCB spec publication:
> > #56421 Revision: 2.00
> >
> > Just one question: is there any reason why GHCB_* defines are decimal
> > while the SVM_EXIT_* are all in hexadecimal? Does EDK2 have any
> > preference?
> 
> (I'm unaware of any preference in edk2 -- it's probably best to stick
> with the base that the spec itself uses, but even using a different base
> is not a huge deal, if the numbers in question are not large.)
> 
> Thanks!
> Laszlo
> 
> >
> > Reviewed-by: Erdem Aktas 
> >
> > -Erdem
> >
> > On Wed, May 12, 2021 at 4:46 PM Brijesh Singh 
> wrote:
> >>
> >> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275
> >>
> >> An SEV-SNP guest is required to perform the GHCB GPA registration. See
> >> the GHCB specification for further details.
> >>
> >> Cc: James Bottomley 
> >> Cc: Min Xu 
> >> Cc: Jiewen Yao 
> >> Cc: Tom Lendacky 
> >> Cc: Jordan Justen 
> >> Cc: Ard Biesheuvel 
> >> Cc: Laszlo Ersek 
> >> Cc: Erdem Aktas 
> >> Cc: Michael D Kinney 
> >> Cc: Liming Gao 
> >> Cc: Zhiguang Liu 
> >> Reviewed-by: Laszlo Ersek 
> >> Reviewed-by: Liming Gao 
> >> Signed-off-by: Brijesh Singh 
> >> ---
> >>  MdePkg/Include/Register/Amd/Fam17Msr.h | 7 +++
> >>  1 file changed, 7 insertions(+)
> >>
> >> diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h
> b/MdePkg/Include/Register/Amd/Fam17Msr.h
> >> index cdb8f588ccf8..542e4cdf4782 100644
> >> --- a/MdePkg/Include/Register/Amd/Fam17Msr.h
> >> +++ b/MdePkg/Include/Register/Amd/Fam17Msr.h
> >> @@ -53,6 +53,11 @@ typedef union {
> >>  UINT64  Features:52;
> >>} GhcbHypervisorFeatures;
> >>
> >> +  struct {
> >> +UINT64  Function:12;
> >> +UINT64  GuestFrameNumber:52;
> >> +  } GhcbGpaRegister;
> >> +
> >>VOID*Ghcb;
> >>
> >>UINT64  GhcbPhysicalAddress;
> >> @@ -62,6 +67,8 @@ typedef union {
> >>  #define GHCB_INFO_SEV_INFO_GET  2
> >>  #define GHCB_INFO_CPUID_REQUEST 4
> >>  #define GHCB_INFO_CPUID_RESPONSE5
> >> +#define GHCB_INFO_GHCB_GPA_REGISTER_REQUEST 18
> >> +#define GHCB_INFO_GHCB_GPA_REGISTER_RESPONSE19
> >>  #define GHCB_HYPERVISOR_FEATURES_REQUEST128
> >>  #define GHCB_HYPERVISOR_FEATURES_RESPONSE   129
> >>  #define GHCB_INFO_TERMINATE_REQUEST 256
> >> --
> >> 2.17.1
> >>
> >





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Re: [edk2-devel] [PATCH v2 2/3] MdeModulePkg/PciBusDxe: Fix possible uninitialized use

2021-05-18 Thread Wu, Hao A 
> -Original Message-
> From: Sergei Dmitrouk 
> Sent: Wednesday, May 19, 2021 12:10 AM
> To: devel@edk2.groups.io
> Cc: Wang, Jian J ; Wu, Hao A ;
> Ni, Ray 
> Subject: [PATCH v2 2/3] MdeModulePkg/PciBusDxe: Fix possible uninitialized
> use
> 
> If the function gets invalid value for the `ResizableBarOp` parameter and
> asserts are disabled, `Bit` can be used uninitialized.
> 
> Cc: Jian J Wang 
> Cc: Hao A Wu 
> Cc: Ray Ni 
> Signed-off-by: Sergei Dmitrouk 
> ---
> 
> Notes:
> v2:
> - simplify if-statement to avoid unused branches
> 
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
> b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
> index 6bba28367165..4caac56f1dcd 100644
> --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
> +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
> @@ -1778,10 +1778,9 @@ PciProgramResizableBar (
> 
>  if (ResizableBarOp == PciResizableBarMax) {
>Bit = HighBitSet64(Capabilities);
> -} else if (ResizableBarOp == PciResizableBarMin) {
> +} else {
> +  ASSERT (ResizableBarOp == PciResizableBarMin);
>Bit = LowBitSet64(Capabilities);
> -} else {
> -  ASSERT ((ResizableBarOp == PciResizableBarMax) || (ResizableBarOp ==
> PciResizableBarMin));


Reviewed-by: Hao A Wu 

Best Regards,
Hao Wu


>  }
> 
>  ASSERT (Bit >= 0);
> --
> 2.17.6



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回复: [edk2-devel] GSoC 2021 Qemu OpenBoardPkg Project

2021-05-18 Thread gaoliming 
Include Michael Kubacki. 

Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 KAAIRA
> GUPTA
> 发送时间: 2021年5月18日 22:42
> 收件人: Ray Ni ; devel@edk2.groups.io
> 主题: Re: [edk2-devel] GSoC 2021 Qemu OpenBoardPkg Project
> 
> On Tue, May 18, 2021 at 08:01:57PM +0530, Kaaira Gupta wrote:
> > Hey everyone,
> >
> > I have been selected as a student developer for the project MinPlatform
> > Qemu OpenBoardPkg under the mentors Ray Ni and Michael Kubacki.
> Thankyou
> > for this opportunity. I have been over the major chapters of Beyond BIOS
> > as recommended by Nate DeSimone. I want to get familiar with the code
> > now to help me undersatnd the community practices and get my hands
> > dirty. Where should I start? What development environment do I need?
> > How can I use this community bonding period to give me a better start
> > for the coding phase?
> >
> > How do the mentors want me to connect with them? Can we have a meet
> to
> > discuss this project's plan to add more details? This would be very
> > helpful for me considering I don't have prior experience with EDK2.
> 
> I noticed that the mail-id that I have used of Michael Kubacki doesn't
> exist anymore. Please let me know how I can contact him.
> 
> >
> > Thank you,
> > Kaaira
> 
> Thanks,
> Kaaira
> 
> 
> 
> 





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Re: [edk2-devel] [PATCH v1 3/3] CryptoPkg/BaseCryptLib: Fix possible uninitialized use

2021-05-18 Thread Yao, Jiewen 
OK. I suggest we merge this specific one ASAP, since it is blocking other 
development work.


> -Original Message-
> From: gaoliming 
> Sent: Wednesday, May 19, 2021 8:59 AM
> To: Wang, Jian J ; 'Ard Biesheuvel' ;
> 'edk2-devel-groups-io' 
> Cc: ser...@posteo.net; Yao, Jiewen ; Lu, XiaoyuX
> ; Jiang, Guomin 
> Subject: 回复: [edk2-devel] [PATCH v1 3/3] CryptoPkg/BaseCryptLib: Fix possible
> uninitialized use
> 
> Jian:
>   These three patches are separate. They don't impact others. So, I think we 
> can
> merge single one.
> 
> Thanks
> Liming
> > -邮件原件-
> > 发件人: Wang, Jian J 
> > 发送时间: 2021年5月18日 15:36
> > 收件人: Ard Biesheuvel ; edk2-devel-groups-io
> > ; Liming Gao (Byosoft address)
> > 
> > 抄送: ser...@posteo.net; Yao, Jiewen ; Lu, XiaoyuX
> > ; Jiang, Guomin 
> > 主题: RE: [edk2-devel] [PATCH v1 3/3] CryptoPkg/BaseCryptLib: Fix possible
> > uninitialized use
> >
> > Ard,
> >
> > Patch 1&2 haven't got r-b. I'm not sure we can merge patch 3 separately.
> >
> > Regards,
> > Jian
> >
> > > -Original Message-
> > > From: Ard Biesheuvel 
> > > Sent: Tuesday, May 18, 2021 3:27 PM
> > > To: edk2-devel-groups-io ; Liming Gao (Byosoft
> > address)
> > > 
> > > Cc: ser...@posteo.net; Yao, Jiewen ; Wang, Jian J
> > > ; Lu, XiaoyuX ; Jiang,
> > Guomin
> > > 
> > > Subject: Re: [edk2-devel] [PATCH v1 3/3] CryptoPkg/BaseCryptLib: Fix
> > possible
> > > uninitialized use
> > >
> > > Please merge this fix asap. Our CI is broken because of it, and we are
> > > in the soft freeze so we need the CI up and running to catch potential
> > > issues before the release.
> > >
> > > Thanks,
> > > Ard.
> > >
> > > On Tue, 18 May 2021 at 02:59, gaoliming 
> > wrote:
> > > >
> > > > Sergei:
> > > >   Yes. GCC49 is LTO disable GCC tool chain. GCC5 is LTO enable tool
> > chain.
> > > > They both work on the different GCC version, such as gcc5, gcc6..
> > > >
> > > >   https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90844 mentions
> > > > -ffat-lto-objects option that can trig the warning with LTO option. Do 
> > > > you
> > > > try it?
> > > >
> > > >   If this option works, we can update GCC5 tool chain definition in
> > > > tools_def.txt, then this issue can be detected in CI GCC5 build.
> > > >
> > > > Thanks
> > > > Liming
> > > > > -邮件原件-
> > > > > 发件人: devel@edk2.groups.io  代表 Sergei
> > > > > Dmitrouk
> > > > > 发送时间: 2021年5月15日 21:01
> > > > > 收件人: devel@edk2.groups.io; jiewen@intel.com
> > > > > 抄送: Wang, Jian J ; Lu, XiaoyuX
> > > > > ; Jiang, Guomin 
> > > > > 主题: Re: [edk2-devel] [PATCH v1 3/3] CryptoPkg/BaseCryptLib: Fix
> > possible
> > > > > uninitialized use
> > > > >
> > > > > Hello Jiewen,
> > > > >
> > > > > I get the error only for GCC49 and not for GCC5 toolchain.  CI uses
> > GCC5.
> > > > >
> > > > > So I compared build commands and this seems to depend on LTO.
> > Adding
> > > > > `-flto`
> > > > > impedes compiler's ability to detect such simple issues.
> > > > >
> > > > > I've found relevant bug report, there is even fix suggestion from last
> > > > month:
> > > > >
> > > > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90844
> > > > >
> > > > > Regards,
> > > > > Sergei
> > > > >
> > > > > On Sat, May 15, 2021 at 12:30:44AM +, Yao, Jiewen wrote:
> > > > > > Hi Sergei
> > > > > > Thank you very much for the fix.
> > > > > > Reviewed-by: Jiewen Yao 
> > > > > >
> > > > > > I am a little surprised why it is not caught before. It is an 
> > > > > > obvious
> > > > logic issue.
> > > > > >
> > > > > > Do you think we can do anything on CI, to catch it during 
> > > > > > pre-check-in
> > > > in the
> > > > > future?
> > > > > > I just feel it is burden to make it post-check-in fix.
> > > > > >
> > > > > >
> > > > > > Thank you
> > > > > > Yao Jiewen
> > > > > >
> > > > > > > -Original Message-
> > > > > > > From: Sergei Dmitrouk 
> > > > > > > Sent: Friday, May 14, 2021 8:17 PM
> > > > > > > To: devel@edk2.groups.io
> > > > > > > Cc: Yao, Jiewen ; Wang, Jian J
> > > > > ;
> > > > > > > Lu, XiaoyuX ; Jiang, Guomin
> > > > > 
> > > > > > > Subject: [PATCH v1 3/3] CryptoPkg/BaseCryptLib: Fix possible
> > > > uninitialized
> > > > > use
> > > > > > >
> > > > > > > `Result` can be used uninitialized in both functions after 
> > > > > > > following
> > > > > > > either first or second `goto` statement.
> > > > > > >
> > > > > > > Cc: Jiewen Yao 
> > > > > > > Cc: Jian J Wang 
> > > > > > > Cc: Xiaoyu Lu 
> > > > > > > Cc: Guomin Jiang 
> > > > > > > Signed-off-by: Sergei Dmitrouk 
> > > > > > > ---
> > > > > > >  CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c | 1 +
> > > > > > >  CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c | 1 +
> > > > > > >  2 files changed, 2 insertions(+)
> > > > > > >
> > > > > > > diff --git a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
> > > > > > > b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
> > > > > > > index 4009d37d5f91..0b2960f06c4c 100644
> > > > > > > --- a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
> > > > > > >

回复: [edk2-devel] [PATCH EDK2 v1 1/1] MdeModulePkg/HiiDatabaseDxe: remove dead code

2021-05-18 Thread gaoliming 
Reviewed-by: Liming Gao 

> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 wenyi,xie via
> groups.io
> 发送时间: 2021年5月18日 15:17
> 收件人: devel@edk2.groups.io; jian.j.w...@intel.com; hao.a...@intel.com;
> dandan...@intel.com; eric.d...@intel.com
> 抄送: songdongku...@huawei.com; xiewen...@huawei.com
> 主题: [edk2-devel] [PATCH EDK2 v1 1/1] MdeModulePkg/HiiDatabaseDxe:
> remove dead code
> 
> Outer condition is 'BlockData->Name==NULL' and inner
> condition is 'BlockData->Name!=NULL', Opposite 'if'
> condition leads to a dead code block.
> 
> Cc: Jian J Wang 
> Cc: Hao A Wu 
> Cc: Dandan Bi 
> Cc: Eric Dong 
> Signed-off-by: Wenyi Xie 
> ---
>  MdeModulePkg/Universal/HiiDatabaseDxe/ConfigRouting.c | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/MdeModulePkg/Universal/HiiDatabaseDxe/ConfigRouting.c
> b/MdeModulePkg/Universal/HiiDatabaseDxe/ConfigRouting.c
> index d492b769d51c..17a914208c6d 100644
> --- a/MdeModulePkg/Universal/HiiDatabaseDxe/ConfigRouting.c
> +++ b/MdeModulePkg/Universal/HiiDatabaseDxe/ConfigRouting.c
> @@ -2871,9 +2871,6 @@ ParseIfrData (
>  //
>  if ((BlockData->Name == NULL) && ((BlockData->Offset +
> BlockData->Width) > VarStorageData->Size)) {
>Status = EFI_INVALID_PARAMETER;
> -  if (BlockData->Name != NULL) {
> -FreePool (BlockData->Name);
> -  }
>FreePool (BlockData);
>goto Done;
>  }
> --
> 2.20.1.windows.1
> 
> 
> 
> 
> 





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回复: [edk2-devel] [PATCH v1 3/3] CryptoPkg/BaseCryptLib: Fix possible uninitialized use

2021-05-18 Thread gaoliming 
Jian:
  These three patches are separate. They don't impact others. So, I think we 
can merge single one. 

Thanks
Liming
> -邮件原件-
> 发件人: Wang, Jian J 
> 发送时间: 2021年5月18日 15:36
> 收件人: Ard Biesheuvel ; edk2-devel-groups-io
> ; Liming Gao (Byosoft address)
> 
> 抄送: ser...@posteo.net; Yao, Jiewen ; Lu, XiaoyuX
> ; Jiang, Guomin 
> 主题: RE: [edk2-devel] [PATCH v1 3/3] CryptoPkg/BaseCryptLib: Fix possible
> uninitialized use
> 
> Ard,
> 
> Patch 1&2 haven't got r-b. I'm not sure we can merge patch 3 separately.
> 
> Regards,
> Jian
> 
> > -Original Message-
> > From: Ard Biesheuvel 
> > Sent: Tuesday, May 18, 2021 3:27 PM
> > To: edk2-devel-groups-io ; Liming Gao (Byosoft
> address)
> > 
> > Cc: ser...@posteo.net; Yao, Jiewen ; Wang, Jian J
> > ; Lu, XiaoyuX ; Jiang,
> Guomin
> > 
> > Subject: Re: [edk2-devel] [PATCH v1 3/3] CryptoPkg/BaseCryptLib: Fix
> possible
> > uninitialized use
> >
> > Please merge this fix asap. Our CI is broken because of it, and we are
> > in the soft freeze so we need the CI up and running to catch potential
> > issues before the release.
> >
> > Thanks,
> > Ard.
> >
> > On Tue, 18 May 2021 at 02:59, gaoliming 
> wrote:
> > >
> > > Sergei:
> > >   Yes. GCC49 is LTO disable GCC tool chain. GCC5 is LTO enable tool
> chain.
> > > They both work on the different GCC version, such as gcc5, gcc6..
> > >
> > >   https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90844 mentions
> > > -ffat-lto-objects option that can trig the warning with LTO option. Do you
> > > try it?
> > >
> > >   If this option works, we can update GCC5 tool chain definition in
> > > tools_def.txt, then this issue can be detected in CI GCC5 build.
> > >
> > > Thanks
> > > Liming
> > > > -邮件原件-
> > > > 发件人: devel@edk2.groups.io  代表 Sergei
> > > > Dmitrouk
> > > > 发送时间: 2021年5月15日 21:01
> > > > 收件人: devel@edk2.groups.io; jiewen@intel.com
> > > > 抄送: Wang, Jian J ; Lu, XiaoyuX
> > > > ; Jiang, Guomin 
> > > > 主题: Re: [edk2-devel] [PATCH v1 3/3] CryptoPkg/BaseCryptLib: Fix
> possible
> > > > uninitialized use
> > > >
> > > > Hello Jiewen,
> > > >
> > > > I get the error only for GCC49 and not for GCC5 toolchain.  CI uses
> GCC5.
> > > >
> > > > So I compared build commands and this seems to depend on LTO.
> Adding
> > > > `-flto`
> > > > impedes compiler's ability to detect such simple issues.
> > > >
> > > > I've found relevant bug report, there is even fix suggestion from last
> > > month:
> > > >
> > > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90844
> > > >
> > > > Regards,
> > > > Sergei
> > > >
> > > > On Sat, May 15, 2021 at 12:30:44AM +, Yao, Jiewen wrote:
> > > > > Hi Sergei
> > > > > Thank you very much for the fix.
> > > > > Reviewed-by: Jiewen Yao 
> > > > >
> > > > > I am a little surprised why it is not caught before. It is an obvious
> > > logic issue.
> > > > >
> > > > > Do you think we can do anything on CI, to catch it during pre-check-in
> > > in the
> > > > future?
> > > > > I just feel it is burden to make it post-check-in fix.
> > > > >
> > > > >
> > > > > Thank you
> > > > > Yao Jiewen
> > > > >
> > > > > > -Original Message-
> > > > > > From: Sergei Dmitrouk 
> > > > > > Sent: Friday, May 14, 2021 8:17 PM
> > > > > > To: devel@edk2.groups.io
> > > > > > Cc: Yao, Jiewen ; Wang, Jian J
> > > > ;
> > > > > > Lu, XiaoyuX ; Jiang, Guomin
> > > > 
> > > > > > Subject: [PATCH v1 3/3] CryptoPkg/BaseCryptLib: Fix possible
> > > uninitialized
> > > > use
> > > > > >
> > > > > > `Result` can be used uninitialized in both functions after following
> > > > > > either first or second `goto` statement.
> > > > > >
> > > > > > Cc: Jiewen Yao 
> > > > > > Cc: Jian J Wang 
> > > > > > Cc: Xiaoyu Lu 
> > > > > > Cc: Guomin Jiang 
> > > > > > Signed-off-by: Sergei Dmitrouk 
> > > > > > ---
> > > > > >  CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c | 1 +
> > > > > >  CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c | 1 +
> > > > > >  2 files changed, 2 insertions(+)
> > > > > >
> > > > > > diff --git a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
> > > > > > b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
> > > > > > index 4009d37d5f91..0b2960f06c4c 100644
> > > > > > --- a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
> > > > > > +++ b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
> > > > > > @@ -82,6 +82,7 @@ RsaPssVerify (
> > > > > >EVP_PKEY_CTX *KeyCtx;
> > > > > >CONST EVP_MD  *HashAlg;
> > > > > >
> > > > > > +  Result = FALSE;
> > > > > >EvpRsaKey = NULL;
> > > > > >EvpVerifyCtx = NULL;
> > > > > >KeyCtx = NULL;
> > > > > > diff --git a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c
> > > > > > b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c
> > > > > > index b66b6f7296ad..ece765f9ae0a 100644
> > > > > > --- a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c
> > > > > > +++ b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c
> > > > > > @@ -97,6 +97,7 @@ RsaPssSign (
> > > > > >EVP_PKEY_CTX  *KeyCtx;
> > >

Re: [edk2-devel] [PATCH 1/1] MdePkg: Update DBG2 and SPCR header with NVIDIA 16550 Subtype

2021-05-18 Thread Samer El-Haj-Mahmoud 
Reviewed-by: Samer El-Haj-Mahmoud 

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Ashish
> Singhal via groups.io
> Sent: Tuesday, May 18, 2021 2:38 PM
> To: devel@edk2.groups.io; michael.d.kin...@intel.com;
> gaolim...@byosoft.com.cn; zhiguang@intel.com
> Cc: Ashish Singhal 
> Subject: [edk2-devel] [PATCH 1/1] MdePkg: Update DBG2 and SPCR header with
> NVIDIA 16550 Subtype
>
> Add macros for NVIDIA 16550 UART specific debug port subtype in both
> DBG2 as well as SPCR header file.
>
> Signed-off-by: Ashish Singhal 
>
> ---
>  MdePkg/Include/IndustryStandard/DebugPort2Table.h| 1 +
>  .../IndustryStandard/SerialPortConsoleRedirectionTable.h | 5 +
>  2 files changed, 6 insertions(+)
>
> diff --git a/MdePkg/Include/IndustryStandard/DebugPort2Table.h
> b/MdePkg/Include/IndustryStandard/DebugPort2Table.h
> index 3faa30b76a..6a6fd2590e 100644
> --- a/MdePkg/Include/IndustryStandard/DebugPort2Table.h
> +++ b/MdePkg/Include/IndustryStandard/DebugPort2Table.h
> @@ -43,6 +43,7 @@ typedef struct {
>  #define   EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_FULL_16550
> 0x
>  #define
> EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_SUBSET_COMPATIBLE_WITH_
> MS_DBGP_SPEC  0x0001
>  #define   EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART
> 0x0003
> +#define   EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_NVIDIA_16550_UART
> 0x0005
>  #define
> EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART_2X
> 0x000d
>  #define   EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART
> 0x000e
>  #define   EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_DCC
> 0x000f
> diff --git
> a/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h
> b/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h
> index 2066c7895e..ba19567f52 100644
> --- a/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h
> +++ b/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.
> +++ h
> @@ -80,6 +80,11 @@ typedef struct {
>  ///
>  #define
> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_AR
> M_PL011_UART0x03
>
> +///
> +/// NVIDIA 16550 UART
> +///
> +#define
> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_NV
> IDIA_16550_UART 0x05
> +
>  ///
>  /// ARM SBSA Generic UART (2.x) supporting 32-bit only accesses [deprecated]
> ///
> --
> 2.17.1
>
>
>
> 
>

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Re: [edk2-devel] [PATCH v2 5/5] Maintainers: update Maintainers file as new files/folders created

2021-05-18 Thread Sami Mujawar 

Hi Jianyon,

Thank you for including this patch in the series. There is a patch on 
the mailing list to add me as a reviewer for ArmVirtPkg at package level.
Therefore, this patch would no longer be needed. Apologies for not 
communicating this to you earlier.


Regards,

Sami Mujawar


On 17/05/2021 07:50 AM, Jianyong Wu wrote:

Create new entry for Cloud Hypervisor and assign reviewer to Sami
Mujawar.

Cc: Sami Mujawar 
Signed-off-by: Jianyong Wu 
---
  Maintainers.txt | 7 +++
  1 file changed, 7 insertions(+)

diff --git a/Maintainers.txt b/Maintainers.txt
index cafe6b1ab85d..f8fae067c656 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -167,6 +167,13 @@ F: ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/
  F: ArmVirtPkg/Library/NorFlashKvmtoolLib/
  R: Sami Mujawar 
  
+ArmVirtPkg: Cloud Hypervisor emulated platform support

+F: ArmVirtPkg/ArmVirtCloudHv*
+F: ArmVirtPkg/CloudHvAcpiPlatformDxe/
+F: ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/
+F: ArmVirtPkg/Library/CloudHvVirtMemInfoLib/
+R: Sami Mujawar 
+
  BaseTools
  F: BaseTools/
  W: https://github.com/tianocore/tianocore.github.io/wiki/BaseTools




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Re: [edk2-devel] [PATCH v2 4/5] ArmVirtPkg: Introduce Cloud Hypervisor to edk2 family

2021-05-18 Thread Sami Mujawar 

Hi Jianyon,

Thank you for this patch.

Please find my response inline marked [SAMI].

Regards,

Sami Mujawar


On 17/05/2021 07:50 AM, Jianyong Wu wrote:

Cloud Hypervisor is kvm based VMM and is implemented in rust. Just like
other VMMs it need UEFI support to let ACPI work. That's why
Cloud Hypervisor is introduced here.

Cc: Laszlo Ersek 
Cc: Leif Lindholm 
Cc:
Signed-off-by: Jianyong Wu 
---
  ArmVirtPkg/ArmVirtCloudHv.dsc   | 455 
  ArmVirtPkg/ArmVirtCloudHv.fdf   | 292 +++
  ArmVirtPkg/ArmVirtCloudHvFvMain.fdf.inc | 169 +
  3 files changed, 916 insertions(+)
  create mode 100644 ArmVirtPkg/ArmVirtCloudHv.dsc
  create mode 100644 ArmVirtPkg/ArmVirtCloudHv.fdf
  create mode 100644 ArmVirtPkg/ArmVirtCloudHvFvMain.fdf.inc

diff --git a/ArmVirtPkg/ArmVirtCloudHv.dsc b/ArmVirtPkg/ArmVirtCloudHv.dsc
new file mode 100644
index ..bf1f8c5a75ae
--- /dev/null
+++ b/ArmVirtPkg/ArmVirtCloudHv.dsc
@@ -0,0 +1,455 @@
+#
+#  Copyright (c) 2011-2015, ARM Limited. All rights reserved.
+#  Copyright (c) 2014, Linaro Limited. All rights reserved.
+#  Copyright (c) 2015 - 2020, Intel Corporation. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+
+[Defines]
+  PLATFORM_NAME  = ArmVirtCloudHv
+  PLATFORM_GUID  = DFFED32B-DFFE-D32B-DFFE-D32BDFFED32B
+  PLATFORM_VERSION   = 0.1
+  DSC_SPECIFICATION  = 0x00010005
+  OUTPUT_DIRECTORY   = Build/ArmVirtCloudHv-$(ARCH)
+  SUPPORTED_ARCHITECTURES= AARCH64|ARM
+  BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
+  SKUID_IDENTIFIER   = DEFAULT
+  FLASH_DEFINITION   = ArmVirtPkg/ArmVirtCloudHv.fdf
+
+  #
+  # Defines for default states.  These can be changed on the command line.
+  # -D FLAG=VALUE
+  #
+  DEFINE TTY_TERMINAL= FALSE
+  DEFINE SECURE_BOOT_ENABLE  = FALSE
+  DEFINE TPM2_ENABLE = FALSE
+  DEFINE TPM2_CONFIG_ENABLE  = FALSE
+
+!include ArmVirtPkg/ArmVirt.dsc.inc
+
+[LibraryClasses.common]
+  ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
+  ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
+
+  # Virtio Support
+  VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
+  
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
+  QemuFwCfgLib|ArmVirtPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf
+  QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
+  
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
+  
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
[SAMI] Does Cloud Hypervisor support Qemu-FwCfg? If not, then are the 
above 4 libraries needed?

+
+  
ArmPlatformLib|ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNull.inf
+
+  TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
+  CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
+  BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
+  
PlatformBootManagerLib|ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
[SAMI] The above instance of PlatformBootManagerLibhas a dependency on 
Qemu-FwCfg, right?

+  
PlatformBmPrintScLib|OvmfPkg/Library/PlatformBmPrintScLib/PlatformBmPrintScLib.inf
+  
CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
+  
FrameBufferBltLib|MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf
+  QemuBootOrderLib|OvmfPkg/Library/QemuBootOrderLib/QemuBootOrderLib.inf

[SAMI] Qemu-FwCfg dependency?

+  FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
+  
PciPcdProducerLib|ArmVirtPkg/Library/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
+  PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf
+  
PciHostBridgeLib|ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.inf
+  
PciHostBridgeUtilityLib|OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf
+
+!if $(TPM2_ENABLE) == TRUE
+  Tpm2CommandLib|SecurityPkg/Library/Tpm2CommandLib/Tpm2CommandLib.inf
+  
Tcg2PhysicalPresenceLib|OvmfPkg/Library/Tcg2PhysicalPresenceLibQemu/DxeTcg2PhysicalPresenceLib.inf

[SAMI] Is this supported by Cloud Hypervisor?

+  
TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMeasurementLib.inf
+!else
+  
TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf
+!endif
+
+!include MdePkg/MdeLibs.dsc.inc
+
+[LibraryClasses.common.PEIM]
+  
ArmVirtMemInfoLib|ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLib.inf
+
+!if $(TPM2_ENABLE) == TRUE
+  BaseCryptLib|CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf
+

Re: [edk2-devel] [PATCH v2 3/5] ArmVirtPkg: enable ACPI for cloud hypervisor

2021-05-18 Thread Sami Mujawar 

Hi Jianyon,

Thank you for this patch.

Please find my response inline marked [SAMI].

Regards,

Sami Mujawar


On 17/05/2021 07:50 AM, Jianyong Wu wrote:

The current implementation of PlatformHasAcpiDt is not a common
library and is on behalf of qemu. So give a specific version for
Cloud Hypervisor here.

There is no device like Fw-cfg in qemu in Cloud Hypervisor, so a specific
Acpi handler is introduced here.

The handler implemented here is in a very simple way:
firstly, aquire the Rsdp address from the PCD varaible in the top
".dsc";
secondly, get the Xsdp address from Rsdp structure;
thirdly, get the Acpi tables following the Xsdp structrue and install it
one by one.

Signed-off-by: Jianyong Wu 
---
  .../CloudHvAcpiPlatformDxe.inf| 51 +
  .../CloudHvHasAcpiDtDxe.inf   | 43 +++
  .../CloudHvAcpiPlatformDxe/CloudHvAcpi.c  | 73 +++
  .../CloudHvHasAcpiDtDxe.c | 69 ++
  4 files changed, 236 insertions(+)
  create mode 100644 
ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf
  create mode 100644 
ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf
  create mode 100644 ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpi.c
  create mode 100644 
ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.c
[SAMI] I think these should be split as 2 patches covering 
CloudHvAcpiPlatformDx/* and CloudHvPlatformHasAcpiDtDx/*


diff --git a/ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf 
b/ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf
new file mode 100644
index ..63c74e84eb27
--- /dev/null
+++ b/ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf
@@ -0,0 +1,51 @@
+## @file
+#  OVMF ACPI Platform Driver for Cloud Hypervisor

[SAMI] I think the reference to OVMF can be removed, right?

+#
+#  Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = ClhFwCfgAcpiPlatform

[SAMI] Can ClhFwCfgAcpiPlatform be changed to CloudHvAcpiPlatform?

+  FILE_GUID  = 6c76e407-73f2-dc1c-938f-5d6c4691ea93
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+  ENTRY_POINT= CloudHvAcpiPlatformEntryPoint
+
+#
+# The following information is for reference only and not required by the 
build tools.
+#
+#  VALID_ARCHITECTURES   = IA32 X64 ARM AARCH64
[SAMI] Minor. The above line is just a comment, but can you revisit 
this, please?

+#
+
+[Sources]
+  CloudHvAcpi.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  OvmfPkg/OvmfPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  MemoryAllocationLib
+  OrderedCollectionLib
+  UefiBootServicesTableLib
+  UefiDriverEntryPoint
+
+[Protocols]
+  gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED
+  gEfiPciIoProtocolGuid # PROTOCOL SOMETIMES_CONSUMED

[SAMI] gEfiPciIoProtocolGuidis not used in this module.

+
+[Guids]
+  gRootBridgesConnectedEventGroupGuid

[SAMI] gRootBridgesConnectedEventGroupGuid not used in this module.

+
+[Pcd]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration

[SAMI] PcdPciDisableBusEnumerationis not used in this module.

+  gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiRsdpBaseAddress
+
+[Depex]
+  gEfiAcpiTableProtocolGuid
diff --git a/ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf 
b/ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf
new file mode 100644
index ..f511a4f5064c
--- /dev/null
+++ b/ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf
@@ -0,0 +1,43 @@
+## @file
+# Decide whether the firmware should expose an ACPI- and/or a Device Tree-based
+# hardware description to the operating system.
+#
+# Copyright (c) 2017, Red Hat, Inc.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+  INF_VERSION= 1.25
+  BASE_NAME  = ClhPlatformHasAcpiDtDxe
[SAMI] Is it possible to change the Clh prefix to CloudHv. Same comment 
for other places in this patch series.

+  FILE_GUID  = 71fe72f9-6dc1-199d-5054-13b4200ee88d
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+  ENTRY_POINT= PlatformHasAcpiDt
+
+[Sources]
+  CloudHvHasAcpiDtDxe.c
+
+[Packages]
+  ArmVirtPkg/ArmVirtPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  PcdLib
+  UefiBootServicesTableLib
+  UefiDriverEntryPoint
+
+[Guids]
+  gEdkiiPlatformHasAcpiGuid   ## SOMETIMES_PRODUCES ## PROTOCOL
+  gEdkiiPlatformHasDeviceTreeGuid ## SOMETIMES_PRODUCES ## PROTOCOL
+
+[Pcd]
+  gArmVirtTokenSpaceGuid.PcdForceNoAcpi
+
+[Depex]
+

Re: [edk2-devel] [PATCH v2 2/5] MdeMoudlePkg: introduce new PCD for Acpi/rsdp

2021-05-18 Thread Sami Mujawar 

Hi Jianyon,

Thank you for this patch.

Please find my response inline marked [SAMI].

Regards,

Sami Mujawar


On 17/05/2021 07:50 AM, Jianyong Wu wrote:

As there is lack of a machnism in Cloud Hypervisor to pass the base
address of Rsdp in Acpi, so a PCD varialbe is introduced here to

[SAMI] Please fix the following typos: 'machnism' & 'varialbe'

feed it.

Cc: Hao A Wu 
Cc: Jian J Wang 
Signed-off-by: Jianyong Wu 
---
  MdeModulePkg/MdeModulePkg.dec | 7 +++
  1 file changed, 7 insertions(+)

diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index 148395511034..4c8baac35a9e 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -910,6 +910,13 @@ [PcdsFixedAtBuild]
# @Expression 0x8001 | 
(gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable == 
0x || 
gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable <= 
0x0FFF)

gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|0|UINT64|0x30001015
  
+  ##

+  # This is the physical address of rsdp which is the core struct of Acpi.
+  # Some hypervisor may has no way to pass rsdp address to the guest, so a PCD
+  # is worth for those.
+  #
+  gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiRsdpBaseAddress|0x0|UINT64|0x30001056

[SAMI] Can this PCD be defined in ArmVirtPkg\ArmVirtPkg.dec ?

+
## Progress Code for OS Loader LoadImage start.
#  PROGRESS_CODE_OS_LOADER_LOAD   = (EFI_SOFTWARE_DXE_BS_DRIVER | 
(EFI_OEM_SPECIFIC | 0x)) = 0x03058000
# @Prompt Progress Code for OS Loader LoadImage start.




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Re: [edk2-devel] [PATCH v2 1/5] ArmVirtPkg: Library: Memory initialization for Cloud Hypervisor

2021-05-18 Thread Sami Mujawar 

Hi Jianyon,

Thank you for this patch.

Please find my response inline marked [SAMI].

Regards,

Sami Mujawar

On 17/05/2021 07:50 AM, Jianyong Wu wrote:

Cloud Hypervisor is kvm based VMM implemented in rust.

This library populates the system memory map for the
Cloud Hypervisor virtual platform.

Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Signed-off-by: Jianyong Wu 
---
  .../CloudHvVirtMemInfoPeiLib.inf  |  47 
  .../CloudHvVirtMemInfoLib.c   |  94 
  .../CloudHvVirtMemInfoPeiLibConstructor.c | 100 ++
  3 files changed, 241 insertions(+)
  create mode 100644 
ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLib.inf
  create mode 100644 
ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c
  create mode 100644 
ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLibConstructor.c

diff --git 
a/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLib.inf 
b/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLib.inf
new file mode 100644
index ..71dbf9c06ccc
--- /dev/null
+++ b/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLib.inf
@@ -0,0 +1,47 @@
+#/* @file
+#
+#  Copyright (c) 2011-2015, ARM Limited. All rights reserved.
+#  Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#*/
+
+[Defines]
+  INF_VERSION= 0x0001001A
+  BASE_NAME  = ClhVirtMemInfoPeiLib
+  FILE_GUID  = 3E29D940-0591-EE6A-CAD4-223A9CF55E75
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = ArmVirtMemInfoLib|PEIM
+  CONSTRUCTOR= CloudHvVirtMemInfoPeiLibConstructor
+
+[Sources]
+  CloudHvVirtMemInfoLib.c
+  CloudHvVirtMemInfoPeiLibConstructor.c
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  ArmVirtPkg/ArmVirtPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  ArmLib
+  BaseMemoryLib
+  DebugLib
+  FdtLib
+  PcdLib
+  MemoryAllocationLib
+
+[Pcd]
+  gArmTokenSpaceGuid.PcdFdBaseAddress
+  gArmTokenSpaceGuid.PcdFvBaseAddress
+  gArmTokenSpaceGuid.PcdSystemMemoryBase
+  gArmTokenSpaceGuid.PcdSystemMemorySize
+
+[FixedPcd]
+  gArmTokenSpaceGuid.PcdFdSize
+  gArmTokenSpaceGuid.PcdFvSize
+  gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress
diff --git a/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c 
b/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c
new file mode 100644
index ..69f4e6ab6cc4
--- /dev/null
+++ b/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c
@@ -0,0 +1,94 @@
+/** @file
+
+  Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+// Number of Virtual Memory Map Descriptors
+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  5
+
+//
+// mach-virt's core peripherals such as the UART, the GIC and the RTC are
+// all mapped in the 'miscellaneous device I/O' region, which we just map
+// in its entirety rather than device by device. Note that it does not
+// cover any of the NOR flash banks or PCI resource windows.
+//
+#define MACH_VIRT_PERIPH_BASE   0x0800
+#define MACH_VIRT_PERIPH_SIZE   SIZE_128MB
+
+//
+// in cloud-hypervisor, 0x0 ~ 0x800 is reserved as normal memory for UEFI
+//
+#define CLOUDHV_UEFI_MEM_BASE   0x0
+#define CLOUDHV_UEFI_MEM_SIZE   0x0800

[SAMI] The above macros are not used anywhere. Can these be removed?
If so, the code in this patch would be very similar to 
ArmVirtPkg\Library\QemuVirtMemInfoLib. To avoid code duplication, would 
it be possible to use QemuVirtMemInfoPeiLib.inf instead?

[/SAMI]

+
+/**
+  Return the Virtual Memory Map of your platform
+
+  This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU
+  on your platform.
+
+  @param[out]   VirtualMemoryMapArray of ARM_MEMORY_REGION_DESCRIPTOR
+describing a Physical-to-Virtual Memory
+mapping. This array must be ended by a
+zero-filled entry. The allocated memory
+will not be freed.
+
+**/
+VOID
+ArmVirtGetMemoryMap (
+  OUT ARM_MEMORY_REGION_DESCRIPTOR   **VirtualMemoryMap
+  )
+{
+  ARM_MEMORY_REGION_DESCRIPTOR  *VirtualMemoryTable;
+
+  ASSERT (VirtualMemoryMap != NULL);
+
+  VirtualMemoryTable = AllocatePool (sizeof (ARM_MEMORY_REGION_DESCRIPTOR) *
+ MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
+
+  if (VirtualMemoryTable == NULL) {
+DEBUG ((DEBUG_ERROR, "%a: Error: Failed AllocatePool()\n", __FUNCTION__));
+return;
+  }
+
+  // System DRAM
+  VirtualMemoryTable[0].PhysicalBase = PcdGet64

Re: [edk2-devel] [PATCH] UefiCpuPkg/PiSmmCpu: Remove hardcode 48 address size limitation

2021-05-18 Thread Laszlo Ersek 
On 05/18/21 09:51, Ni, Ray wrote:
> 
> 
>> -Original Message-
>> From: Laszlo Ersek 
>> Sent: Sunday, May 16, 2021 9:39 AM
>> To: devel@edk2.groups.io; Ni, Ray 
>> Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg/PiSmmCpu: Remove hardcode 48 
>> address size limitation
>>
>> On 05/15/21 02:04, Ni, Ray wrote:
>>> Laszlo,
>>> Do you think that another API is also needed: GetPhysicalAddressWidth() 
>>> that returns number 36/52?
>>
>> No. The GetPhysicalAddressBits() function that I proposed already returns 
>> this information. It has three outputs: the number of
>> bits (that is, the width), as return value, and the two optional output 
>> parameters.
>>
>> So if you only need the the bit count, call
>>
>>   GetPhysicalAddressBits (NULL, NULL);
>>
>> These calculations are so cheap and small that keeping them in a single 
>> function makes a lot of sense in my opinion.
> 
> I wasn't aware of the return value of the API. with your API, there is no 
> need for another API to retrieve the address size.
> 
>> For a critical bugfix, I would prefer not mixing the actual fix with the 
>> introduction of the symbolic names. Your patch currently
>> fixes three things at the same time: (1) coding style (it replaces magic 
>> constants with macros / type names), (2) a bug in
>> calculation, (3) a missing CPUID "maximum function" check.
>>
>> Maybe writing a separate patch for each of these is unjustified, but I was 
>> really unhappy to see that the commit message said
>> nothing about (1) and (3), and I had to hunt down (2) between the other 
>> changes.
>>
>> The minimal fix -- that is, the fix for (2) -- would be just one line:
>>
>> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c 
>> b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
>> index fd6583f9d172..4592b76fe595 100644
>> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
>> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
>> @@ -1920,7 +1920,7 @@ InitializeMpServiceData (
>>//
>>AsmCpuid (0x8008, (UINT32*), NULL, NULL, NULL);
>>gPhyMask = LShiftU64 (1, (UINT8)Index) - 1;
>> -  gPhyMask &= (1ull << 48) - EFI_PAGE_SIZE;
>> +  gPhyMask &= 0xf000ULL;
>>
>>//
>>// Create page tables
>>
>>
>> I don't like that the patch currently does three things but only documents 
>> one.
> 
> Thanks for explaining why you don't think it's a good patch. I thought 
> anytime changing a code,
> I should try to make it better, functional better, looks better.

My only point was that separate concerns should be implemented in
separate patches, or at least (if they are really difficult, or
overkill, to isolate) that they should be documented.

Please try to think with your reviewers' mindsets in mind, when
preparing a patch (commit message and code both). The question the patch
author has to ask themselves is not only "how do I implement this", but
also "how do I explain this to my reviewers".

I read the subject line and the commit message. Those make me anticipate
some magic constant (related to 48) in the code. But that's not what I
see in the code. I see new macros, new control flow, new variables, new
indentation. The actual purpose of the patch (as documented in the
commit message) is just a tiny fraction of the whole code change, and
the commit message does not prepare the reader for it. *That* is what's
wrong. Improving code wherever you go is great, but all that effort
needs to be structured correctly, or at least justified in natural language.

Patches exist primarily for humans to read, and secondarily for
computers to execute. If we don't believe in that, then edk2 will never
become a true open source, community project. (In my opinion anyway.)

Thanks
Laszlo

> 
> I will follow your suggestion next time for bug fixes.
> 
>>
>> That said, if you are out of time, feel free to go ahead with Eric's R-b.
> Indeed. thanks for the understanding.
> 
>>
>> Thanks
>> Laszlo
>>
>>
>>
>>>
>>>
>>> 
>>>
>>>
>>>
> 



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[edk2-devel] [PATCH 1/1] MdePkg: Update DBG2 and SPCR header with NVIDIA 16550 Subtype

2021-05-18 Thread Ashish Singhal 
Add macros for NVIDIA 16550 UART specific debug port subtype in both
DBG2 as well as SPCR header file.

Signed-off-by: Ashish Singhal 

---
 MdePkg/Include/IndustryStandard/DebugPort2Table.h| 1 +
 .../IndustryStandard/SerialPortConsoleRedirectionTable.h | 5 +
 2 files changed, 6 insertions(+)

diff --git a/MdePkg/Include/IndustryStandard/DebugPort2Table.h 
b/MdePkg/Include/IndustryStandard/DebugPort2Table.h
index 3faa30b76a..6a6fd2590e 100644
--- a/MdePkg/Include/IndustryStandard/DebugPort2Table.h
+++ b/MdePkg/Include/IndustryStandard/DebugPort2Table.h
@@ -43,6 +43,7 @@ typedef struct {
 #define   EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_FULL_16550 
0x
 #define   
EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_SUBSET_COMPATIBLE_WITH_MS_DBGP_SPEC  
0x0001
 #define   EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART 
0x0003
+#define   EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_NVIDIA_16550_UART  
0x0005
 #define   EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART_2X   
0x000d
 #define   EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART  
0x000e
 #define   EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_DCC
0x000f
diff --git 
a/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h 
b/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h
index 2066c7895e..ba19567f52 100644
--- a/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h
+++ b/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h
@@ -80,6 +80,11 @@ typedef struct {
 ///
 #define 
EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART
0x03
 
+///
+/// NVIDIA 16550 UART
+///
+#define 
EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_NVIDIA_16550_UART 
0x05
+
 ///
 /// ARM SBSA Generic UART (2.x) supporting 32-bit only accesses [deprecated]
 ///
-- 
2.17.1



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[edk2-devel] [PATCH 0/1] Add NVIDIA 16550 UART ACPI Subtype

2021-05-18 Thread Ashish Singhal 
This patch adds macro for NVIDIA 16550 UART subtype for ACPI
tables as documented by Microsoft.

https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup/acpi-debug-port-table

Ashish Singhal (1):
  MdePkg: Update DBG2 and SPCR header with NVIDIA 16550 Subtype

 MdePkg/Include/IndustryStandard/DebugPort2Table.h| 1 +
 .../IndustryStandard/SerialPortConsoleRedirectionTable.h | 5 +
 2 files changed, 6 insertions(+)

-- 
2.17.1



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Re: [edk2-devel] [PATCH v2 0/5] Enable Cloud Hypervisor support in edk2

2021-05-18 Thread Laszlo Ersek 
On 05/17/21 08:50, Jianyong Wu wrote:
> Cloud Hypervisor is an open source Virtual Machine Monitor (VMM) that
> runs on top of KVM. Cloud Hypervisor is implemented in Rust and is based
> on the rust-vmm crates. See [1] to find more.
> 
> To support UEFI, Cloud Hypervisor is introduced here.
> There are three parts to be considered to do this enablements, that is:
>   1. memory initialization
> 
>   2. specific ACPI service implementation
>  compared with qemu, there is no device like Fw-cfg, so we has no
>  elegant way to get the RSDP address. A specific ACPI implementation is
>  introduced here.
> 
>   3. build configuration file
> 
> This enablement bases on the implentation for qemu so some code is
> borrowed.
> 
> [1] https://github.com/cloud-hypervisor/cloud-hypervisor
> 
> Jianyong Wu (5):
>   ArmVirtPkg: Library: Memory initialization for Cloud Hypervisor
>   MdeMoudlePkg: introduce new PCD for Acpi/rsdp
>   ArmVirtPkg: enable ACPI for cloud hypervisor
>   ArmVirtPkg: Introduce Cloud Hypervisor to edk2 family
>   Maintainers: update Maintainers file as new files/folders created
> 
>  MdeModulePkg/MdeModulePkg.dec |   7 +
>  ArmVirtPkg/ArmVirtCloudHv.dsc | 455 ++
>  ArmVirtPkg/ArmVirtCloudHv.fdf | 292 +++
>  .../CloudHvAcpiPlatformDxe.inf|  51 ++
>  .../CloudHvHasAcpiDtDxe.inf   |  43 ++
>  .../CloudHvVirtMemInfoPeiLib.inf  |  47 ++
>  .../CloudHvAcpiPlatformDxe/CloudHvAcpi.c  |  73 +++
>  .../CloudHvHasAcpiDtDxe.c |  69 +++
>  .../CloudHvVirtMemInfoLib.c   |  94 
>  .../CloudHvVirtMemInfoPeiLibConstructor.c | 100 
>  ArmVirtPkg/ArmVirtCloudHvFvMain.fdf.inc   | 169 +++
>  Maintainers.txt   |   7 +
>  12 files changed, 1407 insertions(+)
>  create mode 100644 ArmVirtPkg/ArmVirtCloudHv.dsc
>  create mode 100644 ArmVirtPkg/ArmVirtCloudHv.fdf
>  create mode 100644 
> ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpiPlatformDxe.inf
>  create mode 100644 
> ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf
>  create mode 100644 
> ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLib.inf
>  create mode 100644 ArmVirtPkg/CloudHvAcpiPlatformDxe/CloudHvAcpi.c
>  create mode 100644 
> ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.c
>  create mode 100644 
> ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c
>  create mode 100644 
> ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoPeiLibConstructor.c
>  create mode 100644 ArmVirtPkg/ArmVirtCloudHvFvMain.fdf.inc
> 

Confirming that I got this in my review queue. I'll need some time to
get to it; please bear with me.

Thanks,
Laszlo



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Re: [edk2-devel] [PATCH v2] UefiCpuPkg/MpInitLib: Allocate a separate SEV-ES AP reset stack area

2021-05-18 Thread Marvin Häuser 




On 18.05.21 19:17, Laszlo Ersek wrote:

On 05/17/21 17:03, Lendacky, Thomas wrote:

On 5/16/21 11:22 PM, Laszlo Ersek wrote:

On 05/14/21 22:28, Lendacky, Thomas wrote:

BZ: 
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D3324data=04%7C01%7Cthomas.lendacky%40amd.com%7C8142daa079b04c0b3b5508d918eb6417%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637568221542784370%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000sdata=N9MNXaBazq2tiVRHWSPVXRdlcZ97JOf24mc7p0m5Tqw%3Dreserved=0

The SEV-ES stacks currently share a page with the reset code and data.
Separate the SEV-ES stacks from the reset vector code and data to avoid
possible stack overflows from overwriting the code and/or data.

When SEV-ES is enabled, invoke the GetWakeupBuffer() routine a second time
to allocate a new area, below the reset vector and data.

Both the PEI and DXE versions of GetWakeupBuffer() are changed so that
when PcdSevEsIsEnabled is true, they will track the previous reset buffer
allocation in order to ensure that the new buffer allocation is below the
previous allocation. When PcdSevEsIsEnabled is false, the original logic
is followed.

Fixes: 7b7508ad784d16a5208c8d12dff43aef6df0835b

Is this really a *bugfix*?

I called what's being fixed "a gap in a generic protection mechanism",
in 
.

I don't know if that makes this patch a feature addition (or feature
completion -- the feature being "more extensive page protections"), or a
bugfix.

The distinction matters because of the soft feature freeze:

https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Ftianocore%2Ftianocore.github.io%2Fwiki%2FEDK-II-Release-Planningdata=04%7C01%7Cthomas.lendacky%40amd.com%7C8142daa079b04c0b3b5508d918eb6417%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637568221542784370%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000sdata=1n8z7KFAlm3Vb7fPOFpYQFlZ5lQFOF%2FdLtujjqhns9s%3Dreserved=0

We still have approximately 2 hours before the SFF starts. So if we can
*finish* reviewing this in 2 hours, then it can be merged during the
SFF, even if we call it a feature. But I'd like Marvin to take a look as
well, plus I'd like at least one of Eric and Ray to check.

... I'm tempted not to call it a bugfix, because the lack of this patch
does not break SEV-ES usage, as far as I understand.


Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Rahul Kumar 
Cc: Marvin Häuser 
Signed-off-by: Tom Lendacky 

---

Changes since v1:
- Renamed the wakeup buffer variables to be unique in the PEI and DXE
   libraries and to make it obvious they are SEV-ES specific.
- Use PcdGetBool (PcdSevEsIsEnabled) to make the changes regression-free
   so that the new support is only use for SEV-ES guests.
---
  UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 19 +++-
  UefiCpuPkg/Library/MpInitLib/MpLib.c| 49 +---
  UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 19 +++-
  3 files changed, 69 insertions(+), 18 deletions(-)

diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c 
b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
index 7839c249760e..93fc63bf93e3 100644
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
@@ -29,6 +29,11 @@ VOID *mReservedApLoopFunc = NULL;
  UINTNmReservedTopOfApStack;
  volatile UINT32  mNumberToFinish = 0;
  
+//

+// Begin wakeup buffer allocation below 0x88000
+//
+STATIC EFI_PHYSICAL_ADDRESS mSevEsDxeWakeupBuffer = 0x88000;
+
  /**
Enable Debug Agent to support source debugging on AP function.
  
@@ -102,7 +107,14 @@ GetWakeupBuffer (

// LagacyBios driver depends on CPU Arch protocol which guarantees below
// allocation runs earlier than LegacyBios driver.
//
-  StartAddress = 0x88000;
+  if (PcdGetBool (PcdSevEsIsEnabled)) {
+//
+// SEV-ES Wakeup buffer should be under 0x88000 and under any previous one
+//
+StartAddress = mSevEsDxeWakeupBuffer;
+  } else {
+StartAddress = 0x88000;
+  }
Status = gBS->AllocatePages (
AllocateMaxAddress,
MemoryType,
@@ -112,6 +124,11 @@ GetWakeupBuffer (
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
  StartAddress = (EFI_PHYSICAL_ADDRESS) -1;
+  } else if (PcdGetBool (PcdSevEsIsEnabled)) {
+//
+// Next SEV-ES wakeup buffer allocation must be below this allocation
+//
+mSevEsDxeWakeupBuffer = StartAddress;
}
  
DEBUG ((DEBUG_INFO,

Re: [edk2-devel] [PATCH v2] UefiCpuPkg/MpInitLib: Allocate a separate SEV-ES AP reset stack area

2021-05-18 Thread Laszlo Ersek 
On 05/17/21 17:03, Lendacky, Thomas wrote:
> On 5/16/21 11:22 PM, Laszlo Ersek wrote:
>> On 05/14/21 22:28, Lendacky, Thomas wrote:
>>> BZ: 
>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D3324data=04%7C01%7Cthomas.lendacky%40amd.com%7C8142daa079b04c0b3b5508d918eb6417%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637568221542784370%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000sdata=N9MNXaBazq2tiVRHWSPVXRdlcZ97JOf24mc7p0m5Tqw%3Dreserved=0
>>>
>>> The SEV-ES stacks currently share a page with the reset code and data.
>>> Separate the SEV-ES stacks from the reset vector code and data to avoid
>>> possible stack overflows from overwriting the code and/or data.
>>>
>>> When SEV-ES is enabled, invoke the GetWakeupBuffer() routine a second time
>>> to allocate a new area, below the reset vector and data.
>>>
>>> Both the PEI and DXE versions of GetWakeupBuffer() are changed so that
>>> when PcdSevEsIsEnabled is true, they will track the previous reset buffer
>>> allocation in order to ensure that the new buffer allocation is below the
>>> previous allocation. When PcdSevEsIsEnabled is false, the original logic
>>> is followed.
>>>
>>> Fixes: 7b7508ad784d16a5208c8d12dff43aef6df0835b
>>
>> Is this really a *bugfix*?
>>
>> I called what's being fixed "a gap in a generic protection mechanism",
>> in 
>> .
>>
>> I don't know if that makes this patch a feature addition (or feature
>> completion -- the feature being "more extensive page protections"), or a
>> bugfix.
>>
>> The distinction matters because of the soft feature freeze:
>>
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Ftianocore%2Ftianocore.github.io%2Fwiki%2FEDK-II-Release-Planningdata=04%7C01%7Cthomas.lendacky%40amd.com%7C8142daa079b04c0b3b5508d918eb6417%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637568221542784370%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000sdata=1n8z7KFAlm3Vb7fPOFpYQFlZ5lQFOF%2FdLtujjqhns9s%3Dreserved=0
>>
>> We still have approximately 2 hours before the SFF starts. So if we can
>> *finish* reviewing this in 2 hours, then it can be merged during the
>> SFF, even if we call it a feature. But I'd like Marvin to take a look as
>> well, plus I'd like at least one of Eric and Ray to check.
>>
>> ... I'm tempted not to call it a bugfix, because the lack of this patch
>> does not break SEV-ES usage, as far as I understand.
>>
>>> Cc: Eric Dong 
>>> Cc: Ray Ni 
>>> Cc: Laszlo Ersek 
>>> Cc: Rahul Kumar 
>>> Cc: Marvin Häuser 
>>> Signed-off-by: Tom Lendacky 
>>>
>>> ---
>>>
>>> Changes since v1:
>>> - Renamed the wakeup buffer variables to be unique in the PEI and DXE
>>>   libraries and to make it obvious they are SEV-ES specific.
>>> - Use PcdGetBool (PcdSevEsIsEnabled) to make the changes regression-free
>>>   so that the new support is only use for SEV-ES guests.
>>> ---
>>>  UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 19 +++-
>>>  UefiCpuPkg/Library/MpInitLib/MpLib.c| 49 +---
>>>  UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 19 +++-
>>>  3 files changed, 69 insertions(+), 18 deletions(-)
>>>
>>> diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c 
>>> b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
>>> index 7839c249760e..93fc63bf93e3 100644
>>> --- a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
>>> +++ b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
>>> @@ -29,6 +29,11 @@ VOID *mReservedApLoopFunc = NULL;
>>>  UINTNmReservedTopOfApStack;
>>>  volatile UINT32  mNumberToFinish = 0;
>>>  
>>> +//
>>> +// Begin wakeup buffer allocation below 0x88000
>>> +//
>>> +STATIC EFI_PHYSICAL_ADDRESS mSevEsDxeWakeupBuffer = 0x88000;
>>> +
>>>  /**
>>>Enable Debug Agent to support source debugging on AP function.
>>>  
>>> @@ -102,7 +107,14 @@ GetWakeupBuffer (
>>>// LagacyBios driver depends on CPU Arch protocol which guarantees below
>>>// allocation runs earlier than LegacyBios driver.
>>>//
>>> -  StartAddress = 0x88000;
>>> +  if (PcdGetBool (PcdSevEsIsEnabled)) {
>>> +//
>>> +// SEV-ES Wakeup buffer should be under 0x88000 and under any previous 
>>> one
>>> +//
>>> +StartAddress = mSevEsDxeWakeupBuffer;
>>> +  } else {
>>> +StartAddress = 0x88000;
>>> +  }
>>>Status = gBS->AllocatePages (
>>>AllocateMaxAddress,
>>>MemoryType,
>>> @@ -112,6 +124,11 @@ GetWakeupBuffer (
>>>ASSERT_EFI_ERROR (Status);
>>>if

Re: [edk2-devel] [PATCH] Maintainers.txt: add Sami Mujawar as top-level ArmVirtPkg reviewer

2021-05-18 Thread Laszlo Ersek 
On 05/17/21 15:43, Leif Lindholm wrote:
> On Fri, May 14, 2021 at 12:49 PM Laszlo Ersek  wrote:
>>
>> For distributing ArmVirtPkg patch review tasks better, move Sami Mujawar
>> from the "ArmVirtPkg: Kvmtool" section to the top-level "ArmVirtPkg"
>> section.
>>
>> Given that "ArmVirtPkg: Kvmtool" remains without a specific "R" role,
>> remove "ArmVirtPkg: Kvmtool" altogether.
>>
>> Cc: Andrew Fish 
>> Cc: Ard Biesheuvel 
>> Cc: Julien Grall 
>> Cc: Leif Lindholm 
>> Cc: Michael D Kinney 
>> Cc: Philippe Mathieu-Daudé 
>> Cc: Sami Mujawar 
>> Signed-off-by: Laszlo Ersek 
>> ---
>>  Maintainers.txt | 11 +--
>>  1 file changed, 1 insertion(+), 10 deletions(-)
>>
>> diff --git a/Maintainers.txt b/Maintainers.txt
>> index cafe6b1ab85d..1ec9185e70b9 100644
>> --- a/Maintainers.txt
>> +++ b/Maintainers.txt
>> @@ -143,33 +143,24 @@ M: Ard Biesheuvel 
>>  ArmVirtPkg
>>  F: ArmVirtPkg/
>>  W: https://github.com/tianocore/tianocore.github.io/wiki/ArmVirtPkg
>>  M: Laszlo Ersek 
>>  M: Ard Biesheuvel 
>>  R: Leif Lindholm 
>> +R: Sami Mujawar 
>>
>>  ArmVirtPkg: modules used on Xen
>>  F: ArmVirtPkg/ArmVirtXen.*
>>  F: ArmVirtPkg/Library/XenArmGenericTimerVirtCounterLib/
>>  F: ArmVirtPkg/Library/XenVirtMemInfoLib/
>>  F: ArmVirtPkg/PrePi/
>>  F: ArmVirtPkg/XenAcpiPlatformDxe/
>>  F: ArmVirtPkg/XenPlatformHasAcpiDtDxe/
>>  F: ArmVirtPkg/XenioFdtDxe/
>>  R: Julien Grall 
>>
>> -ArmVirtPkg: Kvmtool emulated platform support
>> -F: ArmVirtPkg/ArmVirtKvmTool.*
>> -F: ArmVirtPkg/KvmtoolPlatformDxe/
>> -F: ArmVirtPkg/Library/Fdt16550SerialPortHookLib/
>> -F: ArmVirtPkg/Library/KvmtoolPlatformPeiLib/
>> -F: ArmVirtPkg/Library/KvmtoolRtcFdtClientLib/
>> -F: ArmVirtPkg/Library/KvmtoolVirtMemInfoLib/
>> -F: ArmVirtPkg/Library/NorFlashKvmtoolLib/
>> -R: Sami Mujawar 
>> -
>>  BaseTools
>>  F: BaseTools/
>>  W: https://github.com/tianocore/tianocore.github.io/wiki/BaseTools
>>  M: Bob Feng 
>>  M: Liming Gao 
>>  R: Yuwei Chen 
> 
> Reviewed-by: Leif Lindholm 

Thanks everybody, I consider this fully reviewed now; I intend to merge
it after the stable tag.

Thanks!
Laszlo



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[edk2-devel] [edk2-platforms][PATCH V3 05/11] Platform/Sgi: Add SMBIOS Type3 Table

2021-05-18 Thread Pranav Madhu 
Add the SMBIOS type 3 table (System Enclosure) that includes information
about manufacturer, type, serial number and other information related to
system enclosure.

Signed-off-by: Pranav Madhu 
Reviewed-by: Sami Mujawar 
---
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf  |   1 +
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h|  22 
+
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c|   1 +
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type3SystemEnclosure.c | 103 

 4 files changed, 127 insertions(+)

diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
index f7beb1c66c80..b3c1619ddc66 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -17,6 +17,7 @@
   SmbiosPlatformDxe.c
   Type0BiosInformation.c
   Type1SystemInformation.c
+  Type3SystemEnclosure.c
 
 [Packages]
   ArmPkg/ArmPkg.dec
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
index e2437b109899..fc18cfc9f369 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
@@ -48,4 +48,26 @@ InstallType1SystemInformation (
   IN EFI_SMBIOS_PROTOCOL*Smbios
   );
 
+/**
+  Install SMBIOS System Enclosure Table
+
+  Install the SMBIOS System Enclosure (type 3) table for Arm's Reference Design
+  platforms.
+
+  @param[in]  Smbios   SMBIOS protocol.
+
+  @retval EFI_SUCCESS   Record was added.
+  @retval EFI_OUT_OF_RESOURCES  Record was not added.
+  @retval EFI_ALREADY_STARTED   The SmbiosHandle passed is already in use.
+**/
+EFI_STATUS
+EFIAPI
+InstallType3SystemEnclosure (
+  IN EFI_SMBIOS_PROTOCOL*Smbios
+  );
+
+typedef enum {
+  SMBIOS_HANDLE_ENCLOSURE = 0x1000,
+} SMBIOS_REFRENCE_HANDLES;
+
 #endif // SMBIOS_PLATFORM_DXE_H_
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
index b9ce50c82b4c..ac4c6120841f 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -28,6 +28,7 @@ STATIC CONST
 ARM_RD_SMBIOS_TABLE_INSTALL_FPTR mSmbiosTableList[] = {
   ,
   ,
+  ,
 };
 
 /**
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type3SystemEnclosure.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type3SystemEnclosure.c
new file mode 100644
index ..146852eb4ae6
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type3SystemEnclosure.c
@@ -0,0 +1,103 @@
+/** @file
+  SMBIOS Type 3 (System enclosure) table for ARM RD platforms.
+
+  This file installs SMBIOS Type 3 (System enclosure) table for Arm Reference
+  Design platforms. SMBIOS Type 3 table (System Enclosure) includes information
+  about manufacturer, type, serial number and other information related to
+  system enclosure.
+
+  Copyright (c) 2021, ARM Limited. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Specification Reference:
+- SMBIOS Reference Specification 3.4.0, Chapter 7.4
+**/
+
+#include 
+#include 
+
+#include "SmbiosPlatformDxe.h"
+
+#define TYPE3_STRINGS   \
+  "ARM LTD\0"   /* Manufacturer */  \
+  "Version not set\0"   /* Version */   \
+  "Serial not set\0"/* Serial */\
+  "Asset Tag not set\0" /* Asset Tag */
+
+typedef enum {
+  ManufacturerName = 1,
+  Version,
+  SerialNumber,
+  AssetTag
+} TYPE3_STRING_ELEMENTS;
+
+/* SMBIOS Type3 structure */
+#pragma pack(1)
+typedef struct {
+  SMBIOS_TABLE_TYPE3  Base;
+  CHAR8   Strings[sizeof (TYPE3_STRINGS)];
+} ARM_RD_SMBIOS_TYPE3;
+#pragma pack()
+
+/* System information */
+STATIC ARM_RD_SMBIOS_TYPE3 mArmRdSmbiosType3 = {
+  {
+{
+  // SMBIOS header
+  EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE,   // Type 3
+  sizeof (SMBIOS_TABLE_TYPE1),// Length
+  SMBIOS_HANDLE_ENCLOSURE,// Assign an unused handle number
+},
+ManufacturerName,   // Manufacturer
+2,  // Enclosure type unknown
+Version,// Version
+SerialNumber,   // Serial
+AssetTag,   // Asset Tag
+ChassisStateSafe,   // Boot chassis state
+ChassisStateSafe,   // Power supply state
+ChassisStateSafe,   // Thermal state
+ChassisSecurityStatusUnknown,   // Security Status
+{0},// BIOS vendor specific Information
+  },
+  // Text strings (unformatted)
+  TYPE3_STRINGS
+};
+

[edk2-devel] [edk2-platforms][PATCH V3 01/11] Platform/Sgi: Define RD-N2 platform id values

2021-05-18 Thread Pranav Madhu 
Add RD-N2 platform identification values including the part number
and configuration number. This information will be used in populating
the SMBIOS tables.

Signed-off-by: Pranav Madhu 
Reviewed-by: Sami Mujawar 
---
 Platform/ARM/SgiPkg/Include/SgiPlatform.h | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h 
b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
index 818879b5f81e..1c5366878712 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2018-2020, ARM Limited. All rights reserved.
+*  Copyright (c) 2018-2021, ARM Limited. All rights reserved.
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -39,6 +39,10 @@
 #define RD_V1_CONF_ID 0x1
 #define RD_V1_MC_CONF_ID  0x2
 
+// RD-N2 Platform Identification values
+#define RD_N2_PART_NUM0x7B7
+#define RD_N2_CONF_ID 0x1
+
 #define SGI_CONFIG_MASK   0x0F
 #define SGI_CONFIG_SHIFT  0x1C
 #define SGI_PART_NUM_MASK 0xFFF
-- 
2.17.1



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[edk2-devel] [edk2-platforms][PATCH V3 02/11] Platform/Sgi: Add GetProductId API for SGI/RD Platforms

2021-05-18 Thread Pranav Madhu 
Add GetProductId API for SGI/RD Platform. The API returns a product id
in integer format based on the platform description data. The product id
is required for other drivers such as SMBIOS.

Signed-off-by: Pranav Madhu 
Reviewed-by: Sami Mujawar 
---
 Platform/ARM/SgiPkg/Include/SgiPlatform.h | 30 +++
 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c | 86 +++-
 2 files changed, 115 insertions(+), 1 deletion(-)

diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h 
b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
index 1c5366878712..4999c9870b49 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -68,4 +68,34 @@ typedef struct {
   UINTN  MultiChipMode;
 } SGI_PLATFORM_DESCRIPTOR;
 
+// Arm SGI/RD Product IDs
+typedef enum {
+  UnknownId = 0,
+  Sgi575,
+  RdN1Edge,
+  RdN1EdgeX2,
+  RdE1Edge,
+  RdV1,
+  RdV1Mc,
+  RdN2
+} ARM_RD_PRODUCT_ID;
+
+// Arm ProductId look-up table
+typedef struct {
+  UINTN  ProductId;
+  UINTN  PlatformId;
+  UINTN  ConfigId;
+  UINTN  MultiChipMode;
+} SGI_PRODUCT_ID_LOOKUP;
+
+/**
+  Derermine the product ID.
+
+  Determine the product ID by using the data in the Platform ID Descriptor HOB
+  to lookup for a matching product ID.
+
+  @retval Zero   Failed identify platform.
+  @retval Others ARM_RD_PRODUCT_ID of the identified platform.
+**/
+UINT8 SgiGetProductId (VOID);
 #endif // __SGI_PLATFORM_H__
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c 
b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
index 9731d7cccede..f27c949dbc24 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*  Copyright (c) 2018-2021, ARM Limited. All rights reserved.
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -8,9 +8,12 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 
+#include "SgiPlatform.h"
+
 UINT64 NtFwConfigDtBlob;
 STATIC SGI_NT_FW_CONFIG_INFO_PPI mNtFwConfigDtInfoPpi;
 
@@ -21,6 +24,51 @@ STATIC ARM_CORE_INFO mCoreInfoTable[] = {
   },
 };
 
+STATIC CONST SGI_PRODUCT_ID_LOOKUP SgiProductIdLookup[] = {
+  {
+Sgi575,
+SGI575_PART_NUM,
+SGI575_CONF_NUM,
+0
+  },
+  {
+RdN1Edge,
+RD_N1E1_EDGE_PART_NUM,
+RD_N1_EDGE_CONF_ID,
+0
+  },
+  {
+RdN1EdgeX2,
+RD_N1E1_EDGE_PART_NUM,
+RD_N1_EDGE_CONF_ID,
+1
+  },
+  {
+RdE1Edge,
+RD_N1E1_EDGE_PART_NUM,
+RD_E1_EDGE_CONF_ID,
+0
+  },
+  {
+RdV1,
+RD_V1_PART_NUM,
+RD_V1_CONF_ID,
+0
+  },
+  {
+RdV1Mc,
+RD_V1_PART_NUM,
+RD_V1_MC_CONF_ID,
+1
+  },
+  {
+RdN2,
+RD_N2_PART_NUM,
+RD_N2_CONF_ID,
+0
+  }
+};
+
 EFI_BOOT_MODE
 ArmPlatformGetBootMode (
   VOID
@@ -75,3 +123,39 @@ ArmPlatformGetPlatformPpiList (
   *PpiListSize = sizeof (gPlatformPpiTable);
   *PpiList = gPlatformPpiTable;
 }
+
+/**
+  Derermine the product ID.
+
+  Determine the product ID by using the data in the Platform ID Descriptor HOB
+  to lookup for a matching product ID.
+
+  @retval Zero   Failed identify platform.
+  @retval Others ARM_RD_PRODUCT_ID of the identified platform.
+**/
+UINT8
+SgiGetProductId (
+  VOID
+  )
+{
+  VOID *SystemIdHob;
+  UINT8 Idx;
+  SGI_PLATFORM_DESCRIPTOR *HobData;
+
+  SystemIdHob = GetFirstGuidHob ();
+  if (SystemIdHob == NULL) {
+return UnknownId;
+  }
+
+  HobData = (SGI_PLATFORM_DESCRIPTOR *)GET_GUID_HOB_DATA (SystemIdHob);
+
+  for (Idx = 0; Idx < ARRAY_SIZE (SgiProductIdLookup); Idx++) {
+if ((HobData->PlatformId == SgiProductIdLookup[Idx].PlatformId) &&
+(HobData->ConfigId == SgiProductIdLookup[Idx].ConfigId) &&
+(HobData->MultiChipMode == SgiProductIdLookup[Idx].MultiChipMode)) {
+  return SgiProductIdLookup[Idx].ProductId;
+}
+  }
+
+  return UnknownId;
+}
-- 
2.17.1



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[edk2-devel] [edk2-platforms][PATCH V3 09/11] Platform/Sgi: Add SMBIOS Type17 Table

2021-05-18 Thread Pranav Madhu 
Add the SMBIOS type 17 table (Memory Device) that includes the
specification of each installed memory device such as size of each
device, bank locator, memory device type, and other related information.

Signed-off-by: Pranav Madhu 
Reviewed-by: Sami Mujawar 
---
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf |   1 +
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h   |  26 ++
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c   |   1 +
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type17MemoryDevice.c  | 298 

 4 files changed, 326 insertions(+)

diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
index ebd19c1882bb..9061c491d461 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -21,6 +21,7 @@
   Type4ProcessorInformation.c
   Type7CacheInformation.c
   Type16PhysicalMemoryArray.c
+  Type17MemoryDevice.c
 
 [Packages]
   ArmPkg/ArmPkg.dec
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
index 95bb2c4bfc70..4e663033d515 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
@@ -122,6 +122,24 @@ InstallType16PhysicalMemoryArray (
   IN EFI_SMBIOS_PROTOCOL*Smbios
   );
 
+
+/**
+  Install SMBIOS memory device table.
+
+  Install the SMBIOS memory device (type 17) table for RD platforms.
+
+  @param[in] Smbios   SMBIOS protocol.
+
+  @retval EFI_SUCCESS   Record was added.
+  @retval EFI_OUT_OF_RESOURCES  Record was not added.
+  @retval EFI_ALREADY_STARTED   The SmbiosHandle passed is already in use.
+**/
+EFI_STATUS
+EFIAPI
+InstallType17MemoryDevice (
+  IN EFI_SMBIOS_PROTOCOL*Smbios
+  );
+
 typedef enum {
   SMBIOS_HANDLE_ENCLOSURE = 0x1000,
   SMBIOS_HANDLE_CLUSTER1,
@@ -131,6 +149,14 @@ typedef enum {
   SMBIOS_HANDLE_L3_CACHE,
   SMBIOS_HANDLE_L4_CACHE,
   SMBIOS_HANDLE_PHYSICAL_MEMORY,
+  SMBIOS_HANDLE_MEMORY_DEVICE,  // Chip 0 Bank 0
+  SMBIOS_HANDLE_MEMORY_DEVICE0001,  // Chip 0 Bank 1
+  SMBIOS_HANDLE_MEMORY_DEVICE0100,  // Chip 1 Bank 0
+  SMBIOS_HANDLE_MEMORY_DEVICE0101,  // Chip 1 Bank 1
+  SMBIOS_HANDLE_MEMORY_DEVICE0200,  // Chip 2 Bank 0
+  SMBIOS_HANDLE_MEMORY_DEVICE0201,  // Chip 2 Bank 1
+  SMBIOS_HANDLE_MEMORY_DEVICE0300,  // Chip 3 Bank 0
+  SMBIOS_HANDLE_MEMORY_DEVICE0301,  // Chip 3 Bank 1
 } SMBIOS_REFRENCE_HANDLES;
 
 #endif // SMBIOS_PLATFORM_DXE_H_
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
index 4f14be165c94..4e6a6b250813 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -32,6 +32,7 @@ ARM_RD_SMBIOS_TABLE_INSTALL_FPTR mSmbiosTableList[] = {
   ,
   ,
   ,
+  ,
 };
 
 /**
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type17MemoryDevice.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type17MemoryDevice.c
new file mode 100644
index ..7ed004bc7f15
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type17MemoryDevice.c
@@ -0,0 +1,298 @@
+/** @file
+  SMBIOS Type 17 (Memory Device) table for ARM RD platforms.
+
+  This file installs SMBIOS Type 17 (Memory Device) table for Arm's Reference
+  Design platforms. It includes the specification of each installed memory
+  device such as size of each device, bank locator, memory device type, and
+  other related information.
+
+  Copyright (c) 2021, ARM Limited. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Specification Reference:
+- SMBIOS Reference Specification 3.4.0, Chapter 7.18
+**/
+
+#include 
+#include 
+#include 
+
+#include "SmbiosPlatformDxe.h"
+
+#define TYPE17_STRINGS  \
+  "Chip 0 Bank 0\0" \
+  "Chip 1 Bank 0\0" \
+  "Chip 2 Bank 0\0" \
+  "Chip 3 Bank 0\0" \
+  "Chip 0 Bank 1\0" \
+  "Chip 1 Bank 1\0" \
+  "Chip 2 Bank 1\0" \
+  "Chip 3 Bank 1\0"
+
+typedef enum {
+  Chip0Bank0 = 1,
+  Chip1Bank0,
+  Chip2Bank0,
+  Chip3Bank0,
+  Chip0Bank1,
+  Chip1Bank1,
+  Chip2Bank1,
+  Chip3Bank1
+} TYPE17_STRING_ELEMENTS;
+
+/* SMBIOS Type17 structure */
+#pragma pack(1)
+typedef struct {
+  SMBIOS_TABLE_TYPE17 Base;
+  CHAR8   Strings[sizeof (TYPE17_STRINGS)];
+} ARM_RD_SMBIOS_TYPE17;
+#pragma pack()
+
+/* Memory Device */
+STATIC ARM_RD_SMBIOS_TYPE17

[edk2-devel] [edk2-platforms][PATCH V3 00/11] Add SMBIOS tables for Arm's Reference Design platforms

2021-05-18 Thread Pranav Madhu 
Changes since V2:
- Addressed comments from Sami
- Picked up Sami's reviewed-by tags.

Changes since V1:
- Rebase the patches on top of latest master branch

SMBIOS provides basic hardware and firmware configuration information
through table-driven data structure. This patch series adds SMBIOS
support for Arm's SGI/RD platforms.

The first patch in this series defines platform-id values for the
RD-N2 platform library header. The second patch add SgiGetProductId API,
which is used by the SMBIOS driver to distinguish between the platforms,
and install the right table. The third patch in this series adds SMBIOS
driver support that allows for installation of multiple SMBIOS tables.
And subsequent patches in this series add SMBIOS tables, which are
mandatory as per Arm serverready SBBR specification.

Link to github branch with the patches in this series -
https://github.com/Pranav-Madhu/edk2-platforms/tree/topics/rd_smbios

Pranav Madhu (11):
  Platform/Sgi: Define RD-N2 platform id values
  Platform/Sgi: Add GetProductId API for SGI/RD Platforms
  Platform/Sgi: Add Initial SMBIOS support
  Platform/Sgi: Add SMBIOS Type1 Table
  Platform/Sgi: Add SMBIOS Type3 Table
  Platform/Sgi: Add SMBIOS Type4 Table
  Platform/Sgi: Add SMBIOS Type7 Table
  Platform/Sgi: Add SMBIOS Type16 Table
  Platform/Sgi: Add SMBIOS Type17 Table
  Platform/Sgi: Add SMBIOS Type19 Table
  Platform/Sgi: Add SMBIOS Type32 Table

 Platform/ARM/SgiPkg/SgiPlatform.dsc.inc   |  11 +
 Platform/ARM/SgiPkg/SgiPlatform.fdf   |   8 +-
 .../SmbiosPlatformDxe/SmbiosPlatformDxe.inf   |  62 
 .../SmbiosPlatformDxe/SmbiosPlatformDxe.h | 197 ++
 Platform/ARM/SgiPkg/Include/SgiPlatform.h |  36 +-
 .../SmbiosPlatformDxe/SmbiosPlatformDxe.c | 106 ++
 .../SmbiosPlatformDxe/Type0BiosInformation.c  | 135 +++
 .../Type16PhysicalMemoryArray.c   | 106 ++
 .../SmbiosPlatformDxe/Type17MemoryDevice.c| 298 +++
 .../Type19MemoryArrayMappedAddress.c  |  97 +
 .../Type1SystemInformation.c  | 142 
 .../Type32SystemBootInformation.c |  84 +
 .../SmbiosPlatformDxe/Type3SystemEnclosure.c  | 103 ++
 .../Type4ProcessorInformation.c   | 219 +++
 .../SmbiosPlatformDxe/Type7CacheInformation.c | 342 ++
 .../SgiPkg/Library/PlatformLib/PlatformLib.c  |  86 -
 16 files changed, 2029 insertions(+), 3 deletions(-)
 create mode 100644 
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
 create mode 100644 
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
 create mode 100644 
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
 create mode 100644 
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type0BiosInformation.c
 create mode 100644 
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type16PhysicalMemoryArray.c
 create mode 100644 
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type17MemoryDevice.c
 create mode 100644 
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type19MemoryArrayMappedAddress.c
 create mode 100644 
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
 create mode 100644 
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type32SystemBootInformation.c
 create mode 100644 
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type3SystemEnclosure.c
 create mode 100644 
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
 create mode 100644 
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c

-- 
2.17.1



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[edk2-devel] [edk2-platforms][PATCH V3 07/11] Platform/Sgi: Add SMBIOS Type7 Table

2021-05-18 Thread Pranav Madhu 
Add the SMBIOS type 7 table (Cache Information) that includes
information about cache levels implemented, cache configuration, ways of
associativity and other information related to cache memory installed.

Signed-off-by: Pranav Madhu 
Reviewed-by: Sami Mujawar 
---
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf   |   1 +
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h |  19 ++
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c |   1 +
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c | 342 

 4 files changed, 363 insertions(+)

diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
index 4652a9c62b88..ee00b773912b 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -19,6 +19,7 @@
   Type1SystemInformation.c
   Type3SystemEnclosure.c
   Type4ProcessorInformation.c
+  Type7CacheInformation.c
 
 [Packages]
   ArmPkg/ArmPkg.dec
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
index 7c2164ae04bf..43f35ea0518f 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
@@ -85,6 +85,25 @@ InstallType4ProcessorInformation (
   IN EFI_SMBIOS_PROTOCOL*Smbios
   );
 
+/**
+  Install SMBIOS Cache information Table
+
+  Install the SMBIOS Cache information (type 7) table for Arm's Reference
+  Design platforms.
+
+  @param[in] Smbios   SMBIOS protocol.
+
+  @retval EFI_SUCCESS   Record was added.
+  @retval EFI_NOT_FOUND Unknown product id.
+  @retval EFI_OUT_OF_RESOURCES  Record was not added.
+  @retval EFI_ALREADY_STARTED   The SmbiosHandle passed is already in use.
+**/
+EFI_STATUS
+EFIAPI
+InstallType7CacheInformation (
+  IN EFI_SMBIOS_PROTOCOL*Smbios
+  );
+
 typedef enum {
   SMBIOS_HANDLE_ENCLOSURE = 0x1000,
   SMBIOS_HANDLE_CLUSTER1,
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
index 7ef6f88a783d..d3b161b77550 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -30,6 +30,7 @@ ARM_RD_SMBIOS_TABLE_INSTALL_FPTR mSmbiosTableList[] = {
   ,
   ,
   ,
+  ,
 };
 
 /**
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
new file mode 100644
index ..6be62900bd71
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
@@ -0,0 +1,342 @@
+/** @file
+  SMBIOS Type 7 (Cache information) table for ARM RD platforms.
+
+  This file installs SMBIOS Type 7 (Cache information) table for Arm's
+  Reference Design platforms. It includes information about cache levels
+  implemented, cache configuration, ways of associativity and other
+  information related to cache memory installed.
+
+  Copyright (c) 2021, ARM Limited. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Specification Reference:
+- SMBIOS Reference Specification 3.4.0, Chapter 7.8
+**/
+
+#include 
+#include 
+
+#include "SgiPlatform.h"
+#include "SmbiosPlatformDxe.h"
+
+#define TYPE7_STRINGS   \
+  "L1 Instruction\0"/* L1I */   \
+  "L1 Data\0"   /* L1D */   \
+  "L2\0"/* L2  */   \
+  "L3\0"/* L3  */   \
+  "SLC\0"   /* L4  */
+
+typedef enum {
+  L1Instruction = 1,
+  L1Data,
+  L2,
+  L3,
+  SLC,
+} TYPE7_STRING_ELEMENTS;
+
+/* SMBIOS Type7 structure */
+#pragma pack(1)
+typedef struct {
+  SMBIOS_TABLE_TYPE7  Base;
+  CHAR8   Strings[sizeof (TYPE7_STRINGS)];
+} ARM_RD_SMBIOS_TYPE7;
+#pragma pack()
+
+/* Cache information */
+STATIC ARM_RD_SMBIOS_TYPE7 mArmRdSmbiosType7[] = {
+  {   // Entry 0, L1 instruction cache
+{
+  {
+// SMBIOS header
+EFI_SMBIOS_TYPE_CACHE_INFORMATION, // Type 7
+sizeof (SMBIOS_TABLE_TYPE7),   // Length
+SMBIOS_HANDLE_L1I_CACHE,   // Handle number
+  },
+  L1Instruction,
+  (
+(1 << 8) | // Write-back
+(1 << 7) | // Cache enabled
+(1 << 3) | // Cache socketed
+0x0// Cache level 1
+  ),
+  0x,  // Uses Maximum cache size 2 field
+  0x,  // Uses Installed cache size 2 field
+  {0, 1},  // Supported SRAM type unknown
+  {0, 1},  // Current SRAM type unknown
+  0,   // Cache Speed Unknown
+

[edk2-devel] [edk2-platforms][PATCH V3 04/11] Platform/Sgi: Add SMBIOS Type1 Table

2021-05-18 Thread Pranav Madhu 
Add the SMBIOS type 1 table (System Information) that includes
information about manufacturer, product name, version, serial number and
other information related to the system identification.

Signed-off-by: Pranav Madhu 
Reviewed-by: Sami Mujawar 
---
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf|   1 +
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h  |  19 
+++
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c  |   1 +
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c | 142 

 4 files changed, 163 insertions(+)

diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
index 3568380f8404..f7beb1c66c80 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -16,6 +16,7 @@
 [Sources]
   SmbiosPlatformDxe.c
   Type0BiosInformation.c
+  Type1SystemInformation.c
 
 [Packages]
   ArmPkg/ArmPkg.dec
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
index a09f89ebe5bc..e2437b109899 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
@@ -29,4 +29,23 @@ InstallType0BiosInformation (
   IN EFI_SMBIOS_PROTOCOL*Smbios
   );
 
+/**
+  Install SMBIOS System information Table.
+
+  Install the SMBIOS system information (type 1) table for Arm's reference
+  design platforms.
+
+  @param[in]  Smbios   SMBIOS protocol.
+
+  @retval EFI_SUCCESS   Record was added.
+  @retval EFI_NOT_FOUND Unknown product id.
+  @retval EFI_OUT_OF_RESOURCES  Record was not added.
+  @retval EFI_ALREADY_STARTED   The SmbiosHandle passed is already in use.
+**/
+EFI_STATUS
+EFIAPI
+InstallType1SystemInformation (
+  IN EFI_SMBIOS_PROTOCOL*Smbios
+  );
+
 #endif // SMBIOS_PLATFORM_DXE_H_
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
index 20d4dedccb82..b9ce50c82b4c 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -27,6 +27,7 @@ typedef EFI_STATUS 
(*ARM_RD_SMBIOS_TABLE_INSTALL_FPTR)(EFI_SMBIOS_PROTOCOL *);
 STATIC CONST
 ARM_RD_SMBIOS_TABLE_INSTALL_FPTR mSmbiosTableList[] = {
   ,
+  ,
 };
 
 /**
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
new file mode 100644
index ..367587c07673
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
@@ -0,0 +1,142 @@
+/** @file
+  SMBIOS Type 1 (System information) table for ARM RD platforms.
+
+  This file installs SMBIOS Type 1 (System information) table for Arm's
+  Reference Design platforms. Type 1 table defines attributes of the
+  overall system such as manufacturer, product name, UUID etc.
+
+  Copyright (c) 2021, ARM Limited. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Specification Reference:
+- SMBIOS Reference Specification 3.4.0, Chapter 7.2
+**/
+
+#include 
+#include 
+#include 
+#include 
+
+#include "SgiPlatform.h"
+
+#define TYPE1_STRINGS   \
+  "ARM LTD\0"   /* Manufacturer */  \
+  "Version not set\0"   /* Version */   \
+  "Serial not set\0"/* Serial number */ \
+  "Not Applicable\0"/* SKU */   \
+  "Not Applicable\0"/* Family */\
+  "SGI575\0"/* Product Names */ \
+  "RdN1Edge\0"  \
+  "RdN1EdgeX2\0"\
+  "RdE1Edge\0"  \
+  "RdV1\0"  \
+  "RdV1Mc\0"\
+  "RdN2\0"
+
+typedef enum {
+  ManufacturerName = 1,
+  Version,
+  SerialNumber,
+  SKU,
+  Family,
+  ProductNameBase
+} TYPE1_STRING_ELEMENTS;
+
+/* SMBIOS Type1 structure */
+#pragma pack(1)
+typedef struct {
+  SMBIOS_TABLE_TYPE1  Base;
+  CHAR8   Strings[sizeof (TYPE1_STRINGS)];
+} ARM_RD_SMBIOS_TYPE1;
+#pragma pack()
+
+STATIC GUID mSmbiosUid[] = {
+  /* Sgi575*/
+  {0xdd7cad0a, 0x227c, 0x4ed4, {0x9f, 0x42, 0xa9, 0x8b, 0xd6, 0xa2, 0x42, 
0x6c}},
+  /* Rd-N1-Edge*/
+  {0x80984efe, 0x404a, 0x43e0, {0xad, 0xa4, 0x63, 0xa0, 0xe0, 0xc4, 0x5e, 
0x60}},
+  /* Rd-N1-Edge-X2 */
+  {0x2cc4f916, 0x267a, 0x4251, {0x95, 0x6e, 0xf0, 0x49, 0x82, 0xbe, 0x94, 
0x58}},
+  /* Rd-E1-Edge*/
+  {0x567f35c4, 0x104f, 0x447b, {0xa0, 0x94, 0x89,

[edk2-devel] [edk2-platforms][PATCH V3 11/11] Platform/Sgi: Add SMBIOS Type32 Table

2021-05-18 Thread Pranav Madhu 
Add the SMBIOS type 32 table (System Boot Information) that includes
information about the System Boot Status.

Signed-off-by: Pranav Madhu 
Reviewed-by: Sami Mujawar 
---
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf |  
1 +
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h   | 
17 
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c   |  
1 +
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type32SystemBootInformation.c | 
84 
 4 files changed, 103 insertions(+)

diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
index f81494114188..4258eb9deadb 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -23,6 +23,7 @@
   Type16PhysicalMemoryArray.c
   Type17MemoryDevice.c
   Type19MemoryArrayMappedAddress.c
+  Type32SystemBootInformation.c
 
 [Packages]
   ArmPkg/ArmPkg.dec
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
index d4b838689a32..f8f69f0785b9 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
@@ -158,6 +158,23 @@ InstallType19MemoryArrayMappedAddress (
   IN EFI_SMBIOS_PROTOCOL*Smbios
   );
 
+/**
+  Install SMBIOS system boot information
+
+  Install the SMBIOS system boot information (type 32) table for RD platforms.
+
+  @param[in] Smbios   SMBIOS protocol.
+
+  @retval EFI_SUCCESS   Record was added.
+  @retval EFI_OUT_OF_RESOURCES  Record was not added.
+  @retval EFI_ALREADY_STARTED   The SmbiosHandle passed is already in use.
+**/
+EFI_STATUS
+EFIAPI
+InstallType32SystemBootInformation (
+  IN EFI_SMBIOS_PROTOCOL*Smbios
+  );
+
 typedef enum {
   SMBIOS_HANDLE_ENCLOSURE = 0x1000,
   SMBIOS_HANDLE_CLUSTER1,
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
index bed5da77786d..29535b247b7c 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -34,6 +34,7 @@ ARM_RD_SMBIOS_TABLE_INSTALL_FPTR mSmbiosTableList[] = {
   ,
   ,
   ,
+  ,
 };
 
 /**
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type32SystemBootInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type32SystemBootInformation.c
new file mode 100644
index ..e98e23fe8fe0
--- /dev/null
+++ 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type32SystemBootInformation.c
@@ -0,0 +1,84 @@
+/** @file
+  SMBIOS Type 32 (System Boot Information) table for ARM RD platforms.
+
+  This file installs SMBIOS Type 32 (System Boot Information) table for Arm's
+  Reference Design platforms. It includes information about the System Boot
+  Status.
+
+  Copyright (c) 2021, ARM Limited. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Specification Reference:
+- SMBIOS Reference Specification 3.4.0, Chapter 7.33
+**/
+
+#include 
+#include 
+#include 
+
+#include "SmbiosPlatformDxe.h"
+
+#define TYPE32_STRINGS  \
+  "\0"  /* Null string */
+
+/* SMBIOS Type32 structure */
+#pragma pack(1)
+typedef struct {
+  SMBIOS_TABLE_TYPE32 Base;
+  CHAR8   Strings[sizeof (TYPE32_STRINGS)];
+} ARM_RD_SMBIOS_TYPE32;
+#pragma pack()
+
+/* System Boot Information */
+STATIC ARM_RD_SMBIOS_TYPE32 mArmRdSmbiosType32 = {
+  {
+{
+  // SMBIOS header
+  EFI_SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION,  // Type 32
+  sizeof (SMBIOS_TABLE_TYPE32), // Length
+  SMBIOS_HANDLE_PI_RESERVED
+},
+{0},// Reserved field
+BootInformationStatusNoError// Boot status
+  },
+  // Text strings (unformatted area)
+  TYPE32_STRINGS
+};
+
+/**
+  Install SMBIOS system boot information
+
+  Install the SMBIOS system boot information (type 32) table for RD platforms.
+
+  @param[in] Smbios   SMBIOS protocol.
+
+  @retval EFI_SUCCESS   Record was added.
+  @retval EFI_OUT_OF_RESOURCES  Record was not added.
+  @retval EFI_ALREADY_STARTED   The SmbiosHandle passed is already in use.
+**/
+EFI_STATUS
+InstallType32SystemBootInformation (
+  IN EFI_SMBIOS_PROTOCOL*Smbios
+  )
+{
+  EFI_STATUS Status;
+  EFI_SMBIOS_HANDLE SmbiosHandle;
+
+  SmbiosHandle = ((EFI_SMBIOS_TABLE_HEADER *))->Handle;
+
+  /* Install type 32 table */
+  Status = Smbios->Add (
+ Smbios,
+ NULL,
+ ,
+ (EFI_SMBIOS_TABLE_HEADER *)
+ );
+  if (EFI_ERROR (Status)) {
+DEBUG ((
+  DEBUG_ERROR,
+

[edk2-devel] [edk2-platforms][PATCH V3 10/11] Platform/Sgi: Add SMBIOS Type19 Table

2021-05-18 Thread Pranav Madhu 
Add the SMBIOS type 19 table (Memory Array Mapped Addr) that includes
information about the address mapping for a Physical Memory Array.

Signed-off-by: Pranav Madhu 
Reviewed-by: Sami Mujawar 
---
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
|  1 +
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h  
| 18 
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c  
|  1 +
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type19MemoryArrayMappedAddress.c 
| 97 
 4 files changed, 117 insertions(+)

diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
index 9061c491d461..f81494114188 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -22,6 +22,7 @@
   Type7CacheInformation.c
   Type16PhysicalMemoryArray.c
   Type17MemoryDevice.c
+  Type19MemoryArrayMappedAddress.c
 
 [Packages]
   ArmPkg/ArmPkg.dec
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
index 4e663033d515..d4b838689a32 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
@@ -140,6 +140,24 @@ InstallType17MemoryDevice (
   IN EFI_SMBIOS_PROTOCOL*Smbios
   );
 
+/**
+  Install SMBIOS memory array mapped address table
+
+  Install the SMBIOS memory array mapped address (type 19) table for RD
+  platforms.
+
+  @param[in] Smbios   SMBIOS protocol.
+
+  @retval EFI_SUCCESS   Record was added.
+  @retval EFI_OUT_OF_RESOURCES  Record was not added.
+  @retval EFI_ALREADY_STARTED   The SmbiosHandle passed is already in use.
+**/
+EFI_STATUS
+EFIAPI
+InstallType19MemoryArrayMappedAddress (
+  IN EFI_SMBIOS_PROTOCOL*Smbios
+  );
+
 typedef enum {
   SMBIOS_HANDLE_ENCLOSURE = 0x1000,
   SMBIOS_HANDLE_CLUSTER1,
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
index 4e6a6b250813..bed5da77786d 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -33,6 +33,7 @@ ARM_RD_SMBIOS_TABLE_INSTALL_FPTR mSmbiosTableList[] = {
   ,
   ,
   ,
+  ,
 };
 
 /**
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type19MemoryArrayMappedAddress.c
 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type19MemoryArrayMappedAddress.c
new file mode 100644
index ..301208c4bc03
--- /dev/null
+++ 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type19MemoryArrayMappedAddress.c
@@ -0,0 +1,97 @@
+/** @file
+  SMBIOS Type 19 (Memory Array Mapped Address) table for ARM RD platforms.
+
+  This file installs SMBIOS Type 19 (Memory Array Mapped Address) table for 
Arm's
+  Reference Design platforms. It includes information about the address mapping
+  for a Physical Memory Array.
+
+  Copyright (c) 2021, ARM Limited. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Specification Reference:
+- SMBIOS Reference Specification 3.4.0, Chapter 7.20
+**/
+
+#include 
+#include 
+#include 
+
+#include "SmbiosPlatformDxe.h"
+
+#define TYPE19_STRINGS  \
+  "\0"  /* Null string */
+
+/* SMBIOS Type19 structure */
+#pragma pack(1)
+typedef struct {
+  SMBIOS_TABLE_TYPE19 Base;
+  CHAR8   Strings[sizeof (TYPE19_STRINGS)];
+} ARM_RD_SMBIOS_TYPE19;
+#pragma pack()
+
+/* Memory Array Mapped Address */
+STATIC ARM_RD_SMBIOS_TYPE19 mArmRdSmbiosType19 = {
+  {
+{
+  // SMBIOS header
+  EFI_SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS,  // Type 19
+  sizeof (SMBIOS_TABLE_TYPE19), // Length
+  SMBIOS_HANDLE_PI_RESERVED,// Assign an unused handle number
+},
+0,  // Starting address
+0,  // Ending address
+SMBIOS_HANDLE_PHYSICAL_MEMORY,  // Memory array handle
+1   // Partition width
+  },
+  // Text strings (unformatted area)
+  TYPE19_STRINGS
+};
+
+/**
+  Install SMBIOS memory array mapped address table
+
+  Install the SMBIOS memory array mapped address (type 19) table for RD
+  platforms.
+
+  @param[in] Smbios   SMBIOS protocol.
+
+  @retval EFI_SUCCESS   Record was added.
+  @retval EFI_OUT_OF_RESOURCES  Record was not added.
+  @retval EFI_ALREADY_STARTED   The SmbiosHandle passed is already in use.
+**/
+EFI_STATUS
+InstallType19MemoryArrayMappedAddress (
+  IN EFI_SMBIOS_PROTOCOL*Smbios
+  )
+{
+  EFI_STATUS Status;
+  EFI_SMBIOS_HANDLE SmbiosHandle;
+
+  SmbiosHandle = ((EFI_SMBIOS_TABLE_HEADER *))->Handle;

[edk2-devel] [edk2-platforms][PATCH V3 08/11] Platform/Sgi: Add SMBIOS Type16 Table

2021-05-18 Thread Pranav Madhu 
Add the SMBIOS type 16 table (Physical Memory Array) describes a
collection of memory devices that operate together to form a memory
address. It includes information about number of devices, total memory
installed, error correction mechanism used and other related information.

Signed-off-by: Pranav Madhu 
Reviewed-by: Sami Mujawar 
---
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf   |   
4 +
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h |  
19 
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c |   
1 +
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type16PhysicalMemoryArray.c | 
106 
 4 files changed, 130 insertions(+)

diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
index ee00b773912b..ebd19c1882bb 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -20,6 +20,7 @@
   Type3SystemEnclosure.c
   Type4ProcessorInformation.c
   Type7CacheInformation.c
+  Type16PhysicalMemoryArray.c
 
 [Packages]
   ArmPkg/ArmPkg.dec
@@ -44,6 +45,9 @@
   gArmPlatformTokenSpaceGuid.PcdClusterCount
   gArmPlatformTokenSpaceGuid.PcdCoreCount
   gArmSgiTokenSpaceGuid.PcdChipCount
+  gArmSgiTokenSpaceGuid.PcdDramBlock2Size
+  gArmTokenSpaceGuid.PcdSystemMemoryBase
+  gArmTokenSpaceGuid.PcdSystemMemorySize
   gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareRevision
 
 [Protocols]
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
index 43f35ea0518f..95bb2c4bfc70 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
@@ -104,6 +104,24 @@ InstallType7CacheInformation (
   IN EFI_SMBIOS_PROTOCOL*Smbios
   );
 
+/**
+  Install SMBIOS physical memory array table.
+
+  Install the SMBIOS physical memory array (type 16) table for Arm's Reference
+  Design platforms.
+
+  @param[in] Smbios   SMBIOS protocol.
+
+  @retval EFI_SUCCESS   Record was added.
+  @retval EFI_OUT_OF_RESOURCES  Record was not added.
+  @retval EFI_ALREADY_STARTED   The SmbiosHandle passed is already in use.
+**/
+EFI_STATUS
+EFIAPI
+InstallType16PhysicalMemoryArray (
+  IN EFI_SMBIOS_PROTOCOL*Smbios
+  );
+
 typedef enum {
   SMBIOS_HANDLE_ENCLOSURE = 0x1000,
   SMBIOS_HANDLE_CLUSTER1,
@@ -112,6 +130,7 @@ typedef enum {
   SMBIOS_HANDLE_L2_CACHE,
   SMBIOS_HANDLE_L3_CACHE,
   SMBIOS_HANDLE_L4_CACHE,
+  SMBIOS_HANDLE_PHYSICAL_MEMORY,
 } SMBIOS_REFRENCE_HANDLES;
 
 #endif // SMBIOS_PLATFORM_DXE_H_
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
index d3b161b77550..4f14be165c94 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -31,6 +31,7 @@ ARM_RD_SMBIOS_TABLE_INSTALL_FPTR mSmbiosTableList[] = {
   ,
   ,
   ,
+  ,
 };
 
 /**
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type16PhysicalMemoryArray.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type16PhysicalMemoryArray.c
new file mode 100644
index ..b1b41bf405a2
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type16PhysicalMemoryArray.c
@@ -0,0 +1,106 @@
+/** @file
+  SMBIOS Type 16 (Physical Memory Array) table for ARM RD platforms.
+
+  This file installs SMBIOS Type 16 (Physical Memory Array) table for Arm's
+  Reference Design platforms. It describes a collection of memory devices that
+  operate together to form a memory address. It includes information about
+  number of devices, total memory installed, error correction mechanism used
+  and other related information.
+
+  Copyright (c) 2021, ARM Limited. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Specification Reference:
+- SMBIOS Reference Specification 3.4.0, Chapter 7.17
+**/
+
+#include 
+#include 
+#include 
+
+#include "SmbiosPlatformDxe.h"
+
+#define TYPE16_STRINGS  \
+  "\0"  /* Null string */
+
+/* SMBIOS Type16 structure */
+#pragma pack(1)
+typedef struct {
+  SMBIOS_TABLE_TYPE16 Base;
+  CHAR8   Strings[sizeof (TYPE16_STRINGS)];
+} ARM_RD_SMBIOS_TYPE16;
+#pragma pack()
+
+/* Physical Memory Array */
+STATIC ARM_RD_SMBIOS_TYPE16 mArmRdSmbiosType16 = {
+  {
+{
+  // SMBIOS header
+  EFI_SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY, // Type 16
+  sizeof (SMBIOS_TABLE_TYPE16),  // Length
+  SMBIOS_HANDLE_PHYSICAL_MEMORY
+},
+MemoryArrayLocationSystemBoard, // Location
+MemoryArrayUseSystemMemory, // Used as system memory
+

[edk2-devel] [edk2-platforms][PATCH V3 06/11] Platform/Sgi: Add SMBIOS Type4 Table

2021-05-18 Thread Pranav Madhu 
Add the SMBIOS type 4 table (Processor Information) that includes
information about manufacture, family, processor id, maximum operating
frequency, and other information related to the processor.

Signed-off-by: Pranav Madhu 
Reviewed-by: Sami Mujawar 
---
 Platform/ARM/SgiPkg/SgiPlatform.dsc.inc   |   
1 +
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf   |   
6 +
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h |  
25 +++
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c |   
1 +
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c | 
219 
 5 files changed, 252 insertions(+)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
index a0f217f5107c..091de0c99c74 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -56,6 +56,7 @@
   HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
   
MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf
   PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
 
 [LibraryClasses.common.DXE_DRIVER]
   FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
index b3c1619ddc66..4652a9c62b88 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -18,6 +18,7 @@
   Type0BiosInformation.c
   Type1SystemInformation.c
   Type3SystemEnclosure.c
+  Type4ProcessorInformation.c
 
 [Packages]
   ArmPkg/ArmPkg.dec
@@ -27,9 +28,11 @@
   Platform/ARM/SgiPkg/SgiPlatform.dec
 
 [LibraryClasses]
+  ArmLib
   ArmPlatformLib
   DebugLib
   HobLib
+  PrintLib
   UefiDriverEntryPoint
 
 [Guids]
@@ -37,6 +40,9 @@
   gArmSgiPlatformIdDescriptorGuid
 
 [FixedPcd]
+  gArmPlatformTokenSpaceGuid.PcdClusterCount
+  gArmPlatformTokenSpaceGuid.PcdCoreCount
+  gArmSgiTokenSpaceGuid.PcdChipCount
   gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareRevision
 
 [Protocols]
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
index fc18cfc9f369..7c2164ae04bf 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
@@ -66,8 +66,33 @@ InstallType3SystemEnclosure (
   IN EFI_SMBIOS_PROTOCOL*Smbios
   );
 
+/**
+  Install SMBIOS Processor information Table
+
+  Install the SMBIOS Processor information (type 4) table for Arm's Reference
+  Design platforms.
+
+  @param[in]  Smbios   SMBIOS protocol.
+
+  @retval EFI_SUCCESS   Record was added.
+  @retval EFI_NOT_FOUND Unknown product id.
+  @retval EFI_OUT_OF_RESOURCES  Record was not added.
+  @retval EFI_ALREADY_STARTED   The SmbiosHandle passed is already in use.
+**/
+EFI_STATUS
+EFIAPI
+InstallType4ProcessorInformation (
+  IN EFI_SMBIOS_PROTOCOL*Smbios
+  );
+
 typedef enum {
   SMBIOS_HANDLE_ENCLOSURE = 0x1000,
+  SMBIOS_HANDLE_CLUSTER1,
+  SMBIOS_HANDLE_L1I_CACHE,
+  SMBIOS_HANDLE_L1D_CACHE,
+  SMBIOS_HANDLE_L2_CACHE,
+  SMBIOS_HANDLE_L3_CACHE,
+  SMBIOS_HANDLE_L4_CACHE,
 } SMBIOS_REFRENCE_HANDLES;
 
 #endif // SMBIOS_PLATFORM_DXE_H_
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
index ac4c6120841f..7ef6f88a783d 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -29,6 +29,7 @@ ARM_RD_SMBIOS_TABLE_INSTALL_FPTR mSmbiosTableList[] = {
   ,
   ,
   ,
+  ,
 };
 
 /**
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
new file mode 100644
index ..9ecaea3603de
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
@@ -0,0 +1,219 @@
+/** @file
+  SMBIOS Type 4 (Processor information) table for ARM RD platforms.
+
+  This file installs SMBIOS Type 4 (Processor information) Table for Arm's
+  Reference Design platforms. It includes information about manufacture,
+  family, processor id, maximum operating frequency, and other information
+  related to the processor.
+
+  Copyright (c) 2021, ARM Limited. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Specification Reference:
+- SMBIOS Reference Specification 3.4.0, Chapter 7.5
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "SgiPlatform.h"
+#include "SmbiosPlatformDxe.h"
+
+#define

[edk2-devel] [edk2-platforms][PATCH V3 03/11] Platform/Sgi: Add Initial SMBIOS support

2021-05-18 Thread Pranav Madhu 
SMBIOS provides basic hardware and firmware configuration information
through table-driven data structure. This patch adds SMBIOS driver
support that allows for installation of multiple SMBIOS types. Also add
SMBIOS Type0 (BIOS Information) table, that include information about
BIOS vendor name, version, SMBIOS version and other information related
to BIOS.

Signed-off-by: Pranav Madhu 
Reviewed-by: Sami Mujawar 
---
 Platform/ARM/SgiPkg/SgiPlatform.dsc.inc  |  10 ++
 Platform/ARM/SgiPkg/SgiPlatform.fdf  |   8 +-
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf  |  46 
+++
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h|  32 
+
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c|  98 
++
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type0BiosInformation.c | 135 

 6 files changed, 328 insertions(+), 1 deletion(-)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
index 42e3600d15f4..a0f217f5107c 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -109,6 +109,10 @@
   # ACPI Table Version
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
 
+  # SMBIOS entry point version
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0304
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosDocRev|0x0
+
   #
   # PCIe
   #
@@ -247,6 +251,12 @@
   MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
   MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
 
+  #
+  # SMBIOS/DMI
+  #
+  MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
+  Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+
   #
   # platform driver
   #
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf 
b/Platform/ARM/SgiPkg/SgiPlatform.fdf
index da23804828e5..e11d943d6efc 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.fdf
+++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf
@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2018, ARM Limited. All rights reserved.
+#  Copyright (c) 2018-2021, ARM Limited. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -102,6 +102,12 @@ READ_LOCK_STATUS   = TRUE
   INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
 !include $(BOARD_DXE_FV_COMPONENTS)
 
+  #
+  # SMBIOS/DMI
+  #
+  INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
+  INF Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+
   # Required by PCI
   INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
 
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
new file mode 100644
index ..3568380f8404
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -0,0 +1,46 @@
+## @file
+#  This driver installs SMBIOS information for RD Platforms
+#
+#  Copyright (c) 2021, ARM Limited. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+  INF_VERSION= 0x0001001A
+  BASE_NAME  = SmbiosPlatformDxe
+  FILE_GUID  = 86e0aa8b-4f8d-44a5-a140-1f693d529c76
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+  ENTRY_POINT= SmbiosTableEntryPoint
+
+[Sources]
+  SmbiosPlatformDxe.c
+  Type0BiosInformation.c
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  Platform/ARM/SgiPkg/SgiPlatform.dec
+
+[LibraryClasses]
+  ArmPlatformLib
+  DebugLib
+  HobLib
+  UefiDriverEntryPoint
+
+[Guids]
+  gEfiGlobalVariableGuid
+  gArmSgiPlatformIdDescriptorGuid
+
+[FixedPcd]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareRevision
+
+[Protocols]
+  gEfiSmbiosProtocolGuid  # PROTOCOL ALWAYS_CONSUMED
+
+[Guids]
+
+[Depex]
+  gEfiSmbiosProtocolGuid
diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
new file mode 100644
index ..a09f89ebe5bc
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.h
@@ -0,0 +1,32 @@
+/** @file
+  Declarations required for SMBIOS DXE driver.
+
+  Functions declarations and data type declarations required for SMBIOS DXE
+  driver of the Arm Reference Design platforms.
+
+  Copyright (c) 2021, ARM Limited. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef SMBIOS_PLATFORM_DXE_H_
+#define SMBIOS_PLATFORM_DXE_H_
+
+/**
+  Install SMBIOS BIOS information Table.
+
+  Install the SMBIOS BIOS information (type 0) table for Arm's reference design
+  platforms.
+
+  @param[in] Smbios   SMBIOS protocol.
+
+  @retval EFI_SUCCESS   Record was added.
+  @retval EFI_OUT_OF_RESOURCES  Record was not added.

[edk2-devel] [PATCH v2 1/3] ShellPkg/HttpDynamicCommand: Fix possible uninitialized use

2021-05-18 Thread Sergei Dmitrouk 
`Status` can be used uninitialized:

/* Evaluates to FALSE */
if (ShellGetExecutionBreakFlag ()) {
Status = EFI_ABORTED;
break;
}

/* Evaluates to FALSE */
if (!Context->ContentDownloaded && !Context->ResponseToken.Event) {
Status = ...;
ASSERT_EFI_ERROR (Status);
} else {
ResponseMessage.Data.Response = NULL;
}

/* UNINITIALIZED USE */
if (EFI_ERROR (Status)) {
break;
}

Cc: Ray Ni 
Cc: Zhichao Gao 
Signed-off-by: Sergei Dmitrouk 
---
 ShellPkg/DynamicCommand/HttpDynamicCommand/Http.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/ShellPkg/DynamicCommand/HttpDynamicCommand/Http.c 
b/ShellPkg/DynamicCommand/HttpDynamicCommand/Http.c
index 3735a4a7e645..7b9b2d238015 100644
--- a/ShellPkg/DynamicCommand/HttpDynamicCommand/Http.c
+++ b/ShellPkg/DynamicCommand/HttpDynamicCommand/Http.c
@@ -1524,6 +1524,7 @@ GetResponse (
   Context->ResponseToken.Message = 
   Context->ContentLength = 0;
   Context->Status = REQ_OK;
+  Status = EFI_SUCCESS;
   MsgParser = NULL;
   ResponseData.StatusCode = HTTP_STATUS_UNSUPPORTED_STATUS;
   ResponseMessage.Data.Response = 
-- 
2.17.6



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[edk2-devel] [PATCH v2 2/3] MdeModulePkg/PciBusDxe: Fix possible uninitialized use

2021-05-18 Thread Sergei Dmitrouk 
If the function gets invalid value for the `ResizableBarOp` parameter
and asserts are disabled, `Bit` can be used uninitialized.

Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Ray Ni 
Signed-off-by: Sergei Dmitrouk 
---

Notes:
v2:
- simplify if-statement to avoid unused branches

 MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
index 6bba28367165..4caac56f1dcd 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
@@ -1778,10 +1778,9 @@ PciProgramResizableBar (
 
 if (ResizableBarOp == PciResizableBarMax) {
   Bit = HighBitSet64(Capabilities);
-} else if (ResizableBarOp == PciResizableBarMin) {
+} else {
+  ASSERT (ResizableBarOp == PciResizableBarMin);
   Bit = LowBitSet64(Capabilities);
-} else {
-  ASSERT ((ResizableBarOp == PciResizableBarMax) || (ResizableBarOp == 
PciResizableBarMin));
 }
 
 ASSERT (Bit >= 0);
-- 
2.17.6



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[edk2-devel] GSoC 2021: audio output protocol

2021-05-18 Thread Ethin Probst 
Greetings everyone!

I've been selected as a student coder for the audio output protocol
project with Ray Ni and Leif Lindholm as my mentors. This is my first
time doing GSoC and working on EDK II so this will be very enjoyable
and a wonderful learning opportunity for me. (It'll also give me
something to do over the summer, which is always a plus.)

Some of you have already communicated with me in the past, both about
this proposal and about UEFI accessibility in general, and I'm glad to
be working with you guys again. I'm primarily on Linux (Arch Linux to
be exact) and I've already got my development environment set up and
can fully compile OVMF. However, though I've read a bit through the
UEFI driver manual, I certainly haven't read all of it, and I'm still
quite unfamiliar with the EDK II code as a whole. So, how can I use
this community bonding period to get to grips with the development
process? What else do I need to learn?

I apologize for not having many questions to ask -- this is my first
time so I'm not really sure. :-) I can't wait to begin working with
all of you this summer!

-- 
Signed,
Ethin D. Probst


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[edk2-devel] [PATCH v2 3/3] CryptoPkg/BaseCryptLib: Fix possible uninitialized use

2021-05-18 Thread Sergei Dmitrouk 
`Result` can be used uninitialized in both functions after following
either first or second `goto` statement.

Cc: Jiewen Yao 
Cc: Jian J Wang 
Cc: Xiaoyu Lu 
Cc: Guomin Jiang 
Signed-off-by: Sergei Dmitrouk 
---
 CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c | 1 +
 CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c | 1 +
 2 files changed, 2 insertions(+)

diff --git a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c 
b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
index 4009d37d5f91..0b2960f06c4c 100644
--- a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
+++ b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
@@ -82,6 +82,7 @@ RsaPssVerify (
   EVP_PKEY_CTX *KeyCtx;
   CONST EVP_MD  *HashAlg;
 
+  Result = FALSE;
   EvpRsaKey = NULL;
   EvpVerifyCtx = NULL;
   KeyCtx = NULL;
diff --git a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c 
b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c
index b66b6f7296ad..ece765f9ae0a 100644
--- a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c
+++ b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c
@@ -97,6 +97,7 @@ RsaPssSign (
   EVP_PKEY_CTX  *KeyCtx;
   CONST EVP_MD  *HashAlg;
 
+  Result = FALSE;
   EvpRsaKey = NULL;
   EvpVerifyCtx = NULL;
   KeyCtx = NULL;
-- 
2.17.6



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Re: [edk2-devel] [PATCH v2 04/13] MdePkg/Register/Amd: define GHCB macro for Register GPA structure

2021-05-18 Thread Laszlo Ersek 
On 05/17/21 20:25, Erdem Aktas wrote:
> I verified that the values align with the GHCB spec publication:
> #56421 Revision: 2.00
> 
> Just one question: is there any reason why GHCB_* defines are decimal
> while the SVM_EXIT_* are all in hexadecimal? Does EDK2 have any
> preference?

(I'm unaware of any preference in edk2 -- it's probably best to stick
with the base that the spec itself uses, but even using a different base
is not a huge deal, if the numbers in question are not large.)

Thanks!
Laszlo

> 
> Reviewed-by: Erdem Aktas 
> 
> -Erdem
> 
> On Wed, May 12, 2021 at 4:46 PM Brijesh Singh  wrote:
>>
>> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275
>>
>> An SEV-SNP guest is required to perform the GHCB GPA registration. See
>> the GHCB specification for further details.
>>
>> Cc: James Bottomley 
>> Cc: Min Xu 
>> Cc: Jiewen Yao 
>> Cc: Tom Lendacky 
>> Cc: Jordan Justen 
>> Cc: Ard Biesheuvel 
>> Cc: Laszlo Ersek 
>> Cc: Erdem Aktas 
>> Cc: Michael D Kinney 
>> Cc: Liming Gao 
>> Cc: Zhiguang Liu 
>> Reviewed-by: Laszlo Ersek 
>> Reviewed-by: Liming Gao 
>> Signed-off-by: Brijesh Singh 
>> ---
>>  MdePkg/Include/Register/Amd/Fam17Msr.h | 7 +++
>>  1 file changed, 7 insertions(+)
>>
>> diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h 
>> b/MdePkg/Include/Register/Amd/Fam17Msr.h
>> index cdb8f588ccf8..542e4cdf4782 100644
>> --- a/MdePkg/Include/Register/Amd/Fam17Msr.h
>> +++ b/MdePkg/Include/Register/Amd/Fam17Msr.h
>> @@ -53,6 +53,11 @@ typedef union {
>>  UINT64  Features:52;
>>} GhcbHypervisorFeatures;
>>
>> +  struct {
>> +UINT64  Function:12;
>> +UINT64  GuestFrameNumber:52;
>> +  } GhcbGpaRegister;
>> +
>>VOID*Ghcb;
>>
>>UINT64  GhcbPhysicalAddress;
>> @@ -62,6 +67,8 @@ typedef union {
>>  #define GHCB_INFO_SEV_INFO_GET  2
>>  #define GHCB_INFO_CPUID_REQUEST 4
>>  #define GHCB_INFO_CPUID_RESPONSE5
>> +#define GHCB_INFO_GHCB_GPA_REGISTER_REQUEST 18
>> +#define GHCB_INFO_GHCB_GPA_REGISTER_RESPONSE19
>>  #define GHCB_HYPERVISOR_FEATURES_REQUEST128
>>  #define GHCB_HYPERVISOR_FEATURES_RESPONSE   129
>>  #define GHCB_INFO_TERMINATE_REQUEST 256
>> --
>> 2.17.1
>>
> 



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Re: [edk2-devel] [PATCH v2 06/13] MdePkg/Register/Amd: define GHCB macros for SNP AP creation

2021-05-18 Thread Laszlo Ersek 
On 05/17/21 16:17, Tom Lendacky wrote:
> On 5/16/21 10:08 PM, Laszlo Ersek wrote:
>> Patches v2 01-05 look good to me, thanks for the updates. Now on to this
>> one:
>>
>> On 05/13/21 01:46, Brijesh Singh wrote:
>>> From: Tom Lendacky 
>>>
>>> BZ: 
>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D3D3275data=04%7C01%7Cthomas.lendacky%40amd.com%7C55d74e19a5554988e0b608d918e1215c%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637568177488739589%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000sdata=ZIy6xEXWmxgVxZm6mrdlroM7OPQajEjUSD8W5z2ohu0%3Dreserved=0
>>
>> (1) The "3D" seems like a typo in the bug ticket URL. (This crept into
>> v2 somehow; v1 didn't have it.)
>>
>>>
>>> Version 2 of GHCB introduces NAE for creating AP when SEV-SNP is enabled
>>> in the guest VM. See the GHCB specification, Table 5 "List of Supported
>>> Non-Automatic Events" and sections 4.1.9 and 4.3.2, for further details.
>>>
>>> While at it, define the VMSA state save area that is required for creating
>>> the AP. The save area format is defined in AMD APM volume 2, Table B-4
>>> (there is a mistake in the table that defines the size of the reserved
>>> area at offset 0xc8 as a dword, when it is actually a word). The format of
>>> the save area segment registers is further defined in AMD APM volume 2,
>>> sections 10 and 15.5.
>>>
>>> Cc: James Bottomley 
>>> Cc: Min Xu 
>>> Cc: Jiewen Yao 
>>> Cc: Tom Lendacky 
>>> Cc: Jordan Justen 
>>> Cc: Ard Biesheuvel 
>>> Cc: Laszlo Ersek 
>>> Cc: Erdem Aktas 
>>> Cc: Michael D Kinney 
>>> Cc: Liming Gao 
>>> Cc: Zhiguang Liu 
>>> Reviewed-by: Liming Gao 
>>> Signed-off-by: Tom Lendacky 
>>> Signed-off-by: Brijesh Singh 
>>> ---
>>>  MdePkg/Include/Register/Amd/Ghcb.h | 76 ++
>>>  1 file changed, 76 insertions(+)
>>>
>>> diff --git a/MdePkg/Include/Register/Amd/Ghcb.h 
>>> b/MdePkg/Include/Register/Amd/Ghcb.h
>>> index 029904b1c63a..4d1ee29e0a5e 100644
>>> --- a/MdePkg/Include/Register/Amd/Ghcb.h
>>> +++ b/MdePkg/Include/Register/Amd/Ghcb.h
>>> @@ -55,6 +55,7 @@
>>>  #define SVM_EXIT_AP_RESET_HOLD  0x8004ULL
>>>  #define SVM_EXIT_AP_JUMP_TABLE  0x8005ULL
>>>  #define SVM_EXIT_SNP_PAGE_STATE_CHANGE  0x8010ULL
>>> +#define SVM_EXIT_SNP_AP_CREATION0x8013ULL
>>>  #define SVM_EXIT_HYPERVISOR_FEATURES0x8000FFFDULL
>>>  #define SVM_EXIT_UNSUPPORTED0x8000ULL
>>>  
>>> @@ -83,6 +84,12 @@
>>>  #define IOIO_SEG_ES 0
>>>  #define IOIO_SEG_DS (BIT11 | BIT10)
>>>  
>>> +//
>>> +// AP Creation Information
>>> +//
>>> +#define SVM_VMGEXIT_SNP_AP_CREATE_ON_INIT  0
>>> +#define SVM_VMGEXIT_SNP_AP_CREATE  1
>>> +#define SVM_VMGEXIT_SNP_AP_DESTROY 2
>>>  
>>>  typedef PACKED struct {
>>>UINT8  Reserved1[203];
>>> @@ -195,4 +202,73 @@ typedef struct {
>>>SNP_PAGE_STATE_ENTRY   Entry[SNP_PAGE_STATE_MAX_ENTRY];
>>>  } SNP_PAGE_STATE_CHANGE_INFO;
>>>  
>>> +//
>>> +// SEV-ES save area mapping structures used for SEV-SNP AP Creation.
>>> +// Only the fields required to be set to a non-zero value are defined.
>>> +//
>>> +#define SEV_ES_RESET_CODE_SEGMENT_TYPE  0xA
>>> +#define SEV_ES_RESET_DATA_SEGMENT_TYPE  0x2
>>> +
>>> +#define SEV_ES_RESET_LDT_TYPE   0x2
>>> +#define SEV_ES_RESET_TSS_TYPE   0x3
>>> +
>>> +#pragma pack (1)
>>> +typedef union {
>>> +struct {
>>> +  UINT16  Type:4;
>>> +  UINT16  Sbit:1;
>>> +  UINT16  Dpl:2;
>>> +  UINT16  Present:1;
>>> +  UINT16  Avl:1;
>>> +  UINT16  Reserved1:1;
>>> +  UINT16  Db:1;
>>> +  UINT16  Granularity:1;
>>> +} Bits;
>>> +UINT16  Uint16;
>>> +} SEV_ES_SEGMENT_REGISTER_ATTRIBUTES;
>>> +
>>> +typedef struct {
>>> +  UINT16Selector;
>>> +  SEV_ES_SEGMENT_REGISTER_ATTRIBUTESAttributes;
>>> +  UINT32Limit;
>>> +  UINT64Base;
>>> +} SEV_ES_SEGMENT_REGISTER;
>>> +
>>
>> I'm not saying anything is incorrect about this, but I *am* going to
>> rant about the APM.
> 
> Yes, the APM is definitely lacking in this area.
> 
>>
>> It's simply impenetrable. I've been staring at it for ~50 minutes now,
>> and I still cannot fully connect it to your code.
>>
>> [1] In sections "4.8.1 Code-Segment Descriptors" and "4.8.2 Data-Segment
>> Descriptors", the reader is introduced to the "normal" (not SEV-ES, not
>> virtualized, not SMM) segment descriptors. Why *these* are relevant
>> *here* is nothing short of mind-boggling, but please bear with me.
>>
>> [2] In section "10.2.3 SMRAM State-Save Area", "Table 10-1. AMD64
>> Architecture SMM State-Save Area", the reader is introduced to the
>> 2+2+4+8 segment register representation. The table only lists "Selector,
>> Attributes, Limit, Base" as fields, and nothing about the actual
>>

[edk2-devel] [PATCH v1 0/3] Fix possible uninitialized uses

2021-05-18 Thread Sergei Dmitrouk 
v1:

Compiling for IA32 target with gcc-5.5.0 emits "maybe-uninitialized" warnings.
Compilation command: build -a IA32 -p OvmfPkg/OvmfPkgIa32.dsc -t GCC49

Unlike other cases mentioned in
https://bugzilla.tianocore.org/show_bug.cgi?id=3228
these seem to be actual issues in the code.  Read patches for specifics.

v2:

Second patch was simplified.

Sergei Dmitrouk (3):
  ShellPkg/HttpDynamicCommand: Fix possible uninitialized use
  MdeModulePkg/PciBusDxe: Fix possible uninitialized use
  CryptoPkg/BaseCryptLib: Fix possible uninitialized use

 CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c | 1 +
 CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c | 1 +
 MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 5 ++---
 ShellPkg/DynamicCommand/HttpDynamicCommand/Http.c   | 1 +
 4 files changed, 5 insertions(+), 3 deletions(-)

-- 
2.17.6



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Re: 回复: [edk2-devel] [PATCH v1 3/3] CryptoPkg/BaseCryptLib: Fix possible uninitialized use

2021-05-18 Thread Sergei Dmitrouk 
Yes, adding `-ffat-lto-objects` makes the warning appear even with GCC 5.5.0.

Regards,
Sergei

On Tue, May 18, 2021 at 08:59:05AM +0800, gaoliming wrote:
> Sergei:
>   Yes. GCC49 is LTO disable GCC tool chain. GCC5 is LTO enable tool chain.
> They both work on the different GCC version, such as gcc5, gcc6..
> 
>   https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90844 mentions
> -ffat-lto-objects option that can trig the warning with LTO option. Do you
> try it?
> 
>   If this option works, we can update GCC5 tool chain definition in
> tools_def.txt, then this issue can be detected in CI GCC5 build. 
> 
> Thanks
> Liming
> > -邮件原件-
> > 发件人: devel@edk2.groups.io  代表 Sergei
> > Dmitrouk
> > 发送时间: 2021年5月15日 21:01
> > 收件人: devel@edk2.groups.io; jiewen@intel.com
> > 抄送: Wang, Jian J ; Lu, XiaoyuX
> > ; Jiang, Guomin 
> > 主题: Re: [edk2-devel] [PATCH v1 3/3] CryptoPkg/BaseCryptLib: Fix possible
> > uninitialized use
> > 
> > Hello Jiewen,
> > 
> > I get the error only for GCC49 and not for GCC5 toolchain.  CI uses GCC5.
> > 
> > So I compared build commands and this seems to depend on LTO.  Adding
> > `-flto`
> > impedes compiler's ability to detect such simple issues.
> > 
> > I've found relevant bug report, there is even fix suggestion from last
> month:
> > 
> > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90844
> > 
> > Regards,
> > Sergei
> > 
> > On Sat, May 15, 2021 at 12:30:44AM +, Yao, Jiewen wrote:
> > > Hi Sergei
> > > Thank you very much for the fix.
> > > Reviewed-by: Jiewen Yao 
> > >
> > > I am a little surprised why it is not caught before. It is an obvious
> logic issue.
> > >
> > > Do you think we can do anything on CI, to catch it during pre-check-in
> in the
> > future?
> > > I just feel it is burden to make it post-check-in fix.
> > >
> > >
> > > Thank you
> > > Yao Jiewen
> > >
> > > > -Original Message-
> > > > From: Sergei Dmitrouk 
> > > > Sent: Friday, May 14, 2021 8:17 PM
> > > > To: devel@edk2.groups.io
> > > > Cc: Yao, Jiewen ; Wang, Jian J
> > ;
> > > > Lu, XiaoyuX ; Jiang, Guomin
> > 
> > > > Subject: [PATCH v1 3/3] CryptoPkg/BaseCryptLib: Fix possible
> uninitialized
> > use
> > > >
> > > > `Result` can be used uninitialized in both functions after following
> > > > either first or second `goto` statement.
> > > >
> > > > Cc: Jiewen Yao 
> > > > Cc: Jian J Wang 
> > > > Cc: Xiaoyu Lu 
> > > > Cc: Guomin Jiang 
> > > > Signed-off-by: Sergei Dmitrouk 
> > > > ---
> > > >  CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c | 1 +
> > > >  CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c | 1 +
> > > >  2 files changed, 2 insertions(+)
> > > >
> > > > diff --git a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
> > > > b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
> > > > index 4009d37d5f91..0b2960f06c4c 100644
> > > > --- a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
> > > > +++ b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPss.c
> > > > @@ -82,6 +82,7 @@ RsaPssVerify (
> > > >EVP_PKEY_CTX *KeyCtx;
> > > >CONST EVP_MD  *HashAlg;
> > > >
> > > > +  Result = FALSE;
> > > >EvpRsaKey = NULL;
> > > >EvpVerifyCtx = NULL;
> > > >KeyCtx = NULL;
> > > > diff --git a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c
> > > > b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c
> > > > index b66b6f7296ad..ece765f9ae0a 100644
> > > > --- a/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c
> > > > +++ b/CryptoPkg/Library/BaseCryptLib/Pk/CryptRsaPssSign.c
> > > > @@ -97,6 +97,7 @@ RsaPssSign (
> > > >EVP_PKEY_CTX  *KeyCtx;
> > > >CONST EVP_MD  *HashAlg;
> > > >
> > > > +  Result = FALSE;
> > > >EvpRsaKey = NULL;
> > > >EvpVerifyCtx = NULL;
> > > >KeyCtx = NULL;
> > > > --
> > > > 2.17.6
> > 
> > 
> > 
> > 
> 
> 
> 
> 
> 
> 
> 
> 


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Re: [edk2-devel] [PATCH] UefiCpuPkg/MpInitLib: Allocate a separate SEV-ES AP reset stack area

2021-05-18 Thread Laszlo Ersek 
On 05/17/21 00:15, Marvin Häuser wrote:
> Am 16.05.2021 um 03:17 schrieb Laszlo Ersek:
>> On 05/14/21 17:44, Marvin Häuser wrote:
>>> On 14.05.21 17:23, Lendacky, Thomas wrote:
 On 5/14/21 10:04 AM, Marvin Häuser wrote:
>>
>> +  // Check to be sure that the "allocate below" behavior hasn't
>> changed.
>> +  // This will also catch a failed allocation, as "-1" is
>> returned on
>> +  // failure.
>> +  //
>> +  if (CpuMpData->SevEsAPResetStackStart >=
>> CpuMpData->WakeupBuffer) {
>> +    DEBUG ((DEBUG_ERROR,
>> +  "SEV-ES AP reset stack is not below wakeup buffer\n"));
>> +
>> +    ASSERT (FALSE);
> Should the ASSERT not only catch the broken "allocate below"
> behaviour,
> i.e. not trigger on failed allocation?
 I think it's best to trigger on a failed allocation as well rather than
 continuing and allowing a page fault or some other problem to occur.
>>>
>>> Well, it should handle the error in a safe way, i.e. the deadloop below.
>>> To not ASSERT on plausible conditions is a common design guideline in
>>> most low-level projects including Linux kernel.
>>>
>>> Best regards,
>>> Marvin
>>>
 Thanks,
 Tom

>> +    CpuDeadLoop ();
>>
>> "DEBUG + ASSERT(FALSE) + CpuDeadLoop()" is a pattern in edk2.
>>
>> In RELEASE builds, it will lead to a CpuDeadLoop(). That's the main goal
>> -- don't continue execution if the condition controlling the whole block
>> fired.
>>
>> In DEBUG and NOOPT builds, the pattern will lead to a debug message
>> (usually at the "error" level), followed by an assertion failure. The
>> error message of the assertion failure is irrelevant ("FALSE"). The
>> point of adding ASSERT ahead of CpuDeadLoop() is that the way ASSERT
>> hangs execution is customizable, via "PcdDebugPropertyMask", unlike
>> CpuDeadLoop(). In many cases, ASSERT() uses CpuDeadLoop() itself, so the
>> effect is the same -- the explicit CpuDeadLoop is not reached. In other
>> configs, ASSERT() can raise a debug exception (CpuBreakpoint()).
> 
> I absolutely do not *expect* Tom to change this, it was just a slight
> remark (as many places have this anyway). I'll still try to explain why
> I made that remark, but for whom it is of no interest, I do not expect
> it to be read. I'm fine with the patch as-is myself. Thank you a lot, Tom!
> 
> 
> 
> I know it, unfortunately, is a pattern in EDK II - taking this pattern
> too far is what caused the 8-revision patch regarding untrusted inputs
> we submitted previously. :)
> 
> There are many concerns about unconventional ASSERTs, though I must
> admit none but one (and that one barely) really apply here, which is why
> I have trouble explaining why I believe it should be changed. Here are
> some reasons outside the context of this patch:
> 
> 1) Consistency between DEBUG and RELEASE builds: I think one can justify
> to have a breakpoint on a condition that may realistically occur. But a
> deadloop can give a wrong impression about how production code works.
> E.g. it also is a common pattern in EDK II to ASSERT on memory
> allocation failure but *not* have a proper check after, so DEBUG builds
> will nicely error or deadloop, while RELEASE goes ahead and causes a CPU
> exception or memory corruption depending on the context. Thus,
> real-world error handling cannot really be tested. This does not apply
> because there *is* a RELEASE deadloop.
> 
> 2) Static analysis: Some static analysers use ASSERT information for
> their own analysis, and try to give hints about unsafe or unreachable
> code based on own annotations. This kind of applies, but only when
> substituting EDK II ASSERT with properly recognisable ASSERTs (e.g.
> __builtin_unreachable).
> 
> 2) Dynamic analysis: ASSERTs can be useful when fuzzing for example.
> Enabled Sanitizers will only catch unsafe behaviour, but maybe you have
> some extra code in place to sanity-check the results further. An ASSERT
> yields an error dump (usually followed by the worker dying). However, as
> allocation failures are perfectly expected, this can cause a dramatic
> about of False Positives and testing interruption. This does not apply
> because deadloop'd code cannot really be fuzz-tested anyway.
> 
> ASSERTs really are designed as unbreakable conditions, i.e. 1)
> preconditions 2) invariants 3) postconditions. No allocator in early
> kernel-space or lower can really guarantee allocation success, thus it
> cannot be a postcondition of any such function. And while it might make
> debugging look a bit easier (but you will see from the backtrace anyway
> where you halted), it messes with all tools that assume proper usage.
> 
> Also, I just realised, you can of course see it from the address value
> when debugging, but you cannot see it from the ASSERT or DEBUG message
> *which* of the two logical error conditions failed (i.e. broken
> allocator or OOM). Changing the ASSERT would fix that. :)

I'm OK if the

Re: [edk2-devel] [edk2-platforms][PATCH v2 4/6] Drivers/OpTee: Add Aarch32 SVC IDs for 32bit Arm targets

2021-05-18 Thread Sami Mujawar 

Hi Etienn,

This patch looks good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar


On 17/05/2021 06:50 AM, Etienne Carriere wrote:

Add SMCCC function IDs for RPMB read/write service on 32bit architectures.
Define generic SP_SVC_RPMB_READ/SP_SVC_RPMB_WRITE IDs for native target
architecture (32b or 64b).

Changes OpTeeRpmbFvb.c to use architecture agnostic macro
ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ for 32b and 64b support.

Cc: Ard Biesheuvel 
Cc: Ilias Apalodimas 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Signed-off-by: Etienne Carriere 
---
Changes since v1:
- Use _AARCH64 (resp. _AARCH32) suffix instead of _64 (resp. _32) in
   the added macros.
---
  Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c |  2 +-
  Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.h | 16 ++--
  2 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c 
b/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c
index 5197c95abd..6eb19bed0e 100644
--- a/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c
+++ b/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c
@@ -68,7 +68,7 @@ ReadWriteRpmb (
  
ZeroMem (, sizeof (SvcArgs));
  
-  SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64;

+  SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ;
SvcArgs.Arg1 = mStorageId;
SvcArgs.Arg2 = 0;
SvcArgs.Arg3 = SvcAct;
diff --git a/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.h 
b/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.h
index c17fc287ef..9c2a4ea6a5 100644
--- a/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.h
+++ b/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.h
@@ -13,8 +13,20 @@
   contract between OP-TEE and EDK2.
   For more details check core/arch/arm/include/kernel/stmm_sp.h in OP-TEE
  **/
-#define SP_SVC_RPMB_READ0xC466
-#define SP_SVC_RPMB_WRITE   0xC467
+#define SP_SVC_RPMB_READ_AARCH640xC466
+#define SP_SVC_RPMB_WRITE_AARCH64   0xC467
+
+#define SP_SVC_RPMB_READ_AARCH320x8466
+#define SP_SVC_RPMB_WRITE_AARCH32   0x8467
+
+#ifdef MDE_CPU_AARCH64
+#define SP_SVC_RPMB_READSP_SVC_RPMB_READ_AARCH64
+#define SP_SVC_RPMB_WRITE   SP_SVC_RPMB_WRITE_AARCH64
+#endif
+#ifdef MDE_CPU_ARM
+#define SP_SVC_RPMB_READSP_SVC_RPMB_READ_AARCH32
+#define SP_SVC_RPMB_WRITE   SP_SVC_RPMB_WRITE_AARCH32
+#endif
  
  #define FLASH_SIGNATURESIGNATURE_32 ('r', 'p', 'm', 'b')

  #define INSTANCE_FROM_FVB_THIS(a)  CR (a, MEM_INSTANCE, FvbProtocol, \




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Re: [edk2-devel] [edk2-platforms][PATCH v2 6/6] Platform/StandaloneMm: build StandaloneMmRpmb for 32bit architectures

2021-05-18 Thread Sami Mujawar 

Hi Etienn,

This patch looks good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar


On 17/05/2021 06:50 AM, Etienne Carriere wrote:

Build PlatformStandaloneMmRpmb for ARM architecture (32bit arm machine).
The generated image targets an execution environment similar to AArch64
StMM secure partition in OP-TEE but in 32bit mode.

GCC flag -fno-stack-protector
added. The stack protection code bring
GOT dependencies we prefer avoid when StMM runs in OP-TEE.

Cc: Ard Biesheuvel 
Cc: Ilias Apalodimas 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Signed-off-by: Etienne Carriere 
---
Changes since v1:
- Remove useless duplication of ArmSvcLib loading.
- Move BaseStackCheckLib to generic library classes instead of ARM only.
- include MdePkg/MdeLibs.dsc.inc
instead of loading
   RegisterFilterLibNull.inf for ARM architecture.
---
  Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc | 
12 +++-
  1 file changed, 11 insertions(+), 1 deletion(-)

diff --git 
a/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc 
b/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc
index cb3f1ddf52..33364deb1e 100644
--- a/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc
+++ b/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc
@@ -16,12 +16,14 @@
PLATFORM_VERSION   = 1.0
DSC_SPECIFICATION  = 0x0001001C
OUTPUT_DIRECTORY   = Build/$(PLATFORM_NAME)
-  SUPPORTED_ARCHITECTURES= AARCH64
+  SUPPORTED_ARCHITECTURES= ARM|AARCH64
BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER   = DEFAULT
FLASH_DEFINITION   = 
Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.fdf
DEFINE DEBUG_MESSAGE   = TRUE
  
+!include MdePkg/MdeLibs.dsc.inc

+
  

  #
  # Library Class section - list of all Library Classes needed by this Platform.
@@ -39,6 +41,7 @@
FvLib|StandaloneMmPkg/Library/FvLib/FvLib.inf

HobLib|StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib.inf
IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+  NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
MemLib|StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf

MemoryAllocationLib|StandaloneMmPkg/Library/StandaloneMmCoreMemoryAllocationLib/StandaloneMmCoreMemoryAllocationLib.inf
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
@@ -68,6 +71,9 @@
#
NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
  
+[LibraryClasses.ARM]

+  ArmSoftFloatLib|ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf
+
  [LibraryClasses.common.MM_STANDALONE]
HobLib|StandaloneMmPkg/Library/StandaloneMmHobLib/StandaloneMmHobLib.inf

MmServicesTableLib|MdePkg/Library/StandaloneMmServicesTableLib/StandaloneMmServicesTableLib.inf
@@ -160,3 +166,7 @@
  [BuildOptions.AARCH64]
  GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000 -march=armv8-a+nofp
  GCC:*_*_*_CC_FLAGS = -mstrict-align
+
+[BuildOptions.ARM]
+GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000 -march=armv7-a
+GCC:*_*_*_CC_FLAGS = -fno-stack-protector




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Re: [edk2-devel] [edk2-platforms][PATCH v2 5/6] Drivers/OpTee: address cast build warning issue in 32b mode

2021-05-18 Thread Sami Mujawar 

Hi Etienn,

This patch looks good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar


On 17/05/2021 06:50 AM, Etienne Carriere wrote:

Use (UINTN) cast to cast physical or virtual address values to the
pointer size before casting from/to a pointer value.

Cc: Ard Biesheuvel 
Cc: Ilias Apalodimas 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Signed-off-by: Etienne Carriere 
---
No change since v1
---
  Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c | 21 +---
  1 file changed, 14 insertions(+), 7 deletions(-)

diff --git a/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c 
b/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c
index 6eb19bed0e..83c2750368 100644
--- a/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c
+++ b/Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFvb.c
@@ -305,7 +305,8 @@ OpTeeRpmbFvbRead (
  }
}
  
-  Base = (VOID *)Instance->MemBaseAddress + (Lba * Instance->BlockSize) + Offset;

+  Base = (VOID *)(UINTN)Instance->MemBaseAddress + (Lba * Instance->BlockSize) 
+
+ Offset;
// We could read the data from the RPMB instead of memory
// The 2 copies should already be identical
// Copy from memory image
@@ -387,7 +388,8 @@ OpTeeRpmbFvbWrite (
return Status;
  }
}
-  Base = (VOID *)Instance->MemBaseAddress + Lba * Instance->BlockSize + Offset;
+  Base = (VOID *)(UINTN)Instance->MemBaseAddress + (Lba * Instance->BlockSize) 
+
+ Offset;
Status = ReadWriteRpmb (
   SP_SVC_RPMB_WRITE,
   (UINTN)Buffer,
@@ -477,7 +479,8 @@ OpTeeRpmbFvbErase (
return EFI_INVALID_PARAMETER;
  }
  NumBytes = NumLba * Instance->BlockSize;
-Base = (VOID *)Instance->MemBaseAddress + Start * Instance->BlockSize;
+Base = (VOID *)(UINTN)Instance->MemBaseAddress +
+   (Start * Instance->BlockSize);
  Buf = AllocatePool (NumLba * Instance->BlockSize);
  if (Buf == NULL) {
return EFI_DEVICE_ERROR;
@@ -689,7 +692,7 @@ InitializeFvAndVariableStoreHeaders (
  goto Exit;
}
// Install the combined header in memory
-  CopyMem ((VOID*)Instance->MemBaseAddress, Headers, HeadersLength);
+  CopyMem ((VOID*)(UINTN)Instance->MemBaseAddress, Headers, HeadersLength);
  
  Exit:

FreePool (Headers);
@@ -747,14 +750,18 @@ FvbInitialize (
// Read the file from disk and copy it to memory
ReadEntireFlash (Instance);
  
-  FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER *)Instance->MemBaseAddress;

+  FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)Instance->MemBaseAddress;
Status = ValidateFvHeader (FwVolHeader);
if (EFI_ERROR (Status)) {
  // There is no valid header, so time to install one.
  DEBUG ((DEBUG_INFO, "%a: The FVB Header is not valid.\n", __FUNCTION__));
  
  // Reset memory

-SetMem64 ((VOID *)Instance->MemBaseAddress, Instance->NBlocks * 
Instance->BlockSize, ~0UL);
+SetMem64 (
+  (VOID *)(UINTN)Instance->MemBaseAddress,
+  Instance->NBlocks * Instance->BlockSize,
+  ~0UL
+  );
  DEBUG ((DEBUG_INFO, "%a: Erasing Flash.\n", __FUNCTION__));
  Status = ReadWriteRpmb (
 SP_SVC_RPMB_WRITE,
@@ -827,7 +834,7 @@ OpTeeRpmbFvbInit (
mInstance.FvbProtocol.Write  = OpTeeRpmbFvbWrite;
mInstance.FvbProtocol.Read   = OpTeeRpmbFvbRead;
  
-  mInstance.MemBaseAddress = (EFI_PHYSICAL_ADDRESS)Addr;

+  mInstance.MemBaseAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)Addr;
mInstance.Signature  = FLASH_SIGNATURE;
mInstance.Initialize = FvbInitialize;
mInstance.BlockSize  = EFI_PAGE_SIZE;




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Re: [edk2-devel] [edk2-platforms][PATCH v2 1/6] Platform/ARM/SgiPkg: sync with edk2 StandaloneMmCpu path change

2021-05-18 Thread Sami Mujawar 

Hi Etienn,

This patch looks good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar


On 17/05/2021 06:50 AM, Etienne Carriere wrote:

Synchronize with edk2 package where StandaloneMmCpu component has moved
from StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf
to StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf

Cc: Ard Biesheuvel 
Cc: Ilias Apalodimas 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sughosh Ganu 
Cc: Thomas Abraham 
Signed-off-by: Etienne Carriere 
---
Changes since v1:
- split change in 3: this change relates to Platform/ARM/SgiPkg only.
---
  Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc | 2 +-
  Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf | 2 +-
  2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc 
b/Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc
index e281d54909..1e0af23711 100644
--- a/Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc
+++ b/Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc
@@ -122,7 +122,7 @@
StandaloneMmPkg/Core/StandaloneMmCore.inf
  
  [Components.AARCH64]

-  StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf
+  StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf
  
  ###

  #
diff --git a/Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf 
b/Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf
index 5a0772cd85..96b4272dd6 100644
--- a/Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf
+++ b/Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf
@@ -49,7 +49,7 @@ READ_LOCK_CAP  = TRUE
  READ_LOCK_STATUS   = TRUE
  
INF StandaloneMmPkg/Core/StandaloneMmCore.inf

-  INF StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf
+  INF StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf
  
  

  #




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Re: [edk2-devel] [edk2-platforms][PATCH v2 3/6] Platform/StandaloneMm: sync with edk2 StandaloneMmCpu path change

2021-05-18 Thread Sami Mujawar 

Hi Etienn,

This patch looks good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar


On 17/05/2021 06:50 AM, Etienne Carriere wrote:

Synchronize with edk2 package where StandaloneMmCpu component has moved
from StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf
to StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf

Cc: Ard Biesheuvel 
Cc: Ilias Apalodimas 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sughosh Ganu 
Cc: Thomas Abraham 
Signed-off-by: Etienne Carriere 
---
Changes since v1:
- split change in 3: this change relates to StandaloneMm package only.
---
  Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc | 
2 +-
  Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.fdf | 
3 ++-
  2 files changed, 3 insertions(+), 2 deletions(-)

diff --git 
a/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc 
b/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc
index f99a47ebf6..cb3f1ddf52 100644
--- a/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc
+++ b/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc
@@ -133,7 +133,7 @@
#
Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFv.inf
StandaloneMmPkg/Core/StandaloneMmCore.inf
-  StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf
+  StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf

MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteStandaloneMm.inf 
{
  
NULL|Drivers/OpTee/OpteeRpmbPkg/FixupPcd.inf
diff --git 
a/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.fdf 
b/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.fdf
index e175dc7b2d..c4295a3e63 100644
--- a/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.fdf
+++ b/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.fdf
@@ -68,7 +68,8 @@ READ_LOCK_STATUS   = TRUE
INF Drivers/OpTee/OpteeRpmbPkg/OpTeeRpmbFv.inf
INF 
MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteStandaloneMm.inf
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableStandaloneMm.inf
-  INF StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf
+  INF StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf
+
  

  #
  # Rules are use with the [FV] section's module INF type to define




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Re: [edk2-devel] [edk2-platforms][PATCH v2 2/6] Platform/Socionext/DeveloperBox: sync with edk2 StandaloneMmCpu path change

2021-05-18 Thread Sami Mujawar 

Hi Etienn,

This patch looks good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar


On 17/05/2021 06:50 AM, Etienne Carriere wrote:

Synchronize with edk2 package where StandaloneMmCpu component has moved
from StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf
to StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf

Cc: Ard Biesheuvel 
Cc: Ilias Apalodimas 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sughosh Ganu 
Cc: Thomas Abraham 
Signed-off-by: Etienne Carriere 
---
Changes since v1:
- split change in 3: this change relates to DeveloperBox only.
---
  Platform/Socionext/DeveloperBox/DeveloperBoxMm.dsc | 2 +-
  Platform/Socionext/DeveloperBox/DeveloperBoxMm.fdf | 2 +-
  2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/Platform/Socionext/DeveloperBox/DeveloperBoxMm.dsc 
b/Platform/Socionext/DeveloperBox/DeveloperBoxMm.dsc
index e078de4bbb..b5524f87a6 100644
--- a/Platform/Socionext/DeveloperBox/DeveloperBoxMm.dsc
+++ b/Platform/Socionext/DeveloperBox/DeveloperBoxMm.dsc
@@ -80,7 +80,7 @@
gEfiMdePkgTokenSpaceGuid.PcdMaximumGuidedExtractHandler|0x2
}
  
-  StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf

+  StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf
Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006StandaloneMm.inf

MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteStandaloneMm.inf
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableStandaloneMm.inf {
diff --git a/Platform/Socionext/DeveloperBox/DeveloperBoxMm.fdf 
b/Platform/Socionext/DeveloperBox/DeveloperBoxMm.fdf
index 33de03c8e7..89453477c9 100644
--- a/Platform/Socionext/DeveloperBox/DeveloperBoxMm.fdf
+++ b/Platform/Socionext/DeveloperBox/DeveloperBoxMm.fdf
@@ -111,7 +111,7 @@ READ_LOCK_STATUS   = TRUE
INF Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006StandaloneMm.inf
INF 
MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteStandaloneMm.inf
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableStandaloneMm.inf
-  INF StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf
+  INF StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf
  
  

  #




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Re: [edk2-devel] GSoC 2021 Qemu OpenBoardPkg Project

2021-05-18 Thread KAAIRA GUPTA 
On Tue, May 18, 2021 at 08:01:57PM +0530, Kaaira Gupta wrote:
> Hey everyone,
> 
> I have been selected as a student developer for the project MinPlatform
> Qemu OpenBoardPkg under the mentors Ray Ni and Michael Kubacki. Thankyou
> for this opportunity. I have been over the major chapters of Beyond BIOS
> as recommended by Nate DeSimone. I want to get familiar with the code
> now to help me undersatnd the community practices and get my hands
> dirty. Where should I start? What development environment do I need?
> How can I use this community bonding period to give me a better start
> for the coding phase?
> 
> How do the mentors want me to connect with them? Can we have a meet to
> discuss this project's plan to add more details? This would be very
> helpful for me considering I don't have prior experience with EDK2.

I noticed that the mail-id that I have used of Michael Kubacki doesn't
exist anymore. Please let me know how I can contact him.

> 
> Thank you,
> Kaaira

Thanks,
Kaaira


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[edk2-devel] GSoC 2021 Qemu OpenBoardPkg Project

2021-05-18 Thread KAAIRA GUPTA 
Hey everyone,

I have been selected as a student developer for the project MinPlatform
Qemu OpenBoardPkg under the mentors Ray Ni and Michael Kubacki. Thankyou
for this opportunity. I have been over the major chapters of Beyond BIOS
as recommended by Nate DeSimone. I want to get familiar with the code
now to help me undersatnd the community practices and get my hands
dirty. Where should I start? What development environment do I need?
How can I use this community bonding period to give me a better start
for the coding phase?

How do the mentors want me to connect with them? Can we have a meet to
discuss this project's plan to add more details? This would be very
helpful for me considering I don't have prior experience with EDK2.

Thank you,
Kaaira


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Re: [edk2-devel] [PATCH v3 5/5] StandaloneMmPkg: build for 32bit arm machines

2021-05-18 Thread Sami Mujawar 

Hi Etienne,

Please find my response inline marked [SAMI].

Regards,

Sami Mujawar

On 17/05/2021 08:40 AM, Etienne Carriere wrote:

This change allows to build StandaloneMmPkg components for 32bit Arm
StandaloneMm firmware.

This change mainly moves AArch64/ source files to Arm/ side directory
for several components:  StandaloneMmCpu, StandaloneMmCoreEntryPoint
and StandaloneMmMemLib. The source file is built for both 32b and 64b
Arm targets.

Cc: Achin Gupta 
Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sughosh Ganu 
Signed-off-by: Etienne Carriere 
---
No change since v2

Changes since v1:
- ARM_SMC_ID_MM_COMMUNICATE 32b/64b agnostic helper ID is defined
   in ArmStdSmc.h (see 1st commit in this series) instead of being
   local to EventHandle.c.
- Fix void occurrence to VOID.
- Fix path in StandaloneMmPkg/StandaloneMmPkg.dsc
---
  StandaloneMmPkg/Core/StandaloneMmCore.inf 
   |  2 +-
  StandaloneMmPkg/Drivers/StandaloneMmCpu/{AArch64 => }/EventHandle.c   
   |  5 +++--
  StandaloneMmPkg/Drivers/StandaloneMmCpu/{AArch64 => }/StandaloneMmCpu.c   
   |  2 +-
  StandaloneMmPkg/Drivers/StandaloneMmCpu/{AArch64 => }/StandaloneMmCpu.h   
   |  0
  StandaloneMmPkg/Drivers/StandaloneMmCpu/{AArch64 => }/StandaloneMmCpu.inf 
   |  0
  StandaloneMmPkg/Include/Library/{AArch64 => Arm}/StandaloneMmCoreEntryPoint.h 
   |  0
  StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/{AArch64 => 
Arm}/CreateHobList.c  |  2 +-
  StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/{AArch64 => 
Arm}/SetPermissions.c |  2 +-
  StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/{AArch64 => 
Arm}/StandaloneMmCoreEntryPoint.c | 16 
  
StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf
| 14 +++---
  StandaloneMmPkg/Library/StandaloneMmCoreHobLib/{AArch64 => 
Arm}/StandaloneMmCoreHobLib.c |  0
  StandaloneMmPkg/Library/StandaloneMmCoreHobLib/{AArch64 => 
Arm}/StandaloneMmCoreHobLibInternal.c |  0
  StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib.inf 
   |  8 
  StandaloneMmPkg/Library/StandaloneMmMemLib/{AArch64/StandaloneMmMemLibInternal.c 
=> ArmStandaloneMmMemLibInternal.c} |  9 -
  StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf 
   |  6 +++---
  StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf 
   |  2 +-
  StandaloneMmPkg/StandaloneMmPkg.dsc   
   | 10 +-
  17 files changed, 43 insertions(+), 35 deletions(-)

diff --git a/StandaloneMmPkg/Core/StandaloneMmCore.inf 
b/StandaloneMmPkg/Core/StandaloneMmCore.inf
index 87bf6e9440..56042b7b39 100644
--- a/StandaloneMmPkg/Core/StandaloneMmCore.inf
+++ b/StandaloneMmPkg/Core/StandaloneMmCore.inf
@@ -17,7 +17,7 @@
PI_SPECIFICATION_VERSION   = 0x00010032
ENTRY_POINT= StandaloneMmMain
  
-#  VALID_ARCHITECTURES   = IA32 X64 AARCH64

+#  VALID_ARCHITECTURES   = IA32 X64 AARCH64 ARM
  
  [Sources]

StandaloneMmCore.c
diff --git a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/EventHandle.c 
b/StandaloneMmPkg/Drivers/StandaloneMmCpu/EventHandle.c
similarity index 95%
rename from StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/EventHandle.c
rename to StandaloneMmPkg/Drivers/StandaloneMmCpu/EventHandle.c
index 63fbe26642..165d696f99 100644
--- a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/EventHandle.c
+++ b/StandaloneMmPkg/Drivers/StandaloneMmCpu/EventHandle.c
@@ -2,6 +2,7 @@
  
Copyright (c) 2016 HP Development Company, L.P.

Copyright (c) 2016 - 2021, Arm Limited. All rights reserved.
+  Copyright (c) 2021, Linaro Limited
  
SPDX-License-Identifier: BSD-2-Clause-Patent
  
@@ -92,8 +93,8 @@ PiMmStandaloneArmTfCpuDriverEntry (

// receipt of a synchronous MM request. Use the Event ID to distinguish
// between synchronous and asynchronous events.
//
-  if ((ARM_SMC_ID_MM_COMMUNICATE_AARCH64 != EventId) &&
-  (ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64 != EventId)) {
+  if ((ARM_SMC_ID_MM_COMMUNICATE != EventId) &&
+  (ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ != EventId)) {
  DEBUG ((DEBUG_INFO, "UnRecognized Event - 0x%x\n", EventId));
  return EFI_INVALID_PARAMETER;
}
diff --git a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c

Re: [edk2-devel] [PATCH v3 4/5] StandaloneMmPkg: fix pointer/int casts against 32bit architectures

2021-05-18 Thread Sami Mujawar 

Hi Etienne,

Thank you for this patch.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar


On 17/05/2021 08:40 AM, Etienne Carriere wrote:

Use intermediate (UINTN) cast when casting int from/to pointer. This
is needed as UINT64 values cast from/to 32bit pointer for 32bit
architectures.

Cc: Achin Gupta 
Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sughosh Ganu 
Signed-off-by: Etienne Carriere 
---
No change since v2
No change since v1
---
  StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c 
  |  8 
  StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c
  | 14 +++---
  
StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c
 |  2 +-
  3 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c 
b/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c
index 6884095c49..d4590bcd19 100644
--- a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c
+++ b/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c
@@ -164,8 +164,8 @@ StandaloneMmCpuInitialize (
  
// Share the entry point of the CPU driver

DEBUG ((DEBUG_INFO, "Sharing Cpu Driver EP *0x%lx = 0x%lx\n",
-  (UINT64) CpuDriverEntryPointDesc->ArmTfCpuDriverEpPtr,
-  (UINT64) PiMmStandaloneArmTfCpuDriverEntry));
+  (UINTN) CpuDriverEntryPointDesc->ArmTfCpuDriverEpPtr,
+  (UINTN) PiMmStandaloneArmTfCpuDriverEntry));
*(CpuDriverEntryPointDesc->ArmTfCpuDriverEpPtr) = 
PiMmStandaloneArmTfCpuDriverEntry;
  
// Find the descriptor that contains the whereabouts of the buffer for

@@ -180,8 +180,8 @@ StandaloneMmCpuInitialize (
  return Status;
}
  
-  DEBUG ((DEBUG_INFO, "mNsCommBuffer.PhysicalStart - 0x%lx\n", (UINT64) NsCommBufMmramRange->PhysicalStart));

-  DEBUG ((DEBUG_INFO, "mNsCommBuffer.PhysicalSize - 0x%lx\n", (UINT64) 
NsCommBufMmramRange->PhysicalSize));
+  DEBUG ((DEBUG_INFO, "mNsCommBuffer.PhysicalStart - 0x%lx\n", (UINTN) 
NsCommBufMmramRange->PhysicalStart));
+  DEBUG ((DEBUG_INFO, "mNsCommBuffer.PhysicalSize - 0x%lx\n", (UINTN) 
NsCommBufMmramRange->PhysicalSize));
  
CopyMem (, NsCommBufMmramRange, sizeof(EFI_MMRAM_DESCRIPTOR));

DEBUG ((DEBUG_INFO, "mNsCommBuffer: 0x%016lx - 0x%lx\n", 
mNsCommBuffer.CpuStart, mNsCommBuffer.PhysicalSize));
diff --git 
a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c 
b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c
index e8fb96bd6e..4d4cf3d5ff 100644
--- a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c
+++ b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c
@@ -72,14 +72,14 @@ CreateHobListFromBootInfo (
  
// Create a hoblist with a PHIT and EOH

HobStart = HobConstructor (
-   (VOID *) PayloadBootInfo->SpMemBase,
+   (VOID *) (UINTN) PayloadBootInfo->SpMemBase,
 (UINTN)  PayloadBootInfo->SpMemLimit - 
PayloadBootInfo->SpMemBase,
-   (VOID *) PayloadBootInfo->SpHeapBase,
-   (VOID *) (PayloadBootInfo->SpHeapBase + 
PayloadBootInfo->SpHeapSize)
+   (VOID *) (UINTN) PayloadBootInfo->SpHeapBase,
+   (VOID *) (UINTN) (PayloadBootInfo->SpHeapBase + 
PayloadBootInfo->SpHeapSize)
 );
  
// Check that the Hoblist starts at the bottom of the Heap

-  ASSERT (HobStart == (VOID *) PayloadBootInfo->SpHeapBase);
+  ASSERT (HobStart == (VOID *) (UINTN) PayloadBootInfo->SpHeapBase);
  
// Build a Boot Firmware Volume HOB

BuildFvHob (PayloadBootInfo->SpImageBase, PayloadBootInfo->SpImageSize);
@@ -190,9 +190,9 @@ CreateHobListFromBootInfo (
MmramRanges[3].RegionState   = EFI_CACHEABLE | EFI_ALLOCATED;
  
// Base and size of heap memory shared by all cpus

-  MmramRanges[4].PhysicalStart = (EFI_PHYSICAL_ADDRESS) HobStart;
-  MmramRanges[4].CpuStart  = (EFI_PHYSICAL_ADDRESS) HobStart;
-  MmramRanges[4].PhysicalSize  = HobStart->EfiFreeMemoryBottom - 
(EFI_PHYSICAL_ADDRESS) HobStart;
+  MmramRanges[4].PhysicalStart = (EFI_PHYSICAL_ADDRESS) (UINTN) HobStart;
+  MmramRanges[4].CpuStart  = (EFI_PHYSICAL_ADDRESS) (UINTN) HobStart;
+  MmramRanges[4].PhysicalSize  = HobStart->EfiFreeMemoryBottom - 
(EFI_PHYSICAL_ADDRESS) (UINTN) HobStart;
MmramRanges[4].RegionState   = EFI_CACHEABLE | EFI_ALLOCATED;
  
// Base and size of heap memory shared by all cpus

diff --git 
a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c
 
b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c
index 6c50f470aa..b445d6942e 100644
--- 
a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCoreEntryPoint.c
+++

Re: [edk2-devel] [PATCH v3 3/5] GenFv: Arm: support images entered in Thumb mode

2021-05-18 Thread Sami Mujawar 

Hi Etienne,

Thank you for this patch.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar


On 17/05/2021 08:40 AM, Etienne Carriere wrote:

Change GenFv for Arm architecture to generate a specific jump
instruction as image entry instruction, when the target entry label
is assembled with Thumb instruction set. This is possible since
SecCoreEntryAddress value fetched from the PE32 has its LSBit set when
the entry instruction executes in Thumb mode.

Cc: Bob Feng 
Cc: Liming Gao 
Cc: Achin Gupta 
Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Sughosh Ganu 
Signed-off-by: Etienne Carriere 
---
Changes since v2:
- Fix missing parentheses in expression.

Changes since v1:
- Fix typos in commit log and inline comments
- Change if() test operand to be an explicit boolean
---
  BaseTools/Source/C/GenFv/GenFvInternalLib.c | 38 +++-
  1 file changed, 29 insertions(+), 9 deletions(-)

diff --git a/BaseTools/Source/C/GenFv/GenFvInternalLib.c 
b/BaseTools/Source/C/GenFv/GenFvInternalLib.c
index 6e296b8ad6..6cf9c84e73 100644
--- a/BaseTools/Source/C/GenFv/GenFvInternalLib.c
+++ b/BaseTools/Source/C/GenFv/GenFvInternalLib.c
@@ -34,9 +34,27 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
  #include "FvLib.h"
  #include "PeCoffLib.h"
  
-#define ARMT_UNCONDITIONAL_JUMP_INSTRUCTION   0xEB00

  #define ARM64_UNCONDITIONAL_JUMP_INSTRUCTION  0x1400
  
+/*

+ * Arm instruction to jump to Fv entry instruction in Arm or Thumb mode.
+ * From ARM Arch Ref Manual versions b/c/d, section A8.8.25 BL, BLX (immediate)
+ * BLX (encoding A2) branches to offset in Thumb instruction set mode.
+ * BL (encoding A1) branches to offset in Arm instruction set mode.
+ */
+#define ARM_JUMP_OFFSET_MAX0xff
+#define ARM_JUMP_TO_ARM(Offset)(0xeb00 | ((Offset - 8) >> 2))
+
+#define _ARM_JUMP_TO_THUMB(Imm32)  (0xfa00 | \
+(((Imm32) & (1 << 1)) << (24 - 1)) | \
+(((Imm32) >> 2) & 0x7f))
+#define ARM_JUMP_TO_THUMB(Offset)  _ARM_JUMP_TO_THUMB((Offset) - 8)
+
+/*
+ * Arm instruction to retrun from exception (MOVS PC, LR)
+ */
+#define ARM_RETURN_FROM_EXCEPTION  0xE1B0F07E
+
  BOOLEAN mArm = FALSE;
  BOOLEAN mRiscV = FALSE;
  STATIC UINT32   MaxFfsAlignment = 0;
@@ -2203,23 +2221,25 @@ Returns:
  // if we found an SEC core entry point then generate a branch instruction
  // to it and populate a debugger SWI entry as well
  if (UpdateVectorSec) {
+  UINT32EntryOffset;
  
VerboseMsg("UpdateArmResetVectorIfNeeded updating ARM SEC vector");
  
-  // B SecEntryPoint - signed_immed_24 part +/-32MB offset

-  // on ARM, the PC is always 8 ahead, so we're not really jumping from 
the base address, but from base address + 8
-  ResetVector[0] = (INT32)(SecCoreEntryAddress - FvInfo->BaseAddress - 8) 
>> 2;
+  EntryOffset = (INT32)(SecCoreEntryAddress - FvInfo->BaseAddress);
  
-  if (ResetVector[0] > 0x00FF) {

-Error(NULL, 0, 3000, "Invalid", "SEC Entry point must be within 32MB of the 
start of the FV");
+  if (EntryOffset > ARM_JUMP_OFFSET_MAX) {
+  Error(NULL, 0, 3000, "Invalid", "SEC Entry point offset above 1MB of the 
start of the FV");
  return EFI_ABORTED;
}
  
-  // Add opcode for an unconditional branch with no link. i.e.: " B SecEntryPoint"

-  ResetVector[0] |= ARMT_UNCONDITIONAL_JUMP_INSTRUCTION;
+  if ((SecCoreEntryAddress & 1) != 0) {
+ResetVector[0] = ARM_JUMP_TO_THUMB(EntryOffset);
+  } else {
+ResetVector[0] = ARM_JUMP_TO_ARM(EntryOffset);
+  }
  
// SWI handler movs   pc,lr. Just in case a debugger uses SWI

-  ResetVector[2] = 0xE1B0F07E;
+  ResetVector[2] = ARM_RETURN_FROM_EXCEPTION;
  
// Place holder to support a common interrupt handler from ROM.

// Currently not supported. For this to be used the reset vector would 
not be in this FV




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Re: [edk2-devel] [PATCH v3 2/5] ArmPkg: prepare 32bit ARM build of StandaloneMmPkg

2021-05-18 Thread Sami Mujawar 

Hi Etienne,

This patch looks good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar


On 17/05/2021 08:40 AM, Etienne Carriere wrote:

Changes in ArmPkg to prepare building StandaloneMm firmware for
32bit Arm architectures.

Adds MmCommunicationDxe driver and ArmMmuPeiLib and
ArmmmuStandaloneMmLib libraries to the list of the standard
components build for ArmPkg on when ARM architectures.

Changes path of source file AArch64/ArmMmuStandaloneMmLib.c
and compile it for both 32bit and 64bit architectures.

Cc: Achin Gupta 
Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Sughosh Ganu 
Signed-off-by: Etienne Carriere 
---
No change since v2
No change since v1
---
  ArmPkg/ArmPkg.dec   |  2 
+-
  ArmPkg/ArmPkg.dsc   |  2 
+-
  ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c |  2 
+-
  ArmPkg/Library/StandaloneMmMmuLib/{AArch64 => }/ArmMmuStandaloneMmLib.c | 15 
---
  ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf |  6 
+++---
  5 files changed, 14 insertions(+), 13 deletions(-)

diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index 214b2f5892..6ed51edd03 100644
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -137,7 +137,7 @@
# hardware coherency (i.e., no virtualization or cache coherent DMA)

gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride|FALSE|BOOLEAN|0x0043
  
-[PcdsFeatureFlag.AARCH64]

+[PcdsFeatureFlag.AARCH64, PcdsFeatureFlag.ARM]
## Used to select method for requesting services from S-EL1.
#   TRUE  - Selects FF-A calls for communication between S-EL0 and SPMC.
#   FALSE - Selects SVC calls for communication between S-EL0 and SPMC.
diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
index 926986cf7f..4c79dadf9e 100644
--- a/ArmPkg/ArmPkg.dsc
+++ b/ArmPkg/ArmPkg.dsc
@@ -158,7 +158,7 @@
ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf
  
-[Components.AARCH64]

+[Components.AARCH64, Components.ARM]
ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf
ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf
ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf
diff --git a/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c 
b/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c
index b1e3095809..4ae38a9f22 100644
--- a/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c
+++ b/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c
@@ -125,7 +125,7 @@ MmCommunication2Communicate (
}
  
// SMC Function ID

-  CommunicateSmcArgs.Arg0 = ARM_SMC_ID_MM_COMMUNICATE_AARCH64;
+  CommunicateSmcArgs.Arg0 = ARM_SMC_ID_MM_COMMUNICATE;
  
// Cookie

CommunicateSmcArgs.Arg1 = 0;
diff --git a/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c 
b/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.c
similarity index 92%
rename from ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c
rename to ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.c
index dd014beec8..20f873e680 100644
--- a/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c
+++ b/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.c
@@ -2,6 +2,7 @@
File managing the MMU for ARMv8 architecture in S-EL0
  
Copyright (c) 2017 - 2021, Arm Limited. All rights reserved.

+  Copyright (c) 2021, Linaro Limited
SPDX-License-Identifier: BSD-2-Clause-Patent
  
@par Reference(s):

@@ -62,7 +63,7 @@ SendMemoryPermissionRequest (
  // for other Direct Request calls which are not atomic
  // We therefore check only for Direct Response by the
  // callee.
-if (SvcArgs->Arg0 == ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64) {
+if (SvcArgs->Arg0 == ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP) {
// A Direct Response means FF-A success
// Now check the payload for errors
// The callee sends back the return value
@@ -164,13 +165,13 @@ GetMemoryPermissions (
ZeroMem (, sizeof (ARM_SVC_ARGS));
if (FeaturePcdGet (PcdFfaEnable)) {
  // See [2], Section 10.2 FFA_MSG_SEND_DIRECT_REQ.
-SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64;
+SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ;
  SvcArgs.Arg1 = ARM_FFA_DESTINATION_ENDPOINT_ID;
  SvcArgs.Arg2 = 0;
-SvcArgs.Arg3 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64;
+SvcArgs.Arg3 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES;
  SvcArgs.Arg4 = BaseAddress;
} else {
-SvcArgs.Arg0 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64;
+SvcArgs.Arg0 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES;
  SvcArgs.Arg1 = BaseAddress;
  SvcArgs.Arg2 = 0;
  SvcArgs.Arg3 = 0;
@@ -219,15 +220,15 @@ RequestMemoryPermissionChange (
ZeroMem (, sizeof (ARM_SVC_ARGS));
if (FeaturePcdGet (PcdFfaEnable)) {
  // See [2], Section 10.2 FFA_MSG_SEND_DIRECT_REQ.
-SvcArgs.Arg0 = ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64;

Re: [edk2-devel] [PATCH v3 1/5] ArmPkg/IndustryStandard: 32b/64b agnostic FF-A, Mm SVC and Std SMC IDs

2021-05-18 Thread Sami Mujawar 

Hi Etienne,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar


On 17/05/2021 08:40 AM, Etienne Carriere wrote:

Defines ARM_SVC_ID_FFA_* and ARM_SVC_ID_SP_* identifiers for 32bit
function IDs as per SMCCC specification. Defines also generic ARM
SVC identifier macros to wrap 32bit or 64bit identifiers upon target
built architecture.

Cc: Achin Gupta 
Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Sughosh Ganu 
Signed-off-by: Etienne Carriere 
---
No change since v2

Changes since v1:
- Define ARM_SMC_ID_MM_COMMUNICATE 32b/64b agnostic helper ID in
   ArmStdSmc.h, as expected by few following commits in this series.
---
  ArmPkg/Include/IndustryStandard/ArmFfaSvc.h | 12 
  ArmPkg/Include/IndustryStandard/ArmMmSvc.h  | 15 +++
  ArmPkg/Include/IndustryStandard/ArmStdSmc.h |  8 
  3 files changed, 35 insertions(+)

diff --git a/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h 
b/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h
index 65b8343ade..ebcb54b28b 100644
--- a/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h
+++ b/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h
@@ -17,9 +17,21 @@
  #define ARM_FFA_SVC_H_
  
  #define ARM_SVC_ID_FFA_VERSION_AARCH32  0x8463

+#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH32  0x846F
+#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH32 0x8470
  #define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64  0xC46F
  #define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64 0xC470
  
+/* Generic IDs when using AArch32 or AArch64 execution state */

+#ifdef MDE_CPU_AARCH64
+#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ 
ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64
+#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP
ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64
+#endif
+#ifdef MDE_CPU_ARM
+#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ 
ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH32
+#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP
ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH32
+#endif
+
  #define SPM_MAJOR_VERSION_FFA   1
  #define SPM_MINOR_VERSION_FFA   0
  
diff --git a/ArmPkg/Include/IndustryStandard/ArmMmSvc.h b/ArmPkg/Include/IndustryStandard/ArmMmSvc.h

index 33d60ccf17..deb3bc99d2 100644
--- a/ArmPkg/Include/IndustryStandard/ArmMmSvc.h
+++ b/ArmPkg/Include/IndustryStandard/ArmMmSvc.h
@@ -15,10 +15,25 @@
   * privileged operations on its behalf.
   */
  #define ARM_SVC_ID_SPM_VERSION_AARCH32 0x8460
+#define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH32   0x8461
+#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH32   0x8464
+#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH32   0x8465
  #define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64   0xC461
  #define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64   0xC464
  #define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64   0xC465
  
+/* Generic IDs when using AArch32 or AArch64 execution state */

+#ifdef MDE_CPU_AARCH64
+#define ARM_SVC_ID_SP_EVENT_COMPLETE   
ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64
+#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES   
ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64
+#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES   
ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64
+#endif
+#ifdef MDE_CPU_ARM
+#define ARM_SVC_ID_SP_EVENT_COMPLETE   
ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH32
+#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES   
ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH32
+#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES   
ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH32
+#endif
+
  #define SET_MEM_ATTR_DATA_PERM_MASK   0x3
  #define SET_MEM_ATTR_DATA_PERM_SHIFT0
  #define SET_MEM_ATTR_DATA_PERM_NO_ACCESS0
diff --git a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h 
b/ArmPkg/Include/IndustryStandard/ArmStdSmc.h
index 67afb0ea2d..9116a291da 100644
--- a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h
+++ b/ArmPkg/Include/IndustryStandard/ArmStdSmc.h
@@ -49,6 +49,14 @@
  #define ARM_SMC_ID_MM_COMMUNICATE_AARCH32  0x8441
  #define ARM_SMC_ID_MM_COMMUNICATE_AARCH64  0xC441
  
+/* Generic ID when using AArch32 or AArch64 execution state */

+#ifdef MDE_CPU_AARCH64
+#define ARM_SMC_ID_MM_COMMUNICATE   ARM_SMC_ID_MM_COMMUNICATE_AARCH64
+#endif
+#ifdef MDE_CPU_ARM
+#define ARM_SMC_ID_MM_COMMUNICATE   ARM_SMC_ID_MM_COMMUNICATE_AARCH32
+#endif
+
  /* MM return error codes */
  #define ARM_SMC_MM_RET_SUCCESS  0
  #define ARM_SMC_MM_RET_NOT_SUPPORTED   -1




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