Re: [edk2-devel] [PATCH 1/1] MdeModulePkg: Move NestedInterruptTplLib to MdeModulePkg

[Ni, Ray]

Michael,
Can you submit another patch to add Iret.h to the INF file [Sources] section?

Without that, incremental build might not work if changes are made in Iret.h.

It doesn't support non-x86 CPU. Will ARM have similar problems?
+Ard,

Thanks,
Ray
> -Original Message-
> From: Michael Brown 
> Sent: Saturday, January 20, 2024 7:25 AM
> To: devel@edk2.groups.io
> Cc: Michael Brown ; Ni, Ray ; Laszlo
> Ersek ; Gerd Hoffmann ; Kinney,
> Michael D 
> Subject: [PATCH 1/1] MdeModulePkg: Move NestedInterruptTplLib to
> MdeModulePkg
> 
> NestedInterruptTplLib provides a way for timer interrupt handlers
> (which must support nested interrupts) to prevent unbounded stack
> consumption.
> 
> The underlying issue was first observed in OvmfPkg, since interrupt
> storms can arise more easily in virtual machines due to CPU
> starvation.  However, careful investigation shows that the unbounded
> stack consumption can also occur in physical machines.
> 
> Move NestedInterruptTplLib from OvmfPkg to MdeModulePkg so that it can
> more easily be consumed by drivers outside of OvmfPkg.
> 
> Cc: Ray Ni 
> Cc: Laszlo Ersek 
> Cc: Gerd Hoffmann 
> Cc: Michael D Kinney 
> Signed-off-by: Michael Brown 
> ---
>  MdeModulePkg/MdeModulePkg.dec | 4 
>  OvmfPkg/OvmfPkg.dec   | 4 
>  OvmfPkg/AmdSev/AmdSevX64.dsc  | 2 +-
>  OvmfPkg/CloudHv/CloudHvX64.dsc| 2 +-
>  OvmfPkg/IntelTdx/IntelTdxX64.dsc  | 2 +-
>  OvmfPkg/Microvm/MicrovmX64.dsc| 2 +-
>  OvmfPkg/OvmfPkgIa32.dsc   | 2 +-
>  OvmfPkg/OvmfPkgIa32X64.dsc| 2 +-
>  OvmfPkg/OvmfPkgX64.dsc| 2 +-
>  OvmfPkg/OvmfXen.dsc   | 2 +-
>  UefiPayloadPkg/UefiPayloadPkg.dsc | 2 +-
>  .../Library/NestedInterruptTplLib/NestedInterruptTplLib.inf   | 2 +-
>  OvmfPkg/LocalApicTimerDxe/LocalApicTimerDxe.inf   | 1 +
>  .../Include/Library/NestedInterruptTplLib.h   | 0
>  .../Library/NestedInterruptTplLib/Iret.h  | 0
>  .../Library/NestedInterruptTplLib/Iret.c  | 0
>  {OvmfPkg => MdeModulePkg}/Library/NestedInterruptTplLib/Tpl.c | 0
>  17 files changed, 15 insertions(+), 14 deletions(-)
>  rename {OvmfPkg =>
> MdeModulePkg}/Library/NestedInterruptTplLib/NestedInterruptTplLib.inf
> (91%)
>  rename {OvmfPkg =>
> MdeModulePkg}/Include/Library/NestedInterruptTplLib.h (100%)
>  rename {OvmfPkg => MdeModulePkg}/Library/NestedInterruptTplLib/Iret.h
> (100%)
>  rename {OvmfPkg => MdeModulePkg}/Library/NestedInterruptTplLib/Iret.c
> (100%)
>  rename {OvmfPkg => MdeModulePkg}/Library/NestedInterruptTplLib/Tpl.c
> (100%)
> 
> diff --git a/MdeModulePkg/MdeModulePkg.dec
> b/MdeModulePkg/MdeModulePkg.dec
> index a2cd83345f5b..d6fb729af5a7 100644
> --- a/MdeModulePkg/MdeModulePkg.dec
> +++ b/MdeModulePkg/MdeModulePkg.dec
> @@ -169,6 +169,10 @@ [LibraryClasses]
>#
>ImagePropertiesRecordLib|Include/Library/ImagePropertiesRecordLib.h
> 
> +  ##  @libraryclass  Handle TPL changes within nested interrupt handlers
> +  #
> +  NestedInterruptTplLib|Include/Library/NestedInterruptTplLib.h
> +
>  [Guids]
>## MdeModule package token space guid
># Include/Guid/MdeModulePkgTokenSpace.h
> diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
> index b44fa039f76c..05d43d5a6861 100644
> --- a/OvmfPkg/OvmfPkg.dec
> +++ b/OvmfPkg/OvmfPkg.dec
> @@ -41,10 +41,6 @@ [LibraryClasses]
>#
>MemEncryptTdxLib|Include/Library/MemEncryptTdxLib.h
> 
> -  ##  @libraryclass  Handle TPL changes within nested interrupt handlers
> -  #
> -  NestedInterruptTplLib|Include/Library/NestedInterruptTplLib.h
> -
>##  @libraryclass  Save and restore variables using a file
>#
>NvVarsFileLib|Include/Library/NvVarsFileLib.h
> diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc
> b/OvmfPkg/AmdSev/AmdSevX64.dsc
> index a31a89344a60..80456f878a22 100644
> --- a/OvmfPkg/AmdSev/AmdSevX64.dsc
> +++ b/OvmfPkg/AmdSev/AmdSevX64.dsc
> @@ -354,7 +354,7 @@ [LibraryClasses.common.DXE_DRIVER]
>  !endif
>PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
>MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
> -
> NestedInterruptTplLib|OvmfPkg/Library/NestedInterruptTplLib/NestedInterr
> uptTplLib.inf
> +
> NestedInterruptTplLib|MdeModulePkg/Library/NestedInterruptTplLib/Neste
> dInterruptTplLib.inf
> 
> QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibF
> wCfg.inf
> 
> QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQe
> muLoadImageLib.inf
> 
> diff --git a/OvmfPkg/CloudHv/CloudHvX64.dsc
> b/OvmfPkg/CloudHv/CloudHvX64.dsc
> index b522fa10594d..9c6c68ae2c35 100644
> --- a/OvmfPkg/CloudHv/CloudHvX64.dsc
> +++ b/OvmfPkg/CloudHv/CloudHvX64.dsc
> @@ 

Re: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use AsmCpuidEx() for CPUID_EXTENDED_TOPOLOGY leaf

[Ni, Ray]

Mike, Tom,
How about AsmCpuId() adds ASSERT() to reject those CPUID leaves that do not 
have sub-leaf?

Another concern I have if AsmCpuid() zeros ECX is callers would call 
AsmCpuid(leaf) instead of AsmCpuidEx (leaf, 0).
This would cause the caller code a mess.

Thanks,
Ray
From: Kinney, Michael D 
Sent: Saturday, January 20, 2024 9:49 AM
To: Ni, Ray ; Tom Lendacky ; 
devel@edk2.groups.io; Gao, Liming ; Liu, Zhiguang 
; Dong, Eric ; Kumar, Rahul R 
; Gerd Hoffmann ; Ard Biesheuvel 

Cc: Michael Roth ; Kinney, Michael D 

Subject: RE: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use AsmCpuidEx() 
for CPUID_EXTENDED_TOPOLOGY leaf

The issue is if AsmCpuid() is called for an Index value that does depend on 
ECX.  That would be a bug on the caller's part and would not have deterministic 
behavior because ECX on input is not deterministic.  That is the condition that 
would be good to catch.

Mike

From: Ni, Ray mailto:ray...@intel.com>>
Sent: Friday, January 19, 2024 3:49 PM
To: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>; Tom Lendacky 
mailto:thomas.lenda...@amd.com>>; 
devel@edk2.groups.io; Gao, Liming 
mailto:liming@intel.com>>; Liu, Zhiguang 
mailto:zhiguang@intel.com>>; Dong, Eric 
mailto:eric.d...@intel.com>>; Kumar, Rahul R 
mailto:rahul.r.ku...@intel.com>>; Gerd Hoffmann 
mailto:kra...@redhat.com>>; Ard Biesheuvel 
mailto:ardb+tianoc...@kernel.org>>
Cc: Michael Roth mailto:michael.r...@amd.com>>; Kinney, 
Michael D mailto:michael.d.kin...@intel.com>>
Subject: Re: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use AsmCpuidEx() 
for CPUID_EXTENDED_TOPOLOGY leaf

Mike,
For a certain Cupid leaf that does not have sub leaf, Cupid instruction does 
not consume ecx and it always fills ecx with a determined value, defined by sdm.
So, I don't see any hurt to deterministic behavior if not zeroing ecx in 
AsmCpuid.

thanks,
ray

From: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Sent: Saturday, January 20, 2024 7:16:14 AM
To: Ni, Ray mailto:ray...@intel.com>>; Tom Lendacky 
mailto:thomas.lenda...@amd.com>>; 
devel@edk2.groups.io 
mailto:devel@edk2.groups.io>>; Gao, Liming 
mailto:liming@intel.com>>; Liu, Zhiguang 
mailto:zhiguang@intel.com>>; Dong, Eric 
mailto:eric.d...@intel.com>>; Kumar, Rahul R 
mailto:rahul.r.ku...@intel.com>>; Gerd Hoffmann 
mailto:kra...@redhat.com>>; Ard Biesheuvel 
mailto:ardb+tianoc...@kernel.org>>
Cc: Michael Roth mailto:michael.r...@amd.com>>; Kinney, 
Michael D mailto:michael.d.kin...@intel.com>>
Subject: RE: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use AsmCpuidEx() 
for CPUID_EXTENDED_TOPOLOGY leaf

Hi Ray,

It is about having deterministic behavior if a call if made for
a CPUID EAX value that does depend on ECX.  If ECX is not zeroed,
then it will have a random value that may return different
information.

The problem statement from Tom is not about zeroing ECX.  It is
about avoiding code bugs where AsmCpuid() is called for an Index
value that is documented to depend on ECX.  In this case, we would
want an error condition so the developer knows they should use
AsmCpuidEx() instead.

>From looking at the Intel SDM, there is a small set of Index
values that do not look at ECX at all.  We could consider
adding an ASSERT() condition in AsmCpuid() if Index is
a value that depends on ECX.  Perhaps in DEBUG_CODE() so
it is not always present.

Mike

> -Original Message-
> From: Ni, Ray mailto:ray...@intel.com>>
> Sent: Friday, January 19, 2024 2:01 AM
> To: Kinney, Michael D 
> mailto:michael.d.kin...@intel.com>>; Tom Lendacky
> mailto:thomas.lenda...@amd.com>>; 
> devel@edk2.groups.io; Gao, Liming
> mailto:liming@intel.com>>; Liu, Zhiguang 
> mailto:zhiguang@intel.com>>; Dong,
> Eric mailto:eric.d...@intel.com>>; Kumar, Rahul R 
> mailto:rahul.r.ku...@intel.com>>;
> Gerd Hoffmann mailto:kra...@redhat.com>>; Ard Biesheuvel
> mailto:ardb+tianoc...@kernel.org>>
> Cc: Michael Roth mailto:michael.r...@amd.com>>
> Subject: RE: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use
> AsmCpuidEx() for CPUID_EXTENDED_TOPOLOGY leaf
>
> Mike,
> I agree with your words after "However".
> Zeroing ECX in AsmCpuid() is confusing to future code maintainer: If
> CPUID instruction does
> not consume "ECX", why is it needed to zero "ECX"?
>
> Thanks,
> Ray
> > -Original Message-
> > From: Kinney, Michael D 
> > mailto:michael.d.kin...@intel.com>>
> > Sent: Friday, January 19, 2024 7:11 AM
> > To: Tom Lendacky mailto:thomas.lenda...@amd.com>>; 
> > devel@edk2.groups.io;
> > Gao, Liming mailto:liming@intel.com>>; Liu, 
> > Zhiguang
> mailto:zhiguang@intel.com>>;
> > Dong, Eric mailto:eric.d...@intel.com>>; Ni, Ray 
> > mailto:ray...@intel.com>>; Kumar,
> Rahul R
> > mailto:rahul.r.ku...@intel.com>>; Gerd Hoffmann 
> > mailto:kra...@redhat.com>>; Ard
> > Biesheuvel 

Re: [edk2-devel] [PATCH] MdePkg: fix the types of casting for TD MMIO read

[Michael D Kinney]

Merged: https://github.com/tianocore/edk2/pull/5278



> -Original Message-
> From: Kinney, Michael D 
> Sent: Friday, January 19, 2024 6:49 PM
> To: devel@edk2.groups.io; Li, Zhiquan1 
> Cc: Kinney, Michael D 
> Subject: RE: [edk2-devel] [PATCH] MdePkg: fix the types of casting for
> TD MMIO read
> 
> Reviewed-by: Michael D Kinney 
> 
> Please include Cc tags in commit message with the maintainers of
> the patch for review.  Otherwise, the maintainers may miss the
> email patches.
> 
> Thanks,
> 
> Mike
> 
> 
> 
> > -Original Message-
> > From: devel@edk2.groups.io  On Behalf Of Zhiquan
> > Li
> > Sent: Thursday, January 11, 2024 10:02 PM
> > To: devel@edk2.groups.io
> > Cc: Li, Zhiquan1 
> > Subject: [edk2-devel] [PATCH] MdePkg: fix the types of casting for TD
> > MMIO read
> >
> > Currently the types of casting mismatch with TD MMIO read 1, 2 and 4
> > bytes, that might introduce potential issues.  So fix the types as
> > conventional MmioRead[8|16|32] does.
> >
> > Signed-off-by: Zhiquan Li 
> > ---
> >  MdePkg/Library/BaseIoLibIntrinsic/IoLibInternalTdx.c | 6 +++---
> >  1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibInternalTdx.c
> > b/MdePkg/Library/BaseIoLibIntrinsic/IoLibInternalTdx.c
> > index ec837f5eb03e..1acc3b3d9638 100644
> > --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibInternalTdx.c
> > +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibInternalTdx.c
> > @@ -237,7 +237,7 @@ TdMmioRead8 (
> >
> >
> >Status = TdVmCall (TDVMCALL_MMIO, TDVMCALL_ACCESS_SIZE_1,
> > TDVMCALL_ACCESS_READ, Address | TdSharedPageMask (), 0, );
> >
> >if (Status != 0) {
> >
> > -Value = *(volatile UINT64 *)Address;
> >
> > +Value = *(volatile UINT8 *)Address;
> >
> >}
> >
> >
> >
> >return (UINT8)Value;
> >
> > @@ -294,7 +294,7 @@ TdMmioRead16 (
> >
> >
> >Status = TdVmCall (TDVMCALL_MMIO, TDVMCALL_ACCESS_SIZE_2,
> > TDVMCALL_ACCESS_READ, Address | TdSharedPageMask (), 0, );
> >
> >if (Status != 0) {
> >
> > -Value = *(volatile UINT64 *)Address;
> >
> > +Value = *(volatile UINT16 *)Address;
> >
> >}
> >
> >
> >
> >return (UINT16)Value;
> >
> > @@ -353,7 +353,7 @@ TdMmioRead32 (
> >
> >
> >Status = TdVmCall (TDVMCALL_MMIO, TDVMCALL_ACCESS_SIZE_4,
> > TDVMCALL_ACCESS_READ, Address | TdSharedPageMask (), 0, );
> >
> >if (Status != 0) {
> >
> > -Value = *(volatile UINT64 *)Address;
> >
> > +Value = *(volatile UINT32 *)Address;
> >
> >}
> >
> >
> >
> >return (UINT32)Value;
> >
> > --
> > 2.25.1
> >
> >
> >
> > -=-=-=-=-=-=
> > Groups.io Links: You receive all messages sent to this group.
> > View/Reply Online (#113765):
> > https://edk2.groups.io/g/devel/message/113765
> > Mute This Topic: https://groups.io/mt/103689726/1643496
> > Group Owner: devel+ow...@edk2.groups.io
> > Unsubscribe: https://edk2.groups.io/g/devel/unsub
> > [michael.d.kin...@intel.com]
> > -=-=-=-=-=-=
> >



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Re: [edk2-devel] [PATCH v2 1/1] MdePkg/IndustryStandard: Add _PSD/_CPC/Coord types definitions

[Michael D Kinney]

Merged: https://github.com/tianocore/edk2/pull/5277


From: devel@edk2.groups.io  On Behalf Of gaoliming via 
groups.io
Sent: Tuesday, January 16, 2024 6:18 AM
To: devel@edk2.groups.io; sami.muja...@arm.com; 'PierreGondois' 

Subject: 回复: [edk2-devel] [PATCH v2 1/1] MdePkg/IndustryStandard: Add 
_PSD/_CPC/Coord types definitions

I am OK to merge it. Reviewed-by: Liming Gao 
mailto:gaolim...@byosoft.com.cn>>

发件人: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>> 代表 Sami Mujawar
发送时间: 2024年1月12日 22:37
收件人: PierreGondois mailto:pierre.gond...@arm.com>>; 
devel@edk2.groups.io
主题: Re: [edk2-devel] [PATCH v2 1/1] MdePkg/IndustryStandard: Add 
_PSD/_CPC/Coord types definitions

Hi Liming,

If there are no further comments on this patch, can you let me know if I can 
merge this, please?

Regards,

Sami Mujawar



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Re: [edk2-devel] [PATCH] MdePkg: fix the types of casting for TD MMIO read

[Michael D Kinney]

Reviewed-by: Michael D Kinney 

Please include Cc tags in commit message with the maintainers of
the patch for review.  Otherwise, the maintainers may miss the 
email patches.

Thanks,

Mike



> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Zhiquan
> Li
> Sent: Thursday, January 11, 2024 10:02 PM
> To: devel@edk2.groups.io
> Cc: Li, Zhiquan1 
> Subject: [edk2-devel] [PATCH] MdePkg: fix the types of casting for TD
> MMIO read
> 
> Currently the types of casting mismatch with TD MMIO read 1, 2 and 4
> bytes, that might introduce potential issues.  So fix the types as
> conventional MmioRead[8|16|32] does.
> 
> Signed-off-by: Zhiquan Li 
> ---
>  MdePkg/Library/BaseIoLibIntrinsic/IoLibInternalTdx.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibInternalTdx.c
> b/MdePkg/Library/BaseIoLibIntrinsic/IoLibInternalTdx.c
> index ec837f5eb03e..1acc3b3d9638 100644
> --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibInternalTdx.c
> +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibInternalTdx.c
> @@ -237,7 +237,7 @@ TdMmioRead8 (
> 
> 
>Status = TdVmCall (TDVMCALL_MMIO, TDVMCALL_ACCESS_SIZE_1,
> TDVMCALL_ACCESS_READ, Address | TdSharedPageMask (), 0, );
> 
>if (Status != 0) {
> 
> -Value = *(volatile UINT64 *)Address;
> 
> +Value = *(volatile UINT8 *)Address;
> 
>}
> 
> 
> 
>return (UINT8)Value;
> 
> @@ -294,7 +294,7 @@ TdMmioRead16 (
> 
> 
>Status = TdVmCall (TDVMCALL_MMIO, TDVMCALL_ACCESS_SIZE_2,
> TDVMCALL_ACCESS_READ, Address | TdSharedPageMask (), 0, );
> 
>if (Status != 0) {
> 
> -Value = *(volatile UINT64 *)Address;
> 
> +Value = *(volatile UINT16 *)Address;
> 
>}
> 
> 
> 
>return (UINT16)Value;
> 
> @@ -353,7 +353,7 @@ TdMmioRead32 (
> 
> 
>Status = TdVmCall (TDVMCALL_MMIO, TDVMCALL_ACCESS_SIZE_4,
> TDVMCALL_ACCESS_READ, Address | TdSharedPageMask (), 0, );
> 
>if (Status != 0) {
> 
> -Value = *(volatile UINT64 *)Address;
> 
> +Value = *(volatile UINT32 *)Address;
> 
>}
> 
> 
> 
>return (UINT32)Value;
> 
> --
> 2.25.1
> 
> 
> 
> -=-=-=-=-=-=
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Re: [edk2-devel] [PATCH 1/1] MdePkg: Update the comments of HiiConfigAccess ExtractConfig

[Michael D Kinney]

Hi Suqiang,

For the Browser/HII related changes to the MdePkg can you also 
prepare a patch to update the function headers in the implementation
of these APIs and make sure the implementation conforms to the 
update header file changes?

Thanks,

Mike

> -Original Message-
> From: Ren, SuqiangX 
> Sent: Sunday, January 14, 2024 6:09 PM
> To: gaoliming ; devel@edk2.groups.io
> Cc: Kinney, Michael D ; Liu, Zhiguang
> ; Li, Yi1 
> Subject: RE: [edk2-devel] [PATCH 1/1] MdePkg: Update the comments of
> HiiConfigAccess ExtractConfig
> 
> Hi Liming,
> 
>   Could you help to merge below patches which all your reviewed-by?
> Thanks!
>   https://github.com/tianocore/edk2/pull/5170
>   https://github.com/tianocore/edk2/pull/5186
>   https://github.com/tianocore/edk2/pull/5190
> 
> 
> Thanks
> Ren, Suqiang
> 
> -Original Message-
> From: Ren, SuqiangX
> Sent: Monday, January 8, 2024 9:31 PM
> To: gaoliming ; devel@edk2.groups.io
> Cc: Kinney, Michael D ; Liu, Zhiguang
> ; Li, Yi1 
> Subject: RE: [edk2-devel] [PATCH 1/1] MdePkg: Update the comments of
> HiiConfigAccess ExtractConfig
> 
> Hi Liming,
> 
>   Could you please help to check and merge this patch?
>   https://github.com/tianocore/edk2/pull/5170
> 
> 
> Thanks
> Ren, Suqiang
> 
> -Original Message-
> From: gaoliming 
> Sent: Saturday, December 23, 2023 10:10 AM
> To: devel@edk2.groups.io; Ren, SuqiangX 
> Cc: Kinney, Michael D ; Liu, Zhiguang
> ; Li, Yi1 
> Subject: 回复: [edk2-devel] [PATCH 1/1] MdePkg: Update the comments of
> HiiConfigAccess ExtractConfig
> 
> Reviewed-by: Liming Gao 
> 
> > -邮件原件-
> > 发件人: devel@edk2.groups.io  代表 SuqiangX Ren
> > 发送时间: 2023年12月21日 10:41
> > 收件人: devel@edk2.groups.io
> > 抄送: Ren,Suqiang ; Michael D Kinney
> > ; Liming Gao ;
> > Zhiguang Liu ; Yi Li 
> > 主题: [edk2-devel] [PATCH 1/1] MdePkg: Update the comments of
> > HiiConfigAccess ExtractConfig
> >
> > From: "Ren,Suqiang" 
> >
> > Add status code returned for HiiConfigAccess ExtractConfig to align
> > with UEFI spec 2.10.
> >
> > REF: UEFI spec 2.10 Table 35.5.2
> >
> > Signed-off-by: SuqiangX Ren 
> > Cc: Michael D Kinney 
> > Cc: Liming Gao 
> > Cc: Zhiguang Liu 
> > Cc: Yi Li 
> > ---
> >  MdePkg/Include/Protocol/HiiConfigAccess.h | 9 -
> >  1 file changed, 8 insertions(+), 1 deletion(-)
> >
> > diff --git a/MdePkg/Include/Protocol/HiiConfigAccess.h
> > b/MdePkg/Include/Protocol/HiiConfigAccess.h
> > index 3baf91e07b2e..fbee7c52b021 100644
> > --- a/MdePkg/Include/Protocol/HiiConfigAccess.h
> > +++ b/MdePkg/Include/Protocol/HiiConfigAccess.h
> > @@ -102,9 +102,16 @@ typedef UINTN EFI_BROWSER_ACTION;
> >string.
> >
> >@retval EFI_INVALID_PARAMETER   Unknown name. Progress points
> > -  to the & before the name in
> > +  to the "&" before the name in
> >question.
> >
> > +  @retval EFI_INVALID_PARAMETER   If Results or Progress is NULL.
> > +
> > +  @retval EFI_ACCESS_DENIED   The action violated a system
> policy.
> > +
> > +  @retval EFI_DEVICE_ERRORFailed to extract the current
> > configuration
> > +  for one or more named elements.
> > +
> >  **/
> >  typedef
> >  EFI_STATUS
> > --
> > 2.26.2.windows.1
> >
> >
> >
> > 
> >
> 
> 



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Re: [edk2-devel] [PATCH] BaseTools: Optimize GenerateByteArrayValue and CollectPlatformGuids APIs

[Michael D Kinney]

Hi Ashraf,

What is captured in the file?

What PCD/VPD changes will invalidate the cache?  Just the number and 
type of PCD/VPD elements or their default values/sizes?

How was this tested?  Were all conditions that invalidate the cache
tested?  I ask because incremental build is a very important feature
and if there is any logic error in the cache management of a file like
this, it will cause unexpected behavior and developers will not trust
incremental builds.

Mike

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Ashraf
> Ali S
> Sent: Tuesday, January 16, 2024 11:55 PM
> To: devel@edk2.groups.io
> Cc: S, Ashraf Ali ; Chen, Christine
> ; Rebecca Cran ; Liming Gao
> ; Feng, Bob C ; Chan,
> Amy ; Chaganty, Rangasai V
> ; Solanki, Digant H
> 
> Subject: [edk2-devel] [PATCH] BaseTools: Optimize GenerateByteArrayValue
> and CollectPlatformGuids APIs
> 
> During the Incremental build GenerateByteArrayValue used to generate the
> ByteArrayValue even when there is no change in the PCD/VPDs. which is
> time consuming API based on the number of PCD/VPDs and SKU IDs.
> 
> The optimization is that GenerateByteArrayValue is used to store the
> PcdRecordList in a JSON file for each of the arch. and during the
> Incremental build this API will check if there is any change in the PCD
> /VPDs then rest of the flow remains the same. if there is no change then
> it will return the provious build data.
> 
> Flow:
> during the 1st build PcdRecordList.json is not exists, PcdRecordList
> will be dumped to json file. and it will copy the output.txt as well.
> Note: as the output.txt are different for different Arch, so it will be
> stored in the Arch folder.
> During the Incremental build check if there is any change in PCD/VPD.
> if there is a change in VPD/PCD then recreate the PcdRecordList.json.
> and rest of the flow remains same.
> if there is no change in VPD/PCD read the output.txt and return the data
> 
> Cc: Yuwei Chen 
> Cc: Rebecca Cran 
> Cc: Liming Gao 
> Cc: Bob Feng 
> Cc: Amy Chan 
> Cc: Sai Chaganty 
> Cc: Digant H Solanki 
> Signed-off-by: Ashraf Ali S 
> ---
>  .../Source/Python/AutoGen/WorkspaceAutoGen.py | 16 ++---
>  .../Source/Python/Workspace/DscBuildData.py   | 72 +++
>  2 files changed, 64 insertions(+), 24 deletions(-)
> 
> diff --git a/BaseTools/Source/Python/AutoGen/WorkspaceAutoGen.py
> b/BaseTools/Source/Python/AutoGen/WorkspaceAutoGen.py
> index 160e3a3cd3..eec9280c8e 100644
> --- a/BaseTools/Source/Python/AutoGen/WorkspaceAutoGen.py
> +++ b/BaseTools/Source/Python/AutoGen/WorkspaceAutoGen.py
> @@ -160,22 +160,18 @@ class WorkspaceAutoGen(AutoGen):
> 
>  def CollectPlatformGuids(self):
>  oriInfList = []
> -oriPkgSet = set()
> -PlatformPkg = set()
> +pkgSet = set()
>  for Arch in self.ArchList:
>  Platform = self.BuildDatabase[self.MetaFile, Arch,
> self.BuildTarget, self.ToolChain]
>  oriInfList = Platform.Modules
>  for ModuleFile in oriInfList:
>  ModuleData = self.BuildDatabase[ModuleFile,
> Platform._Arch, Platform._Target, Platform._Toolchain]
> -oriPkgSet.update(ModuleData.Packages)
> -for Pkg in oriPkgSet:
> -Guids = Pkg.Guids
> -GlobalData.gGuidDict.update(Guids)
> +pkgSet.update(ModuleData.Packages)
>  if Platform.Packages:
> -PlatformPkg.update(Platform.Packages)
> -for Pkg in PlatformPkg:
> -Guids = Pkg.Guids
> -GlobalData.gGuidDict.update(Guids)
> +pkgSet.update(Platform.Packages)
> +for Pkg in pkgSet:
> +Guids = Pkg.Guids
> +GlobalData.gGuidDict.update(Guids)
> 
>  @cached_property
>  def FdfProfile(self):
> diff --git a/BaseTools/Source/Python/Workspace/DscBuildData.py
> b/BaseTools/Source/Python/Workspace/DscBuildData.py
> index 4768099343..740b8e22be 100644
> --- a/BaseTools/Source/Python/Workspace/DscBuildData.py
> +++ b/BaseTools/Source/Python/Workspace/DscBuildData.py
> @@ -37,6 +37,8 @@ from functools import reduce
>  from Common.Misc import SaveFileOnChange
>  from Workspace.BuildClassObject import PlatformBuildClassObject,
> StructurePcd, PcdClassObject, ModuleBuildClassObject
>  from collections import OrderedDict, defaultdict
> +import json
> +import shutil
> 
>  def _IsFieldValueAnArray (Value):
>  Value = Value.strip()
> @@ -56,6 +58,7 @@ def _IsFieldValueAnArray (Value):
> 
>  PcdValueInitName = 'PcdValueInit'
>  PcdValueCommonName = 'PcdValueCommon'
> +PcdRecordListName = 'PcdRecordList.json'
> 
>  PcdMainCHeader = '''
>  /**
> @@ -1599,7 +1602,7 @@ class DscBuildData(PlatformBuildClassObject):
>  S_pcd_set = DscBuildData.OverrideByComm(S_pcd_set)
> 
>  # Create a tool to caculate structure pcd value
> -Str_Pcd_Values = self.GenerateByteArrayValue(S_pcd_set)
> +

Re: [edk2-devel] [PATCH 1/2] MdeModulePkg: Remove the handle validation check in CoreGetProtocolInterface

[Michael D Kinney]

Hi Zhi,

Some comments below.

Mike

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Zhi Jin
> Sent: Tuesday, January 16, 2024 10:45 PM
> To: devel@edk2.groups.io
> Cc: Jin, Zhi ; Liming Gao ;
> Ni, Ray 
> Subject: [edk2-devel] [PATCH 1/2] MdeModulePkg: Remove the handle
> validation check in CoreGetProtocolInterface
> 
> CoreGetProtocolInterface() is called by CoreOpenProtocol(),
> CoreCloseProtocol() and CoreOpenProtocolInformation().
> Before CoreOpenProtocol() calls CoreGetProtocolInterface(), the input
> parameter UserHandle has been already checked for validation. So does
> CoreCloseProtocol().
> Removing the handle validation check in CoreGetProtocolInterface()
> could improve the performance, as CoreOpenProtocol() is called very
> frequently.
> Meanwhile, need to make it the caller's responsibility to check the
> parameters, and add the check in CoreOpenProtocolInformation().
> 
> Cc: Liming Gao 
> Cc: Ray Ni 
> Signed-off-by: Zhi Jin 
> ---
>  MdeModulePkg/Core/Dxe/Hand/Handle.c | 17 +++--
>  1 file changed, 11 insertions(+), 6 deletions(-)
> 
> diff --git a/MdeModulePkg/Core/Dxe/Hand/Handle.c
> b/MdeModulePkg/Core/Dxe/Hand/Handle.c
> index 51e5b5d3b3..a0d2d03267 100644
> --- a/MdeModulePkg/Core/Dxe/Hand/Handle.c
> +++ b/MdeModulePkg/Core/Dxe/Hand/Handle.c
> @@ -916,6 +916,8 @@ CoreUninstallMultipleProtocolInterfaces (
> 
>  /**
>Locate a certain GUID protocol interface in a Handle's protocols.
> +  Note: This function doesn't do parameters checking, it's caller's
> responsibility
> +  to pass in valid parameters.
> 
>@param  UserHandle The handle to obtain the protocol
> interface on

Instead of a Note:, I recommend the description of this parameter
be updated to state that the caller must pass in a valid UserHandle
that is checked with CoreValidateHandle().

Also, this API CoreGetProtocolInterface() is an internal helper 
function.  I also recommend that this function be declared 'static'
so the scope of the assumption that UserHandle is valid is only 
by calls from other functions in this same file.

>@param  Protocol   The GUID of the protocol
> @@ -929,17 +931,11 @@ CoreGetProtocolInterface (
>IN  EFI_GUID*Protocol
>)
>  {
> -  EFI_STATUS  Status;
>PROTOCOL_ENTRY  *ProtEntry;
>PROTOCOL_INTERFACE  *Prot;
>IHANDLE *Handle;
>LIST_ENTRY  *Link;
> 
> -  Status = CoreValidateHandle (UserHandle);
> -  if (EFI_ERROR (Status)) {
> -return NULL;
> -  }
> -
>Handle = (IHANDLE *)UserHandle;
> 
>//
> @@ -1392,6 +1388,15 @@ CoreOpenProtocolInformation (
>//
>CoreAcquireProtocolLock ();
> 
> +  //
> +  // Check for invalid UserHandle
> +  //
> +  Status = CoreValidateHandle (UserHandle);
> +  if (EFI_ERROR (Status)) {
> +Status = EFI_NOT_FOUND;
> +goto Done;
> +  }
> +
>//
>// Look at each protocol interface for a match
>//
> --
> 2.39.2
> 
> 
> 
> 
> 



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Re: [edk2-devel] [PATCH 2/2] MdeModulePkg: Optimize CoreConnectSingleController

[Michael D Kinney]

I agree that this implements the similar check as other 
optional protocols to adjust driver binding order to skip
checks for which where are no instances of the optional
protocol.

Reviewed-by: Michael D Kinney 




> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Zhi Jin
> Sent: Tuesday, January 16, 2024 10:45 PM
> To: devel@edk2.groups.io
> Cc: Jin, Zhi ; Liming Gao ;
> Ni, Ray 
> Subject: [edk2-devel] [PATCH 2/2] MdeModulePkg: Optimize
> CoreConnectSingleController
> 
> CoreConnectSingleController() searches for the Driver Family Override
> Protocol drivers by looping and checking each Driver Binding Handles.
> This loop can be skipped by checking if any Driver Family Override
> Protocol installed in the platform first, to improve the performance.
> 
> Cc: Liming Gao 
> Cc: Ray Ni 
> Signed-off-by: Zhi Jin 
> ---
>  MdeModulePkg/Core/Dxe/Hand/DriverSupport.c | 7 ++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/MdeModulePkg/Core/Dxe/Hand/DriverSupport.c
> b/MdeModulePkg/Core/Dxe/Hand/DriverSupport.c
> index 0b824c62b7..64d7474f15 100644
> --- a/MdeModulePkg/Core/Dxe/Hand/DriverSupport.c
> +++ b/MdeModulePkg/Core/Dxe/Hand/DriverSupport.c
> @@ -497,7 +497,12 @@ CoreConnectSingleController (
>//
>// Add the Driver Family Override Protocol drivers for
> ControllerHandle
>//
> -  while (TRUE) {
> +  Status = CoreLocateProtocol (
> + ,
> + NULL,
> + (VOID **)
> + );
> +  while (!EFI_ERROR (Status) && (DriverFamilyOverride != NULL)) {
>  HighestIndex   = DriverBindingHandleCount;
>  HighestVersion = 0;
>  for (Index = 0; Index < DriverBindingHandleCount; Index++) {
> --
> 2.39.2
> 
> 
> 
> 
> 



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Re: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use AsmCpuidEx() for CPUID_EXTENDED_TOPOLOGY leaf

[Michael D Kinney]

The issue is if AsmCpuid() is called for an Index value that does depend on 
ECX.  That would be a bug on the caller's part and would not have deterministic 
behavior because ECX on input is not deterministic.  That is the condition that 
would be good to catch.

Mike

From: Ni, Ray 
Sent: Friday, January 19, 2024 3:49 PM
To: Kinney, Michael D ; Tom Lendacky 
; devel@edk2.groups.io; Gao, Liming 
; Liu, Zhiguang ; Dong, Eric 
; Kumar, Rahul R ; Gerd Hoffmann 
; Ard Biesheuvel 
Cc: Michael Roth ; Kinney, Michael D 

Subject: Re: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use AsmCpuidEx() 
for CPUID_EXTENDED_TOPOLOGY leaf

Mike,
For a certain Cupid leaf that does not have sub leaf, Cupid instruction does 
not consume ecx and it always fills ecx with a determined value, defined by sdm.
So, I don't see any hurt to deterministic behavior if not zeroing ecx in 
AsmCpuid.

thanks,
ray

From: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Sent: Saturday, January 20, 2024 7:16:14 AM
To: Ni, Ray mailto:ray...@intel.com>>; Tom Lendacky 
mailto:thomas.lenda...@amd.com>>; 
devel@edk2.groups.io 
mailto:devel@edk2.groups.io>>; Gao, Liming 
mailto:liming@intel.com>>; Liu, Zhiguang 
mailto:zhiguang@intel.com>>; Dong, Eric 
mailto:eric.d...@intel.com>>; Kumar, Rahul R 
mailto:rahul.r.ku...@intel.com>>; Gerd Hoffmann 
mailto:kra...@redhat.com>>; Ard Biesheuvel 
mailto:ardb+tianoc...@kernel.org>>
Cc: Michael Roth mailto:michael.r...@amd.com>>; Kinney, 
Michael D mailto:michael.d.kin...@intel.com>>
Subject: RE: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use AsmCpuidEx() 
for CPUID_EXTENDED_TOPOLOGY leaf

Hi Ray,

It is about having deterministic behavior if a call if made for
a CPUID EAX value that does depend on ECX.  If ECX is not zeroed,
then it will have a random value that may return different
information.

The problem statement from Tom is not about zeroing ECX.  It is
about avoiding code bugs where AsmCpuid() is called for an Index
value that is documented to depend on ECX.  In this case, we would
want an error condition so the developer knows they should use
AsmCpuidEx() instead.

>From looking at the Intel SDM, there is a small set of Index
values that do not look at ECX at all.  We could consider
adding an ASSERT() condition in AsmCpuid() if Index is
a value that depends on ECX.  Perhaps in DEBUG_CODE() so
it is not always present.

Mike

> -Original Message-
> From: Ni, Ray mailto:ray...@intel.com>>
> Sent: Friday, January 19, 2024 2:01 AM
> To: Kinney, Michael D 
> mailto:michael.d.kin...@intel.com>>; Tom Lendacky
> mailto:thomas.lenda...@amd.com>>; 
> devel@edk2.groups.io; Gao, Liming
> mailto:liming@intel.com>>; Liu, Zhiguang 
> mailto:zhiguang@intel.com>>; Dong,
> Eric mailto:eric.d...@intel.com>>; Kumar, Rahul R 
> mailto:rahul.r.ku...@intel.com>>;
> Gerd Hoffmann mailto:kra...@redhat.com>>; Ard Biesheuvel
> mailto:ardb+tianoc...@kernel.org>>
> Cc: Michael Roth mailto:michael.r...@amd.com>>
> Subject: RE: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use
> AsmCpuidEx() for CPUID_EXTENDED_TOPOLOGY leaf
>
> Mike,
> I agree with your words after "However".
> Zeroing ECX in AsmCpuid() is confusing to future code maintainer: If
> CPUID instruction does
> not consume "ECX", why is it needed to zero "ECX"?
>
> Thanks,
> Ray
> > -Original Message-
> > From: Kinney, Michael D 
> > mailto:michael.d.kin...@intel.com>>
> > Sent: Friday, January 19, 2024 7:11 AM
> > To: Tom Lendacky mailto:thomas.lenda...@amd.com>>; 
> > devel@edk2.groups.io;
> > Gao, Liming mailto:liming@intel.com>>; Liu, 
> > Zhiguang
> mailto:zhiguang@intel.com>>;
> > Dong, Eric mailto:eric.d...@intel.com>>; Ni, Ray 
> > mailto:ray...@intel.com>>; Kumar,
> Rahul R
> > mailto:rahul.r.ku...@intel.com>>; Gerd Hoffmann 
> > mailto:kra...@redhat.com>>; Ard
> > Biesheuvel mailto:ardb+tianoc...@kernel.org>>
> > Cc: Michael Roth mailto:michael.r...@amd.com>>; 
> > Kinney, Michael D
> > mailto:michael.d.kin...@intel.com>>
> > Subject: RE: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use
> > AsmCpuidEx() for CPUID_EXTENDED_TOPOLOGY leaf
> >
> > Hi Tom,
> >
> > I do not see any harm in zeroing ECX in AsmCpuid().
> >
> > If it is not zeroed, then it would have an undefined value.
> >
> > However, calling AsmCpuid() for any Index that evaluates ECX
> > (including a check for 0) should never be done.  If ECX is
> > evaluated for a given Index, then AsmCpuIdEx() must be used.
> >
> > Mike
> >
> > > -Original Message-
> > > From: Tom Lendacky 
> > > mailto:thomas.lenda...@amd.com>>
> > > Sent: Wednesday, January 17, 2024 1:26 PM
> > > To: devel@edk2.groups.io; Kinney, Michael D
> > > mailto:michael.d.kin...@intel.com>>; Gao, 
> > > Liming mailto:liming@intel.com>>;
> Liu,
> > > Zhiguang mailto:zhiguang@intel.com>>; Dong, 
> > > Eric 

Re: [edk2-devel] [PATCH 1/6] UefiCpuPkg/LocalApicTimerDxe: Duplicate OvmfPkg/LocalApicTimerDxe driver

[Michael Brown]

On 19/01/2024 23:44, Ni, Ray wrote:
I still want to see if the RestoreTpl2 that does not enable interrupt is 
added as a protocol, and how simple the lib could be.


RestoreTpl() always has to enable interrupts during its execution, since 
interrupts must be allowed to occur while callbacks are running 
(otherwise the callbacks may break due to the system time freezing).


The only alternative approach I am aware of would be to add a 
RestoreTPLEx() call to EFI_BOOT_SERVICES, with an additional parameter 
EnableInterruptsAtRestoredTpl.


RestoreTPLEx() would then:

1. For each TPL between EfiCurrentTpl and OldTpl:
   a) enable interrupts
   b) dispatch any callbacks registered at this TPL
   c) disable interrupts

2. Re-enable interrupts before returning if 
EnableInterruptsAtRestoredTpl is TRUE.


The implementation of RestoreTPL() would then become just a call to 
RestoreTPLEx(OldTPl, (OldTpl < TPL_HIGH_LEVEL)).


This would require a change to the EFI_BOOT_SERVICES table definition, 
which is something that I don't think has happened in the 18 years since 
the UEFI specification was released.  There's a very good chance that 
such a table change would break something, somewhere.


RestoreTPLEx() could be installed as a protocol instead, but it seems 
very messy to have something so fundamental as TPL management and event 
dispatch handled through an installable (and therefore uninstallable) 
protocol.  Are there any other instances where deep internals of DxeCore 
are exposed in this way?


Lastly: I think the RestoreTPLEx approach ought to work, but I have not 
done any testing on it (and have no intention of trying it, unless Intel 
wants to fund the work).  NestedInterruptTplLib has been quite 
thoroughly tested by now.



The reason is about maintainability.
I can image that one day people would question the Lib implementation if 
some timer event issue appears. If the Lib is easy to understand, the 
suspicion could be avoided.
And if the correctness of the Lib can be proven by a thorough test, that 
will be better. But it seems to me the Lib can only be proven as correct 
with careful code review, like some multi-threaded logic.


It's relatively easy to test with a deliberately broken ISR: that's how 
I tested it during development.


The semi-formal proof is an added bonus.  Testing shows that the 
symptoms have gone away, but the semi-formal proof is what gives 
confidence (to me, at least) that the problem has actually been fixed 
properly.


Thanks,

Michael



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Re: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use AsmCpuidEx() for CPUID_EXTENDED_TOPOLOGY leaf

[Ni, Ray]

Mike,
For a certain Cupid leaf that does not have sub leaf, Cupid instruction does 
not consume ecx and it always fills ecx with a determined value, defined by sdm.
So, I don't see any hurt to deterministic behavior if not zeroing ecx in 
AsmCpuid.

thanks,
ray

From: Kinney, Michael D 
Sent: Saturday, January 20, 2024 7:16:14 AM
To: Ni, Ray ; Tom Lendacky ; 
devel@edk2.groups.io ; Gao, Liming 
; Liu, Zhiguang ; Dong, Eric 
; Kumar, Rahul R ; Gerd Hoffmann 
; Ard Biesheuvel 
Cc: Michael Roth ; Kinney, Michael D 

Subject: RE: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use AsmCpuidEx() 
for CPUID_EXTENDED_TOPOLOGY leaf

Hi Ray,

It is about having deterministic behavior if a call if made for
a CPUID EAX value that does depend on ECX.  If ECX is not zeroed,
then it will have a random value that may return different
information.

The problem statement from Tom is not about zeroing ECX.  It is
about avoiding code bugs where AsmCpuid() is called for an Index
value that is documented to depend on ECX.  In this case, we would
want an error condition so the developer knows they should use
AsmCpuidEx() instead.

>From looking at the Intel SDM, there is a small set of Index
values that do not look at ECX at all.  We could consider
adding an ASSERT() condition in AsmCpuid() if Index is
a value that depends on ECX.  Perhaps in DEBUG_CODE() so
it is not always present.

Mike

> -Original Message-
> From: Ni, Ray 
> Sent: Friday, January 19, 2024 2:01 AM
> To: Kinney, Michael D ; Tom Lendacky
> ; devel@edk2.groups.io; Gao, Liming
> ; Liu, Zhiguang ; Dong,
> Eric ; Kumar, Rahul R ;
> Gerd Hoffmann ; Ard Biesheuvel
> 
> Cc: Michael Roth 
> Subject: RE: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use
> AsmCpuidEx() for CPUID_EXTENDED_TOPOLOGY leaf
>
> Mike,
> I agree with your words after "However".
> Zeroing ECX in AsmCpuid() is confusing to future code maintainer: If
> CPUID instruction does
> not consume "ECX", why is it needed to zero "ECX"?
>
> Thanks,
> Ray
> > -Original Message-
> > From: Kinney, Michael D 
> > Sent: Friday, January 19, 2024 7:11 AM
> > To: Tom Lendacky ; devel@edk2.groups.io;
> > Gao, Liming ; Liu, Zhiguang
> ;
> > Dong, Eric ; Ni, Ray ; Kumar,
> Rahul R
> > ; Gerd Hoffmann ; Ard
> > Biesheuvel 
> > Cc: Michael Roth ; Kinney, Michael D
> > 
> > Subject: RE: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use
> > AsmCpuidEx() for CPUID_EXTENDED_TOPOLOGY leaf
> >
> > Hi Tom,
> >
> > I do not see any harm in zeroing ECX in AsmCpuid().
> >
> > If it is not zeroed, then it would have an undefined value.
> >
> > However, calling AsmCpuid() for any Index that evaluates ECX
> > (including a check for 0) should never be done.  If ECX is
> > evaluated for a given Index, then AsmCpuIdEx() must be used.
> >
> > Mike
> >
> > > -Original Message-
> > > From: Tom Lendacky 
> > > Sent: Wednesday, January 17, 2024 1:26 PM
> > > To: devel@edk2.groups.io; Kinney, Michael D
> > > ; Gao, Liming ;
> Liu,
> > > Zhiguang ; Dong, Eric ;
> Ni,
> > > Ray ; Kumar, Rahul R ;
> Gerd
> > > Hoffmann ; Ard Biesheuvel
> > 
> > > Cc: Michael Roth 
> > > Subject: Re: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use
> > > AsmCpuidEx() for CPUID_EXTENDED_TOPOLOGY leaf
> > >
> > > On 11/28/23 08:35, Lendacky, Thomas via groups.io wrote:
> > > > On 11/6/23 17:15, Tom Lendacky wrote:
> > > >> On 11/6/23 16:45, Lendacky, Thomas via groups.io wrote:
> > > >>> The CPUID_EXTENDED_TOPOLOGY CPUID leaf takes a subleaf as input
> > when
> > > >>> returning CPUID information. However, the AsmCpuid() function
> does
> > > not
> > > >>> zero out ECX before the CPUID instruction, so the input leaf is
> used
> > > as
> > > >>> the sub-leaf for the CPUID request and returns erroneous/invalid
> > > CPUID
> > > >>> data, since the intent of the request was to get data related to
> > > sub-leaf
> > > >>> 0. Instead, use AsmCpuidEx() for the CPUID_EXTENDED_TOPOLOGY
> leaf.
> > > >>
> > > >> Alternatively, the AsmCpuid() function could be changed to XOR
> ECX
> > > >> before invoking the CPUID instruction. This would ensure that the
> 0
> > > >> sub-leaf is returned for any CPUID leaves that support sub-
> leaves.
> > > >> Thoughts?
> > > >>
> > > >> Adding some additional maintainers for their thoughts, too.
> > > >
> > > > Any thoughts on this approach (as a separate, unrelated patch) to
> > > > eliminate future issues that could pop up?
> > > >
> > > > Seems like zeroing out ECX before calling CPUID would be an
> > > appropriate
> > > > thing to do, but I'm not sure if that will have any impact on the
> > > existing
> > > > code base... it shouldn't, but you never know.
> > >
> > > Just a re-ping for thoughts on this.
> > >
> > > Thanks,
> > > Tom
> > >
> > > >
> > > > Thanks,
> > > > Tom
> > > >
> > > >>
> > > >> Thanks,
> > > >> Tom


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Re: [edk2-devel] [PATCH 1/6] UefiCpuPkg/LocalApicTimerDxe: Duplicate OvmfPkg/LocalApicTimerDxe driver

[Ni, Ray]

Michael,
I still want to see if the RestoreTpl2 that does not enable interrupt is added 
as a protocol, and how simple the lib could be.
The reason is about maintainability.
I can image that one day people would question the Lib implementation if some 
timer event issue appears. If the Lib is easy to understand, the suspicion 
could be avoided.
And if the correctness of the Lib can be proven by a thorough test, that will 
be better. But it seems to me the Lib can only be proven as correct with 
careful code review, like some multi-threaded logic.



thanks,
ray

From: Michael Brown 
Sent: Saturday, January 20, 2024 1:42 AM
To: devel@edk2.groups.io ; Ni, Ray ; 
Laszlo Ersek ; kra...@redhat.com 
Cc: Pedro Falcato ; Kinney, Michael D 
; Desimone, Nathaniel L 
; Kumar, Rahul R ; 
Liu, Zhiguang 
Subject: Re: [edk2-devel] [PATCH 1/6] UefiCpuPkg/LocalApicTimerDxe: Duplicate 
OvmfPkg/LocalApicTimerDxe driver

On 19/01/2024 13:14, Ni, Ray wrote:
> So, the interrupt re-entrance we want to avoid is “env:NOTIFY”  ->
> “env:NOTIFY”, or “env:CALLBACK” -> “env:CALLBACK”, or “env:APPLICATION”
> -> “env:APPLICATION”. Because it’s endless.
>
> NestedTplInterruptLib was written to avoid it.

Yes, precisely this.

>  2. Some questions on NestedInterruptTplLib.
>
>  1. Can we remove DisableInterruptsOnIret()? That means the inner
> interrupt handler would returns to the outer world with interrupt
> enabled and TPL==HIGH. But I don’t see any issue with that.
Using DisableInterruptsOnIret() allows us to guarantee that absolutely
nothing happens between the "DEFERRAL INVOCATION POINT" and "DEFERRAL
RETURN POINT" described in the comments in Tpl.c.

If we don't use DisableInterruptsOnIret() then we lose this guarantee,
and the situation becomes even more complex than it already is.

I don't personally feel able to reason through all the possible
circumstances that could arise if an interrupt were to occur between
"DEFERRAL INVOCATION POINT" and "DEFERRAL RETURN POINT", so I don't feel
safe removing the use of DisableInterruptsOnIret().

I have a vague memory that I was still experiencing some kind of crashes
before I added DisableInterruptsOnIret(), but I cannot now remember any
details, sorry.

>  2. If DxeCore can be changed, do you have an easier-to-understand
> solution? It really took me 2 days to understand why
> NestedInterruptTplLib is written in today’s way.

The ability to change DxeCore doesn't help, unfortunately.

If we could change the prototype of RaiseTPL() and RestoreTPL() to
include a flag indicating whether or not interrupts should be enabled at
the point that RestoreTPL() returns, then that would allow for an
easier-to-understand solution.

This would require making a breaking change to the UEFI specification,
though, so it's not a viable solution.


I do appreciate that it's difficult to understand the internals of
NestedInterruptTplLib.  It's fundamentally having to solve a very
difficult problem within the constraints of the UEFI API.  I think the
solution that NestedInterruptTplLib provides is as simple as it's
possible to get, and it does at least have the advantage that all of the
complexity is hidden inside the library: the caller gets to just change
two lines:

- OriginalTPL = gBS->RaiseTPL(TPL_HIGH_LEVEL);
+ OriginalTPL = NestedInterruptRaiseTPL();
   ...
- gBS->RestoreTPL(OriginalTPL);
+ NestedInterruptRestoreTPL(OriginalTPL, Context, );


I'll send through a patch to move NestedInterruptTplLib to MdeModulePkg.

Thanks,

Michael



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[edk2-devel] [PATCH 1/1] MdeModulePkg: Move NestedInterruptTplLib to MdeModulePkg

[Michael Brown]

NestedInterruptTplLib provides a way for timer interrupt handlers
(which must support nested interrupts) to prevent unbounded stack
consumption.

The underlying issue was first observed in OvmfPkg, since interrupt
storms can arise more easily in virtual machines due to CPU
starvation.  However, careful investigation shows that the unbounded
stack consumption can also occur in physical machines.

Move NestedInterruptTplLib from OvmfPkg to MdeModulePkg so that it can
more easily be consumed by drivers outside of OvmfPkg.

Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Gerd Hoffmann 
Cc: Michael D Kinney 
Signed-off-by: Michael Brown 
---
 MdeModulePkg/MdeModulePkg.dec | 4 
 OvmfPkg/OvmfPkg.dec   | 4 
 OvmfPkg/AmdSev/AmdSevX64.dsc  | 2 +-
 OvmfPkg/CloudHv/CloudHvX64.dsc| 2 +-
 OvmfPkg/IntelTdx/IntelTdxX64.dsc  | 2 +-
 OvmfPkg/Microvm/MicrovmX64.dsc| 2 +-
 OvmfPkg/OvmfPkgIa32.dsc   | 2 +-
 OvmfPkg/OvmfPkgIa32X64.dsc| 2 +-
 OvmfPkg/OvmfPkgX64.dsc| 2 +-
 OvmfPkg/OvmfXen.dsc   | 2 +-
 UefiPayloadPkg/UefiPayloadPkg.dsc | 2 +-
 .../Library/NestedInterruptTplLib/NestedInterruptTplLib.inf   | 2 +-
 OvmfPkg/LocalApicTimerDxe/LocalApicTimerDxe.inf   | 1 +
 .../Include/Library/NestedInterruptTplLib.h   | 0
 .../Library/NestedInterruptTplLib/Iret.h  | 0
 .../Library/NestedInterruptTplLib/Iret.c  | 0
 {OvmfPkg => MdeModulePkg}/Library/NestedInterruptTplLib/Tpl.c | 0
 17 files changed, 15 insertions(+), 14 deletions(-)
 rename {OvmfPkg => 
MdeModulePkg}/Library/NestedInterruptTplLib/NestedInterruptTplLib.inf (91%)
 rename {OvmfPkg => MdeModulePkg}/Include/Library/NestedInterruptTplLib.h (100%)
 rename {OvmfPkg => MdeModulePkg}/Library/NestedInterruptTplLib/Iret.h (100%)
 rename {OvmfPkg => MdeModulePkg}/Library/NestedInterruptTplLib/Iret.c (100%)
 rename {OvmfPkg => MdeModulePkg}/Library/NestedInterruptTplLib/Tpl.c (100%)

diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index a2cd83345f5b..d6fb729af5a7 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -169,6 +169,10 @@ [LibraryClasses]
   #
   ImagePropertiesRecordLib|Include/Library/ImagePropertiesRecordLib.h
 
+  ##  @libraryclass  Handle TPL changes within nested interrupt handlers
+  #
+  NestedInterruptTplLib|Include/Library/NestedInterruptTplLib.h
+
 [Guids]
   ## MdeModule package token space guid
   # Include/Guid/MdeModulePkgTokenSpace.h
diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index b44fa039f76c..05d43d5a6861 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -41,10 +41,6 @@ [LibraryClasses]
   #
   MemEncryptTdxLib|Include/Library/MemEncryptTdxLib.h
 
-  ##  @libraryclass  Handle TPL changes within nested interrupt handlers
-  #
-  NestedInterruptTplLib|Include/Library/NestedInterruptTplLib.h
-
   ##  @libraryclass  Save and restore variables using a file
   #
   NvVarsFileLib|Include/Library/NvVarsFileLib.h
diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc
index a31a89344a60..80456f878a22 100644
--- a/OvmfPkg/AmdSev/AmdSevX64.dsc
+++ b/OvmfPkg/AmdSev/AmdSevX64.dsc
@@ -354,7 +354,7 @@ [LibraryClasses.common.DXE_DRIVER]
 !endif
   PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
   MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
-  
NestedInterruptTplLib|OvmfPkg/Library/NestedInterruptTplLib/NestedInterruptTplLib.inf
+  
NestedInterruptTplLib|MdeModulePkg/Library/NestedInterruptTplLib/NestedInterruptTplLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
 
diff --git a/OvmfPkg/CloudHv/CloudHvX64.dsc b/OvmfPkg/CloudHv/CloudHvX64.dsc
index b522fa10594d..9c6c68ae2c35 100644
--- a/OvmfPkg/CloudHv/CloudHvX64.dsc
+++ b/OvmfPkg/CloudHv/CloudHvX64.dsc
@@ -394,7 +394,7 @@ [LibraryClasses.common.DXE_DRIVER]
 !endif
   PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
   MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
-  
NestedInterruptTplLib|OvmfPkg/Library/NestedInterruptTplLib/NestedInterruptTplLib.inf
+  
NestedInterruptTplLib|MdeModulePkg/Library/NestedInterruptTplLib/NestedInterruptTplLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf
   QemuLoadImageLib|OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.inf
 
diff --git a/OvmfPkg/IntelTdx/IntelTdxX64.dsc b/OvmfPkg/IntelTdx/IntelTdxX64.dsc
index 82e3e41cfc57..5270c59e1279 100644
--- a/OvmfPkg/IntelTdx/IntelTdxX64.dsc
+++ b/OvmfPkg/IntelTdx/IntelTdxX64.dsc
@@ -310,7 +310,7 @@ 

Re: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use AsmCpuidEx() for CPUID_EXTENDED_TOPOLOGY leaf

[Michael D Kinney]

Hi Ray,

It is about having deterministic behavior if a call if made for
a CPUID EAX value that does depend on ECX.  If ECX is not zeroed,
then it will have a random value that may return different
information.

The problem statement from Tom is not about zeroing ECX.  It is
about avoiding code bugs where AsmCpuid() is called for an Index
value that is documented to depend on ECX.  In this case, we would
want an error condition so the developer knows they should use 
AsmCpuidEx() instead.

From looking at the Intel SDM, there is a small set of Index
values that do not look at ECX at all.  We could consider
adding an ASSERT() condition in AsmCpuid() if Index is 
a value that depends on ECX.  Perhaps in DEBUG_CODE() so
it is not always present. 

Mike

> -Original Message-
> From: Ni, Ray 
> Sent: Friday, January 19, 2024 2:01 AM
> To: Kinney, Michael D ; Tom Lendacky
> ; devel@edk2.groups.io; Gao, Liming
> ; Liu, Zhiguang ; Dong,
> Eric ; Kumar, Rahul R ;
> Gerd Hoffmann ; Ard Biesheuvel
> 
> Cc: Michael Roth 
> Subject: RE: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use
> AsmCpuidEx() for CPUID_EXTENDED_TOPOLOGY leaf
> 
> Mike,
> I agree with your words after "However".
> Zeroing ECX in AsmCpuid() is confusing to future code maintainer: If
> CPUID instruction does
> not consume "ECX", why is it needed to zero "ECX"?
> 
> Thanks,
> Ray
> > -Original Message-
> > From: Kinney, Michael D 
> > Sent: Friday, January 19, 2024 7:11 AM
> > To: Tom Lendacky ; devel@edk2.groups.io;
> > Gao, Liming ; Liu, Zhiguang
> ;
> > Dong, Eric ; Ni, Ray ; Kumar,
> Rahul R
> > ; Gerd Hoffmann ; Ard
> > Biesheuvel 
> > Cc: Michael Roth ; Kinney, Michael D
> > 
> > Subject: RE: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use
> > AsmCpuidEx() for CPUID_EXTENDED_TOPOLOGY leaf
> >
> > Hi Tom,
> >
> > I do not see any harm in zeroing ECX in AsmCpuid().
> >
> > If it is not zeroed, then it would have an undefined value.
> >
> > However, calling AsmCpuid() for any Index that evaluates ECX
> > (including a check for 0) should never be done.  If ECX is
> > evaluated for a given Index, then AsmCpuIdEx() must be used.
> >
> > Mike
> >
> > > -Original Message-
> > > From: Tom Lendacky 
> > > Sent: Wednesday, January 17, 2024 1:26 PM
> > > To: devel@edk2.groups.io; Kinney, Michael D
> > > ; Gao, Liming ;
> Liu,
> > > Zhiguang ; Dong, Eric ;
> Ni,
> > > Ray ; Kumar, Rahul R ;
> Gerd
> > > Hoffmann ; Ard Biesheuvel
> > 
> > > Cc: Michael Roth 
> > > Subject: Re: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use
> > > AsmCpuidEx() for CPUID_EXTENDED_TOPOLOGY leaf
> > >
> > > On 11/28/23 08:35, Lendacky, Thomas via groups.io wrote:
> > > > On 11/6/23 17:15, Tom Lendacky wrote:
> > > >> On 11/6/23 16:45, Lendacky, Thomas via groups.io wrote:
> > > >>> The CPUID_EXTENDED_TOPOLOGY CPUID leaf takes a subleaf as input
> > when
> > > >>> returning CPUID information. However, the AsmCpuid() function
> does
> > > not
> > > >>> zero out ECX before the CPUID instruction, so the input leaf is
> used
> > > as
> > > >>> the sub-leaf for the CPUID request and returns erroneous/invalid
> > > CPUID
> > > >>> data, since the intent of the request was to get data related to
> > > sub-leaf
> > > >>> 0. Instead, use AsmCpuidEx() for the CPUID_EXTENDED_TOPOLOGY
> leaf.
> > > >>
> > > >> Alternatively, the AsmCpuid() function could be changed to XOR
> ECX
> > > >> before invoking the CPUID instruction. This would ensure that the
> 0
> > > >> sub-leaf is returned for any CPUID leaves that support sub-
> leaves.
> > > >> Thoughts?
> > > >>
> > > >> Adding some additional maintainers for their thoughts, too.
> > > >
> > > > Any thoughts on this approach (as a separate, unrelated patch) to
> > > > eliminate future issues that could pop up?
> > > >
> > > > Seems like zeroing out ECX before calling CPUID would be an
> > > appropriate
> > > > thing to do, but I'm not sure if that will have any impact on the
> > > existing
> > > > code base... it shouldn't, but you never know.
> > >
> > > Just a re-ping for thoughts on this.
> > >
> > > Thanks,
> > > Tom
> > >
> > > >
> > > > Thanks,
> > > > Tom
> > > >
> > > >>
> > > >> Thanks,
> > > >> Tom


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Re: [edk2-devel] [PATCH v1 1/1] PrmPkg/PrmInfo: Drop -r parameter

[Ankit Sinha]

Reviewed-by: Ankit Sinha

> -Original Message-
> From: mikub...@linux.microsoft.com 
> Sent: Wednesday, January 10, 2024 5:20 PM
> To: devel@edk2.groups.io
> Cc: Desimone, Nathaniel L ; Sinha, Ankit
> 
> Subject: [PATCH v1 1/1] PrmPkg/PrmInfo: Drop -r parameter
> 
> From: Michael Kubacki 
> 
> The "-r" parameter was not added to the application so remove it from the
> help string.
> 
> The standards section is also updated to point to the current specification
> location on uefi.org.
> 
> Cc: Nate DeSimone 
> Cc: Ankit Sinha 
> Signed-off-by: Michael Kubacki 
> ---
>  PrmPkg/Application/PrmInfo/PrmInfoStrings.uni | 10 +++---
>  1 file changed, 3 insertions(+), 7 deletions(-)
> 
> diff --git a/PrmPkg/Application/PrmInfo/PrmInfoStrings.uni
> b/PrmPkg/Application/PrmInfo/PrmInfoStrings.uni
> index 9385fd848344..756cf97c7c37 100644
> --- a/PrmPkg/Application/PrmInfo/PrmInfoStrings.uni
> +++ b/PrmPkg/Application/PrmInfo/PrmInfoStrings.uni
> @@ -61,7 +61,7 @@
>  "Display and test Platform Runtime Mechanism (PRM) modules.\r\n"
>  ".SH SYNOPSIS\r\n"
>  "\r\n"
> -"PRMINFO [[-?] | [-b] [-l] [-r] [-t (guid | all)]]\r\n"
> +"PRMINFO [[-?] | [-b] [-l] [-t (guid | all)]]\r\n"
>  ".SH OPTIONS\r\n"
>  " \r\n"
>  "  -? - Show help.\r\n"
> @@ -107,18 +107,14 @@
>  ".SH STANDARDS\r\n"
>  " \r\n"
>  "STANDARDS:\r\n"
> -"  Platform Runtime Mechanism (PRM) is currently in a draft state and
> the\r\n"
> -"  specification is not yet publicly available. A reference to the 
> publicly\r\n"
> -"  available document will replace this text when it is available.\r\n"
> +"  The Platform Runtime Mechanism (PRM) specification is available at:\r\n"
> +"
> https://uefi.org/sites/default/files/resources/Platform%20Runtime%20Mech
> anism%20-%20with%20legal%20notice.pdf\r\n"
>  ".SH EXAMPLES\r\n"
>  " \r\n"
>  "EXAMPLES:\r\n"
>  "  * To display a list of the installed PRM modules and PRM handlers:\r\n"
>  "fs0:\> prminfo -l\r\n"
>  " \r\n"
> -"  * To validate the installed PRMT ACPI table:\r\n"
> -"fs0:\> prminfo -r\r\n"
> -" \r\n"
>  "  * To call a PRM handler by GUID:\r\n"
>  "fs0:\> prminfo -t e1466081-7562-430f-896b-b0e523dc335a\r\n"
>  " \r\n"
> --
> 2.43.0.windows.1



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Re: [edk2-devel] AArch64 with HeapGuard: page allocations wrongly aligned

[Oliver Smith-Denny]

On 1/19/2024 8:34 AM, Rebecca Cran wrote:

On 1/18/2024 12:26 PM, Oliver Smith-Denny wrote:


Does this solve your issue? I have to run to a meeting, but I can
write this in actual patch form (and give it a quick test) later.


Unfortunately that didn't work: I still get the assert.

...
SmbiosCreate64BitTable() re-allocate SMBIOS 64-bit table

ASSERT_EFI_ERROR (Status = Invalid Parameter)
ASSERT [SmbiosDxe] 
/local-data/src/ampereone/edk2/MdePkg/Library/UefiMemoryAllocationLib/MemoryAllocationLib.c(145): !(((INTN)(RETURN_STATUS)(Status)) < 0)




Thanks for trying. In lieu of being able to test myself, all I can offer
is adding some more prints, when the memory gets allocated, making sure
it is 64k aligned then. I'd be curious to see what the address is that
is attempting to be freed.

My guess (as it was earlier) is that it is going to be aligned to
64k but + 4k. I.e the guard page at the front is throwing it off. There
may have just been an error in my attempt to fix the check for that.

If however that address is not 64k + 4k aligned, then something else is
afoot.

Happy to look at some more data if you get it or can engineer an example
on an open source system (can you force the system to call this function
twice even without the extra SMBIOS entries, etc.).

Thanks,
Oliver


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Re: [edk2-devel] [PATCH edk2-platforms v2 4/4] Platform/SbsaQemu: move FdtHandlerLib to SbsaQemuHardwareInfoLib

[Leif Lindholm]

On Tue, Jan 16, 2024 at 08:48:35 +0100, Marcin Juszkiewicz wrote:
> There is no need for EDK2 to know that there is DeviceTree around.
> All hardware information is read using functions from
> SbsaQemuHardwareInfoLib library.
> 
> Library fallbacks to parsing DT if needed (used with too old TF-A).
> 
> Signed-off-by: Marcin Juszkiewicz 

Reviewed-by: Leif Lindholm 


> ---
>  Platform/Qemu/SbsaQemu/SbsaQemu.dsc |   1 -
>  .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf |   4 +-
>  .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf  |  33 ---
>  .../SbsaQemuHardwareInfoLib.inf |   2 +
>  .../Qemu/SbsaQemu/Include/Library/FdtHelperLib.h|  36 ---
>  .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c   |   4 +-
>  .../SbsaQemu/Library/FdtHelperLib/FdtHelperLib.c|  98 --
>  .../SbsaQemuHardwareInfoLib.c   | 104 
> 
>  8 files changed, 110 insertions(+), 172 deletions(-)
> 
> diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc 
> b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
> index 07cb3490f4cf..bde61651da2e 100644
> --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
> +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
> @@ -126,7 +126,6 @@ [LibraryClasses.common]
># ARM PL011 UART Driver
>PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
>  
> -  FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf
>OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
>
> SbsaQemuHardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
>  
> diff --git 
> a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf 
> b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
> index 291743b19115..9bf0a13de5d1 100644
> --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
> +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf
> @@ -1,7 +1,7 @@
>  ## @file
>  #  This driver modifies ACPI tables for the Qemu SBSA platform
>  #
> -#  Copyright (c) 2020, Linaro Ltd. All rights reserved.
> +#  Copyright (c) Linaro Ltd. All rights reserved.
>  #
>  #  SPDX-License-Identifier: BSD-2-Clause-Patent
>  #
> @@ -35,9 +35,9 @@ [LibraryClasses]
>BaseLib
>DebugLib
>DxeServicesLib
> -  FdtHelperLib
>PcdLib
>PrintLib
> +  SbsaQemuHardwareInfoLib
>UefiDriverEntryPoint
>UefiLib
>UefiRuntimeServicesTableLib
> diff --git a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf 
> b/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf
> deleted file mode 100644
> index 9c059f3e5851..
> --- a/Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf
> +++ /dev/null
> @@ -1,33 +0,0 @@
> -#/** @file
> -#
> -#  Component description file for FdtHelperLib module
> -#
> -#  Copyright (c) 2021, NUVIA Inc. All rights reserved.
> -#
> -#  SPDX-License-Identifier: BSD-2-Clause-Patent
> -#
> -#**/
> -
> -[Defines]
> -  INF_VERSION= 1.29
> -  BASE_NAME  = FdtHelperLib
> -  FILE_GUID  = 34e4396f-c2fc-4f9e-ad58-0f98e99e3875
> -  MODULE_TYPE= BASE
> -  VERSION_STRING = 1.0
> -  LIBRARY_CLASS  = FdtHelperLib
> -
> -[Sources.common]
> -  FdtHelperLib.c
> -
> -[Packages]
> -  EmbeddedPkg/EmbeddedPkg.dec
> -  MdePkg/MdePkg.dec
> -  Silicon/Qemu/SbsaQemu/SbsaQemu.dec
> -
> -[LibraryClasses]
> -  DebugLib
> -  FdtLib
> -  PcdLib
> -
> -[FixedPcd]
> -  gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
> diff --git 
> a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
>  
> b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
> index 8c2def1878e6..5358dd339eb3 100644
> --- 
> a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
> +++ 
> b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
> @@ -27,6 +27,8 @@ [LibraryClasses]
>ArmSmcLib
>BaseMemoryLib
>DebugLib
> +  FdtLib
>  
>   [Pcd]
> +  gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
>gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount
> diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h 
> b/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h
> deleted file mode 100644
> index ea9159857215..
> --- a/Silicon/Qemu/SbsaQemu/Include/Library/FdtHelperLib.h
> +++ /dev/null
> @@ -1,36 +0,0 @@
> -/** @file
> -*  FdtHelperLib.h
> -*
> -*  Copyright (c) 2021, NUVIA Inc. All rights reserved.
> -*
> -*  SPDX-License-Identifier: BSD-2-Clause-Patent
> -*
> -**/
> -
> -#ifndef FDT_HELPER_LIB_
> -#define FDT_HELPER_LIB_
> -
> -/**
> -  Get MPIDR for a given cpu from device tree passed by Qemu.
> -
> -  @param [in]   CpuIdIndex of cpu to retrieve MPIDR value for.
> -
> -  @retvalMPIDR value of CPU at index 
> -**/
> 

Re: [edk2-devel] [PATCH edk2-platforms v2 3/4] Platform/SbsaQemu: use PcdCoreCount directly

[Leif Lindholm]

On Tue, Jan 16, 2024 at 08:48:34 +0100, Marcin Juszkiewicz wrote:
> During platform initialization we read amount of cpu cores and set
> PcdCoreCount so there is no need to call FdtHandler.
> 
> Signed-off-by: Marcin Juszkiewicz 
> ---
>  Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf |  6 ++
>  Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c   | 10 --
>  .../Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c  | 12 
> +++-
>  3 files changed, 9 insertions(+), 19 deletions(-)
> 
> diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf 
> b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
> index a34f54d431d4..8e2bf8c512f1 100644
> --- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
> +++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
> @@ -3,7 +3,7 @@
>  #
>  #Copyright (c) 2021, NUVIA Inc. All rights reserved.
>  #Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> -#Copyright (c) 2018, Linaro Limited. All rights reserved.
> +#Copyright (c) 2023, Linaro Ltd. All rights reserved.
>  #
>  #SPDX-License-Identifier: BSD-2-Clause-Patent
>  #
> @@ -29,8 +29,6 @@ [Packages]
>  
>  [LibraryClasses]
>BaseMemoryLib
> -  FdtLib
> -  FdtHelperLib
>IoLib
>PcdLib
>  
> @@ -40,7 +38,6 @@ [Guids]
>  [Pcd]
>gArmTokenSpaceGuid.PcdEmbeddedControllerFirmwareRelease
>gArmTokenSpaceGuid.PcdSystemBiosRelease
> -  gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
>  
>gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemManufacturer
>gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSerialNumber
> @@ -56,3 +53,4 @@ [Pcd]
>gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisManufacturer
>gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisAssetTag
>gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisSKU
> +  gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount
> diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c 
> b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
> index c38f2851904f..ab97768b5ddc 100644
> --- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
> +++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
> @@ -2,7 +2,7 @@
>  *  OemMiscLib.c
>  *
>  *  Copyright (c) 2021, NUVIA Inc. All rights reserved.
> -*  Copyright (c) 2020, Linaro Ltd. All rights reserved.
> +*  Copyright (c) Linaro Ltd. All rights reserved.
>  *
>  *  SPDX-License-Identifier: BSD-2-Clause-Patent
>  *
> @@ -12,14 +12,12 @@
>  #include 
>  #include 
>  #include 
> -#include 
>  #include 
>  #include 
>  #include 
>  #include 
>  #include 
>  #include 
> -#include 
>  
>  /** Returns whether the specified processor is present or not.
>  
> @@ -33,7 +31,7 @@ OemIsProcessorPresent (
>UINTN ProcessorIndex
>)
>  {
> -  if (ProcessorIndex < FdtHelperCountCpus ()) {
> +  if (ProcessorIndex < PcdGet32 (PcdCoreCount)) {
>  return TRUE;
>}
>  
> @@ -76,7 +74,7 @@ OemGetProcessorInformation (
>  {
>UINT16 ProcessorCount;
>  
> -  ProcessorCount = FdtHelperCountCpus ();
> +  ProcessorCount = PcdGet32 (PcdCoreCount);
>  
>if (ProcessorIndex < ProcessorCount) {
>  ProcessorStatus->Bits.CpuStatus   = 1; // CPU enabled
> @@ -121,7 +119,7 @@ OemGetMaxProcessors (
>VOID
>)
>  {
> -  return FdtHelperCountCpus ();
> +  return PcdGet32 (PcdCoreCount);
>  }
>  
>  /** Gets information about the cache at the specified cache level.
> diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c 
> b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
> index 9fb17151d7b8..7ef314ae9f67 100644
> --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
> +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
> @@ -1,7 +1,7 @@
>  /** @file
>  *  This file is an ACPI driver for the Qemu SBSA platform.
>  *
> -*  Copyright (c) 2020, Linaro Ltd. All rights reserved.
> +*  Copyright (c) Linaro Ltd. All rights reserved.
>  *
>  *  SPDX-License-Identifier: BSD-2-Clause-Patent
>  *
> @@ -255,7 +255,7 @@ AddMadtTable (
>   // Initialize GIC Redistributor Structure
>EFI_ACPI_6_0_GICR_STRUCTURE Gicr = SBSAQEMU_MADT_GICR_INIT();
>  
> -  // Get CoreCount which was determined eariler after parsing device tree
> +  // Get CoreCount which was determined earlier from TF-A

Where we got the information from no longer matters, since we've
abstracted that away.

/
Leif

>NumCores = PcdGet32 (PcdCoreCount);
>  
>// Calculate the new table size based on the number of cores
> @@ -291,7 +291,7 @@ AddMadtTable (
>New += sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER);
>  
>// Add new GICC structures for the Cores
> -  for (CoreIndex = 0; CoreIndex < PcdGet32 (PcdCoreCount); CoreIndex++) {
> +  for (CoreIndex = 0; CoreIndex < NumCores; CoreIndex++) {
>  EFI_ACPI_6_0_GIC_STRUCTURE *GiccPtr;
>  
>  CopyMem (New, , sizeof (EFI_ACPI_6_0_GIC_STRUCTURE));
> @@ -758,12 +758,6 @@ InitializeSbsaQemuAcpiDxe (
>  {
>EFI_STATUS  

Re: [edk2-devel] [PATCH edk2-platforms v2 1/4] Platform/SbsaQemu: add SbsaQemuHardwareInfoLib

[Leif Lindholm]

On Tue, Jan 16, 2024 at 08:48:32 +0100, Marcin Juszkiewicz wrote:
> This library provides functions to check for hardware information.
> For now it covers CPU ones:
> 
> - amount of cpu cores
> - MPIDR value for cpu core
> - NUMA node id for cpu core
> 
> Values are read from TF-A using platform specific SMC calls.
> 
> Signed-off-by: Marcin Juszkiewicz 
> ---
>  Platform/Qemu/SbsaQemu/SbsaQemu.dsc |   3 +-
>  .../SbsaQemuHardwareInfoLib.inf |  32 +++
>  .../SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h |   2 +
>  .../Include/Library/SbsaQemuHardwareInfoLib.h   |  45 +
>  .../SbsaQemuHardwareInfoLib.c   | 100 
> 
>  5 files changed, 181 insertions(+), 1 deletion(-)
> 
> diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc 
> b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
> index 378600050df9..07cb3490f4cf 100644
> --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
> +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
> @@ -1,6 +1,6 @@
>  #
>  #  Copyright (c) 2021, NUVIA Inc. All rights reserved.
> -#  Copyright (c) 2019, Linaro Limited. All rights reserved.
> +#  Copyright (c) 2019-2024, Linaro Ltd. All rights reserved.
>  #
>  #  SPDX-License-Identifier: BSD-2-Clause-Patent
>  #
> @@ -128,6 +128,7 @@ [LibraryClasses.common]
>  
>FdtHelperLib|Silicon/Qemu/SbsaQemu/Library/FdtHelperLib/FdtHelperLib.inf
>OemMiscLib|Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
> +  
> SbsaQemuHardwareInfoLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
>  
># Debug Support
>
> PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
> diff --git 
> a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
>  
> b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
> new file mode 100644
> index ..8c2def1878e6
> --- /dev/null
> +++ 
> b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.inf
> @@ -0,0 +1,32 @@
> +#/* @file
> +#
> +#  Copyright (c) Linaro Ltd. All rights reserved.
> +#
> +#  SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +#*/
> +
> +[Defines]
> +  INF_VERSION= 0x0001001c
> +  BASE_NAME  = SbsaQemuHardwareInfoLib
> +  FILE_GUID  = 6454006f-6502-46e2-9be4-4bba8d4b29fb
> +  MODULE_TYPE= BASE
> +  VERSION_STRING = 1.0
> +  LIBRARY_CLASS  = ArmPlatformLib
> +
> +[Sources]
> +  SbsaQemuHardwareInfoLib.c
> +
> +[Packages]
> +  ArmPkg/ArmPkg.dec
> +  EmbeddedPkg/EmbeddedPkg.dec
> +  MdePkg/MdePkg.dec
> +  Silicon/Qemu/SbsaQemu/SbsaQemu.dec
> +
> +[LibraryClasses]
> +  ArmSmcLib
> +  BaseMemoryLib
> +  DebugLib
> +
> + [Pcd]
> +  gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount
> diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h 
> b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
> index 7934875e4aba..e33648ee1462 100644
> --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
> +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h
> @@ -14,5 +14,7 @@
>  #define SIP_SVC_VERSION  SMC_SIP_FUNCTION_ID(1)
>  #define SIP_SVC_GET_GIC  SMC_SIP_FUNCTION_ID(100)
>  #define SIP_SVC_GET_GIC_ITS  SMC_SIP_FUNCTION_ID(101)
> +#define SIP_SVC_GET_CPU_COUNT SMC_SIP_FUNCTION_ID(200)
> +#define SIP_SVC_GET_CPU_NODE SMC_SIP_FUNCTION_ID(201)
>  
>  #endif /* SBSA_QEMU_SMC_H_ */
> diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h 
> b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h
> new file mode 100644
> index ..45262baf3511
> --- /dev/null
> +++ b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h
> @@ -0,0 +1,45 @@
> +/** @file
> +*
> +*  Copyright (c) Linaro Ltd. All rights reserved.
> +*
> +*  SPDX-License-Identifier: BSD-2-Clause-Patent
> +*
> +**/
> +
> +#ifndef SBSA_QEMU_HARDWARE_INFO_
> +#define SBSA_QEMU_HARDWARE_INFO_
> +
> +/**
> +  Get CPU count from information passed by Qemu.
> +
> +**/
> +VOID
> +SbsaQemuGetCpuCount (
> +  VOID
> +  );
> +
> +/**
> +  Get MPIDR for a given cpu from device tree passed by Qemu.
> +
> +  @param [in]   CpuIdIndex of cpu to retrieve MPIDR value for.
> +
> +  @retvalMPIDR value of CPU at index 
> +**/
> +UINT64
> +SbsaQemuGetMpidr (
> +  IN UINTN   CpuId
> +  );
> +
> +/**
> +  Get NUMA node id for a given cpu from device tree passed by Qemu.
> +
> +  @param [in]   CpuIdIndex of cpu to retrieve NUMA node id for.
> +
> +  @retvalNUMA node id for CPU at index 
> +**/
> +UINT64
> +SbsaQemuGetCpuNumaNode (
> +  IN UINTN   CpuId
> +  );
> +
> +#endif /* SBSA_QEMU_HARDWARE_INFO_ */
> diff --git 
> a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
>  
> b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
> new 

Re: [edk2-devel] [PATCH edk2-platforms 1/1] Platform/SbsaQemu: update doc a bit

[Leif Lindholm]

On Tue, Jan 16, 2024 at 19:05:35 +0100, Marcin Juszkiewicz wrote:
> We emulate XHCI controller already. No need to add it.
> 
> Signed-off-by: Marcin Juszkiewicz 
> ---
>  Platform/Qemu/SbsaQemu/Readme.md | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/Platform/Qemu/SbsaQemu/Readme.md 
> b/Platform/Qemu/SbsaQemu/Readme.md
> index 3355adebd4c6..883535dfd20e 100644
> --- a/Platform/Qemu/SbsaQemu/Readme.md
> +++ b/Platform/Qemu/SbsaQemu/Readme.md
> @@ -113,9 +113,9 @@ Create a directory $WORKSPACE that would hold source code 
> of the components.
>```
>$INSTALL_PATH/qemu-system-aarch64 -m 1024 -M sbsa-ref -pflash 
> SBSA_FLASH0.fd -pflash SBSA_FLASH1.fd -serial stdio
>```
> -  You can add XHCI controller with keyboard and mouse by:
> +  You can keyboard and mouse by:

missing "add".
I added that.
Reviewed-by: Leif Lindholm 
Pushed as 82c4c4b03865.

Thanks!

/
Leif

>```
> -  -device qemu-xhci -device usb-mouse -device usb-kbd
> +  -device usb-mouse -device usb-kbd
>```
>You can add the hard drive to platform AHCI controller by `hda` parameter:
>```
> -- 
> 2.43.0
> 
> 
> 
> 
> 
> 


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Re: [edk2-devel] [PATCH] MdeModulePkg/ResetSystemRuntimeDxe: Print Reset Data

[Leif Lindholm]

Hi Ashish,

On 2024-01-19 18:09, Ashish Singhal via groups.io wrote:

Adding tianocore stewards to see if we can get some traction on this.


You've not cc:d Zhichao - who maintains that component - on this patch, 
I've added them.


Please use BaseTools/Scripts/GetMaintainer.py to see who to cc - 
maintainership of some of the modules are split in multiple dimensions 
and it's basically impossible to work out manually.


/
Leif



*From:* Ashish Singhal 
*Sent:* Wednesday, December 6, 2023 5:21 PM
*To:* devel@edk2.groups.io ; 
gaolim...@byosoft.com.cn ; Jeff Brasen 


*Cc:* Ashish Singhal 
*Subject:* [PATCH] MdeModulePkg/ResetSystemRuntimeDxe: Print Reset Data
ResetSystem runtime call allows for sending reset data that
starts with a NULL terminated string. Add support to print
that string on console.

Signed-off-by: Ashish Singhal 
---
  .../Universal/ResetSystemRuntimeDxe/ResetSystem.c | 8 
  1 file changed, 8 insertions(+)

diff --git a/MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystem.c 
b/MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystem.c

index 42f1b1d015..72bb1d2be6 100644
--- a/MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystem.c
+++ b/MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystem.c
@@ -252,6 +252,14 @@ RuntimeServiceResetSystem (
  mResetNotifyDepth
  ));

+  if ((ResetData != NULL) && (DataSize != 0)) {
+    DEBUG ((
+  DEBUG_INFO,
+  "DXE ResetSystem2: ResetData: %s\n",
+  ResetData
+  ));
+  }
+
    if (mResetNotifyDepth <= MAX_RESET_NOTIFY_DEPTH) {
  if (!EfiAtRuntime ()) {
    //
--
2.17.1






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Re: [edk2-devel] [PATCH] MdeModulePkg/ResetSystemRuntimeDxe: Print Reset Data

[Ashish Singhal via groups.io]

Adding tianocore stewards to see if we can get some traction on this.

From: Ashish Singhal 
Sent: Monday, January 1, 2024 10:17 PM
To: devel@edk2.groups.io ; gaolim...@byosoft.com.cn 
; Jeff Brasen 
Subject: Re: [PATCH] MdeModulePkg/ResetSystemRuntimeDxe: Print Reset Data

Hello,

Checking again for some feedback on this.

Thanks
Ashish

From: Ashish Singhal 
Sent: Thursday, December 14, 2023 4:30 PM
To: devel@edk2.groups.io ; gaolim...@byosoft.com.cn 
; Jeff Brasen 
Subject: Re: [PATCH] MdeModulePkg/ResetSystemRuntimeDxe: Print Reset Data

Hello Gao,

Checking if you have any feedback on this.

Thanks
Ashish

From: Ashish Singhal 
Sent: Wednesday, December 6, 2023 5:21 PM
To: devel@edk2.groups.io ; gaolim...@byosoft.com.cn 
; Jeff Brasen 
Cc: Ashish Singhal 
Subject: [PATCH] MdeModulePkg/ResetSystemRuntimeDxe: Print Reset Data

ResetSystem runtime call allows for sending reset data that
starts with a NULL terminated string. Add support to print
that string on console.

Signed-off-by: Ashish Singhal 
---
 .../Universal/ResetSystemRuntimeDxe/ResetSystem.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystem.c 
b/MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystem.c
index 42f1b1d015..72bb1d2be6 100644
--- a/MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystem.c
+++ b/MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystem.c
@@ -252,6 +252,14 @@ RuntimeServiceResetSystem (
 mResetNotifyDepth
 ));

+  if ((ResetData != NULL) && (DataSize != 0)) {
+DEBUG ((
+  DEBUG_INFO,
+  "DXE ResetSystem2: ResetData: %s\n",
+  ResetData
+  ));
+  }
+
   if (mResetNotifyDepth <= MAX_RESET_NOTIFY_DEPTH) {
 if (!EfiAtRuntime ()) {
   //
--
2.17.1



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Re: [edk2-devel] [PATCH 1/6] UefiCpuPkg/LocalApicTimerDxe: Duplicate OvmfPkg/LocalApicTimerDxe driver

[Michael Brown]

On 19/01/2024 13:14, Ni, Ray wrote:
So, the interrupt re-entrance we want to avoid is “env:NOTIFY”  -> 
“env:NOTIFY”, or “env:CALLBACK” -> “env:CALLBACK”, or “env:APPLICATION” 
-> “env:APPLICATION”. Because it’s endless.


NestedTplInterruptLib was written to avoid it.


Yes, precisely this.


 2. Some questions on NestedInterruptTplLib.

 1. Can we remove DisableInterruptsOnIret()? That means the inner
interrupt handler would returns to the outer world with interrupt
enabled and TPL==HIGH. But I don’t see any issue with that.
Using DisableInterruptsOnIret() allows us to guarantee that absolutely 
nothing happens between the "DEFERRAL INVOCATION POINT" and "DEFERRAL 
RETURN POINT" described in the comments in Tpl.c.


If we don't use DisableInterruptsOnIret() then we lose this guarantee, 
and the situation becomes even more complex than it already is.


I don't personally feel able to reason through all the possible 
circumstances that could arise if an interrupt were to occur between 
"DEFERRAL INVOCATION POINT" and "DEFERRAL RETURN POINT", so I don't feel 
safe removing the use of DisableInterruptsOnIret().


I have a vague memory that I was still experiencing some kind of crashes 
before I added DisableInterruptsOnIret(), but I cannot now remember any 
details, sorry.



 2. If DxeCore can be changed, do you have an easier-to-understand
solution? It really took me 2 days to understand why
NestedInterruptTplLib is written in today’s way.


The ability to change DxeCore doesn't help, unfortunately.

If we could change the prototype of RaiseTPL() and RestoreTPL() to 
include a flag indicating whether or not interrupts should be enabled at 
the point that RestoreTPL() returns, then that would allow for an 
easier-to-understand solution.


This would require making a breaking change to the UEFI specification, 
though, so it's not a viable solution.



I do appreciate that it's difficult to understand the internals of 
NestedInterruptTplLib.  It's fundamentally having to solve a very 
difficult problem within the constraints of the UEFI API.  I think the 
solution that NestedInterruptTplLib provides is as simple as it's 
possible to get, and it does at least have the advantage that all of the 
complexity is hidden inside the library: the caller gets to just change 
two lines:


- OriginalTPL = gBS->RaiseTPL(TPL_HIGH_LEVEL);
+ OriginalTPL = NestedInterruptRaiseTPL();
  ...
- gBS->RestoreTPL(OriginalTPL);
+ NestedInterruptRestoreTPL(OriginalTPL, Context, );


I'll send through a patch to move NestedInterruptTplLib to MdeModulePkg.

Thanks,

Michael



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Re: [edk2-devel] AArch64 with HeapGuard: page allocations wrongly aligned

[Rebecca Cran via groups.io]

On 1/18/2024 12:26 PM, Oliver Smith-Denny wrote:


Does this solve your issue? I have to run to a meeting, but I can
write this in actual patch form (and give it a quick test) later.


Unfortunately that didn't work: I still get the assert.

...
SmbiosCreate64BitTable() re-allocate SMBIOS 64-bit table

ASSERT_EFI_ERROR (Status = Invalid Parameter)
ASSERT [SmbiosDxe] 
/local-data/src/ampereone/edk2/MdePkg/Library/UefiMemoryAllocationLib/MemoryAllocationLib.c(145): 
!(((INTN)(RETURN_STATUS)(Status)) < 0)


--
Rebecca Cran


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[edk2-devel] [PATCH v4 0/3] ArmPkg: GenericWatchdogDxe fixes and improvements

[Rebecca Cran via groups.io]

Fixes and improvements to GenericWatchdogDxe.

PR: https://github.com/tianocore/edk2/pull/5176

Changes between v3 and v4:

- Check Interface Identification Register for architecture revision before
  setting the high offset register value.
- Use @par for reference.
- Move setting of EBS flag from patch 2/3 to 3/3.
- Disable the watchdog in the case that EBS has been called and the timer
  period is non-zero.

Rebecca Cran (3):
  ArmPkg: Update GenericWatchdogDxe to allow setting full 48-bit offset
  ArmPkg: Introduce global mTimerPeriod and remove calculation
  ArmPkg: Disable watchdog interaction after exiting boot services

 ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h| 11 +++-
 ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c | 69 
+---
 2 files changed, 54 insertions(+), 26 deletions(-)

-- 
2.34.1



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[edk2-devel] [PATCH v4 2/3] ArmPkg: Introduce global mTimerPeriod and remove calculation

[Rebecca Cran via groups.io]

The calculation of the timer period was broken. Introduce a global
mTimerPeriod so the calculation can be removed. Since mTimerFrequencyHz
is only used in one place, remove the global and make it a local
variable. Do the same with mNumTimerTicks.

Signed-off-by: Rebecca Cran 
---
 ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c | 35 
+---
 1 file changed, 16 insertions(+), 19 deletions(-)

diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c 
b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c
index 20549aa91d94..8dd247c44e8f 100644
--- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c
+++ b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c
@@ -28,13 +28,10 @@
in a second */
 #define TIME_UNITS_PER_SECOND  1000
 
-// Tick frequency of the generic timer basis of the generic watchdog.
-STATIC UINTN  mTimerFrequencyHz = 0;
-
 /* In cases where the compare register was set manually, information about
how long the watchdog was asked to wait cannot be retrieved from hardware.
It is therefore stored here. 0 means the timer is not running. */
-STATIC UINT64  mNumTimerTicks = 0;
+STATIC UINT64  mTimerPeriod = 0;
 
 STATIC UINT8  WatchdogRevision;
 
@@ -95,7 +92,7 @@ WatchdogExitBootServicesEvent (
   )
 {
   WatchdogDisable ();
-  mNumTimerTicks = 0;
+  mTimerPeriod= 0;
 }
 
 /* This function is called when the watchdog's first signal (WS0) goes high.
@@ -110,7 +107,6 @@ WatchdogInterruptHandler (
   )
 {
   STATIC CONST CHAR16  ResetString[] = L"The generic watchdog timer ran out.";
-  UINT64   TimerPeriod;
 
   WatchdogDisable ();
 
@@ -123,8 +119,7 @@ WatchdogInterruptHandler (
   // the timer period plus 1.
   //
   if (mWatchdogNotify != NULL) {
-TimerPeriod = ((TIME_UNITS_PER_SECOND / mTimerFrequencyHz) * 
mNumTimerTicks);
-mWatchdogNotify (TimerPeriod + 1);
+mWatchdogNotify (mTimerPeriod + 1);
   }
 
   gRT->ResetSystem (
@@ -204,22 +199,27 @@ WatchdogSetTimerPeriod (
   IN UINT64TimerPeriod  // In 100ns units
   )
 {
-  UINTN  SystemCount;
+  UINTN   SystemCount;
+  UINT64  TimerFrequencyHz;
+  UINT64  NumTimerTicks;
 
   // if TimerPeriod is 0, this is a request to stop the watchdog.
   if (TimerPeriod == 0) {
-mNumTimerTicks = 0;
+mTimerPeriod = 0;
 WatchdogDisable ();
 return EFI_SUCCESS;
   }
 
   // Work out how many timer ticks will equate to TimerPeriod
-  mNumTimerTicks = (mTimerFrequencyHz * TimerPeriod) / TIME_UNITS_PER_SECOND;
+  TimerFrequencyHz = ArmGenericTimerGetTimerFreq ();
+  ASSERT (TimerFrequencyHz != 0);
+  mTimerPeriod  = TimerPeriod;
+  NumTimerTicks = (TimerFrequencyHz * TimerPeriod) / TIME_UNITS_PER_SECOND;
 
   /* If the number of required ticks is greater than the max the watchdog's
  offset register (WOR) can hold, we need to manually compute and set
  the compare register (WCV) */
-  if (mNumTimerTicks > MAX_UINT48) {
+  if (NumTimerTicks > MAX_UINT48) {
 /* We need to enable the watchdog *before* writing to the compare register,
because enabling the watchdog causes an "explicit refresh", which
clobbers the compare register (WCV). In order to make sure this doesn't
@@ -227,9 +227,9 @@ WatchdogSetTimerPeriod (
 WatchdogWriteOffsetRegister (MAX_UINT48);
 WatchdogEnable ();
 SystemCount = ArmGenericTimerGetSystemCount ();
-WatchdogWriteCompareRegister (SystemCount + mNumTimerTicks);
+WatchdogWriteCompareRegister (SystemCount + NumTimerTicks);
   } else {
-WatchdogWriteOffsetRegister (mNumTimerTicks);
+WatchdogWriteOffsetRegister (NumTimerTicks);
 WatchdogEnable ();
   }
 
@@ -264,7 +264,7 @@ WatchdogGetTimerPeriod (
 return EFI_INVALID_PARAMETER;
   }
 
-  *TimerPeriod = ((TIME_UNITS_PER_SECOND / mTimerFrequencyHz) * 
mNumTimerTicks);
+  *TimerPeriod = mTimerPeriod;
 
   return EFI_SUCCESS;
 }
@@ -332,9 +332,6 @@ GenericWatchdogEntry (
  This will avoid conflicts with the universal watchdog */
   ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, );
 
-  mTimerFrequencyHz = ArmGenericTimerGetTimerFreq ();
-  ASSERT (mTimerFrequencyHz != 0);
-
   // Install interrupt handler
   Status = mInterruptProtocol->RegisterInterruptSource (
  mInterruptProtocol,
@@ -376,9 +373,9 @@ GenericWatchdogEntry (
   );
   ASSERT_EFI_ERROR (Status);
 
-  mNumTimerTicks   = 0;
   WatchdogIId  = MmioRead32 (GENERIC_WDOG_IID_REG);
   WatchdogRevision = (WatchdogIId >> GENERIC_WDOG_IID_REV_SHIFT) & 
GENERIC_WDOG_IID_REV_MASK;
+  mTimerPeriod = 0;
   WatchdogDisable ();
 
   return EFI_SUCCESS;
-- 
2.34.1



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[edk2-devel] [PATCH v4 1/3] ArmPkg: Update GenericWatchdogDxe to allow setting full 48-bit offset

[Rebecca Cran via groups.io]

The generic watchdog offset register is 48 bits wide, and can be set by
performing two 32-bit writes.

Add support for writing the high 16 bits of the offset register and
update the signature of the WatchdogWriteOffsetRegister function to take
a UINT64 value.

Signed-off-by: Rebecca Cran 
---
 ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h| 11 +-
 ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c | 23 
+++-
 2 files changed, 27 insertions(+), 7 deletions(-)

diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h 
b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h
index 9bc3bf47047c..fb117832683f 100644
--- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h
+++ b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h
@@ -1,9 +1,13 @@
 /** @file
 *
+*  Copyright (c) 2023, Ampere Computing LLC. All rights reserved.
 *  Copyright (c) 2013-2017, ARM Limited. All rights reserved.
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
+*  @par Reference(s):
+*  - Generic Watchdog specification in Arm Base System Architecture 1.0C:
+*https://developer.arm.com/documentation/den0094/c/
 **/
 
 #ifndef GENERIC_WATCHDOG_H_
@@ -14,12 +18,17 @@
 
 // Control Frame:
 #define GENERIC_WDOG_CONTROL_STATUS_REG  ((UINTN)FixedPcdGet64 
(PcdGenericWatchdogControlBase) + 0x000)
-#define GENERIC_WDOG_OFFSET_REG  ((UINTN)FixedPcdGet64 
(PcdGenericWatchdogControlBase) + 0x008)
+#define GENERIC_WDOG_OFFSET_REG_LOW  ((UINTN)FixedPcdGet64 
(PcdGenericWatchdogControlBase) + 0x008)
+#define GENERIC_WDOG_OFFSET_REG_HIGH ((UINTN)FixedPcdGet64 
(PcdGenericWatchdogControlBase) + 0x00C)
 #define GENERIC_WDOG_COMPARE_VALUE_REG_LOW   ((UINTN)FixedPcdGet64 
(PcdGenericWatchdogControlBase) + 0x010)
 #define GENERIC_WDOG_COMPARE_VALUE_REG_HIGH  ((UINTN)FixedPcdGet64 
(PcdGenericWatchdogControlBase) + 0x014)
+#define GENERIC_WDOG_IID_REG ((UINTN)FixedPcdGet64 
(PcdGenericWatchdogControlBase) + 0xFCC)
 
 // Values of bit 0 of the Control/Status Register
 #define GENERIC_WDOG_ENABLED   1
 #define GENERIC_WDOG_DISABLED  0
 
+#define GENERIC_WDOG_IID_REV_SHIFT  16
+#define GENERIC_WDOG_IID_REV_MASK   0xF
+
 #endif // GENERIC_WATCHDOG_H_
diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c 
b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c
index 66c6c37c08b0..20549aa91d94 100644
--- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c
+++ b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c
@@ -1,5 +1,6 @@
 /** @file
 *
+*  Copyright (c) 2023, Ampere Computing LLC. All rights reserved.
 *  Copyright (c) 2013-2018, ARM Limited. All rights reserved.
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -35,16 +36,23 @@ STATIC UINTN  mTimerFrequencyHz = 0;
It is therefore stored here. 0 means the timer is not running. */
 STATIC UINT64  mNumTimerTicks = 0;
 
+STATIC UINT8  WatchdogRevision;
+
+#define MAX_UINT48  0xULL
+
 STATIC EFI_HARDWARE_INTERRUPT2_PROTOCOL  *mInterruptProtocol;
 STATIC EFI_WATCHDOG_TIMER_NOTIFY mWatchdogNotify;
 
 STATIC
 VOID
 WatchdogWriteOffsetRegister (
-  UINT32  Value
+  UINT64  Value
   )
 {
-  MmioWrite32 (GENERIC_WDOG_OFFSET_REG, Value);
+  MmioWrite32 (GENERIC_WDOG_OFFSET_REG_LOW, Value & MAX_UINT32);
+  if (WatchdogRevision == 1) {
+MmioWrite32 (GENERIC_WDOG_OFFSET_REG_HIGH, (Value >> 32) & MAX_UINT16);
+  }
 }
 
 STATIC
@@ -211,17 +219,17 @@ WatchdogSetTimerPeriod (
   /* If the number of required ticks is greater than the max the watchdog's
  offset register (WOR) can hold, we need to manually compute and set
  the compare register (WCV) */
-  if (mNumTimerTicks > MAX_UINT32) {
+  if (mNumTimerTicks > MAX_UINT48) {
 /* We need to enable the watchdog *before* writing to the compare register,
because enabling the watchdog causes an "explicit refresh", which
clobbers the compare register (WCV). In order to make sure this doesn't
trigger an interrupt, set the offset to max. */
-WatchdogWriteOffsetRegister (MAX_UINT32);
+WatchdogWriteOffsetRegister (MAX_UINT48);
 WatchdogEnable ();
 SystemCount = ArmGenericTimerGetSystemCount ();
 WatchdogWriteCompareRegister (SystemCount + mNumTimerTicks);
   } else {
-WatchdogWriteOffsetRegister ((UINT32)mNumTimerTicks);
+WatchdogWriteOffsetRegister (mNumTimerTicks);
 WatchdogEnable ();
   }
 
@@ -310,6 +318,7 @@ GenericWatchdogEntry (
 {
   EFI_STATUS  Status;
   EFI_HANDLE  Handle;
+  UINT32  WatchdogIId;
 
   Status = gBS->LocateProtocol (
   ,
@@ -367,7 +376,9 @@ GenericWatchdogEntry (
   );
   ASSERT_EFI_ERROR (Status);
 
-  mNumTimerTicks = 0;
+  mNumTimerTicks   = 0;
+  WatchdogIId  = MmioRead32 (GENERIC_WDOG_IID_REG);
+  WatchdogRevision = (WatchdogIId >> GENERIC_WDOG_IID_REV_SHIFT) & 
GENERIC_WDOG_IID_REV_MASK;
   WatchdogDisable ();
 
   return EFI_SUCCESS;
-- 
2.34.1



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[edk2-devel] [PATCH v4 3/3] ArmPkg: Disable watchdog interaction after exiting boot services

[Rebecca Cran via groups.io]

Update GenericWatchdogDxe to disable watchdog interaction after exiting
boot services. Also, move the mEfiExitBootServicesEvent event to the top
of the file with the other static variables.

Signed-off-by: Rebecca Cran 
---
 ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c | 17 ++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c 
b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c
index 8dd247c44e8f..189194a2b9ee 100644
--- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c
+++ b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c
@@ -35,10 +35,14 @@ STATIC UINT64  mTimerPeriod = 0;
 
 STATIC UINT8  WatchdogRevision;
 
+/* disables watchdog interaction after Exit Boot Services */
+STATIC BOOLEAN  mExitedBootServices = FALSE;
+
 #define MAX_UINT48  0xULL
 
 STATIC EFI_HARDWARE_INTERRUPT2_PROTOCOL  *mInterruptProtocol;
 STATIC EFI_WATCHDOG_TIMER_NOTIFY mWatchdogNotify;
+STATIC EFI_EVENT mEfiExitBootServicesEvent;
 
 STATIC
 VOID
@@ -93,6 +97,7 @@ WatchdogExitBootServicesEvent (
 {
   WatchdogDisable ();
   mTimerPeriod= 0;
+  mExitedBootServices = TRUE;
 }
 
 /* This function is called when the watchdog's first signal (WS0) goes high.
@@ -203,7 +208,15 @@ WatchdogSetTimerPeriod (
   UINT64  TimerFrequencyHz;
   UINT64  NumTimerTicks;
 
-  // if TimerPeriod is 0, this is a request to stop the watchdog.
+  // If we've exited Boot Services but TimerPeriod isn't zero, this
+  // indicates that the caller is doing something wrong.
+  if (mExitedBootServices && (TimerPeriod != 0)) {
+mTimerPeriod = 0;
+WatchdogDisable ();
+return EFI_DEVICE_ERROR;
+  }
+
+  // If TimerPeriod is 0 this is a request to stop the watchdog.
   if (TimerPeriod == 0) {
 mTimerPeriod = 0;
 WatchdogDisable ();
@@ -307,8 +320,6 @@ STATIC EFI_WATCHDOG_TIMER_ARCH_PROTOCOL  mWatchdogTimer = {
   WatchdogGetTimerPeriod
 };
 
-STATIC EFI_EVENT  mEfiExitBootServicesEvent;
-
 EFI_STATUS
 EFIAPI
 GenericWatchdogEntry (
-- 
2.34.1



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Re: [edk2-devel] [PATCH V2] FmpDevicePkg: GetImageInfo Add missing condition

[Pethaiyan, Madhan]

Hi All,

I had corrected the description, added the UEFI spec version and section 
details . Please check and approve it 

Thanks,
P. Madhan

-Original Message-
From: Pethaiyan, Madhan  
Sent: Monday, January 8, 2024 12:13 PM
To: devel@edk2.groups.io
Cc: Pethaiyan, Madhan ; Gao, Liming 
; Kinney, Michael D ; Xu, 
Wei6 
Subject: [PATCH V2] FmpDevicePkg: GetImageInfo Add missing condition

From: "Pethaiyan, Madhan" 

UEFI Spec 2.10 , 23.1 Firmware Management Protocol , Added missing condition 
check under GetImageInfo function, if the PackageVersionName is NULL return 
EFI_INVALID_PARAMETER

Signed-off-by: Pethaiyan Madhan 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Wei6 Xu 
---
 FmpDevicePkg/FmpDxe/FmpDxe.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/FmpDevicePkg/FmpDxe/FmpDxe.c b/FmpDevicePkg/FmpDxe/FmpDxe.c index 
1e7ec4a09e..e87094f84c 100644
--- a/FmpDevicePkg/FmpDxe/FmpDxe.c
+++ b/FmpDevicePkg/FmpDxe/FmpDxe.c
@@ -495,7 +495,7 @@ GetTheImageInfo (
   // Confirm that buffer isn't null
   //
   if (  (ImageInfo == NULL) || (DescriptorVersion == NULL) || (DescriptorCount 
== NULL) || (DescriptorSize == NULL)
- || (PackageVersion == NULL))
+ || (PackageVersion == NULL) || (PackageVersionName == NULL))
   {
 DEBUG ((DEBUG_ERROR, "FmpDxe(%s): GetImageInfo() - Pointer Parameter is 
NULL.\n", mImageIdName));
 Status = EFI_INVALID_PARAMETER;
--
2.38.1.windows.1



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[edk2-devel] [PATCH 00/33] Introduce AMD Vangogh platform reference code

[duke.zhai via groups.io]

From: Duke Zhai 


This AMD reference platform BIOS supports AMD Vangogh B0 SOC and Chachani board.



Signed-off-by: Duke Zhai 

Cc: Eric Xing 

Cc: Ken Yao 

Cc: Igniculus Fu 

Cc: Abner Chang 



Duke Zhai (33):

  AMD/AmdPlatformPkg: Check in AMD S3 logo

  AMD/VanGoghBoard: Check in ACPI tables

  AMD/VanGoghBoard: Check in Capsule update

  AMD/VanGoghBoard: Check in AgesaPublic pkg

  AMD/VanGoghBoard: Check in PlatformSecLib

  AMD/VanGoghBoard: Check in AmdIdsExtLib

  AMD/VanGoghBoard: Check in PciPlatform

  AMD/VanGoghBoard: Check in UDKFlashUpdate

  AMD/VanGoghBoard: Check in Flash_AB

  AMD/VanGoghBoard: Check in FlashUpdate

  AMD/VanGoghBoard: Check in FvbServices

  AMD/VanGoghBoard: Check in AMD BaseSerialPortLib

  AMD/VanGoghBoard: Check in PlatformFlashAccessLib

  AMD/VanGoghBoard: Check in SmbiosLib

  AMD/VanGoghBoard: Check in SpiFlashDeviceLib

  AMD/VanGoghBoard: Check in BaseTscTimerLib

  AMD/VanGoghBoard: Check in Smm access module.

  AMD/VanGoghBoard: Check in PciHostBridge module.

  AMD/VanGoghBoard: Check in PcatRealTimeClockRuntimeDxe module.

  AMD/VanGoghBoard: Check in FTPM module.

  AMD/VanGoghBoard: Check in SignedCapsule.

  AMD/VanGoghBoard: Check in Vtf0.

  AMD/VanGoghBoard: Check in AcpiPlatform.

  AMD/VanGoghBoard: Check in FchSpi module.

  AMD/VanGoghBoard: Check in PlatformInitPei module.

  AMD/VanGoghBoard: Check in Smbios platform dxe drivers.

  AMD/VanGoghBoard: Check in Fsp2WrapperPkg.

  AMD/VanGoghBoard: Check in SmmCpuFeaturesLibCommon module.

  AMD/VanGoghBoard: Check in SmramSaveState module.

  AMD/VanGoghBoard: Check in EDK2 override files.

  AMD/VanGoghBoard: Check in AMD SmmControlPei module

  AMD/VanGoghBoard: Check in Chachani board project files and build

script.

  AMD/VanGoghBoard: Improvement coding style.



 .../AmdPlatformPkg/Universal/LogoDxe/Logo.c   |  198 +

 .../Universal/LogoDxe/S3Logo.bmp  |  Bin 0 -> 964114 bytes

 .../Universal/LogoDxe/S3Logo.idf  |9 +

 .../Universal/LogoDxe/S3LogoDxe.inf   |   55 +

 .../VanGoghBoard/AgesaPublic/AgesaPublic.dec  |   61 +

 .../VanGoghBoard/AgesaPublic/Include/AGESA.h  |   35 +

 .../VanGoghBoard/AgesaPublic/Include/AMD.h|  189 +

 .../AgesaPublic/Include/AmdPspDirectory.h |   55 +

 .../AgesaPublic/Include/FchRegistersCommon.h  |   23 +

 .../Include/Guid/AmdMemoryInfoHob.h   |   51 +

 .../Include/Library/AmdPspBaseLibV2.h |  248 +

 .../Include/Library/AmdPspCommonLib.h |   29 +

 .../Include/Library/AmdPspFtpmLib.h   |   94 +

 .../AgesaPublic/Include/Ppi/AmdPspFtpmPpi.h   |   80 +

 .../Include/Protocol/AmdPspFtpmProtocol.h |  112 +

 .../Acpi/AcpiTables/AcpiTables.inf|   33 +

 .../Acpi/AcpiTables/Dsdt/CPU.asl  |   22 +

 .../Acpi/AcpiTables/Dsdt/Dsdt.asl |   36 +

 .../Acpi/AcpiTables/Dsdt/FchShang.asi |  927 ++

 .../Acpi/AcpiTables/Dsdt/GloblNvs.asl |   17 +

 .../Acpi/AcpiTables/Dsdt/HOST_BUS.ASL |  209 +

 .../Acpi/AcpiTables/Dsdt/LINK.ASL |  481 ++

 .../Acpi/AcpiTables/Dsdt/Lpc0.asl |  168 +

 .../Acpi/AcpiTables/Dsdt/PciTree.asl  |  776 ++

 .../Acpi/AcpiTables/Dsdt/Platform.asl |  135 +

 .../Acpi/AcpiTables/Dsdt/_PR.asl  |   36 +

 .../Acpi/AcpiTables/Facs/Facs.h   |   45 +

 .../Acpi/AcpiTables/Facs/Facs50.aslc  |   68 +

 .../Acpi/AcpiTables/Fadt/Fadt.h   |   64 +

 .../Acpi/AcpiTables/Fadt/Fadt50.aslc  |  159 +

 .../Acpi/AcpiTables/Hpet/Hpet.h   |   70 +

 .../Acpi/AcpiTables/Hpet/Hpet50.aslc  |   58 +

 .../Acpi/AcpiTables/Madt/Madt.h   |  136 +

 .../Acpi/AcpiTables/Madt/Madt50.aslc  |  327 +

 .../Acpi/AcpiTables/Mcfg/Mcfg.h   |   75 +

 .../Acpi/AcpiTables/Mcfg/Mcfg50.aslc  |   61 +

 .../BIOSImageDirectory32M.xml |   63 +

 .../VanGoghBoard/ChachaniBoardPkg/Board.env   |   23 +

 .../ChachaniBoardPkg/BuildPspImage.bat|  126 +

 .../SystemFirmwareDescriptor.aslc |   99 +

 .../SystemFirmwareDescriptor.inf  |   53 +

 .../SystemFirmwareDescriptorPei.c |   78 +

 .../ChachaniBoardPkg/Conf/ReadMe.txt  |   14 +

 .../ChachaniBoardPkg/Conf/build_rule.txt  |  660 ++

 .../ChachaniBoardPkg/Conf/target.txt  |   84 +

 .../ChachaniBoardPkg/Conf/tools_def.txt   | 7583 +

 .../ChachaniBoardPkg/FlashABImage32M.py   |  102 +

 .../ChachaniBoardPkg/GenCapsule.bat   |   81 +

 .../ChachaniBoardPkg/GenFlashABImage.bat  |   39 +

 .../ChachaniBoardPkg/GoZ_ChachaniExt.bat  |   81 +

 .../Include/Library/CapsuleHookLib.h  |   40 +

 .../Include/Protocol/GlobalNvsArea.h  |   70 +

 .../AmdIdsExtLibNull/AmdIdsHookExtLibNull.c   |   33 +

 .../AmdIdsExtLibNull/AmdIdsHookExtLibNull.inf |   39 +

 .../Capsule/CapsuleHookLib/CapsuleHookLib.c   | 1153 +++

 

[edk2-devel] [PATCH 33/33] AMD/VanGoghBoard: Improvement coding style.

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Improve coding style for EDk2 patch check rule.

Add readme.md for ChachaniBoardPkg introduction.



Signed-off-by: Duke Zhai 

Cc: Eric Xing 

Cc: Ken Yao 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../AmdPlatformPkg/Universal/LogoDxe/Logo.c   |   2 +-

 .../AgesaPublic/Include/FchRegistersCommon.h  |  32 ++---

 .../Acpi/AcpiTables/Facs/Facs.h   |  10 +-

 .../Acpi/AcpiTables/Fadt/Fadt.h   |  55 -

 .../Acpi/AcpiTables/Hpet/Hpet.h   |  45 ---

 .../Acpi/AcpiTables/Madt/Madt.h   |  90 +++---

 .../Acpi/AcpiTables/Mcfg/Mcfg.h   |  22 ++--

 .../PlatformBootManager.c |  18 +--

 .../PlatformBootManagerLib/PlatformConsole.c  |   2 +-

 .../FspWrapperHobProcessLibSample.c   | 116 +-

 .../SecRamInitData.c  |   8 +-

 .../edk2/MdeModulePkg/Universal/PCD/Dxe/Pcd.c |   2 +-

 .../edk2/MdeModulePkg/Universal/PCD/Pei/Pcd.c |  10 +-

 .../PcatRealTimeClockRuntimeDxe/PcRtc.c   |   2 +-

 .../DxeTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c   |   2 +-

 .../PeiTpm2DeviceLibFsp/Tpm2DeviceLibFtpm.c   |   2 +-

 .../AmdFtpm/Tpm2DeviceLib/Tpm2DeviceLibFtpm.c |   2 +-

 .../DxeTcg2PhysicalPresenceLib.c  |  48 

 .../Tcg/AmdFtpm/FtpmTcg2Smm/Tcg2Smm.c |  18 +--

 .../Tcg/Tcg2Config/Tcg2ConfigPeim.c   |   6 +-

 .../SecurityPkg/Tcg/Tcg2Config/TpmDetection.c |   9 +-

 .../SmmCpuFeaturesLibCommon.c |   5 +-

 Platform/AMD/VanGoghBoard/Readme.md   |  67 ++

 Platform/AMD/VanGoghBoard/ReleaseNote.txt |  14 +++

 .../Universal/PlatformInitPei/BootMode.c  |   8 +-

 .../PlatformInitPei/MemoryCallback.c  |  16 +--

 .../Universal/PlatformInitPei/MemoryInstall.c | 106 

 .../Universal/PlatformInitPei/MemoryPeim.c|  12 +-

 .../Universal/PlatformSmbiosDxe/SmbiosTable.c |   4 +-

 .../FvbServices/FwBlockService.c  |  27 ++--

 .../Include/Library/SmbiosLib.h   |   1 +

 .../Smm/AcpiSmm/AcpiSmmPlatform.c |   1 -

 .../Smm/SmmAccessPei/SmmAccessPei.c   |   2 -

 33 files changed, 420 insertions(+), 344 deletions(-)

 create mode 100644 Platform/AMD/VanGoghBoard/Readme.md

 create mode 100644 Platform/AMD/VanGoghBoard/ReleaseNote.txt



diff --git a/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c 
b/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c

index 8e3d89380b..4463ba58eb 100644

--- a/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c

+++ b/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c

@@ -98,7 +98,7 @@ LogoDxeDisplayEventCallback (

   IN VOID   *Context

   )

 {

-  DEBUG((DEBUG_INFO, "AMD logo is displaying.\n"));

+  DEBUG ((DEBUG_INFO, "AMD logo is displaying.\n"));

 

   BootLogoEnableLogo ();

   gBS->CloseEvent (Event);

diff --git a/Platform/AMD/VanGoghBoard/AgesaPublic/Include/FchRegistersCommon.h 
b/Platform/AMD/VanGoghBoard/AgesaPublic/Include/FchRegistersCommon.h

index 6079fcab75..a69a4791cd 100644

--- a/Platform/AMD/VanGoghBoard/AgesaPublic/Include/FchRegistersCommon.h

+++ b/Platform/AMD/VanGoghBoard/AgesaPublic/Include/FchRegistersCommon.h

@@ -5,19 +5,19 @@

   SPDX-License-Identifier: BSD-2-Clause-Patent

 

 **/

-#define R_FCH_ACPI_PM1_STATUS  0x00

-#define R_FCH_ACPI_PM1_ENABLE  0x02

-#define R_FCH_ACPI_PM_CONTROL  0x04

-#define ACPI_MMIO_BASE   0xFED8ul

-#define SMI_BASE 0x200// DWORD

-#define PMIO_BASE0x300// DWORD

-#define FCH_SMI_REG800x80 // SmiStatus0

-#define FCH_SMI_REG840x84 // SmiStatus1

-#define FCH_SMI_REG880x88 // SmiStatus2

-#define FCH_SMI_REG8C0x8C // SmiStatus3

-#define FCH_SMI_REG900x90 // SmiStatus4

-#define FCH_SMI_REG980x98 // SmiTrig

-#define FCH_SMI_REGA00xA0

-#define FCH_SMI_REGB00xB0

-#define FCH_SMI_REGC40xC4

-#define FCH_PMIOA_REG60  0x60 // AcpiPm1EvtBlk

\ No newline at end of file

+#define R_FCH_ACPI_PM1_STATUS  0x00

+#define R_FCH_ACPI_PM1_ENABLE  0x02

+#define R_FCH_ACPI_PM_CONTROL  0x04

+#define ACPI_MMIO_BASE 0xFED8ul

+#define SMI_BASE   0x200  // DWORD

+#define PMIO_BASE  0x300  // DWORD

+#define FCH_SMI_REG80  0x80   // SmiStatus0

+#define FCH_SMI_REG84  0x84   // SmiStatus1

+#define FCH_SMI_REG88  0x88   // SmiStatus2

+#define FCH_SMI_REG8C  0x8C   // SmiStatus3

+#define FCH_SMI_REG90  0x90   // SmiStatus4

+#define FCH_SMI_REG98  0x98   // SmiTrig

+#define FCH_SMI_REGA0  0xA0

+#define FCH_SMI_REGB0  0xB0

+#define FCH_SMI_REGC4  0xC4

+#define FCH_PMIOA_REG60

[edk2-devel] [PATCH 00/33] Introduce AMD Vangogh platform reference code

[duke.zhai via groups.io]

From: Duke Zhai 


This AMD reference platform BIOS supports AMD Vangogh B0 SOC and Chachani board.



Signed-off-by: Duke Zhai 

Cc: Eric Xing 

Cc: Ken Yao 

Cc: Igniculus Fu 



Duke Zhai (33):

  AMD/AmdPlatformPkg: Check in AMD S3 logo

  AMD/VanGoghBoard: Check in ACPI tables

  AMD/VanGoghBoard: Check in Capsule update

  AMD/VanGoghBoard: Check in AgesaPublic pkg

  AMD/VanGoghBoard: Check in PlatformSecLib

  AMD/VanGoghBoard: Check in AmdIdsExtLib

  AMD/VanGoghBoard: Check in PciPlatform

  AMD/VanGoghBoard: Check in UDKFlashUpdate

  AMD/VanGoghBoard: Check in Flash_AB

  AMD/VanGoghBoard: Check in FlashUpdate

  AMD/VanGoghBoard: Check in FvbServices

  AMD/VanGoghBoard: Check in AMD BaseSerialPortLib

  AMD/VanGoghBoard: Check in PlatformFlashAccessLib

  AMD/VanGoghBoard: Check in SmbiosLib

  AMD/VanGoghBoard: Check in SpiFlashDeviceLib

  AMD/VanGoghBoard: Check in BaseTscTimerLib

  AMD/VanGoghBoard: Check in Smm access module.

  AMD/VanGoghBoard: Check in PciHostBridge module.

  AMD/VanGoghBoard: Check in PcatRealTimeClockRuntimeDxe module.

  AMD/VanGoghBoard: Check in FTPM module.

  AMD/VanGoghBoard: Check in SignedCapsule.

  AMD/VanGoghBoard: Check in Vtf0.

  AMD/VanGoghBoard: Check in AcpiPlatform.

  AMD/VanGoghBoard: Check in FchSpi module.

  AMD/VanGoghBoard: Check in PlatformInitPei module.

  AMD/VanGoghBoard: Check in Smbios platform dxe drivers.

  AMD/VanGoghBoard: Check in Fsp2WrapperPkg.

  AMD/VanGoghBoard: Check in SmmCpuFeaturesLibCommon module.

  AMD/VanGoghBoard: Check in SmramSaveState module.

  AMD/VanGoghBoard: Check in EDK2 override files.

  AMD/VanGoghBoard: Check in AMD SmmControlPei module

  AMD/VanGoghBoard: Check in Chachani board project files and build

script.

  AMD/VanGoghBoard: Improvement coding style.



 .../AmdPlatformPkg/Universal/LogoDxe/Logo.c   |  198 +

 .../Universal/LogoDxe/S3Logo.bmp  |  Bin 0 -> 964114 bytes

 .../Universal/LogoDxe/S3Logo.idf  |9 +

 .../Universal/LogoDxe/S3LogoDxe.inf   |   55 +

 .../VanGoghBoard/AgesaPublic/AgesaPublic.dec  |   61 +

 .../VanGoghBoard/AgesaPublic/Include/AGESA.h  |   35 +

 .../VanGoghBoard/AgesaPublic/Include/AMD.h|  189 +

 .../AgesaPublic/Include/AmdPspDirectory.h |   55 +

 .../AgesaPublic/Include/FchRegistersCommon.h  |   23 +

 .../Include/Guid/AmdMemoryInfoHob.h   |   51 +

 .../Include/Library/AmdPspBaseLibV2.h |  248 +

 .../Include/Library/AmdPspCommonLib.h |   29 +

 .../Include/Library/AmdPspFtpmLib.h   |   94 +

 .../AgesaPublic/Include/Ppi/AmdPspFtpmPpi.h   |   80 +

 .../Include/Protocol/AmdPspFtpmProtocol.h |  112 +

 .../Acpi/AcpiTables/AcpiTables.inf|   33 +

 .../Acpi/AcpiTables/Dsdt/CPU.asl  |   22 +

 .../Acpi/AcpiTables/Dsdt/Dsdt.asl |   36 +

 .../Acpi/AcpiTables/Dsdt/FchShang.asi |  927 ++

 .../Acpi/AcpiTables/Dsdt/GloblNvs.asl |   17 +

 .../Acpi/AcpiTables/Dsdt/HOST_BUS.ASL |  209 +

 .../Acpi/AcpiTables/Dsdt/LINK.ASL |  481 ++

 .../Acpi/AcpiTables/Dsdt/Lpc0.asl |  168 +

 .../Acpi/AcpiTables/Dsdt/PciTree.asl  |  776 ++

 .../Acpi/AcpiTables/Dsdt/Platform.asl |  135 +

 .../Acpi/AcpiTables/Dsdt/_PR.asl  |   36 +

 .../Acpi/AcpiTables/Facs/Facs.h   |   45 +

 .../Acpi/AcpiTables/Facs/Facs50.aslc  |   68 +

 .../Acpi/AcpiTables/Fadt/Fadt.h   |   64 +

 .../Acpi/AcpiTables/Fadt/Fadt50.aslc  |  159 +

 .../Acpi/AcpiTables/Hpet/Hpet.h   |   70 +

 .../Acpi/AcpiTables/Hpet/Hpet50.aslc  |   58 +

 .../Acpi/AcpiTables/Madt/Madt.h   |  136 +

 .../Acpi/AcpiTables/Madt/Madt50.aslc  |  327 +

 .../Acpi/AcpiTables/Mcfg/Mcfg.h   |   75 +

 .../Acpi/AcpiTables/Mcfg/Mcfg50.aslc  |   61 +

 .../BIOSImageDirectory32M.xml |   63 +

 .../VanGoghBoard/ChachaniBoardPkg/Board.env   |   23 +

 .../ChachaniBoardPkg/BuildPspImage.bat|  126 +

 .../SystemFirmwareDescriptor.aslc |   99 +

 .../SystemFirmwareDescriptor.inf  |   53 +

 .../SystemFirmwareDescriptorPei.c |   78 +

 .../ChachaniBoardPkg/Conf/ReadMe.txt  |   14 +

 .../ChachaniBoardPkg/Conf/build_rule.txt  |  660 ++

 .../ChachaniBoardPkg/Conf/target.txt  |   84 +

 .../ChachaniBoardPkg/Conf/tools_def.txt   | 7583 +

 .../ChachaniBoardPkg/FlashABImage32M.py   |  102 +

 .../ChachaniBoardPkg/GenCapsule.bat   |   81 +

 .../ChachaniBoardPkg/GenFlashABImage.bat  |   39 +

 .../ChachaniBoardPkg/GoZ_ChachaniExt.bat  |   81 +

 .../Include/Library/CapsuleHookLib.h  |   40 +

 .../Include/Protocol/GlobalNvsArea.h  |   70 +

 .../AmdIdsExtLibNull/AmdIdsHookExtLibNull.c   |   33 +

 .../AmdIdsExtLibNull/AmdIdsHookExtLibNull.inf |   39 +

 .../Capsule/CapsuleHookLib/CapsuleHookLib.c   | 1153 +++

 

[edk2-devel] [PATCH 26/33] AMD/VanGoghBoard: Check in Smbios platform dxe drivers.

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Initial Smbios platform DXE drivers. Static SMBIOS Table for Chachani platform.

SmbiosLib provides detailed information of Chachani platform.



Signed-off-by: Eric Xing 

Cc: Ken Yao 

Cc: Duke Zhai 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../PlatformSmbiosDxe/PlatformSmbiosDxe.c |  83 

 .../PlatformSmbiosDxe/PlatformSmbiosDxe.inf   |  60 +++

 .../Universal/PlatformSmbiosDxe/SmbiosTable.c | 389 ++

 3 files changed, 532 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/PlatformSmbiosDxe/PlatformSmbiosDxe.c

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/PlatformSmbiosDxe/PlatformSmbiosDxe.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/PlatformSmbiosDxe/SmbiosTable.c



diff --git 
a/Platform/AMD/VanGoghBoard/Universal/PlatformSmbiosDxe/PlatformSmbiosDxe.c 
b/Platform/AMD/VanGoghBoard/Universal/PlatformSmbiosDxe/PlatformSmbiosDxe.c

new file mode 100644

index 00..141325c346

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/Universal/PlatformSmbiosDxe/PlatformSmbiosDxe.c

@@ -0,0 +1,83 @@

+/** @file

+  Implements VanGogh board Smbios information

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+**/

+/* This file includes code originally published under the following license. */

+

+/** @file

+  Static SMBIOS Table for platform

+

+

+  Copyright (c) 2012, Apple Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+

+extern SMBIOS_TEMPLATE_ENTRY  gSmbiosTemplate[];

+

+/**

+  Main entry for this driver.

+

+  @param ImageHandle Image handle this driver.

+  @param SystemTable Pointer to SystemTable.

+

+  @retval EFI_SUCESS This function always complete successfully.

+

+**/

+EFI_STATUS

+EFIAPI

+PlatformSmbiosDriverEntryPoint (

+  IN EFI_HANDLEImageHandle,

+  IN EFI_SYSTEM_TABLE  *SystemTable

+  )

+{

+  EFI_STATUSStatus;

+  EFI_SMBIOS_HANDLE SmbiosHandle;

+  SMBIOS_STRUCTURE_POINTER  Smbios;

+

+  DEBUG ((DEBUG_INFO, " PlatfomrSmbiosDriverEntryPoint \n"));

+

+  // Phase 0 - Patch table to make SMBIOS 2.7 structures smaller to conform

+  //   to an early version of the specification.

+

+  // Phase 1 - Initialize SMBIOS tables from template

+  Status = SmbiosLibInitializeFromTemplate (gSmbiosTemplate);

+  ASSERT_EFI_ERROR (Status);

+

+  // Phase 2 - Patch SMBIOS table entries

+  Smbios.Hdr = SmbiosLibGetRecord (EFI_SMBIOS_TYPE_BIOS_INFORMATION, 0, 
);

+  if (Smbios.Type0 != NULL) {

+// 64K * (n+1) bytes

+Smbios.Type0->BiosSize = (UINT8)DivU64x32 (FixedPcdGet64 
(PcdFlashAreaSize), 64*1024) - 1;

+

+SmbiosLibUpdateUnicodeString (

+  SmbiosHandle,

+  Smbios.Type0->BiosVersion,

+  (CHAR16 *)PcdGetPtr (PcdFirmwareVersionString)

+  );

+

+DEBUG ((

+  DEBUG_INFO,

+  " Smbios.Type0->BiosSize: %dMB, Smbios.Type0->BiosVersion: %S, Build 
Time: %a,%a\n",

+  (Smbios.Type0->BiosSize +1) * 64 / 1024,

+  (CHAR16 *)PcdGetPtr (PcdFirmwareVersionString),

+  __DATE__,

+  __TIME__

+  ));

+  }

+

+  return EFI_SUCCESS;

+}

diff --git 
a/Platform/AMD/VanGoghBoard/Universal/PlatformSmbiosDxe/PlatformSmbiosDxe.inf 
b/Platform/AMD/VanGoghBoard/Universal/PlatformSmbiosDxe/PlatformSmbiosDxe.inf

new file mode 100644

index 00..058813496d

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/Universal/PlatformSmbiosDxe/PlatformSmbiosDxe.inf

@@ -0,0 +1,60 @@

+## @file

+# Platform Smbios Dxe driver

+#

+# Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+# SPDX-License-Identifier: BSD-2-Clause-Patent

+##

+# This file includes code originally published under the following license.

+

+## @file

+# Platform SMBIOS driver that fills in SMBIOS table entries.

+#

+# Copyright (c) 2012, Apple Inc. All rights reserved.

+# Portions copyright (c) 2006 - 2010, Intel Corporation. All rights 
reserved.

+#

+#  SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+#

+##

+

+[Defines]

+  INF_VERSION= 0x00010005

+  BASE_NAME  = PlatformSmbiosDxe

+  FILE_GUID  = 15EEEB97-709E-91FA-CDA7-44A9C85DDB78

+  MODULE_TYPE= DXE_DRIVER

+  VERSION_STRING = 1.0

+  ENTRY_POINT= PlatformSmbiosDriverEntryPoint

+

+

+[Sources]

+  SmbiosTable.c

+  PlatformSmbiosDxe.c

+

+[Packages]

+  MdePkg/MdePkg.dec

+  MdeModulePkg/MdeModulePkg.dec

+  VanGoghCommonPkg/AmdCommonPkg.dec

+  ChachaniBoardPkg/Project.dec

+

+[LibraryClasses]

+  UefiDriverEntryPoint

+  BaseLib

+  BaseMemoryLib

+  DebugLib

+  PcdLib

+  MemoryAllocationLib

+  UefiBootServicesTableLib

+  UefiLib

+  HobLib

+  SmbiosLib

+

+[Protocols]

[edk2-devel] [PATCH 29/33] AMD/VanGoghBoard: Check in SmramSaveState module.

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Initial SmramSaveState module.

This module provides services to access SMRAM Save State Map.



Signed-off-by: Ken Yao 

Cc: Eric Xing 

Cc: Duke Zhai 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../PiSmmCpuDxeSmm/SmramSaveState.c   | 715 ++

 1 file changed, 715 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c



diff --git 
a/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c
 
b/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c

new file mode 100644

index 00..9e5a7d59fc

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c

@@ -0,0 +1,715 @@

+/** @file

+  Implements SmramSaveState.c

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+/* This file includes code originally published under the following license. */

+

+/** @file

+Provides services to access SMRAM Save State Map

+

+Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.

+SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#include 

+

+#include 

+

+#include 

+#include 

+#include 

+#include 

+

+#include "PiSmmCpuDxeSmm.h"

+

+typedef struct {

+  UINT64Signature;  // Offset 0x00

+  UINT16Reserved1;  // Offset 0x08

+  UINT16Reserved2;  // Offset 0x0A

+  UINT16Reserved3;  // Offset 0x0C

+  UINT16SmmCs;  // Offset 0x0E

+  UINT16SmmDs;  // Offset 0x10

+  UINT16SmmSs;  // Offset 0x12

+  UINT16SmmOtherSegment;// Offset 0x14

+  UINT16Reserved4;  // Offset 0x16

+  UINT64Reserved5;  // Offset 0x18

+  UINT64Reserved6;  // Offset 0x20

+  UINT64Reserved7;  // Offset 0x28

+  UINT64SmmGdtPtr;  // Offset 0x30

+  UINT32SmmGdtSize; // Offset 0x38

+  UINT32Reserved8;  // Offset 0x3C

+  UINT64Reserved9;  // Offset 0x40

+  UINT64Reserved10; // Offset 0x48

+  UINT16Reserved11; // Offset 0x50

+  UINT16Reserved12; // Offset 0x52

+  UINT32Reserved13; // Offset 0x54

+  UINT64Reserved14; // Offset 0x58

+} PROCESSOR_SMM_DESCRIPTOR;

+

+extern CONST PROCESSOR_SMM_DESCRIPTOR  gcPsd;

+

+//

+// EFER register LMA bit

+//

+#define LMA  BIT10

+

+///

+/// Macro used to simplify the lookup table entries of type 
CPU_SMM_SAVE_STATE_LOOKUP_ENTRY

+///

+#define SMM_CPU_OFFSET(Field)  OFFSET_OF (SMRAM_SAVE_STATE_MAP, Field)

+

+///

+/// Macro used to simplify the lookup table entries of type 
CPU_SMM_SAVE_STATE_REGISTER_RANGE

+///

+#define SMM_REGISTER_RANGE(Start, End)  { Start, End, End - Start + 1 }

+

+///

+/// Structure used to describe a range of registers

+///

+typedef struct {

+  EFI_SMM_SAVE_STATE_REGISTERStart;

+  EFI_SMM_SAVE_STATE_REGISTEREnd;

+  UINTN  Length;

+} CPU_SMM_SAVE_STATE_REGISTER_RANGE;

+

+///

+/// Structure used to build a lookup table to retrieve the widths and offsets

+/// associated with each supported EFI_SMM_SAVE_STATE_REGISTER value

+///

+

+#define SMM_SAVE_STATE_REGISTER_SMMREVID_INDEX   1

+#define SMM_SAVE_STATE_REGISTER_IOMISC_INDEX 2

+#define SMM_SAVE_STATE_REGISTER_IOMEMADDR_INDEX  3

+#define SMM_SAVE_STATE_REGISTER_MAX_INDEX4

+

+typedef struct {

+  UINT8  Width32;

+  UINT8  Width64;

+  UINT16 Offset32;

+  UINT16 Offset64Lo;

+  UINT16 Offset64Hi;

+  BOOLEANWriteable;

+} CPU_SMM_SAVE_STATE_LOOKUP_ENTRY;

+

+///

+/// Structure used to build a lookup table for the IOMisc width information

+///

+typedef struct {

+  UINT8  Width;

+  EFI_SMM_SAVE_STATE_IO_WIDTHIoWidth;

+} CPU_SMM_SAVE_STATE_IO_WIDTH;

+

+///

+/// Variables from SMI Handler

+///

+X86_ASSEMBLY_PATCH_LABEL  gPatchSmbase;

+X86_ASSEMBLY_PATCH_LABEL  gPatchSmiStack;

+X86_ASSEMBLY_PATCH_LABEL  gPatchSmiCr3;

+extern volatile UINT8 gcSmiHandlerTemplate[];

+extern CONST UINT16   gcSmiHandlerSize;

+

+//

+// Variables used by SMI Handler

+//

+IA32_DESCRIPTOR  gSmiHandlerIdtr;

+

+///

+/// Table used by 

[edk2-devel] [PATCH 31/33] AMD/VanGoghBoard: Check in AMD SmmControlPei module

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Initial AMD SmmControlPei module in Silicon folder.

This module initializes SMM-related registers, and installs gPeiSmmControlPpi.



Signed-off-by: Duke Zhai 

Cc: Eric Xing 

Cc: Ken Yao 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../Smm/SmmControlPei/SmmControlPei.c | 307 ++

 .../Smm/SmmControlPei/SmmControlPei.inf   |  40 +++

 2 files changed, 347 insertions(+)

 create mode 100644 Silicon/AMD/VanGoghBoard/Smm/SmmControlPei/SmmControlPei.c

 create mode 100644 Silicon/AMD/VanGoghBoard/Smm/SmmControlPei/SmmControlPei.inf



diff --git a/Silicon/AMD/VanGoghBoard/Smm/SmmControlPei/SmmControlPei.c 
b/Silicon/AMD/VanGoghBoard/Smm/SmmControlPei/SmmControlPei.c

new file mode 100644

index 00..4752aede9c

--- /dev/null

+++ b/Silicon/AMD/VanGoghBoard/Smm/SmmControlPei/SmmControlPei.c

@@ -0,0 +1,307 @@

+/** @file

+  Implements SmmControlPei.c

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#include 

+#include 

+#include 

+#include 

+#include 

+

+/**

+  This routine generates an SMI

+

+  @param[in]   PeiServices   Describes the list of possible PEI 
Services.

+  @param[in]   This  The pointer to this instance of this 
PPI.

+  @param[in, out]  ArgumentBufferThe buffer of argument

+  @param[in, out]  ArgumentBufferSizeThe size of the argument buffer

+  @param[in]   Periodic  TRUE to indicate a periodical SMI

+  @param[in]   ActivationIntervalInterval of periodic SMI

+

+  @retval  EFI_SUCCESSSMI generated.

+  @retval  EFI_INVALID_PARAMETER  Some parameter value passed is not supported

+**/

+EFI_STATUS

+EFIAPI

+PeiTrigger (

+  IN EFI_PEI_SERVICES **PeiServices,

+  IN PEI_SMM_CONTROL_PPI  *This,

+  IN OUT INT8 *ArgumentBuffer OPTIONAL,

+  IN OUT UINTN*ArgumentBufferSize OPTIONAL,

+  IN BOOLEAN  Periodic OPTIONAL,

+  IN UINTNActivationInterval OPTIONAL

+  );

+

+/**

+  Clear SMI related chipset status.

+

+  @param[in]  PeiServices   Describes the list of possible PEI 
Services.

+  @param[in]  This  The pointer to this instance of this PPI.

+  @param[in]  Periodic  TRUE to indicate a periodical SMI.

+

+  @return  Return value from ClearSmi()

+**/

+EFI_STATUS

+EFIAPI

+PeiClear (

+  IN EFI_PEI_SERVICES **PeiServices,

+  IN PEI_SMM_CONTROL_PPI  *This,

+  IN BOOLEAN  Periodic OPTIONAL

+  );

+

+STATIC PEI_SMM_CONTROL_PPI  mSmmControlPpi = {

+  PeiTrigger,

+  PeiClear

+};

+

+STATIC EFI_PEI_PPI_DESCRIPTOR  mPpiList = {

+  (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),

+  ,

+  

+};

+

+/**

+ Init related registers

+

+ @param [in]None

+

+ @retval  EFI_LOAD_ERROR  Get ACPI MMIO base error.

+ @retval  EFI_SUCCESS The function completed successfully..

+*/

+EFI_STATUS

+SmmControlPeiPreInit (

+  VOID

+  )

+{

+  UINT16  SmmControlData16;

+  UINT16  SmmControlMask16;

+  UINT32  SmmControlData32;

+  UINT8   SmmControlIndex;

+  UINT16  AcpiPmBase;

+

+  //

+  // Get ACPI MMIO base and AcpiPm1EvtBlk address

+  //

+  AcpiPmBase = MmioRead16 (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REG60);

+

+  if (0 == AcpiPmBase) {

+return EFI_LOAD_ERROR;

+  }

+

+  //

+  // Clean up all SMI status and enable bits

+  //

+  // Clear all SmiControl registers

+  SmmControlData32 = 0;

+  for (SmmControlIndex = FCH_SMI_REGA0; SmmControlIndex <= FCH_SMI_REGC4; 
SmmControlIndex += 4) {

+MmioWrite32 (ACPI_MMIO_BASE + SMI_BASE + SmmControlIndex, 
SmmControlData32);

+  }

+

+  // Clear all SmiStatus registers (SmiStatus0-4)

+  SmmControlData32 = 0x;

+  MmioWrite32 (ACPI_MMIO_BASE + SMI_BASE + FCH_SMI_REG80, SmmControlData32);

+  MmioWrite32 (ACPI_MMIO_BASE + SMI_BASE + FCH_SMI_REG84, SmmControlData32);

+  MmioWrite32 (ACPI_MMIO_BASE + SMI_BASE + FCH_SMI_REG88, SmmControlData32);

+  MmioWrite32 (ACPI_MMIO_BASE + SMI_BASE + FCH_SMI_REG8C, SmmControlData32);

+  MmioWrite32 (ACPI_MMIO_BASE + SMI_BASE + FCH_SMI_REG90, SmmControlData32);

+

+  //

+  // If SCI is not enabled, clean up all ACPI PM status/enable registers

+  //

+  SmmControlData16 = IoRead16 (AcpiPmBase + R_FCH_ACPI_PM_CONTROL);

+  if (!(SmmControlData16 & BIT0)) {

+// Clear WAKE_EN, RTC_EN, SLPBTN_EN, GBL_EN and TMR_EN

+SmmControlData16 = 0;

+SmmControlMask16 = (UINT16) ~(BIT15 + BIT10 + BIT9 + BIT5 + BIT0);

+IoAndThenOr16 (AcpiPmBase + R_FCH_ACPI_PM1_ENABLE, SmmControlMask16, 
SmmControlData16);

+

+// Clear WAKE_STS, RTC_STS, SLPBTN_STS, GBL_STS and TMR_STS

+SmmControlData16 = BIT15 + BIT10 + BIT9 + BIT5 + BIT0;

+IoWrite16 (AcpiPmBase + R_FCH_ACPI_PM1_STATUS, SmmControlData16);

+  }

+

+  //

+  // Set the EOS Bit

+  // Clear SmiEnB to enable SMI 

[edk2-devel] [PATCH 24/33] AMD/VanGoghBoard: Check in FchSpi module.

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Initial FchSpi module. FCH SPI Common Driver implements

the SPI Host Controller Compatibility Interface.



Signed-off-by: Duke Zhai 

Cc: Eric Xing 

Cc: Ken Yao 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../Universal/FchSpi/FchSpiProtect.c  |  67 ++

 .../Universal/FchSpi/FchSpiProtect.h  |  38 +

 .../Universal/FchSpi/FchSpiRuntimeDxe.c   | 172 

 .../Universal/FchSpi/FchSpiRuntimeDxe.h   |  58 ++

 .../Universal/FchSpi/FchSpiRuntimeDxe.inf |  91 ++

 .../VanGoghBoard/Universal/FchSpi/FchSpiSmm.c | 121 +++

 .../VanGoghBoard/Universal/FchSpi/FchSpiSmm.h |  41 +

 .../Universal/FchSpi/FchSpiSmm.inf| 101 +++

 .../VanGoghBoard/Universal/FchSpi/SpiCommon.c | 799 ++

 .../VanGoghBoard/Universal/FchSpi/SpiInfo.h   |  26 +

 10 files changed, 1514 insertions(+)

 create mode 100644 Platform/AMD/VanGoghBoard/Universal/FchSpi/FchSpiProtect.c

 create mode 100644 Platform/AMD/VanGoghBoard/Universal/FchSpi/FchSpiProtect.h

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/FchSpi/FchSpiRuntimeDxe.c

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/FchSpi/FchSpiRuntimeDxe.h

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/FchSpi/FchSpiRuntimeDxe.inf

 create mode 100644 Platform/AMD/VanGoghBoard/Universal/FchSpi/FchSpiSmm.c

 create mode 100644 Platform/AMD/VanGoghBoard/Universal/FchSpi/FchSpiSmm.h

 create mode 100644 Platform/AMD/VanGoghBoard/Universal/FchSpi/FchSpiSmm.inf

 create mode 100644 Platform/AMD/VanGoghBoard/Universal/FchSpi/SpiCommon.c

 create mode 100644 Platform/AMD/VanGoghBoard/Universal/FchSpi/SpiInfo.h



diff --git a/Platform/AMD/VanGoghBoard/Universal/FchSpi/FchSpiProtect.c 
b/Platform/AMD/VanGoghBoard/Universal/FchSpi/FchSpiProtect.c

new file mode 100644

index 00..658d9b063d

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/Universal/FchSpi/FchSpiProtect.c

@@ -0,0 +1,67 @@

+/** @file

+  Implements FchSpiProtect.c

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+

+#include "FchSpiProtect.h"

+

+/**

+

+   Fch Spi Protect Lock

+

+   @param SpiMmioBase

+

+**/

+EFI_STATUS

+EFIAPI

+FchSpiProtect_Lock (

+  IN UINTN  SpiMmioBase

+  )

+{

+  if (!(MmioRead8 (SpiMmioBase + 2) & 0xC0)) {

+// Check BIT7+BIT6

+return EFI_SUCCESS;

+  } else {

+MmioWrite8 (SpiMmioBase + 9, 0x6);// 
PrefixOpCode WRITE_ENABLE

+MmioWrite8 (SpiMmioBase + 2, MmioRead8 (SpiMmioBase + 2) & 0x3F); // Clear 
BIT7+BIT6

+if (MmioRead8 (SpiMmioBase + 2) & 0xC0) {

+  return EFI_DEVICE_ERROR;

+}

+  }

+

+  return EFI_SUCCESS;

+}

+

+/**

+

+   Fch Spi Protect UnLock

+

+   @param SpiMmioBase

+

+**/

+EFI_STATUS

+EFIAPI

+FchSpiProtect_UnLock (

+  IN UINTN  SpiMmioBase

+  )

+{

+  if ((MmioRead8 (SpiMmioBase + 2) & 0xC0) || (6 != MmioRead8 (SpiMmioBase + 
9))) {

+return EFI_SUCCESS;

+  } else {

+MmioWrite8 (SpiMmioBase + 9, 0x0);

+MmioWrite8 (SpiMmioBase + 2, MmioRead8 (SpiMmioBase + 2) | 0xC0); // Set 
BIT7+BIT6

+  }

+

+  return EFI_SUCCESS;

+}

diff --git a/Platform/AMD/VanGoghBoard/Universal/FchSpi/FchSpiProtect.h 
b/Platform/AMD/VanGoghBoard/Universal/FchSpi/FchSpiProtect.h

new file mode 100644

index 00..e12246d5a3

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/Universal/FchSpi/FchSpiProtect.h

@@ -0,0 +1,38 @@

+/** @file

+  Implements FchSpiProtect.h

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef _FCH_SPI_PROTECT_H_

+#define _FCH_SPI_PROTECT_H_

+

+/**

+

+   Fch Spi Protect Lock

+

+   @param UINTN SpiMmioBase

+

+**/

+EFI_STATUS

+EFIAPI

+FchSpiProtect_Lock (

+  IN UINTN  SpiMmioBase

+  );

+

+/**

+

+   Fch Spi Protect UnLock

+

+   @param UINTN SpiMmioBase

+

+**/

+EFI_STATUS

+EFIAPI

+FchSpiProtect_UnLock (

+  IN UINTN  SpiMmioBase

+  );

+

+#endif

diff --git a/Platform/AMD/VanGoghBoard/Universal/FchSpi/FchSpiRuntimeDxe.c 
b/Platform/AMD/VanGoghBoard/Universal/FchSpi/FchSpiRuntimeDxe.c

new file mode 100644

index 00..f7817838f2

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/Universal/FchSpi/FchSpiRuntimeDxe.c

@@ -0,0 +1,172 @@

+/** @file

+  Implements FchSpiRuntimeDxe.c

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+/* This file includes code originally published under the following license. */

+

+/** @file

+PCH SPI Runtime Driver implements the SPI Host Controller Compatibility 
Interface.

+

+Copyright (c) 2013-2015 Intel Corporation.

+

+SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifdef _MSC_VER

+  #pragma optimize( "", off )

+#endif

+

+#ifdef __GNUC__

+  

[edk2-devel] [PATCH 25/33] AMD/VanGoghBoard: Check in PlatformInitPei module.

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Initial PlatformInitPei module. This is the Platform module to initialize

whole platform on PEI phase.



Signed-off-by: Ken Yao 

Cc: Eric Xing 

Cc: Duke Zhai 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../Universal/PlatformInitPei/BootMode.c  | 287 ++

 .../Universal/PlatformInitPei/CommonHeader.h  | 244 +

 .../PlatformInitPei/MemoryCallback.c  | 308 ++

 .../Universal/PlatformInitPei/MemoryInstall.c | 953 ++

 .../Universal/PlatformInitPei/MemoryInstall.h | 229 +

 .../Universal/PlatformInitPei/MemoryPeim.c| 385 +++

 .../Universal/PlatformInitPei/PlatformInit.c  | 176 

 .../PlatformInitPei/PlatformInit.inf  | 114 +++

 .../Universal/PlatformInitPei/Stall.c | 122 +++

 9 files changed, 2818 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/BootMode.c

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/CommonHeader.h

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryCallback.c

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryInstall.c

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryInstall.h

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/MemoryPeim.c

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/PlatformInit.c

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/PlatformInit.inf

 create mode 100644 Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/Stall.c



diff --git a/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/BootMode.c 
b/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/BootMode.c

new file mode 100644

index 00..9102ae2b86

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/Universal/PlatformInitPei/BootMode.c

@@ -0,0 +1,287 @@

+/** @file

+  Implements BootMode.C

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+/* This file includes code originally published under the following license. */

+

+/** @file

+This file provide the function to detect boot mode

+

+Copyright (c) 2013 Intel Corporation.

+

+This program and the accompanying materials

+are licensed and made available under the terms and conditions of the BSD 
License

+which accompanies this distribution.  The full text of the license may be 
found at

+http://opensource.org/licenses/bsd-license.php

+

+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/

+

+#include "CommonHeader.h"

+

+EFI_PEI_PPI_DESCRIPTOR mPpiListRecoveryBootMode = {

+  (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),

+  ,

+  NULL

+};

+STATIC EFI_PEI_PPI_DESCRIPTOR  CapsulePpi = {

+  EFI_PEI_PPI_DESCRIPTOR_PPI|EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,

+  ,

+  NULL

+};

+

+/**

+

+Routine Description:

+

+  This function is used to verify if the FV header is validate.

+

+  @param  FwVolHeader - The FV header that to be verified.

+

+  @retval EFI_SUCCESS   - The Fv header is valid.

+  @retval EFI_NOT_FOUND - The Fv header is invalid.

+

+**/

+EFI_STATUS

+ValidateFvHeader (

+  EFI_BOOT_MODE  *BootMode

+  )

+{

+  UINT16  *Ptr;

+  UINT16  HeaderLength;

+  UINT16  Checksum;

+

+  EFI_FIRMWARE_VOLUME_HEADER  *FwVolHeader;

+

+  if (BOOT_IN_RECOVERY_MODE == *BootMode) {

+DEBUG ((EFI_D_INFO, "Boot mode recovery\n"));

+return EFI_SUCCESS;

+  }

+

+  //

+  // Let's check whether FvMain header is valid, if not enter into recovery 
mode

+  //

+  //

+  // Verify the header revision, header signature, length

+  // Length of FvBlock cannot be 2**64-1

+  // HeaderLength cannot be an odd number

+  //

+  FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32 
(PcdFlashFvMainBase);

+  if ((FwVolHeader->Revision != EFI_FVH_REVISION) ||

+  (FwVolHeader->Signature != EFI_FVH_SIGNATURE) ||

+  (FwVolHeader->FvLength == ((UINT64)-1)) ||

+  ((FwVolHeader->HeaderLength & 0x01) != 0)

+  )

+  {

+return EFI_NOT_FOUND;

+  }

+

+  //

+  // Verify the header checksum

+  //

+  HeaderLength = (UINT16)(FwVolHeader->HeaderLength / 2);

+  Ptr  = (UINT16 *)FwVolHeader;

+  Checksum = 0;

+  while (HeaderLength > 0) {

+Checksum = Checksum +*Ptr;

+Ptr++;

+HeaderLength--;

+  }

+

+  if (Checksum != 0) {

+return EFI_NOT_FOUND;

+  }

+

+  return EFI_SUCCESS;

+}

+

+/**

+  Peform the boot mode determination logic

+

+  @param  PeiServices General purpose services available to every PEIM.

+

+  @param  BootMode The detected boot mode.

+

+  @retval EFI_SUCCESS if the boot mode could be set

+**/

+EFI_STATUS

+UpdateBootMode (

+  IN CONST EFI_PEI_SERVICES  **PeiServices,

+  OUT EFI_BOOT_MODE  

[edk2-devel] [PATCH 21/33] AMD/VanGoghBoard: Check in SignedCapsule.

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Initial SignedCapsule module for Signed Capsule.

Produce FMP instance to update system firmware.



Signed-off-by: Ken Yao 

Cc: Eric Xing 

Cc: Duke Zhai 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../BaseTools/Source/Python/GenFds/Capsule.py |  261 +++

 .../SystemFirmwareUpdate/ParseConfigProfile.c |  231 +++

 .../SystemFirmwareCommonDxe.c |  386 +

 .../SystemFirmwareUpdate/SystemFirmwareDxe.h  |  435 +

 .../SystemFirmwareUpdateDxe.c | 1448 +

 .../SystemFirmwareUpdateDxe.inf   |   91 ++

 .../SystemFirmwareUpdateDxe.uni   |   31 +

 .../SystemFirmwareUpdateDxeExtra.uni  |   30 +

 .../Include/OtaCapsuleUpdate.h|   38 +

 9 files changed, 2951 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/BaseTools/Source/Python/GenFds/Capsule.py

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/SignedCapsulePkg/Universal/SystemFirmwareUpdate/ParseConfigProfile.c

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareCommonDxe.c

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareDxe.h

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.c

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.uni

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxeExtra.uni

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/OtaCapsuleUpdate.h



diff --git 
a/Platform/AMD/VanGoghBoard/Override/edk2/BaseTools/Source/Python/GenFds/Capsule.py
 
b/Platform/AMD/VanGoghBoard/Override/edk2/BaseTools/Source/Python/GenFds/Capsule.py

new file mode 100644

index 00..248eb25889

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/Override/edk2/BaseTools/Source/Python/GenFds/Capsule.py

@@ -0,0 +1,261 @@

+#/*

+#*

+#* Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+#* SPDX-License-Identifier: BSD-2-Clause-Patent

+#**

+#

+

+# This file includes code originally published under the following license.

+

+## @file

+# generate capsule

+#

+#  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.

+#

+#  SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+

+##

+# Import Modules

+#

+from __future__ import absolute_import

+from .GenFdsGlobalVariable import GenFdsGlobalVariable, FindExtendTool

+from CommonDataClass.FdfClass import CapsuleClassObject

+import Common.LongFilePathOs as os

+from io import BytesIO

+from Common.Misc import SaveFileOnChange, PackGUID

+import uuid

+from struct import pack

+from Common import EdkLogger

+from Common.BuildToolError import GENFDS_ERROR

+from Common.DataType import TAB_LINE_BREAK

+

+WIN_CERT_REVISION = 0x0200

+WIN_CERT_TYPE_EFI_GUID = 0x0EF1

+EFI_CERT_TYPE_PKCS7_GUID = uuid.UUID('{4aafd29d-68df-49ee-8aa9-347d375665a7}')

+EFI_CERT_TYPE_RSA2048_SHA256_GUID = 
uuid.UUID('{a7717414-c616-4977-9420-844712a735bf}')

+

+## create inf file describes what goes into capsule and call GenFv to generate 
capsule

+#

+#

+class Capsule (CapsuleClassObject):

+## The constructor

+#

+#   @param  selfThe object pointer

+#

+def __init__(self):

+CapsuleClassObject.__init__(self)

+# For GenFv

+self.BlockSize = None

+# For GenFv

+self.BlockNum = None

+self.CapsuleName = None

+

+## Generate FMP capsule

+#

+#   @retval string  Generated Capsule file path

+#

+def GenFmpCapsule(self):

+#

+# Generate capsule header

+# typedef struct {

+# EFI_GUID  CapsuleGuid;

+# UINT32HeaderSize;

+# UINT32Flags;

+# UINT32CapsuleImageSize;

+# } EFI_CAPSULE_HEADER;

+#

+Header = BytesIO()

+#

+# Use FMP capsule GUID: 6DCBD5ED-E82D-4C44-BDA1-7194199AD92A

+#

+
Header.write(PackGUID('6DCBD5ED-E82D-4C44-BDA1-7194199AD92A'.split('-')))

+HdrSize = 0

+if 'CAPSULE_HEADER_SIZE' in self.TokensDict:

+Header.write(pack('=I', 
int(self.TokensDict['CAPSULE_HEADER_SIZE'], 16)))

+HdrSize = int(self.TokensDict['CAPSULE_HEADER_SIZE'], 16)

+else:

+Header.write(pack('=I', 0x20))

+

[edk2-devel] [PATCH 28/33] AMD/VanGoghBoard: Check in SmmCpuFeaturesLibCommon module.

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Initial SmmCpuFeaturesLibCommon module. The CPU specific programming for

PiSmmCpuDxeSmm module when STM support is not included.



Signed-off-by: Duke Zhai 

Cc: Eric Xing 

Cc: Ken Yao 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../SmmCpuFeaturesLibCommon.c | 629 ++

 1 file changed, 629 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c



diff --git 
a/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c
 
b/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c

new file mode 100644

index 00..7b07425336

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c

@@ -0,0 +1,629 @@

+/** @file

+  Implements AMD SmmCpuFeaturesLibCommon.c

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+/* This file includes code originally published under the following license. */

+/** @file

+Implementation shared across all library instances.

+

+Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.

+Copyright (c) Microsoft Corporation.

+SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include "CpuFeaturesLib.h"

+

+//

+// Machine Specific Registers (MSRs)

+//

+#define  SMM_FEATURES_LIB_IA32_MTRR_CAP0x0FE

+#define  SMM_FEATURES_LIB_IA32_FEATURE_CONTROL 0x03A

+#define  SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE   0x1F2

+#define  SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK   0x1F3

+#define  SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE  0x0A0

+#define  SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSMASK  0x0A1

+#defineEFI_MSR_SMRR_MASK   0xF000

+#defineEFI_MSR_SMRR_PHYS_MASK_VALIDBIT11

+#define  SMM_FEATURES_LIB_SMM_FEATURE_CONTROL  0x4E0

+

+//

+// MSRs required for configuration of SMM Code Access Check

+//

+#define SMM_FEATURES_LIB_IA32_MCA_CAP  0x17D

+#define   SMM_CODE_ACCESS_CHK_BIT  BIT58

+

+extern UINT8  mSmmSaveStateRegisterLma;

+

+//

+// Set default value to assume SMRR is not supported

+//

+BOOLEAN  mSmrrSupported = FALSE;

+

+//

+// Set default value to assume MSR_SMM_FEATURE_CONTROL is not supported

+//

+BOOLEAN  mSmmFeatureControlSupported = FALSE;

+

+//

+// Set default value to assume IA-32 Architectural MSRs are used

+//

+UINT32  mSmrrPhysBaseMsr = SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE;

+UINT32  mSmrrPhysMaskMsr = SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK;

+

+//

+// Set default value to assume MTRRs need to be configured on each SMI

+//

+BOOLEAN  mNeedConfigureMtrrs = TRUE;

+

+//

+// Array for state of SMRR enable on all CPUs

+//

+BOOLEAN  *mSmrrEnabled;

+

+/**

+  Performs library initialization.

+

+  This initialization function contains common functionality shared betwen all

+  library instance constructors.

+

+**/

+VOID

+CpuFeaturesLibInitialization (

+  VOID

+  )

+{

+  UINT32  RegEax;

+  UINT32  RegEdx;

+  UINTN   FamilyId;

+  UINTN   ModelId;

+

+  //

+  // Retrieve CPU Family and Model

+  //

+  AsmCpuid (CPUID_VERSION_INFO, , NULL, NULL, );

+  FamilyId = (RegEax >> 8) & 0xf;

+  ModelId  = (RegEax >> 4) & 0xf;

+  if ((FamilyId == 0x06) || (FamilyId == 0x0f)) {

+ModelId = ModelId | ((RegEax >> 12) & 0xf0);

+  }

+

+  //

+  // Check CPUID(CPUID_VERSION_INFO).EDX[12] for MTRR capability

+  //

+  if ((RegEdx & BIT12) != 0) {

+//

+// Check MTRR_CAP MSR bit 11 for SMRR support

+//

+if ((AsmReadMsr64 (SMM_FEATURES_LIB_IA32_MTRR_CAP) & BIT11) != 0) {

+  mSmrrSupported = TRUE;

+}

+  }

+

+  //

+  // Intel(R) 64 and IA-32 Architectures Software Developer's Manual

+  // Volume 3C, Section 35.3 MSRs in the Intel(R) Atom(TM) Processor Family

+  //

+  // If CPU Family/Model is 06_1CH, 06_26H, 06_27H, 06_35H or 06_36H, then

+  // SMRR Physical Base and SMM Physical Mask MSRs are not available.

+  //

+  if (FamilyId == 0x06) {

+if ((ModelId == 0x1C) || (ModelId == 0x26) || (ModelId == 0x27) || 
(ModelId == 0x35) || (ModelId == 0x36)) {

+  mSmrrSupported = FALSE;

+}

+  }

+

+  //

+  // Intel(R) 64 and IA-32 Architectures Software Developer's Manual

+  // Volume 3C, Section 35.2 MSRs in the Intel(R) Core(TM) 2 Processor Family

+  //

+  // If CPU Family/Model is 06_0F or 06_17, then use Intel(R) Core(TM) 2

+  // Processor Family MSRs

+  //

+  if (FamilyId == 0x06) {

+if ((ModelId == 0x17) || (ModelId == 0x0f)) {

+  mSmrrPhysBaseMsr = SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE;

+  mSmrrPhysMaskMsr = SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSMASK;

+}

+  }

+

+  //

+  // Intel(R) 64 and 

[edk2-devel] [PATCH 22/33] AMD/VanGoghBoard: Check in Vtf0.

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Initial Vtf0 module.

This module includes all assembly code files of reset vector.



Signed-off-by: Eric Xing 

Cc: Ken Yao 

Cc: Duke Zhai 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../ResetVector/Vtf0/CommonMacros.inc |  34 +++

 .../ResetVector/Vtf0/DebugDisabled.asm|  28 +++

 .../ResetVector/Vtf0/Ia16/Init16.asm  |  58 +

 .../ResetVector/Vtf0/Ia16/Real16ToFlat32.asm  | 145 +

 .../ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm | 115 ++

 .../ResetVector/Vtf0/Ia32/Flat32ToFlat64.asm  |  47 

 .../ResetVector/Vtf0/Ia32/PageTables64.asm|  32 +++

 .../Vtf0/Ia32/SearchForBfvBase.asm|  91 

 .../Vtf0/Ia32/SearchForSecEntry.asm   | 202 ++

 .../edk2/UefiCpuPkg/ResetVector/Vtf0/Main.asm | 134 

 .../ResetVector/Vtf0/Port80Debug.asm  |  30 +++

 .../UefiCpuPkg/ResetVector/Vtf0/PostCodes.inc |  27 +++

 .../ResetVector/Vtf0/ResetVector.uni  | Bin 0 -> 1158 bytes

 .../ResetVector/Vtf0/ResetVectorExtra.uni | Bin 0 -> 1080 bytes

 .../ResetVector/Vtf0/SerialDebug.asm  | 134 

 .../edk2/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf |  51 +

 .../UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb|  74 +++

 .../ResetVector/Vtf0/X64/PageTables.asm   |  80 +++

 18 files changed, 1282 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/CommonMacros.inc

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/DebugDisabled.asm

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/Ia16/Init16.asm

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/Ia32/Flat32ToFlat64.asm

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/Ia32/PageTables64.asm

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/Ia32/SearchForBfvBase.asm

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/Ia32/SearchForSecEntry.asm

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/Main.asm

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/Port80Debug.asm

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/PostCodes.inc

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/ResetVector.uni

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/ResetVectorExtra.uni

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/SerialDebug.asm

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm



diff --git 
a/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/CommonMacros.inc
 
b/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/CommonMacros.inc

new file mode 100644

index 00..add362fc64

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/CommonMacros.inc

@@ -0,0 +1,34 @@

+;/** @file

+; Common macros used in the ResetVector VTF module.

+;

+; Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+; SPDX-License-Identifier: BSD-2-Clause-Patent

+;

+;**/

+; This file includes code originally published under the following license.

+;--

+; @file

+; Common macros used in the ResetVector VTF module.

+;

+; Copyright (c) 2008, Intel Corporation. All rights reserved.

+; SPDX-License-Identifier: BSD-2-Clause-Patent

+;

+;--

+

+%define ADDR16_OF(x) (0x1 - fourGigabytes + x)

+%define ADDR_OF(x) (0x1 - fourGigabytes + x)

+%define ADDR_OF_MEM(x) (VIRTUAL4G - fourGigabytes + x)

+%define SMM_RESUME_SIGNATURE 0x55AABB66

+%macro  OneTimeCall 1

+jmp %1

+%1 %+ OneTimerCallReturn:

+%endmacro

+

+%macro  OneTimeCallRet 1

+jmp %1 %+ OneTimerCallReturn

+%endmacro

+

+StartOfResetVectorCode:

+

+%define ADDR_OF_START_OF_RESET_CODE ADDR_OF(StartOfResetVectorCode)

+

diff --git 
a/Platform/AMD/VanGoghBoard/Override/edk2/UefiCpuPkg/ResetVector/Vtf0/DebugDisabled.asm
 

[edk2-devel] [PATCH 23/33] AMD/VanGoghBoard: Check in AcpiPlatform.

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Initial Acpi platform dxe drivers. Use firmware volume protocol

to update global NVS area for ASL and SMM init code.



Signed-off-by: Eric Xing 

Cc: Ken Yao 

Cc: Duke Zhai 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../Universal/AcpiPlatformDxe/AcpiPlatform.c  | 343 ++

 .../AcpiPlatformDxe/AcpiPlatform.uni  |  24 ++

 .../AcpiPlatformDxe/AcpiPlatformDxe.inf   |  65 

 .../AcpiPlatformDxe/AcpiPlatformExtra.uni |  22 ++

 .../AcpiPlatformDxe/AcpiPlatformHooks.c   | 159 

 .../AcpiPlatformDxe/AcpiPlatformHooks.h   |  55 +++

 6 files changed, 668 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/AcpiPlatformDxe/AcpiPlatform.c

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/AcpiPlatformDxe/AcpiPlatform.uni

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/AcpiPlatformDxe/AcpiPlatformDxe.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/AcpiPlatformDxe/AcpiPlatformExtra.uni

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/AcpiPlatformDxe/AcpiPlatformHooks.c

 create mode 100644 
Platform/AMD/VanGoghBoard/Universal/AcpiPlatformDxe/AcpiPlatformHooks.h



diff --git a/Platform/AMD/VanGoghBoard/Universal/AcpiPlatformDxe/AcpiPlatform.c 
b/Platform/AMD/VanGoghBoard/Universal/AcpiPlatformDxe/AcpiPlatform.c

new file mode 100644

index 00..4ac29ca17e

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/Universal/AcpiPlatformDxe/AcpiPlatform.c

@@ -0,0 +1,343 @@

+/** @file

+  Implements AcpiPlatform in Board Package

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+**/

+/* This file includes code originally published under the following license. */

+

+/** @file

+  Sample ACPI Platform Driver

+

+  Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#include 

+

+#include 

+#include 

+

+#include 

+#include 

+#include 

+#include 

+

+#include 

+

+#include "AcpiPlatformHooks.h"

+#include 

+

+EFI_GLOBAL_NVS_AREA_PROTOCOL  mGlobalNvsArea;

+

+/**

+  Locate the first instance of a protocol.  If the protocol requested is an

+  FV protocol, then it will return the first FV that contains the ACPI table

+  storage file.

+

+  @param  Instance  Return pointer to the first instance of the protocol

+

+  @return EFI_SUCCESS   The function completed successfully.

+  @return EFI_NOT_FOUND The protocol could not be located.

+  @return EFI_OUT_OF_RESOURCES  There are not enough resources to find the 
protocol.

+

+**/

+EFI_STATUS

+LocateFvInstanceWithTables (

+  OUT EFI_FIRMWARE_VOLUME2_PROTOCOL  **Instance

+  )

+{

+  EFI_STATUS Status;

+  EFI_HANDLE *HandleBuffer;

+  UINTN  NumberOfHandles;

+  EFI_FV_FILETYPEFileType;

+  UINT32 FvStatus;

+  EFI_FV_FILE_ATTRIBUTES Attributes;

+  UINTN  Size;

+  UINTN  Index;

+  EFI_FIRMWARE_VOLUME2_PROTOCOL  *FvInstance;

+

+  FvStatus = 0;

+

+  //

+  // Locate protocol.

+  //

+  Status = gBS->LocateHandleBuffer (

+  ByProtocol,

+  ,

+  NULL,

+  ,

+  

+  );

+  if (EFI_ERROR (Status)) {

+//

+// Defined errors at this time are not found and out of resources.

+//

+return Status;

+  }

+

+  //

+  // Looking for FV with ACPI storage file

+  //

+

+  for (Index = 0; Index < NumberOfHandles; Index++) {

+//

+// Get the protocol on this handle

+// This should not fail because of LocateHandleBuffer

+//

+Status = gBS->HandleProtocol (

+HandleBuffer[Index],

+,

+(VOID **)

+);

+ASSERT_EFI_ERROR (Status);

+

+//

+// See if it has the ACPI storage file

+//

+Status = FvInstance->ReadFile (

+   FvInstance,

+   (EFI_GUID *)PcdGetPtr (PcdAcpiTableStorageFile),

+   NULL,

+   ,

+   ,

+   ,

+   

+   );

+

+//

+// If we found it, then we are done

+//

+if (Status == EFI_SUCCESS) {

+  *Instance = FvInstance;

+  break;

+}

+  }

+

+  //

+  // Our exit status is determined by the success of the previous operations

+  // If the protocol was found, Instance already points to it.

+  //

+

+  //

+  // Free any allocated buffers

+  //

+  gBS->FreePool (HandleBuffer);

+

+  return Status;

+}

+

+/**

+  This function calculates and updates an UINT8 checksum.

+

+  @param  Buffer  Pointer to buffer to 

[edk2-devel] [PATCH 11/33] AMD/VanGoghBoard: Check in FvbServices

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Initial FvbServices module. It describes platform flash IC information

for FlashUpdate module to send command correctly.

Different flash ICs may use the different Opcodes.



Signed-off-by: Duke Zhai 

Cc: Eric Xing 

Cc: Ken Yao 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../VanGoghCommonPkg/FvbServices/FvbInfo.c|  128 ++

 .../FvbServices/FwBlockService.c  | 1295 +

 .../FvbServices/FwBlockService.h  |  524 +++

 .../FvbServices/PlatformSmmSpi.inf|   77 +

 4 files changed, 2024 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FvbInfo.c

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FwBlockService.c

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FwBlockService.h

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/PlatformSmmSpi.inf



diff --git a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FvbInfo.c 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FvbInfo.c

new file mode 100644

index 00..d980bb6653

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FvbInfo.c

@@ -0,0 +1,128 @@

+/** @file

+  Implements FvbInfo

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+// This file includes code originally published under the following license.

+

+/** @file

+Defines data structure that is the volume header found.These data is intent

+to decouple FVB driver with FV header.

+

+Copyright (c) 2013 Intel Corporation.

+

+SPDX-License-Identifier: BSD-2-Clause-Patent

+

+

+**/

+

+//

+// The package level header files this module uses

+//

+#include 

+

+//

+// The protocols, PPI and GUID defintions for this module

+//

+#include 

+#include 

+#include 

+#include 

+#include 

+//

+// The Library classes this module consumes

+//

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#define FVB_MEDIA_BLOCK_SIZE  (0x0001)

+

+#define SYSTEM_NV_BLOCK_NUM  ((FixedPcdGet32(PcdFlashNvStorageVariableSize)+ 
FixedPcdGet32(PcdFlashNvStorageFtwWorkingSize) + 
FixedPcdGet32(PcdFlashNvStorageFtwSpareSize))/ FVB_MEDIA_BLOCK_SIZE)

+

+typedef struct {

+  EFI_PHYSICAL_ADDRESS  BaseAddress;

+  EFI_FIRMWARE_VOLUME_HEADERFvbInfo;

+  //

+  // EFI_FV_BLOCK_MAP_ENTRYExtraBlockMap[n];//n=0

+  //

+  EFI_FV_BLOCK_MAP_ENTRYEnd[1];

+} EFI_FVB2_MEDIA_INFO;

+

+EFI_FVB2_MEDIA_INFO  mPlatformFvbMediaInfo =

+  //

+  // Systen NvStorage FVB

+  //

+{

+  0,

+  {

+{

+  0,

+},// ZeroVector[16]

+EFI_SYSTEM_NV_DATA_FV_GUID,

+FVB_MEDIA_BLOCK_SIZE *SYSTEM_NV_BLOCK_NUM,

+EFI_FVH_SIGNATURE,

+EFI_FVB2_MEMORY_MAPPED |

+EFI_FVB2_READ_ENABLED_CAP |

+EFI_FVB2_READ_STATUS |

+EFI_FVB2_WRITE_ENABLED_CAP |

+EFI_FVB2_WRITE_STATUS |

+EFI_FVB2_ERASE_POLARITY |

+EFI_FVB2_ALIGNMENT_16,

+sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENTRY),

+0xFBFF,// CheckSum

+0, // ExtHeaderOffset

+{

+  0,

+},// Reserved[1]

+2,// Revision

+{

+  {

+SYSTEM_NV_BLOCK_NUM,

+FVB_MEDIA_BLOCK_SIZE,

+  }

+}

+  },

+  {

+{

+  0,

+  0

+}

+  }

+};

+

+/**

+  Get Fvb information.

+

+  @param[in] BaseAddressThe base address compare with NvStorageVariable 
base address.

+  @param[out] FvbInfoFvb information.

+

+  @retval EFI_SUCCESS   Get Fvb information successfully.

+  @retval EFI_NOT_FOUND Not find Fvb information.

+

+**/

+EFI_STATUS

+EFIAPI

+GetFvbInfo (

+  IN  UINT64  BaseAddress,

+  OUT EFI_FIRMWARE_VOLUME_HEADER  **FvbInfo

+  )

+{

+  mPlatformFvbMediaInfo.BaseAddress = PcdGet32 (PcdFlashNvStorageVariableBase);

+

+  if (mPlatformFvbMediaInfo.BaseAddress == BaseAddress) {

+*FvbInfo = 

+return EFI_SUCCESS;

+  }

+

+  return EFI_NOT_FOUND;

+}

diff --git 
a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FwBlockService.c 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FwBlockService.c

new file mode 100644

index 00..5565b69de5

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FvbServices/FwBlockService.c

@@ -0,0 +1,1295 @@

+/** @file

+  Implements FvbServicesSmm

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+// This file includes code originally published under the following license.

+

+/** @file

+

+Copyright (c) 2013-2016 Intel Corporation.

+

+SPDX-License-Identifier: BSD-2-Clause-Patent

+

+

+**/

+

+#ifdef _MSC_VER

+  #pragma optimize( "", off )

+#endif

+

+#ifdef __GNUC__

+  #ifndef 

[edk2-devel] [PATCH 17/33] AMD/VanGoghBoard: Check in Smm access module.

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Initial AMD Smm access module.

Contains description files for ACPI SMM Platform handler module.



Signed-off-by: Duke Zhai 

Cc: Eric Xing 

Cc: Ken Yao 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../Smm/AcpiSmm/AcpiSmmPlatform.c | 194 

 .../Smm/AcpiSmm/AcpiSmmPlatform.h |  60 +++

 .../Smm/AcpiSmm/AcpiSmmPlatform.inf   |  65 +++

 .../Smm/SmmAccessPei/SmmAccessPei.c   | 447 ++

 .../Smm/SmmAccessPei/SmmAccessPei.inf |  51 ++

 5 files changed, 817 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/AcpiSmm/AcpiSmmPlatform.c

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/AcpiSmm/AcpiSmmPlatform.h

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/AcpiSmm/AcpiSmmPlatform.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/SmmAccessPei/SmmAccessPei.c

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/SmmAccessPei/SmmAccessPei.inf



diff --git 
a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/AcpiSmm/AcpiSmmPlatform.c 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/AcpiSmm/AcpiSmmPlatform.c

new file mode 100644

index 00..383bcec471

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Smm/AcpiSmm/AcpiSmmPlatform.c

@@ -0,0 +1,194 @@

+/** @file

+  Implements AMD AcpiSmmPlatform.c

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+/* This file includes code originally published under the following license. */

+

+/** @file

+ACPISMM Driver implementation file.

+

+This is QNC Smm platform driver

+

+Copyright (c) 2013-2019 Intel Corporation.

+

+SPDX-License-Identifier: BSD-2-Clause-Patent

+

+

+**/

+

+#include 

+

+/**

+  Allocate EfiACPIMemoryNVS below 4G memory address.

+

+  This function allocates EfiACPIMemoryNVS below 4G memory address.

+

+  @param[in] Size   Size of memory to allocate.

+

+  @return   Allocated address for output.

+

+**/

+VOID *

+AllocateAcpiNvsMemoryBelow4G (

+  IN UINTN  Size

+  )

+{

+  UINTN Pages;

+  EFI_PHYSICAL_ADDRESS  Address;

+  EFI_STATUSStatus;

+  VOID  *Buffer;

+

+  Pages   = EFI_SIZE_TO_PAGES (Size);

+  Address = 0x;

+

+  Status = gBS->AllocatePages (

+  AllocateMaxAddress,

+  EfiACPIMemoryNVS,

+  Pages,

+  

+  );

+  if (EFI_ERROR (Status)) {

+return NULL;

+  }

+

+  Buffer = (VOID *)(UINTN)Address;

+  ZeroMem (Buffer, Size);

+

+  return Buffer;

+}

+

+/**

+  Reserved S3 memory for InstallS3Memory

+

+  @retval  EFI_OUT_OF_RESOURCES Insufficient resources to complete 
function.

+  @retval  EFI_SUCCESS  Function has completed successfully.

+

+**/

+EFI_STATUS

+EFIAPI

+ReservedS3Memory (

+  UINTN  SystemMemoryLength

+

+  )

+

+{

+  VOID*GuidHob;

+  EFI_SMRAM_HOB_DESCRIPTOR_BLOCK  *DescriptorBlock;

+  VOID*AcpiReservedBase;

+

+  UINTN   TsegIndex;

+  UINTN   TsegSize;

+  UINTN   TsegBase;

+  RESERVED_ACPI_S3_RANGE  *AcpiS3Range;

+

+  DEBUG ((DEBUG_INFO, "ReservedS3Memory, SystemMemoryLength: 0x%08X\n", 
SystemMemoryLength));

+  //

+  // Get Hob list for SMRAM desc

+  //

+  GuidHob = GetFirstGuidHob ();

+  ASSERT (GuidHob != NULL);

+  DEBUG ((DEBUG_INFO, "gEfiSmmPeiSmramMemoryReserveGuid: 0x%X \n", 
(UINTN)GuidHob));

+  DescriptorBlock = GET_GUID_HOB_DATA (GuidHob);

+  ASSERT (DescriptorBlock != NULL);

+

+  //

+  // Use the hob to get SMRAM capabilities

+  //

+  TsegIndex = DescriptorBlock->NumberOfSmmReservedRegions - 1;

+  DEBUG ((DEBUG_INFO, "DescriptorBlock->NumberOfSmmReservedRegions: 0x%X\n", 
DescriptorBlock->NumberOfSmmReservedRegions));

+  DEBUG ((DEBUG_INFO, "TsegIndex: 0x%X\n", TsegIndex));

+  ASSERT (TsegIndex <= (MAX_SMRAM_RANGES - 1));

+  TsegBase = (UINTN)DescriptorBlock->Descriptor[TsegIndex].PhysicalStart;

+  TsegSize = (UINTN)DescriptorBlock->Descriptor[TsegIndex].PhysicalSize;

+

+  DEBUG ((DEBUG_INFO, "SMM  Base: %08X\n", TsegBase));

+  DEBUG ((DEBUG_INFO, "SMM  Size: %08X\n", TsegSize));

+

+  //

+  // Now find the location of the data structure that is used to store the 
address

+  // of the S3 reserved memory.

+  //

+  AcpiS3Range = (RESERVED_ACPI_S3_RANGE *)(UINTN)(TsegBase + 
RESERVED_ACPI_S3_RANGE_OFFSET);

+  DEBUG ((DEBUG_INFO, "AcpiS3Range: %08X\n", (UINTN)AcpiS3Range));

+  //

+  // Allocate reserved ACPI memory for S3 resume.  Pointer to this region is

+  // stored in SMRAM in the first page of TSEG.

+  //

+  AcpiReservedBase = AllocateAcpiNvsMemoryBelow4G (PcdGet32 
(PcdS3AcpiReservedMemorySize));

+  DEBUG ((DEBUG_INFO, "AcpiReservedBase: %08X\n", 

[edk2-devel] [PATCH 19/33] AMD/VanGoghBoard: Check in PcatRealTimeClockRuntimeDxe module.

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

This driver provides GetTime, SetTime, GetWakeupTime, SetWakeupTime services to 
Runtime Service Table.

It will install a tagging protocol with gEfiRealTimeClockArchProtocolGuid.



Signed-off-by: Ken Yao 

Cc: Eric Xing 

Cc: Duke Zhai 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../PcatRealTimeClockRuntimeDxe/PcRtc.c   | 1356 +

 .../PcatRealTimeClockRuntimeDxe/PcRtc.h   |  389 +

 .../PcatRealTimeClockRuntimeDxe/PcRtc.uni |   35 +

 .../PcatRealTimeClockRuntimeDxe/PcRtcEntry.c  |  186 +++

 .../PcRtcExtra.uni|   30 +

 .../PcatRealTimeClockRuntimeDxe.inf   |   93 ++

 6 files changed, 2089 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.uni

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcExtra.uni

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf



diff --git 
a/Platform/AMD/VanGoghBoard/Override/edk2/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c
 
b/Platform/AMD/VanGoghBoard/Override/edk2/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c

new file mode 100644

index 00..37ba9d8b5d

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/Override/edk2/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c

@@ -0,0 +1,1356 @@

+/** @file

+  Implements PcRtc.c

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+/* This file includes code originally published under the following license. */

+

+/** @file

+  RTC Architectural Protocol GUID as defined in DxeCis 0.96.

+

+Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.

+This program and the accompanying materials

+are licensed and made available under the terms and conditions of the BSD 
License

+which accompanies this distribution.  The full text of the license may be 
found at

+http://opensource.org/licenses/bsd-license.php

+

+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/

+

+#include "PcRtc.h"

+

+//

+// Days of month.

+//

+UINTN  mDayOfMonth[] = { 31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };

+

+//

+// The name of NV variable to store the timezone and daylight saving 
information.

+//

+CHAR16  mTimeZoneVariableName[] = L"RTC";

+

+/**

+  Compare the Hour, Minute and Second of the From time and the To time.

+

+  Only compare H/M/S in EFI_TIME and ignore other fields here.

+

+  @param From   the first time

+  @param To the second time

+

+  @return  >0   The H/M/S of the From time is later than those of To time

+  @return  ==0  The H/M/S of the From time is same as those of To time

+  @return  <0   The H/M/S of the From time is earlier than those of To time

+**/

+INTN

+CompareHMS (

+  IN EFI_TIME  *From,

+  IN EFI_TIME  *To

+  );

+

+/**

+  To check if second date is later than first date within 24 hours.

+

+  @param  From   the first date

+  @param  To the second date

+

+  @retval TRUE   From is previous to To within 24 hours.

+  @retval FALSE  From is later, or it is previous to To more than 24 hours.

+**/

+BOOLEAN

+IsWithinOneDay (

+  IN EFI_TIME  *From,

+  IN EFI_TIME  *To

+  );

+

+/**

+  Read RTC content through its registers.

+

+  @param  Address  Address offset of RTC. It is recommended to use macros such 
as

+   RTC_ADDRESS_SECONDS.

+

+  @return The data of UINT8 type read from RTC.

+**/

+UINT8

+RtcRead (

+  IN  UINT8  Address

+  )

+{

+  IoWrite8 (PCAT_RTC_ADDRESS_REGISTER, (UINT8)(Address | (UINT8)(IoRead8 
(PCAT_RTC_ADDRESS_REGISTER) & 0x80)));

+  return IoRead8 (PCAT_RTC_DATA_REGISTER);

+}

+

+/**

+  Write RTC through its registers.

+

+  @param  Address  Address offset of RTC. It is recommended to use macros such 
as

+   RTC_ADDRESS_SECONDS.

+  @param  Data The content you want to write into RTC.

+

+**/

+VOID

+RtcWrite (

+  IN  UINT8  Address,

+  IN  UINT8  Data

+  )

+{

+  IoWrite8 (PCAT_RTC_ADDRESS_REGISTER, (UINT8)(Address | (UINT8)(IoRead8 
(PCAT_RTC_ADDRESS_REGISTER) & 0x80)));

+  IoWrite8 (PCAT_RTC_DATA_REGISTER, Data);

+}

+

+/**

+  Initialize RTC.

+

+  @param  GlobalFor global use inside this module.

+

+  @retval EFI_DEVICE_ERROR  Initialization failed due to device error.

+  @retval EFI_SUCCESS   Initialization 

[edk2-devel] [PATCH 12/33] AMD/VanGoghBoard: Check in AMD BaseSerialPortLib

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Initial FCH UART port for Serial log output.

Chachani board uses this UART for outputting debug log.



Signed-off-by: Duke Zhai 

Cc: Eric Xing 

Cc: Ken Yao 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../BaseSerialPortLib16550AmdFchUart.c| 473 ++

 .../BaseSerialPortLib16550AmdFchUart.inf  |  49 ++

 2 files changed, 522 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/BaseSerialPortLib16550AmdFchUart/BaseSerialPortLib16550AmdFchUart.c

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/BaseSerialPortLib16550AmdFchUart/BaseSerialPortLib16550AmdFchUart.inf



diff --git 
a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/BaseSerialPortLib16550AmdFchUart/BaseSerialPortLib16550AmdFchUart.c
 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/BaseSerialPortLib16550AmdFchUart/BaseSerialPortLib16550AmdFchUart.c

new file mode 100644

index 00..cf97e4109d

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/BaseSerialPortLib16550AmdFchUart/BaseSerialPortLib16550AmdFchUart.c

@@ -0,0 +1,473 @@

+/** @file

+  Implements BaseSerialPortLib16550AmdFchUart.c

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+/* This file includes code originally published under the following license. */

+

+/** @file

+  16550 UART Serial Port library functions

+

+  (C) Copyright 2014 Hewlett-Packard Development Company, L.P.

+  Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.

+  Copyright (c) 2018, AMD Incorporated. All rights reserved.

+  Copyright (c) 2020, ARM Limited. All rights reserved.

+

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#include 

+#include 

+#include 

+#include 

+#include 

+

+//

+// 16550 UART register offsets and bitfields

+//

+#define R_UART_RXBUF 0

+#define R_UART_TXBUF 0

+#define R_UART_BAUD_LOW  0

+#define R_UART_BAUD_HIGH 1

+#define R_UART_FCR   2

+#define   B_UART_FCR_FIFOE   BIT0

+#define   B_UART_FCR_FIFO64  BIT5

+#define R_UART_LCR   3

+#define   B_UART_LCR_DLABBIT7

+#define R_UART_MCR   4

+#define   B_UART_MCR_RTS BIT1

+#define R_UART_LSR   5

+#define   B_UART_LSR_RXRDY   BIT0

+#define   B_UART_LSR_TXRDY   BIT5

+#define   B_UART_LSR_TEMTBIT6

+#define R_UART_MSR   6

+#define   B_UART_MSR_CTS BIT4

+#define   B_UART_MSR_DSR BIT5

+

+/**

+  Read an 8-bit 16550 register.  The parameter Offset is added to the base 
address of the

+  16550 registers that is specified by PcdSerialRegisterBase.

+  @param  Offset  The offset of the 16550 register to read.

+  @return The value read from the 16550 register.

+**/

+UINT8

+SerialPortReadRegister (

+  UINTN  Offset

+  )

+{

+  return MmioRead8 ((UINTN)PcdGet64 (PcdSerialRegisterBase) + Offset * 4);

+}

+

+/**

+  Write an 8-bit 16550 register. The parameter Offset is added to the base 
address of the

+  16550 registers that is specified by PcdSerialRegisterBase.

+  @param  Offset  The offset of the 16550 register to write.

+  @param  Value   The value to write to the 16550 register specified by Offset.

+  @return The value written to the 16550 register.

+**/

+UINT8

+SerialPortWriteRegister (

+  UINTN  Offset,

+  UINT8  Value

+  )

+{

+  return MmioWrite8 ((UINTN)PcdGet64 (PcdSerialRegisterBase) + Offset * 4, 
Value);

+}

+

+/**

+  Return whether the hardware flow control signal allows writing.

+

+  @retval TRUE  The serial port is writable.

+  @retval FALSE The serial port is not writable.

+**/

+BOOLEAN

+SerialPortWritable (

+  VOID

+  )

+{

+  if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {

+if (PcdGetBool (PcdSerialDetectCable)) {

+  //

+  // Wait for both DSR and CTS to be set

+  //   DSR is set if a cable is connected.

+  //   CTS is set if it is ok to transmit data

+  //

+  //   DSR  CTS  Description   Action

+  //   ===  ===    

+  //00   No cable connected.   Wait

+  //01   No cable connected.   Wait

+  //10   Cable connected, but not clear to send.   Wait

+  //11   Cable connected, and clear to send.   Transmit

+  //

+  return (BOOLEAN)((SerialPortReadRegister (R_UART_MSR) & (B_UART_MSR_DSR 
| B_UART_MSR_CTS)) == (B_UART_MSR_DSR | B_UART_MSR_CTS));

+} else {

+  //

+  // Wait for both DSR and CTS to be set OR for DSR to be clear.

+  //   DSR is set if a cable is connected.

+  //   CTS is set if it is ok to transmit data

+  //

+  //   DSR  CTS  Description   Action

+  //   ===  ===    

+  //0

[edk2-devel] [PATCH 15/33] AMD/VanGoghBoard: Check in SpiFlashDeviceLib

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Initial AMD SpiFlashDeviceLib for Chachani board flash IC.

Chachani board use the W25Q256JW as flash IC.



Signed-off-by: Duke Zhai 

Cc: Eric Xing 

Cc: Ken Yao 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../SpiFlashDeviceLib/SpiFlashDeviceLib.c | 42 +++

 .../SpiFlashDeviceLib/SpiFlashDeviceLib.inf   | 29 +

 2 files changed, 71 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/SpiFlashDeviceLib/SpiFlashDeviceLib.c

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/SpiFlashDeviceLib/SpiFlashDeviceLib.inf



diff --git 
a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/SpiFlashDeviceLib/SpiFlashDeviceLib.c
 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/SpiFlashDeviceLib/SpiFlashDeviceLib.c

new file mode 100644

index 00..49636f6a89

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/SpiFlashDeviceLib/SpiFlashDeviceLib.c

@@ -0,0 +1,42 @@

+/** @file

+  Implements SpiFlashDeviceLib.c

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#include 

+

+SPI_INIT_TABLE  mSpiInitTable[] = {

+  { // W25Q256JW/W74M25JW

+SF_VENDOR_ID_WINBOND,

+SF_DEVICE_ID0_W25Q256JW,

+SF_DEVICE_ID1_W25Q256JW,

+{

+  SPI_COMMAND_WRITE_ENABLE,

+  SPI_COMMAND_WRITE_S_EN

+},

+{

+  { EnumSpiOpcodeReadNoAddr,SPI_COMMAND_JEDEC_ID,  
EnumSpiOperationJedecId},

+  { EnumSpiOpcodeWriteNoAddr,SPI_COMMAND_WRITE_S,   
EnumSpiOperationWriteStatus},

+  { EnumSpiOpcodeWrite,SPI_COMMAND_WRITE, 
EnumSpiOperationProgramData_1_Byte },

+  { EnumSpiOpcodeRead, SPI_COMMAND_READ,  
EnumSpiOperationReadData   },

+  { EnumSpiOpcodeWrite,SPI_COMMAND_ERASE, 
EnumSpiOperationErase_4K_Byte  },

+  { EnumSpiOpcodeReadNoAddr,SPI_COMMAND_READ_S,
EnumSpiOperationReadStatus },

+  { EnumSpiOpcodeWriteNoAddr,SPI_COMMAND_CHIP_ERASE,
EnumSpiOperationFullChipErase  },

+  { EnumSpiOpcodeRead, SPI_COMMAND_READ_SFDP, 
EnumSpiOperationReadData   },

+  { EnumSpiOpcodeWriteNoAddr,SPI_COMMAND_RPMC_OP1,  
EnumSpiOperationOther  },

+  { EnumSpiOpcodeReadNoAddr,SPI_COMMAND_RPMC_OP2,  
EnumSpiOperationReadData   },

+  { EnumSpiOpcodeReadNoAddr,SPI_COMMAND_Enter_4Byte_Addr,  
EnumSpiOperationOther  },

+  { EnumSpiOpcodeReadNoAddr,SPI_COMMAND_Exit_4Byte_Addr,   
EnumSpiOperationOther  }

+},

+0,

+0x200   // BIOS image size in flash

+  }

+};

+

+//

+// The total number of support flash part

+//

+UINT8  mNumSpiFlashMax = sizeof (mSpiInitTable) / sizeof (mSpiInitTable[0]);

diff --git 
a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/SpiFlashDeviceLib/SpiFlashDeviceLib.inf
 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/SpiFlashDeviceLib/SpiFlashDeviceLib.inf

new file mode 100644

index 00..951cf6c480

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/SpiFlashDeviceLib/SpiFlashDeviceLib.inf

@@ -0,0 +1,29 @@

+## @file

+# SpiFlashDeviceLib

+#

+# Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+# SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+##

+

+[Defines]

+  INF_VERSION= 0x00010005

+  BASE_NAME  = SpiFlashDeviceLib

+  FILE_GUID  = D5A903A8-4D19-4E4C-AAF4-07C5D10D5939

+  MODULE_TYPE= BASE

+  VERSION_STRING = 1.0

+  LIBRARY_CLASS  = SpiFlashDeviceLib

+

+#

+#  VALID_ARCHITECTURES   = IA32 X64

+#

+

+[Sources]

+  SpiFlashDeviceLib.c

+

+[Packages]

+  MdePkg/MdePkg.dec

+  VanGoghCommonPkg/AmdCommonPkg.dec

+

+[LibraryClasses]

+  SpiFlashDeviceLib

--

2.31.1





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[edk2-devel] [PATCH 14/33] AMD/VanGoghBoard: Check in SmbiosLib

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Provides library functions for common SMBIOS operations. Only available to DXE

and UEFI module types.



Signed-off-by: Duke Zhai 

Cc: Eric Xing 

Cc: Ken Yao 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../Include/Library/SmbiosLib.h   | 179 ++

 .../Library/SmbiosLib/SmbiosLib.c | 332 ++

 .../Library/SmbiosLib/SmbiosLib.inf   |  51 +++

 3 files changed, 562 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Library/SmbiosLib.h

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/SmbiosLib/SmbiosLib.c

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/SmbiosLib/SmbiosLib.inf



diff --git 
a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Library/SmbiosLib.h 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Library/SmbiosLib.h

new file mode 100644

index 00..5880eac36e

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Library/SmbiosLib.h

@@ -0,0 +1,179 @@

+/** @file

+  Implements AMD SmbiosLib.h

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+// This file includes code originally published under the following license.

+/** @file

+  Provides library functions for common SMBIOS operations. Only available to 
DXE

+  and UEFI module types.

+

+

+Copyright (c) 2012, Apple Inc. All rights reserved.

+Portitions Copyright (c) 2006 - 2011, Intel Corporation. All rights 
reserved.

+SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef _SMBIOS_LIB_H__

+#define _SMBIOS_LIB_H__

+

+#include 

+#include 

+

+///

+/// Cache copy of the SMBIOS Protocol pointer

+///

+extern EFI_SMBIOS_PROTOCOL  *gSmbios;

+

+///

+/// Template for SMBIOS table initialization.

+/// The SMBIOS_TABLE_STRING types in the formated area must match the

+/// StringArray sequene.

+///

+typedef struct {

+  //

+  // formatted area of a given SMBIOS record

+  //

+  SMBIOS_STRUCTURE*Entry;

+  //

+  // NULL terminated array of ASCII strings to be added to the SMBIOS record.

+  //

+  CHAR8   **StringArray;

+} SMBIOS_TEMPLATE_ENTRY;

+

+/**

+  Create an initial SMBIOS Table from an array of SMBIOS_TEMPLATE_ENTRY

+  entries. SMBIOS_TEMPLATE_ENTRY.NULL indicates the end of the table.

+

+  @param[in]  Template   Array of SMBIOS_TEMPLATE_ENTRY entries.

+

+  @retval EFI_SUCCESS  New SMBIOS tables were created.

+  @retval EFI_OUT_OF_RESOURCES New SMBIOS tables were not created.

+**/

+EFI_STATUS

+EFIAPI

+SmbiosLibInitializeFromTemplate (

+  IN  SMBIOS_TEMPLATE_ENTRY  *Template

+  );

+

+/**

+  Create SMBIOS record.

+

+  Converts a fixed SMBIOS structure and an array of pointers to strings into

+  an SMBIOS record where the strings are cat'ed on the end of the fixed record

+  and terminated via a double NULL and add to SMBIOS table.

+

+  @param[in]  SmbiosEntry   Fixed SMBIOS structure

+  @param[in]  StringArray   Array of strings to convert to an SMBIOS string 
pack.

+NULL is OK.

+

+  @retval EFI_SUCCESS  New SmbiosEntry was added to SMBIOS table.

+  @retval EFI_OUT_OF_RESOURCES SmbiosEntry was not added.

+**/

+EFI_STATUS

+EFIAPI

+SmbiosLibCreateEntry (

+  IN  SMBIOS_STRUCTURE  *SmbiosEntry,

+  IN  CHAR8 **StringArray

+  );

+

+/**

+  Update the string associated with an existing SMBIOS record.

+

+  This function allows the update of specific SMBIOS strings. The number of 
valid strings for any

+  SMBIOS record is defined by how many strings were present when Add() was 
called.

+

+  @param[in]SmbiosHandleSMBIOS Handle of structure that will have its 
string updated.

+  @param[in]StringNumberThe non-zero string number of the string to 
update.

+  @param[in]String  Update the StringNumber string with String.

+

+  @retval EFI_SUCCESS   SmbiosHandle had its StringNumber String 
updated.

+  @retval EFI_INVALID_PARAMETER SmbiosHandle does not exist. Or String is 
invalid.

+  @retval EFI_UNSUPPORTED   String was not added because it is longer than 
the SMBIOS Table supports.

+  @retval EFI_NOT_FOUND The StringNumber.is not valid for this SMBIOS 
record.

+**/

+EFI_STATUS

+EFIAPI

+SmbiosLibUpdateString (

+  IN  EFI_SMBIOS_HANDLESmbiosHandle,

+  IN  SMBIOS_TABLE_STRING  StringNumber,

+  IN  CHAR8*String

+  );

+

+/**

+  Update the string associated with an existing SMBIOS record.

+

+  This function allows the update of specific SMBIOS strings. The number of 
valid strings for any

+  SMBIOS record is defined by how many strings were present when Add() was 
called.

+

+  @param[in]SmbiosHandleSMBIOS Handle of structure that will have its 
string updated.

+  @param[in]StringNumberThe non-zero string number of the string to 

[edk2-devel] [PATCH 16/33] AMD/VanGoghBoard: Check in BaseTscTimerLib

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Provides basic TSC timer calibration based on the ACPI timer hardware.

The performance counter features are provided by the processors time stamp 
counter.



Signed-off-by: Ken Yao 

Cc: Eric Xing 

Cc: Duke Zhai 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../Library/TscTimerLib/BaseTscTimerLib.c |  32 +++

 .../Library/TscTimerLib/BaseTscTimerLib.inf   |  55 

 .../Library/TscTimerLib/DxeTscTimerLib.c  |  89 ++

 .../Library/TscTimerLib/DxeTscTimerLib.inf|  62 

 .../Library/TscTimerLib/PeiTscTimerLib.c  |  62 

 .../Library/TscTimerLib/PeiTscTimerLib.inf|  56 

 .../Library/TscTimerLib/TscTimerLibInternal.h |  62 

 .../Library/TscTimerLib/TscTimerLibShare.c| 264 ++

 8 files changed, 682 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/TscTimerLib/BaseTscTimerLib.c

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/TscTimerLib/BaseTscTimerLib.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/TscTimerLib/DxeTscTimerLib.c

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/TscTimerLib/DxeTscTimerLib.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/TscTimerLib/PeiTscTimerLib.c

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/TscTimerLib/PeiTscTimerLib.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/TscTimerLib/TscTimerLibInternal.h

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/TscTimerLib/TscTimerLibShare.c



diff --git 
a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/TscTimerLib/BaseTscTimerLib.c
 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/TscTimerLib/BaseTscTimerLib.c

new file mode 100644

index 00..a4e37da22e

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/TscTimerLib/BaseTscTimerLib.c

@@ -0,0 +1,32 @@

+/** @file

+  Implements AMD BaseTscTimerLib.c

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+/* This file includes code originally published under the following license. */

+

+/** @file

+  ACPI Timer implements one instance of Timer Library.

+

+  Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#include "TscTimerLibInternal.h"

+

+/**  Get TSC frequency.

+

+  @return The number of TSC counts per second.

+

+**/

+UINT64

+InternalGetTscFrequency (

+  VOID

+  )

+{

+  return InternalCalculateTscFrequency ();

+}

diff --git 
a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/TscTimerLib/BaseTscTimerLib.inf
 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/TscTimerLib/BaseTscTimerLib.inf

new file mode 100644

index 00..7dc29cef40

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/TscTimerLib/BaseTscTimerLib.inf

@@ -0,0 +1,55 @@

+## @file

+# BaseTscTimerLib

+#

+# Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+# SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+##

+

+# This file includes code originally published under the following license.

+## @file

+#  Base ACPI Timer Library

+#

+#  Provides basic timer support using the ACPI timer hardware.  The performance

+#  counter features are provided by the processors time stamp counter.

+#

+#  Note: The implementation uses the lower 24-bits of the ACPI timer and

+#  is compatible with both 24-bit and 32-bit ACPI timers.

+#

+#  Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.

+#  SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+##

+

+[Defines]

+  INF_VERSION= 0x00010005

+  BASE_NAME  = BaseTscTimerLib

+  FILE_GUID  = D29338B9-50FE-4e4f-B7D4-A150A2C1F4FB

+  MODULE_TYPE= BASE

+  VERSION_STRING = 1.0

+  LIBRARY_CLASS  = TimerLib

+

+

+#

+#  VALID_ARCHITECTURES   = IA32 X64

+#

+

+[Sources.common]

+  TscTimerLibShare.c

+  BaseTscTimerLib.c

+  TscTimerLibInternal.h

+

+

+[Packages]

+  MdePkg/MdePkg.dec

+  AgesaPublic/AgesaPublic.dec

+

+

+[LibraryClasses]

+  PcdLib

+  PciLib

+  IoLib

+  BaseLib

+

+[Pcd.common]

+  gEfiAmdAgesaPkgTokenSpaceGuid.PcdAmdFchCfgAcpiPmTmrBlkAddr

diff --git 
a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/TscTimerLib/DxeTscTimerLib.c
 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/TscTimerLib/DxeTscTimerLib.c

new file mode 100644

index 00..e0616565fc

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/TscTimerLib/DxeTscTimerLib.c

@@ -0,0 +1,89 @@

+/** @file

+  Implements AMD DxeTscTimerLib.c

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: 

[edk2-devel] [PATCH 13/33] AMD/VanGoghBoard: Check in PlatformFlashAccessLib

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Initial AMD PlatformFlashAccessLib, It provides flash access protocol for other 
modules.



Signed-off-by: Duke Zhai 

Cc: Eric Xing 

Cc: Ken Yao 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../Include/Library/SpiFlashDeviceLib.h   |  59 ++

 .../VanGoghCommonPkg/Include/Protocol/Spi.h   | 361 

 .../Include/Protocol/SpiCommon.h  | 261 +

 .../Include/Protocol/SpiFlashUpdate.h | 152 +

 .../PlatformFlashAccessLib.c  | 541 ++

 .../PlatformFlashAccessLib.inf|  64 +++

 6 files changed, 1438 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Library/SpiFlashDeviceLib.h

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Protocol/Spi.h

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Protocol/SpiCommon.h

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Protocol/SpiFlashUpdate.h

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/PlatformFlashAccessLib/PlatformFlashAccessLib.c

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Library/PlatformFlashAccessLib/PlatformFlashAccessLib.inf



diff --git 
a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Library/SpiFlashDeviceLib.h
 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Library/SpiFlashDeviceLib.h

new file mode 100644

index 00..e1fb1c31d9

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Library/SpiFlashDeviceLib.h

@@ -0,0 +1,59 @@

+/** @file

+  Implements SpiFlashDevice.h

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef _SPI_FLASH_DEVICE_LIB_H_

+#define _SPI_FLASH_DEVICE_LIB_H_

+

+#include 

+

+//

+// Provides mSpiInitTable and the total number of flash part in mSpiInitTable 
for other modules.

+//

+extern SPI_INIT_TABLE  mSpiInitTable[];

+extern UINT8   mNumSpiFlashMax;

+

+//

+// Flash Device commands

+//

+// If a supported device uses a command different from the list below, a 
device specific command

+// will be defined just below it's JEDEC id section.

+//

+#define SPI_COMMAND_WRITE 0x02

+#define SPI_COMMAND_WRITE_AAI 0xAD

+#define SPI_COMMAND_READ  0x03

+#define SPI_COMMAND_ERASE 0x20

+#define SPI_COMMAND_WRITE_DISABLE 0x04

+#define SPI_COMMAND_READ_S0x05

+#define SPI_COMMAND_WRITE_ENABLE  0x06

+#define SPI_COMMAND_READ_ID   0xAB

+#define SPI_COMMAND_JEDEC_ID  0x9F

+#define SPI_COMMAND_WRITE_S_EN0x50

+#define SPI_COMMAND_WRITE_S   0x01

+#define SPI_COMMAND_CHIP_ERASE0xC7

+#define SPI_COMMAND_BLOCK_ERASE   0xD8

+#define SPI_COMMAND_READ_SFDP 0x5A

+#define SPI_COMMAND_RPMC_OP1  0x9B

+#define SPI_COMMAND_RPMC_OP2  0x96

+#define SPI_COMMAND_Enter_4Byte_Addr  0xB7

+#define SPI_COMMAND_Exit_4Byte_Addr   0xE9

+

+//

+// Winbond 256Mbit parts

+//

+#define SF_VENDOR_ID_WINBOND 0xEF

+#define SF_DEVICE_ID1_W25Q256JW  0x19  // Capacity 256Mbit

+#define SF_DEVICE_ID0_W25Q256JW  0x60

+

+//

+// index for prefix opcodes

+//

+#define SPI_WREN_INDEX  0 // Prefix Opcode 0: 
SPI_COMMAND_WRITE_ENABLE

+#define SPI_EWSR_INDEX  1 // Prefix Opcode 1: 
SPI_COMMAND_WRITE_S_EN

+#define BIOS_CTRL   0xDC

+

+#endif

diff --git a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Protocol/Spi.h 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Protocol/Spi.h

new file mode 100644

index 00..0487946a70

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Include/Protocol/Spi.h

@@ -0,0 +1,361 @@

+/** @file

+  Implements AMD Spi

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+// This file includes code originally published under the following license.

+

+/** @file

+This file defines the EFI SPI Protocol which implements the

+Intel(R) ICH SPI Host Controller Compatibility Interface.

+

+Copyright (c) 2013-2015 Intel Corporation.

+

+This program and the accompanying materials

+are licensed and made available under the terms and conditions of the BSD 
License

+which accompanies this distribution.  The full text of the license may be 
found at

+http://opensource.org/licenses/bsd-license.php

+

+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+

+**/

+

+#ifndef _SPI_H_

+#define _SPI_H_

+

+#include 

+

+//

+// Define the SPI protocol GUID

+//

+// EDK and EDKII have different GUID formats

+//

+#if !defined (EDK_RELEASE_VERSION) || (EDK_RELEASE_VERSION < 0x0002)

+#define EFI_SPI_PROTOCOL_GUID \

+  { \

+ 

[edk2-devel] [PATCH 10/33] AMD/VanGoghBoard: Check in FlashUpdate

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Initial FlashUpdate module for Chachani platform flash IC.

It provides mEfiSpiFlashUpdateProtocol for other module to access flash.



Signed-off-by: Duke Zhai 

Cc: Eric Xing 

Cc: Ken Yao 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../FlashUpdate/FlashUpdateCommon.h   | 143 +

 .../FlashUpdate/FlashUpdateSmm.c  | 512 ++

 .../FlashUpdate/FlashUpdateSmm.h  | 123 +

 .../FlashUpdate/FlashUpdateSmm.inf|  59 ++

 .../FlashUpdate/FlashUpdateSmmRuntimeDxe.c| 407 ++

 .../FlashUpdate/FlashUpdateSmmRuntimeDxe.inf  |  48 ++

 .../VanGoghCommonPkg/FlashUpdate/PcRtc.h  | 390 +

 7 files changed, 1682 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FlashUpdate/FlashUpdateCommon.h

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FlashUpdate/FlashUpdateSmm.c

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FlashUpdate/FlashUpdateSmm.h

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FlashUpdate/FlashUpdateSmm.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FlashUpdate/FlashUpdateSmmRuntimeDxe.c

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FlashUpdate/FlashUpdateSmmRuntimeDxe.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FlashUpdate/PcRtc.h



diff --git 
a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FlashUpdate/FlashUpdateCommon.h 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FlashUpdate/FlashUpdateCommon.h

new file mode 100644

index 00..593a44b61a

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/FlashUpdate/FlashUpdateCommon.h

@@ -0,0 +1,143 @@

+/** @file

+  Implements AMD FlashUpdateCommon.h

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef _FLASH_UPDATE_COMMON_H_

+#define _FLASH_UPDATE_COMMON_H_

+

+#include 

+#include 

+#include 

+#include 

+#include 

+

+#include 

+#include 

+

+#include 

+#include 

+

+#include 

+

+#define SPI_SMM_COMM_ID_GET_FLASH_SIZE_BLOCK_SIZE  0x0   // ID for get 
flash size and block size

+#define SPI_SMM_COMM_ID_READ_FLASH 0x1   // ID for Read 
Flash

+#define SPI_SMM_COMM_ID_WRITE_FALSH0x2   // ID for Write 
Flash

+#define SPI_SMM_COMM_ID_ERASE_FALSH0x3   // ID for Erase 
Flash

+

+//

+// SMM communication common buffer

+//

+typedef struct _FLASH_UPDATE_SMM_COMMUNICATION_CMN {

+  UINT32id; // Function ID of smm communication buffer

+} FLASH_UPDATE_SMM_COMMUNICATION_CMN;

+

+#pragma pack(1)

+

+//

+// SMM communication common buffer

+//

+typedef struct _SMM_COMM_RWE_FLASH {

+  UINT32id;  // ID of smm communication buffer

+  UINTN FlashAddress;// Flash devicd physical flash 
address

+  UINTN NumBytes;// Number in byte

+  EFI_STATUSReturnStatus;// Return status

+  UINT8 Buffer[1];   // Buffer start

+} SMM_COMM_RWE_FLASH;

+

+//

+// SMM communication common buffer

+//

+typedef struct _SMM_COMM_GET_FLASH_SIZE_BLOCK_SIZE {

+  UINT32id;   // ID of smm communication buffer

+  UINTN FlashSize;// Flash size

+  UINTN BlockSize;// Block size of flash device

+  EFI_STATUSReturnStatus; // Return status

+} SMM_COMM_GET_FLASH_SIZE_BLOCK_SIZE;

+

+#pragma pack()

+

+#define SMM_COMMUNICATE_HEADER_SIZE  (OFFSET_OF (EFI_SMM_COMMUNICATE_HEADER, 
Data))

+#define SMM_COMM_RWE_FLASH_SIZE  (OFFSET_OF (SMM_COMM_RWE_FLASH, Buffer))

+

+/**

+  Read data from flash device.

+

+  @param[in]  FlashAddressPhysical flash address.

+  @param[in]  NumBytesNumber in Byte.

+  @param[out] Buffer  Buffer contain the read data.

+

+  @retval EFI_SUCCESS Read successfully.

+  @retval EFI_INVALID_PARAMETER   Invalid parameter.

+  @retval others  Some error occurs when executing 
this routine.

+

+**/

+EFI_STATUS

+EFIAPI

+SfuProtocolFlashFdRead (

+  IN  UINTN  FlashAddress,

+  IN  UINTN  NumBytes,

+  OUT VOID   *Buffer

+  );

+

+/**

+  Erase flash region according to input in a block size.

+

+  @param[in] FlashAddress Physical flash address.

+  @param[in] NumBytes Number in Byte, a block size in 
flash device.

+

+  @retval EFI_SUCCESS Erase successfully.

+  @retval EFI_INVALID_PARAMETER   Invalid parameter.

+  @retval others  Some error occurs when executing 
this routine.

+

+**/

+EFI_STATUS

+EFIAPI

+SfuProtocolFlashFdErase (

+  IN  UINTN  

[edk2-devel] [PATCH 07/33] AMD/VanGoghBoard: Check in PciPlatform

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

BIOS detects current IGPU device ID and install corresponding VBIOS.

Inital PciPlatform module to load VBIOS and to provide interface for

other option ROMs if necessary.



Signed-off-by: Duke Zhai 

Cc: Eric Xing 

Cc: Ken Yao 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../Include/Protocol/GlobalNvsArea.h  |  70 ++

 .../PciPlatform/CommonHeader.h|  43 

 .../PciPlatform/PciPlatform.c | 199 ++

 .../PciPlatform/PciPlatform.h | 105 +

 .../PciPlatform/PciPlatform.inf   |  66 ++

 5 files changed, 483 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Include/Protocol/GlobalNvsArea.h

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/CommonHeader.h

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.c

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.h

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.inf



diff --git 
a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Include/Protocol/GlobalNvsArea.h 
b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Include/Protocol/GlobalNvsArea.h

new file mode 100644

index 00..0c5077f417

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Include/Protocol/GlobalNvsArea.h

@@ -0,0 +1,70 @@

+/** @file

+  GlobalNvsArea.h

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+**/

+/* This file includes code originally published under the following license. */

+

+/** @file

+Definition of the global NVS area protocol.  This protocol

+publishes the address and format of a global ACPI NVS buffer

+used as a communications buffer between SMM code and ASL code.

+The format is derived from the ACPI reference code, version 0.95.

+Note:  Data structures defined in this protocol are not naturally aligned.

+

+Copyright (c) 2013-2015 Intel Corporation.

+

+SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef _GLOBAL_NVS_AREA_H_

+#define _GLOBAL_NVS_AREA_H_

+

+//

+// Includes

+//

+#define GLOBAL_NVS_DEVICE_ENABLE   1

+#define GLOBAL_NVS_DEVICE_DISABLE  0

+

+//

+// Global NVS Area Protocol GUID

+//

+#define EFI_GLOBAL_NVS_AREA_PROTOCOL_GUID \

+{ 0x74e1e48, 0x8132, 0x47a1, {0x8c, 0x2c, 0x3f, 0x14, 0xad, 0x9a, 0x66, 0xdc} }

+

+//

+// Revision id - Added TPM related fields

+//

+#define GLOBAL_NVS_AREA_RIVISION_1  1

+

+//

+// Extern the GUID for protocol users.

+//

+extern EFI_GUID  gEfiGlobalNvsAreaProtocolGuid;

+

+//

+// Global NVS Area definition

+//

+#pragma pack (1)

+typedef struct {

+  //

+  // Miscellaneous Dynamic Values, the definitions below need to be matched

+  // GNVS definitions in Platform.ASL

+  //

+  UINT32TopOfMem;   // TOPM

+  UINT8 NbIoApic;   // NAPC

+  UINT32PcieBaseAddress;// PCBA

+  UINT32PcieBaseLimit;  // PCBL

+} EFI_GLOBAL_NVS_AREA;

+#pragma pack ()

+

+//

+// Global NVS Area Protocol

+//

+typedef struct _EFI_GLOBAL_NVS_AREA_PROTOCOL {

+  EFI_GLOBAL_NVS_AREA*Area;

+} EFI_GLOBAL_NVS_AREA_PROTOCOL;

+

+#endif

diff --git 
a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/CommonHeader.h 
b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/CommonHeader.h

new file mode 100644

index 00..430d9f51dc

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/CommonHeader.h

@@ -0,0 +1,43 @@

+/** @file

+  Implements CommonHeader.h

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+/* This file includes code originally published under the following license. */

+

+/** @file

+Common header file shared by all source files.

+

+This file includes package header files, library classes and protocol, PPI & 
GUID definitions.

+

+Copyright (c) 2013-2015 Intel Corporation.

+

+This  program and the accompanying materials

+are licensed and made available under the terms and conditions of the BSD 
License

+which accompanies this distribution.  The full text of the license may be 
found at

+http://opensource.org/licenses/bsd-license.php

+

+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+**/

+

+#ifndef __COMMON_HEADER_H_

+#define __COMMON_HEADER_H_

+

+#include 

+

+#include 

+#include 

+

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+

+#endif

diff --git 
a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.c 
b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.c

new file mode 100644

index 00..733d334075

--- /dev/null

+++ 

[edk2-devel] [PATCH 06/33] AMD/VanGoghBoard: Check in AmdIdsExtLib

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

A small part of Chachani platform code and FSPWrapperPkg needs IdsHookExtLib.

Initial AmdIdsHookExtLibNull for ChachaniBoardPkg module.



Signed-off-by: Ken Yao 

Cc: Duke Zhai 

Cc: Eric Xing 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../AmdIdsExtLibNull/AmdIdsHookExtLibNull.c   | 33 

 .../AmdIdsExtLibNull/AmdIdsHookExtLibNull.inf | 39 +++

 2 files changed, 72 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/AmdIdsExtLibNull/AmdIdsHookExtLibNull.c

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/AmdIdsExtLibNull/AmdIdsHookExtLibNull.inf



diff --git 
a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/AmdIdsExtLibNull/AmdIdsHookExtLibNull.c
 
b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/AmdIdsExtLibNull/AmdIdsHookExtLibNull.c

new file mode 100644

index 00..f59b5beea1

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/AmdIdsExtLibNull/AmdIdsHookExtLibNull.c

@@ -0,0 +1,33 @@

+/** @file

+  Implements AmdIdsHookExtLibNull.c

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#include 

+#include 

+

+typedef enum {

+  IDS_HOOK_UNSUPPORTED = 1

+} IDS_HOOK_STATUS;

+

+IDS_HOOK_STATUS

+IdsHookExtEntry (

+  UINT32  HookId,

+  VOID*Handle,

+  VOID*Data

+  )

+{

+  return IDS_HOOK_UNSUPPORTED;

+}

+

+IDS_HOOK_STATUS

+GetIdsNvTable (

+  IN OUT   VOID*IdsNvTable,

+  IN OUT   UINT32  *IdsNvTableSize

+  )

+{

+  return IDS_HOOK_UNSUPPORTED;

+}

diff --git 
a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/AmdIdsExtLibNull/AmdIdsHookExtLibNull.inf
 
b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/AmdIdsExtLibNull/AmdIdsHookExtLibNull.inf

new file mode 100644

index 00..354c19dd19

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/AmdIdsExtLibNull/AmdIdsHookExtLibNull.inf

@@ -0,0 +1,39 @@

+## @file

+#  Amd Ids Hook Ext Lib Module INF file

+#

+# Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+# SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+##

+

+[Defines]

+  INF_VERSION= 0x00010006

+  BASE_NAME  = AmdIdsHookExtLibNull.inf

+  FILE_GUID  = CB364A1C-793D-46CE-B80A-0AB5FCB16D76

+  MODULE_TYPE= BASE

+  VERSION_STRING = 1.0

+  LIBRARY_CLASS  = AmdIdsHookExtLib

+

+[Sources.common]

+  AmdIdsHookExtLibNull.c

+

+[Packages]

+  MdePkg/MdePkg.dec

+

+[LibraryClasses]

+

+[Guids]

+

+[Protocols]

+

+[Ppis]

+

+[FeaturePcd]

+

+[Pcd]

+

+[Depex]

+  TRUE

+

+[BuildOptions]

+

--

2.31.1





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[edk2-devel] [PATCH 09/33] AMD/VanGoghBoard: Check in Flash_AB

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Chachani board supports AB recovery function.

Initial Flash_AB module to create AB recovery header in BIOS binary.



Signed-off-by: Duke Zhai 

Cc: Eric Xing 

Cc: Ken Yao 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../ImageSlotHeader/ImageSlotHeader_1.inf | 34 

 .../ImageSlotHeader/ImageSlotHeader_1.nasmb   | 18 +

 .../ImageSlotHeader/ImageSlotHeader_2.inf | 34 

 .../ImageSlotHeader/ImageSlotHeader_2.nasmb   | 18 +

 .../Flash_AB/NewEFS/NewEFS.inf| 26 

 .../Flash_AB/NewEFS/NewEFS.nasmb  | 40 +++

 .../PspL1Directory/PspL1Directory.inf | 38 ++

 .../PspL1Directory/PspL1Directory.nasmb   | 28 +

 8 files changed, 236 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Flash_AB/ImageSlotHeader/ImageSlotHeader_1.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Flash_AB/ImageSlotHeader/ImageSlotHeader_1.nasmb

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Flash_AB/ImageSlotHeader/ImageSlotHeader_2.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Flash_AB/ImageSlotHeader/ImageSlotHeader_2.nasmb

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Flash_AB/NewEFS/NewEFS.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Flash_AB/NewEFS/NewEFS.nasmb

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Flash_AB/PspL1Directory/PspL1Directory.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Flash_AB/PspL1Directory/PspL1Directory.nasmb



diff --git 
a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Flash_AB/ImageSlotHeader/ImageSlotHeader_1.inf
 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Flash_AB/ImageSlotHeader/ImageSlotHeader_1.inf

new file mode 100644

index 00..61184ca544

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Flash_AB/ImageSlotHeader/ImageSlotHeader_1.inf

@@ -0,0 +1,34 @@

+## @file

+#  ImageSlotHeader_1

+#

+# Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+# SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+##

+

+[Defines]

+  INF_VERSION= 0x00010005

+  BASE_NAME  = ImageSlotHeader_1

+  FILE_GUID  = 3FAD5469-976C-4BBB-8127-43D536A71356

+  MODULE_TYPE= SEC

+  VERSION_STRING = 1.1

+

+#

+# The following information is for reference only and not required by the 
build tools.

+#

+#  VALID_ARCHITECTURES   = IA32 X64

+#

+

+[Sources]

+  ImageSlotHeader_1.nasmb

+

+[Packages]

+  MdePkg/MdePkg.dec

+  ChachaniBoardPkg/Project.dec

+

+[Pcd]

+  gPlatformPkgTokenSpaceGuid.PcdFlashAbImageSlotImageSize

+  gPlatformPkgTokenSpaceGuid.PcdFlashAbImageSlotDefaultPriority

+  gPlatformPkgTokenSpaceGuid.PcdFlashAbImageSlotUpdateRetries

+  gPlatformPkgTokenSpaceGuid.PcdFlashAbImageSlotGlitchRetry

+  gPlatformPkgTokenSpaceGuid.PcdFlashAbImageSlot1Base

\ No newline at end of file

diff --git 
a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Flash_AB/ImageSlotHeader/ImageSlotHeader_1.nasmb
 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Flash_AB/ImageSlotHeader/ImageSlotHeader_1.nasmb

new file mode 100644

index 00..6b57199f2f

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Flash_AB/ImageSlotHeader/ImageSlotHeader_1.nasmb

@@ -0,0 +1,18 @@

+;/** @file

+; ImageSlotHeader_1

+;

+; Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+; SPDX-License-Identifier: BSD-2-Clause-Patent

+;

+;**/

+

+BITS16

+

+ALIGN   16

+

+ImageSlotHeader:

+  DD FixedPcdGet32 (PcdFlashAbImageSlotDefaultPriority) ; Priority

+  DD FixedPcdGet32 (PcdFlashAbImageSlotUpdateRetries)   ; UpdateRetries  - 
[2^(n+1) - 1]

+  DD FixedPcdGet32 (PcdFlashAbImageSlotGlitchRetry) ; GlitchRetry

+  DD FixedPcdGet32 (PcdFlashAbImageSlot1Base)   ; Location of 
IMAGES_SLOT No.

+  ; Enhanced Structure

diff --git 
a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Flash_AB/ImageSlotHeader/ImageSlotHeader_2.inf
 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Flash_AB/ImageSlotHeader/ImageSlotHeader_2.inf

new file mode 100644

index 00..df23e3d8fd

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Flash_AB/ImageSlotHeader/ImageSlotHeader_2.inf

@@ -0,0 +1,34 @@

+## @file

+#  ImageSlotHeader_2

+#

+# Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+# SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+##

+

+[Defines]

+  INF_VERSION= 0x00010005

+  BASE_NAME  = ImageSlotHeader_2

+  FILE_GUID  = 889470B2-F0EC-456b-9D23-5379959AB561

+  MODULE_TYPE= SEC

+  VERSION_STRING = 1.1

+

+#

+# The following information is for reference only and not required by the 

[edk2-devel] [PATCH 05/33] AMD/VanGoghBoard: Check in PlatformSecLib

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Chachani board jump to PlatformSec function after x86 releasing.

This module provides the SEC entry function, which does platform-related

early initialization.



Signed-off-by: Ken Yao 

Cc: Duke Zhai 

Cc: Eric Xing 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../Library/PlatformSecLib/Ia32/Flat32.nasm   | 551 ++

 .../Library/PlatformSecLib/Ia32/Platform.inc  |  69 +++

 .../Library/PlatformSecLib/PlatformSecLib.c   | 208 +++

 .../Library/PlatformSecLib/PlatformSecLib.inf |  68 +++

 .../PlatformSecLib/PlatformSecLibModStrs.uni  |  28 +

 5 files changed, 924 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/PlatformSecLib/Ia32/Flat32.nasm

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/PlatformSecLib/Ia32/Platform.inc

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/PlatformSecLib/PlatformSecLib.c

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/PlatformSecLib/PlatformSecLib.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/PlatformSecLib/PlatformSecLibModStrs.uni



diff --git 
a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/PlatformSecLib/Ia32/Flat32.nasm
 
b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/PlatformSecLib/Ia32/Flat32.nasm

new file mode 100644

index 00..b11f45768c

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/PlatformSecLib/Ia32/Flat32.nasm

@@ -0,0 +1,551 @@

+;/** @file

+; AMD VanGoghBoard PlatformSecLib

+;

+; Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+; SPDX-License-Identifier: BSD-2-Clause-Patent

+;

+;**/

+

+; This file includes code originally published under the following license.

+;--

+;

+; Copyright (c) 2013-2015 Intel Corporation.

+;

+; SPDX-License-Identifier: BSD-2-Clause-Patent

+;

+; Module Name:

+;

+;  Flat32.asm

+;

+; Abstract:

+;

+;  This is the code that goes from real-mode to protected mode.

+;  It consumes the reset vector, configures the stack.

+;

+;

+;--

+

+

+;

+; Include processor definitions

+;

+%use masm

+

+

+%include "Platform.inc"

+

+;

+; CR0 cache control bit definition

+;

+CR0_CACHE_DISABLE   EQU 04000h

+CR0_NO_WRITEEQU 02000h

+BSP_STACK_BASE_ADDR EQU FixedPcdGet32 
(PcdPeiCorePeiPreMemoryStackBaseAddress) ; Base address for core 0 stack

+PRE_MEM_STACK_SIZE  EQU FixedPcdGet32 (PcdPeiCorePeiPreMemoryStackSize)

+PCIEX_LENGTH_BIT_SETTING EQU 011000b

+

+MSR_IA32_EFER   EQU  0c080h   ; Extended Feature Enable 
Register

+MSR_IA32_EFER_LME   EQU  8; Long Mode Enable

+

+MSR_SMM_BASEEQU  0c0010111h   ; SMBASE Register

+

+SMM_BASE_DEFAULTEQU  3h   ; reset value of MSR MSR_SMM_BASE

+

+SMMMASK_ADDRESS EQU  0c0010113h   ; SMM TSeg Base Address

+SMMMASK_ADDRESS_AE  EQU  0; Aseg Address Range Enable

+SMMMASK_ADDRESS_TE  EQU  1; Tseg Address Range Enable

+

+;

+; In Modified Conventional Resume S3 Design:

+;   With Modified Conventional Resume path, the x86 resumes from sleep,

+; begins executing code from a predefined SMM resume vector and then

+; jump to ROM code to continue conventional resume.

+; EDX is filled with special signature "0x55AABB66" when jump to Sec,

+; this signature can be used to identify if resume back from SMM resume.

+;

+SMM_RESUME_SIGNATUREEQU  055AABB66h

+

+PCAT_RTC_ADDRESS_REGISTER  EQU  0x70

+PCAT_RTC_DATA_REGISTER EQU  0x71

+

+NMI_DISABLE_BIT EQU  0x80

+

+RTC_ADDRESS_REGISTER_A  EQU  0x0A  ; R/W[0..6]  R0[7]

+RTC_ADDRESS_REGISTER_B  EQU  0x0B  ; R/W

+RTC_ADDRESS_REGISTER_C  EQU  0x0C  ; RO

+RTC_ADDRESS_REGISTER_D  EQU  0x0D  ; R/W

+

+;

+; External and public declarations

+;  TopOfStack is used by C code

+;  SecStartup is the entry point to the C code

+; Neither of these names can be modified without

+; updating the C code.

+;

+extern   ASM_PFX(SecStartup)

+

+SECTION .text

+;

+; Protected mode portion initializes stack, configures cache, and calls C 
entry point

+;

+

+;

+;

+; Procedure:ProtectedModeEntryPoint

+;

+; Input:Executing in 32 Bit Protected (flat) mode

+;cs: 0-4GB

+;ds: 0-4GB

+;es: 0-4GB

+;fs: 0-4GB

+;gs: 0-4GB

+;ss: 0-4GB

+;

+; Output:   This function never returns

+;

+; Destroys:

+;   ecx

+;   edi

+;esi

+;esp

+;

+; Description:

+;Perform any essential early platform initilaisation

+; 

[edk2-devel] [PATCH 08/33] AMD/VanGoghBoard: Check in UDKFlashUpdate

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

UDKFlashUpdate is a uefi tool for BIOS binary updating. It depends on EDK2's 
flash access protocol.

UDKFlashUpdate needs to run under EDK2 BIOS.



Signed-off-by: Duke Zhai 

Cc: Eric Xing 

Cc: Ken Yao 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../UDKFlashUpdate/SpiFlashDevice.c   |  37 +

 .../UDKFlashUpdate/SpiFlashDevice.h   |  62 ++

 .../UDKFlashUpdate/UDKFlashUpdate.c   | 679 ++

 .../UDKFlashUpdate/UDKFlashUpdate.h   |  48 ++

 .../UDKFlashUpdate/UDKFlashUpdate.inf |  51 ++

 5 files changed, 877 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Application/UDKFlashUpdate/SpiFlashDevice.c

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Application/UDKFlashUpdate/SpiFlashDevice.h

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Application/UDKFlashUpdate/UDKFlashUpdate.c

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Application/UDKFlashUpdate/UDKFlashUpdate.h

 create mode 100644 
Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Application/UDKFlashUpdate/UDKFlashUpdate.inf



diff --git 
a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Application/UDKFlashUpdate/SpiFlashDevice.c
 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Application/UDKFlashUpdate/SpiFlashDevice.c

new file mode 100644

index 00..d4f5b12f41

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Application/UDKFlashUpdate/SpiFlashDevice.c

@@ -0,0 +1,37 @@

+/** @file

+  Implements SpiFlashDevice.c

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#include "SpiFlashDevice.h"

+

+SPI_INIT_TABLE  mSpiInitTable[] = {

+  { // W25Q256JW/W74M25JW

+SF_VENDOR_ID_WINBOND,

+SF_DEVICE_ID0_W25Q256JW,

+SF_DEVICE_ID1_W25Q256JW,

+{

+  SPI_COMMAND_WRITE_ENABLE,

+  SPI_COMMAND_WRITE_S_EN

+},

+{

+  { EnumSpiOpcodeReadNoAddr,SPI_COMMAND_JEDEC_ID,  
EnumSpiOperationJedecId},

+  { EnumSpiOpcodeWriteNoAddr,SPI_COMMAND_WRITE_S,   
EnumSpiOperationWriteStatus},

+  { EnumSpiOpcodeWrite,SPI_COMMAND_WRITE, 
EnumSpiOperationProgramData_1_Byte },

+  { EnumSpiOpcodeRead, SPI_COMMAND_READ,  
EnumSpiOperationReadData   },

+  { EnumSpiOpcodeWrite,SPI_COMMAND_ERASE, 
EnumSpiOperationErase_4K_Byte  },

+  { EnumSpiOpcodeReadNoAddr,SPI_COMMAND_READ_S,
EnumSpiOperationReadStatus },

+  { EnumSpiOpcodeWriteNoAddr,SPI_COMMAND_CHIP_ERASE,
EnumSpiOperationFullChipErase  },

+  { EnumSpiOpcodeRead, SPI_COMMAND_READ_SFDP, 
EnumSpiOperationReadData   },

+  { EnumSpiOpcodeWriteNoAddr,SPI_COMMAND_RPMC_OP1,  
EnumSpiOperationOther  },

+  { EnumSpiOpcodeReadNoAddr,SPI_COMMAND_RPMC_OP2,  
EnumSpiOperationReadData   },

+  { EnumSpiOpcodeReadNoAddr,SPI_COMMAND_Enter_4Byte_Addr,  
EnumSpiOperationOther  },

+  { EnumSpiOpcodeReadNoAddr,SPI_COMMAND_Exit_4Byte_Addr,   
EnumSpiOperationOther  }

+},

+0,

+0x200   // BIOS image size in flash

+  }

+};

diff --git 
a/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Application/UDKFlashUpdate/SpiFlashDevice.h
 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Application/UDKFlashUpdate/SpiFlashDevice.h

new file mode 100644

index 00..8846eb5381

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/VanGoghCommonPkg/Application/UDKFlashUpdate/SpiFlashDevice.h

@@ -0,0 +1,62 @@

+/** @file

+  Implements SpiFlashDevice.h

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef _SPI_FLASH_DEVICE_H_

+#define _SPI_FLASH_DEVICE_H_

+

+#include 

+#include 

+#include 

+

+//

+// Supported SPI Flash Devices

+//

+typedef enum {

+  EnumSpiFlashW25Q256JW,

+  EnumSpiFlashMax

+} SPI_FLASH_TYPES_SUPPORTED;

+

+// Flash Device commands

+//

+// If a supported device uses a command different from the list below, a 
device specific command

+// will be defined just below it's JEDEC id section.

+//

+#define SPI_COMMAND_WRITE 0x02

+#define SPI_COMMAND_WRITE_AAI 0xAD

+#define SPI_COMMAND_READ  0x03

+#define SPI_COMMAND_ERASE 0x20

+#define SPI_COMMAND_WRITE_DISABLE 0x04

+#define SPI_COMMAND_READ_S0x05

+#define SPI_COMMAND_WRITE_ENABLE  0x06

+#define SPI_COMMAND_READ_ID   0xAB

+#define SPI_COMMAND_JEDEC_ID  0x9F

+#define SPI_COMMAND_WRITE_S_EN0x50

+#define SPI_COMMAND_WRITE_S   0x01

+#define SPI_COMMAND_CHIP_ERASE0xC7

+#define SPI_COMMAND_BLOCK_ERASE   0xD8

+#define SPI_COMMAND_READ_SFDP 0x5A

+#define SPI_COMMAND_RPMC_OP1  0x9B

+#define 

[edk2-devel] [PATCH 03/33] AMD/VanGoghBoard: Check in Capsule update

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Chachani board supports "Capsule on Disk (CoD)" feature defined in UEFI

Spec chapter 8.5.5 "Delivery of Capsules via file on Mass Storage Device".

The BIOS capsule image is saved in hard disk as default setting.



Signed-off-by: Ken Yao 

Cc: Duke Zhai 

Cc: Eric Xing 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../SystemFirmwareDescriptor.aslc |   99 ++

 .../SystemFirmwareDescriptor.inf  |   53 +

 .../SystemFirmwareDescriptorPei.c |   78 ++

 .../Include/Library/CapsuleHookLib.h  |   40 +

 .../Capsule/CapsuleHookLib/CapsuleHookLib.c   | 1153 +

 .../Capsule/CapsuleHookLib/CapsuleHookLib.inf |   56 +

 .../PlatformBootManager.c |  803 

 .../PlatformBootManager.h |  159 +++

 .../PlatformBootManagerLib.inf|   96 ++

 .../PlatformBootManagerLib/PlatformConsole.c  |  504 +++

 .../PlatformBootManagerLib/PlatformConsole.h  |   78 ++

 .../PlatformBootManagerLib/PlatformData.c |   48 +

 .../CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf   |  122 ++

 .../CapsuleRuntimeDxe/CapsuleService.c|  470 +++

 .../CapsuleRuntimeDxe/CapsuleService.h|   82 ++

 15 files changed, 3841 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Include/Library/CapsuleHookLib.h

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/CapsuleHookLib/CapsuleHookLib.c

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/CapsuleHookLib/CapsuleHookLib.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/PlatformBootManagerLib/PlatformBootManager.c

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/PlatformBootManagerLib/PlatformBootManager.h

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/PlatformBootManagerLib/PlatformBootManagerLib.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/PlatformBootManagerLib/PlatformConsole.c

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/PlatformBootManagerLib/PlatformConsole.h

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Library/Capsule/PlatformBootManagerLib/PlatformData.c

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleService.c

 create mode 100644 
Platform/AMD/VanGoghBoard/Override/edk2/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleService.h



diff --git 
a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc
 
b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc

new file mode 100644

index 00..af73e846fc

--- /dev/null

+++ 
b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc

@@ -0,0 +1,99 @@

+/** @file

+  System firmware Descriptor file

+

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+/* This file includes code originally published under the following license. */

+

+/** @file

+  System Firmware descriptor.

+

+  Copyright (c) 2017, Intel Corporation. All rights reserved.

+  This program and the accompanying materials

+  are licensed and made available under the terms and conditions of the BSD 
License

+  which accompanies this distribution.  The full text of the license may be 
found at

+  http://opensource.org/licenses/bsd-license.php

+

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/

+

+#include 

+#include 

+#include 

+

+#define PACKAGE_VERSION 0x

+#define PACKAGE_VERSION_STRING  L"Unknown"

+

+#define CURRENT_FIRMWARE_VERSION0x3818

+#define CURRENT_FIRMWARE_VERSION_STRING L"3818"

+#define LOWEST_SUPPORTED_FIRMWARE_VERSION   0x0001

+

+#define IMAGE_IDSIGNATURE_64('C', 'H', 'A', 'C', 
'H', 'A','N','I')

+#define IMAGE_ID_STRING L"ChachaniFD"

+

+// PcdSystemFmpCapsuleImageTypeIdGuid

+#define IMAGE_TYPE_ID_GUID  { 0x38663fe6, 0x934f, 0x42a1, { 
0xbc, 0xb0, 0xf7, 0x9e, 

[edk2-devel] [PATCH 02/33] AMD/VanGoghBoard: Check in ACPI tables

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

This module creates ACPI trunk tables for Chachani board, e.g.: DSDT table,FADT 
table.



Signed-off-by: Eric Xing 

Cc: Duke Zhai 

Cc: Ken Yao 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../Acpi/AcpiTables/AcpiTables.inf|  33 +

 .../Acpi/AcpiTables/Dsdt/CPU.asl  |  22 +

 .../Acpi/AcpiTables/Dsdt/Dsdt.asl |  36 +

 .../Acpi/AcpiTables/Dsdt/FchShang.asi | 927 ++

 .../Acpi/AcpiTables/Dsdt/GloblNvs.asl |  17 +

 .../Acpi/AcpiTables/Dsdt/HOST_BUS.ASL | 209 

 .../Acpi/AcpiTables/Dsdt/LINK.ASL | 481 +

 .../Acpi/AcpiTables/Dsdt/Lpc0.asl | 168 

 .../Acpi/AcpiTables/Dsdt/PciTree.asl  | 776 +++

 .../Acpi/AcpiTables/Dsdt/Platform.asl | 135 +++

 .../Acpi/AcpiTables/Dsdt/_PR.asl  |  36 +

 .../Acpi/AcpiTables/Facs/Facs.h   |  45 +

 .../Acpi/AcpiTables/Facs/Facs50.aslc  |  68 ++

 .../Acpi/AcpiTables/Fadt/Fadt.h   |  65 ++

 .../Acpi/AcpiTables/Fadt/Fadt50.aslc  | 159 +++

 .../Acpi/AcpiTables/Hpet/Hpet.h   |  71 ++

 .../Acpi/AcpiTables/Hpet/Hpet50.aslc  |  58 ++

 .../Acpi/AcpiTables/Madt/Madt.h   | 138 +++

 .../Acpi/AcpiTables/Madt/Madt50.aslc  | 327 ++

 .../Acpi/AcpiTables/Mcfg/Mcfg.h   |  75 ++

 .../Acpi/AcpiTables/Mcfg/Mcfg50.aslc  |  61 ++

 21 files changed, 3907 insertions(+)

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/AcpiTables.inf

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Dsdt/CPU.asl

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Dsdt/Dsdt.asl

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Dsdt/FchShang.asi

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Dsdt/GloblNvs.asl

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Dsdt/HOST_BUS.ASL

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Dsdt/LINK.ASL

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Dsdt/Lpc0.asl

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Dsdt/PciTree.asl

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Dsdt/Platform.asl

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Dsdt/_PR.asl

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Facs/Facs.h

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Facs/Facs50.aslc

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Fadt/Fadt.h

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Fadt/Fadt50.aslc

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Hpet/Hpet.h

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Hpet/Hpet50.aslc

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Madt/Madt.h

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Madt/Madt50.aslc

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Mcfg/Mcfg.h

 create mode 100644 
Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Mcfg/Mcfg50.aslc



diff --git 
a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/AcpiTables.inf 
b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/AcpiTables.inf

new file mode 100644

index 00..082422420e

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/AcpiTables.inf

@@ -0,0 +1,33 @@

+## @file

+# Acpi Platform Dxe driver

+#

+# Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+# SPDX-License-Identifier: BSD-2-Clause-Patent

+##

+

+[Defines]

+  INF_VERSION= 0x00010005

+  BASE_NAME  = AcpiTables

+  FILE_GUID  = 7E374E25-8E01-4FEE-87F2-390C23C606CD

+  MODULE_TYPE= USER_DEFINED

+  VERSION_STRING = 1.0

+

+#

+# The following information is for reference only and not required by the 
build tools.

+#

+#  VALID_ARCHITECTURES   = IA32 X64 IPF EBC

+#

+

+[Sources]

+  Fadt/Fadt50.aslc

+  Facs/Facs50.aslc

+  Hpet/Hpet50.aslc

+  Madt/Madt50.aslc

+  Mcfg/Mcfg50.aslc

+  Dsdt/Dsdt.asl

+

+[Packages]

+  MdePkg/MdePkg.dec

+

+[Pcd]

+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress

\ No newline at end of file

diff --git 
a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Dsdt/CPU.asl 
b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Acpi/AcpiTables/Dsdt/CPU.asl

new file mode 100644

index 00..485fb4ec40

--- /dev/null

+++ 

[edk2-devel] [PATCH 04/33] AMD/VanGoghBoard: Check in AgesaPublic pkg

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

Chachani board platform code depends on some AGESA-related PCDs/GUIDs.

Add AgesaPublicPkg for AGESA-related PCDs/GUIDs to support platfrom build.



Signed-off-by: Duke Zhai 

Cc: Eric Xing 

Cc: Ken Yao 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../VanGoghBoard/AgesaPublic/AgesaPublic.dec  |  61 +

 .../VanGoghBoard/AgesaPublic/Include/AGESA.h  |  35 +++

 .../VanGoghBoard/AgesaPublic/Include/AMD.h| 189 +

 .../AgesaPublic/Include/AmdPspDirectory.h |  55 

 .../AgesaPublic/Include/FchRegistersCommon.h  |  23 ++

 .../Include/Guid/AmdMemoryInfoHob.h   |  51 

 .../Include/Library/AmdPspBaseLibV2.h | 248 ++

 .../Include/Library/AmdPspCommonLib.h |  29 ++

 .../Include/Library/AmdPspFtpmLib.h   |  94 +++

 .../AgesaPublic/Include/Ppi/AmdPspFtpmPpi.h   |  80 ++

 .../Include/Protocol/AmdPspFtpmProtocol.h | 112 

 11 files changed, 977 insertions(+)

 create mode 100644 Platform/AMD/VanGoghBoard/AgesaPublic/AgesaPublic.dec

 create mode 100644 Platform/AMD/VanGoghBoard/AgesaPublic/Include/AGESA.h

 create mode 100644 Platform/AMD/VanGoghBoard/AgesaPublic/Include/AMD.h

 create mode 100644 
Platform/AMD/VanGoghBoard/AgesaPublic/Include/AmdPspDirectory.h

 create mode 100644 
Platform/AMD/VanGoghBoard/AgesaPublic/Include/FchRegistersCommon.h

 create mode 100644 
Platform/AMD/VanGoghBoard/AgesaPublic/Include/Guid/AmdMemoryInfoHob.h

 create mode 100644 
Platform/AMD/VanGoghBoard/AgesaPublic/Include/Library/AmdPspBaseLibV2.h

 create mode 100644 
Platform/AMD/VanGoghBoard/AgesaPublic/Include/Library/AmdPspCommonLib.h

 create mode 100644 
Platform/AMD/VanGoghBoard/AgesaPublic/Include/Library/AmdPspFtpmLib.h

 create mode 100644 
Platform/AMD/VanGoghBoard/AgesaPublic/Include/Ppi/AmdPspFtpmPpi.h

 create mode 100644 
Platform/AMD/VanGoghBoard/AgesaPublic/Include/Protocol/AmdPspFtpmProtocol.h



diff --git a/Platform/AMD/VanGoghBoard/AgesaPublic/AgesaPublic.dec 
b/Platform/AMD/VanGoghBoard/AgesaPublic/AgesaPublic.dec

new file mode 100644

index 00..e987b9b603

--- /dev/null

+++ b/Platform/AMD/VanGoghBoard/AgesaPublic/AgesaPublic.dec

@@ -0,0 +1,61 @@

+## @file

+# EDK II AgesaPublic.dec file

+#

+# Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+# SPDX-License-Identifier: BSD-2-Clause-Patent

+##

+

+[Defines]

+  DEC_SPECIFICATION  = 0x00010005

+  PACKAGE_NAME   = AgesaPublic

+  PACKAGE_GUID   = EA54B0FA-908C-43DE-95A5-5E821A893CA4

+  PACKAGE_VERSION= 0.1

+

+[Includes]

+  Include

+

+[Guids]

+  gEfiAmdAgesaModulePkgTokenSpaceGuid  = { 0x7788adf0, 0x9788, 0x4a3f, { 
0x83, 0xfa, 0xcb, 0x51, 0x2e, 0x7c, 0xf8, 0xdd } }

+  gEfiAmdAgesaPkgTokenSpaceGuid= { 0xd4d8435f, 0xfffb, 0x4acb, { 
0xa0, 0x4d, 0xff, 0x0f, 0xad, 0x67, 0x7f, 0xe9 } }

+  gAmdCpmPkgTokenSpaceGuid = { 0x916e0ddd, 0x2bd2, 0x4704, { 
0x93, 0xb9, 0x59, 0x4b, 0x01, 0xa5, 0xfa, 0x9f } }

+  gAmdResourceSizeForEachRbGuid= { 0x542b8f2f, 0xbd52, 0x4233, { 
0x8c, 0x3d, 0x66, 0x53, 0x0d, 0xe8, 0xa3, 0x69 } }

+  gAmdPbsSystemConfigurationGuid   = { 0xa339d746, 0xf678, 0x49b3, { 
0x9f, 0xc7, 0x54, 0xce, 0x0f, 0x9d, 0xf2, 0x26 } }

+  gAmdTotalNumberOfRootBridgesGuid = { 0xfb5703f5, 0xf8a7, 0xf401, { 
0x18, 0xb4, 0x3f, 0x10, 0x8d, 0xeb, 0x26, 0x12 } }

+  gApSyncFlagNvVariableGuid= { 0xad3f6761, 0xf0a3, 0x46c8, { 
0xa4, 0xcb, 0x19, 0xb7, 0x0f, 0xfd, 0xb3, 0x05 } }

+  gAmdMemoryInfoHobGuid= { 0x1bce3d14, 0xa5fe, 0x4a0b, { 
0x9a, 0x8d, 0x69, 0xca, 0x5d, 0x98, 0x38, 0xd3 } }

+  gAmdPspApobHobGuid   = { 0x30b174f3, 0x7712, 0x4cca, { 
0xbd, 0x13, 0xd0, 0xb8, 0xa8, 0x80, 0x19, 0x97 } }

+

+[Protocols]

+  gPspFlashAccSmmCommReadyProtocolGuid = { 0x9f373486, 0xda76, 0x4c9f, { 
0x81, 0x55, 0x6c, 0xcd, 0xdb, 0x0b, 0x0b, 0x04 } }

+  gAmdPspFtpmProtocolGuid  = { 0xac234e04, 0xb036, 0x476c, { 
0x91, 0x66, 0xbe, 0x47, 0x52, 0xa0, 0x95, 0x09 } }

+  gFchInitDonePolicyProtocolGuid   = { 0xc63c0c73, 0xf612, 0x4c02, { 
0x84, 0xa3, 0xc6, 0x40, 0xad, 0x0b, 0xa6, 0x22 } }

+  gAmdCapsuleSmmHookProtocolGuid   = { 0x4fc43bbe, 0x1433, 0x4951, { 
0xac, 0x2d, 0x0d, 0x01, 0xfe, 0xc0, 0x0e, 0xb1 } }

+  gAmdCpmAllPciIoProtocolsInstalledProtocolGuid = { 0x676D7012, 0x139B, 
0x485A, { 0x96, 0xF1, 0x98, 0x6F, 0xC4, 0x8A, 0x86, 0x4B } }

+  gAmdFspSetupTableInitDoneGuid= { 0xef5394c6, 0x566d, 0x440f, { 
0x9d, 0x05, 0xc0, 0xa3, 0x2c, 0xb9, 0x33, 0x58 } }

+

+[Ppis]

+  gAmdMemoryInfoHobPpiGuid = { 0xba16e587, 0x1d66, 0x41b7, { 
0x9b, 0x52, 0xca, 0x4f, 0x2c, 0xad, 0x0d, 0xc8 } }

+  gAmdPspFtpmPpiGuid   = { 0x91774185, 0xf72d, 0x467e, { 
0x93, 0x39, 0xe0, 0x08, 0xdb, 0xae, 0x0e, 0x14 } }

+  gAmdPspFtpmFactoryResetPpiGuid   = { 0x9c98130a, 0x8921, 

[edk2-devel] [PATCH 01/33] AMD/AmdPlatformPkg: Check in AMD S3 logo

[duke.zhai via groups.io]

From: Duke Zhai 


BZ #:4640

LogoDxe module displays boot logo.

S3LogoDxe module is based on EDK2 LogoDxe module and update AMD S3 logo.



Signed-off-by: Eric Xing 

Cc: Duke Zhai 

Cc: Ken Yao 

Cc: Igniculus Fu 

Cc: Abner Chang 

---

 .../AmdPlatformPkg/Universal/LogoDxe/Logo.c   | 198 ++

 .../Universal/LogoDxe/S3Logo.bmp  | Bin 0 -> 964114 bytes

 .../Universal/LogoDxe/S3Logo.idf  |   9 +

 .../Universal/LogoDxe/S3LogoDxe.inf   |  55 +

 4 files changed, 262 insertions(+)

 create mode 100644 Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c

 create mode 100644 Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/S3Logo.bmp

 create mode 100644 Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/S3Logo.idf

 create mode 100644 Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/S3LogoDxe.inf



diff --git a/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c 
b/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c

new file mode 100644

index 00..8e3d89380b

--- /dev/null

+++ b/Platform/AMD/AmdPlatformPkg/Universal/LogoDxe/Logo.c

@@ -0,0 +1,198 @@

+/**

+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

+**/

+

+/** @file

+  Logo DXE Driver, install Edk2 Platform Logo protocol.

+

+  Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.

+

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+

+#include "Logo.h"

+

+EFI_HII_IMAGE_EX_PROTOCOL  *mHiiImageEx;

+EFI_HII_HANDLE mHiiHandle;

+LOGO_ENTRY mLogos[] = {

+  {

+IMAGE_TOKEN (IMG_LOGO),

+EdkiiPlatformLogoDisplayAttributeCenter,

+0,

+0

+  }

+};

+

+/**

+  Load a platform logo image and return its data and attributes.

+

+  @param[in]  This  The pointer to this protocol instance.

+  @param[in, out] Instance  The visible image instance is found.

+  @param[out] Image Points to the image.

+  @param[out] Attribute The display attributes of the image 
returned.

+  @param[out] OffsetX   The X offset of the image regarding the 
Attribute.

+  @param[out] OffsetY   The Y offset of the image regarding the 
Attribute.

+

+  @retval EFI_SUCCESSThe image was fetched successfully.

+  @retval EFI_NOT_FOUND  The specified image could not be found.

+  @retval EFI_INVALID_PARAMETER  One of the given input parameters are 
incorrect

+**/

+EFI_STATUS

+EFIAPI

+GetImage (

+  IN EDKII_PLATFORM_LOGO_PROTOCOL*This,

+  IN OUT UINT32  *Instance,

+  OUT EFI_IMAGE_INPUT*Image,

+  OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE  *Attribute,

+  OUT INTN   *OffsetX,

+  OUT INTN   *OffsetY

+  )

+{

+  UINT32  Current;

+

+  if ((Instance == NULL) || (Image == NULL) ||

+  (Attribute == NULL) || (OffsetX == NULL) || (OffsetY == NULL))

+  {

+return EFI_INVALID_PARAMETER;

+  }

+

+  Current = *Instance;

+  if (Current >= ARRAY_SIZE (mLogos)) {

+return EFI_NOT_FOUND;

+  }

+

+  (*Instance)++; // Advance to next logo.

+  *Attribute = mLogos[Current].Attribute;

+  *OffsetX   = mLogos[Current].OffsetX;

+  *OffsetY   = mLogos[Current].OffsetY;

+  return mHiiImageEx->GetImageEx (mHiiImageEx, mHiiHandle, 
mLogos[Current].ImageId, Image);

+}

+

+EDKII_PLATFORM_LOGO_PROTOCOL  mPlatformLogo = {

+  GetImage

+};

+

+// AMD_EDKII_OVERRIDE START

+

+/**

+  After console ready before boot option event callback

+

+  @param[in] Event  The Event this notify function registered to.

+  @param[in] ContextPointer to the context data registered to the Event.

+**/

+VOID

+EFIAPI

+LogoDxeDisplayEventCallback (

+  IN EFI_EVENT  Event,

+  IN VOID   *Context

+  )

+{

+  DEBUG((DEBUG_INFO, "AMD logo is displaying.\n"));

+

+  BootLogoEnableLogo ();

+  gBS->CloseEvent (Event);

+}

+

+/**

+  Entrypoint of this module.

+

+  This function is the entrypoint of this module. It installs the Edkii

+  Platform Logo protocol.

+

+  @param  ImageHandle   The firmware allocated handle for the EFI image.

+  @param  SystemTable   A pointer to the EFI System Table.

+

+  @retval EFI_SUCCESS   The entry point is executed successfully.

+

+**/

+EFI_STATUS

+EFIAPI

+InitializeLogo (

+  IN EFI_HANDLEImageHandle,

+  IN EFI_SYSTEM_TABLE  *SystemTable

+  )

+{

+  EFI_STATUS   Status;

+  EFI_HII_PACKAGE_LIST_HEADER  *PackageList;

+  EFI_HII_DATABASE_PROTOCOL*HiiDatabase;

+  EFI_HANDLE   Handle;

+  EFI_EVENTAfterConsoleReadyBeforeBootOptionEvent;

+

+  Status = gBS->LocateProtocol (

+  ,

+  NULL,

+  (VOID **)

+  );

+  

[edk2-devel] [PATCH 00/33] Introduce AMD Vangogh platform reference code

[duke.zhai via groups.io]

From: Duke Zhai 


This AMD reference platform BIOS supports AMD Vangogh B0 SOC and Chachani board.



Duke Zhai (33):

  AMD/AmdPlatformPkg: Check in AMD S3 logo

  AMD/VanGoghBoard: Check in ACPI tables

  AMD/VanGoghBoard: Check in Capsule update

  AMD/VanGoghBoard: Check in AgesaPublic pkg

  AMD/VanGoghBoard: Check in PlatformSecLib

  AMD/VanGoghBoard: Check in AmdIdsExtLib

  AMD/VanGoghBoard: Check in PciPlatform

  AMD/VanGoghBoard: Check in UDKFlashUpdate

  AMD/VanGoghBoard: Check in Flash_AB

  AMD/VanGoghBoard: Check in FlashUpdate

  AMD/VanGoghBoard: Check in FvbServices

  AMD/VanGoghBoard: Check in AMD BaseSerialPortLib

  AMD/VanGoghBoard: Check in PlatformFlashAccessLib

  AMD/VanGoghBoard: Check in SmbiosLib

  AMD/VanGoghBoard: Check in SpiFlashDeviceLib

  AMD/VanGoghBoard: Check in BaseTscTimerLib

  AMD/VanGoghBoard: Check in Smm access module.

  AMD/VanGoghBoard: Check in PciHostBridge module.

  AMD/VanGoghBoard: Check in PcatRealTimeClockRuntimeDxe module.

  AMD/VanGoghBoard: Check in FTPM module.

  AMD/VanGoghBoard: Check in SignedCapsule.

  AMD/VanGoghBoard: Check in Vtf0.

  AMD/VanGoghBoard: Check in AcpiPlatform.

  AMD/VanGoghBoard: Check in FchSpi module.

  AMD/VanGoghBoard: Check in PlatformInitPei module.

  AMD/VanGoghBoard: Check in Smbios platform dxe drivers.

  AMD/VanGoghBoard: Check in Fsp2WrapperPkg.

  AMD/VanGoghBoard: Check in SmmCpuFeaturesLibCommon module.

  AMD/VanGoghBoard: Check in SmramSaveState module.

  AMD/VanGoghBoard: Check in EDK2 override files.

  AMD/VanGoghBoard: Check in AMD SmmControlPei module

  AMD/VanGoghBoard: Check in Chachani board project files and build

script.

  AMD/VanGoghBoard: Improvement coding style.



 .../AmdPlatformPkg/Universal/LogoDxe/Logo.c   |  198 +

 .../Universal/LogoDxe/S3Logo.bmp  |  Bin 0 -> 964114 bytes

 .../Universal/LogoDxe/S3Logo.idf  |9 +

 .../Universal/LogoDxe/S3LogoDxe.inf   |   55 +

 .../VanGoghBoard/AgesaPublic/AgesaPublic.dec  |   61 +

 .../VanGoghBoard/AgesaPublic/Include/AGESA.h  |   35 +

 .../VanGoghBoard/AgesaPublic/Include/AMD.h|  189 +

 .../AgesaPublic/Include/AmdPspDirectory.h |   55 +

 .../AgesaPublic/Include/FchRegistersCommon.h  |   23 +

 .../Include/Guid/AmdMemoryInfoHob.h   |   51 +

 .../Include/Library/AmdPspBaseLibV2.h |  248 +

 .../Include/Library/AmdPspCommonLib.h |   29 +

 .../Include/Library/AmdPspFtpmLib.h   |   94 +

 .../AgesaPublic/Include/Ppi/AmdPspFtpmPpi.h   |   80 +

 .../Include/Protocol/AmdPspFtpmProtocol.h |  112 +

 .../Acpi/AcpiTables/AcpiTables.inf|   33 +

 .../Acpi/AcpiTables/Dsdt/CPU.asl  |   22 +

 .../Acpi/AcpiTables/Dsdt/Dsdt.asl |   36 +

 .../Acpi/AcpiTables/Dsdt/FchShang.asi |  927 ++

 .../Acpi/AcpiTables/Dsdt/GloblNvs.asl |   17 +

 .../Acpi/AcpiTables/Dsdt/HOST_BUS.ASL |  209 +

 .../Acpi/AcpiTables/Dsdt/LINK.ASL |  481 ++

 .../Acpi/AcpiTables/Dsdt/Lpc0.asl |  168 +

 .../Acpi/AcpiTables/Dsdt/PciTree.asl  |  776 ++

 .../Acpi/AcpiTables/Dsdt/Platform.asl |  135 +

 .../Acpi/AcpiTables/Dsdt/_PR.asl  |   36 +

 .../Acpi/AcpiTables/Facs/Facs.h   |   45 +

 .../Acpi/AcpiTables/Facs/Facs50.aslc  |   68 +

 .../Acpi/AcpiTables/Fadt/Fadt.h   |   64 +

 .../Acpi/AcpiTables/Fadt/Fadt50.aslc  |  159 +

 .../Acpi/AcpiTables/Hpet/Hpet.h   |   70 +

 .../Acpi/AcpiTables/Hpet/Hpet50.aslc  |   58 +

 .../Acpi/AcpiTables/Madt/Madt.h   |  136 +

 .../Acpi/AcpiTables/Madt/Madt50.aslc  |  327 +

 .../Acpi/AcpiTables/Mcfg/Mcfg.h   |   75 +

 .../Acpi/AcpiTables/Mcfg/Mcfg50.aslc  |   61 +

 .../BIOSImageDirectory32M.xml |   63 +

 .../VanGoghBoard/ChachaniBoardPkg/Board.env   |   23 +

 .../ChachaniBoardPkg/BuildPspImage.bat|  126 +

 .../SystemFirmwareDescriptor.aslc |   99 +

 .../SystemFirmwareDescriptor.inf  |   53 +

 .../SystemFirmwareDescriptorPei.c |   78 +

 .../ChachaniBoardPkg/Conf/ReadMe.txt  |   14 +

 .../ChachaniBoardPkg/Conf/build_rule.txt  |  660 ++

 .../ChachaniBoardPkg/Conf/target.txt  |   84 +

 .../ChachaniBoardPkg/Conf/tools_def.txt   | 7583 +

 .../ChachaniBoardPkg/FlashABImage32M.py   |  102 +

 .../ChachaniBoardPkg/GenCapsule.bat   |   81 +

 .../ChachaniBoardPkg/GenFlashABImage.bat  |   39 +

 .../ChachaniBoardPkg/GoZ_ChachaniExt.bat  |   81 +

 .../Include/Library/CapsuleHookLib.h  |   40 +

 .../Include/Protocol/GlobalNvsArea.h  |   70 +

 .../AmdIdsExtLibNull/AmdIdsHookExtLibNull.c   |   33 +

 .../AmdIdsExtLibNull/AmdIdsHookExtLibNull.inf |   39 +

 .../Capsule/CapsuleHookLib/CapsuleHookLib.c   | 1153 +++

 .../Capsule/CapsuleHookLib/CapsuleHookLib.inf |   56 +

 .../PlatformBootManager.c  

Re: [edk2-devel] Memory Attribute for depex section

[Laszlo Ersek]

On 1/19/24 05:43, Nhi Pham wrote:
> On 1/18/2024 9:49 PM, Laszlo Ersek wrote:
> but I'd prefer to just remove this
> optimization from standalone MM, given that not only a) it shouldn't
> have to deal with a large number of protocol GUIDs, but also b) the
> driver dispatch is much more straight-forward. (Typically, StMM
> drivers can be dispatched in the order they appear in the firmware
> volume, in which case each DEPEX is evaluated only once anyway)

 Sounds like a promising basis for removing the optimization indeed!

>>>
>>> Your patch suggested earlier works for me. And I don't see significant
>>> performance reduction compared with keeping optimization.
>>>
>>> I don't have strong reason on removing the optimization, but I think it
>>> would be simply good for now. Could you post your patch to edk2-devel
>>> for review and merge?
>>
>> That wouldn't be correct; I don't have any platform for testing StMM. I
>> proposed the patch purely based on code analysis. I prefer not to post
>> untested patches, if I can avoid it.
> 
> I got it, thanks!
> 
> I thought I could give Tested-by tag when you post the patch since I
> already verified the patch on a StMM platform

Oh, that seems to have eluded me, sorry -- it's not uncommon that a
patch submitter needs help with testing (external testing) on *some*
platforms, beside his or her main platform(s) of interest. What's quite
uncommon though is total untestability for the submitter; I admit I drew
a blank there. What you mention would have been viable.

Thank you for posting the patch, ultimately!
Laszlo

> 
>>
>> You can however post my patch; simply add your S-o-b at the bottom. You
>> can also preserve my authorship on the patch with --author=... on
>> git-commit; but even that is unnecessary for such a simple patch (you
>> don't even have to pick the patch up from the email, it's trivial to
>> reimplement from scratch, just reading the email).
> 
> I'm going to send the patch to edk2-devel and keep your authorship on
> the patch because there is no change compared with your suggestion in
> the email.
> 
> Thanks,
> Nhi
> 



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Re: [edk2-devel] [PATCH 1/1] StandaloneMmPkg/Core: Remove optimization for depex evaluation

[Laszlo Ersek]

On 1/19/24 05:56, Nhi Pham wrote:
> From: Laszlo Ersek 
> 
> The current dependency evaluator violates the memory access permission
> when patching depex grammar directly in the read-only depex memory area.
> 
> Laszlo pointed out the optimization issue in the thread (1) "Memory
> Attribute for depex section" and provided suggested patch to remove the
> perf optimization.
> 
> In my testing, removing the optimization does not make significant perf
> reduction. That makes sense that StandaloneMM dispatcher only searches
> in MM protocol database and does not depend on UEFI/DXE protocol
> database. Also, we don't have many protocols in StandaloneMM like
> UEFI/DXE.
> 
> From Laszlo,
> 
> "The patch removes the EFI_DEP_REPLACE_TRUE handling altogether, plus it
> CONST-ifies the Iterator pointer (which points into the DEPEX section),
> so that the compiler catch any possible accesses at *build time* that
> would write to the write-protected DEPEX memory area."
> 
> (1) https://edk2.groups.io/g/devel/message/113531
> 
> Signed-off-by: Nhi Pham 
> ---
>  StandaloneMmPkg/Core/Dependency.c | 37 
>  1 file changed, 7 insertions(+), 30 deletions(-)
> 
> diff --git a/StandaloneMmPkg/Core/Dependency.c 
> b/StandaloneMmPkg/Core/Dependency.c
> index 440fe3e45238..2bcb07d34666 100644
> --- a/StandaloneMmPkg/Core/Dependency.c
> +++ b/StandaloneMmPkg/Core/Dependency.c
> @@ -13,16 +13,6 @@
>  
>  #include "StandaloneMmCore.h"
>  
> -///
> -/// EFI_DEP_REPLACE_TRUE - Used to dynamically patch the dependency 
> expression
> -///to save time.  A EFI_DEP_PUSH is evaluated one an
> -///replaced with EFI_DEP_REPLACE_TRUE. If PI spec's 
> Vol 2
> -///Driver Execution Environment Core Interface use 
> 0xff
> -///as new DEPEX opcode. EFI_DEP_REPLACE_TRUE should 
> be
> -///defined to a new value that is not conflicting 
> with PI spec.
> -///
> -#define EFI_DEP_REPLACE_TRUE  0xff
> -
>  ///
>  /// Define the initial size of the dependency expression evaluation stack
>  ///
> @@ -170,12 +160,12 @@ MmIsSchedulable (
>IN  EFI_MM_DRIVER_ENTRY  *DriverEntry
>)
>  {
> -  EFI_STATUS  Status;
> -  UINT8   *Iterator;
> -  BOOLEAN Operator;
> -  BOOLEAN Operator2;
> -  EFI_GUIDDriverGuid;
> -  VOID*Interface;
> +  EFI_STATUS   Status;
> +  CONST UINT8  *Iterator;
> +  BOOLEAN  Operator;
> +  BOOLEAN  Operator2;
> +  EFI_GUID DriverGuid;
> +  VOID *Interface;
>  
>Operator  = FALSE;
>Operator2 = FALSE;
> @@ -253,8 +243,7 @@ MmIsSchedulable (
>Status = PushBool (FALSE);
>  } else {
>DEBUG ((DEBUG_DISPATCH, "  PUSH GUID(%g) = TRUE\n", ));
> -  *Iterator = EFI_DEP_REPLACE_TRUE;
> -  Status= PushBool (TRUE);
> +  Status = PushBool (TRUE);
>  }
>  
>  if (EFI_ERROR (Status)) {
> @@ -356,18 +345,6 @@ MmIsSchedulable (
>  DEBUG ((DEBUG_DISPATCH, "  RESULT = %a\n", Operator ? "TRUE" : 
> "FALSE"));
>  return Operator;
>  
> -  case EFI_DEP_REPLACE_TRUE:
> -CopyMem (, Iterator + 1, sizeof (EFI_GUID));
> -DEBUG ((DEBUG_DISPATCH, "  PUSH GUID(%g) = TRUE\n", ));
> -Status = PushBool (TRUE);
> -if (EFI_ERROR (Status)) {
> -  DEBUG ((DEBUG_DISPATCH, "  RESULT = FALSE (Unexpected error)\n"));
> -  return FALSE;
> -}
> -
> -Iterator += sizeof (EFI_GUID);
> -break;
> -
>default:
>  DEBUG ((DEBUG_DISPATCH, "  RESULT = FALSE (Unknown opcode)\n"));
>  goto Done;

looks good to me, thanks! (Can't give an R-b or A-b for a patch that was
originally written by me, just confirming that the code and commit
message look good.)



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Re: [edk2-devel] RFC: Folder layout change in UefiCpuPkg

[Laszlo Ersek]

On 1/19/24 11:17, Ni, Ray wrote:
> Chao,
> 
>  
> 
> In the plan A, CpuDxe.inf contains reference to
> gUefiCpuPkgTokenSpaceGuid.PcdCpuExceptionVectorBaseAddress in [Pcd]
> section. But I guess it’s only needed by LoongArch64. That’s why I
> didn’t like the common-inf idea.
> 
>  
> 
> But after looking at the other INF changes, I changed my mind. I think
> the common-inf looks good as the other INF files don’t have so much
> difference between LoonArch and x86.
> 
>  
> 
> So, I am ok with plan A. Thanks for preparing both changes for review.
> 
>  
> 
> Mike, Laszlo, Gerd, Abner, any comments?

I'm also OK with plan A.

Thanks
Laszlo

> 
>  
> 
>  
> 
> Thanks,
> 
> Ray
> 
> *From:* Chao Li 
> *Sent:* Thursday, January 18, 2024 4:27 PM
> *To:* Ni, Ray ; Sunil V L 
> *Cc:* devel@edk2.groups.io; Kinney, Michael D
> ; Laszlo Ersek ; Gerd
> Hoffmann ; Abner Chang 
> *Subject:* Re: [edk2-devel] RFC: Folder layout change in UefiCpuPkg
> 
>  
> 
> Hi Ray and Sunil,
> 
> Sorry, I'm late, I have very busy these days.
> 
> I created two PRs in my private repo.
> 
> *Plan A:*
> 
> Moved most of LoongArch libraries and drivers to current matching
> folders, removed LoongArch private INF, adjusted common INF.
> 
> URL: https://github.com/kilaterlee/edk2/pull/8
> 
> 
>  
> 
> *Plan B:*
> 
> Moved most of LoongArch libraries and drivers to current matching
> folders, keeping to use LoongArch private INF.
> 
> URL: https://github.com/kilaterlee/edk2/pull/9
> 
> 
>  
> 
> After you reading these two PRs, let's discuss how to deal with INF.
> 
> I prefer plan A, it is better to use the same INF for all ARCHs and have
> only one INF per modules. I was discussed this plan with Ray and Abner,
> but it was not allowed at the time.
> 
>  
> 
> Thanks,
> Chao
> 
> On 2024/1/16 08:59, Chao Li wrote:
> 
> OK, let me finish this work tomorrow, I'm a little busy today.
> 
> On 2024/1/15 16:11, Ni, Ray wrote:
> 
> Yes. Fine to me. Thanks!
> 
>  
> 
> Thanks,
> 
> Ray
> 
> -Original Message-
> 
> From: Sunil V L  
> 
> 
> Sent: Monday, January 15, 2024 2:46 PM
> 
> To: Chao Li  
> 
> Cc: devel@edk2.groups.io ; Ni, Ray 
>  ; Kinney, Michael D
> 
>  ; 
> Laszlo Ersek  ; Gerd
> 
> Hoffmann  
> 
> Subject: Re: [edk2-devel] RFC: Folder layout change in UefiCpuPkg
> 
>  
> 
> On Mon, Jan 15, 2024 at 02:17:09PM +0800, Chao Li wrote:
> 
> Ray and Sunil,
> 
>  
> 
> I plan send two example PRs to github to  show how to deal 
> the INFs, one to
> 
> adjust current INF, and another PR to move the libraris to 
> the current
> 
> folders. I hope after these two PRs are sent we can decide 
> what to do with
> 
> the INF. What do you think of this plan?
> 
>  
> 
>  
> 
> Hi Chao, That's fine with me.
> 
>  
> 
> Thanks,
> 
> Sunil
> 
> Thanks,
> 
> Chao
> 
> On 2024/1/15 13:44, Ni, Ray wrote:
> 
> That will be great!
> 
>  
> 
> Thanks,
> 
> Ray
> 
> -Original Message-
> 
> From: Sunil V L 
> 
> 
> Sent: Monday, January 15, 2024 12:44 PM
> 
> To: Ni, Ray 
> 
> 
> Cc:devel@edk2.groups.io;lic...@loongson.cn 
> ; Kinney, Michael D
> 
>  
> ; Laszlo Ersek 
> ; Gerd
> 
> Hoffmann 
> 
> Subject: Re: RFC: Folder layout change in UefiCpuPkg
> 
>  
> 
> On Mon, Jan 15, 2024 at 01:13:03AM +, Ni, Ray 
> wrote:
> 
> Sunil,
> 
> I am glad that you don't have concern about the 
> direction.
> 
>  
> 
> "RiscV" is good to me.
> 
>  
> 
>  
> 
> Thanks!, Ray. So, shall I send patches to reorganize 
> this?
> 
>  
> 
> Thanks,
> 
> Sunil
> 
> 
> 



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Re: [edk2-devel] [PATCH 1/6] UefiCpuPkg/LocalApicTimerDxe: Duplicate OvmfPkg/LocalApicTimerDxe driver

[Ni, Ray]

Michael,

Thanks for the explanation.
I tried to expand the code flow in below and help the discussion..

TimerInterruptHandler()
gBS->RaiseTPL (HIGH)
gBS->RestoreTPL (APPLICATION) // expand in below.
For Tpl = {NOTIFY, CALLBACK}:   [for-loop]
if PendingBit is not set:
continue
gCurrentTpl = Tpl
EnableInterrupt()   [1]
CoreDispatchEventNotifies(Tpl) // expand in below.
gBS->RaiseTPL (HIGH)
gBS->RestoreTPL (Tpl)
NotifyFunction()    [2]
gBS->RaiseTPL (HIGH)
gBS->RestoreTPL (Tpl)
End-For
gCurrentTpl = APPLICATION   [3]
EnableInterrupt()   [4]
IRET


  1.  Agree that the stack overflow could happen in real platform.
The interrupt-enabled env when CPU runs gBS->RestoreTPL(APPLICATION)  could be 
3 cases: When gCurrentTpl is NOTIFY, CALLBACK or APPLICATION.
Let's name them as "env:NOTIFY", "env:CALLBACK" and "env:APPLICATION".
CPU enters "env:NOTIFY" and "env:CALLBACK" in [1].
CPU enters "env:APPLICATION" in [4], or [3] when the interrupt is already 
enabled in the [for-loop].

When interrupt happens in "env:NOTIFY", the inner interrupt handler calls 
gBS->RestoreTPL(NOTIFY). The interrupt-enabled env in the inner 
RestoreTPL(NOTIFY) is "env:NOTIFY" only.
When interrupt happens in "env:CALLBACK", the inner interrupt handler calls 
gBS->RestoreTPL(CALLBACK). The interrupt-enabled env in the inner 
RestoreTPL(CALLBACK) can be: "env:NOTIFY" and "env:CALLBACK".

So, the interrupt re-entrance we want to avoid is "env:NOTIFY"  -> 
"env:NOTIFY", or "env:CALLBACK" -> "env:CALLBACK", or "env:APPLICATION" -> 
"env:APPLICATION". Because it's endless.
NestedTplInterruptLib was written to avoid it.

However, it's ok for: "env:APPLICATION" -> "env:CALLBACK" -> "env:NOTIFY", or 
"env:CALLBACK" -> "env:NOTIFY".

In real platform, it's possible that interrupt happens just after [4], and in 
worst case, the RestoreTpl() call in the inner timer interrupt handler is 
interrupted after [4] again, and again.


  1.  Some questions on NestedInterruptTplLib.

  1.  Can we remove DisableInterruptsOnIret()? That means the inner interrupt 
handler would returns to the outer world with interrupt enabled and TPL==HIGH. 
But I don't see any issue with that.
  2.  If DxeCore can be changed, do you have an easier-to-understand solution? 
It really took me 2 days to understand why NestedInterruptTplLib is written in 
today's way.


thanks,
ray

From: Michael Brown 
Sent: Wednesday, January 17, 2024 6:46:59 PM
To: devel@edk2.groups.io ; Ni, Ray ; 
Laszlo Ersek ; kra...@redhat.com 
Cc: Pedro Falcato ; Kinney, Michael D 
; Desimone, Nathaniel L 
; Kumar, Rahul R 
Subject: Re: [edk2-devel] [PATCH 1/6] UefiCpuPkg/LocalApicTimerDxe: Duplicate 
OvmfPkg/LocalApicTimerDxe driver

On 17/01/2024 07:11, Ni, Ray wrote:
> The above flow shows endless re-entrance of timer interrupt handler.
>
> But, my question is: above flow only can happen in real platform when the 
> below 4 steps occupies more time than the timer period (usually 10ms).
>  [Timer Interrupt #2]1. RaiseTPL (HIGH) from NOTIFY causing CPU 
> interrupt be disabled.
>  [Timer Interrupt #2]2. Send APIC EOI (ACK the interrupt received 
> so APIC can continue generate interrupts)
>  [Timer Interrupt #2]3. Call DxeCore::CoreTimerTick()
>  [Timer Interrupt #2]4. RestoreTPL (NOTIFY) from HIGH. No 
> callback runs as no callback can be registered at TPL > NOTIFY. In the end of 
> RestoreTPL(), CPU interrupt is enabled.
>
> But, in my opinion, it's impossible.

As is thoroughly documented in NestedInterruptRestoreTpl(), the
potential for unbounded stack consumption arises when an interrupt
occurs after the point that RestoreTPL() completes dispatching all
notifications but before the IRET (or equivalent) instruction pops the
original stack frame.

Since dispatching notifications can take an unbounded amount of time,
there is absolutely no guarantee that this will be less than 10ms after
the previous interrupt.  It could easily be 30 seconds later.

The problematic flow is a subtle variation on what you described:

   [IRQ#1] timer interrupt at TPL_APPLICATION
 [ISR#1] RaiseTPL from TPL_APPLICATION -> TPL_HIGH_LEVEL
 [ISR#1] Send APIC EOI
 [ISR#1] Call CoreTimerTick()
 [ISR#1] RestoreTPL from TPL_HIGH_LEVEL -> TPL_APPLICATION
   [ISR#1] Callbacks for TPL_NOTIFY are run
   [ISR#1] Callbacks for TPL_CALLBACK are run
   ... these may take several *seconds* to complete, during
   which further interrupts are raised, the details of
   which are not shown here...
   [ISR#1] TPL is now restored to TPL_APPLICATION
   [IRQ#N] timer interrupt at TPL_APPLICATION
 [ISR#N] RaiseTPL from TPL_APPLICATION -> 

Re: [edk2-devel] [PATCH 1/1] StandaloneMmPkg/Core: Remove optimization for depex evaluation

[levi.yun]

Except, 8bit transfer encoding.

Tested-by: levi.yun 
Reviewed-by: levi.yun 

On 19/01/2024 10:39, Ard Biesheuvel via groups.io wrote:

On Fri, 19 Jan 2024 at 05:58, Nhi Pham via groups.io
 wrote:

From: Laszlo Ersek 

The current dependency evaluator violates the memory access permission
when patching depex grammar directly in the read-only depex memory area.

Laszlo pointed out the optimization issue in the thread (1) "Memory
Attribute for depex section" and provided suggested patch to remove the
perf optimization.

In my testing, removing the optimization does not make significant perf
reduction. That makes sense that StandaloneMM dispatcher only searches
in MM protocol database and does not depend on UEFI/DXE protocol
database. Also, we don't have many protocols in StandaloneMM like
UEFI/DXE.

 From Laszlo,

"The patch removes the EFI_DEP_REPLACE_TRUE handling altogether, plus it
CONST-ifies the Iterator pointer (which points into the DEPEX section),
so that the compiler catch any possible accesses at *build time* that
would write to the write-protected DEPEX memory area."

(1) https://edk2.groups.io/g/devel/message/113531

Signed-off-by: Nhi Pham 

Thanks for the patch. This looks good to me in principle, only the
patch got mangled by your MTA

Please resend using 8bit transfer encoding. (You can use
BaseTools/Scripts/SetupGit.py to configure Git for you)



---
  StandaloneMmPkg/Core/Dependency.c | 37 
  1 file changed, 7 insertions(+), 30 deletions(-)

diff --git a/StandaloneMmPkg/Core/Dependency.c 
b/StandaloneMmPkg/Core/Dependency.c
index 440fe3e45238..2bcb07d34666 100644
--- a/StandaloneMmPkg/Core/Dependency.c
+++ b/StandaloneMmPkg/Core/Dependency.c
@@ -13,16 +13,6 @@


  #include "StandaloneMmCore.h"



-///

-/// EFI_DEP_REPLACE_TRUE - Used to dynamically patch the dependency expression

-///to save time.  A EFI_DEP_PUSH is evaluated one an

-///replaced with EFI_DEP_REPLACE_TRUE. If PI spec's 
Vol 2

-///Driver Execution Environment Core Interface use 0xff

-///as new DEPEX opcode. EFI_DEP_REPLACE_TRUE should be

-///defined to a new value that is not conflicting with 
PI spec.

-///

-#define EFI_DEP_REPLACE_TRUE  0xff

-

  ///

  /// Define the initial size of the dependency expression evaluation stack

  ///

@@ -170,12 +160,12 @@ MmIsSchedulable (
IN  EFI_MM_DRIVER_ENTRY  *DriverEntry

)

  {

-  EFI_STATUS  Status;

-  UINT8   *Iterator;

-  BOOLEAN Operator;

-  BOOLEAN Operator2;

-  EFI_GUIDDriverGuid;

-  VOID*Interface;

+  EFI_STATUS   Status;

+  CONST UINT8  *Iterator;

+  BOOLEAN  Operator;

+  BOOLEAN  Operator2;

+  EFI_GUID DriverGuid;

+  VOID *Interface;



Operator  = FALSE;

Operator2 = FALSE;

@@ -253,8 +243,7 @@ MmIsSchedulable (
Status = PushBool (FALSE);

  } else {

DEBUG ((DEBUG_DISPATCH, "  PUSH GUID(%g) = TRUE\n", ));

-  *Iterator = EFI_DEP_REPLACE_TRUE;

-  Status= PushBool (TRUE);

+  Status = PushBool (TRUE);

  }



  if (EFI_ERROR (Status)) {

@@ -356,18 +345,6 @@ MmIsSchedulable (
  DEBUG ((DEBUG_DISPATCH, "  RESULT = %a\n", Operator ? "TRUE" : 
"FALSE"));

  return Operator;



-  case EFI_DEP_REPLACE_TRUE:

-CopyMem (, Iterator + 1, sizeof (EFI_GUID));

-DEBUG ((DEBUG_DISPATCH, "  PUSH GUID(%g) = TRUE\n", ));

-Status = PushBool (TRUE);

-if (EFI_ERROR (Status)) {

-  DEBUG ((DEBUG_DISPATCH, "  RESULT = FALSE (Unexpected error)\n"));

-  return FALSE;

-}

-

-Iterator += sizeof (EFI_GUID);

-break;

-

default:

  DEBUG ((DEBUG_DISPATCH, "  RESULT = FALSE (Unknown opcode)\n"));

  goto Done;

--
2.25.1













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Re: [edk2-devel] [edk2-platforms][PATCH V2 1/1] Platform/ARM/N1Sdp: Route the Debug Serial Port to IOFPGA UART1

[Himanshu Sharma]

Link to V1: [edk2-platforms][PATCH V1 1/1] Platform/ARM/N1Sdp: Modify IRQ ID of 
Debug UART and routing to IOFPGA UART1 (groups.io) ( 
https://edk2.groups.io/g/devel/message/98064?p=%2C%2C%2C20%2C0%2C0%2C0%3A%3Arecentpostdate%2Fsticky%2C%2Chimanshu%2C20%2C2%2C0%2C96088965
 )


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Re: [edk2-devel] [edk2-platforms][PATCH V4 0/4] Add support to parse NT_FW_CONFIG

[Sami Mujawar]

Hi Sahil,
On Thu, Jan 4, 2024 at 05:16 AM, sahil wrote:

> 
> v4:
> - Fixed code review comments
> - Split the patch into four patches

Can you add git notes for the patches in the future, please? See 
https://github.com/tianocore/tianocore.github.io/wiki/Laszlo%27s-unkempt-git-guide-for-edk2-contributors-and-maintainers#contrib-30
Also, it would be of great help if you can add a link to the edk2 mailing list 
discussion that has taken place. I normally do that as it helps the maintainer 
locate the previous discussion easily.

For now, can you reply to the individual patches with the links to the previous 
discussion, please?

Regards,

Sami Mujawar


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Re: [edk2-devel] [PATCH 1/1] StandaloneMmPkg/Core: Remove optimization for depex evaluation

[Ard Biesheuvel]

On Fri, 19 Jan 2024 at 05:58, Nhi Pham via groups.io
 wrote:
>
> From: Laszlo Ersek 
>
> The current dependency evaluator violates the memory access permission
> when patching depex grammar directly in the read-only depex memory area.
>
> Laszlo pointed out the optimization issue in the thread (1) "Memory
> Attribute for depex section" and provided suggested patch to remove the
> perf optimization.
>
> In my testing, removing the optimization does not make significant perf
> reduction. That makes sense that StandaloneMM dispatcher only searches
> in MM protocol database and does not depend on UEFI/DXE protocol
> database. Also, we don't have many protocols in StandaloneMM like
> UEFI/DXE.
>
> From Laszlo,
>
> "The patch removes the EFI_DEP_REPLACE_TRUE handling altogether, plus it
> CONST-ifies the Iterator pointer (which points into the DEPEX section),
> so that the compiler catch any possible accesses at *build time* that
> would write to the write-protected DEPEX memory area."
>
> (1) https://edk2.groups.io/g/devel/message/113531
>
> Signed-off-by: Nhi Pham 

Thanks for the patch. This looks good to me in principle, only the
patch got mangled by your MTA

Please resend using 8bit transfer encoding. (You can use
BaseTools/Scripts/SetupGit.py to configure Git for you)


> ---
>  StandaloneMmPkg/Core/Dependency.c | 37 
>  1 file changed, 7 insertions(+), 30 deletions(-)
>
> diff --git a/StandaloneMmPkg/Core/Dependency.c 
> b/StandaloneMmPkg/Core/Dependency.c
> index 440fe3e45238..2bcb07d34666 100644
> --- a/StandaloneMmPkg/Core/Dependency.c
> +++ b/StandaloneMmPkg/Core/Dependency.c
> @@ -13,16 +13,6 @@
>
>
>  #include "StandaloneMmCore.h"
>
>
>
> -///
>
> -/// EFI_DEP_REPLACE_TRUE - Used to dynamically patch the dependency 
> expression
>
> -///to save time.  A EFI_DEP_PUSH is evaluated one an
>
> -///replaced with EFI_DEP_REPLACE_TRUE. If PI spec's 
> Vol 2
>
> -///Driver Execution Environment Core Interface use 
> 0xff
>
> -///as new DEPEX opcode. EFI_DEP_REPLACE_TRUE should 
> be
>
> -///defined to a new value that is not conflicting 
> with PI spec.
>
> -///
>
> -#define EFI_DEP_REPLACE_TRUE  0xff
>
> -
>
>  ///
>
>  /// Define the initial size of the dependency expression evaluation stack
>
>  ///
>
> @@ -170,12 +160,12 @@ MmIsSchedulable (
>IN  EFI_MM_DRIVER_ENTRY  *DriverEntry
>
>)
>
>  {
>
> -  EFI_STATUS  Status;
>
> -  UINT8   *Iterator;
>
> -  BOOLEAN Operator;
>
> -  BOOLEAN Operator2;
>
> -  EFI_GUIDDriverGuid;
>
> -  VOID*Interface;
>
> +  EFI_STATUS   Status;
>
> +  CONST UINT8  *Iterator;
>
> +  BOOLEAN  Operator;
>
> +  BOOLEAN  Operator2;
>
> +  EFI_GUID DriverGuid;
>
> +  VOID *Interface;
>
>
>
>Operator  = FALSE;
>
>Operator2 = FALSE;
>
> @@ -253,8 +243,7 @@ MmIsSchedulable (
>Status = PushBool (FALSE);
>
>  } else {
>
>DEBUG ((DEBUG_DISPATCH, "  PUSH GUID(%g) = TRUE\n", ));
>
> -  *Iterator = EFI_DEP_REPLACE_TRUE;
>
> -  Status= PushBool (TRUE);
>
> +  Status = PushBool (TRUE);
>
>  }
>
>
>
>  if (EFI_ERROR (Status)) {
>
> @@ -356,18 +345,6 @@ MmIsSchedulable (
>  DEBUG ((DEBUG_DISPATCH, "  RESULT = %a\n", Operator ? "TRUE" : 
> "FALSE"));
>
>  return Operator;
>
>
>
> -  case EFI_DEP_REPLACE_TRUE:
>
> -CopyMem (, Iterator + 1, sizeof (EFI_GUID));
>
> -DEBUG ((DEBUG_DISPATCH, "  PUSH GUID(%g) = TRUE\n", ));
>
> -Status = PushBool (TRUE);
>
> -if (EFI_ERROR (Status)) {
>
> -  DEBUG ((DEBUG_DISPATCH, "  RESULT = FALSE (Unexpected error)\n"));
>
> -  return FALSE;
>
> -}
>
> -
>
> -Iterator += sizeof (EFI_GUID);
>
> -break;
>
> -
>
>default:
>
>  DEBUG ((DEBUG_DISPATCH, "  RESULT = FALSE (Unknown opcode)\n"));
>
>  goto Done;
>
> --
> 2.25.1
>
>
>
> 
>
>


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Re: [edk2-devel] RFC: Folder layout change in UefiCpuPkg

[Ni, Ray]

Chao,

In the plan A, CpuDxe.inf contains reference to 
gUefiCpuPkgTokenSpaceGuid.PcdCpuExceptionVectorBaseAddress in [Pcd] section. 
But I guess it’s only needed by LoongArch64. That’s why I didn’t like the 
common-inf idea.

But after looking at the other INF changes, I changed my mind. I think the 
common-inf looks good as the other INF files don’t have so much difference 
between LoonArch and x86.

So, I am ok with plan A. Thanks for preparing both changes for review.

Mike, Laszlo, Gerd, Abner, any comments?


Thanks,
Ray
From: Chao Li 
Sent: Thursday, January 18, 2024 4:27 PM
To: Ni, Ray ; Sunil V L 
Cc: devel@edk2.groups.io; Kinney, Michael D ; 
Laszlo Ersek ; Gerd Hoffmann ; Abner 
Chang 
Subject: Re: [edk2-devel] RFC: Folder layout change in UefiCpuPkg


Hi Ray and Sunil,

Sorry, I'm late, I have very busy these days.

I created two PRs in my private repo.

Plan A:

Moved most of LoongArch libraries and drivers to current matching folders, 
removed LoongArch private INF, adjusted common INF.

URL: https://github.com/kilaterlee/edk2/pull/8



Plan B:

Moved most of LoongArch libraries and drivers to current matching folders, 
keeping to use LoongArch private INF.

URL: https://github.com/kilaterlee/edk2/pull/9



After you reading these two PRs, let's discuss how to deal with INF.

I prefer plan A, it is better to use the same INF for all ARCHs and have only 
one INF per modules. I was discussed this plan with Ray and Abner, but it was 
not allowed at the time.

Thanks,
Chao
On 2024/1/16 08:59, Chao Li wrote:

OK, let me finish this work tomorrow, I'm a little busy today.
On 2024/1/15 16:11, Ni, Ray wrote:

Yes. Fine to me. Thanks!



Thanks,

Ray

-Original Message-

From: Sunil V L 

Sent: Monday, January 15, 2024 2:46 PM

To: Chao Li 

Cc: devel@edk2.groups.io; Ni, Ray 
; Kinney, Michael D

; Laszlo Ersek 
; Gerd

Hoffmann 

Subject: Re: [edk2-devel] RFC: Folder layout change in UefiCpuPkg



On Mon, Jan 15, 2024 at 02:17:09PM +0800, Chao Li wrote:

Ray and Sunil,



I plan send two example PRs to github to  show how to deal the INFs, one to

adjust current INF, and another PR to move the libraris to the current

folders. I hope after these two PRs are sent we can decide what to do with

the INF. What do you think of this plan?





Hi Chao, That's fine with me.



Thanks,

Sunil

Thanks,

Chao

On 2024/1/15 13:44, Ni, Ray wrote:

That will be great!



Thanks,

Ray

-Original Message-

From: Sunil V L

Sent: Monday, January 15, 2024 12:44 PM

To: Ni, Ray

Cc:devel@edk2.groups.io;lic...@loongson.cn;
 Kinney, Michael D

; Laszlo 
Ersek; Gerd

Hoffmann

Subject: Re: RFC: Folder layout change in UefiCpuPkg



On Mon, Jan 15, 2024 at 01:13:03AM +, Ni, Ray wrote:

Sunil,

I am glad that you don't have concern about the direction.



"RiscV" is good to me.





Thanks!, Ray. So, shall I send patches to reorganize this?



Thanks,

Sunil



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Re: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use AsmCpuidEx() for CPUID_EXTENDED_TOPOLOGY leaf

[Ni, Ray]

Mike,
I agree with your words after "However".
Zeroing ECX in AsmCpuid() is confusing to future code maintainer: If CPUID 
instruction does
not consume "ECX", why is it needed to zero "ECX"?

Thanks,
Ray
> -Original Message-
> From: Kinney, Michael D 
> Sent: Friday, January 19, 2024 7:11 AM
> To: Tom Lendacky ; devel@edk2.groups.io;
> Gao, Liming ; Liu, Zhiguang ;
> Dong, Eric ; Ni, Ray ; Kumar, Rahul R
> ; Gerd Hoffmann ; Ard
> Biesheuvel 
> Cc: Michael Roth ; Kinney, Michael D
> 
> Subject: RE: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use
> AsmCpuidEx() for CPUID_EXTENDED_TOPOLOGY leaf
> 
> Hi Tom,
> 
> I do not see any harm in zeroing ECX in AsmCpuid().
> 
> If it is not zeroed, then it would have an undefined value.
> 
> However, calling AsmCpuid() for any Index that evaluates ECX
> (including a check for 0) should never be done.  If ECX is
> evaluated for a given Index, then AsmCpuIdEx() must be used.
> 
> Mike
> 
> > -Original Message-
> > From: Tom Lendacky 
> > Sent: Wednesday, January 17, 2024 1:26 PM
> > To: devel@edk2.groups.io; Kinney, Michael D
> > ; Gao, Liming ; Liu,
> > Zhiguang ; Dong, Eric ; Ni,
> > Ray ; Kumar, Rahul R ; Gerd
> > Hoffmann ; Ard Biesheuvel
> 
> > Cc: Michael Roth 
> > Subject: Re: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use
> > AsmCpuidEx() for CPUID_EXTENDED_TOPOLOGY leaf
> >
> > On 11/28/23 08:35, Lendacky, Thomas via groups.io wrote:
> > > On 11/6/23 17:15, Tom Lendacky wrote:
> > >> On 11/6/23 16:45, Lendacky, Thomas via groups.io wrote:
> > >>> The CPUID_EXTENDED_TOPOLOGY CPUID leaf takes a subleaf as input
> when
> > >>> returning CPUID information. However, the AsmCpuid() function does
> > not
> > >>> zero out ECX before the CPUID instruction, so the input leaf is used
> > as
> > >>> the sub-leaf for the CPUID request and returns erroneous/invalid
> > CPUID
> > >>> data, since the intent of the request was to get data related to
> > sub-leaf
> > >>> 0. Instead, use AsmCpuidEx() for the CPUID_EXTENDED_TOPOLOGY leaf.
> > >>
> > >> Alternatively, the AsmCpuid() function could be changed to XOR ECX
> > >> before invoking the CPUID instruction. This would ensure that the 0
> > >> sub-leaf is returned for any CPUID leaves that support sub-leaves.
> > >> Thoughts?
> > >>
> > >> Adding some additional maintainers for their thoughts, too.
> > >
> > > Any thoughts on this approach (as a separate, unrelated patch) to
> > > eliminate future issues that could pop up?
> > >
> > > Seems like zeroing out ECX before calling CPUID would be an
> > appropriate
> > > thing to do, but I'm not sure if that will have any impact on the
> > existing
> > > code base... it shouldn't, but you never know.
> >
> > Just a re-ping for thoughts on this.
> >
> > Thanks,
> > Tom
> >
> > >
> > > Thanks,
> > > Tom
> > >
> > >>
> > >> Thanks,
> > >> Tom


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Re: [edk2-devel] [PATCH v3 0/4] Bz4166: Integer Overflow in CreateHob()

[Sami Mujawar]

Hi Gua,

I don’t think handling the error one level up (i.e. only in the calling 
function) solves the problem in entirety, can you check please?
Example, now the crash can happen in BuildGuidDataHob() see 
https://github.com/tianocore/edk2/blob/master/EmbeddedPkg/Library/PrePiHobLib/Hob.c#L488-L490
I believe such cases are at other places as well.

I think it may be better to introduce a Panic() hander to fix this properly.

Regards,

Sami Mujawar

On 12/01/2024, 02:25, "gua@intel.com " 
mailto:gua@intel.com>> wrote:


From: Gua Guo mailto:gua@intel.com>>


PR: https://github.com/tianocore/edk2/pull/5252 



V3
1. UefiPayloadPkg/Hob: Integer : Add error handle


2. StandaloneMmPkg/Hob: Integer Overflow in : Add error handle


3. EmbeddedPkg/Hob: Integer Overflow in CreateHob() : Add error handle


V2
1. UefiPayloadPkg/Hob: Integer : Add Reviewed-by and Authored-by


2. StandaloneMmPkg/Hob: Integer Overflow in : Add Reviewed-by and Authored-by


3. EmbeddedPkg/Hob: Integer Overflow in CreateHob() : Add Reviewed-by and 
Authored-by


4. MdeModulePkg/Hob: Integer Overflow in CreateHob() : Add Authored-by


V1


1. UefiPayloadPkg/Hob: Integer


2. StandaloneMmPkg/Hob: Integer Overflow in


3. EmbeddedPkg/Hob: Integer Overflow in CreateHob()


4. MdeModulePkg/Hob: Integer Overflow in CreateHob()


Cc: Ard Biesheuvel mailto:ardb+tianoc...@kernel.org>>


Cc: Gerd Hoffmann mailto:kra...@redhat.com>>


Cc: John Mathew mailto:john.math...@intel.com>>


Cc: Vincent Zimmer mailto:vincent.zim...@intel.com>>


Cc: Sami Mujawar mailto:sami.muja...@arm.com>>


Gua Guo (4):
UefiPayloadPkg/Hob: Integer Overflow in CreateHob()
StandaloneMmPkg/Hob: Integer Overflow in CreateHob()
EmbeddedPkg/Hob: Integer Overflow in CreateHob()
MdeModulePkg/Hob: Integer Overflow in CreateHob()


EmbeddedPkg/Library/PrePiHobLib/Hob.c | 43 +++
MdeModulePkg/Core/Pei/Hob/Hob.c | 2 +-
.../Arm/StandaloneMmCoreHobLib.c | 35 +++
.../Library/PayloadEntryHobLib/Hob.c | 43 +++
.../FitUniversalPayloadEntry.c | 8 ++--
.../UefiPayloadEntry/UniversalPayloadEntry.c | 8 ++--
6 files changed, 132 insertions(+), 7 deletions(-)


--
2.39.2.windows.1





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[edk2-devel] [PATCH edk2-platforms v1 1/1] Platform/ARM: SgiPkg: Add serial debug port mapping.

[levi.yun]

The serial debug port must be initialised by the firmware. This
is done by SetupDebugUart when DynamicTables Framework
is used.

However, the address range for the serial debug port must
be mapped. Otherwise this results in a page fault when the
serial port is accessed.

Therefore, update the page tables to add the address range
covering the serial debug port.

Signed-off-by: levi.yun 
---
 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf  |  1 +
 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c | 12 +++-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf 
b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
index 
020bde0d1f567d0b379fe2323dd6bf0dc4f7c1ce..539d2a460d56d400cf37a5c2ad3fbe9ad2e705bd
 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
@@ -40,6 +40,7 @@ [FixedPcd]
   gArmPlatformTokenSpaceGuid.PcdClusterCount
   gArmPlatformTokenSpaceGuid.PcdCoreCount
   gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase

   gArmSgiTokenSpaceGuid.PcdDramBlock2Base
   gArmSgiTokenSpaceGuid.PcdDramBlock2Size
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c 
b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
index 
fa3cfbc730f6ff94cd8a46694f99ea0a1ace9e00..92ca6bf64ab2781e09d31a90ecb5ce05c4e7027b
 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
@@ -18,7 +18,7 @@

 // Total number of descriptors, including the final "end-of-table" descriptor.
 #define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 
\
-  ((14 + (FixedPcdGet32 (PcdChipCount) * 2)) + 
\
+  ((15 + (FixedPcdGet32 (PcdChipCount) * 2)) + 
\
(FixedPcdGet32 (PcdIoVirtSocExpBlkUartEnable) * 
\
 FixedPcdGet32 (PcdChipCount) * 2))

@@ -184,6 +184,16 @@ ArmPlatformGetVirtualMemoryMap (
   VirtualMemoryTable[Index].Length  = SIZE_64KB;
   VirtualMemoryTable[Index].Attributes  = 
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;

+  /**
+   * DynamicTable initializes debug serial port. And OS expects firmware 
initalizes it.
+   * So, add mapping for DbgRegisterBase.
+   */
+  VirtualMemoryTable[++Index].PhysicalBase  = FixedPcdGet64 
(PcdSerialDbgRegisterBase);
+  VirtualMemoryTable[Index].VirtualBase = FixedPcdGet64 
(PcdSerialDbgRegisterBase);
+  VirtualMemoryTable[Index].Length  = SIZE_4KB;
+  VirtualMemoryTable[Index].Attributes  = 
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+
 #if (FixedPcdGet32 (PcdIoVirtSocExpBlkUartEnable) == 1)
   // Chip-0 IO Virtualization SoC Expansion Block - UART0
   IO_VIRT_SOC_EXP_BLK_UART_MMAP(0, 0)
--
Guid("CE165669-3EF3-493F-B85D-6190EE5B9759")

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[edk2-devel] [PATCH RESEND edk2-platforms v1 1/3] Platform/Arm: FVP: Add a NorFlashLib instance for StandaloneMm

[levi.yun]

The NOR Flash1 is used for UEFI Variable storage. When
Standalone MM is enabled the variable storage is managed
in the secure world by Standalone MM.

Therefore, add a new instance of NorFlashLib for that has
the NOR Flash1 definitions for Standalone MM.

Also, disable the NOR Flash1 definitions from the Normal
world NorFlashLib instance when Standalone MM is enabled
using the ENABLE_STMM build flag.

Signed-off-by: levi.yun 
---
 Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpress.c  
| 34 ++--
 
Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf
 |  3 +-
 Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashInfo.c 
| 42 
 Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashStMmInfo.c 
| 28 +
 Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashStMmLib.inf
| 30 ++
 5 files changed, 106 insertions(+), 31 deletions(-)

diff --git 
a/Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpress.c 
b/Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpress.c
index 
ec5ac8cc625fa3037edf63551baa43dab327ec5b..9b71df991a7a288f63f7dc2f50ffba251beaf8f2
 100644
--- 
a/Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpress.c
+++ 
b/Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpress.c
@@ -1,6 +1,6 @@
 /** @file

- Copyright (c) 2011-2014, ARM Ltd. All rights reserved.
+ Copyright (c) 2011-2024, ARM Ltd. All rights reserved.

  SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -12,34 +12,8 @@
 #include 
 #include 

-#define NOR_FLASH_DEVICE_COUNT 4
-
-NOR_FLASH_DESCRIPTION mNorFlashDevices[NOR_FLASH_DEVICE_COUNT] = {
-  { // BootMon
-ARM_VE_SMB_NOR0_BASE,
-ARM_VE_SMB_NOR0_BASE,
-SIZE_256KB * 255,
-SIZE_256KB,
-  },
-  { // BootMon non-volatile storage
-ARM_VE_SMB_NOR0_BASE,
-ARM_VE_SMB_NOR0_BASE + SIZE_256KB * 255,
-SIZE_64KB * 4,
-SIZE_64KB,
-  },
-  { // UEFI
-ARM_VE_SMB_NOR1_BASE,
-ARM_VE_SMB_NOR1_BASE,
-SIZE_256KB * 255,
-SIZE_256KB,
-  },
-  { // UEFI Variable Services non-volatile storage
-ARM_VE_SMB_NOR1_BASE,
-ARM_VE_SMB_NOR1_BASE + SIZE_256KB * 255,
-SIZE_64KB * 3, //FIXME: Set 3 blocks because I did not succeed to copy 4 
blocks into the ARM Versatile Express NOR Flash in the last NOR Flash. It 
should be 4 blocks
-SIZE_64KB,
-  }
-};
+extern NOR_FLASH_DESCRIPTION mNorFlashDevices[];
+extern UINT32mNorFlashCount;

 EFI_STATUS
 NorFlashPlatformInitialization (
@@ -68,7 +42,7 @@ NorFlashPlatformGetDevices (
   }

   *NorFlashDevices = mNorFlashDevices;
-  *Count = NOR_FLASH_DEVICE_COUNT;
+  *Count = mNorFlashCount;

   return EFI_SUCCESS;
 }
diff --git 
a/Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf
 
b/Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf
index 
c9fbd80d47eb865b81e85bb513a44f7c18b58927..1a656836675876b492cdb33f3bf6bfc0b76d15b7
 100644
--- 
a/Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf
+++ 
b/Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf
@@ -1,6 +1,6 @@
 #/** @file
 #
-#  Copyright (c) 2011, ARM Ltd. All rights reserved.
+#  Copyright (c) 2011-2024, ARM Ltd. All rights reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 #**/
@@ -15,6 +15,7 @@ [Defines]

 [Sources.common]
   NorFlashArmVExpress.c
+  NorFlashInfo.c

 [Packages]
   MdePkg/MdePkg.dec
diff --git 
a/Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashInfo.c 
b/Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashInfo.c
new file mode 100644
index 
..fd515305fbbf1bbbfe5213329a88e40ed5b3f7a6
--- /dev/null
+++ b/Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashInfo.c
@@ -0,0 +1,42 @@
+/** @file
+
+ Copyright (c) 2011-2024, Arm Ltd. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ **/
+
+#include 
+#include 
+#include 
+
+NOR_FLASH_DESCRIPTION mNorFlashDevices[] = {
+  { // BootMon
+ARM_VE_SMB_NOR0_BASE,
+ARM_VE_SMB_NOR0_BASE,
+SIZE_256KB * 255,
+SIZE_256KB,
+  },
+  { // BootMon non-volatile storage
+ARM_VE_SMB_NOR0_BASE,
+ARM_VE_SMB_NOR0_BASE + SIZE_256KB * 255,
+SIZE_64KB * 4,
+SIZE_64KB,
+  },
+#ifndef ENABLE_UEFI_SECURE_VARIABLE
+  { // UEFI
+ARM_VE_SMB_NOR1_BASE,
+ARM_VE_SMB_NOR1_BASE,
+SIZE_256KB * 255,
+SIZE_256KB,
+  },
+  { // UEFI Variable Services non-volatile storage
+ARM_VE_SMB_NOR1_BASE,
+ARM_VE_SMB_NOR1_BASE + SIZE_256KB * 255,
+SIZE_64KB * 3, //FIXME: Set 3 blocks because I did not succeed to copy 4 
blocks into the ARM Versatile Express NOR Flash in the last NOR Flash. It 
should be 4 blocks
+SIZE_64KB,
+  },
+#endif
+};
+
+UINT32 mNorFlashCount = 

[edk2-devel] [PATCH RESEND edk2-platforms v1 3/3] Platform/Arm: Add Standalone MM support for FVP

[levi.yun]

Add Standalone MM support for FVP model.

Signed-off-by: levi.yun 
---
 Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc | 208 
 Platform/ARM/VExpressPkg/PlatformStandaloneMm.fdf | 106 ++
 2 files changed, 314 insertions(+)

diff --git a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc 
b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
new file mode 100644
index 
..0e77b76cae698c5e0cba3ce3249b88e4cffc98a0
--- /dev/null
+++ b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
@@ -0,0 +1,208 @@
+## @file
+# Standalone MM Platform.
+#
+# Copyright (c) 2024, Arm Limited. All rights reserved.
+#
+#SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+
+[Defines]
+  PLATFORM_NAME  = StandaloneMm
+  PLATFORM_GUID  = 9A4BBA60-B4F9-47C7-9258-3BD77CAE9322
+  PLATFORM_VERSION   = 1.0
+  DSC_SPECIFICATION  = 0x0001001C
+!ifdef $(EDK2_OUT_DIR)
+  OUTPUT_DIRECTORY   = $(EDK2_OUT_DIR)
+!else
+  OUTPUT_DIRECTORY   = Build/ArmVExpress-FVP-AArch64
+!endif
+  SUPPORTED_ARCHITECTURES= AARCH64|ARM
+  BUILD_TARGETS  = DEBUG|RELEASE
+  SKUID_IDENTIFIER   = DEFAULT
+  FLASH_DEFINITION   = 
Platform/ARM/VExpressPkg/PlatformStandaloneMm.fdf
+  DEFINE DEBUG_MESSAGE   = TRUE
+
+  # To allow the use of ueif secure variable feature, set this to TRUE.
+  DEFINE ENABLE_UEFI_SECURE_VARIABLE = FALSE
+
+  # LzmaF86
+  DEFINE COMPRESSION_TOOL_GUID   = D42AE6BD-1352-4bfb-909A-CA72A6EAE889
+
+
+#
+# Library Class section - list of all Library Classes needed by this Platform.
+#
+
+
+!include MdePkg/MdeLibs.dsc.inc
+
+[LibraryClasses]
+  #
+  # Basic
+  #
+  BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
+  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+
+  
CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+  
DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
+  
ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
+  FvLib|StandaloneMmPkg/Library/FvLib/FvLib.inf
+  HobLib|StandaloneMmPkg/Library/StandaloneMmHobLib/StandaloneMmHobLib.inf
+  IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+  MemLib|StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf
+  
MemoryAllocationLib|StandaloneMmPkg/Library/StandaloneMmCoreMemoryAllocationLib/StandaloneMmCoreMemoryAllocationLib.inf
+  
MmServicesTableLib|MdePkg/Library/StandaloneMmServicesTableLib/StandaloneMmServicesTableLib.inf
+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+  
PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
+  PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+  
ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf
+  
StandaloneMmCoreEntryPoint|StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf
+  
StandaloneMmDriverEntryPoint|MdePkg/Library/StandaloneMmDriverEntryPoint/StandaloneMmDriverEntryPoint.inf
+  
VariableMmDependency|StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf
+
+  # ARM PL011 UART Driver
+  
PL011UartClockLib|ArmPlatformPkg/Library/PL011UartClockLib/PL011UartClockLib.inf
+  PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
+  
SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
+
+[LibraryClasses.AARCH64, LibraryClasses.ARM]
+  ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
+  
StandaloneMmMmuLib|ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf
+  ArmSvcLib|ArmPkg/Library/ArmSvcLib/ArmSvcLib.inf
+  
CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
+  
PeCoffExtraActionLib|StandaloneMmPkg/Library/StandaloneMmPeCoffExtraActionLib/StandaloneMmPeCoffExtraActionLib.inf
+
+  NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
+  NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
+
+[LibraryClasses.common.MM_CORE_STANDALONE]
+  
HobLib|StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib.inf
+
+[LibraryClasses.common.MM_STANDALONE]
+  
MemoryAllocationLib|StandaloneMmPkg/Library/StandaloneMmMemoryAllocationLib/StandaloneMmMemoryAllocationLib.inf
+
+  

[edk2-devel] [PATCH RESEND edk2-platforms v1 2/3] Platform/Arm: Enable UEFI Secure Variable support for FVP

[levi.yun]

UEFI Secure variable support can be enabled using Standalone MM
for FVP RevC model.

The following steps enable UEFI variable service using StandaloneMm:
  1. Add MmComminucationDxe.
  - Enables communication with StandaloneMm.
The PcdMmBufferBase & PcdBufferSize definitions are used
as the NS Shared Buffer for communication.
  2. Use VariableSmmRuntimeDxe
   - Use Standalone MM instance of Variable Runtime Dxe.
  3. Disable caching of variable data as this is cached on the
 normal world side. This is done to prevent arbitrary accesses.
 Therefore, set PcdEnableVariableRuntimeCache to FALSE.
  4. Although MmUnblockMemoryLib is required for supporting variable
 caching (which we disabled), we need a NULL instance of the
 MmUnblockMemoryLib for the build to succeed.
 Also, the Arm implementation does not support modification of
 the StandaloneMm memory map from normal world, so we have no
 real need for MmUnblockMemoryLib.

Signed-off-by: levi.yun 
---
 Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc | 49 +++-
 Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf |  9 
 2 files changed, 57 insertions(+), 1 deletion(-)

diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc 
b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
index 
f70a4d52ba06f570e017ab5286f06d87193753e5..e7c011cc8abe874ad24f7b6a0c8b8d0ab0d933f7
 100644
--- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
+++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
@@ -25,6 +25,15 @@ [Defines]
   SKUID_IDENTIFIER   = DEFAULT
   FLASH_DEFINITION   = 
Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf

+  # To allow the use of ueif secure variable feature, set this to TRUE.
+  DEFINE ENABLE_UEFI_SECURE_VARIABLE = FALSE
+
+!if $(ENABLE_UEFI_SECURE_VARIABLE) == TRUE
+  DEFINE ENABLE_STMM = TRUE
+!else
+  DEFINE ENABLE_STMM = FALSE
+!endif
+
 !ifndef ARM_FVP_RUN_NORFLASH
   DEFINE EDK2_SKIP_PEICORE=1
 !endif
@@ -53,6 +62,10 @@ [LibraryClasses.common]
   FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
 !endif

+!if $(ENABLE_UEFI_SECURE_VARIABLE) == TRUE
+  
MmUnblockMemoryLib|MdePkg/Library/MmUnblockMemoryLib/MmUnblockMemoryLibNull.inf
+!endif
+
   
DtPlatformDtbLoaderLib|Platform/ARM/VExpressPkg/Library/ArmVExpressDtPlatformDtbLoaderLib/ArmVExpressDtPlatformDtbLoaderLib.inf

 [LibraryClasses.common.DXE_RUNTIME_DRIVER]
@@ -71,7 +84,9 @@ [LibraryClasses.common.UEFI_DRIVER, 
LibraryClasses.common.UEFI_APPLICATION, Libr

 [BuildOptions]
   GCC:*_*_AARCH64_PLATFORM_FLAGS == 
-I$(WORKSPACE)/Platform/ARM/VExpressPkg/Include/Platform/RTSM
-
+!if $(ENABLE_UEFI_SECURE_VARIABLE) == TRUE
+  GCC:*_*_*_CC_FLAGS = -DENABLE_UEFI_SECURE_VARIABLE
+!endif

 

 #
@@ -85,6 +100,11 @@ [PcdsFeatureFlag.common]
   #  It could be set FALSE to save size.
   gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE

+!if $(ENABLE_UEFI_SECURE_VARIABLE) == TRUE
+  ## Disable Runtime Variable Cache.
+  gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache|FALSE
+!endif
+
 [PcdsFixedAtBuild.common]
   # Only one core enters UEFI, and PSCI is implemented in EL3 by ATF
   gArmPlatformTokenSpaceGuid.PcdCoreCount|1
@@ -92,12 +112,26 @@ [PcdsFixedAtBuild.common]
   #
   # NV Storage PCDs. Use base of 0x0C00 for NOR1
   #
+!if $(ENABLE_UEFI_SECURE_VARIABLE) == FALSE
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0FFC
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0001
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0FFD
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x0001
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0FFE
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x0001
+!endif
+
+  #
+  # Set the base address and size of the buffer used
+  # by MM_COMMUNICATE for communication between the
+  # Normal world edk2 and the StandaloneMm image at S-EL0.
+  # This buffer is allocated in TF-A.
+  #
+!if $(ENABLE_STMM) == TRUE
+  ## MM Communicate
+  gArmTokenSpaceGuid.PcdMmBufferBase|0xFF60
+  gArmTokenSpaceGuid.PcdMmBufferSize|0x1
+!endif

   gArmTokenSpaceGuid.PcdVFPEnabled|1

@@ -252,6 +286,10 @@ [Components.common]
   MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
 !endif
   MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+
+!if $(ENABLE_UEFI_SECURE_VARIABLE) == TRUE
+  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
+!else
   MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
 
   
NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
@@ -259,6 +297,8 @@ [Components.common]
   BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
   }
   

[edk2-devel] [PATCH RESEND edk2-platforms v1 0/3] Platform/Arm: StandloneMm support for FVP.

[levi.yun]

This patch adds StandloneMm feature on FVP RevC & AEMvA.
StandaloneMm will be used for UEFI secure Variable support on these
models.

  levi.yun (3):
  Platform/Arm: FVP: Add a NorFlashLib instance for StandaloneMm
  Platform/Arm: Enable UEFI Secure Variable support for FVP
  Platform/Arm: Add Standalone MM support for FVP

 Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc   
|  49 -
 Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf   
|   9 +
 Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpress.c  
|  34 +---
 
Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf
 |   3 +-
 Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashInfo.c 
|  42 
 Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashStMmInfo.c 
|  28 +++
 Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashStMmLib.inf
|  30 +++
 Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc  
| 208 
 Platform/ARM/VExpressPkg/PlatformStandaloneMm.fdf  
| 106 ++
 9 files changed, 477 insertions(+), 32 deletions(-)
 create mode 100644 
Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashInfo.c
 create mode 100644 
Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashStMmInfo.c
 create mode 100644 
Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashStMmLib.inf
 create mode 100644 Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
 create mode 100644 Platform/ARM/VExpressPkg/PlatformStandaloneMm.fdf

--
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Re: [edk2-devel] [PATCH 1/1] MdePkg: Add EFI_UNSUPPORTED return for some Runtime Service functions

[Ren, Suqiang]

Hi All,

Any comments about this patch?

Thanks
Ren, Suqiang

-Original Message-
From: Ren, SuqiangX 
Sent: Thursday, January 11, 2024 5:05 PM
To: devel@edk2.groups.io
Cc: Kinney, Michael D ; Gao, Liming 
; Liu, Zhiguang 
Subject: RE: [edk2-devel] [PATCH 1/1] MdePkg: Add EFI_UNSUPPORTED return for 
some Runtime Service functions

Hi All,

Any comments about this patch?

Thanks
Ren, Suqiang

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Ren, Suqiang
Sent: Wednesday, December 27, 2023 4:47 PM
To: devel@edk2.groups.io
Cc: Kinney, Michael D ; Gao, Liming 
; Liu, Zhiguang 
Subject: [edk2-devel] [PATCH 1/1] MdePkg: Add EFI_UNSUPPORTED return for some 
Runtime Service functions

According to UEFI Spec 2.10 page 206, if any EFI_RUNTIME_SERVICES* calls are 
not supported for use by the OS at runtime, an EFI_RT_PROPERTIES_TABLE 
configuration table should be published describing which runtime services are 
supported at runtime. So need to add EFI_UNSUPPORTED return for some Runtime 
Service functions.

REF: UEFI spec 2.10 section 8 Services — Runtime Services

Signed-off-by: Suqiang Ren 
Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
---
 MdePkg/Include/Uefi/UefiSpec.h | 40 --
 1 file changed, 38 insertions(+), 2 deletions(-)

diff --git a/MdePkg/Include/Uefi/UefiSpec.h b/MdePkg/Include/Uefi/UefiSpec.h 
index 5de00e8ea2af..b25485b06763 100644
--- a/MdePkg/Include/Uefi/UefiSpec.h
+++ b/MdePkg/Include/Uefi/UefiSpec.h
@@ -320,6 +320,9 @@ EFI_STATUS
 map that requires a mapping.
   @retval EFI_NOT_FOUND A virtual address was supplied for an address 
that is not found
 in the memory map.
+  @retval EFI_UNSUPPORTED   This call is not supported by this platform at 
the time the call is made.
+The platform should describe this runtime 
service as unsupported at runtime
+via an EFI_RT_PROPERTIES_TABLE configuration 
table.
 
 **/
 typedef
@@ -415,6 +418,9 @@ EFI_STATUS
 not have the EFI_OPTIONAL_PTR bit set.
   @retval EFI_NOT_FOUND The pointer pointed to by Address was not 
found to be part
 of the current memory map. This is normally 
fatal.
+  @retval EFI_UNSUPPORTED   This call is not supported by this platform at 
the time the call is made.
+The platform should describe this runtime 
service as unsupported at runtime
+via an EFI_RT_PROPERTIES_TABLE configuration 
table.
 
 **/
 typedef
@@ -679,6 +685,10 @@ VOID
   @retval EFI_INVALID_PARAMETER  The DataSize is not too small and Data is 
NULL.
   @retval EFI_DEVICE_ERROR   The variable could not be retrieved due to a 
hardware error.
   @retval EFI_SECURITY_VIOLATION The variable could not be retrieved due to an 
authentication failure.
+  @retval EFI_UNSUPPORTEDAfter ExitBootServices() has been called, 
this return code may be returned
+ if no variable storage is supported. The 
platform should describe this
+ runtime service as unsupported at runtime via 
an EFI_RT_PROPERTIES_TABLE
+ configuration table.
 
 **/
 typedef
@@ -715,6 +725,10 @@ EFI_STATUS
   @retval EFI_INVALID_PARAMETER Null-terminator is not found in the first 
VariableNameSize bytes of
 the input VariableName buffer.
   @retval EFI_DEVICE_ERROR  The variable could not be retrieved due to a 
hardware error.
+  @retval EFI_UNSUPPORTED   After ExitBootServices() has been called, this 
return code may be returned
+if no variable storage is supported. The 
platform should describe this
+runtime service as unsupported at runtime via 
an EFI_RT_PROPERTIES_TABLE
+configuration table.
 
 **/
 typedef
@@ -757,6 +771,9 @@ EFI_STATUS
  but the AuthInfo does NOT pass the validation 
check carried out by the firmware.
 
   @retval EFI_NOT_FOUND  The variable trying to be updated or deleted 
was not found.
+  @retval EFI_UNSUPPORTEDThis call is not supported by this platform 
at the time the call is made.
+ The platform should describe this runtime 
service as unsupported at runtime
+ via an EFI_RT_PROPERTIES_TABLE configuration 
table.
 
 **/
 typedef
@@ -809,6 +826,9 @@ typedef struct {
   @retval EFI_SUCCESS   The operation completed successfully.
   @retval EFI_INVALID_PARAMETER Time is NULL.
   @retval EFI_DEVICE_ERROR  The time could not be retrieved due to 
hardware error.
+  @retval EFI_UNSUPPORTED   This call is not supported by this platform at 
the time the call is 

Re: [edk2-devel] [PATCH V2 1/1] MdePkg: Update the definition of FileName on EFI_FILE_INFO

[Ren, Suqiang]

Hi All,

Any comments about this patch?

Thanks
Ren, Suqiang

-Original Message-
From: Ren, SuqiangX 
Sent: Thursday, January 11, 2024 5:04 PM
To: devel@edk2.groups.io
Cc: Kinney, Michael D ; Gao, Liming 
; Liu, Zhiguang 
Subject: RE: [edk2-devel] [PATCH V2 1/1] MdePkg: Update the definition of 
FileName on EFI_FILE_INFO

Hi All,

Any comments about this patch?

Thanks
Ren, Suqiang

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Ren, Suqiang
Sent: Tuesday, December 26, 2023 1:22 PM
To: devel@edk2.groups.io
Cc: Kinney, Michael D ; Gao, Liming 
; Liu, Zhiguang 
Subject: [edk2-devel] [PATCH V2 1/1] MdePkg: Update the definition of FileName 
on EFI_FILE_INFO

Add the description of FileName to align with UEFI spec 2.10.

REF: UEFI spec 2.10 Table 13.5.16

Signed-off-by: Suqiang Ren 
Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
---
 MdePkg/Include/Guid/FileInfo.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MdePkg/Include/Guid/FileInfo.h b/MdePkg/Include/Guid/FileInfo.h 
index 2b7edf36aabc..c152789b40c8 100644
--- a/MdePkg/Include/Guid/FileInfo.h
+++ b/MdePkg/Include/Guid/FileInfo.h
@@ -46,7 +46,7 @@ typedef struct {
   ///
   UINT64  Attribute;
   ///
-  /// The Null-terminated name of the file.
+  /// The Null-terminated name of the file. For a root directory, the name is 
an empty string.
   ///
   CHAR16  FileName[1];
 } EFI_FILE_INFO;
--
2.26.2.windows.1








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Re: [edk2-devel] [edk2-redfish-client][PATCH] RedfishClientPkg/RedfishFeatureUtilityLib: fix wrong parameter issue

[Chang, Abner via groups.io]

[AMD Official Use Only - General]

Reviewed-by: Abner Chang 

> -Original Message-
> From: Nickle Wang 
> Sent: Friday, January 19, 2024 2:23 PM
> To: devel@edk2.groups.io
> Cc: Chang, Abner ; Igor Kulchytskyy
> ; Nick Ramirez 
> Subject: [edk2-redfish-client][PATCH]
> RedfishClientPkg/RedfishFeatureUtilityLib: fix wrong parameter issue
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> Third parameter of AsciiStrToUnicodeStrS is the number of character in
> destination buffer, not the size in byte of destination buffer. This
> creates failure of converting ASCII string to Unicode string in Redfish
> application while getting Location field in HTTP header.
>
> Signed-off-by: Nickle Wang 
> Cc: Abner Chang 
> Cc: Igor Kulchytskyy 
> Cc: Nick Ramirez 
> ---
>  .../RedfishFeatureUtilityLib.c | 10 ++
>  1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git
> a/RedfishClientPkg/Library/RedfishFeatureUtilityLib/RedfishFeatureUtilityLib.
> c
> b/RedfishClientPkg/Library/RedfishFeatureUtilityLib/RedfishFeatureUtilityLib.
> c
> index a10fa4832..e14944710 100644
> ---
> a/RedfishClientPkg/Library/RedfishFeatureUtilityLib/RedfishFeatureUtilityLib.
> c
> +++
> b/RedfishClientPkg/Library/RedfishFeatureUtilityLib/RedfishFeatureUtilityLib.
> c
> @@ -355,7 +355,7 @@ StrUnicodeToAscii (
>
>Status = UnicodeStrToAsciiStrS (UnicodeStr, AsciiStr, AsciiStrSize);
>if (EFI_ERROR (Status)) {
> -DEBUG ((DEBUG_ERROR, "UnicodeStrToAsciiStrS failed: %r\n", Status));
> +DEBUG ((DEBUG_ERROR, "%a: UnicodeStrToAsciiStrS failed: %r\n",
> __func__, Status));
>  FreePool (AsciiStr);
>  return NULL;
>}
> @@ -380,21 +380,23 @@ StrAsciiToUnicode (
>  {
>EFI_STRING  UnicodeStr;
>UINTN   UnicodeStrSize;
> +  UINTN   InputStrSize;
>EFI_STATUS  Status;
>
>if (IS_EMPTY_STRING (AsciiStr)) {
>  return NULL;
>}
>
> -  UnicodeStrSize = (AsciiStrLen (AsciiStr) + 1) * sizeof (CHAR16);
> +  InputStrSize   = AsciiStrSize (AsciiStr);
> +  UnicodeStrSize = InputStrSize * sizeof (CHAR16);
>UnicodeStr = AllocatePool (UnicodeStrSize);
>if (UnicodeStr == NULL) {
>  return NULL;
>}
>
> -  Status = AsciiStrToUnicodeStrS (AsciiStr, UnicodeStr, UnicodeStrSize);
> +  Status = AsciiStrToUnicodeStrS (AsciiStr, UnicodeStr, InputStrSize);
>if (EFI_ERROR (Status)) {
> -DEBUG ((DEBUG_ERROR, "t failed: %r\n", Status));
> +DEBUG ((DEBUG_ERROR, "%a: AsciiStrToUnicodeStrS failed: %r\n",
> __func__, Status));
>  FreePool (UnicodeStr);
>  return NULL;
>}
> --
> 2.34.1



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