Re: [edk2-devel] [PATCH] MdeModulePkg/Xhci: Skip another size round up for TRB address translation

2024-03-08 Thread Dat Mach via groups.io
Hi Gao and Hao,

Could you please take a look at my patch and see if anything I might have 
missed?

Thanks,
Dat

-Original Message-
From: gaoliming  
Sent: Monday, March 4, 2024 4:34 PM
To: Dat Mach ; devel@edk2.groups.io
Cc: gao.ch...@intel.com; hao.a...@intel.com; ray...@intel.com
Subject: 回复: [PATCH] MdeModulePkg/Xhci: Skip another size round up for TRB 
address translation

External email: Use caution opening links or attachments


This change looks good. Reviewed-by: Liming Gao 

Cheng and Hao:
  Have you any comments for this patch?

Thanks
Liming
> -邮件原件-
> 发件人: Dat Mach 
> 发送时间: 2024年2月26日 10:00
> 收件人: devel@edk2.groups.io
> 抄送: gao.ch...@intel.com; hao.a...@intel.com; ray...@intel.com; 
> gaolim...@byosoft.com.cn; Dat Mach 
> 主题: [PATCH] MdeModulePkg/Xhci: Skip another size round up for TRB 
> address translation
>
> REF:https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2F
> bugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D4560&data=05%7C02%7Cdmach
> %40nvidia.com%7C135326cf31634dbe703e08dc3cac0417%7C43083d15727340c1b7d
> b39efd9ccc17a%7C0%7C0%7C638451956723393894%7CUnknown%7CTWFpbGZsb3d8eyJ
> WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C
> %7C%7C&sdata=JlpbOr0QHodUF7QDJZl5gY88maLemat4ktudCyDShMQ%3D&reserved=0
>
> Commit f36e1ec1f0a5fd3be84913e09181d7813444b620 had fixed the 
> DXE_ASSERT caused by the TRB size round up from 16 to 64 for most 
> cases.
>
> However, there is a remaining case that the TRB size is also rounded 
> up during setting TR dequeue pointer that would trigger DXE_ASSERT.
>
> This patch sets the alignment flag to FALSE in XhcSetTrDequeuePointer 
> to fix this issue as well.
>
> Signed-off-by: Dat Mach 
> ---
>  MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 2 +-  
> MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
> b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
> index 05528a478b..5d735008ba 100644
> --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
> +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
> @@ -3539,7 +3539,7 @@ XhcSetTrDequeuePointer (
>// Send stop endpoint command to transit Endpoint from running to 
> stop state
>//
>ZeroMem (&CmdSetTRDeq, sizeof (CmdSetTRDeq));
> -  PhyAddr  = UsbHcGetPciAddrForHostAddr (Xhc->MemPool,
> Urb->Ring->RingEnqueue, sizeof (CMD_SET_TR_DEQ_POINTER), TRUE);
> +  PhyAddr  = UsbHcGetPciAddrForHostAddr
> (Xhc->MemPool, Urb->Ring->RingEnqueue, sizeof 
> (CMD_SET_TR_DEQ_POINTER), FALSE);
>CmdSetTRDeq.PtrLo= XHC_LOW_32BIT (PhyAddr) |
> Urb->Ring->RingPCS;
>CmdSetTRDeq.PtrHi= XHC_HIGH_32BIT (PhyAddr);
>CmdSetTRDeq.CycleBit = 1;
> diff --git a/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c
> b/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c
> index 53272f62dd..c956e45907 100644
> --- a/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c
> +++ b/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c
> @@ -2526,7 +2526,7 @@ XhcPeiSetTrDequeuePointer (
>// Send stop endpoint command to transit Endpoint from running to 
> stop state
>//
>ZeroMem (&CmdSetTRDeq, sizeof (CmdSetTRDeq));
> -  PhyAddr  = UsbHcGetPciAddrForHostAddr (Xhc->MemPool,
> Urb->Ring->RingEnqueue, sizeof (CMD_SET_TR_DEQ_POINTER), TRUE);
> +  PhyAddr  = UsbHcGetPciAddrForHostAddr
> (Xhc->MemPool, Urb->Ring->RingEnqueue, sizeof 
> (CMD_SET_TR_DEQ_POINTER), FALSE);
>CmdSetTRDeq.PtrLo= XHC_LOW_32BIT (PhyAddr) |
> Urb->Ring->RingPCS;
>CmdSetTRDeq.PtrHi= XHC_HIGH_32BIT (PhyAddr);
>CmdSetTRDeq.CycleBit = 1;
> --
> 2.44.0.rc2





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[edk2-devel] [PATCH V1] MdePkg: Update GetImage , GetImageInfo description details

2024-03-08 Thread Pethaiyan Madhan
1.For EFI_FIRMWARE_MANAGEMENT_PROTOCOL.GetImage():
Add the following sentence at the end of the Image parameter
description. "May be NULL with a zero ImageSize in order to determine
the size of the buffer needed".

Modify the description of "EFI_INVALID_PARAMETER" return code as "The
ImageSize is not too small and Image is NULL."

2.For EFI_FIRMWARE_MANAGEMENT_PROTOCOL.GetImageInfo():
Add the following sentence at the end of the ImageInfo parameter
description."May be NULL with a zero ImageInfoSize in order to
determine the size of the buffer needed".

Modify the description of "EFI_INVALID_PARAMETER" return code as "The
ImageInfoSize is not too small and Image is NULL." and add new
descriptions for "EFI_INVALID_PARAMETER" return code.

 REF: UEFI spec v2.10 23.1.2
 REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4660

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Cc: Yi Li 
Cc: GuoX Xu 
Signed-off-by: Pethaiyan Madhan 
---
 MdePkg/Include/Protocol/FirmwareManagement.h | 14 --
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/MdePkg/Include/Protocol/FirmwareManagement.h 
b/MdePkg/Include/Protocol/FirmwareManagement.h
index e535bb697d..90b7d83c8f 100644
--- a/MdePkg/Include/Protocol/FirmwareManagement.h
+++ b/MdePkg/Include/Protocol/FirmwareManagement.h
@@ -294,6 +294,8 @@ EFI_STATUS
  to contain the image(s) information if 
the buffer was too small.
   @param[in, out] ImageInfo  A pointer to the buffer in which firmware 
places the current image(s)
  information. The information is an array 
of EFI_FIRMWARE_IMAGE_DESCRIPTORs.
+ May be NULL with a zero ImageInfoSize in 
order to determine the size of the
+ buffer needed.
   @param[out] DescriptorVersion  A pointer to the location in which 
firmware returns the version number
  associated with the 
EFI_FIRMWARE_IMAGE_DESCRIPTOR.
   @param[out] DescriptorCountA pointer to the location in which 
firmware returns the number of
@@ -314,7 +316,12 @@ EFI_STATUS
   @retval EFI_SUCCESSThe device was successfully updated with 
the new image.
   @retval EFI_BUFFER_TOO_SMALL   The ImageInfo buffer was too small. The 
current buffer size
  needed to hold the image(s) information 
is returned in ImageInfoSize.
-  @retval EFI_INVALID_PARAMETER  ImageInfoSize is NULL.
+  @retval EFI_INVALID_PARAMETER  ImageInfoSize is not too small and 
ImageInfo is NULL.
+  @retval EFI_INVALID_PARAMETER  ImageInfoSize is non-zero and 
DescriptorVersion is NULL.
+  @retval EFI_INVALID_PARAMETER  ImageInfoSize is non-zero and 
DescriptorCount is NULL.
+  @retval EFI_INVALID_PARAMETER  ImageInfoSize is non-zero and 
DescriptorSize is NULL.
+  @retval EFI_INVALID_PARAMETER  ImageInfoSize is non-zero and 
PackageVersion is NULL.
+  @retval EFI_INVALID_PARAMETER  ImageInfoSize is non-zero and 
PackageVersionName is NULL.
   @retval EFI_DEVICE_ERROR   Valid information could not be returned. 
Possible corrupted image.
 
 **/
@@ -341,6 +348,9 @@ EFI_STATUS
   @param[in]  ImageIndex A unique number identifying the firmware 
image(s) within the device.
  The number is between 1 and DescriptorCount.
   @param[out] Image  Points to the buffer where the current image 
is copied to.
+ May be NULL with a zero ImageSize in order to 
determine the size of the
+ buffer needed.
+
   @param[in, out] ImageSize  On entry, points to the size of the buffer 
pointed to by Image, in bytes.
  On return, points to the length of the image, 
in bytes.
 
@@ -348,7 +358,7 @@ EFI_STATUS
   @retval EFI_BUFFER_TOO_SMALL   The buffer specified by ImageSize is too 
small to hold the
  image. The current buffer size needed to hold 
the image is returned
  in ImageSize.
-  @retval EFI_INVALID_PARAMETER  The Image was NULL.
+  @retval EFI_INVALID_PARAMETER  The ImageSize is not too small and Image is 
NULL.
   @retval EFI_NOT_FOUND  The current image is not copied to the buffer.
   @retval EFI_UNSUPPORTEDThe operation is not supported.
   @retval EFI_SECURITY_VIOLATION The operation could not be performed due to 
an authentication failure.
-- 
2.38.1.windows.1



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[edk2-devel] [PATCH V1] SignedCapsulePkg: Update GetImage and GetImageInfo description details

2024-03-08 Thread Pethaiyan Madhan
1.For EFI_FIRMWARE_MANAGEMENT_PROTOCOL.GetImage():
Add the following sentence at the end of the Image parameter
description. "May be NULL with a zero ImageSize in order to determine
the size of the buffer needed".

Modify the description of "EFI_INVALID_PARAMETER" return code as "The
ImageSize is not too small and Image is NULL."

2.For EFI_FIRMWARE_MANAGEMENT_PROTOCOL.GetImageInfo():
Add the following sentence at the end of the ImageInfo parameter
description."May be NULL with a zero ImageInfoSize in order to
determine the size of the buffer needed".

Modify the description of "EFI_INVALID_PARAMETER" return code as "The
ImageInfoSize is not too small and Image is NULL." and add new
descriptions for "EFI_INVALID_PARAMETER" return code.

 REF: UEFI spec v2.10 23.1.2
 REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4660

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Cc: Yi Li 
Cc: GuoX Xu 
Signed-off-by: Pethaiyan Madhan 
---
 .../SystemFirmwareUpdate/SystemFirmwareCommonDxe.c  | 13 +++--
 .../SystemFirmwareUpdate/SystemFirmwareDxe.h| 13 +++--
 2 files changed, 22 insertions(+), 4 deletions(-)

diff --git 
a/SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareCommonDxe.c 
b/SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareCommonDxe.c
index 077bd0cb31..6e394d85d4 100644
--- a/SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareCommonDxe.c
+++ b/SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareCommonDxe.c
@@ -34,6 +34,8 @@ EFI_FIRMWARE_MANAGEMENT_PROTOCOL  mFirmwareManagementProtocol 
= {
  to contain the image(s) information if 
the buffer was too small.
   @param[in, out] ImageInfo  A pointer to the buffer in which firmware 
places the current image(s)
  information. The information is an array 
of EFI_FIRMWARE_IMAGE_DESCRIPTORs.
+ May be NULL with a zero ImageInfoSize in 
order to determine the size of the
+ buffer needed.
   @param[out] DescriptorVersion  A pointer to the location in which 
firmware returns the version number
  associated with the 
EFI_FIRMWARE_IMAGE_DESCRIPTOR.
   @param[out] DescriptorCountA pointer to the location in which 
firmware returns the number of
@@ -54,7 +56,12 @@ EFI_FIRMWARE_MANAGEMENT_PROTOCOL  
mFirmwareManagementProtocol = {
   @retval EFI_SUCCESSThe device was successfully updated with 
the new image.
   @retval EFI_BUFFER_TOO_SMALL   The ImageInfo buffer was too small. The 
current buffer size
  needed to hold the image(s) information 
is returned in ImageInfoSize.
-  @retval EFI_INVALID_PARAMETER  ImageInfoSize is NULL.
+  @retval EFI_INVALID_PARAMETER  ImageInfoSize is not too small and 
ImageInfo is NULL.
+  @retval EFI_INVALID_PARAMETER  ImageInfoSize is non-zero and 
DescriptorVersion is NULL.
+  @retval EFI_INVALID_PARAMETER  ImageInfoSize is non-zero and 
DescriptorCount is NULL.
+  @retval EFI_INVALID_PARAMETER  ImageInfoSize is non-zero and 
DescriptorSize is NULL.
+  @retval EFI_INVALID_PARAMETER  ImageInfoSize is non-zero and 
PackageVersion is NULL.
+  @retval EFI_INVALID_PARAMETER  ImageInfoSize is non-zero and 
PackageVersionName is NULL.
   @retval EFI_DEVICE_ERROR   Valid information could not be returned. 
Possible corrupted image.
 
 **/
@@ -153,6 +160,8 @@ FmpGetImageInfo (
   @param[in] ImageIndex  A unique number identifying the firmware 
image(s) within the device.
  The number is between 1 and DescriptorCount.
   @param[in,out] Image   Points to the buffer where the current image 
is copied to.
+ May be NULL with a zero ImageSize in order to 
determine the size of the
+ buffer needed.
   @param[in,out] ImageSize   On entry, points to the size of the buffer 
pointed to by Image, in bytes.
  On return, points to the length of the image, 
in bytes.
 
@@ -160,7 +169,7 @@ FmpGetImageInfo (
   @retval EFI_BUFFER_TOO_SMALL   The buffer specified by ImageSize is too 
small to hold the
  image. The current buffer size needed to hold 
the image is returned
  in ImageSize.
-  @retval EFI_INVALID_PARAMETER  The Image was NULL.
+  @retval EFI_INVALID_PARAMETER  The ImageSize is not too small and Image is 
NULL
   @retval EFI_NOT_FOUND  The current image is not copied to the buffer.
   @retval EFI_UNSUPPORTEDThe operation is not supported.
   @retval EFI_SECURITY_VIOLATION The operation could not be performed due to 
an authentication failure.
diff --git 
a/SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareDxe.h 
b/SignedCapsulePkg/Universal/SystemFirmwareUp

[edk2-devel] [PATCH V5] FmpDevicePkg: GetImageInfo Add missing conditions

2024-03-08 Thread Pethaiyan Madhan
1.For EFI_FIRMWARE_MANAGEMENT_PROTOCOL.GetImage():
Add the following sentence at the end of the Image parameter
description. "May be NULL with a zero ImageSize in order to determine
the size of the buffer needed".

Modify the description of "EFI_INVALID_PARAMETER" return code as "The
ImageSize is not too small and Image is NULL."

2.For EFI_FIRMWARE_MANAGEMENT_PROTOCOL.GetImageInfo():
Add the following sentence at the end of the ImageInfo parameter
description."May be NULL with a zero ImageInfoSize in order to
determine the size of the buffer needed".

Modify the description of "EFI_INVALID_PARAMETER" return code as "The
ImageInfoSize is not too small and Image is NULL." and add new
descriptions for "EFI_INVALID_PARAMETER" return code.

 REF: UEFI spec v2.10 23.1.2
 REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4660

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Cc: Yi Li 
Cc: GuoX Xu 
Signed-off-by: Pethaiyan Madhan 
---
 FmpDevicePkg/FmpDxe/FmpDxe.c | 20 +++-
 FmpDevicePkg/FmpDxe/FmpDxe.h | 15 ---
 2 files changed, 27 insertions(+), 8 deletions(-)

diff --git a/FmpDevicePkg/FmpDxe/FmpDxe.c b/FmpDevicePkg/FmpDxe/FmpDxe.c
index 1e7ec4a09e..1d580c9f69 100644
--- a/FmpDevicePkg/FmpDxe/FmpDxe.c
+++ b/FmpDevicePkg/FmpDxe/FmpDxe.c
@@ -43,7 +43,7 @@ const FIRMWARE_MANAGEMENT_PRIVATE_DATA  
mFirmwareManagementPrivateDataTemplate =
   FIRMWARE_MANAGEMENT_PRIVATE_DATA_SIGNATURE, // Signature
   NULL,   // Handle
   {// Fmp
-GetTheImageInfo,
+GetImageInfo,
 GetTheImage,
 SetTheImage,
 CheckTheImage,
@@ -417,6 +417,8 @@ PopulateDescriptor (
  to contain the image(s) information if 
the buffer was too small.
   @param[in, out] ImageInfo  A pointer to the buffer in which firmware 
places the current image(s)
  information. The information is an array 
of EFI_FIRMWARE_IMAGE_DESCRIPTORs.
+ May be NULL with a zero ImageInfoSize in 
order to determine the size of the
+ buffer needed.
   @param[out] DescriptorVersion  A pointer to the location in which 
firmware returns the version number
  associated with the 
EFI_FIRMWARE_IMAGE_DESCRIPTOR.
   @param[out] DescriptorCountA pointer to the location in which 
firmware returns the number of
@@ -437,13 +439,18 @@ PopulateDescriptor (
   @retval EFI_SUCCESSThe device was successfully updated with 
the new image.
   @retval EFI_BUFFER_TOO_SMALL   The ImageInfo buffer was too small. The 
current buffer size
  needed to hold the image(s) information 
is returned in ImageInfoSize.
-  @retval EFI_INVALID_PARAMETER  ImageInfoSize is NULL.
+  @retval EFI_INVALID_PARAMETER  ImageInfoSize is not too small and 
ImageInfo is NULL.
+  @retval EFI_INVALID_PARAMETER  ImageInfoSize is non-zero and 
DescriptorVersion is NULL.
+  @retval EFI_INVALID_PARAMETER  ImageInfoSize is non-zero and 
DescriptorCount is NULL.
+  @retval EFI_INVALID_PARAMETER  ImageInfoSize is non-zero and 
DescriptorSize is NULL.
+  @retval EFI_INVALID_PARAMETER  ImageInfoSize is non-zero and 
PackageVersion is NULL.
+  @retval EFI_INVALID_PARAMETER  ImageInfoSize is non-zero and 
PackageVersionName is NULL.
   @retval EFI_DEVICE_ERROR   Valid information could not be returned. 
Possible corrupted image.
 
 **/
 EFI_STATUS
 EFIAPI
-GetTheImageInfo (
+GetImageInfo (
   IN EFI_FIRMWARE_MANAGEMENT_PROTOCOL  *This,
   IN OUT UINTN *ImageInfoSize,
   IN OUT EFI_FIRMWARE_IMAGE_DESCRIPTOR *ImageInfo,
@@ -495,7 +502,7 @@ GetTheImageInfo (
   // Confirm that buffer isn't null
   //
   if (  (ImageInfo == NULL) || (DescriptorVersion == NULL) || (DescriptorCount 
== NULL) || (DescriptorSize == NULL)
- || (PackageVersion == NULL))
+ || (PackageVersion == NULL) || (PackageVersionName == NULL))
   {
 DEBUG ((DEBUG_ERROR, "FmpDxe(%s): GetImageInfo() - Pointer Parameter is 
NULL.\n", mImageIdName));
 Status = EFI_INVALID_PARAMETER;
@@ -544,6 +551,9 @@ cleanup:
   @param[in]  ImageIndex A unique number identifying the firmware 
image(s) within the device.
  The number is between 1 and DescriptorCount.
   @param[in, out] Image  Points to the buffer where the current image 
is copied to.
+ May be NULL with a zero ImageSize in order to 
determine the size of the
+ buffer needed.
+
   @param[in, out] ImageSize  On entry, points to the size of the buffer 
pointed to by Image, in bytes.
  On return, points to the length of the image, 
in bytes.
 
@@ -551,7 +561,7 @@ cleanup:
   @retval EFI_BUFFER_TOO_SMALL   The buffer spe

Re: [edk2-devel] [PATCH] NetworkPkg Update Security Patch

2024-03-08 Thread Michael D Kinney
>From this CI run, you can see there are other packages impacted by
this change.  Missing RngLib mappings.  Is this expected?

https://dev.azure.com/tianocore/edk2-ci/_build/results?buildId=120372&view=logs&jobId=56079008-74ef-5d1a-7db6-78cd637f5fd1&j=56079008-74ef-5d1a-7db6-78cd637f5fd1&t=717a0b6b-5e6c-5b81-aea3-d574ed7b6a91

Please update patches to address all these failures and resend to mailing list.

Thanks,

Mike


> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Michael
> D Kinney
> Sent: Friday, March 8, 2024 1:12 PM
> To: Kasbekar, Saloni ; Santhosh Kumar V
> ; devel@edk2.groups.io
> Cc: Sivaraman Nainar ; Raj V Akilan
> ; Mathews, John ; Clark-
> williams, Zachary ; Kinney, Michael D
> 
> Subject: Re: [edk2-devel] [PATCH] NetworkPkg Update Security Patch
> 
> Acked-by: Michael D Kinney 
> 
> > -Original Message-
> > From: Kasbekar, Saloni 
> > Sent: Wednesday, February 7, 2024 2:58 PM
> > To: Santhosh Kumar V ; devel@edk2.groups.io
> > Cc: Sivaraman Nainar ; Raj V Akilan
> > ; Kinney, Michael D ;
> > Mathews, John ; Clark-williams, Zachary
> > 
> > Subject: RE: [PATCH] NetworkPkg Update Security Patch
> >
> > Reviewed-by: Saloni Kasbekar 
> >
> > -Original Message-
> > From: Santhosh Kumar V 
> > Sent: Saturday, February 3, 2024 2:11 AM
> > To: devel@edk2.groups.io; Santhosh Kumar V 
> > Cc: Sivaraman Nainar ; Raj V Akilan
> > ; Kinney, Michael D ;
> > Kasbekar, Saloni ; Mathews, John
> > ; Clark-williams, Zachary  > willi...@intel.com>
> > Subject: [PATCH] NetworkPkg Update Security Patch
> >
> > Update Security patch for Bug 4541 (Predictable TCP ISNs)
> >
> > Cc: Saloni Kasbekar 
> > Cc: Zachary Clark-williams 
> >
> > Signed-off-by: SanthoshKumar 
> > ---
> >  NetworkPkg/Library/DxeNetLib/DxeNetLib.c   | 21 ++--
> -
> >  NetworkPkg/Library/DxeNetLib/DxeNetLib.inf |  2 +-
> >  NetworkPkg/TcpDxe/TcpDxe.inf   |  1 +
> >  NetworkPkg/TcpDxe/TcpMain.h|  1 +
> >  NetworkPkg/TcpDxe/TcpMisc.c|  7 ++-
> >  NetworkPkg/TcpDxe/TcpTimer.c   |  8 +---
> >  6 files changed, 28 insertions(+), 12 deletions(-)
> >
> > diff --git a/NetworkPkg/Library/DxeNetLib/DxeNetLib.c
> > b/NetworkPkg/Library/DxeNetLib/DxeNetLib.c
> > index fd4a9e15a8..d3cc8a59d4 100644
> > --- a/NetworkPkg/Library/DxeNetLib/DxeNetLib.c
> > +++ b/NetworkPkg/Library/DxeNetLib/DxeNetLib.c
> > @@ -31,6 +31,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> > #include 
> >
> >  #include 
> >
> >  #include 
> >
> > +#include 
> >
> >
> >
> >  #define NIC_ITEM_CONFIG_SIZE  (sizeof (NIC_IP4_CONFIG_INFO) + sizeof
> > (EFI_IP4_ROUTE_TABLE) * MAX_IP4_CONFIG_IN_VARIABLE)
> >
> >  #define DEFAULT_ZERO_START((UINTN) ~0)
> >
> > @@ -902,14 +903,20 @@ NetRandomInitSeed (
> >EFI_TIME  Time;
> >
> >UINT32Seed;
> >
> >UINT64MonotonicCount;
> >
> > +  UINT32RandomVal;
> >
> > +
> >
> > +  if ( TRUE == GetRandomNumber32(&RandomVal))
> >
> > +Seed = RandomVal;
> >
> > +  else
> >
> > +  {
> >
> > +gRT->GetTime (&Time, NULL);
> >
> > +Seed  = (Time.Hour << 24 | Time.Day << 16 | Time.Minute << 8 |
> > + Time.Second);
> >
> > +Seed ^= Time.Nanosecond;
> >
> > +Seed ^= Time.Year << 7;
> >
> >
> >
> > -  gRT->GetTime (&Time, NULL);
> >
> > -  Seed  = (Time.Hour << 24 | Time.Day << 16 | Time.Minute << 8 |
> > Time.Second);
> >
> > -  Seed ^= Time.Nanosecond;
> >
> > -  Seed ^= Time.Year << 7;
> >
> > -
> >
> > -  gBS->GetNextMonotonicCount (&MonotonicCount);
> >
> > -  Seed += (UINT32)MonotonicCount;
> >
> > +gBS->GetNextMonotonicCount (&MonotonicCount);
> >
> > +Seed += (UINT32)MonotonicCount;
> >
> > +  }
> >
> >
> >
> >return Seed;
> >
> >  }
> >
> > diff --git a/NetworkPkg/Library/DxeNetLib/DxeNetLib.inf
> > b/NetworkPkg/Library/DxeNetLib/DxeNetLib.inf
> > index 8145d256ec..2c800b7c00 100644
> > --- a/NetworkPkg/Library/DxeNetLib/DxeNetLib.inf
> > +++ b/NetworkPkg/Library/DxeNetLib/DxeNetLib.inf
> > @@ -43,7 +43,7 @@
> >MemoryAllocationLib
> >
> >DevicePathLib
> >
> >PrintLib
> >
> > -
> >
> > +  RngLib
> >
> >
> >
> >  [Guids]
> >
> >gEfiSmbiosTableGuid   ##
> SOMETIMES_CONSUMES
> > ## SystemTable
> >
> > diff --git a/NetworkPkg/TcpDxe/TcpDxe.inf
> > b/NetworkPkg/TcpDxe/TcpDxe.inf index c0acbdca57..99c093600f 100644
> > --- a/NetworkPkg/TcpDxe/TcpDxe.inf
> > +++ b/NetworkPkg/TcpDxe/TcpDxe.inf
> > @@ -67,6 +67,7 @@
> >DpcLib
> >
> >NetLib
> >
> >IpIoLib
> >
> > +  RngLib
> >
> >
> >
> >
> >
> >  [Protocols]
> >
> > diff --git a/NetworkPkg/TcpDxe/TcpMain.h
> b/NetworkPkg/TcpDxe/TcpMain.h
> > index c0c9b7f46e..f94598b6ba 100644
> > --- a/NetworkPkg/TcpDxe/TcpMain.h
> > +++ b/NetworkPkg/TcpDxe/TcpMain.h
> > @@ -16,6 +16,7 @@
> >  #include 
> >
> >  #include 
> >
> >  #include 
> >
> > +#include 
> >
> >
> >
> >  #include "Socket.h"
> >
> >  #include "TcpProto.h"
> >
> > diff --git a/NetworkPkg/TcpDxe/TcpMisc.c
> b/NetworkPkg/TcpDxe/TcpMis

Re: [edk2-devel] [PATCH] NetworkPkg Update Security Patch

2024-03-08 Thread Michael D Kinney
Acked-by: Michael D Kinney 

> -Original Message-
> From: Kasbekar, Saloni 
> Sent: Wednesday, February 7, 2024 2:58 PM
> To: Santhosh Kumar V ; devel@edk2.groups.io
> Cc: Sivaraman Nainar ; Raj V Akilan
> ; Kinney, Michael D ;
> Mathews, John ; Clark-williams, Zachary
> 
> Subject: RE: [PATCH] NetworkPkg Update Security Patch
> 
> Reviewed-by: Saloni Kasbekar 
> 
> -Original Message-
> From: Santhosh Kumar V 
> Sent: Saturday, February 3, 2024 2:11 AM
> To: devel@edk2.groups.io; Santhosh Kumar V 
> Cc: Sivaraman Nainar ; Raj V Akilan
> ; Kinney, Michael D ;
> Kasbekar, Saloni ; Mathews, John
> ; Clark-williams, Zachary  willi...@intel.com>
> Subject: [PATCH] NetworkPkg Update Security Patch
> 
> Update Security patch for Bug 4541 (Predictable TCP ISNs)
> 
> Cc: Saloni Kasbekar 
> Cc: Zachary Clark-williams 
> 
> Signed-off-by: SanthoshKumar 
> ---
>  NetworkPkg/Library/DxeNetLib/DxeNetLib.c   | 21 ++---
>  NetworkPkg/Library/DxeNetLib/DxeNetLib.inf |  2 +-
>  NetworkPkg/TcpDxe/TcpDxe.inf   |  1 +
>  NetworkPkg/TcpDxe/TcpMain.h|  1 +
>  NetworkPkg/TcpDxe/TcpMisc.c|  7 ++-
>  NetworkPkg/TcpDxe/TcpTimer.c   |  8 +---
>  6 files changed, 28 insertions(+), 12 deletions(-)
> 
> diff --git a/NetworkPkg/Library/DxeNetLib/DxeNetLib.c
> b/NetworkPkg/Library/DxeNetLib/DxeNetLib.c
> index fd4a9e15a8..d3cc8a59d4 100644
> --- a/NetworkPkg/Library/DxeNetLib/DxeNetLib.c
> +++ b/NetworkPkg/Library/DxeNetLib/DxeNetLib.c
> @@ -31,6 +31,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> #include 
> 
>  #include 
> 
>  #include 
> 
> +#include 
> 
> 
> 
>  #define NIC_ITEM_CONFIG_SIZE  (sizeof (NIC_IP4_CONFIG_INFO) + sizeof
> (EFI_IP4_ROUTE_TABLE) * MAX_IP4_CONFIG_IN_VARIABLE)
> 
>  #define DEFAULT_ZERO_START((UINTN) ~0)
> 
> @@ -902,14 +903,20 @@ NetRandomInitSeed (
>EFI_TIME  Time;
> 
>UINT32Seed;
> 
>UINT64MonotonicCount;
> 
> +  UINT32RandomVal;
> 
> +
> 
> +  if ( TRUE == GetRandomNumber32(&RandomVal))
> 
> +Seed = RandomVal;
> 
> +  else
> 
> +  {
> 
> +gRT->GetTime (&Time, NULL);
> 
> +Seed  = (Time.Hour << 24 | Time.Day << 16 | Time.Minute << 8 |
> + Time.Second);
> 
> +Seed ^= Time.Nanosecond;
> 
> +Seed ^= Time.Year << 7;
> 
> 
> 
> -  gRT->GetTime (&Time, NULL);
> 
> -  Seed  = (Time.Hour << 24 | Time.Day << 16 | Time.Minute << 8 |
> Time.Second);
> 
> -  Seed ^= Time.Nanosecond;
> 
> -  Seed ^= Time.Year << 7;
> 
> -
> 
> -  gBS->GetNextMonotonicCount (&MonotonicCount);
> 
> -  Seed += (UINT32)MonotonicCount;
> 
> +gBS->GetNextMonotonicCount (&MonotonicCount);
> 
> +Seed += (UINT32)MonotonicCount;
> 
> +  }
> 
> 
> 
>return Seed;
> 
>  }
> 
> diff --git a/NetworkPkg/Library/DxeNetLib/DxeNetLib.inf
> b/NetworkPkg/Library/DxeNetLib/DxeNetLib.inf
> index 8145d256ec..2c800b7c00 100644
> --- a/NetworkPkg/Library/DxeNetLib/DxeNetLib.inf
> +++ b/NetworkPkg/Library/DxeNetLib/DxeNetLib.inf
> @@ -43,7 +43,7 @@
>MemoryAllocationLib
> 
>DevicePathLib
> 
>PrintLib
> 
> -
> 
> +  RngLib
> 
> 
> 
>  [Guids]
> 
>gEfiSmbiosTableGuid   ## SOMETIMES_CONSUMES
> ## SystemTable
> 
> diff --git a/NetworkPkg/TcpDxe/TcpDxe.inf
> b/NetworkPkg/TcpDxe/TcpDxe.inf index c0acbdca57..99c093600f 100644
> --- a/NetworkPkg/TcpDxe/TcpDxe.inf
> +++ b/NetworkPkg/TcpDxe/TcpDxe.inf
> @@ -67,6 +67,7 @@
>DpcLib
> 
>NetLib
> 
>IpIoLib
> 
> +  RngLib
> 
> 
> 
> 
> 
>  [Protocols]
> 
> diff --git a/NetworkPkg/TcpDxe/TcpMain.h b/NetworkPkg/TcpDxe/TcpMain.h
> index c0c9b7f46e..f94598b6ba 100644
> --- a/NetworkPkg/TcpDxe/TcpMain.h
> +++ b/NetworkPkg/TcpDxe/TcpMain.h
> @@ -16,6 +16,7 @@
>  #include 
> 
>  #include 
> 
>  #include 
> 
> +#include 
> 
> 
> 
>  #include "Socket.h"
> 
>  #include "TcpProto.h"
> 
> diff --git a/NetworkPkg/TcpDxe/TcpMisc.c b/NetworkPkg/TcpDxe/TcpMisc.c
> index c93212d47d..4d33dd6ad6 100644
> --- a/NetworkPkg/TcpDxe/TcpMisc.c
> +++ b/NetworkPkg/TcpDxe/TcpMisc.c
> @@ -516,7 +516,12 @@ TcpGetIss (
>VOID
> 
>)
> 
>  {
> 
> -  mTcpGlobalIss += TCP_ISS_INCREMENT_1;
> 
> +  UINT32RandomVal;
> 
> +  if ( TRUE == GetRandomNumber32(&RandomVal))
> 
> +mTcpGlobalIss += RandomVal;
> 
> +  else
> 
> +mTcpGlobalIss += TCP_ISS_INCREMENT_1;
> 
> +
> 
>return mTcpGlobalIss;
> 
>  }
> 
> 
> 
> diff --git a/NetworkPkg/TcpDxe/TcpTimer.c
> b/NetworkPkg/TcpDxe/TcpTimer.c index 5d2e124977..3370e6b264 100644
> --- a/NetworkPkg/TcpDxe/TcpTimer.c
> +++ b/NetworkPkg/TcpDxe/TcpTimer.c
> @@ -481,10 +481,12 @@ TcpTickingDpc (
>LIST_ENTRY  *Next;
> 
>TCP_CB  *Tcb;
> 
>INT16   Index;
> 
> -
> 
> +  UINT32RandomVal;
> 
>mTcpTick++;
> 
> -  mTcpGlobalIss += TCP_ISS_INCREMENT_2;
> 
> -
> 
> +  if ( TRUE == GetRandomNumber32(&RandomVal))
> 
> +mTcpGlobalIss += RandomVal
> 
> +  else
> 
> +mTcpGlobalIss += TCP_ISS_INCREMENT_2;
> 
>//
> 
>// Don't use LIST_FOR_EACH, which isn't delete safe.
> 

Re: [edk2-devel] [PATCH v3 00/24] Provide SEV-SNP support for running under an SVSM

2024-03-08 Thread Lendacky, Thomas via groups.io

On 3/8/24 09:30, Lendacky, Thomas via groups.io wrote:


BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

This series adds SEV-SNP support for running OVMF under an Secure VM
Service Module (SVSM) at a less privileged VM Privilege Level (VMPL).
By running at a less priviledged VMPL, the SVSM can be used to provide
services, e.g. a virtual TPM, for the guest OS within the SEV-SNP
confidential VM (CVM) rather than trust such services from the hypervisor.

Currently, OVMF expects to run at the highest VMPL, VMPL0, and there are
certain SNP related operations that require that VMPL level. Specifically,
the PVALIDATE instruction and the RMPADJUST instruction when setting the
the VMSA attribute of a page (used when starting APs).

If OVMF is to run at a less privileged VMPL, e.g. VMPL2, then it must
use an SVSM (which is running at VMPL0) to perform the operations that
it is no longer able to perform.

When running under an SVSM, OVMF must know the APIC IDs of the vCPUs that
it will be starting. As a result, the GHCB APIC ID retrieval action must
be performed. Since this service can also work with SEV-SNP running at
VMPL0, the patches to make use of this feature are near the beginning of
the series.

How OVMF interacts with and uses the SVSM is documented in the SVSM
specification [1] and the GHCB specification [2].

This support creates a new AmdSvsmLib library that is used by MpInitLib.
The edk2-platforms repo requires updates/patches to add the new library
requirement. To accomodate that, this series could be split between:

patch number 12:
   UefiCpuPkg/AmdSvsmLib: Create the AmdSvsmLib library to support an SVSM

and patch number 13:
   UefiPayloadPkg: Prepare UefiPayloadPkg to use the AmdSvsmLib library

The updates to edk2-platforms can be applied at the split.


I have the edk2-platforms patch series prepared but will hold off on 
sending until this series settles and is ready to merge.


Thanks,
Tom






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Re: [edk2-devel] [edk2-platforms PATCH v3 5/7] Silicon/Marvell: Driver to publish device tree

2024-03-08 Thread Abdul Lateef Attar via groups.io

Hi Narinder,
    Patch looks good with minor comment inline.
Thanks
AbduL

On 18-01-2024 06:48, Narinder Dhillon via groups.io wrote:

Caution: This message originated from an External Source. Use proper caution 
when opening attachments, clicking links, or responding.


From: Narinder Dhillon

This patch adds driver that can provide device tree to OS if user so
wishes. PCD's are used to enable this, default is not to take this
action.

Signed-off-by: Narinder Dhillon
---
  .../Drivers/Fdt/FdtPlatformDxe/FdtPlatform.c  | 259 ++
  .../Fdt/FdtPlatformDxe/FdtPlatformDxe.inf |  49 
  .../MarvellSiliconPkg/MarvellSiliconPkg.dec   |  20 ++
  3 files changed, 328 insertions(+)
  create mode 100644 Silicon/Marvell/Drivers/Fdt/FdtPlatformDxe/FdtPlatform.c
  create mode 100644 
Silicon/Marvell/Drivers/Fdt/FdtPlatformDxe/FdtPlatformDxe.inf

diff --git a/Silicon/Marvell/Drivers/Fdt/FdtPlatformDxe/FdtPlatform.c 
b/Silicon/Marvell/Drivers/Fdt/FdtPlatformDxe/FdtPlatform.c
new file mode 100644
index 00..cc3b853dff
--- /dev/null
+++ b/Silicon/Marvell/Drivers/Fdt/FdtPlatformDxe/FdtPlatform.c
@@ -0,0 +1,259 @@
+/** @file
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+https://spdx.org/licenses
+
+  Copyright (C) 2023 Marvell
+
+  Copyright (c) 2015, ARM Ltd. All rights reserved.
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+//
+// Internal variables
+//
+
+VOID   *mFdtBlobBase;
+
+EFI_STATUS
+DeleteFdtNode (
+  IN  VOID*FdtAddr,
+  CONST CHAR8 *NodePath,
+  CONST CHAR8 *Compatible
+)
+{
+  INTNOffset = -1;
+  INTNReturn;
+
+  if ((NodePath != NULL) && (Compatible != NULL)) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  if (NodePath != NULL) {
+Offset = fdt_path_offset (FdtAddr, NodePath);
+
+DEBUG ((DEBUG_INFO, "Offset: %d\n", Offset));
+
+if (Offset < 0) {
+  DEBUG ((DEBUG_ERROR, "Error getting the device node %a offset: %a\n",
+  NodePath, fdt_strerror (Offset)));
+  return EFI_NOT_FOUND;
+}
+  }
+
+  if (Compatible != NULL) {
+Offset = fdt_node_offset_by_compatible (FdtAddr, -1, Compatible);
+
+DEBUG ((DEBUG_INFO, "Offset: %d\n", Offset));
+
+if (Offset < 0) {
+  DEBUG ((DEBUG_ERROR, "Error getting the device node for %a offset: %a\n",
+  Compatible, fdt_strerror (Offset)));
+  return EFI_NOT_FOUND;
+}
+  }
+
+  if (Offset >= 0) {
+Return = fdt_del_node (FdtAddr, Offset);
+
+DEBUG ((DEBUG_INFO, "Return: %d\n", Return));
+
+if (Return < 0) {
+  DEBUG ((DEBUG_ERROR, "Error deleting the device node %a: %a\n",
+  NodePath, fdt_strerror (Return)));
+  return EFI_NOT_FOUND;
+}
+  }
+
+  return EFI_SUCCESS;
+}
+
+EFI_STATUS
+DeleteRtcNode (
+  IN  VOID*FdtAddr
+  )
+{
+  INT32 Offset, NameLen, Return;
+  BOOLEAN Found;
+  CONST CHAR8 *Name;
+
+  Found = FALSE;
+  for (Offset = fdt_next_node(FdtAddr, 0, NULL);
+Offset >= 0;
+Offset = fdt_next_node(FdtAddr, Offset, NULL)) {
+
+Name = fdt_get_name(FdtAddr, Offset, &NameLen);
+if (!Name) {
+  continue;
+}
+
+if ((Name[0] == 'r') && (Name[1] == 't') && (Name[2] == 'c')) {
+  Found = TRUE;
+  break;
+}
+  }
+
+  if (Found == TRUE) {
+Return = fdt_del_node (FdtAddr, Offset);
+
+if (Return < 0) {
+  DEBUG ((DEBUG_ERROR, "Error deleting the device node %a\n", Name));
+  return EFI_NOT_FOUND;
+}
+  }
+
+  return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+FdtFixup(
+  IN VOID *FdtAddr
+  )
+{
+  EFI_STATUS Status = EFI_SUCCESS;
+
+  if (FeaturePcdGet(PcdFixupFdt)) {
+Status |= DeleteFdtNode (FdtAddr, (CHAR8*)PcdGetPtr 
(PcdFdtConfigRootNode), NULL);
+
+// Hide the RTC
+Status |= DeleteRtcNode (FdtAddr);
+  }
+
+  if (!EFI_ERROR(Status)) {
+fdt_pack(FdtAddr);
+  }
+
+  return EFI_SUCCESS;
+}
+
+
+/**
+  Install the FDT specified by its device path in text form.
+
+  @retval  EFI_SUCCESSThe FDT was installed.
+  @retval  EFI_NOT_FOUND  Failed to locate a protocol or a file.
+  @retval  EFI_INVALID_PARAMETER  Invalid device path.
+  @retval  EFI_UNSUPPORTEDDevice path not supported.
+  @retval  EFI_OUT_OF_RESOURCES   An allocation failed.
+**/
+STATIC
+EFI_STATUS
+InstallFdt (
+VOID
+)
+{
+  EFI_STATUS  Status;
+  UINTN   FdtBlobSize;
+  VOID*FdtConfigurationTableBase;
+  VOID*HobList;
+  EFI_HOB_GUID_TYPE   *GuidHob;
+
+  //
+  // Get the HOB list.  If it is not present, then ASSERT.
+  //
+  HobList = GetHobList ();
+  ASSERT (HobList != NULL);
+
+  //
+  // Search for FDT GUID HOB.  If it is not present, then
+  // there's nothing we can do. It may not exist on the update path.
+  //
+  GuidHob = GetNextGuidHob (&gFdtHobGuid, HobList);
+  if (GuidHob != NULL) {
+mFdtBlobBase = (VOID *)*(

[edk2-devel] [PATCH v3 24/24] OvmfPkg/BaseMemEncryptLib: Check for presence of an SVSM when not at VMPL0

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

Currently, an SEV-SNP guest will terminate if it is not running at VMPL0.
The requirement for running at VMPL0 is removed if an SVSM is present.

Update the current VMPL0 check to additionally check for the presence of
an SVSM is the guest is not running at VMPL0.

Cc: Ard Biesheuvel 
Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Cc: Laszlo Ersek 
Cc: Michael Roth 
Cc: Min Xu 
Acked-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/Library/BaseMemEncryptSevLib/X64/SecSnpSystemRamValidate.c | 9 
++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SecSnpSystemRamValidate.c 
b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SecSnpSystemRamValidate.c
index ca279d77274b..227e9910 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SecSnpSystemRamValidate.c
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SecSnpSystemRamValidate.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "SnpPageStateChange.h"
 
@@ -74,10 +75,12 @@ MemEncryptSevSnpPreValidateSystemRam (
 
   //
   // The page state change uses the PVALIDATE instruction. The instruction
-  // can be run on VMPL-0 only. If its not VMPL-0 guest then terminate
-  // the boot.
+  // can be run at VMPL-0 only. If its not a VMPL-0 guest, then an SVSM must
+  // be present to perform the operation on behalf of the guest. If the guest
+  // is not running at VMPL-0 and an SVSM is not present, then terminate the
+  // boot.
   //
-  if (!SevSnpIsVmpl0 ()) {
+  if (!SevSnpIsVmpl0 () && !AmdSvsmIsSvsmPresent ()) {
 SnpPageStateFailureTerminate ();
   }
 
-- 
2.43.2



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[edk2-devel] [PATCH v3 23/24] Ovmfpkg/CcExitLib: Provide SVSM discovery support

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The SVSM specification documents an alternative method of discovery for
the SVSM using a reserved CPUID bit and a reserved MSR.

For the CPUID support, the #VC handler of an SEV-SNP guest should modify
the returned value in the EAX register for the 0x801f CPUID function
by setting bit 28 when an SVSM is present.

For the MSR support, new reserved MSR 0xc001f000 has been defined. A #VC
should be generated when accessing this MSR. The #VC handler is expected
to ignore writes to this MSR and return the physical calling area address
(CAA) on reads of this MSR.

Cc: Ard Biesheuvel 
Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Cc: Laszlo Ersek 
Cc: Michael Roth 
Cc: Min Xu 
Acked-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/Library/CcExitLib/CcExitLib.inf |  3 +-
 OvmfPkg/Library/CcExitLib/SecCcExitLib.inf  |  3 +-
 OvmfPkg/Library/CcExitLib/CcExitVcHandler.c | 29 ++--
 3 files changed, 31 insertions(+), 4 deletions(-)

diff --git a/OvmfPkg/Library/CcExitLib/CcExitLib.inf 
b/OvmfPkg/Library/CcExitLib/CcExitLib.inf
index bc75cd5f5a04..e09f18453ac9 100644
--- a/OvmfPkg/Library/CcExitLib/CcExitLib.inf
+++ b/OvmfPkg/Library/CcExitLib/CcExitLib.inf
@@ -1,7 +1,7 @@
 ## @file
 #  CcExitLib Library.
 #
-#  Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
+#  Copyright (C) 2020 - 2024, Advanced Micro Devices, Inc. All rights 
reserved.
 #  Copyright (C) 2020 - 2022, Intel Corporation. All rights reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -41,6 +41,7 @@ [LibraryClasses]
   DebugLib
   LocalApicLib
   MemEncryptSevLib
+  AmdSvsmLib
 
 [Pcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase
diff --git a/OvmfPkg/Library/CcExitLib/SecCcExitLib.inf 
b/OvmfPkg/Library/CcExitLib/SecCcExitLib.inf
index 811269dd2c06..dff6cd2761ca 100644
--- a/OvmfPkg/Library/CcExitLib/SecCcExitLib.inf
+++ b/OvmfPkg/Library/CcExitLib/SecCcExitLib.inf
@@ -1,7 +1,7 @@
 ## @file
 #  VMGEXIT Support Library.
 #
-#  Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
+#  Copyright (C) 2020 - 2024, Advanced Micro Devices, Inc. All rights 
reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -41,6 +41,7 @@ [LibraryClasses]
   LocalApicLib
   MemEncryptSevLib
   PcdLib
+  AmdSvsmLib
 
 [FixedPcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupBase
diff --git a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c 
b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
index 0fc30f7bc4f6..0b61d28f8b94 100644
--- a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
+++ b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
@@ -1,7 +1,7 @@
 /** @file
   X64 #VC Exception Handler functon.
 
-  Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
+  Copyright (C) 2020 - 2024, Advanced Micro Devices, Inc. All rights 
reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -713,10 +714,29 @@ MsrExit (
   IN CC_INSTRUCTION_DATA *InstructionData
   )
 {
-  UINT64  ExitInfo1, Status;
+  MSR_SVSM_CAA_REGISTER  Msr;
+  UINT64 ExitInfo1;
+  UINT64 Status;
 
   ExitInfo1 = 0;
 
+  //
+  // The SVSM CAA MSR is a software implemented MSR and not supported
+  // by the hardware, handle it directly.
+  //
+  if (Regs->Rax == MSR_SVSM_CAA) {
+// Writes to the SVSM CAA MSR are ignored
+if (*(InstructionData->OpCodes + 1) == 0x30) {
+  return 0;
+}
+
+Msr.Uint64 = AmdSvsmSnpGetCaa ();
+Regs->Rax  = Msr.Bits.Lower32Bits;
+Regs->Rdx  = Msr.Bits.Upper32Bits;
+
+return 0;
+  }
+
   switch (*(InstructionData->OpCodes + 1)) {
 case 0x30: // WRMSR
   ExitInfo1  = 1;
@@ -1388,6 +1408,11 @@ GetCpuidFw (
 *Ebx = (*Ebx & 0xFF00) | (Ebx2 & 0x00FF);
 /* node ID */
 *Ecx = (*Ecx & 0xFF00) | (Ecx2 & 0x00FF);
+  } else if (EaxIn == 0x801F) {
+/* Set the SVSM feature bit if running under an SVSM */
+if (AmdSvsmIsSvsmPresent ()) {
+  *Eax |= BIT28;
+}
   }
 
 Out:
-- 
2.43.2



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[edk2-devel] [PATCH v3 22/24] UefiCpuPkg/MpInitLib: AP creation support under an SVSM

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

When running under an SVSM, the VMPL level of the APs that are started
must match the VMPL level provided by the SVSM. Additionally, each AP
must have a Calling Area for use with the SVSM protocol. Update the AP
creation to properly support running under an SVSM.

Cc: Gerd Hoffmann 
Cc: Laszlo Ersek 
Cc: Rahul Kumar 
Cc: Ray Ni 
Acked-by: Ray Ni 
Acked-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c | 28 +---
 1 file changed, 19 insertions(+), 9 deletions(-)

diff --git a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c 
b/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c
index 981135621384..bbdc47b5a314 100644
--- a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c
+++ b/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c
@@ -44,7 +44,8 @@ SevSnpPerformApAction (
 
   if (Action == SVM_VMGEXIT_SNP_AP_CREATE) {
 //
-// Turn the page into a recognized VMSA page.
+// Turn the page into a recognized VMSA page. When an SVSM is present
+// the page following the VMSA is the Calling Area page.
 //
 VmsaStatus = AmdSvsmSnpVmsaRmpAdjust (SaveArea, ApicId, TRUE);
 if (EFI_ERROR (VmsaStatus)) {
@@ -56,6 +57,7 @@ SevSnpPerformApAction (
   }
 
   ExitInfo1  = (UINT64)ApicId << 32;
+  ExitInfo1 |= (UINT64)SaveArea->Vmpl << 16;
   ExitInfo1 |= Action;
   ExitInfo2  = (UINT64)(UINTN)SaveArea;
 
@@ -87,8 +89,9 @@ SevSnpPerformApAction (
 
   if (Action == SVM_VMGEXIT_SNP_AP_DESTROY) {
 //
-// Make the current VMSA not runnable and accessible to be
-// reprogrammed.
+// Make the current VMSA not runnable and accessible to be reprogrammed.
+// When an SVSM is present the page following the VMSA is the Calling Area
+// page.
 //
 VmsaStatus = AmdSvsmSnpVmsaRmpAdjust (SaveArea, ApicId, FALSE);
 if (EFI_ERROR (VmsaStatus)) {
@@ -116,6 +119,7 @@ SevSnpCreateSaveArea (
   UINT32  ApicId
   )
 {
+  UINTN PageCount;
   UINT8 *Pages;
   SEV_ES_SAVE_AREA  *SaveArea;
   IA32_CR0  ApCr0;
@@ -125,13 +129,19 @@ SevSnpCreateSaveArea (
   UINTN StartIp;
   UINT8 SipiVector;
 
+  //
+  // When running under an SVSM, a Calling Area page is also needed and is
+  // always the page following the VMSA.
+  //
+  PageCount = AmdSvsmIsSvsmPresent () ? 2 : 1;
+
   if (CpuData->SevEsSaveArea == NULL) {
 //
 // Allocate a page for the SEV-ES Save Area and initialize it. Due to AMD
 // erratum #1467 (VMSA cannot be on a 2MB boundary), allocate an extra page
 // to choose from to work around the issue.
 //
-Pages = AllocateReservedPages (2);
+Pages = AllocateReservedPages (PageCount + 1);
 if (!Pages) {
   return;
 }
@@ -140,12 +150,12 @@ SevSnpCreateSaveArea (
 // Since page allocation works by allocating downward in the address space,
 // try to always free the first (lower address) page to limit possible 
holes
 // in the memory map. So, if the address of the second page is 2MB aligned,
-// then use the first page and free the second page. Otherwise, free the
+// then use the first page and free the last page. Otherwise, free the
 // first page and use the second page.
 //
 if (_IS_ALIGNED (Pages + EFI_PAGE_SIZE, SIZE_2MB)) {
   SaveArea = (SEV_ES_SAVE_AREA *)Pages;
-  FreePages (Pages + EFI_PAGE_SIZE, 1);
+  FreePages (Pages + (EFI_PAGE_SIZE * PageCount), 1);
 } else {
   SaveArea = (SEV_ES_SAVE_AREA *)(Pages + EFI_PAGE_SIZE);
   FreePages (Pages, 1);
@@ -163,7 +173,7 @@ SevSnpCreateSaveArea (
 }
   }
 
-  ZeroMem (SaveArea, EFI_PAGE_SIZE);
+  ZeroMem (SaveArea, EFI_PAGE_SIZE * PageCount);
 
   //
   // Propogate the CR0.NW and CR0.CD setting to the AP
@@ -239,10 +249,10 @@ SevSnpCreateSaveArea (
 
   //
   // Set the SEV-SNP specific fields for the save area:
-  //   VMPL - always VMPL0
+  //   VMPL - based on current mode
   //   SEV_FEATURES - equivalent to the SEV_STATUS MSR right shifted 2 bits
   //
-  SaveArea->Vmpl= 0;
+  SaveArea->Vmpl= AmdSvsmSnpGetVmpl ();
   SaveArea->SevFeatures = AsmReadMsr64 (MSR_SEV_STATUS) >> 2;
 
   SevSnpPerformApAction (SaveArea, ApicId, SVM_VMGEXIT_SNP_AP_CREATE);
-- 
2.43.2



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[edk2-devel] [PATCH v3 21/24] OvmfPkg/AmdSvsmLib: Add support for the SVSM create/delete vCPU calls

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The RMPADJUST instruction is used to alter the VMSA attribute of a page,
but the VMSA attribute can only be changed when running at VMPL0. When
an SVSM is present, use the SVSM_CORE_CREATE_VCPU and SVSM_CORE_DELTE_VCPU
calls to add or remove the VMSA attribute on a page instead of issuing
the RMPADJUST instruction directly.

Implement the AmdSvsmSnpVmsaRmpAdjust() API to perform the proper operation
to update the VMSA attribute.

Cc: Ard Biesheuvel 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Cc: Laszlo Ersek 
Acked-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/Library/AmdSvsmLib/AmdSvsmLib.c | 54 +++-
 1 file changed, 53 insertions(+), 1 deletion(-)

diff --git a/OvmfPkg/Library/AmdSvsmLib/AmdSvsmLib.c 
b/OvmfPkg/Library/AmdSvsmLib/AmdSvsmLib.c
index fb3fda70e948..6c79ee7d916b 100644
--- a/OvmfPkg/Library/AmdSvsmLib/AmdSvsmLib.c
+++ b/OvmfPkg/Library/AmdSvsmLib/AmdSvsmLib.c
@@ -377,6 +377,57 @@ AmdSvsmSnpPvalidate (
   AmdSvsmIsSvsmPresent () ? SvsmPvalidate (Info) : BasePvalidate (Info);
 }
 
+/**
+  Perform an RMPADJUST operation to alter the VMSA setting of a page.
+
+  Add or remove the VMSA attribute for a page.
+
+  @param[in]   Vmsa   Pointer to an SEV-ES save area page
+  @param[in]   ApicId APIC ID associated with the VMSA
+  @param[in]   SetVmsaBoolean indicator as to whether to set or
+  or clear the VMSA setting for the page
+
+  @retval  EFI_SUCCESSRMPADJUST operation successful
+  @retval  EFI_UNSUPPORTEDOperation is not supported
+  @retval  EFI_INVALID_PARAMETER  RMPADJUST operation failed, an invalid
+  parameter was supplied
+
+**/
+STATIC
+EFI_STATUS
+SvsmVmsaRmpAdjust (
+  IN SEV_ES_SAVE_AREA  *Vmsa,
+  IN UINT32ApicId,
+  IN BOOLEAN   SetVmsa
+  )
+{
+  SVSM_CALL_DATA  SvsmCallData;
+  SVSM_FUNCTION   Function;
+  UINTN   Ret;
+
+  SvsmCallData.Caa = (SVSM_CAA *)AmdSvsmSnpGetCaa ();
+
+  Function.Id.Protocol = 0;
+
+  if (SetVmsa) {
+Function.Id.CallId = 2;
+
+SvsmCallData.RaxIn = Function.Uint64;
+SvsmCallData.RcxIn = (UINT64)(UINTN)Vmsa;
+SvsmCallData.RdxIn = (UINT64)(UINTN)Vmsa + SIZE_4KB;
+SvsmCallData.R8In  = ApicId;
+  } else {
+Function.Id.CallId = 3;
+
+SvsmCallData.RaxIn = Function.Uint64;
+SvsmCallData.RcxIn = (UINT64)(UINTN)Vmsa;
+  }
+
+  Ret = SvsmMsrProtocol (&SvsmCallData);
+
+  return (Ret == 0) ? EFI_SUCCESS : EFI_INVALID_PARAMETER;
+}
+
 /**
   Perform a native RMPADJUST operation to alter the VMSA setting of a page.
 
@@ -444,5 +495,6 @@ AmdSvsmSnpVmsaRmpAdjust (
   IN BOOLEAN   SetVmsa
   )
 {
-  return BaseVmsaRmpAdjust (Vmsa, SetVmsa);
+  return AmdSvsmIsSvsmPresent () ? SvsmVmsaRmpAdjust (Vmsa, ApicId, SetVmsa)
+: BaseVmsaRmpAdjust (Vmsa, SetVmsa);
 }
-- 
2.43.2



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[edk2-devel] [PATCH v3 20/24] OvmfPkg/BaseMemEncryptSevLib: Maximize Page State Change efficiency

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

Similar to the Page State Change optimization added previously, also take
into account the possiblity of using the SVSM for PVALIDATE instructions.
Conditionally adjust the maximum number of entries based on how many
entries the SVSM calling area can support.

Cc: Ard Biesheuvel 
Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Cc: Laszlo Ersek 
Cc: Michael Roth 
Cc: Min Xu 
Acked-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c | 7 
+++
 1 file changed, 7 insertions(+)

diff --git 
a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c 
b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c
index c8c0c4ef0e95..e073f3937c41 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c
@@ -18,6 +18,7 @@
 
 #include 
 #include 
+#include 
 
 #include "SnpPageStateChange.h"
 
@@ -78,6 +79,7 @@ BuildPageStateBuffer (
   UINTN Index;
   UINTN IndexMax;
   UINTN PscIndexMax;
+  UINTN SvsmIndexMax;
 
   // Clear the page state structure
   SetMem (Info, InfoSize, 0);
@@ -96,6 +98,11 @@ BuildPageStateBuffer (
 IndexMax = MIN (IndexMax, PscIndexMax);
   }
 
+  SvsmIndexMax = (IndexMax / SVSM_PVALIDATE_MAX_ENTRY) * 
SVSM_PVALIDATE_MAX_ENTRY;
+  if (SvsmIndexMax > 0) {
+IndexMax = MIN (IndexMax, SvsmIndexMax);
+  }
+
   //
   // Populate the page state entry structure
   //
-- 
2.43.2



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[edk2-devel] [PATCH v3 18/24] OvmfPkg: Create a calling area used to communicate with the SVSM

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

An SVSM requires a calling area page whose address (CAA) is used by the
SVSM to communicate and process the SVSM request.

Add a pre-defined page area to the OvmfPkg and AmdSev packages and define
corresponding PCDs used to communicate the location and size of the area.
Keep the AmdSev package in sync with the OvmfPkg and adjust the AmdSev
launch and hash area memory locations.

Cc: Ard Biesheuvel 
Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Cc: Laszlo Ersek 
Cc: Michael Roth 
Cc: Min Xu 
Acked-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/OvmfPkg.dec |  4 
 OvmfPkg/AmdSev/AmdSevX64.fdf|  9 ++---
 OvmfPkg/OvmfPkgX64.fdf  |  3 +++
 OvmfPkg/PlatformPei/PlatformPei.inf |  2 ++
 OvmfPkg/ResetVector/ResetVector.inf |  2 ++
 OvmfPkg/PlatformPei/AmdSev.c| 11 +++
 OvmfPkg/ResetVector/ResetVector.nasmb   |  6 --
 OvmfPkg/ResetVector/X64/OvmfSevMetadata.asm | 11 ++-
 8 files changed, 42 insertions(+), 6 deletions(-)

diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index fbc81e4c8070..2f7bded9260b 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -338,6 +338,10 @@ [PcdsFixedAtBuild]
   ## Restrict boot to EFI applications in firmware volumes.
   gUefiOvmfPkgTokenSpaceGuid.PcdBootRestrictToFirmware|FALSE|BOOLEAN|0x6c
 
+  ## The base address and size of the initial SVSM Calling Area.
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecSvsmCaaBase|0|UINT32|0x70
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecSvsmCaaSize|0|UINT32|0x71
+
 [PcdsDynamic, PcdsDynamicEx]
   gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10
diff --git a/OvmfPkg/AmdSev/AmdSevX64.fdf b/OvmfPkg/AmdSev/AmdSevX64.fdf
index b84981e7ba04..d49555c6c873 100644
--- a/OvmfPkg/AmdSev/AmdSevX64.fdf
+++ b/OvmfPkg/AmdSev/AmdSevX64.fdf
@@ -68,13 +68,16 @@ [FD.MEMFD]
 0x00E000|0x001000
 
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidSize
 
-0x00F000|0x000C00
+0x00F000|0x001000
+gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecSvsmCaaBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecSvsmCaaSize
+
+0x01|0x000C00
 
gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretBase|gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretSize
 
-0x00FC00|0x000400
+0x010C00|0x000400
 
gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableBase|gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableSize
 
-0x01|0x01
+0x011000|0x00F000
 
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
 
 0x02|0x0E
diff --git a/OvmfPkg/OvmfPkgX64.fdf b/OvmfPkg/OvmfPkgX64.fdf
index eb3fb90cb8b6..d41d8ea7370d 100644
--- a/OvmfPkg/OvmfPkgX64.fdf
+++ b/OvmfPkg/OvmfPkgX64.fdf
@@ -94,6 +94,9 @@ [FD.MEMFD]
 0x00E000|0x001000
 
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidSize
 
+0x00F000|0x001000
+gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecSvsmCaaBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecSvsmCaaSize
+
 0x01|0x01
 
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
 
diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf 
b/OvmfPkg/PlatformPei/PlatformPei.inf
index 2206316fec9e..20b1b9829225 100644
--- a/OvmfPkg/PlatformPei/PlatformPei.inf
+++ b/OvmfPkg/PlatformPei/PlatformPei.inf
@@ -128,6 +128,8 @@ [FixedPcd]
   gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupSize
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecSvsmCaaBase
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecSvsmCaaSize
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaSize
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSnpSecretsBase
diff --git a/OvmfPkg/ResetVector/ResetVector.inf 
b/OvmfPkg/ResetVector/ResetVector.inf
index 65f71b05a02e..7bd517e63a0d 100644
--- a/OvmfPkg/ResetVector/ResetVector.inf
+++ b/OvmfPkg/ResetVector/ResetVector.inf
@@ -62,6 +62,8 @@ [FixedPcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretSize
   gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableBase
   gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableSize
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecSvsmCaaBase
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecSvsmCaaSize
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSnpSecretsBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSnpSecretsSize
   gEfiMdeModulePkgTokenSpaceGuid.PcdUse5LevelPageTable
diff --git a/OvmfPkg/PlatformPei/AmdSev.c b/OvmfPkg/PlatformPei/AmdSev.c
index a9de33074a69..e6724cf493a7 100644
--- a/OvmfPkg/PlatformPei/AmdSev.c
+++ b/OvmfPkg/PlatformPei/AmdSev.c
@@ -555,5 +555,16 @@ SevInitializeRam (
   (UINT64)(UINTN)PcdGet32 (PcdOvmfCpuidSize),
   EfiReservedMemoryType
   );
+
+//
+// The calling area memory needs to be protected until the OS can create
+// its 

[edk2-devel] [PATCH v3 19/24] OvmfPkg/AmdSvsmLib: Add support for the SVSM_CORE_PVALIDATE call

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The PVALIDATE instruction can only be performed at VMPL0. An SVSM will
be present when running at VMPL1 or higher.

When an SVSM is present, use the SVSM_CORE_PVALIDATE call to perform
memory validation instead of issuing the PVALIDATE instruction directly.

Cc: Ard Biesheuvel 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Cc: Laszlo Ersek 
Acked-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/Library/AmdSvsmLib/AmdSvsmLib.c | 183 +++-
 1 file changed, 182 insertions(+), 1 deletion(-)

diff --git a/OvmfPkg/Library/AmdSvsmLib/AmdSvsmLib.c 
b/OvmfPkg/Library/AmdSvsmLib/AmdSvsmLib.c
index 861bf9591ae3..fb3fda70e948 100644
--- a/OvmfPkg/Library/AmdSvsmLib/AmdSvsmLib.c
+++ b/OvmfPkg/Library/AmdSvsmLib/AmdSvsmLib.c
@@ -8,6 +8,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -43,6 +44,78 @@ SnpTerminate (
   CpuDeadLoop ();
 }
 
+/**
+  Issue an SVSM request.
+
+  Invokes the SVSM to process a request on behalf of the guest.
+
+  @param[in,out]  SvsmCallData  Pointer to the SVSM call data
+
+  @return   Contents of RAX upon return from VMGEXIT
+**/
+STATIC
+UINTN
+SvsmMsrProtocol (
+  IN OUT SVSM_CALL_DATA  *SvsmCallData
+  )
+{
+  MSR_SEV_ES_GHCB_REGISTER  Msr;
+  UINT64CurrentMsr;
+  UINT8 Pending;
+  BOOLEAN   InterruptState;
+  UINTN Ret;
+
+  do {
+//
+// Be sure that an interrupt can't cause a #VC while the GHCB MSR protocol
+// is being used (#VC handler will ASSERT if lower 12-bits are not zero).
+//
+InterruptState = GetInterruptState ();
+if (InterruptState) {
+  DisableInterrupts ();
+}
+
+Pending   = 0;
+SvsmCallData->CallPending = &Pending;
+
+CurrentMsr = AsmReadMsr64 (MSR_SEV_ES_GHCB);
+
+Msr.Uint64  = 0;
+Msr.SnpVmplRequest.Function = GHCB_INFO_SNP_VMPL_REQUEST;
+Msr.SnpVmplRequest.Vmpl = 0;
+AsmWriteMsr64 (MSR_SEV_ES_GHCB, Msr.Uint64);
+
+//
+// Guest memory is used for the guest-SVSM communication, so fence the
+// invocation of the VMGEXIT instruction to ensure VMSA accesses are
+// synchronized properly.
+//
+MemoryFence ();
+Ret = AsmVmgExitSvsm (SvsmCallData);
+MemoryFence ();
+
+Msr.Uint64 = AsmReadMsr64 (MSR_SEV_ES_GHCB);
+
+AsmWriteMsr64 (MSR_SEV_ES_GHCB, CurrentMsr);
+
+if (InterruptState) {
+  EnableInterrupts ();
+}
+
+if (Pending != 0) {
+  SnpTerminate ();
+}
+
+if ((Msr.SnpVmplResponse.Function != GHCB_INFO_SNP_VMPL_RESPONSE) ||
+(Msr.SnpVmplResponse.ErrorCode != 0))
+{
+  SnpTerminate ();
+}
+  } while (Ret == SVSM_ERR_INCOMPLETE || Ret == SVSM_ERR_BUSY);
+
+  return Ret;
+}
+
 /**
   Report the presence of an Secure Virtual Services Module (SVSM).
 
@@ -109,6 +182,114 @@ AmdSvsmSnpGetCaa (
   return AmdSvsmIsSvsmPresent () ? SvsmInfo->SvsmCaa : 0;
 }
 
+/**
+  Issue an SVSM request to perform the PVALIDATE instruction.
+
+  Invokes the SVSM to process the PVALIDATE instruction on behalf of the
+  guest to validate or invalidate the memory range specified.
+
+  @param[in]   Info   Pointer to a page state change structure
+
+**/
+STATIC
+VOID
+SvsmPvalidate (
+  IN SNP_PAGE_STATE_CHANGE_INFO  *Info
+  )
+{
+  SVSM_CALL_DATA  SvsmCallData;
+  SVSM_CAA*Caa;
+  SVSM_PVALIDATE_REQUEST  *Request;
+  SVSM_FUNCTION   Function;
+  BOOLEAN Validate;
+  UINTN   Entry;
+  UINTN   EntryLimit;
+  UINTN   Index;
+  UINTN   EndIndex;
+  UINT64  Gfn;
+  UINT64  GfnEnd;
+  UINTN   Ret;
+
+  Caa = (SVSM_CAA *)AmdSvsmSnpGetCaa ();
+  ZeroMem (Caa->SvsmBuffer, sizeof (Caa->SvsmBuffer));
+
+  Function.Id.Protocol = 0;
+  Function.Id.CallId   = 1;
+
+  Request= (SVSM_PVALIDATE_REQUEST *)Caa->SvsmBuffer;
+  EntryLimit = ((sizeof (Caa->SvsmBuffer) - sizeof (*Request)) /
+sizeof (Request->Entry[0])) - 1;
+
+  SvsmCallData.Caa   = Caa;
+  SvsmCallData.RaxIn = Function.Uint64;
+  SvsmCallData.RcxIn = (UINT64)(UINTN)Request;
+
+  Entry= 0;
+  Index= Info->Header.CurrentEntry;
+  EndIndex = Info->Header.EndEntry;
+
+  while (Index <= EndIndex) {
+Validate = Info->Entry[Index].Operation == SNP_PAGE_STATE_PRIVATE;
+
+Request->Header.Entries++;
+Request->Entry[Entry].Bits.PageSize = Info->Entry[Index].PageSize;
+Request->Entry[Entry].Bits.Action   = (Validate == TRUE) ? 1 : 0;
+Request->Entry[Entry].Bits.IgnoreCf = 0;
+Request->Entry[Entry].Bits.Address  = Info->Entry[Index].GuestFrameNumber;
+
+Entry++;
+if ((Entry > EntryLimit) || (Index == EndIndex)) {
+  Ret = SvsmMsrProtocol (&SvsmCallData);
+  if ((Ret == SVSM_ERR_PVALIDATE_FAIL_SIZE_MISMATCH) &&
+  (Request->Entry[Request->Header.Next].Bit

[edk2-devel] [PATCH v3 17/24] OvmfPkg/BaseMemEncryptSevLib: Use AmdSvsmSnpPvalidate() to validate pages

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The PVALIDATE instruction is used to change the SNP validation of a page,
but that can only be done when running at VMPL0. To prepare for running at
a less priviledged VMPL, use the AmdSvsmLib library API to perform the
PVALIDATE. The AmdSvsmLib library will perform the proper operation on
behalf of the caller.

Cc: Ard Biesheuvel 
Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Cc: Laszlo Ersek 
Cc: Michael Roth 
Cc: Min Xu 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf  |  3 +-
 OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf  |  3 +-
 OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLib.inf  |  3 +-
 OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c | 74 
+---
 4 files changed, 9 insertions(+), 74 deletions(-)

diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf 
b/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf
index cc24961c9265..312ee73e5474 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf
@@ -1,7 +1,7 @@
 ## @file
 #  Library provides the helper functions for SEV guest
 #
-# Copyright (c) 2017 - 2020, Advanced Micro Devices. All rights reserved.
+# Copyright (c) 2017 - 2024, Advanced Micro Devices. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -52,6 +52,7 @@ [LibraryClasses]
   MemoryAllocationLib
   PcdLib
   CcExitLib
+  AmdSvsmLib
 
 [FeaturePcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf 
b/OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf
index 8f56783da55e..1e0b5600eb1d 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf
@@ -1,7 +1,7 @@
 ## @file
 #  Library provides the helper functions for SEV guest
 #
-# Copyright (c) 2020 Advanced Micro Devices. All rights reserved.
+# Copyright (c) 2020 - 2024, Advanced Micro Devices. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -52,6 +52,7 @@ [LibraryClasses]
   MemoryAllocationLib
   PcdLib
   CcExitLib
+  AmdSvsmLib
 
 [FeaturePcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLib.inf 
b/OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLib.inf
index b6d76e7e630f..a06ea6188eab 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLib.inf
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLib.inf
@@ -1,7 +1,7 @@
 ## @file
 #  Library provides the helper functions for SEV guest
 #
-# Copyright (c) 2020 Advanced Micro Devices. All rights reserved.
+# Copyright (c) 2020 - 2024, Advanced Micro Devices. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -49,6 +49,7 @@ [LibraryClasses]
   DebugLib
   PcdLib
   CcExitLib
+  AmdSvsmLib
 
 [FixedPcd]
   gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase
diff --git 
a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c 
b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c
index f1883239a661..c8c0c4ef0e95 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c
@@ -14,14 +14,13 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
 
 #include "SnpPageStateChange.h"
 
-#define PAGES_PER_LARGE_ENTRY  512
-
 STATIC
 UINTN
 MemoryStateToGhcbOp (
@@ -63,73 +62,6 @@ SnpPageStateFailureTerminate (
   CpuDeadLoop ();
 }
 
-/**
- This function issues the PVALIDATE instruction to validate or invalidate the 
memory
- range specified. If PVALIDATE returns size mismatch then it retry validating 
with
- smaller page size.
-
- */
-STATIC
-VOID
-PvalidateRange (
-  IN  SNP_PAGE_STATE_CHANGE_INFO  *Info
-  )
-{
-  UINTN RmpPageSize;
-  UINTN StartIndex;
-  UINTN EndIndex;
-  UINTN Index;
-  UINTN Ret;
-  EFI_PHYSICAL_ADDRESS  Address;
-  BOOLEAN   Validate;
-
-  StartIndex = Info->Header.CurrentEntry;
-  EndIndex   = Info->Header.EndEntry;
-
-  for ( ; StartIndex <= EndIndex; StartIndex++) {
-//
-// Get the address and the page size from the Info.
-//
-Address = 
((EFI_PHYSICAL_ADDRESS)Info->Entry[StartIndex].GuestFrameNumber) << 
EFI_PAGE_SHIFT;
-RmpPageSize = Info->Entry[StartIndex].PageSize;
-Validate= Info->Entry[StartIndex].Operation == SNP_PAGE_STATE_PRIVATE;
-
-Ret = AsmPvalidate (RmpPageSize, Validate, Address);
-
-//
-// If we fail to validate due to size mismatch then try with the
-// smaller page size. This senario will occur if the backing page in
-// the RMP e

[edk2-devel] [PATCH v3 16/24] UefiCpuPkg/MpInitLib: Use AmdSvsmSnpVmsaRmpAdjust() to set/clear VMSA

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The RMPADJUST instruction is used to change the VMSA attribute of a page,
but the VMSA attribute can only be changed when running at VMPL0. To
prepare for running at a less priviledged VMPL, use the AmdSvsmLib library
API to perform the RMPADJUST. The AmdSvsmLib library will perform the
proper operation on behalf of the caller.

Cc: Gerd Hoffmann 
Cc: Laszlo Ersek 
Cc: Rahul Kumar 
Cc: Ray Ni 
Acked-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf |  1 +
 UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf |  1 +
 UefiCpuPkg/Library/MpInitLib/MpLib.h  | 14 -
 UefiCpuPkg/Library/MpInitLib/Ia32/AmdSev.c| 20 
 UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c | 54 +++-
 5 files changed, 9 insertions(+), 81 deletions(-)

diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
index 69950fcd1289..19745437f005 100644
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
@@ -57,6 +57,7 @@ [LibraryClasses]
   SynchronizationLib
   PcdLib
   CcExitLib
+  AmdSvsmLib
   MicrocodeLib
 [LibraryClasses.X64]
   CpuPageTableLib
diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
index 22f74a814534..679e51a1acd5 100644
--- a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
@@ -53,6 +53,7 @@ [LibraryClasses]
   PeiServicesLib
   PcdLib
   CcExitLib
+  AmdSvsmLib
   MicrocodeLib
 
 [Pcd]
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h 
b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index 65e05c4806f5..179f8e585b5d 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -883,20 +883,6 @@ FillExchangeInfoDataSevEs (
   IN volatile MP_CPU_EXCHANGE_INFO  *ExchangeInfo
   );
 
-/**
-  Issue RMPADJUST to adjust the VMSA attribute of an SEV-SNP page.
-
-  @param[in]  PageAddress
-  @param[in]  VmsaPage
-
-  @return  RMPADJUST return value
-**/
-UINT32
-SevSnpRmpAdjust (
-  IN  EFI_PHYSICAL_ADDRESS  PageAddress,
-  IN  BOOLEAN   VmsaPage
-  );
-
 /**
   Create an SEV-SNP AP save area (VMSA) for use in running the vCPU.
 
diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/AmdSev.c 
b/UefiCpuPkg/Library/MpInitLib/Ia32/AmdSev.c
index 0478e92317f1..963bd62494b9 100644
--- a/UefiCpuPkg/Library/MpInitLib/Ia32/AmdSev.c
+++ b/UefiCpuPkg/Library/MpInitLib/Ia32/AmdSev.c
@@ -49,26 +49,6 @@ SevSnpCreateAP (
   ASSERT (FALSE);
 }
 
-/**
-  Issue RMPADJUST to adjust the VMSA attribute of an SEV-SNP page.
-
-  @param[in]  PageAddress
-  @param[in]  VmsaPage
-
-  @return  RMPADJUST return value
-**/
-UINT32
-SevSnpRmpAdjust (
-  IN  EFI_PHYSICAL_ADDRESS  PageAddress,
-  IN  BOOLEAN   VmsaPage
-  )
-{
-  //
-  // RMPADJUST is not supported in 32-bit mode
-  //
-  return RETURN_UNSUPPORTED;
-}
-
 /**
   Determine if the SEV-SNP AP Create protocol should be used.
 
diff --git a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c 
b/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c
index bd12a5ee2fcb..981135621384 100644
--- a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c
+++ b/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c
@@ -10,6 +10,7 @@
 
 #include "MpLib.h"
 #include 
+#include 
 #include 
 #include 
 
@@ -38,20 +39,15 @@ SevSnpPerformApAction (
   BOOLEAN   InterruptState;
   UINT64ExitInfo1;
   UINT64ExitInfo2;
-  UINT32RmpAdjustStatus;
   UINT64VmgExitStatus;
+  EFI_STATUSVmsaStatus;
 
   if (Action == SVM_VMGEXIT_SNP_AP_CREATE) {
 //
-// To turn the page into a recognized VMSA page, issue RMPADJUST:
-//   Target VMPL but numerically higher than current VMPL
-//   Target PermissionMask is not used
+// Turn the page into a recognized VMSA page.
 //
-RmpAdjustStatus = SevSnpRmpAdjust (
-(EFI_PHYSICAL_ADDRESS)(UINTN)SaveArea,
-TRUE
-);
-if (RmpAdjustStatus != 0) {
+VmsaStatus = AmdSvsmSnpVmsaRmpAdjust (SaveArea, ApicId, TRUE);
+if (EFI_ERROR (VmsaStatus)) {
   DEBUG ((DEBUG_INFO, "SEV-SNP: RMPADJUST failed for VMSA creation\n"));
   ASSERT (FALSE);
 
@@ -94,11 +90,8 @@ SevSnpPerformApAction (
 // Make the current VMSA not runnable and accessible to be
 // reprogrammed.
 //
-RmpAdjustStatus = SevSnpRmpAdjust (
-(EFI_PHYSICAL_ADDRESS)(UINTN)SaveArea,
-FALSE
-);
-if (RmpAdjustStatus != 0) {
+VmsaStatus = AmdSvsmSnpVmsaRmpAdjust (SaveArea, ApicId, FALSE);
+if (EFI_ERROR (VmsaStatus)) {
   DEBUG ((DEBUG_INFO, "SEV-SNP: RMPADJUST failed for VMSA reset\n"));
   ASSERT (FALSE);
 
@@ -328,39 +321,6 @@ SevSnpCreateAP (
   }
 }
 
-/**
-  Issue RMPADJUST to adj

[edk2-devel] [PATCH v3 14/24] Ovmfpkg: Prepare OvmfPkg to use the AmdSvsmLib library

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The MpInitLib library will be updated to use the new AmdSvsmLib library.
To prevent any build breakage, update the OvmfPkg DSCs file to include
the AmdSvsmLib NULL library.

Cc: Anatol Belski 
Cc: Anthony Perard 
Cc: Ard Biesheuvel 
Cc: Corvin Köhne 
Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: Jianyong Wu 
Cc: Jiewen Yao 
Cc: Laszlo Ersek 
Cc: Michael Roth 
Cc: Min Xu 
Cc: Rebecca Cran 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/AmdSev/AmdSevX64.dsc | 1 +
 OvmfPkg/Bhyve/BhyveX64.dsc   | 1 +
 OvmfPkg/CloudHv/CloudHvX64.dsc   | 1 +
 OvmfPkg/IntelTdx/IntelTdxX64.dsc | 1 +
 OvmfPkg/Microvm/MicrovmX64.dsc   | 1 +
 OvmfPkg/OvmfPkgIa32.dsc  | 1 +
 OvmfPkg/OvmfPkgIa32X64.dsc   | 3 ++-
 OvmfPkg/OvmfPkgX64.dsc   | 1 +
 OvmfPkg/OvmfXen.dsc  | 1 +
 9 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc
index 60e916b4fd18..140c4208f5b7 100644
--- a/OvmfPkg/AmdSev/AmdSevX64.dsc
+++ b/OvmfPkg/AmdSev/AmdSevX64.dsc
@@ -204,6 +204,7 @@ [LibraryClasses]
 !include OvmfPkg/Include/Dsc/ShellLibs.dsc.inc
 
 [LibraryClasses.common]
+  AmdSvsmLib|UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
   CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf
   TdxLib|MdePkg/Library/TdxLib/TdxLib.inf
diff --git a/OvmfPkg/Bhyve/BhyveX64.dsc b/OvmfPkg/Bhyve/BhyveX64.dsc
index 9689a2f14efa..6f305d690dda 100644
--- a/OvmfPkg/Bhyve/BhyveX64.dsc
+++ b/OvmfPkg/Bhyve/BhyveX64.dsc
@@ -232,6 +232,7 @@ [LibraryClasses]
 !include OvmfPkg/Include/Dsc/OvmfTpmLibs.dsc.inc
 
 [LibraryClasses.common]
+  AmdSvsmLib|UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
   CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf
   TdxLib|MdePkg/Library/TdxLib/TdxLib.inf
diff --git a/OvmfPkg/CloudHv/CloudHvX64.dsc b/OvmfPkg/CloudHv/CloudHvX64.dsc
index b522fa10594d..4dad0a36e757 100644
--- a/OvmfPkg/CloudHv/CloudHvX64.dsc
+++ b/OvmfPkg/CloudHv/CloudHvX64.dsc
@@ -242,6 +242,7 @@ [LibraryClasses]
 !include OvmfPkg/Include/Dsc/OvmfTpmLibs.dsc.inc
 
 [LibraryClasses.common]
+  AmdSvsmLib|UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
   CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf
   TdxLib|MdePkg/Library/TdxLib/TdxLib.inf
diff --git a/OvmfPkg/IntelTdx/IntelTdxX64.dsc b/OvmfPkg/IntelTdx/IntelTdxX64.dsc
index 7a767324ffda..6a78d1133880 100644
--- a/OvmfPkg/IntelTdx/IntelTdxX64.dsc
+++ b/OvmfPkg/IntelTdx/IntelTdxX64.dsc
@@ -212,6 +212,7 @@ [LibraryClasses]
 !include OvmfPkg/Include/Dsc/ShellLibs.dsc.inc
 
 [LibraryClasses.common]
+  AmdSvsmLib|UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
   CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf
   TdxLib|MdePkg/Library/TdxLib/TdxLib.inf
diff --git a/OvmfPkg/Microvm/MicrovmX64.dsc b/OvmfPkg/Microvm/MicrovmX64.dsc
index 2c6bb83beb85..cc84ee3c2956 100644
--- a/OvmfPkg/Microvm/MicrovmX64.dsc
+++ b/OvmfPkg/Microvm/MicrovmX64.dsc
@@ -246,6 +246,7 @@ [LibraryClasses]
 !include OvmfPkg/Include/Dsc/ShellLibs.dsc.inc
 
 [LibraryClasses.common]
+  AmdSvsmLib|UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
   CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf
   
SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index 713f08764b07..15fadc2fdc6e 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -247,6 +247,7 @@ [LibraryClasses]
 !include OvmfPkg/Include/Dsc/ShellLibs.dsc.inc
 
 [LibraryClasses.common]
+  AmdSvsmLib|UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
   CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf
   TdxMailboxLib|OvmfPkg/Library/TdxMailboxLib/TdxMailboxLibNull.inf
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index 90b15dc27097..6e55b50a9641 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -4,7 +4,7 @@
 #  Copyright (c) 2006 - 2023, Intel Corporation. All rights reserved.
 #  (C) Copyright 2016 Hewlett Packard Enterprise Development LP
 #  Copyright (c) Microsoft Corporation.
-#  Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+#  Copyright (C) 2023 - 2024, Advanced Micro Devices, Inc. All rights 
reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -252,6 +252,7 @@ [LibraryClasses]
 !include OvmfPkg/Include/Dsc/ShellLibs.dsc.inc
 
 [LibraryClasses.common]
+  AmdSvsmLib|UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
   CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLib

[edk2-devel] [PATCH v3 15/24] Ovmfpkg/AmdSvsmLib: Create AmdSvsmLib to handle SVSM related services

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

Add initial support for the new AmdSvsmLib library to OvmfPkg. The initial
implementation fully implements the library interfaces.

The SVSM presence check, AmdSvsmIsSvsmPresent(), determines the presence
of an SVSM by checking if an SVSM has been advertised in the SEV-SNP
Secrets Page.

The VMPL API, AmdSvsmSnpGetVmpl(), returns the VMPL level at which OVMF is
currently running.

The CAA API, AmdSvsmSnpGetCaa(), returns the Calling Area Address when an
SVSM is present, 0 otherwise.

The PVALIDATE API, AmdSvsmSnpPvalidate(), copies the PVALIDATE logic from
the BaseMemEncryptSevLib library for the initial implementation. The
BaseMemEncryptSevLib library will be changed to use this new API so that
the decision as to whether the SVSM is needed to perform the operation
can be isolated to this library.

The VMSA API, AmdSvsmSnpVmsaRmpAdjust(), copies the RMPUPDATE logic from
the MpInitLib library for the initial implementation. The MpInitLib
library will be changed to use this new API so that the decision as to
whether the SVSM is needed to perform the operation can be isolated to
this library.

Cc: Anatol Belski 
Cc: Ard Biesheuvel 
Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: Jianyong Wu 
Cc: Jiewen Yao 
Cc: Laszlo Ersek 
Cc: Michael Roth 
Cc: Min Xu 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/AmdSev/AmdSevX64.dsc  |   2 +-
 OvmfPkg/CloudHv/CloudHvX64.dsc|   2 +-
 OvmfPkg/Microvm/MicrovmX64.dsc|   2 +-
 OvmfPkg/OvmfPkgX64.dsc|   2 +-
 OvmfPkg/Library/AmdSvsmLib/AmdSvsmLib.inf |  38 +++
 OvmfPkg/Library/AmdSvsmLib/AmdSvsmLib.c   | 267 
 6 files changed, 309 insertions(+), 4 deletions(-)

diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc
index 140c4208f5b7..a7540bb6367f 100644
--- a/OvmfPkg/AmdSev/AmdSevX64.dsc
+++ b/OvmfPkg/AmdSev/AmdSevX64.dsc
@@ -204,7 +204,7 @@ [LibraryClasses]
 !include OvmfPkg/Include/Dsc/ShellLibs.dsc.inc
 
 [LibraryClasses.common]
-  AmdSvsmLib|UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
+  AmdSvsmLib|OvmfPkg/Library/AmdSvsmLib/AmdSvsmLib.inf
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
   CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf
   TdxLib|MdePkg/Library/TdxLib/TdxLib.inf
diff --git a/OvmfPkg/CloudHv/CloudHvX64.dsc b/OvmfPkg/CloudHv/CloudHvX64.dsc
index 4dad0a36e757..b1911d6ab4ac 100644
--- a/OvmfPkg/CloudHv/CloudHvX64.dsc
+++ b/OvmfPkg/CloudHv/CloudHvX64.dsc
@@ -242,7 +242,7 @@ [LibraryClasses]
 !include OvmfPkg/Include/Dsc/OvmfTpmLibs.dsc.inc
 
 [LibraryClasses.common]
-  AmdSvsmLib|UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
+  AmdSvsmLib|OvmfPkg/Library/AmdSvsmLib/AmdSvsmLib.inf
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
   CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf
   TdxLib|MdePkg/Library/TdxLib/TdxLib.inf
diff --git a/OvmfPkg/Microvm/MicrovmX64.dsc b/OvmfPkg/Microvm/MicrovmX64.dsc
index cc84ee3c2956..1f2f8b5bb618 100644
--- a/OvmfPkg/Microvm/MicrovmX64.dsc
+++ b/OvmfPkg/Microvm/MicrovmX64.dsc
@@ -246,7 +246,7 @@ [LibraryClasses]
 !include OvmfPkg/Include/Dsc/ShellLibs.dsc.inc
 
 [LibraryClasses.common]
-  AmdSvsmLib|UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
+  AmdSvsmLib|OvmfPkg/Library/AmdSvsmLib/AmdSvsmLib.inf
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
   CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf
   
SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 87e210d4409c..540c1ed8da63 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -268,7 +268,7 @@ [LibraryClasses]
 !include OvmfPkg/Include/Dsc/ShellLibs.dsc.inc
 
 [LibraryClasses.common]
-  AmdSvsmLib|UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
+  AmdSvsmLib|OvmfPkg/Library/AmdSvsmLib/AmdSvsmLib.inf
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
   CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf
   TdxLib|MdePkg/Library/TdxLib/TdxLib.inf
diff --git a/OvmfPkg/Library/AmdSvsmLib/AmdSvsmLib.inf 
b/OvmfPkg/Library/AmdSvsmLib/AmdSvsmLib.inf
new file mode 100644
index ..cfd2663adc3a
--- /dev/null
+++ b/OvmfPkg/Library/AmdSvsmLib/AmdSvsmLib.inf
@@ -0,0 +1,38 @@
+## @file
+#  CcExitLib Library.
+#
+#  Copyright (C) 2024, Advanced Micro Devices, Inc. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 1.29
+  BASE_NAME  = AmdSvsmLib
+  FILE_GUID  = 288e3588-87d8-4c2c-b568-bf900de0fb36
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = AmdSvsmLib
+
+#
+# The following information is for reference only and not required by the 
build tools.
+#
+#  VALID_ARCHITECTURES   = X64
+#
+
+[Sources.common]
+  AmdSvsmLib.c
+
+[Packages]
+  MdePkg/MdePkg.d

[edk2-devel] [PATCH v3 13/24] UefiPayloadPkg: Prepare UefiPayloadPkg to use the AmdSvsmLib library

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The MpInitLib library will be updated to use the new AmdSvsmLib library.
To prevent any build breakage, update the UefiPayloadPkg DSC file to
include the AmdSvsmLib NULL library.

Cc: Gua Guo 
Cc: Guo Dong 
Cc: James Lu 
Cc: Sean Rhodes 
Acked-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 UefiPayloadPkg/UefiPayloadPkg.dsc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc 
b/UefiPayloadPkg/UefiPayloadPkg.dsc
index 433fb51a5695..e1b9d5ecf182 100644
--- a/UefiPayloadPkg/UefiPayloadPkg.dsc
+++ b/UefiPayloadPkg/UefiPayloadPkg.dsc
@@ -313,6 +313,7 @@ [LibraryClasses]
   
VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/VariablePolicyHelperLib.inf
   
VariableFlashInfoLib|MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf
   CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf
+  AmdSvsmLib|UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
   
ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
   FdtLib|MdePkg/Library/BaseFdtLib/BaseFdtLib.inf
 [LibraryClasses.common]
-- 
2.43.2



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[edk2-devel] [PATCH v3 12/24] UefiCpuPkg/AmdSvsmLib: Create the AmdSvsmLib library to support an SVSM

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

In order to support an SEV-SNP guest running under an SVSM at VMPL1 or
lower, a new library must be created.

This library includes an interface to detect if running under an SVSM, an
interface to return the current VMPL, an interface to perform memory
validation and an interface to set or clear the attribute that allows a
page to be used as a VMSA.

Cc: Gerd Hoffmann 
Cc: Laszlo Ersek 
Cc: Rahul Kumar 
Cc: Ray Ni 
Acked-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 UefiCpuPkg/UefiCpuPkg.dec|   3 +
 UefiCpuPkg/UefiCpuPkg.dsc|   4 +-
 UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf |  27 +
 UefiCpuPkg/Include/Library/AmdSvsmLib.h  | 101 ++
 UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.c   | 108 
 UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.uni |  13 +++
 6 files changed, 255 insertions(+), 1 deletion(-)

diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index c31d8b6736cf..d1bff93ae2e0 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -52,6 +52,9 @@ [LibraryClasses.IA32, LibraryClasses.X64]
   ##  @libraryclass  Provides function to support CcExit processing.
   CcExitLib|Include/Library/CcExitLib.h
 
+  ##  @libraryclass  Provides function to support AmdSvsm processing.
+  AmdSvsmLib|Include/Library/AmdSvsmLib.h
+
   ##  @libraryclass  Provides function to get CPU cache information.
   CpuCacheInfoLib|Include/Library/CpuCacheInfoLib.h
 
diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index 10b33594e586..422e50c92b48 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -2,7 +2,7 @@
 #  UefiCpuPkg Package
 #
 #  Copyright (c) 2007 - 2023, Intel Corporation. All rights reserved.
-#  Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+#  Copyright (C) 2023 - 2024, Advanced Micro Devices, Inc. All rights 
reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -61,6 +61,7 @@ [LibraryClasses]
   
PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
   
TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf
   CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf
+  AmdSvsmLib|UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
   MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf
   
SmmCpuRendezvousLib|UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezvousLib.inf
   CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf
@@ -159,6 +160,7 @@ [Components.IA32, Components.X64]
   UefiCpuPkg/Library/SmmCpuFeaturesLib/StandaloneMmCpuFeaturesLib.inf
   UefiCpuPkg/Library/SmmCpuSyncLib/SmmCpuSyncLib.inf
   UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf
+  UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
   UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
   UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
   UefiCpuPkg/SecCore/SecCore.inf
diff --git a/UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf 
b/UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
new file mode 100644
index ..45a189540941
--- /dev/null
+++ b/UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
@@ -0,0 +1,27 @@
+## @file
+#  AmdSvsm Base Support Library.
+#
+#  Copyright (C) 2024, Advanced Micro Devices, Inc. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 1.29
+  BASE_NAME  = AmdSvsmLibNull
+  MODULE_UNI_FILE= AmdSvsmLibNull.uni
+  FILE_GUID  = 62b45e0f-c9b4-45ce-a5b3-41762709b3d9
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = AmdSvsmLib
+
+[Sources.common]
+  AmdSvsmLibNull.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+
diff --git a/UefiCpuPkg/Include/Library/AmdSvsmLib.h 
b/UefiCpuPkg/Include/Library/AmdSvsmLib.h
new file mode 100644
index ..40e0e5bd4259
--- /dev/null
+++ b/UefiCpuPkg/Include/Library/AmdSvsmLib.h
@@ -0,0 +1,101 @@
+/** @file
+  Public header file for the AmdSvsmLib.
+
+  This library class defines some routines used for invoking an SVSM when the
+  guest is not running at VMPL0.
+
+  Copyright (C) 2024, Advanced Micro Devices, Inc. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef AMD_SVSM_LIB_H_
+#define AMD_SVSM_LIB_H_
+
+#include 
+#include 
+
+/**
+  Report the presence of an Secure Virtual Services Module (SVSM).
+
+  Determines the presence of an SVSM.
+
+  @retval  TRUE   An SVSM is present
+  @retval  FALSE  An SVSM is not present
+
+**/
+BOOLEAN
+EFIAPI
+AmdSvsmIsSvsmPresent (
+  VOID
+  );
+
+/**
+  Report the VMPL level at which the SEV-SNP guest

[edk2-devel] [PATCH v3 11/24] MdePkg/BaseLib: Add a new VMGEXIT instruction invocation for SVSM

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The SVSM specification relies on a specific register calling convention to
hold the parameters that are associated with the SVSM request. The SVSM is
invoked by requesting the hypervisor to run the VMPL0 VMSA of the guest
using the GHCB MSR Protocol or a GHCB NAE event.

Create a new version of the VMGEXIT instruction that will adhere to this
calling convention and load the SVSM function arguments into the proper
register before invoking the VMGEXIT instruction. On return, perform the
atomic exchange on the SVSM call pending value as specified in the SVSM
specification.

Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Zhiguang Liu 
Acked-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 MdePkg/Library/BaseLib/BaseLib.inf   |  2 +
 MdePkg/Include/Library/BaseLib.h | 39 
 MdePkg/Library/BaseLib/Ia32/VmgExitSvsm.nasm | 39 
 MdePkg/Library/BaseLib/X64/VmgExitSvsm.nasm  | 94 
 4 files changed, 174 insertions(+)

diff --git a/MdePkg/Library/BaseLib/BaseLib.inf 
b/MdePkg/Library/BaseLib/BaseLib.inf
index 4dbe94be71e1..26e66a8d67cf 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -187,6 +187,7 @@ [Sources.Ia32]
   Ia32/XGetBv.nasm
   Ia32/XSetBv.nasm
   Ia32/VmgExit.nasm
+  Ia32/VmgExitSvsm.nasm
 
   Ia32/DivS64x64Remainder.c
   Ia32/InternalSwitchStack.c | MSFT
@@ -328,6 +329,7 @@ [Sources.X64]
   X64/XGetBv.nasm
   X64/XSetBv.nasm
   X64/VmgExit.nasm
+  X64/VmgExitSvsm.nasm
   ChkStkGcc.c  | GCC
 
 [Sources.EBC]
diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index 1fff0fb224f1..95f805599d9d 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -7876,6 +7876,45 @@ AsmVmgExit (
   VOID
   );
 
+///
+/// The structure used to supply and return data to and from the SVSM.
+///
+typedef struct {
+  VOID  *Caa;
+  UINT64RaxIn;
+  UINT64RcxIn;
+  UINT64RdxIn;
+  UINT64R8In;
+  UINT64R9In;
+  UINT64RaxOut;
+  UINT64RcxOut;
+  UINT64RdxOut;
+  UINT64R8Out;
+  UINT64R9Out;
+  UINT8 *CallPending;
+} SVSM_CALL_DATA;
+
+/**
+  Executes a VMGEXIT instruction (VMMCALL with a REP prefix) with arguments
+  and return code
+
+  Executes a VMGEXIT instruction placing the specified arguments in the
+  corresponding registers before invocation. Upon return an XCHG is done to
+  atomically clear and retrieve the SVSM call pending value. The returned RAX
+  register value becomes the function return code. This function is intended
+  for use with an SVSM. This function is only available on IA-32 and x64.
+
+  @param[in,out]  SvsmCallPending  Pointer to the location of the SVSM call 
data
+
+  @return  Value of the RAX register on return
+
+**/
+UINT32
+EFIAPI
+AsmVmgExitSvsm (
+  IN OUT SVSM_CALL_DATA  *SvsmCallData
+  );
+
 /**
   Patch the immediate operand of an IA32 or X64 instruction such that the byte,
   word, dword or qword operand is encoded at the end of the instruction's
diff --git a/MdePkg/Library/BaseLib/Ia32/VmgExitSvsm.nasm 
b/MdePkg/Library/BaseLib/Ia32/VmgExitSvsm.nasm
new file mode 100644
index ..14717bd1af02
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/VmgExitSvsm.nasm
@@ -0,0 +1,39 @@
+;--
+;
+; Copyright (C) 2024, Advanced Micro Devices, Inc. All rights reserved.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Module Name:
+;
+;   VmgExitSvsm.Asm
+;
+; Abstract:
+;
+;   AsmVmgExitSvsm function
+;
+; Notes:
+;
+;--
+
+DEFAULT REL
+SECTION .text
+
+;--
+; UINT32
+; EFIAPI
+; AsmVmgExitSvsm (
+;   SVSM_CALL_DATA *SvsmCallData
+;   );
+;--
+global ASM_PFX(AsmVmgExitSvsm)
+ASM_PFX(AsmVmgExitSvsm):
+;
+; NASM doesn't support the vmmcall instruction in 32-bit mode and NASM versions
+; before 2.12 cannot translate the 64-bit "rep vmmcall" instruction into elf32
+; format. Given that VMGEXIT does not make sense on IA32, provide a stub
+; implementation that is identical to CpuBreakpoint(). In practice,
+; AsmVmgExitSvsm() should never be called on IA32.
+;
+int  3
+ret
+
diff --git a/MdePkg/Library/BaseLib/X64/VmgExitSvsm.nasm 
b/MdePkg/Library/BaseLib/X64/VmgExitSvsm.nasm
new file mode 100644
index ..b8af78890611
--- /dev/null
+++ b/MdePkg/Library/BaseLib/X64/VmgExitSvsm.nasm
@@ -0,0 +1,94 @@
+;--
+;
+; Copyright (C) 2024, Advanced Micro Devices, Inc. All rights reserved.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Module Name:
+;
+;   VmgExitSvsm.Asm
+;
+; Abstract:
+;
+;   AsmVmgExitSvsm function
+;
+; 

[edk2-devel] [PATCH v3 10/24] MdePkg/Register/Amd: Define the SVSM related information

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The Secure VM Service Module specification defines the interfaces needed
to allow multi-VMPL level execution of an SEV-SNP guest.

Define the SVSM related structures for the SVSM Calling Area as well as
the SVSM CAA MSR. The SVSM CAA MSR is an MSR register that is reserved for
software use and will not be implemented in hardware.

Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Zhiguang Liu 
Acked-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 MdePkg/Include/Register/Amd/Fam17Msr.h |  19 +++-
 MdePkg/Include/Register/Amd/Msr.h  |   3 +-
 MdePkg/Include/Register/Amd/Svsm.h | 101 
 MdePkg/Include/Register/Amd/SvsmMsr.h  |  35 +++
 4 files changed, 156 insertions(+), 2 deletions(-)

diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h 
b/MdePkg/Include/Register/Amd/Fam17Msr.h
index bb4e143e2456..f2d5ccb39dc7 100644
--- a/MdePkg/Include/Register/Amd/Fam17Msr.h
+++ b/MdePkg/Include/Register/Amd/Fam17Msr.h
@@ -6,7 +6,7 @@
   returned is a single 32-bit or 64-bit value, then a data structure is not
   provided for that MSR.
 
-  Copyright (c) 2017, Advanced Micro Devices. All rights reserved.
+  Copyright (c) 2017 - 2024, Advanced Micro Devices. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
   @par Specification Reference:
@@ -71,9 +71,24 @@ typedef union {
 UINT32ErrorCode;
   } SnpPageStateChangeResponse;
 
+  struct {
+UINT64Function  : 12;
+UINT64Reserved1 : 20;
+UINT64Vmpl  : 8;
+UINT64Reserved2 : 56;
+  } SnpVmplRequest;
+
+  struct {
+UINT32Function : 12;
+UINT32Reserved : 20;
+UINT32ErrorCode;
+  } SnpVmplResponse;
+
   VOID  *Ghcb;
 
   UINT64GhcbPhysicalAddress;
+
+  UINT64Uint64;
 } MSR_SEV_ES_GHCB_REGISTER;
 
 #define GHCB_INFO_SEV_INFO1
@@ -84,6 +99,8 @@ typedef union {
 #define GHCB_INFO_GHCB_GPA_REGISTER_RESPONSE  19
 #define GHCB_INFO_SNP_PAGE_STATE_CHANGE_REQUEST   20
 #define GHCB_INFO_SNP_PAGE_STATE_CHANGE_RESPONSE  21
+#define GHCB_INFO_SNP_VMPL_REQUEST22
+#define GHCB_INFO_SNP_VMPL_RESPONSE   23
 #define GHCB_HYPERVISOR_FEATURES_REQUEST  128
 #define GHCB_HYPERVISOR_FEATURES_RESPONSE 129
 #define GHCB_INFO_TERMINATE_REQUEST   256
diff --git a/MdePkg/Include/Register/Amd/Msr.h 
b/MdePkg/Include/Register/Amd/Msr.h
index 084eb892cdd9..04a3cbeb4315 100644
--- a/MdePkg/Include/Register/Amd/Msr.h
+++ b/MdePkg/Include/Register/Amd/Msr.h
@@ -6,7 +6,7 @@
   returned is a single 32-bit or 64-bit value, then a data structure is not
   provided for that MSR.
 
-  Copyright (c) 2017 - 2019, Advanced Micro Devices. All rights reserved.
+  Copyright (c) 2017 - 2024, Advanced Micro Devices. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
   @par Specification Reference:
@@ -19,5 +19,6 @@
 
 #include 
 #include 
+#include 
 
 #endif
diff --git a/MdePkg/Include/Register/Amd/Svsm.h 
b/MdePkg/Include/Register/Amd/Svsm.h
new file mode 100644
index ..9a989f803107
--- /dev/null
+++ b/MdePkg/Include/Register/Amd/Svsm.h
@@ -0,0 +1,101 @@
+/** @file
+  Secure VM Service Module (SVSM) Definition.
+
+  Provides data types allowing an SEV-SNP guest to interact with the SVSM.
+
+  Copyright (C) 2024, Advanced Micro Devices, Inc. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Specification Reference:
+  Secure VM Service Module Specification
+
+**/
+
+#ifndef SVSM_H_
+#define SVSM_H_
+
+#include 
+#include 
+#include 
+
+//
+// The SVSM definitions are part of the SNP Secrets Page:
+//   An SVSM is considered present if the SvsmSize field is non-zero.
+//
+typedef PACKED struct {
+  UINT8 Reserved1[320];
+
+  UINT64SvsmBase;
+  UINT64SvsmSize;
+  UINT64SvsmCaa;
+  UINT32SvsmMaxVersion;
+  UINT8 SvsmGuestVmpl;
+  UINT8 Reserved2[3];
+} SVSM_INFORMATION;
+
+typedef PACKED struct {
+  UINT8SvsmCallPending;
+  UINT8SvsmMemAvailable;
+  UINT8Reserved1[6];
+
+  //
+  // The remainder of the CAA 4KB area can be used for argument
+  // passing to the SVSM.
+  //
+  UINT8SvsmBuffer[SIZE_4KB - 8];
+} SVSM_CAA;
+
+#define SVSM_SUCCESS   0x
+#define SVSM_ERR_INCOMPLETE0x8000
+#define SVSM_ERR_UNSUPPORTED_PROTOCOL  0x8001
+#define SVSM_ERR_UNSUPPORTED_CALL  0x8002
+#define SVSM_ERR_INVALID_ADDRESS   0x8003
+#define SVSM_ERR_INVALID_FORMAT0x8004
+#define SVSM_ERR_INVALID_PARAMETER 0x8005
+#define SVSM_ERR_INVALID_REQUEST   0x8006
+#define SVSM_ERR_BUSY  0x8007
+
+#define SVSM_ERR_PVALIDATE_FAIL_INPUT  0x80001001
+#define SVSM_ERR_PVALIDATE_FAIL_SIZE_MISMATCH  0x80001006
+#define SVSM_ERR_PVALIDATE_FAIL_NO_CHANGE  0x80001010
+
+typedef PACKED struct {
+  UINT16Entries;
+  UINT16Next;
+
+  UINT8 Reserved[4];
+} SVSM_PVALIDATE_HE

[edk2-devel] [PATCH v3 08/24] OvmfPkg/BaseMemEncryptSevLib: Re-organize page state change support

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

In preparation for running under an SVSM at VMPL1 or higher (higher
numerically, lower privilege), re-organize the way a page state change
is performed in order to free up the GHCB for use by the SVSM support.

Currently, the page state change logic directly uses the GHCB shared
buffer to build the page state change structures. However, this will be
in conflict with the use of the GHCB should an SVSM call be required.

Instead, use a separate buffer (an area in the workarea during SEC and
an allocated page during PEI/DXE) to hold the page state change request
and only update the GHCB shared buffer as needed.

Since the information is copied to, and operated on, in the GHCB shared
buffer this has the added benefit of not requiring to save the start and
end entries for use when validating the memory during the page state
change sequence.

Cc: Ard Biesheuvel 
Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Cc: Laszlo Ersek 
Cc: Michael Roth 
Cc: Min Xu 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/Include/WorkArea.h|   9 +-
 OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChange.h |   6 +-
 OvmfPkg/Library/BaseMemEncryptSevLib/X64/DxeSnpSystemRamValidate.c|  11 +-
 OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c|  27 
-
 OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiSnpSystemRamValidate.c|  22 
+++-
 OvmfPkg/Library/BaseMemEncryptSevLib/X64/SecSnpSystemRamValidate.c|  14 ++-
 OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c | 109 
+---
 7 files changed, 146 insertions(+), 52 deletions(-)

diff --git a/OvmfPkg/Include/WorkArea.h b/OvmfPkg/Include/WorkArea.h
index b1c7045ce18c..e3b415db2caa 100644
--- a/OvmfPkg/Include/WorkArea.h
+++ b/OvmfPkg/Include/WorkArea.h
@@ -2,7 +2,7 @@
 
   Work Area structure definition
 
-  Copyright (c) 2021, AMD Inc.
+  Copyright (c) 2021 - 2024, AMD Inc.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
@@ -54,6 +54,13 @@ typedef struct _SEC_SEV_ES_WORK_AREA {
   // detection in OvmfPkg/ResetVector/Ia32/AmdSev.c
   //
   UINT8 ReceivedVc;
+  UINT8 Reserved[7];
+
+  // Used by SEC to generate Page State Change requests. This should be
+  // sized less than an equal to the GHCB shared buffer area to allow a
+  // single call to the hypervisor.
+  //
+  UINT8 WorkBuffer[1024];
 } SEC_SEV_ES_WORK_AREA;
 
 //
diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChange.h 
b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChange.h
index 43319cc9ed17..5d23d1828b25 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChange.h
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChange.h
@@ -2,7 +2,7 @@
 
   SEV-SNP Page Validation functions.
 
-  Copyright (c) 2021 AMD Incorporated. All rights reserved.
+  Copyright (c) 2021 - 2024, AMD Incorporated. All rights reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -24,7 +24,9 @@ InternalSetPageState (
   IN EFI_PHYSICAL_ADDRESS  BaseAddress,
   IN UINTN NumPages,
   IN SEV_SNP_PAGE_STATEState,
-  IN BOOLEAN   UseLargeEntry
+  IN BOOLEAN   UseLargeEntry,
+  IN VOID  *PscBuffer,
+  IN UINTN PscBufferSize
   );
 
 VOID
diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/DxeSnpSystemRamValidate.c 
b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/DxeSnpSystemRamValidate.c
index cbcdd46f528f..2515425e467a 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/DxeSnpSystemRamValidate.c
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/DxeSnpSystemRamValidate.c
@@ -2,7 +2,7 @@
 
   SEV-SNP Page Validation functions.
 
-  Copyright (c) 2021 AMD Incorporated. All rights reserved.
+  Copyright (c) 2021 - 2024, AMD Incorporated. All rights reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -16,6 +16,8 @@
 #include "SnpPageStateChange.h"
 #include "VirtualMemory.h"
 
+STATIC VOID  *mPscBuffer = NULL;
+
 /**
   Pre-validate the system RAM when SEV-SNP is enabled in the guest VM.
 
@@ -52,5 +54,10 @@ MemEncryptSevSnpPreValidateSystemRam (
 }
   }
 
-  InternalSetPageState (BaseAddress, NumPages, SevSnpPagePrivate, TRUE);
+  if (mPscBuffer == NULL) {
+mPscBuffer = AllocateReservedPages (1);
+ASSERT (mPscBuffer != NULL);
+  }
+
+  InternalSetPageState (BaseAddress, NumPages, SevSnpPagePrivate, TRUE, 
mPscBuffer, EFI_PAGE_SIZE);
 }
diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c 
b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c
index dee3fb8914ca..337a7d926b15 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c
@@ -3,7 +3,7 @@
   Virtual Memory Management Services to set or clear the memory encryption bit
 
   Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
-  Co

[edk2-devel] [PATCH v3 09/24] OvmfPkg/BaseMemEncryptSevLib: Maximize Page State Change efficiency

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

When building the Page State Change entries for a range of memory, it can
happen that multiple calls to BuildPageStateBuffer() need to be made. If
the size of the input work area passed to BuildPageStateBuffer() exceeds
the number of entries that can be passed to the hypervisor using the GHCB
shared buffer, the Page State Change VMGEXIT support will issue multiple
VMGEXITs to process all entries in the buffer.

However, it could be that the final VMGEXIT for each round of Page State
Changes is only for a small number of entries and subsequent VMGEXITs may
still be issued to handle the full range of memory requested. To maximize
the number of entries processed during the Page State Change VMGEXIT,
limit BuildPageStateBuffer() to not build entries that exceed the maximum
number of entries that can be handled in a single Page State Change
VMGEXIT.

Cc: Ard Biesheuvel 
Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Cc: Laszlo Ersek 
Cc: Michael Roth 
Cc: Min Xu 
Reviewed-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c | 11 
+++
 1 file changed, 11 insertions(+)

diff --git 
a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c 
b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c
index bcc0798d6b02..f1883239a661 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c
@@ -145,6 +145,7 @@ BuildPageStateBuffer (
   UINTN RmpPageSize;
   UINTN Index;
   UINTN IndexMax;
+  UINTN PscIndexMax;
 
   // Clear the page state structure
   SetMem (Info, InfoSize, 0);
@@ -153,6 +154,16 @@ BuildPageStateBuffer (
   IndexMax= (InfoSize - sizeof (Info->Header)) / sizeof (Info->Entry[0]);
   NextAddress = EndAddress;
 
+  //
+  // Make the use of the work area as efficient as possible relative to
+  // exiting from the guest to the hypervisor. Maximize the number of entries
+  // that can be processed per exit.
+  //
+  PscIndexMax = (IndexMax / SNP_PAGE_STATE_MAX_ENTRY) * 
SNP_PAGE_STATE_MAX_ENTRY;
+  if (PscIndexMax > 0) {
+IndexMax = MIN (IndexMax, PscIndexMax);
+  }
+
   //
   // Populate the page state entry structure
   //
-- 
2.43.2



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[edk2-devel] [PATCH v3 07/24] MdePkg: Avoid hardcoded value for number of Page State Change entries

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The SNP_PAGE_STATE_MAX_ENTRY is based on the number of entries that can
fit in the GHCB shared buffer. As a result, the SNP_PAGE_STATE_CHANGE_INFO
structure maps the full GHCB shared buffer based on the shared buffer size
being 2032 bytes.

Instead of using a hardcoded value for SNP_PAGE_STATE_MAX_ENTRY, use a
build calculated value. Since the SNP_PAGE_STATE_CHANGE_INFO is used as a
mapping, eliminate the hardcoded array size so that the structure can be
used based on any size buffer.

Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Zhiguang Liu 
Signed-off-by: Tom Lendacky 
---
 MdePkg/Include/Register/Amd/Ghcb.h | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/MdePkg/Include/Register/Amd/Ghcb.h 
b/MdePkg/Include/Register/Amd/Ghcb.h
index bd7bf986d03f..ae1486b526a6 100644
--- a/MdePkg/Include/Register/Amd/Ghcb.h
+++ b/MdePkg/Include/Register/Amd/Ghcb.h
@@ -197,13 +197,14 @@ typedef struct {
   UINT32Reserved;
 } SNP_PAGE_STATE_HEADER;
 
-#define SNP_PAGE_STATE_MAX_ENTRY  253
-
 typedef struct {
   SNP_PAGE_STATE_HEADERHeader;
-  SNP_PAGE_STATE_ENTRY Entry[SNP_PAGE_STATE_MAX_ENTRY];
+  SNP_PAGE_STATE_ENTRY Entry[];
 } SNP_PAGE_STATE_CHANGE_INFO;
 
+#define SNP_PAGE_STATE_MAX_ENTRY  \
+  ((sizeof (((GHCB *)0)->SharedBuffer) - sizeof (SNP_PAGE_STATE_HEADER)) / 
sizeof (SNP_PAGE_STATE_ENTRY))
+
 //
 // Get APIC IDs
 //
-- 
2.43.2



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[edk2-devel] [PATCH v3 06/24] OvmfPkg/BaseMemEncryptSevLib: Calculate memory size for Page State Change

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

Calculate the amount of memory that can be use to build the Page State
Change data (SNP_PAGE_STATE_CHANGE_INFO) instead of using a hard-coded
size. This allows for changes to the GHCB shared buffer size without
having to make changes to the page state change code.

Cc: Ard Biesheuvel 
Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Cc: Laszlo Ersek 
Cc: Michael Roth 
Cc: Min Xu 
Reviewed-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c | 12 

 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git 
a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c 
b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c
index 6a11adb06efb..60b176ab14b8 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c
@@ -133,23 +133,26 @@ BuildPageStateBuffer (
   IN EFI_PHYSICAL_ADDRESSEndAddress,
   IN SEV_SNP_PAGE_STATE  State,
   IN BOOLEAN UseLargeEntry,
-  IN SNP_PAGE_STATE_CHANGE_INFO  *Info
+  IN SNP_PAGE_STATE_CHANGE_INFO  *Info,
+  IN UINTN   InfoSize
   )
 {
   EFI_PHYSICAL_ADDRESS  NextAddress;
   UINTN RmpPageSize;
   UINTN Index;
+  UINTN IndexMax;
 
   // Clear the page state structure
-  SetMem (Info, sizeof (*Info), 0);
+  SetMem (Info, InfoSize, 0);
 
   Index   = 0;
+  IndexMax= (InfoSize - sizeof (Info->Header)) / sizeof (Info->Entry[0]);
   NextAddress = EndAddress;
 
   //
   // Populate the page state entry structure
   //
-  while ((BaseAddress < EndAddress) && (Index < SNP_PAGE_STATE_MAX_ENTRY)) {
+  while ((BaseAddress < EndAddress) && (Index < IndexMax)) {
 //
 // Is this a 2MB aligned page? Check if we can use the Large RMP entry.
 //
@@ -265,7 +268,8 @@ InternalSetPageState (
 EndAddress,
 State,
 UseLargeEntry,
-Info
+Info,
+sizeof (Ghcb->SharedBuffer)
 );
 
 //
-- 
2.43.2



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[edk2-devel] [PATCH v3 05/24] OvmfPkg/BaseMemEncryptSevLib: Fix uncrustify errors

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

In prep for follow-on patches, fix an area of the code that does not meet
the uncrustify coding standards.

Cc: Ard Biesheuvel 
Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Cc: Laszlo Ersek 
Cc: Michael Roth 
Cc: Min Xu 
Reviewed-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c | 27 
+++-
 1 file changed, 15 insertions(+), 12 deletions(-)

diff --git 
a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c 
b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c
index 46c6682760d5..6a11adb06efb 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateChangeInternal.c
@@ -2,7 +2,7 @@
 
   SEV-SNP Page Validation functions.
 
-  Copyright (c) 2021 AMD Incorporated. All rights reserved.
+  Copyright (c) 2021 - 2024, AMD Incorporated. All rights reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -78,7 +78,9 @@ PvalidateRange (
   IN  BOOLEAN Validate
   )
 {
-  UINTN RmpPageSize, Ret, i;
+  UINTN RmpPageSize;
+  UINTN Index;
+  UINTN Ret;
   EFI_PHYSICAL_ADDRESS  Address;
 
   for ( ; StartIndex <= EndIndex; StartIndex++) {
@@ -96,7 +98,7 @@ PvalidateRange (
 // the RMP entry is 4K and we are validating it as a 2MB.
 //
 if ((Ret == PVALIDATE_RET_SIZE_MISMATCH) && (RmpPageSize == 
PvalidatePageSize2MB)) {
-  for (i = 0; i < PAGES_PER_LARGE_ENTRY; i++) {
+  for (Index = 0; Index < PAGES_PER_LARGE_ENTRY; Index++) {
 Ret = AsmPvalidate (PvalidatePageSize4K, Validate, Address);
 if (Ret) {
   break;
@@ -135,18 +137,19 @@ BuildPageStateBuffer (
   )
 {
   EFI_PHYSICAL_ADDRESS  NextAddress;
-  UINTN i, RmpPageSize;
+  UINTN RmpPageSize;
+  UINTN Index;
 
   // Clear the page state structure
   SetMem (Info, sizeof (*Info), 0);
 
-  i   = 0;
+  Index   = 0;
   NextAddress = EndAddress;
 
   //
   // Populate the page state entry structure
   //
-  while ((BaseAddress < EndAddress) && (i < SNP_PAGE_STATE_MAX_ENTRY)) {
+  while ((BaseAddress < EndAddress) && (Index < SNP_PAGE_STATE_MAX_ENTRY)) {
 //
 // Is this a 2MB aligned page? Check if we can use the Large RMP entry.
 //
@@ -160,14 +163,14 @@ BuildPageStateBuffer (
   NextAddress = BaseAddress + EFI_PAGE_SIZE;
 }
 
-Info->Entry[i].GuestFrameNumber = BaseAddress >> EFI_PAGE_SHIFT;
-Info->Entry[i].PageSize = RmpPageSize;
-Info->Entry[i].Operation= MemoryStateToGhcbOp (State);
-Info->Entry[i].CurrentPage  = 0;
-Info->Header.EndEntry   = (UINT16)i;
+Info->Entry[Index].GuestFrameNumber = BaseAddress >> EFI_PAGE_SHIFT;
+Info->Entry[Index].PageSize = RmpPageSize;
+Info->Entry[Index].Operation= MemoryStateToGhcbOp (State);
+Info->Entry[Index].CurrentPage  = 0;
+Info->Header.EndEntry   = (UINT16)Index;
 
 BaseAddress = NextAddress;
-i++;
+Index++;
   }
 
   return NextAddress;
-- 
2.43.2



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[edk2-devel] [PATCH v3 04/24] OvmfPkg/PlatformPei: Retrieve APIC IDs from the hypervisor

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

If the hypervisor supports retrieval of the vCPU APIC IDs, retrieve
them before any APs are actually started. The APIC IDs can be used
to start the APs for any SEV-SNP guest, but is a requirement for an
SEV-SNP guest that is running under an SVSM.

After retrieving the APIC IDs, save the address of the APIC ID data
structure in a GUIDed HOB.

Cc: Ard Biesheuvel 
Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Cc: Laszlo Ersek 
Cc: Michael Roth 
Cc: Min Xu 
Reviewed-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/PlatformPei/PlatformPei.inf |  1 +
 OvmfPkg/PlatformPei/AmdSev.c| 92 +++-
 2 files changed, 92 insertions(+), 1 deletion(-)

diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf 
b/OvmfPkg/PlatformPei/PlatformPei.inf
index ad52be306560..2206316fec9e 100644
--- a/OvmfPkg/PlatformPei/PlatformPei.inf
+++ b/OvmfPkg/PlatformPei/PlatformPei.inf
@@ -45,6 +45,7 @@ [Guids]
   gEfiMemoryTypeInformationGuid
   gFdtHobGuid
   gUefiOvmfPkgPlatformInfoGuid
+  gGhcbApicIdsGuid
 
 [LibraryClasses]
   BaseLib
diff --git a/OvmfPkg/PlatformPei/AmdSev.c b/OvmfPkg/PlatformPei/AmdSev.c
index e6b602d79a05..a9de33074a69 100644
--- a/OvmfPkg/PlatformPei/AmdSev.c
+++ b/OvmfPkg/PlatformPei/AmdSev.c
@@ -1,7 +1,7 @@
 /**@file
   Initialize Secure Encrypted Virtualization (SEV) support
 
-  Copyright (c) 2017 - 2020, Advanced Micro Devices. All rights reserved.
+  Copyright (c) 2017 - 2024, Advanced Micro Devices. All rights reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -9,6 +9,7 @@
 //
 // The package level header files this module uses
 //
+#include 
 #include 
 #include 
 #include 
@@ -31,6 +32,87 @@ GetHypervisorFeature (
   VOID
   );
 
+/**
+  Retrieve APIC IDs from the hypervisor.
+
+**/
+STATIC
+VOID
+AmdSevSnpGetApicIds (
+  VOID
+  )
+{
+  MSR_SEV_ES_GHCB_REGISTER  Msr;
+  GHCB  *Ghcb;
+  BOOLEAN   InterruptState;
+  UINT64VmgExitStatus;
+  UINT64PageCount;
+  BOOLEAN   PageCountValid;
+  VOID  *ApicIds;
+  RETURN_STATUS Status;
+  UINT64GuidData;
+
+  Msr.GhcbPhysicalAddress = AsmReadMsr64 (MSR_SEV_ES_GHCB);
+  Ghcb= Msr.Ghcb;
+
+  PageCount  = 0;
+  PageCountValid = FALSE;
+
+  CcExitVmgInit (Ghcb, &InterruptState);
+  Ghcb->SaveArea.Rax = PageCount;
+  CcExitVmgSetOffsetValid (Ghcb, GhcbRax);
+  VmgExitStatus = CcExitVmgExit (Ghcb, SVM_EXIT_GET_APIC_IDS, 0, 0);
+  if (CcExitVmgIsOffsetValid (Ghcb, GhcbRax)) {
+PageCount  = Ghcb->SaveArea.Rax;
+PageCountValid = TRUE;
+  }
+
+  CcExitVmgDone (Ghcb, InterruptState);
+
+  ASSERT (VmgExitStatus == 0);
+  ASSERT (PageCountValid);
+  if ((VmgExitStatus != 0) || !PageCountValid) {
+return;
+  }
+
+  //
+  // Allocate the memory for the APIC IDs
+  //
+  ApicIds = AllocateReservedPages ((UINTN)PageCount);
+  ASSERT (ApicIds != NULL);
+
+  Status = MemEncryptSevClearPageEncMask (
+ 0,
+ (UINTN)ApicIds,
+ (UINTN)PageCount
+ );
+  ASSERT_RETURN_ERROR (Status);
+
+  ZeroMem (ApicIds, EFI_PAGES_TO_SIZE ((UINTN)PageCount));
+
+  PageCountValid = FALSE;
+
+  CcExitVmgInit (Ghcb, &InterruptState);
+  Ghcb->SaveArea.Rax = PageCount;
+  CcExitVmgSetOffsetValid (Ghcb, GhcbRax);
+  VmgExitStatus = CcExitVmgExit (Ghcb, SVM_EXIT_GET_APIC_IDS, (UINTN)ApicIds, 
0);
+  if (CcExitVmgIsOffsetValid (Ghcb, GhcbRax) && (Ghcb->SaveArea.Rax == 
PageCount)) {
+PageCountValid = TRUE;
+  }
+
+  CcExitVmgDone (Ghcb, InterruptState);
+
+  ASSERT (VmgExitStatus == 0);
+  ASSERT (PageCountValid);
+  if ((VmgExitStatus != 0) || !PageCountValid) {
+FreePages (ApicIds, (UINTN)PageCount);
+return;
+  }
+
+  GuidData = (UINT64)(UINTN)ApicIds;
+  BuildGuidDataHob (&gGhcbApicIdsGuid, &GuidData, sizeof (GuidData));
+}
+
 /**
   Initialize SEV-SNP support if running as an SEV-SNP guest.
 
@@ -78,6 +160,14 @@ AmdSevSnpInitialize (
   }
 }
   }
+
+  //
+  // Retrieve the APIC IDs if the hypervisor supports it. These will be used
+  // to always start APs using SNP AP Create.
+  //
+  if ((HvFeatures & GHCB_HV_FEATURES_APIC_ID_LIST) == 
GHCB_HV_FEATURES_APIC_ID_LIST) {
+AmdSevSnpGetApicIds ();
+  }
 }
 
 /**
-- 
2.43.2



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[edk2-devel] [PATCH v3 03/24] UefiCpuPkg/MpInitLib: Always use AP Create if GhcbApicIds HOB is present

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

Currently, the first time an AP is started for an SEV-SNP guest, it relies
on the VMSA as set by the hypervisor. If the list of APIC IDs has been
retrieved, this is not necessary. The list of APIC IDs will be identified
by a GUIDed HOB. If the GUIDed HOB is present, use the SEV-SNP AP Create
protocol to start the AP for the first time and each time thereafter.

Cc: Gerd Hoffmann 
Cc: Laszlo Ersek 
Cc: Rahul Kumar 
Cc: Ray Ni 
Reviewed-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 UefiCpuPkg/UefiCpuPkg.dec |  5 +-
 UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf |  1 +
 UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf |  1 +
 UefiCpuPkg/Include/Guid/GhcbApicIds.h | 17 +
 UefiCpuPkg/Library/MpInitLib/MpLib.h  | 15 +++-
 UefiCpuPkg/Library/MpInitLib/Ia32/AmdSev.c| 21 +-
 UefiCpuPkg/Library/MpInitLib/MpLib.c  |  9 ++-
 UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c | 78 ++--
 8 files changed, 133 insertions(+), 14 deletions(-)

diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 571b59b36f0a..c31d8b6736cf 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -2,7 +2,7 @@
 # This Package provides UEFI compatible CPU modules and libraries.
 #
 # Copyright (c) 2007 - 2023, Intel Corporation. All rights reserved.
-# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+# Copyright (C) 2023 - 2024, Advanced Micro Devices, Inc. All rights 
reserved.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -91,6 +91,9 @@ [Guids]
   ## Include/Guid/MpInformation2.h
   gMpInformation2HobGuid = { 0x417a7f64, 0xf4e9, 0x4b32, {0x84, 0x6a, 
0x5c, 0xc4, 0xd8, 0x62, 0x18, 0x79 }}
 
+  ## Include/Guid/GhcbApicIds.h
+  gGhcbApicIdsGuid   = { 0xbc964338, 0xee39, 0x4fc8, { 0xa2, 0x24, 
0x10, 0x10, 0x8b, 0x17, 0x80, 0x1b }}
+
 [Protocols]
   ## Include/Protocol/SmmCpuService.h
   gEfiSmmCpuServiceProtocolGuid   = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 
0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}
diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
index 55e46d4a1fad..69950fcd1289 100644
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
@@ -68,6 +68,7 @@ [Guids]
   gEfiEventExitBootServicesGuid ## CONSUMES  ## Event
   gEfiEventLegacyBootGuid   ## SOMETIMES_CONSUMES  ## Event
   gEdkiiMicrocodePatchHobGuid   ## SOMETIMES_CONSUMES  ## HOB
+  gGhcbApicIdsGuid  ## SOMETIMES_CONSUMES  ## HOB
 
 [Pcd]
   gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber## 
CONSUMES
diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
index bc3d716aa951..22f74a814534 100644
--- a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
@@ -76,3 +76,4 @@ [Ppis]
 [Guids]
   gEdkiiS3SmmInitDoneGuid
   gEdkiiMicrocodePatchHobGuid
+  gGhcbApicIdsGuid   ## SOMETIMES_CONSUMES
diff --git a/UefiCpuPkg/Include/Guid/GhcbApicIds.h 
b/UefiCpuPkg/Include/Guid/GhcbApicIds.h
new file mode 100644
index ..9d5bfcb0de22
--- /dev/null
+++ b/UefiCpuPkg/Include/Guid/GhcbApicIds.h
@@ -0,0 +1,17 @@
+/** @file
+  APIC ID list retrieved for an SEV-ES/SEV-SNP guest via the GHCB.
+
+  Copyright (C) 2024, Advanced Micro Devices, Inc. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef GHCB_APIC_IDS_H_
+#define GHCB_APIC_IDS_H_
+
+#define GHCB_APIC_IDS_GUID \
+  { 0xbc964338, 0xee39, 0x4fc8, { 0xa2, 0x24, 0x10, 0x10, 0x8b, 0x17, 0x80, 
0x1b }}
+
+extern EFI_GUID  gGhcbApicIdsGuid;
+
+#endif
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h 
b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index d26035559f22..65e05c4806f5 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -2,7 +2,7 @@
   Common header file for MP Initialize Library.
 
   Copyright (c) 2016 - 2023, Intel Corporation. All rights reserved.
-  Copyright (c) 2020, AMD Inc. All rights reserved.
+  Copyright (c) 2020 - 2024, AMD Inc. All rights reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -924,6 +924,19 @@ SevSnpCreateAP (
   IN INTN ProcessorNumber
   );
 
+/**
+  Determine if the SEV-SNP AP Create protocol should be used.
+
+  @param[in]  CpuMpData  Pointer to CPU MP Data
+
+  @retval TRUE   Use SEV-SNP AP Create protocol
+  @retval FALSE  Do not use SEV-SNP AP Create protocol
+**/
+BOOLEAN
+CanUseSevSnpCreateAP (
+  IN  CPU_MP_DATA  *CpuMpData
+  );
+
 /**
   Get pointer to CPU MP Data structure from GUIDed HOB.
 
diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/AmdSev.c 
b/UefiCpuPkg/Library/MpInitLib/Ia32/AmdSev.c
index c83144285b68..0478e92317f1 100644
--- a/UefiCpuPkg/Library

[edk2-devel] [PATCH v3 02/24] MdePkg: GHCB APIC ID retrieval support definitions

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

When an SVSM is present, starting the APs requires knowledge of the APIC
IDs. Create the definitions required to retrieve and hold the APIC ID
information of all the vCPUs present in the guest.

Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Zhiguang Liu 
Acked-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 MdePkg/Include/Register/Amd/Ghcb.h | 12 +++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/MdePkg/Include/Register/Amd/Ghcb.h 
b/MdePkg/Include/Register/Amd/Ghcb.h
index dab396f3ede8..bd7bf986d03f 100644
--- a/MdePkg/Include/Register/Amd/Ghcb.h
+++ b/MdePkg/Include/Register/Amd/Ghcb.h
@@ -4,7 +4,7 @@
   Provides data types allowing an SEV-ES guest to interact with the hypervisor
   using the GHCB protocol.
 
-  Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
+  Copyright (C) 2020 - 2024, Advanced Micro Devices, Inc. All rights 
reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
   @par Specification Reference:
@@ -56,6 +56,7 @@
 #define SVM_EXIT_AP_JUMP_TABLE  0x8005ULL
 #define SVM_EXIT_SNP_PAGE_STATE_CHANGE  0x8010ULL
 #define SVM_EXIT_SNP_AP_CREATION0x8013ULL
+#define SVM_EXIT_GET_APIC_IDS   0x8017ULL
 #define SVM_EXIT_HYPERVISOR_FEATURES0x8000FFFDULL
 #define SVM_EXIT_UNSUPPORTED0x8000ULL
 
@@ -170,6 +171,7 @@ typedef union {
 #define GHCB_HV_FEATURES_SNP_AP_CREATE   (GHCB_HV_FEATURES_SNP 
| BIT1)
 #define GHCB_HV_FEATURES_SNP_RESTRICTED_INJECTION
(GHCB_HV_FEATURES_SNP_AP_CREATE | BIT2)
 #define GHCB_HV_FEATURES_SNP_RESTRICTED_INJECTION_TIMER  
(GHCB_HV_FEATURES_SNP_RESTRICTED_INJECTION | BIT3)
+#define GHCB_HV_FEATURES_APIC_ID_LISTBIT4
 
 //
 // SNP Page State Change.
@@ -202,6 +204,14 @@ typedef struct {
   SNP_PAGE_STATE_ENTRY Entry[SNP_PAGE_STATE_MAX_ENTRY];
 } SNP_PAGE_STATE_CHANGE_INFO;
 
+//
+// Get APIC IDs
+//
+typedef struct {
+  UINT32NumEntries;
+  UINT32ApicIds[];
+} GHCB_APIC_IDS;
+
 //
 // SEV-ES save area mapping structures used for SEV-SNP AP Creation.
 // Only the fields required to be set to a non-zero value are defined.
-- 
2.43.2



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[edk2-devel] [PATCH v3 01/24] OvmfPkg/BaseMemEncryptLib: Fix error check from AsmRmpAdjust()

2024-03-08 Thread Lendacky, Thomas via groups.io
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The AsmRmpAdjust() function returns a UINT32, however in SevSnpIsVmpl0()
the return value is checked with EFI_ERROR() when it should just be
compared to 0. Fix the error check.

Cc: Ard Biesheuvel 
Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Cc: Laszlo Ersek 
Cc: Michael Roth 
Cc: Min Xu 
Reviewed-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/Library/BaseMemEncryptSevLib/X64/SecSnpSystemRamValidate.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SecSnpSystemRamValidate.c 
b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SecSnpSystemRamValidate.c
index 7797febb8ac6..be43a44e4e1d 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SecSnpSystemRamValidate.c
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/SecSnpSystemRamValidate.c
@@ -2,7 +2,7 @@
 
   SEV-SNP Page Validation functions.
 
-  Copyright (c) 2021 AMD Incorporated. All rights reserved.
+  Copyright (c) 2021 - 2024, AMD Incorporated. All rights reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -31,8 +31,8 @@ SevSnpIsVmpl0 (
   VOID
   )
 {
-  UINT64  Rdx;
-  EFI_STATUS  Status;
+  UINT64  Rdx;
+  UINT32  Status;
 
   //
   // There is no straightforward way to query the current VMPL level.
@@ -44,7 +44,7 @@ SevSnpIsVmpl0 (
   Rdx = 1;
 
   Status = AsmRmpAdjust ((UINT64)gVmpl0Data, 0, Rdx);
-  if (EFI_ERROR (Status)) {
+  if (Status != 0) {
 return FALSE;
   }
 
-- 
2.43.2



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[edk2-devel] [PATCH v3 00/24] Provide SEV-SNP support for running under an SVSM

2024-03-08 Thread Lendacky, Thomas via groups.io


BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

This series adds SEV-SNP support for running OVMF under an Secure VM
Service Module (SVSM) at a less privileged VM Privilege Level (VMPL).
By running at a less priviledged VMPL, the SVSM can be used to provide
services, e.g. a virtual TPM, for the guest OS within the SEV-SNP
confidential VM (CVM) rather than trust such services from the hypervisor.

Currently, OVMF expects to run at the highest VMPL, VMPL0, and there are
certain SNP related operations that require that VMPL level. Specifically,
the PVALIDATE instruction and the RMPADJUST instruction when setting the
the VMSA attribute of a page (used when starting APs).

If OVMF is to run at a less privileged VMPL, e.g. VMPL2, then it must
use an SVSM (which is running at VMPL0) to perform the operations that
it is no longer able to perform.

When running under an SVSM, OVMF must know the APIC IDs of the vCPUs that
it will be starting. As a result, the GHCB APIC ID retrieval action must
be performed. Since this service can also work with SEV-SNP running at
VMPL0, the patches to make use of this feature are near the beginning of
the series.

How OVMF interacts with and uses the SVSM is documented in the SVSM
specification [1] and the GHCB specification [2].

This support creates a new AmdSvsmLib library that is used by MpInitLib.
The edk2-platforms repo requires updates/patches to add the new library
requirement. To accomodate that, this series could be split between:

patch number 12:
  UefiCpuPkg/AmdSvsmLib: Create the AmdSvsmLib library to support an SVSM

and patch number 13:
  UefiPayloadPkg: Prepare UefiPayloadPkg to use the AmdSvsmLib library

The updates to edk2-platforms can be applied at the split.

This series introduces support to run OVMF under an SVSM. It consists
of:
  - Retrieving the list of vCPU APIC IDs and starting up all APs without
performing a broadcast SIPI
  - Reorganizing the page state change support to not directly use the
GHCB buffer since an SVSM will use the calling area buffer, instead
  - Detecting the presence of an SVSM
  - When not running at VMPL0, invoking the SVSM for page validation and
VMSA page creation/deletion
  - Detecting and allowing OVMF to run in a VMPL other than 0 when an
SVSM is present

The series is based off of commit:

  e60529df58e4 ("UefiPayloadPkg: Make Dsc accomodative of other archs")

[1] 
https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/specifications/58019.pdf
[2] 
https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/specifications/56421.pdf

Cc: Anatol Belski 
Cc: Anthony Perard 
Cc: Ard Biesheuvel 
Cc: Corvin Köhne 
Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: Gua Guo 
Cc: Guo Dong 
Cc: James Lu 
Cc: Jianyong Wu 
Cc: Jiewen Yao 
Cc: Laszlo Ersek 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Michael Roth 
Cc: Min Xu 
Cc: Rahul Kumar 
Cc: Ray Ni 
Cc: Rebecca Cran 
Cc: Sean Rhodes 
Cc: Zhiguang Liu 

---

Changes in v3:
- Renamed CcSvsmLib to a more AMD-specific AmdSvsmLib with corresponding
  function name changes
- Moved the GHCB APIC ID list GUID definition from MdePkg to UefiCpuPkg
  and change the name from gEfiApicIdsGuid to gGhcbApicIdsGuid
- Separated the OvmfPkg changes for the AmdSvsmLib into two patches:
  - First patch adds usage of the AmdSvsmLib NULL library
  - Second patch adds the OVMF AmdSvsmLib implementation
- Updated the commit message for the OVMF AmdSvsmLib implementation to
  indicate that the base functionality for PVALIDATE and RMPADJUST was
  copied from the original locations in prep for converting those sites
  to using the library API.

Changes in v2:
- Move the APIC IDs retrieval support to the beginning of the patch series
- Use a GUIDed HOB to hold the APIC ID list instead of a PCD
- Split up Page State Change reorganization into multiple patches
- Created CcSvsmLib library instead of extending CcExitLib
- This will require a corresponding update to edk2-platform DSC files
- Removed Ray Ni's Acked-by since it is not a minor change
- Variable name changes and other misc changes

Tom Lendacky (24):
  OvmfPkg/BaseMemEncryptLib: Fix error check from AsmRmpAdjust()
  MdePkg: GHCB APIC ID retrieval support definitions
  UefiCpuPkg/MpInitLib: Always use AP Create if GhcbApicIds HOB is
present
  OvmfPkg/PlatformPei: Retrieve APIC IDs from the hypervisor
  OvmfPkg/BaseMemEncryptSevLib: Fix uncrustify errors
  OvmfPkg/BaseMemEncryptSevLib: Calculate memory size for Page State
Change
  MdePkg: Avoid hardcoded value for number of Page State Change entries
  OvmfPkg/BaseMemEncryptSevLib: Re-organize page state change support
  OvmfPkg/BaseMemEncryptSevLib: Maximize Page State Change efficiency
  MdePkg/Register/Amd: Define the SVSM related information
  MdePkg/BaseLib: Add a new VMGEXIT instruction invocation for SVSM
  UefiCpuPkg/AmdSvsmLib: Create the AmdSvsmLib library to support an
SVSM
  UefiPayloadPkg: Prepare UefiPayloadPkg to use the AmdSvsmLi

Re: [edk2-devel] [edk2-platforms PATCH v3 2/7] Silicon/Marvell: Odyssey SmcLib

2024-03-08 Thread Abdul Lateef Attar via groups.io

Hi Narinder,

    Patch looks good with minor comments inline.

Thanks

AbduL

On 18-01-2024 06:48, Narinder Dhillon via groups.io wrote:

Caution: This message originated from an External Source. Use proper caution 
when opening attachments, clicking links, or responding.


From: Narinder Dhillon

This patch provides SMC call needed by Odyssey to determine size
of available memory.

Signed-off-by: Narinder Dhillon
---
  Silicon/Marvell/Library/SmcLib/SmcLib.c   | 24 +++
  Silicon/Marvell/Library/SmcLib/SmcLib.inf | 29 +++
  .../Include/IndustryStandard/SmcLib.h | 28 ++
  3 files changed, 81 insertions(+)
  create mode 100644 Silicon/Marvell/Library/SmcLib/SmcLib.c
  create mode 100644 Silicon/Marvell/Library/SmcLib/SmcLib.inf
  create mode 100644 
Silicon/Marvell/MarvellSiliconPkg/Include/IndustryStandard/SmcLib.h

diff --git a/Silicon/Marvell/Library/SmcLib/SmcLib.c 
b/Silicon/Marvell/Library/SmcLib/SmcLib.c
new file mode 100644
index 00..0280983dd0
--- /dev/null
+++ b/Silicon/Marvell/Library/SmcLib/SmcLib.c
@@ -0,0 +1,24 @@
+/** @file
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*https://spdx.org/licenses
+*
+* Copyright (C) 2023 Marvell
+*
+* Source file for Marvell SMC Interface
+*
+**/
+
+#include 
+#include   // ArmCallSmc
+
+UINTN SmcGetRamSize ( IN UINTN Node )
+{
+  ARM_SMC_ARGS ArmSmcArgs;
+
+  ArmSmcArgs.Arg0 = MV_SMC_ID_DRAM_SIZE;
+  ArmSmcArgs.Arg1 = Node;
+  ArmCallSmc (&ArmSmcArgs);
+
+  return ArmSmcArgs.Arg0;
+}
diff --git a/Silicon/Marvell/Library/SmcLib/SmcLib.inf 
b/Silicon/Marvell/Library/SmcLib/SmcLib.inf
new file mode 100644
index 00..7fc1085b85
--- /dev/null
+++ b/Silicon/Marvell/Library/SmcLib/SmcLib.inf
@@ -0,0 +1,29 @@
+#/** @file
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#https://spdx.org/licenses
+#
+# Copyright (C) 2023 Marvell
+#
+# Marvell SMC Interface library
+#
+#**/
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = SmcLib
+  FILE_GUID  = fee427a7-816a-4636-bb81-a640c8288f28
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = SmcLib


[Abdul] New library class is defined here, but didnt the corresponding 
entry in MarvellSiliconPkg.dec file, there should be an entry in .dec file


SmcLib|Include/IndustryStandard/SmcLib.h

Also its good to have this patch first, patch 1/7 consumes this library 
class.



+
+[Sources]
+  SmcLib.c
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  MdePkg/MdePkg.dec
+  Silicon/Marvell/MarvellSiliconPkg/MarvellSiliconPkg.dec
+
+[LibraryClasses]
+  ArmSmcLib
diff --git 
a/Silicon/Marvell/MarvellSiliconPkg/Include/IndustryStandard/SmcLib.h 
b/Silicon/Marvell/MarvellSiliconPkg/Include/IndustryStandard/SmcLib.h
new file mode 100644
index 00..f2d0bed356
--- /dev/null
+++ b/Silicon/Marvell/MarvellSiliconPkg/Include/IndustryStandard/SmcLib.h
@@ -0,0 +1,28 @@
+/** @file
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*https://spdx.org/licenses
+*
+* Copyright (C) 2023 Marvell
+*
+* Header file for for Marvell SMC Interface
+*
+**/
+
+#ifndef __SMCLIB_H__
+#define __SMCLIB_H__
[Abdul] Coding standard prefers the macro should start with alphabet, 
like SMCLIB_H_

+
+/* SMC function IDs for Marvell Service queries */
+
+#define MV_SMC_ID_CALL_COUNT  0xc200ff00
+#define MV_SMC_ID_UID 0xc200ff01
+
+#define MV_SMC_ID_VERSION 0xc200ff03
+
+/* x1 - node number */
+#define MV_SMC_ID_DRAM_SIZE   0xc2000301
+
+
+UINTN SmcGetRamSize (IN UINTN Node);
+
+#endif
--
2.34.1









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Re: [edk2-devel] [PATCH] Maintainers.txt: remove Laszlo's entries

2024-03-08 Thread Pedro Falcato
On Fri, Mar 8, 2024 at 9:14 AM Laszlo Ersek  wrote:
>
> On 3/6/24 23:22, Michael D Kinney wrote:
> > Reviewed-by: Michael D Kinney 
>
> Merged as commit ccf91b518f22, via
> .
>
> Thank you all for everything,

Thank you for your great (and often thankless) work throughout the
whole of EDK2 and OVMF. It was great to have learned from you
throughout the years.

PS: CREDITS file anyone?

-- 
Pedro


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[edk2-devel] 回复: [Patch V3] BaseTools: VfrCompiler Adds DefaultValueError

2024-03-08 Thread gaoliming via groups.io
Zifeng:
  For Structure PCD,  https://edk2.groups.io/g/devel/message/18432 is the
summary of code change. 

  Below is two wikis about its usage. 
  https://github.com/lgao4/edk2/wiki/StrucutrePcd-Usage
  https://github.com/lgao4/edk2/wiki/StructurePcd-Enable-Steps
  
  For the patch table configuration, the structure PCD can be defined to map
the patch table structure. 
  Then, the patch table value can be specified in DSC in the different SkuId
(boardId) to support multiple SKUs.
  Structure PCD can make DSC as the centralized way for the platform
configuration. 
  The developer doesn't need to maintain the board setting in C source file.


Thanks
Liming
> -邮件原件-
> 发件人: Zhang, Zifeng 
> 发送时间: 2024年3月7日 14:54
> 收件人: Yang, Yuting2 ; devel@edk2.groups.io
> 抄送: Rebecca Cran ; Liming Gao
> ; Feng, Bob C ; Chen,
> Christine ; Chen, Arthur G 
> 主题: RE: [Patch V3] BaseTools: VfrCompiler Adds DefaultValueError
> 
> Hi Liming,
> 
> Could you help to review the patch for VFR compiler change submitted by
> Yuting?
> 
> Btw,
> Dell need some introduction of Hii StructurePCD implementation especially
> for replacing patch table configurations.
> Would you like to share EDK2 wiki link or doc for it?
> 
> Best Regards,
> Zifeng
> 
> 
> -Original Message-
> From: Yang, Yuting2 
> Sent: Friday, January 26, 2024 10:54 AM
> To: devel@edk2.groups.io
> Cc: Rebecca Cran ; Liming Gao
> ; Feng, Bob C ; Chen,
> Christine ; Zhang, Zifeng 
> Subject: [Patch V3] BaseTools: VfrCompiler Adds DefaultValueError
> 
> Add --catch_default option to raise a DefaultValueError when encountering
> VFR default definitions to help remove default variables.
> 
> Signed-off-by: Yuting Yang 
> 
> Cc: Rebecca Cran 
> Cc: Liming Gao 
> Cc: Bob Feng 
> Cc: Christine Chen 
> Cc: Zifeng Zhang 
> Signed-off-by: Yuting Yang 
> ---
>  BaseTools/Source/C/VfrCompile/VfrCompiler.cpp |   8 +-
>  BaseTools/Source/C/VfrCompile/VfrCompiler.h   |   1 +
>  BaseTools/Source/C/VfrCompile/VfrError.cpp|   3 +-
>  BaseTools/Source/C/VfrCompile/VfrError.h  |   3 +-
>  BaseTools/Source/C/VfrCompile/VfrFormPkg.h|   1 +
>  BaseTools/Source/C/VfrCompile/VfrSyntax.g | 238 ++
>  6 files changed, 150 insertions(+), 104 deletions(-)
> 
> diff --git a/BaseTools/Source/C/VfrCompile/VfrCompiler.cpp
> b/BaseTools/Source/C/VfrCompile/VfrCompiler.cpp
> index 5f4d262d85..4031af6e39 100644
> --- a/BaseTools/Source/C/VfrCompile/VfrCompiler.cpp
> +++ b/BaseTools/Source/C/VfrCompile/VfrCompiler.cpp
> @@ -78,6 +78,7 @@ CVfrCompiler::OptionInitialization (
>mOptions.WarningAsError= FALSE;
> mOptions.AutoDefault   = FALSE;
> mOptions.CheckDefault  = FALSE;+
> mOptions.IsCatchDefaultEnable  = FALSE;   memset
> (&mOptions.OverrideClassGuid, 0, sizeof (EFI_GUID));if (Argc == 1) {@@
> -95,6 +96,8 @@ CVfrCompiler::OptionInitialization (
>Version ();   SET_RUN_STATUS (STATUS_DEAD);
> return;+} else if (stricmp(Argv[Index], "--catch_default") == 0){+
> mOptions.IsCatchDefaultEnable = TRUE; } else if (stricmp(Argv[Index],
> "-l") == 0) {   mOptions.CreateRecordListFile = TRUE;
> gCIfrRecordInfoDB.TurnOn ();@@ -179,7 +182,6 @@
> CVfrCompiler::OptionInitialization (
>goto Fail; } strcpy (mOptions.VfrFileName, Argv[Index]);-
> if (mOptions.OutputDirectory == NULL) {   mOptions.OutputDirectory =
> (CHAR8 *) malloc (1);   if (mOptions.OutputDirectory == NULL) {@@
> -679,7 +681,7 @@ CVfrCompiler::Compile (
>  DebugError (NULL, 0, 0001, "Error opening the input file", "%s",
> InFileName); goto Fail;   }-+  InputInfo.IsCatchDefaultEnable =
> mOptions.IsCatchDefaultEnable;   if (mOptions.HasOverrideClassGuid)
> { InputInfo.OverrideClassGuid = &mOptions.OverrideClassGuid;   } else
> {@@ -937,5 +939,3 @@ main (
> return GetUtilityStatus (); }--diff --git
> a/BaseTools/Source/C/VfrCompile/VfrCompiler.h
> b/BaseTools/Source/C/VfrCompile/VfrCompiler.h
> index b6e207d2ce..974f37c4eb 100644
> --- a/BaseTools/Source/C/VfrCompile/VfrCompiler.h
> +++ b/BaseTools/Source/C/VfrCompile/VfrCompiler.h
> @@ -52,6 +52,7 @@ typedef struct {
>BOOLEAN WarningAsError;   BOOLEAN AutoDefault;   BOOLEAN
> CheckDefault;+  BOOLEAN IsCatchDefaultEnable; } OPTIONS;  typedef
> enum {diff --git a/BaseTools/Source/C/VfrCompile/VfrError.cpp
> b/BaseTools/Source/C/VfrCompile/VfrError.cpp
> index 65bb8e34fd..8a706f929b 100644
> --- a/BaseTools/Source/C/VfrCompile/VfrError.cpp
> +++ b/BaseTools/Source/C/VfrCompile/VfrError.cpp
> @@ -49,7 +49,8 @@ static SVFR_WARNING_HANDLE
> VFR_WARNING_HANDLE_TABLE [] = {
>{ VFR_WARNING_DEFAULT_VALUE_REDEFINED, ": default value
> re-defined with different value"},
> { VFR_WARNING_ACTION_WITH_TEXT_TWO, ": Action opcode should not
> have TextTwo part"},
> { VFR_WARNING_OBSOLETED_FRAMEWORK_OPCODE, ": Not recommend to
> use obsoleted framework opcode"},-  { VFR_WARNING_CODEUNDEFINED, ":
> undefined Warning Code" }+  { VFR_WARNING_COD

[edk2-devel] 回复: [Patch V3] BaseTools: VfrCompiler Adds DefaultValueError

2024-03-08 Thread gaoliming via groups.io
Yuting:
  This patch also removes the trailing white space. If you want to do it,
please separate them as the different commit. One is to remove the trailing
white space, another is to add default value error support. 

Thanks
Liming
> -邮件原件-
> 发件人: Yuting Yang 
> 发送时间: 2024年1月26日 10:54
> 收件人: devel@edk2.groups.io
> 抄送: Rebecca Cran ; Liming Gao
> ; Bob Feng ; Christine
> Chen ; Zifeng Zhang 
> 主题: [Patch V3] BaseTools: VfrCompiler Adds DefaultValueError
> 
> Add --catch_default option to raise a DefaultValueError when
> encountering VFR default definitions to help remove default variables.
> 
> Signed-off-by: Yuting Yang 
> 
> Cc: Rebecca Cran 
> Cc: Liming Gao 
> Cc: Bob Feng 
> Cc: Christine Chen 
> Cc: Zifeng Zhang 
> Signed-off-by: Yuting Yang 
> ---
>  BaseTools/Source/C/VfrCompile/VfrCompiler.cpp |   8 +-
>  BaseTools/Source/C/VfrCompile/VfrCompiler.h   |   1 +
>  BaseTools/Source/C/VfrCompile/VfrError.cpp|   3 +-
>  BaseTools/Source/C/VfrCompile/VfrError.h  |   3 +-
>  BaseTools/Source/C/VfrCompile/VfrFormPkg.h|   1 +
>  BaseTools/Source/C/VfrCompile/VfrSyntax.g | 238 ++
>  6 files changed, 150 insertions(+), 104 deletions(-)
> 
> diff --git a/BaseTools/Source/C/VfrCompile/VfrCompiler.cpp
> b/BaseTools/Source/C/VfrCompile/VfrCompiler.cpp
> index 5f4d262d85..4031af6e39 100644
> --- a/BaseTools/Source/C/VfrCompile/VfrCompiler.cpp
> +++ b/BaseTools/Source/C/VfrCompile/VfrCompiler.cpp
> @@ -78,6 +78,7 @@ CVfrCompiler::OptionInitialization (
>mOptions.WarningAsError= FALSE;
> 
>mOptions.AutoDefault   = FALSE;
> 
>mOptions.CheckDefault  = FALSE;
> 
> +  mOptions.IsCatchDefaultEnable  = FALSE;
> 
>memset (&mOptions.OverrideClassGuid, 0, sizeof (EFI_GUID));
> 
> 
> 
>if (Argc == 1) {
> 
> @@ -95,6 +96,8 @@ CVfrCompiler::OptionInitialization (
>Version ();
> 
>SET_RUN_STATUS (STATUS_DEAD);
> 
>return;
> 
> +} else if (stricmp(Argv[Index], "--catch_default") == 0){
> 
> +  mOptions.IsCatchDefaultEnable = TRUE;
> 
>  } else if (stricmp(Argv[Index], "-l") == 0) {
> 
>mOptions.CreateRecordListFile = TRUE;
> 
>gCIfrRecordInfoDB.TurnOn ();
> 
> @@ -179,7 +182,6 @@ CVfrCompiler::OptionInitialization (
>goto Fail;
> 
>  }
> 
>  strcpy (mOptions.VfrFileName, Argv[Index]);
> 
> -
> 
>  if (mOptions.OutputDirectory == NULL) {
> 
>mOptions.OutputDirectory = (CHAR8 *) malloc (1);
> 
>if (mOptions.OutputDirectory == NULL) {
> 
> @@ -679,7 +681,7 @@ CVfrCompiler::Compile (
>  DebugError (NULL, 0, 0001, "Error opening the input file", "%s",
> InFileName);
> 
>  goto Fail;
> 
>}
> 
> -
> 
> +  InputInfo.IsCatchDefaultEnable = mOptions.IsCatchDefaultEnable;
> 
>if (mOptions.HasOverrideClassGuid) {
> 
>  InputInfo.OverrideClassGuid = &mOptions.OverrideClassGuid;
> 
>} else {
> 
> @@ -937,5 +939,3 @@ main (
> 
> 
>return GetUtilityStatus ();
> 
>  }
> 
> -
> 
> -
> 
> diff --git a/BaseTools/Source/C/VfrCompile/VfrCompiler.h
> b/BaseTools/Source/C/VfrCompile/VfrCompiler.h
> index b6e207d2ce..974f37c4eb 100644
> --- a/BaseTools/Source/C/VfrCompile/VfrCompiler.h
> +++ b/BaseTools/Source/C/VfrCompile/VfrCompiler.h
> @@ -52,6 +52,7 @@ typedef struct {
>BOOLEAN WarningAsError;
> 
>BOOLEAN AutoDefault;
> 
>BOOLEAN CheckDefault;
> 
> +  BOOLEAN IsCatchDefaultEnable;
> 
>  } OPTIONS;
> 
> 
> 
>  typedef enum {
> 
> diff --git a/BaseTools/Source/C/VfrCompile/VfrError.cpp
> b/BaseTools/Source/C/VfrCompile/VfrError.cpp
> index 65bb8e34fd..8a706f929b 100644
> --- a/BaseTools/Source/C/VfrCompile/VfrError.cpp
> +++ b/BaseTools/Source/C/VfrCompile/VfrError.cpp
> @@ -49,7 +49,8 @@ static SVFR_WARNING_HANDLE
> VFR_WARNING_HANDLE_TABLE [] = {
>{ VFR_WARNING_DEFAULT_VALUE_REDEFINED, ": default value
> re-defined with different value"},
> 
>{ VFR_WARNING_ACTION_WITH_TEXT_TWO, ": Action opcode should not
> have TextTwo part"},
> 
>{ VFR_WARNING_OBSOLETED_FRAMEWORK_OPCODE, ": Not
> recommend to use obsoleted framework opcode"},
> 
> -  { VFR_WARNING_CODEUNDEFINED, ": undefined Warning Code" }
> 
> +  { VFR_WARNING_CODEUNDEFINED, ": undefined Warning Code" },
> 
> +  { VFR_WARNING_UNSUPPORTED, ": pls remove the default values if
> necessary" }
> 
>  };
> 
> 
> 
>  CVfrErrorHandle::CVfrErrorHandle (
> 
> diff --git a/BaseTools/Source/C/VfrCompile/VfrError.h
> b/BaseTools/Source/C/VfrCompile/VfrError.h
> index 7d16bd5f74..1b4bc173d2 100644
> --- a/BaseTools/Source/C/VfrCompile/VfrError.h
> +++ b/BaseTools/Source/C/VfrCompile/VfrError.h
> @@ -47,7 +47,8 @@ typedef enum {
>VFR_WARNING_DEFAULT_VALUE_REDEFINED = 0,
> 
>VFR_WARNING_ACTION_WITH_TEXT_TWO,
> 
>VFR_WARNING_OBSOLETED_FRAMEWORK_OPCODE,
> 
> -  VFR_WARNING_CODEUNDEFINED
> 
> +  VFR_WARNING_CODEUNDEFINED,
> 
> +  VFR_WARNING_UNSUPPORTED
> 
>  } EFI_VFR_WARNING_CODE;
> 
> 
> 
>  typedef struct _SVFR_ERROR_HANDLE {
> 
> diff --git a/Base

Re: [edk2-devel] [PATCH v2 2/2] ShellPkg/Acpiview: Adds ACPI WSMT Table parse

2024-03-08 Thread PierreGondois

Hell Abdul,

On 3/8/24 13:45, Attar, AbdulLateef (Abdul Lateef) wrote:

Hi Pierre,

      I think the provided patch also serve the same purpose of
validating the COMM_BUFFER_NESTED_PTR_PROTECTION against FIXED_COMM_BUFFERS.


Ok right,
I didn't see it was checked in ValidateWsmtProtectionFlag().



Do you want me to remove the "ValidateReserved" implementation?


It should also be ok I think,

All good for me then, sorry for the noise,
Regards,
Pierre



Here is the sample test results.

1)
    Protection Flag    : 0x5
      FIXED_COMM_BUFFERS   : 0x1
      COMM_BUFFER_NESTED_PTR_PROTECTION  : 0x0
      SYSTEM_RESOURCE_PROTECTION   : 0x1
      Reserved : 0x0


Table Statistics:
0 Error(s)
0 Warning(s)
Shell>

2)

    Protection Flag    : 0x6
      FIXED_COMM_BUFFERS   : 0x0
      COMM_BUFFER_NESTED_PTR_PROTECTION  : 0x1
      SYSTEM_RESOURCE_PROTECTION   : 0x1
      Reserved : 0x0
ERROR: COMM_BUFFER_NESTED_PTR_PROTECTION is set but FIXED_COMM_BUFFERS
is not set.


Table Statistics:
1 Error(s)
0 Warning(s)
Shell>

Thanks

AbduL





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Re: [edk2-devel] [edk2-platforms][PATCH v4 8/8] Platform/Sgi: Add CPPC support for RD-Fremont platform

2024-03-08 Thread levi.yun
> +  CPPC_PACKAGE_INIT (0x200293000, 0x200293004, 20, 160, 160, 85, 85, 
> 5)

In the FFH spec [1], section 'B.2.2 Performance Controls',
the 'Performance Ltd Register' is set to a certain memory location.

The ACPI spec. describes the following fields in the CPPC object
'Performance Limited Register':
Contains a resource descriptor with a single Register()
descriptor that describes the register to read to determine
if performance was limited. A nonzero value indicates
performance was limited. This register is sticky, and
will remain set until reset or OSPM clears it by writing 0.
See the section "Performance Limiting" for more
details.

'Minimum Performance Register' (similar for Maximum)
Optional. If supported, contains a resource descriptor
with a single Register() descriptor that describes the reg-
ister to write the minimum allowable performance level
to. The value 0 is equivalent to Lowest Performance (no
limit).

SCMI spec:
'4.5.2 FastChannels':
Only PERFORMANCE_LIMITS_SET, PERFORMANCE_LIMITS_GET,
PERFORMANCE_LEVEL_SET and PERFORMANCE_LEVEL_GET commands are supported
over FastChannels.

The value in the FFH spec seems to fall in the PERFORMANCE_LIMITS_SET
fastchannel (cf. SCP code [2]). This doesn't match the 'Performance Limited 
Register'
field, but more the 'Minimum Performance Register' (resp. Max) field.
it's also in other platforms (RDN1, RDV2, etc.. platforms follow the same 
pattern).
Does this seem correct to you ?

EVEN, Performance Limit Register (which in kernel - PERF_LIMITED) doesn't used 
right now.

I've already talked with this @Pierre and it seems to wrong.

I think it should fix CPPC_PACKAGE_INIT's macro's define


From: devel@edk2.groups.io  on behalf of Prabin CA via 
groups.io 
Sent: 01 March 2024 16:32
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm; Sami Mujawar; Thomas Abraham
Subject: [edk2-devel] [edk2-platforms][PATCH v4 8/8] Platform/Sgi: Add CPPC 
support for RD-Fremont platform

Enable ACPI CPPC mechanism for RD-Fremont as defined by the ACPI
specification. The implementation uses AMU registers accessible as
Fixed-feature Hardware (FFixedHW) for monitoring the performance.
Non-secure SCMI fastchannels are used to communicate with LCP to set
the desired performance. RD-Fremont platform does not support CPPC
revision 1 and below. So update the _OSC method to let OSPM know about
this fact.

Signed-off-by: Prabin CA 
---
 Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf |   1 +
 Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl  | 162 

 2 files changed, 163 insertions(+)

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf 
b/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf
index 7556c1239116..fcaa3299c4ea 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf
@@ -48,6 +48,7 @@ [FixedPcd]
   gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
   gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
   gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdOscCppcEnable
   gArmSgiTokenSpaceGuid.PcdOscLpiEnable
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl 
b/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl
index f921eeb2d99e..b9aca8477ca4 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl
@@ -11,6 +11,10 @@
 *   - ACPI 6.5, Chapter 8, Section 8.4.3, Lower Power Idle States
 *   - Arm Functional Fixed Hardware Specification v1.2, Chapter 3, Section 3.1,
 * Idle management and Low Power Idle states
+*   - ACPI 6.5, Chapter 8, Section 8.4.6, Collaborative Processor Performance
+* Control
+*   - Arm Functional Fixed Hardware Specification v1.2, Chapter 3, Section 3.2,
+* Performance management and Collaborative Processor Performance Control
 *
 **/

@@ -43,6 +47,20 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", 
"ARMSGI",
   Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
 }
   }
+
+  If (And (CAP0, OSC_CAP_CPPC_SUPPORT)) {
+/* CPPC revision 1 and below not supported */
+And (CAP0, Not (OSC_CAP_CPPC_SUPPORT), CAP0)
+Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+  }
+
+  If (And (CAP0, OSC_CAP_CPPC2_SUPPORT)) {
+if (LEqual (FixedPcdGet32 (PcdOscCppcEnable), Zero)) {
+  And (CAP0, Not (OSC_CAP_CPPC2_SUPPORT), CAP0)
+  Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+}
+  }
+
 } Else {
   And (STS0, Not (OSC_STS_MASK), STS0)
   Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0)
@@ -116,6 +134,15 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", 
"ARMSGI",
 Name (_UID, 0)
 Name (_STA, 0xF)

+Nam

Re: [edk2-devel] [edk2-platforms][PATCH v4 7/8] Platform/Sgi: Low Power Idle States for RD-Fremont

2024-03-08 Thread levi.yun
Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Prabin CA via 
groups.io 
Sent: 01 March 2024 16:32
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm; Sami Mujawar; Thomas Abraham
Subject: [edk2-devel] [edk2-platforms][PATCH v4 7/8] Platform/Sgi: Low Power 
Idle States for RD-Fremont

RD-Fremont platform supports two LPI states, LPI1 (Standby WFI) and LPI3
(Power-down). The cluster supports LPI2 (Power-down) state. The LPI
implementation also supports combined power state for core and cluster.

Signed-off-by: Prabin CA 
---
 Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf |   1 +
 Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl  | 154 

 2 files changed, 155 insertions(+)

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf 
b/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf
index 9d07001dec96..7556c1239116 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf
@@ -48,6 +48,7 @@ [FixedPcd]
   gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
   gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
   gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl 
b/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl
index 8812ea877f7a..f921eeb2d99e 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl
@@ -8,6 +8,9 @@
 * @par Specification Reference:
 *   - ACPI 6.5, Chapter 5, Section 5.2.11.1, Differentiated System Description
 * Table (DSDT)
+*   - ACPI 6.5, Chapter 8, Section 8.4.3, Lower Power Idle States
+*   - Arm Functional Fixed Hardware Specification v1.2, Chapter 3, Section 3.1,
+* Idle management and Low Power Idle states
 *
 **/

@@ -17,6 +20,93 @@
 DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
  EFI_ACPI_ARM_OEM_REVISION) {
   Scope (_SB) {
+/* _OSC: Operating System Capabilities */
+Method (_OSC, 4, Serialized) {
+  CreateDWordField (Arg3, 0x00, STS0)
+  CreateDWordField (Arg3, 0x04, CAP0)
+
+  /* Platform-wide Capabilities */
+  If (LEqual (Arg0, ToUUID("0811b06e-4a27-44f9-8d60-3cbbc22e7b48"))) {
+/* OSC rev 1 supported, for other version, return failure */
+If (LEqual (Arg1, One)) {
+  And (STS0, Not (OSC_STS_MASK), STS0)
+
+  If (And (CAP0, OSC_CAP_OS_INITIATED_LPI)) {
+/* OS initiated LPI not supported */
+And (CAP0, Not (OSC_CAP_OS_INITIATED_LPI), CAP0)
+Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+  }
+
+  If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) {
+if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) {
+  And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0)
+  Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+}
+  }
+} Else {
+  And (STS0, Not (OSC_STS_MASK), STS0)
+  Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0)
+}
+  } Else {
+And (STS0, Not (OSC_STS_MASK), STS0)
+Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_UUID), STS0)
+  }
+
+  Return (Arg3)
+}
+
+Name (PLPI, Package () {  /* LPI for Processor, support 2 LPI states */
+  0,  // Version
+  0,  // Level Index
+  2,  // Count
+  Package () {// WFI for CPU
+1,// Min residency (uS)
+1,// Wake latency (uS)
+1,// Flags
+0,// Arch Context lost Flags (no loss)
+0,// Residency Counter Frequency
+0,// No parent state
+ResourceTemplate () { // Register Entry method
+  Register (FFixedHW,
+32,   // Bit Width
+0,// Bit Offset
+0x,   // Address
+3,// Access Size
+  )
+},
+ResourceTemplate () { // Null Residency Counter
+  Register (SystemMemory, 0, 0, 0, 0)
+},
+ResourceTemplate () { // Null Usage Counter
+  Register (SystemMemory, 0, 0, 0, 0)
+},
+"LPI1-Core"
+  },
+  Package () {// Power Gating state for CPU
+150,  // Min residency (uS)
+350,  // Wake latency (uS)
+1,// Flags
+1,// Arch Context lost Flags (Core context lost)
+0,// Residency Counter Frequency
+0,// No par

Re: [edk2-devel] [edk2-platforms][PATCH v4 6/8] Platform/Sgi: Extend SMBIOS support for RD-Fremont

2024-03-08 Thread levi.yun
Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Prabin CA via 
groups.io 
Sent: 01 March 2024 16:32
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm; Sami Mujawar; Thomas Abraham
Subject: [edk2-devel] [edk2-platforms][PATCH v4 6/8] Platform/Sgi: Extend 
SMBIOS support for RD-Fremont

Extend the SMBIOS support for RD-Fremont platform. RD-Fremont is a
16 core platform with Poseidon CPU. Each of the CPUs include
64KB L1 Data cache, 64KB L1 Instruction cache and 2MB L2 cache.
The platform also includes system level cache of 32MB and 8GB of RAM.

Signed-off-by: Prabin CA 
---
 Platform/ARM/SgiPkg/Include/SgiPlatform.h | 5 
+
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c| 5 
-
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c | 5 
-
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c | 1 +
 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c | 6 
++
 5 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h 
b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
index 6fa39d407bc9..acfa45910aed 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -51,6 +51,10 @@
 #define RD_V2_PART_NUM0x7F2
 #define RD_V2_CONF_ID 0x1

+// RD-Fremont Platform Identification values
+#define RD_Fremont_PART_NUM   0x7EE
+#define RD_Fremont_CONF_ID0x1
+
 #define SGI_CONFIG_MASK   0x0F
 #define SGI_CONFIG_SHIFT  0x1C
 #define SGI_PART_NUM_MASK 0xFFF
@@ -90,6 +94,7 @@ typedef enum {
   RdN2Cfg1,
   RdN2Cfg2,
   RdV2,
+  RdFremont,
 } ARM_RD_PRODUCT_ID;

 // Arm ProductId look-up table
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
index edf2a5f63c63..9c28b051ebc2 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
@@ -34,7 +34,8 @@
   "RdN2\0"  \
   "RdN2Cfg1\0"  \
   "RdN2Cfg2\0"  \
-  "RdV2\0"
+  "RdV2\0"  \
+  "RdFremont\0"

 typedef enum {
   ManufacturerName = 1,
@@ -74,6 +75,8 @@ STATIC GUID mSmbiosUid[] = {
   {0xd2946d07, 0x8057, 0x4c26, {0xbf, 0x53, 0x78, 0xa6, 0x5b, 0xe1, 0xc1, 
0x60}},
   /* Rd-V2 */
   {0x3b1180a3, 0x0744, 0x4194, {0xae, 0x2e, 0xed, 0xa5, 0xbc, 0x2e, 0x43, 
0x45}},
+  /* Rd-Fremont*/
+  {0x904b28d6, 0x0662, 0x11ed, {0xb9, 0x39, 0x02, 0x42, 0xac, 0x12, 0x00, 
0x02}},
 };

 /* System information */
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
index ee269f707714..c39c1553f6aa 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
@@ -44,6 +44,7 @@
   "Neoverse-N2\0"   \
   "Neoverse-N2\0"   \
   "Neoverse-V2\0"   \
+  "Neoverse-Poseidon\0" \
   "000-0\0" /* Serial number */ \
   "783-3\0" \
   "786-1\0" \
@@ -54,7 +55,8 @@
   "7B7-1\0" \
   "7B6-1\0" \
   "7B7-1\0" \
-  "7F2-1\0"
+  "7F2-1\0" \
+  "7EE-1\0"

 typedef enum {
   PartNumber = 1,
@@ -181,6 +183,7 @@ InstallType4ProcessorInformation (
   case RdN2:
   case RdN2Cfg1:
   case RdV2:
+  case RdFremont:
 mArmRdSmbiosType4.Base.CoreCount = CoreCount;
 mArmRdSmbiosType4.Base.EnabledCoreCount = CoreCount;
 mArmRdSmbiosType4.Base.ThreadCount = CoreCount;
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
index 4af72919a3f1..4cdea5b3b763 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
@@ -335,6 +335,7 @@ InstallType7CacheInformation (
 mArmRdSmbiosType7[4].Base.Associativity = CacheAssociativity16Way;
 break;
   case RdV2:
+  case RdFremont:
 /* L1 instruction cache */
 mArmRdSmbiosType7[0].Base.MaximumCacheS

Re: [edk2-devel] [edk2-platforms][PATCH v4 5/8] Platform/Sgi: Add initial support for RD-Fremont platform

2024-03-08 Thread levi.yun
Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Prabin CA via 
groups.io 
Sent: 01 March 2024 16:32
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm; Sami Mujawar; Thomas Abraham
Subject: [edk2-devel] [edk2-platforms][PATCH v4 5/8] Platform/Sgi: Add initial 
support for RD-Fremont platform

The RD-Fremont fixed virtual platform simulates 16 CPUs and 8GB of RAM.
Add initial support for this platform by adding the required platform
build configuration files. This platform has considerable differences in
its memory map compared to its predecessors. So add a corresponding
memory map file as well to define the PCDs for its generation of
platforms.

Signed-off-by: Prabin CA 
---
 Platform/ARM/SgiPkg/SgiMemoryMap3.dsc.inc   | 71 
 Platform/ARM/SgiPkg/RdFremont/RdFremont.dsc | 55 +++
 Platform/ARM/SgiPkg/RdFremont/RdFremont.fdf.inc | 10 +++
 3 files changed, 136 insertions(+)

diff --git a/Platform/ARM/SgiPkg/SgiMemoryMap3.dsc.inc 
b/Platform/ARM/SgiPkg/SgiMemoryMap3.dsc.inc
new file mode 100644
index ..06c3b37388c1
--- /dev/null
+++ b/Platform/ARM/SgiPkg/SgiMemoryMap3.dsc.inc
@@ -0,0 +1,71 @@
+#
+#  Copyright (c) 2024, Arm Limited. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+[PcdsFixedAtBuild.common]
+  # System Peripherals
+  gArmSgiTokenSpaceGuid.PcdSmcCs0Base|0x0800
+  gArmSgiTokenSpaceGuid.PcdSmcCs1Base|0x06
+  gArmSgiTokenSpaceGuid.PcdSysPeriphBase|0x0C00
+  gArmSgiTokenSpaceGuid.PcdSysPeriphSysRegBase|0x0C01
+
+  # SP804 dual timer
+  gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress|0x0C11
+  gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize|0x0001
+  gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt|216
+
+  # Virtio Disk
+  gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress|0x0C13
+  gArmSgiTokenSpaceGuid.PcdVirtioBlkSize|0x1
+  gArmSgiTokenSpaceGuid.PcdVirtioBlkInterrupt|184
+
+  # GPIO controller
+  gArmSgiTokenSpaceGuid.PcdGpioController0BaseAddress|0x0C1D
+  gArmSgiTokenSpaceGuid.PcdGpioController0Size|0x0001
+  gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt|168
+
+   # Ethernet
+  gArmSgiTokenSpaceGuid.PcdVirtioNetBaseAddress|0x0C15
+  gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt|186
+
+  # PL031 RealTimeClock
+  gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0C17
+
+  # Virtio P9
+  gArmSgiTokenSpaceGuid.PcdVirtioP9BaseAddress|0x0C19
+  gArmSgiTokenSpaceGuid.PcdVirtioP9Size|0x1
+  gArmSgiTokenSpaceGuid.PcdVirtioP9Interrupt|185
+
+  # PL370 - HDLCD1
+  gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase|0x0EF6
+
+  # PL011 - Serial Debug UART
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x0EF7
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgInterrupt|179
+
+  # PL011 - Serial Terminal
+  gArmPlatformTokenSpaceGuid.PL011UartInterrupt|112
+
+  # System Memory (2GB - 128MB of Trusted DRAM at the top of the 32bit address 
space)
+  gArmTokenSpaceGuid.PcdSystemMemoryBase|0x8000
+  gArmTokenSpaceGuid.PcdSystemMemorySize|0x7800
+
+  # SMMU
+  gArmSgiTokenSpaceGuid.PcdSmmuBase|0x28000
+  gArmSgiTokenSpaceGuid.PcdSmmuSize|0x400
+
+  # Non-Volatile variable storage
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0x06
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64|0x060140
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64|0x060280
+
+  # Address bus width - 64TB address space
+  gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip|46
+
+  # Timer & Watchdog interrupts
+  gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv|109
+  gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv|108
+  gArmSgiTokenSpaceGuid.PcdWdogWS0Gsiv|110
+  gArmSgiTokenSpaceGuid.PcdWdogWS1Gsiv|111
diff --git a/Platform/ARM/SgiPkg/RdFremont/RdFremont.dsc 
b/Platform/ARM/SgiPkg/RdFremont/RdFremont.dsc
new file mode 100644
index ..b52d2f59e15d
--- /dev/null
+++ b/Platform/ARM/SgiPkg/RdFremont/RdFremont.dsc
@@ -0,0 +1,55 @@
+#
+#  Copyright (c) 2024, Arm Limited. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+
+[Defines]
+  PLATFORM_NAME  = RdFremont
+  PLATFORM_GUID  = fd140b0f-4467-4314-aa69-cd0bd712e08e
+  PLATFORM_VERSION   = 0.1
+  DSC_SPECIFICATION  = 0x0001001B
+  OUTPUT_DIRECTORY   = Build/$(PLATFORM_NAME)
+  SUPPORTED_ARCHITECTURES= AARCH64
+  BUILD_TARGETS  = NOOPT|DEBUG|RELEASE
+  SKUID_IDENTIFIER   = DEFAULT
+  FLASH_DEFINITION   = Platform/ARM/SgiPkg/SgiPlatform.fdf
+  BOARD_DXE_FV_COMPONENTS= 
Platform/ARM/SgiPkg/RdFremont/RdFremont.fdf.inc
+  BUILD_NUMBER

Re: [edk2-devel] [edk2-platforms][PATCH v4 3/8] Platform/Sgi: Introduce a flag to enable PCIe support for RD Platforms

2024-03-08 Thread levi.yun
Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Prabin CA via 
groups.io 
Sent: 01 March 2024 16:32
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm; Sami Mujawar; Thomas Abraham
Subject: [edk2-devel] [edk2-platforms][PATCH v4 3/8] Platform/Sgi: Introduce a 
flag to enable PCIe support for RD Platforms

Introducing a flag called PCIE_ENABLE, which can be set to TRUE or
FALSE from the respective .dsc files to enable or disable the
PCIe support. As not all reference design platforms have PCIe support
enabled, this flag is introduced.

Signed-off-by: Prabin CA 
---
 Platform/ARM/SgiPkg/SgiPlatform.dec  |  1 +
 Platform/ARM/SgiPkg/SgiPlatform.dsc.inc  |  6 ++
 Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc|  4 +++-
 Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc|  4 +++-
 Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc|  4 +++-
 Platform/ARM/SgiPkg/RdV1/RdV1.dsc|  4 +++-
 Platform/ARM/SgiPkg/RdV1Mc/RdV1Mc.dsc|  4 +++-
 Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc|  4 +++-
 Platform/ARM/SgiPkg/SgiPlatform.fdf  |  4 +++-
 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf  |  5 -
 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c | 19 
+++
 11 files changed, 43 insertions(+), 16 deletions(-)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec 
b/Platform/ARM/SgiPkg/SgiPlatform.dec
index 4087ff6cad2e..af7887e54126 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -31,6 +31,7 @@ [Guids.common]
 [PcdsFeatureFlag.common]
   gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported|FALSE|BOOLEAN|0x0001
   gArmSgiTokenSpaceGuid.PcdVirtioNetSupported|FALSE|BOOLEAN|0x0010
+  gArmSgiTokenSpaceGuid.PcdPcieEnable|FALSE|BOOLEAN|0x002E

 [PcdsFixedAtBuild]
   gArmSgiTokenSpaceGuid.PcdDramBlock2Base|0|UINT64|0x0002
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
index 1cfe07c7e4ed..1bf489ffeb39 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -103,6 +103,10 @@ [PcdsFeatureFlag.common]
   gArmSgiTokenSpaceGuid.PcdVirtioNetSupported|TRUE
   gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache|FALSE

+!if $(PCIE_ENABLE) == TRUE
+  gArmSgiTokenSpaceGuid.PcdPcieEnable|TRUE
+!endif
+
 [PcdsFixedAtBuild.common]
   gArmTokenSpaceGuid.PcdVFPEnabled|1
   gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000
@@ -330,6 +334,7 @@ [Components.common]
   # Virtio Network
   OvmfPkg/VirtioNetDxe/VirtioNet.inf

+!if $(PCIE_ENABLE) == TRUE
   #
   # Required by PCI
   #
@@ -343,6 +348,7 @@ [Components.common]
 
   gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8010004F
   }
+!endif

   #
   # AHCI Support
diff --git a/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc 
b/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc
index 32d67d380814..c7463da5203e 100644
--- a/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc
+++ b/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc
@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2020-2022, ARM Limited. All rights reserved.
+#  Copyright (c) 2020-2024, Arm Limited. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -22,6 +22,8 @@ [Defines]
   BOARD_DXE_FV_COMPONENTS= 
Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.fdf.inc
   BUILD_NUMBER   = 1

+  DEFINE PCIE_ENABLE = TRUE
+
 # include common definitions from SgiPlatform.dsc
 !include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
 !include Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc
diff --git a/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc 
b/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc
index 6c9a64df054f..77efec9d9533 100644
--- a/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc
+++ b/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc
@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2020-2022, ARM Limited. All rights reserved.
+#  Copyright (c) 2020-2024, Arm Limited. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -22,6 +22,8 @@ [Defines]
   BOARD_DXE_FV_COMPONENTS= 
Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.fdf.inc
   BUILD_NUMBER   = 1

+  DEFINE PCIE_ENABLE = TRUE
+
 # include common definitions from SgiPlatform.dsc
 !include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
 !include Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc
diff --git a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc 
b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
index 10e5bfa29b46..521d88925059 100644
--- a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
+++ b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2020-2022, ARM Limited. All rights reserved.
+#  Copyright (c) 2020-2024, Arm Limited. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -22,6 +22,8 @@ [Defines]
   BOARD_DXE_FV_COMPONENTS 

Re: [edk2-devel] [edk2-platforms][PATCH v4 2/8] Platform/Sgi: Refactor system memory base and size definitions

2024-03-08 Thread levi.yun
Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Prabin CA via 
groups.io 
Sent: 01 March 2024 16:32
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm; Sami Mujawar; Thomas Abraham
Subject: [edk2-devel] [edk2-platforms][PATCH v4 2/8] Platform/Sgi: Refactor 
system memory base and size definitions

In preparation of adding the next generation of reference design
platform that have different memory map, refactor the
PcdSystemMemoryBase and PcdSystemMemorySize PCD definitions from the
common PCD definitions file into the various platform generation
specific memory map PCD definitions file.

Signed-off-by: Prabin CA 
---
 Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc  | 8 +++-
 Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc | 8 +++-
 Platform/ARM/SgiPkg/SgiPlatform.dsc.inc   | 6 +-
 3 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc 
b/Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc
index 0c577c42..eab43b23ec6d 100644
--- a/Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc
@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2020 - 2022, Arm Limited. All rights reserved.
+#  Copyright (c) 2020 - 2024, Arm Limited. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -67,3 +67,9 @@ [PcdsFixedAtBuild.common]
   gArmSgiTokenSpaceGuid.PcdGpioController0BaseAddress|0x1C1D
   gArmSgiTokenSpaceGuid.PcdGpioController0Size|0x0001
   gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt|136
+
+  # System Memory (1GB - 16MB of Trusted DRAM at the top of the
+  # 32bit address space)
+  gArmTokenSpaceGuid.PcdSystemMemoryBase|0x8000
+  gArmTokenSpaceGuid.PcdSystemMemorySize|0x7F00
+
diff --git a/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc 
b/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc
index de1d8ea24b89..35e27d42d5a2 100644
--- a/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc
@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2020 - 2023, Arm Limited. All rights reserved.
+#  Copyright (c) 2020 - 2024, Arm Limited. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -75,3 +75,9 @@ [PcdsFixedAtBuild.common]

   # IO virtualization block
   gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlk0Base|0x108000
+
+  # System Memory (1GB - 16MB of Trusted DRAM at the top of the
+  # 32bit address space)
+  gArmTokenSpaceGuid.PcdSystemMemoryBase|0x8000
+  gArmTokenSpaceGuid.PcdSystemMemorySize|0x7F00
+
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
index 26ecd9ed59a7..1cfe07c7e4ed 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2018 - 2022, ARM Limited. All rights reserved.
+#  Copyright (c) 2018 - 2024, Arm Limited. All rights reserved.
 #  (C) Copyright 2021 Hewlett Packard Enterprise Development LP
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -131,10 +131,6 @@ [PcdsFixedAtBuild.common]
   gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4
   gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x0

-  # System Memory (1GB - 16MB of Trusted DRAM at the top of the 32bit address 
space)
-  gArmTokenSpaceGuid.PcdSystemMemoryBase|0x8000
-  gArmTokenSpaceGuid.PcdSystemMemorySize|0x7F00
-
   # ACPI Table Version
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20

--
2.34.1



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Re: [edk2-devel] [edk2-platforms][PATCH v4 1/8] Platform/Sgi: Update the datatype of PcdSmmuBase from u32 to u64

2024-03-08 Thread levi.yun
Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Prabin CA via 
groups.io 
Sent: 01 March 2024 16:32
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm; Sami Mujawar; Thomas Abraham
Subject: [edk2-devel] [edk2-platforms][PATCH v4 1/8] Platform/Sgi: Update the 
datatype of PcdSmmuBase from u32 to u64

From: Vivek Gautam 

On RD-N2 and previous generation platforms, the base address was within
32-bit region. However, on upcoming platforms, the SMMUv3 base address
is beyond 32-bit address region. So, update the datatype of SMMUv3 base
PCD.

Signed-off-by: Prabin CA 
---
 Platform/ARM/SgiPkg/SgiPlatform.dec  | 2 +-
 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec 
b/Platform/ARM/SgiPkg/SgiPlatform.dec
index 103dff8471a7..4087ff6cad2e 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -79,7 +79,7 @@ [PcdsFixedAtBuild]
   gArmSgiTokenSpaceGuid.PcdWdogWS1Gsiv|0|UINT32|0x0014

   # SMMU
-  gArmSgiTokenSpaceGuid.PcdSmmuBase|0|UINT32|0x001D
+  gArmSgiTokenSpaceGuid.PcdSmmuBase|0|UINT64|0x001D
   gArmSgiTokenSpaceGuid.PcdSmmuSize|0|UINT32|0x001E

   # GPIO Controller
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c 
b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
index fa3cfbc730f6..62c212f3c5b0 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2018-2023, ARM Limited. All rights reserved.
+*  Copyright (c) 2018-2024, Arm Limited. All rights reserved.
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -167,8 +167,8 @@ ArmPlatformGetVirtualMemoryMap (
   VirtualMemoryTable[Index].Attributes  = 
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;

   // Sub System Peripherals - SMMU
-  VirtualMemoryTable[++Index].PhysicalBase  = FixedPcdGet32 (PcdSmmuBase);
-  VirtualMemoryTable[Index].VirtualBase = FixedPcdGet32 (PcdSmmuBase);
+  VirtualMemoryTable[++Index].PhysicalBase  = FixedPcdGet64 (PcdSmmuBase);
+  VirtualMemoryTable[Index].VirtualBase = FixedPcdGet64 (PcdSmmuBase);
   VirtualMemoryTable[Index].Length  = FixedPcdGet32 (PcdSmmuSize);
   VirtualMemoryTable[Index].Attributes  = 
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;

--
2.34.1



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Re: [edk2-devel] [edk2-platforms][PATCH v4 4/8] Platform/Sgi: Add ACPI tables for RD-Fremont platform

2024-03-08 Thread levi.yun
Hi. Prabin!

> +[Sources]
> +  Dbg2.aslc
> +  Fadt.aslc
> +  Gtdt.aslc
> +  RdFremont/Dsdt.asl
> +  RdFremont/Madt.aslc
> +  RdFremont/Pptt.aslc
> +  Spcr.aslc
> +  SsdtEvents.asl
> +  SsdtRos.asl
> +  SsdtRosVirtioP9.asl
> +

With the RdN2Cfg3 and RdV2 too, When would you support PCIE & IORT in this 
platform?

Thanks.
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Re: [edk2-devel] [edk2-platforms][PATCH v5 6/6] Platform/Sgi: Extend SMBIOS support for RD-V2 platform

2024-03-08 Thread levi.yun
Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Prabin CA via 
groups.io 
Sent: 01 March 2024 16:29
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm; Sami Mujawar; Thomas Abraham
Subject: [edk2-devel] [edk2-platforms][PATCH v5 6/6] Platform/Sgi: Extend 
SMBIOS support for RD-V2 platform

From: Pranav Madhu 

The Neoverse RD-V2 FVP platform includes 16 CPUs and each CPU has 64KB
of L1 instruction/data cache, 2MB of L2 cache and 32MB of system level
cache. Extend the SMBIOS support for RD-V2 platform with this
configuration and reuse rest of the RD-N2 SMBIOS configuration for the
RD-V2 platform.

Signed-off-by: Prabin CA 
---
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c|  7 
+--
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c |  9 
++---
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c | 20 
+++-
 3 files changed, 30 insertions(+), 6 deletions(-)

diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
index b7e2238fb39c..edf2a5f63c63 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
@@ -5,7 +5,7 @@
   Reference Design platforms. Type 1 table defines attributes of the
   overall system such as manufacturer, product name, UUID etc.

-  Copyright (c) 2021 - 2022, Arm Limited. All rights reserved.
+  Copyright (c) 2021 - 2024, Arm Limited. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent

   @par Specification Reference:
@@ -33,7 +33,8 @@
   "RdV1Mc\0"\
   "RdN2\0"  \
   "RdN2Cfg1\0"  \
-  "RdN2Cfg2\0"
+  "RdN2Cfg2\0"  \
+  "RdV2\0"

 typedef enum {
   ManufacturerName = 1,
@@ -71,6 +72,8 @@ STATIC GUID mSmbiosUid[] = {
   {0xa4941d3d, 0xfac3, 0x4ace, {0x9a, 0x7e, 0xce, 0x26, 0x76, 0x64, 0x5e, 
0xda}},
   /* Rd-N2-Cfg2*/
   {0xd2946d07, 0x8057, 0x4c26, {0xbf, 0x53, 0x78, 0xa6, 0x5b, 0xe1, 0xc1, 
0x60}},
+  /* Rd-V2 */
+  {0x3b1180a3, 0x0744, 0x4194, {0xae, 0x2e, 0xed, 0xa5, 0xbc, 0x2e, 0x43, 
0x45}},
 };

 /* System information */
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
index b59172cf1cb9..ee269f707714 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
@@ -6,7 +6,7 @@
   family, processor id, maximum operating frequency, and other information
   related to the processor.

-  Copyright (c) 2021 - 2022, Arm Limited. All rights reserved.
+  Copyright (c) 2021 - 2024, Arm Limited. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent

   @par Specification Reference:
@@ -27,7 +27,7 @@
 #define SOCKET_TYPE_BASE3
 #define SOCKET_TYPE_NUM 1
 #define PROCESSOR_VERSION_BASE  (SOCKET_TYPE_BASE + SOCKET_TYPE_NUM)
-#define PROCESSOR_VERSION_NUM   10
+#define PROCESSOR_VERSION_NUM   11
 #define SERIAL_NUMBER_BASE  (PROCESSOR_VERSION_BASE + 
PROCESSOR_VERSION_NUM)
 #define TYPE4_STRINGS   \
   "0x000\0" /* Part Number */   \
@@ -43,6 +43,7 @@
   "Neoverse-N2\0"   \
   "Neoverse-N2\0"   \
   "Neoverse-N2\0"   \
+  "Neoverse-V2\0"   \
   "000-0\0" /* Serial number */ \
   "783-3\0" \
   "786-1\0" \
@@ -52,7 +53,8 @@
   "78A-2\0" \
   "7B7-1\0" \
   "7B6-1\0" \
-  "7B7-1\0"
+  "7B7-1\0" \
+  "7F2-1\0"

 typedef enum {
   PartNumber = 1,
@@ -178,6 +180,7 @@ InstallType4ProcessorInformation (
 break;
   case RdN2:
   case RdN2Cfg1:
+  case RdV2:
 mArmRdSmbiosType4.Base.CoreCount = CoreCount;
 mArmRdSmbiosType4.Base.EnabledCoreCount = CoreCount;
 mArmRdSmbiosType4.Base.ThreadCount = CoreCount;
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
index b71ce721e2e8..4af72919a3f1 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
@@ -6,7 +6,7 @@
   implemented, cache configuration,

Re: [edk2-devel] [edk2-platforms][PATCH v5 5/6] Platform/Sgi: Define RD-V2 platform id values

2024-03-08 Thread levi.yun
Reviewed-by: levi.yun 


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Re: [edk2-devel] [edk2-platforms][PATCH v5 4/6] Platform/Sgi: Add support for RD-N2-Cfg3 platform

2024-03-08 Thread levi.yun
Reviewed-by: levi.yun 


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Re: [edk2-devel] [edk2-platforms][PATCH v5 3/6] Platform/Sgi: Add a PCD to specify platform variant

2024-03-08 Thread levi.yun
Reviewed-by: levi.yun 


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Re: [edk2-devel] [edk2-platforms][PATCH v5 2/6] Platform/Sgi: Add VariableFlashInfoLib to fix missing dependency

2024-03-08 Thread levi.yun
Reviewed-by: levi.yun 


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Re: [edk2-devel] [edk2-platforms][PATCH v5 1/6] Platform/Sgi: remove +nofp gcc option flag

2024-03-08 Thread levi.yun
Reviewed-by: levi.yun 


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Re: [edk2-devel] [PATCH v2 2/2] ShellPkg/Acpiview: Adds ACPI WSMT Table parse

2024-03-08 Thread Abdul Lateef Attar via groups.io

Hi Pierre,

    I think the provided patch also serve the same purpose of 
validating the COMM_BUFFER_NESTED_PTR_PROTECTION against FIXED_COMM_BUFFERS.


Do you want me to remove the "ValidateReserved" implementation?

Here is the sample test results.

1)
  Protection Flag    : 0x5
    FIXED_COMM_BUFFERS   : 0x1
    COMM_BUFFER_NESTED_PTR_PROTECTION  : 0x0
    SYSTEM_RESOURCE_PROTECTION   : 0x1
    Reserved : 0x0


Table Statistics:
0 Error(s)
0 Warning(s)
Shell>

2)

  Protection Flag    : 0x6
    FIXED_COMM_BUFFERS   : 0x0
    COMM_BUFFER_NESTED_PTR_PROTECTION  : 0x1
    SYSTEM_RESOURCE_PROTECTION   : 0x1
    Reserved : 0x0
ERROR: COMM_BUFFER_NESTED_PTR_PROTECTION is set but FIXED_COMM_BUFFERS 
is not set.



Table Statistics:
1 Error(s)
0 Warning(s)
Shell>

Thanks

AbduL

On 08-03-2024 14:50, PierreGondois via groups.io wrote:
Caution: This message originated from an External Source. Use proper 
caution when opening attachments, clicking links, or responding.



Hello Abdul,

On 3/8/24 08:22, Abdul Lateef Attar wrote:

From: Abdul Lateef Attar 

Adds WSMT parse to the UefiShellAcpiViewCommandLib library.

Cc: Zhichao Gao 
Cc: Pierre Gondois  
Signed-off-by: Abdul Lateef Attar 
Reviewed-by: Pierre Gondois  
---
  .../UefiShellAcpiViewCommandLib/AcpiParser.h  |  17 ++
  .../Parsers/Wsmt/WsmtParser.c | 147 ++
  .../UefiShellAcpiViewCommandLib.c |   1 +
  .../UefiShellAcpiViewCommandLib.inf   |   1 +
  4 files changed, 166 insertions(+)
  create mode 100644 
ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Wsmt/WsmtParser.c


diff --git 
a/ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiParser.h 
b/ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiParser.h

index ba3364f2c2..6468fe5d8c 100644
--- a/ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiParser.h
+++ b/ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiParser.h
@@ -985,6 +985,23 @@ ParseAcpiSsdt (
    IN UINT8    AcpiTableRevision
    );

+/**
+  This function parses the ACPI WSMT table.
+
+  @param [in] Trace  If TRUE, trace the ACPI fields.
+  @param [in] Ptr    Pointer to the start of the buffer.
+  @param [in] AcpiTableLength    Length of the ACPI table.
+  @param [in] AcpiTableRevision  Revision of the ACPI table.
+**/
+VOID
+EFIAPI
+ParseAcpiWsmt (
+  IN BOOLEAN  Trace,
+  IN UINT8    *Ptr,
+  IN UINT32   AcpiTableLength,
+  IN UINT8    AcpiTableRevision
+  );
+
  /**
    This function parses the ACPI XSDT table
    and optionally traces the ACPI table fields.
diff --git 
a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Wsmt/WsmtParser.c 
b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Wsmt/WsmtParser.c

new file mode 100644
index 00..3c7252b0bf
--- /dev/null
+++ 
b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Wsmt/WsmtParser.c

@@ -0,0 +1,147 @@
+/** @file
+  WSMT table parser
+
+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Reference(s):
+    - Windows SMM Security Mitigation Table spec, version 1.0
+**/
+
+#include 
+#include 
+#include "AcpiParser.h"
+
+STATIC ACPI_DESCRIPTION_HEADER_INFO  AcpiHdrInfo;
+
+/**
+  This function validates the WSMT Protection flag.
+
+  @param [in] Ptr  Pointer to the start of the buffer.
+  @param [in] Context Pointer to context specific information e.g. this
+  could be a pointer to the ACPI table header.
+
+**/
+STATIC
+VOID
+EFIAPI
+ValidateWsmtProtectionFlag (
+  IN UINT8  *Ptr,
+  IN VOID   *Context
+  )
+{
+  UINT32  ProtectionFlag;
+
+  ProtectionFlag = *(UINT32 *)Ptr;
+
+  if ((ProtectionFlag & 
EFI_WSMT_PROTECTION_FLAGS_COMM_BUFFER_NESTED_PTR_PROTECTION) \

+  == EFI_WSMT_PROTECTION_FLAGS_COMM_BUFFER_NESTED_PTR_PROTECTION)
+  {
+    if ((ProtectionFlag & 
EFI_WSMT_PROTECTION_FLAGS_FIXED_COMM_BUFFERS) \

+    != EFI_WSMT_PROTECTION_FLAGS_FIXED_COMM_BUFFERS)
+    {
+  IncrementErrorCount ();
+  Print (L"ERROR: COMM_BUFFER_NESTED_PTR_PROTECTION is set but 
FIXED_COMM_BUFFERS is not set.\n");

+    }
+  }
+}
+
+/**
+  This function validates the reserved bits in the WSMT Protection 
flag.

+
+  @param [in] Ptr  Pointer to the start of the buffer.
+  @param [in] Context Pointer to context specific information e.g. this
+  could be a pointer to the ACPI table header.
+**/
+STATIC
+VOID
+EFIAPI
+ValidateReserved (
+  IN UINT8  *Ptr,
+  IN VOID   *Context
+  )
+{
+  UINT32  ProtectionFlag;
+
+  ProtectionFlag = *(UINT32 *)Ptr;
+
+  if ((ProtectionFlag & 0xFFF8) != 0) {
+    IncrementErrorCount ();
+    Print (L"ERROR: Reserved bits are not zero.\n");
+  }
+}
+
+/**
+  An ACPI_PARSER array describing the WSMT Protection flag .
+**/
+STATIC CONST ACPI_PARSER  WsmtProtectionFlagParser[] = {
+  { L"FIXED_COMM_BUFFERS ",    1,  0, L"0x%x", NULL

Re: [edk2-devel] [PATCH] NanhuDev:Add BOSC NanhuDev platform

2024-03-08 Thread Sunil V L
On Fri, Mar 08, 2024 at 12:31:26AM -0800, WangYang wrote:
> Hi,Sunil V L
> 
> How about this status.
> 
> 
> > -原始邮件-
> > 发件人: WangYang 
> > 发送时间: 2024-02-28 14:34:11 (星期三)
> > 收件人: devel@edk2.groups.io, suni...@ventanamicro.com
> > 抄送: "Yang Wang" , "Ran Wang" , 
> > "YunFeng Yang" , "YaXing Guo" 
> > , "Bamvor Jian ZHANG" 
> > 主题: [edk2-devel] [PATCH] NanhuDev:Add BOSC NanhuDev platform
> > 
> > This commit adds the initial support for BOSC's
> > nanhu platform which provides up to 2 RISC-V RV64
> > processor cores.
> > 
Somehow I missed this when you sent first. What do you mean by "initial
support" here?

Looks like you are following old integrated opensbi approach.
If so, I recommend you to look at payload design. You can see Sophgo
board as reference.

Also, please remember to CC all maintainers as per Maintainers.txt.

Thanks
Sunil
> 
> > 
> > Signed-off-by: Yang Wang 
> > Signed-off-by: Ran Wang 
> > Signed-off-by: YunFeng Yang 
> > Signed-off-by: YaXing Guo 
> > Cc: Bamvor Jian ZHANG 
> > Cc: Sunil V L 
> > ---
> >  .../NanhuDev/DeviceTree.fdf.inc   |  36 ++
> >  .../NanhuDev/DeviceTree/NanhuDev.dts  | 120 
> >  .../NanhuDev/DeviceTree/NanhuDeviceTree.inf   |  22 +
> >  .../XiangshanSeriesPkg/NanhuDev/NanhuDev.dec  |  24 +
> >  .../XiangshanSeriesPkg/NanhuDev/NanhuDev.dsc  | 547 ++
> >  .../XiangshanSeriesPkg/NanhuDev/NanhuDev.fdf  | 326 +++
> >  .../NanhuDev/NanhuDev.fdf.inc | 108 
> >  .../XiangshanSeriesPkg/NanhuDev/NanhuDev.uni  |  13 +
> >  .../NanhuDev/NanhuDevPkgExtra.uni |  12 +
> >  .../NanhuDev/Universal/Sec/SecMain.inf|  82 +++
> >  .../NanhuDev/VarStore.fdf.inc |  70 +++
> >  Platform/Bosc/XiangshanSeriesPkg/Readme.md|  59 ++
> >  .../XiangshanSeriesPkg/XiangshanSeriesPkg.dec |  29 +
> >  .../XiangshanSeriesPkg/XiangshanSeriesPkg.uni |  12 +
> >  .../XiangshanSeriesPkgExtra.uni   |  12 +
> >  Silicon/Bosc/NanHuPkg/NanHuPkg.dec|  33 ++
> >  16 files changed, 1505 insertions(+)
> >  create mode 100644 
> > Platform/Bosc/XiangshanSeriesPkg/NanhuDev/DeviceTree.fdf.inc
> >  create mode 100644 
> > Platform/Bosc/XiangshanSeriesPkg/NanhuDev/DeviceTree/NanhuDev.dts
> >  create mode 100644 
> > Platform/Bosc/XiangshanSeriesPkg/NanhuDev/DeviceTree/NanhuDeviceTree.inf
> >  create mode 100644 Platform/Bosc/XiangshanSeriesPkg/NanhuDev/NanhuDev.dec
> >  create mode 100644 Platform/Bosc/XiangshanSeriesPkg/NanhuDev/NanhuDev.dsc
> >  create mode 100644 Platform/Bosc/XiangshanSeriesPkg/NanhuDev/NanhuDev.fdf
> >  create mode 100644 
> > Platform/Bosc/XiangshanSeriesPkg/NanhuDev/NanhuDev.fdf.inc
> >  create mode 100644 Platform/Bosc/XiangshanSeriesPkg/NanhuDev/NanhuDev.uni
> >  create mode 100644 
> > Platform/Bosc/XiangshanSeriesPkg/NanhuDev/NanhuDevPkgExtra.uni
> >  create mode 100644 
> > Platform/Bosc/XiangshanSeriesPkg/NanhuDev/Universal/Sec/SecMain.inf
> >  create mode 100644 
> > Platform/Bosc/XiangshanSeriesPkg/NanhuDev/VarStore.fdf.inc
> >  create mode 100644 Platform/Bosc/XiangshanSeriesPkg/Readme.md
> >  create mode 100644 Platform/Bosc/XiangshanSeriesPkg/XiangshanSeriesPkg.dec
> >  create mode 100644 Platform/Bosc/XiangshanSeriesPkg/XiangshanSeriesPkg.uni
> >  create mode 100644 
> > Platform/Bosc/XiangshanSeriesPkg/XiangshanSeriesPkgExtra.uni
> >  create mode 100644 Silicon/Bosc/NanHuPkg/NanHuPkg.dec
> > 
> > diff --git a/Platform/Bosc/XiangshanSeriesPkg/NanhuDev/DeviceTree.fdf.inc 
> > b/Platform/Bosc/XiangshanSeriesPkg/NanhuDev/DeviceTree.fdf.inc
> > new file mode 100644
> > index 00..f489e5631f
> > --- /dev/null
> > +++ b/Platform/Bosc/XiangshanSeriesPkg/NanhuDev/DeviceTree.fdf.inc
> > @@ -0,0 +1,36 @@
> > +## @file
> > +#  FDF include file with Layout Regions that define an empty variable 
> > store.
> > +#
> > +#  Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All 
> > rights reserved.
> > +#  Copyright (C) 2014, Red Hat, Inc.
> > +#  Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.
> > +#  Copyright (c) 2024, BOSC. All rights reserved.
> > +#
> > +#  SPDX-License-Identifier: BSD-2-Clause-Patent
> > +#
> > +##
> > +
> > +$(DTB_OFFSET)|$(DTB_SIZE)
> > +gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDtbFvBase|gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDtbFvSize
> > +FV = DTBFV
> > +
> > +[FV.DTBFV]
> > +BlockSize  = 0x1000
> > +FvAlignment= 16
> > +ERASE_POLARITY = 1
> > +MEMORY_MAPPED  = TRUE
> > +STICKY_WRITE   = TRUE
> > +LOCK_CAP   = TRUE
> > +LOCK_STATUS= TRUE
> > +WRITE_DISABLED_CAP = TRUE
> > +WRITE_ENABLED_CAP  = TRUE
> > +WRITE_STATUS   = TRUE
> > +WRITE_LOCK_CAP = TRUE
> > +WRITE_LOCK_STATUS  = TRUE
> > +READ_DISABLED_CAP  = TRUE
> > +READ_ENABLED_CAP   = TRUE
> > +READ_STATUS= TRUE
> > +READ_LOCK_CAP  = TRUE
> > +READ_LOCK_STATUS   = TRUE
> > +
> > +INF RuleOverride = DTB 
> > Platform/Bosc/XiangshanSeriesPkg/NanhuDev/DeviceTree/NanhuD

Re: [edk2-devel] [PATCH] Maintainers.txt: remove Laszlo's entries

2024-03-08 Thread Yao, Jiewen
Indeed. Appreciate your great contribution to make EDKII better.

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Ard
> Biesheuvel
> Sent: Friday, March 8, 2024 5:38 PM
> To: devel@edk2.groups.io; ler...@redhat.com
> Cc: Kinney, Michael D ; Andrew Fish
> ; Gerd Hoffmann ; Yao, Jiewen
> ; Leif Lindholm ; Kumar,
> Rahul R ; Ni, Ray ; Sami Mujawar
> 
> Subject: Re: [edk2-devel] [PATCH] Maintainers.txt: remove Laszlo's entries
> 
> On Fri, 8 Mar 2024 at 10:14, Laszlo Ersek  wrote:
> >
> > On 3/6/24 23:22, Michael D Kinney wrote:
> > > Reviewed-by: Michael D Kinney 
> >
> > Merged as commit ccf91b518f22, via
> > .
> >
> > Thank you all for everything,
> 
> Goodbye Laszlo. It was great to have you back, even if only for a short while.
> 
> 
> 
> 



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[edk2-devel] Where is the "build.exe"?

2024-03-08 Thread Gavin Lin
Hi,
By browsing the document "edk2-BuildSpecification-release-1.28.pdf", the 
"build.exe" can be found on page 62 as below. But I just can find build.bat in 
edk2\BaseTools\BinWrappers\WindowsLike\. Thanks for the comment if any.

[cid:image001.png@01DA70A4.62E9FC20]

Best regards
Gavin Lin

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Re: [edk2-devel] [Patch V3] BaseTools: VfrCompiler Adds DefaultValueError

2024-03-08 Thread Zhang, Zifeng
Hi Liming,

Could you help to review the patch for VFR compiler change submitted by Yuting?

Btw, 
Dell need some introduction of Hii StructurePCD implementation especially for 
replacing patch table configurations.
Would you like to share EDK2 wiki link or doc for it?

Best Regards,
Zifeng


-Original Message-
From: Yang, Yuting2  
Sent: Friday, January 26, 2024 10:54 AM
To: devel@edk2.groups.io
Cc: Rebecca Cran ; Liming Gao ; 
Feng, Bob C ; Chen, Christine ; 
Zhang, Zifeng 
Subject: [Patch V3] BaseTools: VfrCompiler Adds DefaultValueError

Add --catch_default option to raise a DefaultValueError when encountering VFR 
default definitions to help remove default variables.

Signed-off-by: Yuting Yang 

Cc: Rebecca Cran 
Cc: Liming Gao 
Cc: Bob Feng 
Cc: Christine Chen 
Cc: Zifeng Zhang 
Signed-off-by: Yuting Yang 
---
 BaseTools/Source/C/VfrCompile/VfrCompiler.cpp |   8 +-
 BaseTools/Source/C/VfrCompile/VfrCompiler.h   |   1 +
 BaseTools/Source/C/VfrCompile/VfrError.cpp|   3 +-
 BaseTools/Source/C/VfrCompile/VfrError.h  |   3 +-
 BaseTools/Source/C/VfrCompile/VfrFormPkg.h|   1 +
 BaseTools/Source/C/VfrCompile/VfrSyntax.g | 238 ++
 6 files changed, 150 insertions(+), 104 deletions(-)

diff --git a/BaseTools/Source/C/VfrCompile/VfrCompiler.cpp 
b/BaseTools/Source/C/VfrCompile/VfrCompiler.cpp
index 5f4d262d85..4031af6e39 100644
--- a/BaseTools/Source/C/VfrCompile/VfrCompiler.cpp
+++ b/BaseTools/Source/C/VfrCompile/VfrCompiler.cpp
@@ -78,6 +78,7 @@ CVfrCompiler::OptionInitialization (
   mOptions.WarningAsError= FALSE;   mOptions.AutoDefault   
= FALSE;   mOptions.CheckDefault  = FALSE;+  
mOptions.IsCatchDefaultEnable  = FALSE;   memset 
(&mOptions.OverrideClassGuid, 0, sizeof (EFI_GUID));if (Argc == 1) {@@ 
-95,6 +96,8 @@ CVfrCompiler::OptionInitialization (
   Version ();   SET_RUN_STATUS (STATUS_DEAD);   return;+} else 
if (stricmp(Argv[Index], "--catch_default") == 0){+  
mOptions.IsCatchDefaultEnable = TRUE; } else if (stricmp(Argv[Index], "-l") 
== 0) {   mOptions.CreateRecordListFile = TRUE;   
gCIfrRecordInfoDB.TurnOn ();@@ -179,7 +182,6 @@ 
CVfrCompiler::OptionInitialization (
   goto Fail; } strcpy (mOptions.VfrFileName, Argv[Index]);- if 
(mOptions.OutputDirectory == NULL) {   mOptions.OutputDirectory = (CHAR8 *) 
malloc (1);   if (mOptions.OutputDirectory == NULL) {@@ -679,7 +681,7 @@ 
CVfrCompiler::Compile (
 DebugError (NULL, 0, 0001, "Error opening the input file", "%s", 
InFileName); goto Fail;   }-+  InputInfo.IsCatchDefaultEnable = 
mOptions.IsCatchDefaultEnable;   if (mOptions.HasOverrideClassGuid) { 
InputInfo.OverrideClassGuid = &mOptions.OverrideClassGuid;   } else {@@ -937,5 
+939,3 @@ main (
return GetUtilityStatus (); }--diff --git 
a/BaseTools/Source/C/VfrCompile/VfrCompiler.h 
b/BaseTools/Source/C/VfrCompile/VfrCompiler.h
index b6e207d2ce..974f37c4eb 100644
--- a/BaseTools/Source/C/VfrCompile/VfrCompiler.h
+++ b/BaseTools/Source/C/VfrCompile/VfrCompiler.h
@@ -52,6 +52,7 @@ typedef struct {
   BOOLEAN WarningAsError;   BOOLEAN AutoDefault;   BOOLEAN CheckDefault;+  
BOOLEAN IsCatchDefaultEnable; } OPTIONS;  typedef enum {diff --git 
a/BaseTools/Source/C/VfrCompile/VfrError.cpp 
b/BaseTools/Source/C/VfrCompile/VfrError.cpp
index 65bb8e34fd..8a706f929b 100644
--- a/BaseTools/Source/C/VfrCompile/VfrError.cpp
+++ b/BaseTools/Source/C/VfrCompile/VfrError.cpp
@@ -49,7 +49,8 @@ static SVFR_WARNING_HANDLE VFR_WARNING_HANDLE_TABLE [] = {
   { VFR_WARNING_DEFAULT_VALUE_REDEFINED, ": default value re-defined with 
different value"},   { VFR_WARNING_ACTION_WITH_TEXT_TWO, ": Action opcode 
should not have TextTwo part"},   { VFR_WARNING_OBSOLETED_FRAMEWORK_OPCODE, ": 
Not recommend to use obsoleted framework opcode"},-  { 
VFR_WARNING_CODEUNDEFINED, ": undefined Warning Code" }+  { 
VFR_WARNING_CODEUNDEFINED, ": undefined Warning Code" },+  { 
VFR_WARNING_UNSUPPORTED, ": pls remove the default values if necessary" } };  
CVfrErrorHandle::CVfrErrorHandle (diff --git 
a/BaseTools/Source/C/VfrCompile/VfrError.h 
b/BaseTools/Source/C/VfrCompile/VfrError.h
index 7d16bd5f74..1b4bc173d2 100644
--- a/BaseTools/Source/C/VfrCompile/VfrError.h
+++ b/BaseTools/Source/C/VfrCompile/VfrError.h
@@ -47,7 +47,8 @@ typedef enum {
   VFR_WARNING_DEFAULT_VALUE_REDEFINED = 0,   VFR_WARNING_ACTION_WITH_TEXT_TWO, 
  VFR_WARNING_OBSOLETED_FRAMEWORK_OPCODE,-  VFR_WARNING_CODEUNDEFINED+  
VFR_WARNING_CODEUNDEFINED,+  VFR_WARNING_UNSUPPORTED } EFI_VFR_WARNING_CODE;  
typedef struct _SVFR_ERROR_HANDLE {diff --git 
a/BaseTools/Source/C/VfrCompile/VfrFormPkg.h 
b/BaseTools/Source/C/VfrCompile/VfrFormPkg.h
index 9ef6f07787..d8fada3bcb 100644
--- a/BaseTools/Source/C/VfrCompile/VfrFormPkg.h
+++ b/BaseTools/Source/C/VfrCompile/VfrFormPkg.h
@@ -96,6 +96,7 @@ struct SBufferNode {
  typedef struct {   EFI_GUID *OverrideClassGuid;+  BOOLEAN 
IsCatchDefaultEnable; } 

[edk2-devel] Build firmware for STM32MP25 with edk2

2024-03-08 Thread phanbagiabao2001
Hello everyone,

I want to build the firmware for the platform STM32MP25. Can I use edk2 to
build it? If yes, can you give me the idea because I don't see the STM32
platform in edk2-platforms?

-- 
PHAN Ba Gia Bao
Etudiant en 5A STI - INSA Centre Val de Loire


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Re: [edk2-devel] [PATCH] Maintainers.txt: remove Laszlo's entries

2024-03-08 Thread Ard Biesheuvel
On Fri, 8 Mar 2024 at 10:14, Laszlo Ersek  wrote:
>
> On 3/6/24 23:22, Michael D Kinney wrote:
> > Reviewed-by: Michael D Kinney 
>
> Merged as commit ccf91b518f22, via
> .
>
> Thank you all for everything,

Goodbye Laszlo. It was great to have you back, even if only for a short while.


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Re: [edk2-devel] [PATCH v2 00/10] clean up ProcessLibraryConstructorList() declarations in SEC modules

2024-03-08 Thread Laszlo Ersek
On 3/8/24 10:13, Laszlo Ersek wrote:
> On 3/5/24 12:38, Laszlo Ersek wrote:
>> Bugzillas:
>> - https://bugzilla.tianocore.org/show_bug.cgi?id=990
>> - https://bugzilla.tianocore.org/show_bug.cgi?id=991
>> - https://bugzilla.tianocore.org/show_bug.cgi?id=4643
>>
>> CI:
>> - https://github.com/tianocore/edk2/pull/5442
>>
>> Branch:
>> - 
>> https://github.com/lersek/edk2/tree/ProcessLibraryConstructorList-SEC-990-991-v2
>>
>> This patch series puts the recent BaseTools feature to use in which
>> AutoGen generates the ProcessLibraryConstructorList() declaration in
>> "AutoGen.h" for such non-library SEC modules whose INF_VERSION is at
>> least 1.30. The BaseTools feature is present in both edk2 [1] and
>> edk2-basetools [2], and has been documented in the Build spec [3] and
>> the Inf spec [4]. Kudos to Rebecca for tagging a new edk2-basetools
>> release [5] [6] with the new feature.
>>
>> [1] edk2 commit bac9c74080cf
>> [2] edk2-basetools commit 5b7161de22ee
>> [3] edk2-BuildSpecification commit range db69f5661cae..7a7165a7d199
>> [4] edk2-InfSpecification commit range a31e3c842bee..1ea6546578fe
>> [5] https://github.com/tianocore/edk2-basetools/releases/tag/v0.1.51
>> [6] https://pypi.org/project/edk2-basetools/0.1.51/
>>
>> The edk2-basetools part is adopted in the first patch (for
>> "pip-requirements.txt").
>>
>> The rest of the patches clean up -- superfluous, or even incorrect --
>> ProcessLibraryConstructorList() declarations (and, in some cases,
>> incorrect calls), together with raising the INF_VERSIONs in the related
>> SEC module INF files to 1.30.
>>
>> Comparing this version to v1 is not useful, as the compatibility
>> approach is different, and so this version is structured differently.
>> Please review any patches for your subsystem from scratch (they are not
>> difficult or large).
>>
>> Cc: Andrei Warkentin 
>> Cc: Andrew Fish 
>> Cc: Ard Biesheuvel 
>> Cc: Ashraf Ali S 
>> Cc: Bob Feng 
>> Cc: Catharine West 
>> Cc: Chasel Chiu 
>> Cc: Duggapu Chinni B 
>> Cc: Erdem Aktas 
>> Cc: Gerd Hoffmann 
>> Cc: Gua Guo 
>> Cc: Guo Dong 
>> Cc: James Lu 
>> Cc: Jiewen Yao 
>> Cc: Joey Vagedes 
>> Cc: Leif Lindholm 
>> Cc: Liming Gao 
>> Cc: Michael D Kinney 
>> Cc: Michael Roth 
>> Cc: Min Xu 
>> Cc: Nate DeSimone 
>> Cc: Rahul Kumar 
>> Cc: Ray Ni 
>> Cc: Rebecca Cran 
>> Cc: Sami Mujawar 
>> Cc: Sean Brogan 
>> Cc: Sean Rhodes 
>> Cc: Star Zeng 
>> Cc: Sunil V L 
>> Cc: Susovan Mohapatra 
>> Cc: Ted Kuo 
>> Cc: Tom Lendacky 
>> Cc: Yuwei Chen 
>>
>> Thanks,
>> Laszlo
>>
>> Laszlo Ersek (10):
>>   pip-requirements.txt: require edk2-basetools version 0.1.51
>>   OvmfPkg: auto-generate (and fix) SEC ProcessLibraryConstructorList()
>> decl
>>   OvmfPkg/IntelTdx: auto-gen & fix SEC ProcessLibraryConstructorList()
>> decl
>>   OvmfPkg/RiscVVirt/Sec: clean up ProcessLibraryConstructorList() decl
>>   ArmPlatformPkg: auto-generate SEC ProcessLibraryConstructorList() decl
>>   ArmVirtPkg: auto-generate SEC ProcessLibraryConstructorList() decl
>>   EmulatorPkg: auto-generate SEC ProcessLibraryConstructorList() decl
>>   IntelFsp2Pkg: auto-generate SEC ProcessLibraryConstructorList() decl
>>   UefiCpuPkg: auto-generate SEC ProcessLibraryConstructorList() decl
>>   UefiPayloadPkg: auto-generate SEC ProcessLibraryConstructorList() decl
>>
>>  ArmPlatformPkg/PrePeiCore/PrePeiCore.h   | 10 --
>>  ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf   |  2 +-
>>  ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf  |  2 +-
>>  ArmPlatformPkg/PrePi/PeiMPCore.inf   |  2 +-
>>  ArmPlatformPkg/PrePi/PeiUniCore.inf  |  2 +-
>>  ArmPlatformPkg/PrePi/PrePi.h |  6 --
>>  ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf  |  2 +-
>>  ArmVirtPkg/PrePi/PrePi.c |  6 --
>>  EmulatorPkg/Sec/Sec.h|  9 -
>>  EmulatorPkg/Sec/Sec.inf  |  2 +-
>>  IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf|  2 +-
>>  IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf  |  2 +-
>>  IntelFsp2Pkg/FspSecCore/SecMain.h| 12 
>> 
>>  OvmfPkg/IntelTdx/Sec/SecMain.c   |  3 +--
>>  OvmfPkg/IntelTdx/Sec/SecMain.inf |  2 +-
>>  OvmfPkg/RiscVVirt/Sec/Memory.c   |  1 -
>>  OvmfPkg/RiscVVirt/Sec/SecMain.h  | 12 
>> 
>>  OvmfPkg/RiscVVirt/Sec/SecMain.inf|  2 +-
>>  OvmfPkg/Sec/SecMain.c|  3 +--
>>  OvmfPkg/Sec/SecMain.inf  |  2 +-
>>  UefiCpuPkg/SecCore/SecCore.inf   |  2 +-
>>  UefiCpuPkg/SecCore/SecCoreNative.inf |  2 +-
>>  UefiCpuPkg/SecCore/SecMain.h

Re: [edk2-devel] [edk2-platforms PATCH v2 0/4] clean up ProcessLibraryConstructorList() declarations in SEC modules

2024-03-08 Thread Laszlo Ersek
On 3/5/24 13:01, Laszlo Ersek wrote:
> Bugzilla:
> - https://bugzilla.tianocore.org/show_bug.cgi?id=990
> 
> This patch series puts the recent BaseTools feature to use in which
> AutoGen generates the ProcessLibraryConstructorList() declaration in
> "AutoGen.h" for such non-library SEC modules whose INF_VERSION is at
> least 1.30. The BaseTools feature is present in both edk2 [1] and
> edk2-basetools [2], and has been documented in the Build spec [3] and
> the Inf spec [4]. Kudos to Rebecca for tagging a new edk2-basetools
> release [5] [6] with the new feature.
> 
> [1] edk2 commit bac9c74080cf
> [2] edk2-basetools commit 5b7161de22ee
> [3] edk2-BuildSpecification commit range db69f5661cae..7a7165a7d199
> [4] edk2-InfSpecification commit range a31e3c842bee..1ea6546578fe
> [5] https://github.com/tianocore/edk2-basetools/releases/tag/v0.1.51
> [6] https://pypi.org/project/edk2-basetools/0.1.51/
> 
> The edk2-basetools part is adopted in the first patch (for
> "pip-requirements.txt") of the edk2 series
> 
>   [edk2-devel] [PATCH v2 00/10]
>   clean up ProcessLibraryConstructorList() declarations in SEC modules
> 
>   https://edk2.groups.io/g/devel/message/116367
>   msgid <20240305113843.68812-1-ler...@redhat.com>
> 
> The rest of the patches clean up -- superfluous, or even incorrect --
> ProcessLibraryConstructorList() declarations (and, in some cases,
> incorrect calls), together with raising the INF_VERSIONs in the related
> SEC module INF files to 1.30.
> 
> Comparing this version to v1 is not useful, as the compatibility
> approach is different, and so this version is structured differently.
> Please review any patches for your subsystem from scratch (they are not
> difficult or large).
> 
> Cc: Ard Biesheuvel 
> Cc: Leif Lindholm 
> Cc: Nate DeSimone 
> Cc: Sai Chaganty 
> Cc: Bibo Mao 
> Cc: Chao Li 
> Cc: Xianglai li 
> Cc: Sunil V L 
> Cc: USER0FISH 
> Cc: caiyuqing379 
> Cc: dahogn 
> Cc: meng-cz 
> 
> Thanks,
> Laszlo
> 
> Laszlo Ersek (4):
>   BeagleBoardPkg: auto-generate SEC ProcessLibraryConstructorList() decl
>   SimicsOpenBoardPkg: auto-gen & fix SEC ProcessLibraryConstructorList()
> decl
>   LoongArchQemuPkg: auto-gen & fix SEC ProcessLibraryConstructorList()
> decl
>   SG2042Pkg/Sec: clean up ProcessLibraryConstructorList() decl
> 
>  Platform/BeagleBoard/BeagleBoardPkg/PrePi/PeiUniCore.inf |  2 +-
>  Platform/BeagleBoard/BeagleBoardPkg/PrePi/PrePi.h|  6 --
>  Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c  |  3 +--
>  Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf|  2 +-
>  Platform/Loongson/LoongArchQemuPkg/Sec/SecMain.c |  3 +--
>  Platform/Loongson/LoongArchQemuPkg/Sec/SecMain.inf   |  2 +-
>  Silicon/Sophgo/SG2042Pkg/Sec/Memory.c|  1 -
>  Silicon/Sophgo/SG2042Pkg/Sec/SecMain.h   | 12 
>  Silicon/Sophgo/SG2042Pkg/Sec/SecMain.inf |  2 +-
>  9 files changed, 6 insertions(+), 27 deletions(-)
> 
> 
> base-commit: fe41713668d42b20a2370dab27de3269e877e454

Merged by Ard as commit range 4e478301f40e..bb44e786e7a7, via
.

Thanks!
Laszlo



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Re: [edk2-devel] [PATCH v2 2/2] ShellPkg/Acpiview: Adds ACPI WSMT Table parse

2024-03-08 Thread PierreGondois

Hello Abdul,

On 3/8/24 08:22, Abdul Lateef Attar wrote:

From: Abdul Lateef Attar 

Adds WSMT parse to the UefiShellAcpiViewCommandLib library.

Cc: Zhichao Gao 
Cc: Pierre Gondois  
Signed-off-by: Abdul Lateef Attar 
Reviewed-by: Pierre Gondois  
---
  .../UefiShellAcpiViewCommandLib/AcpiParser.h  |  17 ++
  .../Parsers/Wsmt/WsmtParser.c | 147 ++
  .../UefiShellAcpiViewCommandLib.c |   1 +
  .../UefiShellAcpiViewCommandLib.inf   |   1 +
  4 files changed, 166 insertions(+)
  create mode 100644 
ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Wsmt/WsmtParser.c

diff --git a/ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiParser.h 
b/ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiParser.h
index ba3364f2c2..6468fe5d8c 100644
--- a/ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiParser.h
+++ b/ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiParser.h
@@ -985,6 +985,23 @@ ParseAcpiSsdt (
IN UINT8AcpiTableRevision
);
  
+/**

+  This function parses the ACPI WSMT table.
+
+  @param [in] Trace  If TRUE, trace the ACPI fields.
+  @param [in] PtrPointer to the start of the buffer.
+  @param [in] AcpiTableLengthLength of the ACPI table.
+  @param [in] AcpiTableRevision  Revision of the ACPI table.
+**/
+VOID
+EFIAPI
+ParseAcpiWsmt (
+  IN BOOLEAN  Trace,
+  IN UINT8*Ptr,
+  IN UINT32   AcpiTableLength,
+  IN UINT8AcpiTableRevision
+  );
+
  /**
This function parses the ACPI XSDT table
and optionally traces the ACPI table fields.
diff --git 
a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Wsmt/WsmtParser.c 
b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Wsmt/WsmtParser.c
new file mode 100644
index 00..3c7252b0bf
--- /dev/null
+++ b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Wsmt/WsmtParser.c
@@ -0,0 +1,147 @@
+/** @file
+  WSMT table parser
+
+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Reference(s):
+- Windows SMM Security Mitigation Table spec, version 1.0
+**/
+
+#include 
+#include 
+#include "AcpiParser.h"
+
+STATIC ACPI_DESCRIPTION_HEADER_INFO  AcpiHdrInfo;
+
+/**
+  This function validates the WSMT Protection flag.
+
+  @param [in] Ptr  Pointer to the start of the buffer.
+  @param [in] Context Pointer to context specific information e.g. this
+  could be a pointer to the ACPI table header.
+
+**/
+STATIC
+VOID
+EFIAPI
+ValidateWsmtProtectionFlag (
+  IN UINT8  *Ptr,
+  IN VOID   *Context
+  )
+{
+  UINT32  ProtectionFlag;
+
+  ProtectionFlag = *(UINT32 *)Ptr;
+
+  if ((ProtectionFlag & 
EFI_WSMT_PROTECTION_FLAGS_COMM_BUFFER_NESTED_PTR_PROTECTION) \
+  == EFI_WSMT_PROTECTION_FLAGS_COMM_BUFFER_NESTED_PTR_PROTECTION)
+  {
+if ((ProtectionFlag & EFI_WSMT_PROTECTION_FLAGS_FIXED_COMM_BUFFERS) \
+!= EFI_WSMT_PROTECTION_FLAGS_FIXED_COMM_BUFFERS)
+{
+  IncrementErrorCount ();
+  Print (L"ERROR: COMM_BUFFER_NESTED_PTR_PROTECTION is set but 
FIXED_COMM_BUFFERS is not set.\n");
+}
+  }
+}
+
+/**
+  This function validates the reserved bits in the WSMT Protection flag.
+
+  @param [in] Ptr  Pointer to the start of the buffer.
+  @param [in] Context Pointer to context specific information e.g. this
+  could be a pointer to the ACPI table header.
+**/
+STATIC
+VOID
+EFIAPI
+ValidateReserved (
+  IN UINT8  *Ptr,
+  IN VOID   *Context
+  )
+{
+  UINT32  ProtectionFlag;
+
+  ProtectionFlag = *(UINT32 *)Ptr;
+
+  if ((ProtectionFlag & 0xFFF8) != 0) {
+IncrementErrorCount ();
+Print (L"ERROR: Reserved bits are not zero.\n");
+  }
+}
+
+/**
+  An ACPI_PARSER array describing the WSMT Protection flag .
+**/
+STATIC CONST ACPI_PARSER  WsmtProtectionFlagParser[] = {
+  { L"FIXED_COMM_BUFFERS ",1,  0, L"0x%x", NULL, NULL, NULL,   
  NULL },
+  { L"COMM_BUFFER_NESTED_PTR_PROTECTION ", 1,  1, L"0x%x", NULL, NULL, NULL,   
  NULL },
+  { L"SYSTEM_RESOURCE_PROTECTION ",1,  2, L"0x%x", NULL, NULL, NULL,   
  NULL },
+  { L"Reserved ",  29, 3, L"0x%x", NULL, NULL, 
ValidateReserved, NULL },


I think we misunderstood each other here.
We should check that if COMM_BUFFER_NESTED_PTR_PROTECTION,
then FIXED_COMM_BUFFERS is also set.

So I think we need to:
- store the value of FIXED_COMM_BUFFERS (cf. ACPI_PARSER::ItemPtr in other 
parsers)
- add a validate to COMM_BUFFER_NESTED_PTR_PROTECTION to check the above

I don't think it is necessary to check the reserved bits,

Regards,
Pierre


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Re: [edk2-devel] [PATCH] Maintainers.txt: remove Laszlo's entries

2024-03-08 Thread Laszlo Ersek
On 3/6/24 23:22, Michael D Kinney wrote:
> Reviewed-by: Michael D Kinney 

Merged as commit ccf91b518f22, via
.

Thank you all for everything,
Laszlo

>> -Original Message-
>> From: devel@edk2.groups.io  On Behalf Of Laszlo
>> Ersek
>> Sent: Wednesday, March 6, 2024 1:06 PM
>> To: edk2-devel-groups-io 
>> Cc: Andrew Fish ; Ard Biesheuvel
>> ; Gerd Hoffmann ; Yao,
>> Jiewen ; Leif Lindholm
>> ; Kinney, Michael D
>> ; Kumar, Rahul R ;
>> Ni, Ray ; Sami Mujawar 
>> Subject: [edk2-devel] [PATCH] Maintainers.txt: remove Laszlo's entries
>>
>> Red Hat and I have mutually and amicably agreed to separate. Remove my
>> entries from "Maintainers.txt".
>>
>> Cc: Andrew Fish 
>> Cc: Ard Biesheuvel 
>> Cc: Gerd Hoffmann 
>> Cc: Jiewen Yao 
>> Cc: Leif Lindholm 
>> Cc: Michael D Kinney 
>> Cc: Rahul Kumar 
>> Cc: Ray Ni 
>> Cc: Sami Mujawar 
>> Signed-off-by: Laszlo Ersek 
>> ---
>>
>> Notes:
>> I'd like to merge this patch very soon, but not before merging the
>> following series:
>>
>> * [PATCH v2 00/10]
>>   clean up ProcessLibraryConstructorList() declarations in SEC
>> modules
>>
>>   msgid <20240305113843.68812-1-ler...@redhat.com>
>>   https://edk2.groups.io/g/devel/message/116367
>>
>> * [edk2-platforms PATCH v2 0/4]
>>   clean up ProcessLibraryConstructorList() declarations in SEC
>> modules
>>
>>   msgid <20240305120126.70259-1-ler...@redhat.com>
>>   https://edk2.groups.io/g/devel/message/116378
>>
>>  Maintainers.txt | 3 ---
>>  1 file changed, 3 deletions(-)
>>
>> diff --git a/Maintainers.txt b/Maintainers.txt
>> index 9038f9eb3005..799f27f914ce 100644
>> --- a/Maintainers.txt
>> +++ b/Maintainers.txt
>> @@ -151,7 +151,6 @@ ArmVirtPkg
>>  F: ArmVirtPkg/
>>  W: https://github.com/tianocore/tianocore.github.io/wiki/ArmVirtPkg
>>  M: Ard Biesheuvel  [ardbiesheuvel]
>> -M: Laszlo Ersek  [lersek]
>>  R: Leif Lindholm  [leiflindholm]
>>  R: Sami Mujawar  [samimujawar]
>>  R: Gerd Hoffmann  [kraxel]
>> @@ -462,7 +461,6 @@ F: OvmfPkg/
>>  W: http://www.tianocore.org/ovmf/
>>  M: Ard Biesheuvel  [ardbiesheuvel]
>>  M: Jiewen Yao  [jyao1]
>> -M: Laszlo Ersek  [lersek]
>>  R: Gerd Hoffmann  [kraxel]
>>  S: Maintained
>>
>> @@ -622,7 +620,6 @@ UefiCpuPkg
>>  F: UefiCpuPkg/
>>  W: https://github.com/tianocore/tianocore.github.io/wiki/UefiCpuPkg
>>  M: Ray Ni  [niruiyu]
>> -M: Laszlo Ersek  [lersek]
>>  R: Rahul Kumar  [rahul1-kumar]
>>  R: Gerd Hoffmann  [kraxel]
>>
>>
>>
>>
>>
> 
> 
> 
> 
> 
> 



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Re: [edk2-devel] [PATCH v2 00/10] clean up ProcessLibraryConstructorList() declarations in SEC modules

2024-03-08 Thread Laszlo Ersek
On 3/5/24 12:38, Laszlo Ersek wrote:
> Bugzillas:
> - https://bugzilla.tianocore.org/show_bug.cgi?id=990
> - https://bugzilla.tianocore.org/show_bug.cgi?id=991
> - https://bugzilla.tianocore.org/show_bug.cgi?id=4643
> 
> CI:
> - https://github.com/tianocore/edk2/pull/5442
> 
> Branch:
> - 
> https://github.com/lersek/edk2/tree/ProcessLibraryConstructorList-SEC-990-991-v2
> 
> This patch series puts the recent BaseTools feature to use in which
> AutoGen generates the ProcessLibraryConstructorList() declaration in
> "AutoGen.h" for such non-library SEC modules whose INF_VERSION is at
> least 1.30. The BaseTools feature is present in both edk2 [1] and
> edk2-basetools [2], and has been documented in the Build spec [3] and
> the Inf spec [4]. Kudos to Rebecca for tagging a new edk2-basetools
> release [5] [6] with the new feature.
> 
> [1] edk2 commit bac9c74080cf
> [2] edk2-basetools commit 5b7161de22ee
> [3] edk2-BuildSpecification commit range db69f5661cae..7a7165a7d199
> [4] edk2-InfSpecification commit range a31e3c842bee..1ea6546578fe
> [5] https://github.com/tianocore/edk2-basetools/releases/tag/v0.1.51
> [6] https://pypi.org/project/edk2-basetools/0.1.51/
> 
> The edk2-basetools part is adopted in the first patch (for
> "pip-requirements.txt").
> 
> The rest of the patches clean up -- superfluous, or even incorrect --
> ProcessLibraryConstructorList() declarations (and, in some cases,
> incorrect calls), together with raising the INF_VERSIONs in the related
> SEC module INF files to 1.30.
> 
> Comparing this version to v1 is not useful, as the compatibility
> approach is different, and so this version is structured differently.
> Please review any patches for your subsystem from scratch (they are not
> difficult or large).
> 
> Cc: Andrei Warkentin 
> Cc: Andrew Fish 
> Cc: Ard Biesheuvel 
> Cc: Ashraf Ali S 
> Cc: Bob Feng 
> Cc: Catharine West 
> Cc: Chasel Chiu 
> Cc: Duggapu Chinni B 
> Cc: Erdem Aktas 
> Cc: Gerd Hoffmann 
> Cc: Gua Guo 
> Cc: Guo Dong 
> Cc: James Lu 
> Cc: Jiewen Yao 
> Cc: Joey Vagedes 
> Cc: Leif Lindholm 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Cc: Michael Roth 
> Cc: Min Xu 
> Cc: Nate DeSimone 
> Cc: Rahul Kumar 
> Cc: Ray Ni 
> Cc: Rebecca Cran 
> Cc: Sami Mujawar 
> Cc: Sean Brogan 
> Cc: Sean Rhodes 
> Cc: Star Zeng 
> Cc: Sunil V L 
> Cc: Susovan Mohapatra 
> Cc: Ted Kuo 
> Cc: Tom Lendacky 
> Cc: Yuwei Chen 
> 
> Thanks,
> Laszlo
> 
> Laszlo Ersek (10):
>   pip-requirements.txt: require edk2-basetools version 0.1.51
>   OvmfPkg: auto-generate (and fix) SEC ProcessLibraryConstructorList()
> decl
>   OvmfPkg/IntelTdx: auto-gen & fix SEC ProcessLibraryConstructorList()
> decl
>   OvmfPkg/RiscVVirt/Sec: clean up ProcessLibraryConstructorList() decl
>   ArmPlatformPkg: auto-generate SEC ProcessLibraryConstructorList() decl
>   ArmVirtPkg: auto-generate SEC ProcessLibraryConstructorList() decl
>   EmulatorPkg: auto-generate SEC ProcessLibraryConstructorList() decl
>   IntelFsp2Pkg: auto-generate SEC ProcessLibraryConstructorList() decl
>   UefiCpuPkg: auto-generate SEC ProcessLibraryConstructorList() decl
>   UefiPayloadPkg: auto-generate SEC ProcessLibraryConstructorList() decl
> 
>  ArmPlatformPkg/PrePeiCore/PrePeiCore.h   | 10 --
>  ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf   |  2 +-
>  ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf  |  2 +-
>  ArmPlatformPkg/PrePi/PeiMPCore.inf   |  2 +-
>  ArmPlatformPkg/PrePi/PeiUniCore.inf  |  2 +-
>  ArmPlatformPkg/PrePi/PrePi.h |  6 --
>  ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf  |  2 +-
>  ArmVirtPkg/PrePi/PrePi.c |  6 --
>  EmulatorPkg/Sec/Sec.h|  9 -
>  EmulatorPkg/Sec/Sec.inf  |  2 +-
>  IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf|  2 +-
>  IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf  |  2 +-
>  IntelFsp2Pkg/FspSecCore/SecMain.h| 12 
> 
>  OvmfPkg/IntelTdx/Sec/SecMain.c   |  3 +--
>  OvmfPkg/IntelTdx/Sec/SecMain.inf |  2 +-
>  OvmfPkg/RiscVVirt/Sec/Memory.c   |  1 -
>  OvmfPkg/RiscVVirt/Sec/SecMain.h  | 12 
> 
>  OvmfPkg/RiscVVirt/Sec/SecMain.inf|  2 +-
>  OvmfPkg/Sec/SecMain.c|  3 +--
>  OvmfPkg/Sec/SecMain.inf  |  2 +-
>  UefiCpuPkg/SecCore/SecCore.inf   |  2 +-
>  UefiCpuPkg/SecCore/SecCoreNative.inf |  2 +-
>  UefiCpuPkg/SecCore/SecMain.h | 12 
> 
>  UefiPayloadPkg/UefiPayloadEntry/FitUniversalPayloadEntry.inf |  2 +-
>  UefiPayloadPkg/UefiPayl

Re: [edk2-devel] [PATCH] NanhuDev:Add BOSC NanhuDev platform

2024-03-08 Thread WangYang
Hi,Sunil V L

How about this status.



> -原始邮件-
> 发件人: WangYang 
> 发送时间: 2024-02-28 14:34:11 (星期三)
> 收件人: devel@edk2.groups.io, suni...@ventanamicro.com
> 抄送: "Yang Wang" , "Ran Wang" , 
> "YunFeng Yang" , "YaXing Guo" , 
> "Bamvor Jian ZHANG" 
> 主题: [edk2-devel] [PATCH] NanhuDev:Add BOSC NanhuDev platform
> 
> This commit adds the initial support for BOSC's
> nanhu platform which provides up to 2 RISC-V RV64
> processor cores.
> 
> 
> Signed-off-by: Yang Wang 
> Signed-off-by: Ran Wang 
> Signed-off-by: YunFeng Yang 
> Signed-off-by: YaXing Guo 
> Cc: Bamvor Jian ZHANG 
> Cc: Sunil V L 
> ---
>  .../NanhuDev/DeviceTree.fdf.inc   |  36 ++
>  .../NanhuDev/DeviceTree/NanhuDev.dts  | 120 
>  .../NanhuDev/DeviceTree/NanhuDeviceTree.inf   |  22 +
>  .../XiangshanSeriesPkg/NanhuDev/NanhuDev.dec  |  24 +
>  .../XiangshanSeriesPkg/NanhuDev/NanhuDev.dsc  | 547 ++
>  .../XiangshanSeriesPkg/NanhuDev/NanhuDev.fdf  | 326 +++
>  .../NanhuDev/NanhuDev.fdf.inc | 108 
>  .../XiangshanSeriesPkg/NanhuDev/NanhuDev.uni  |  13 +
>  .../NanhuDev/NanhuDevPkgExtra.uni |  12 +
>  .../NanhuDev/Universal/Sec/SecMain.inf|  82 +++
>  .../NanhuDev/VarStore.fdf.inc |  70 +++
>  Platform/Bosc/XiangshanSeriesPkg/Readme.md|  59 ++
>  .../XiangshanSeriesPkg/XiangshanSeriesPkg.dec |  29 +
>  .../XiangshanSeriesPkg/XiangshanSeriesPkg.uni |  12 +
>  .../XiangshanSeriesPkgExtra.uni   |  12 +
>  Silicon/Bosc/NanHuPkg/NanHuPkg.dec|  33 ++
>  16 files changed, 1505 insertions(+)
>  create mode 100644 
> Platform/Bosc/XiangshanSeriesPkg/NanhuDev/DeviceTree.fdf.inc
>  create mode 100644 
> Platform/Bosc/XiangshanSeriesPkg/NanhuDev/DeviceTree/NanhuDev.dts
>  create mode 100644 
> Platform/Bosc/XiangshanSeriesPkg/NanhuDev/DeviceTree/NanhuDeviceTree.inf
>  create mode 100644 Platform/Bosc/XiangshanSeriesPkg/NanhuDev/NanhuDev.dec
>  create mode 100644 Platform/Bosc/XiangshanSeriesPkg/NanhuDev/NanhuDev.dsc
>  create mode 100644 Platform/Bosc/XiangshanSeriesPkg/NanhuDev/NanhuDev.fdf
>  create mode 100644 Platform/Bosc/XiangshanSeriesPkg/NanhuDev/NanhuDev.fdf.inc
>  create mode 100644 Platform/Bosc/XiangshanSeriesPkg/NanhuDev/NanhuDev.uni
>  create mode 100644 
> Platform/Bosc/XiangshanSeriesPkg/NanhuDev/NanhuDevPkgExtra.uni
>  create mode 100644 
> Platform/Bosc/XiangshanSeriesPkg/NanhuDev/Universal/Sec/SecMain.inf
>  create mode 100644 Platform/Bosc/XiangshanSeriesPkg/NanhuDev/VarStore.fdf.inc
>  create mode 100644 Platform/Bosc/XiangshanSeriesPkg/Readme.md
>  create mode 100644 Platform/Bosc/XiangshanSeriesPkg/XiangshanSeriesPkg.dec
>  create mode 100644 Platform/Bosc/XiangshanSeriesPkg/XiangshanSeriesPkg.uni
>  create mode 100644 
> Platform/Bosc/XiangshanSeriesPkg/XiangshanSeriesPkgExtra.uni
>  create mode 100644 Silicon/Bosc/NanHuPkg/NanHuPkg.dec
> 
> diff --git a/Platform/Bosc/XiangshanSeriesPkg/NanhuDev/DeviceTree.fdf.inc 
> b/Platform/Bosc/XiangshanSeriesPkg/NanhuDev/DeviceTree.fdf.inc
> new file mode 100644
> index 00..f489e5631f
> --- /dev/null
> +++ b/Platform/Bosc/XiangshanSeriesPkg/NanhuDev/DeviceTree.fdf.inc
> @@ -0,0 +1,36 @@
> +## @file
> +#  FDF include file with Layout Regions that define an empty variable store.
> +#
> +#  Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights 
> reserved.
> +#  Copyright (C) 2014, Red Hat, Inc.
> +#  Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.
> +#  Copyright (c) 2024, BOSC. All rights reserved.
> +#
> +#  SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +##
> +
> +$(DTB_OFFSET)|$(DTB_SIZE)
> +gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDtbFvBase|gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDtbFvSize
> +FV = DTBFV
> +
> +[FV.DTBFV]
> +BlockSize  = 0x1000
> +FvAlignment= 16
> +ERASE_POLARITY = 1
> +MEMORY_MAPPED  = TRUE
> +STICKY_WRITE   = TRUE
> +LOCK_CAP   = TRUE
> +LOCK_STATUS= TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP  = TRUE
> +WRITE_STATUS   = TRUE
> +WRITE_LOCK_CAP = TRUE
> +WRITE_LOCK_STATUS  = TRUE
> +READ_DISABLED_CAP  = TRUE
> +READ_ENABLED_CAP   = TRUE
> +READ_STATUS= TRUE
> +READ_LOCK_CAP  = TRUE
> +READ_LOCK_STATUS   = TRUE
> +
> +INF RuleOverride = DTB 
> Platform/Bosc/XiangshanSeriesPkg/NanhuDev/DeviceTree/NanhuDeviceTree.inf
> diff --git 
> a/Platform/Bosc/XiangshanSeriesPkg/NanhuDev/DeviceTree/NanhuDev.dts 
> b/Platform/Bosc/XiangshanSeriesPkg/NanhuDev/DeviceTree/NanhuDev.dts
> new file mode 100644
> index 00..12617cab69
> --- /dev/null
> +++ b/Platform/Bosc/XiangshanSeriesPkg/NanhuDev/DeviceTree/NanhuDev.dts
> @@ -0,0 +1,120 @@
> +/** @file
> + Nanhu platform Device Tree
> +
> + Copyright (c) 2024, BOSC. All rights reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +/dts-v1/;
> +/ {
> +#address-cells = <2>;
> +#size-cells = <2>;
> +compatible = "bosc,nanhu-dev";
> +   

Re: [edk2-devel] [PATCH v8 12/37] UefiCpuPkg: Add CPU exception library for LoongArch

2024-03-08 Thread Chao Li

Hi Ray,


Thanks,
Chao
On 2024/2/2 11:30, Ni, Ray wrote:

1. Most of INF changes are not necessary for x86. Can you avoid them?


+  ## This PCD Contains the pointer to a CPU exception vector base address.
+  # @Prompt The pointer to a CPU exception vector base address.
+
gUefiCpuPkgTokenSpaceGuid.PcdCpuExceptionVectorBaseAddress|0x0|UINT
64|0x6022
+

2. I do not see any reference to the above PCD in source/INF files.
Any mistake here?

This PCD used in CpuMmuLib and OvmfPkg/LoongArchVirt.









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