Re: [edk2-devel] [edk2-staging][PATCH v2 5/5] edk2-staging/RedfishClientPkg: Add missing module
Reviewed-by: Abner Chang > -Original Message- > From: Wang, Nickle (Server BIOS) > Sent: Tuesday, June 21, 2022 9:48 AM > To: devel@edk2.groups.io > Cc: Wang, Nickle (Server BIOS) ; Chang, Abner (HPS > SW/FW Technologist) ; Yang Atom > ; Nick Ramirez > Subject: [edk2-staging][PATCH v2 5/5] edk2-staging/RedfishClientPkg: Add > missing module > > Add missing module import for conditional, RfCollection, RfResource, > RfResourceRaw, hashlib and OrderedDict > > Signed-off-by: Nickle Wang > Cc: Abner Chang > Cc: Yang Atom > Cc: Nick Ramirez > --- > .../Tools/Redfish-Profile-Simulator/v1sim/redfishURIs.py | 5 - > .../Tools/Redfish-Profile-Simulator/v1sim/resource.py| 2 ++ > 2 files changed, 6 insertions(+), 1 deletion(-) > > diff --git a/RedfishClientPkg/Tools/Redfish-Profile- > Simulator/v1sim/redfishURIs.py b/RedfishClientPkg/Tools/Redfish-Profile- > Simulator/v1sim/redfishURIs.py > index 35d3794cc6..53a4484979 100644 > --- a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/redfishURIs.py > +++ b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/redfishURIs.py > @@ -1,7 +1,7 @@ > # > > # Copyright Notice: > > # Copyright (c) 2019, Intel Corporation. All rights reserved. > > -# (C) Copyright 2021 Hewlett Packard Enterprise Development LP > > +# (C) Copyright 2021-2022 Hewlett Packard Enterprise Development LP > > # SPDX-License-Identifier: BSD-2-Clause-Patent > > # > > # Copyright Notice: > > @@ -16,6 +16,9 @@ from flask import request > > > from .flask_redfish_auth import RfHTTPBasicOrTokenAuth > > > > +from redfishProfileSimulator import conditional > > +from v1sim.resource import RfCollection, RfResource, RfResourceRaw > > + > > from werkzeug.serving import WSGIRequestHandler > > > > def rfApi_SimpleServer(root, versions, host="127.0.0.1", port=5000, cert="", > key=""): > > diff --git > a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/resource.py > b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/resource.py > index 0c7a838281..f6bd15cf32 100644 > --- a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/resource.py > +++ b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/resource.py > @@ -15,6 +15,8 @@ import os > import sys > > > > import flask > > +import hashlib > > +from collections import OrderedDict > > > > if sys.version_info >= (3, 5): > > from typing import Type > > -- > 2.32.0.windows.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#90648): https://edk2.groups.io/g/devel/message/90648 Mute This Topic: https://groups.io/mt/91891768/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-staging][PATCH v2 4/5] edk2-staging/RedfishClientPkg: Add ETag support
Reviewed-by: Abner Chang
> -Original Message-
> From: Wang, Nickle (Server BIOS)
> Sent: Tuesday, June 21, 2022 9:47 AM
> To: devel@edk2.groups.io
> Cc: Wang, Nickle (Server BIOS) ; Chang, Abner (HPS
> SW/FW Technologist) ; Yang Atom
> ; Nick Ramirez
> Subject: [edk2-staging][PATCH v2 4/5] edk2-staging/RedfishClientPkg: Add ETag
> support
>
> Implement ETag support in HTTP header
>
> Signed-off-by: Nickle Wang
> Cc: Abner Chang
> Cc: Yang Atom
> Cc: Nick Ramirez
> ---
> .../v1sim/resource.py | 10 +--
> .../v1sim/systems.py | 28 +++
> 2 files changed, 25 insertions(+), 13 deletions(-)
>
> diff --git
> a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/resource.py
> b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/resource.py
> index e722d16a0b..0c7a838281 100644
> --- a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/resource.py
> +++ b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/resource.py
> @@ -36,6 +36,12 @@ class RfResource:
> self.final_init_processing(base_path, rel_path)
>
> else:
>
> self.res_data = {}
>
> +self.generate_etag(json.dumps(self.res_data))
>
> +
>
> +def generate_etag(self, context):
>
> +md5 = hashlib.md5()
>
> +md5.update(context.encode('utf-8'))
>
> +self.etag = 'W/"' + md5.hexdigest() + '"'
>
>
>
> def create_sub_objects(self, base_path, rel_path):
>
> pass
>
> @@ -49,8 +55,8 @@ class RfResource:
> # SHA1 should generate well-behaved etags
>
> response = flask.make_response(self.response)
>
> response.mimetype = 'application/json'
>
> -etag = hashlib.sha1(self.response.encode('utf-8')).hexdigest()
>
> -response.set_etag(etag)
>
> +response.headers["ETag"] = self.etag
>
> +
>
> return response
>
> except KeyError:
>
> flask.abort(404)
>
> diff --git a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/systems.py
> b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/systems.py
> index 6305a51efb..5adf81be5b 100644
> --- a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/systems.py
> +++ b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/systems.py
> @@ -92,7 +92,11 @@ class RfSystemObj(RfResource):
> if "BootOrder" in boot_data:
>
> self.res_data['Boot']['BootOrder'] = boot_data['BootOrder']
>
>
>
> -resp = flask.Response(json.dumps(self.res_data,indent=4),
> mimetype="application/json")
>
> +context = json.dumps(self.res_data,indent=4)
>
> +self.generate_etag(context)
>
> +resp = flask.Response(context, mimetype="application/json")
>
> +resp.headers["ETag"] = self.etag
>
> +
>
> return 0, 200, None, resp
>
>
>
> def reset_resource(self, reset_data):
>
> @@ -136,26 +140,28 @@ class RfMemoryCollection(RfCollection):
>
>
> post_data["@odata.id"] = newMemoryUrl
>
>
>
> -md5 = hashlib.md5()
>
> -md5.update(json.dumps(post_data).encode("utf-8"))
>
> -etag_str = 'W/"' + md5.hexdigest() + '"'
>
> -post_data["@odata.etag"] = etag_str
>
> +self.generate_etag(json.dumps(post_data,indent=4))
>
> +
>
> +post_data["@odata.etag"] = self.etag
>
> self.elements[str(newMemoryIdx)] = post_data
>
>
>
> resp = flask.Response(json.dumps(post_data,indent=4),
> mimetype="application/json")
>
> resp.headers["Location"] = newMemoryUrl
>
> -resp.headers["ETag"] = etag_str
>
> -
>
> +resp.headers["ETag"] = self.etag
>
> return 0, 200, None, resp
>
>
>
> def patch_memory(self, Idx, patch_data):
>
> -md5 = hashlib.md5()
>
> -md5.update(json.dumps(patch_data).encode("utf-8"))
>
> -etag_str = 'W/"' + md5.hexdigest() + '"'
>
> -patch_data["@odata.etag"] = etag_str
>
>
>
> +
>
> +self.elements[str(Idx)] = {**self.elements[str(Idx)], **patch_data}
>
> +
>
> +context = json.dumps(self.elements[str(Idx)],indent=4)
>
> +self.generate_etag(context)
>
> +patch_data["@odata.etag"
Re: [edk2-devel] [edk2-staging][PATCH v2 3/5] edk2-staging/RedfishClientPkg: Update patch method of computer system
Reviewed-by: Abner Chang
> -Original Message-
> From: Wang, Nickle (Server BIOS)
> Sent: Tuesday, June 21, 2022 9:46 AM
> To: devel@edk2.groups.io
> Cc: Wang, Nickle (Server BIOS) ; Chang, Abner (HPS
> SW/FW Technologist) ; Yang Atom
> ; Nick Ramirez
> Subject: [edk2-staging][PATCH v2 3/5] edk2-staging/RedfishClientPkg: Update
> patch method of computer system
>
> Remove attribute check during patch of computer system and return
> content-type with JSON format in HTTP header.
>
> Signed-off-by: Nickle Wang
> Cc: Abner Chang
> Cc: Yang Atom
> Cc: Nick Ramirez
> ---
> .../v1sim/resource.py | 4 ++-
> .../v1sim/systems.py | 28 +++
> 2 files changed, 13 insertions(+), 19 deletions(-)
>
> diff --git
> a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/resource.py
> b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/resource.py
> index ca7541f172..e722d16a0b 100644
> --- a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/resource.py
> +++ b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/resource.py
> @@ -2,6 +2,7 @@
> # Copyright Notice:
>
> #
>
> # Copyright (c) 2019, Intel Corporation. All rights reserved.
>
> +# (C) Copyright 2021-2022 Hewlett Packard Enterprise Development LP
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> # Copyright Notice:
>
> @@ -47,6 +48,7 @@ class RfResource:
> try:
>
> # SHA1 should generate well-behaved etags
>
> response = flask.make_response(self.response)
>
> +response.mimetype = 'application/json'
>
> etag = hashlib.sha1(self.response.encode('utf-8')).hexdigest()
>
> response.set_etag(etag)
>
> return response
>
> @@ -69,7 +71,7 @@ class RfResource:
> else:
>
> raise Exception("attribute %s not found" % key)
>
>
>
> -resp = flask.Response(json.dumps(self.res_data,indent=4))
>
> +resp = flask.Response(json.dumps(self.res_data,indent=4),
> mimetype="application/json")
>
> return 0, 200, None, resp
>
>
>
> def post_resource(self, post_data):
>
> diff --git a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/systems.py
> b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/systems.py
> index de4b839aeb..6305a51efb 100644
> --- a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/systems.py
> +++ b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/v1sim/systems.py
> @@ -2,7 +2,7 @@
> # Copyright Notice:
>
> #
>
> # Copyright (c) 2019, Intel Corporation. All rights reserved.
>
> -# (C) Copyright 2021 Hewlett Packard Enterprise Development LP
>
> +# (C) Copyright 2021-2022 Hewlett Packard Enterprise Development LP
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> # Copyright Notice:
>
> @@ -63,15 +63,7 @@ class RfSystemObj(RfResource):
> self.components[item] = RfBootOptionCollection(base_path,
> os.path.join(rel_path, item), parent=self)
>
>
>
> def patch_resource(self, patch_data):
>
> -# first verify client didn't send us a property we cant patch
>
> -for key in patch_data.keys():
>
> -if key != "AssetTag" and key != "IndicatorLED" and key != "Boot"
> and
> key != "BiosVersion":
>
> -return 4, 400, "Invalid Patch Property Sent", ""
>
> -elif key == "Boot":
>
> -for prop2 in patch_data["Boot"].keys():
>
> -if prop2 != "BootSourceOverrideEnabled" and prop2 !=
> "BootSourceOverrideTarget" and prop2 != "BootNext" and prop2 !=
> "BootOrder":
>
> -return 4, 400, "Invalid Patch Property Sent", ""
>
> -# now patch the valid properties sent
>
> +# patch the valid properties sent
>
> if "AssetTag" in patch_data:
>
> print("assetTag:{}".format(patch_data["AssetTag"]))
>
> self.res_data['AssetTag'] = patch_data['AssetTag']
>
> @@ -100,7 +92,7 @@ class RfSystemObj(RfResource):
> if "BootOrder" in boot_data:
>
> self.res_data['Boot']['BootOrder'] = boot_data['BootOrder']
>
>
>
> -resp = flask.Response(json.dumps(self.res_data,indent=4))
>
> +resp = flask.Response(jso
Re: [edk2-devel] [edk2-staging][PATCH v2 2/5] edk2-staging/RedfishClientPkg: Update computer system schema version
Reviewed-by: Abner Chang
> -Original Message-
> From: Wang, Nickle (Server BIOS)
> Sent: Tuesday, June 21, 2022 9:46 AM
> To: devel@edk2.groups.io
> Cc: Wang, Nickle (Server BIOS) ; Chang, Abner (HPS
> SW/FW Technologist) ; Yang Atom
> ; Nick Ramirez
> Subject: [edk2-staging][PATCH v2 2/5] edk2-staging/RedfishClientPkg: Update
> computer system schema version
>
> Update mock-up file and use computer system schema version 1.5.0 in
> order to support Boot.BootOrder attribute.
> Update UUID of 2M220101SL for working with Redfish Profile Simulator.
>
> Signed-off-by: Nickle Wang
> Cc: Abner Chang
> Cc: Yang Atom
> Cc: Nick Ramirez
> ---
> .../redfish/v1/Systems/2M220100SL/index.json | 2 +-
> .../redfish/v1/Systems/2M220101SL/index.json | 4 ++--
> .../redfish/v1/Systems/2M220102SL/index.json | 2 +-
> 3 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/RedfishClientPkg/Tools/Redfish-Profile-
> Simulator/MockupData/SimpleOcpServerV1/redfish/v1/Systems/2M220100SL/in
> dex.json b/RedfishClientPkg/Tools/Redfish-Profile-
> Simulator/MockupData/SimpleOcpServerV1/redfish/v1/Systems/2M220100SL/in
> dex.json
> index dbba691302..090fd2ed36 100644
> --- a/RedfishClientPkg/Tools/Redfish-Profile-
> Simulator/MockupData/SimpleOcpServerV1/redfish/v1/Systems/2M220100SL/in
> dex.json
> +++ b/RedfishClientPkg/Tools/Redfish-Profile-
> Simulator/MockupData/SimpleOcpServerV1/redfish/v1/Systems/2M220100SL/in
> dex.json
> @@ -1,5 +1,5 @@
> {
>
> -"@odata.type": "#ComputerSystem.v1_1_0.ComputerSystem",
>
> +"@odata.type": "#ComputerSystem.v1_5_0.ComputerSystem",
>
> "Id": "2M220100SL",
>
> "Name": "Catfish System",
>
> "SystemType": "Physical",
>
> diff --git a/RedfishClientPkg/Tools/Redfish-Profile-
> Simulator/MockupData/SimpleOcpServerV1/redfish/v1/Systems/2M220101SL/in
> dex.json b/RedfishClientPkg/Tools/Redfish-Profile-
> Simulator/MockupData/SimpleOcpServerV1/redfish/v1/Systems/2M220101SL/in
> dex.json
> index 3147cb8827..bc082d3190 100644
> --- a/RedfishClientPkg/Tools/Redfish-Profile-
> Simulator/MockupData/SimpleOcpServerV1/redfish/v1/Systems/2M220101SL/in
> dex.json
> +++ b/RedfishClientPkg/Tools/Redfish-Profile-
> Simulator/MockupData/SimpleOcpServerV1/redfish/v1/Systems/2M220101SL/in
> dex.json
> @@ -1,5 +1,5 @@
> {
>
> -"@odata.type": "#ComputerSystem.v1_1_0.ComputerSystem",
>
> +"@odata.type": "#ComputerSystem.v1_5_0.ComputerSystem",
>
> "Id": "2M220101SL",
>
> "Name": "Catfish System",
>
> "SystemType": "Physical",
>
> @@ -10,7 +10,7 @@
> "SKU": "",
>
> "PartNumber": "",
>
> "Description": "Catfish Implementation Recipe of simple scale-out
> monolithic
> server",
>
> -"UUID": "BADFACED-DEAD-BEEF-1313-131313131313",
>
> +"UUID": "25EF0280-EC82-42B0-8FB6-10ADCCC67C02",
>
> "HostName": "catfishHostname",
>
> "PowerState": "On",
>
> "BiosVersion": "X00.1.2.3.4(build-23)",
>
> diff --git a/RedfishClientPkg/Tools/Redfish-Profile-
> Simulator/MockupData/SimpleOcpServerV1/redfish/v1/Systems/2M220102SL/in
> dex.json b/RedfishClientPkg/Tools/Redfish-Profile-
> Simulator/MockupData/SimpleOcpServerV1/redfish/v1/Systems/2M220102SL/in
> dex.json
> index 49b2d25f53..d9aa7bb1e1 100644
> --- a/RedfishClientPkg/Tools/Redfish-Profile-
> Simulator/MockupData/SimpleOcpServerV1/redfish/v1/Systems/2M220102SL/in
> dex.json
> +++ b/RedfishClientPkg/Tools/Redfish-Profile-
> Simulator/MockupData/SimpleOcpServerV1/redfish/v1/Systems/2M220102SL/in
> dex.json
> @@ -1,5 +1,5 @@
> {
>
> -"@odata.type": "#ComputerSystem.v1_1_0.ComputerSystem",
>
> +"@odata.type": "#ComputerSystem.v1_5_0.ComputerSystem",
>
> "Id": "2M220102SL",
>
> "Name": "Catfish System",
>
> "SystemType": "Physical",
>
> --
> 2.32.0.windows.2
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Re: [edk2-devel] [edk2-staging][PATCH v2 1/5] edk2-staging/RedfishClientPkg: Update requirements.txt
Reviewed-by: Abner Chang > -Original Message- > From: Wang, Nickle (Server BIOS) > Sent: Tuesday, June 21, 2022 9:45 AM > To: devel@edk2.groups.io > Cc: Wang, Nickle (Server BIOS) ; Chang, Abner (HPS > SW/FW Technologist) ; Yang Atom > ; Nick Ramirez > Subject: [edk2-staging][PATCH v2 1/5] edk2-staging/RedfishClientPkg: Update > requirements.txt > > Updates the Python module dependency for Redfish Profile Simulator. > > Signed-off-by: Nickle Wang > Cc: Abner Chang > Cc: Yang Atom > Cc: Nick Ramirez > --- > .../Tools/Redfish-Profile-Simulator/requirements.txt | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/requirements.txt > b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/requirements.txt > index 88807d87c2..359a814461 100644 > --- a/RedfishClientPkg/Tools/Redfish-Profile-Simulator/requirements.txt > +++ b/RedfishClientPkg/Tools/Redfish-Profile-Simulator/requirements.txt > @@ -1,2 +1,5 @@ > +Werkzeug==0.16 > > +Jinja2==3.0.3 > > +itsdangerous==2.0.1 > > flask==1.1.1 > > pyOpenSSL > > -- > 2.32.0.windows.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#90644): https://edk2.groups.io/g/devel/message/90644 Mute This Topic: https://groups.io/mt/91891733/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v6 1/6] MdeModulePkg/PciHostBridge: io range is not mandatory
Reviewed-by: Abner Chang
> -Original Message-
> From: Gerd Hoffmann
> Sent: Monday, April 25, 2022 6:35 PM
> To: devel@edk2.groups.io
> Cc: Jiewen Yao ; Oliver Steffen
> ; Leif Lindholm ; Pawel
> Polawski ; Hao A Wu ; Chang,
> Abner (HPS SW/FW Technologist) ; Liming Gao
> ; Ray Ni ; Jordan Justen
> ; Jian J Wang ; Ard
> Biesheuvel ; Gerd Hoffmann
> ; Ard Biesheuvel
> Subject: [PATCH v6 1/6] MdeModulePkg/PciHostBridge: io range is not
> mandatory
>
> io range is not mandatory according to pcie spec,
> so allow bridge configurations without io address
> space assigned.
>
> Signed-off-by: Gerd Hoffmann
> Reviewed-by: Ard Biesheuvel
> ---
> MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
> b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
> index b20bcd310ad5..712662707931 100644
> --- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
> +++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
> @@ -1085,6 +1085,9 @@ NotifyPhase (
>RootBridge->ResAllocNode[Index].Base = BaseAddress;
>RootBridge->ResAllocNode[Index].Status = ResAllocated;
>DEBUG ((DEBUG_INFO, "Success\n"));
> +} else if ((Index == TypeIo) && (RootBridge->Io.Base ==
> MAX_UINT64)) {
> + /* optional on PCIe */
> + DEBUG ((DEBUG_INFO, "PCI Root Bridge does not provide IO
> Resources.\n"));
> } else {
>ReturnStatus = EFI_OUT_OF_RESOURCES;
>DEBUG ((DEBUG_ERROR, "Out Of Resource!\n"));
> --
> 2.35.1
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-=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-staging][PATCH v2 2/3] edk2-staging/RedfishClientPkg: Introduce Redfish version library
Reviewed-by: Abner Chang > -Original Message- > From: Wang, Nickle (Server BIOS) > Sent: Wednesday, May 25, 2022 11:14 AM > To: devel@edk2.groups.io > Cc: Wang, Nickle (Server BIOS) ; Chang, Abner (HPS > SW/FW Technologist) > Subject: [edk2-staging][PATCH v2 2/3] edk2-staging/RedfishClientPkg: > Introduce Redfish version library > > Add RedfishVersionLib to Redfish client package. This library provides > interface for Redfish feature drivers to get Redfish version on BMC. > > Signed-off-by: Nickle Wang > Cc: Abner Chang > --- > .../Include/Library/RedfishVersionLib.h | 30 +++ > RedfishClientPkg/Include/RedfishBase.h| 16 ++ > .../RedfishVersionLib/RedfishVersionLib.c | 211 ++ > .../RedfishVersionLib/RedfishVersionLib.inf | 44 > RedfishClientPkg/RedfishClientLibs.dsc.inc| 1 + > RedfishClientPkg/RedfishClientPkg.dec | 4 +- > 6 files changed, 305 insertions(+), 1 deletion(-) > create mode 100644 RedfishClientPkg/Include/Library/RedfishVersionLib.h > create mode 100644 RedfishClientPkg/Include/RedfishBase.h > create mode 100644 > RedfishClientPkg/Library/RedfishVersionLib/RedfishVersionLib.c > create mode 100644 > RedfishClientPkg/Library/RedfishVersionLib/RedfishVersionLib.inf > > diff --git a/RedfishClientPkg/Include/Library/RedfishVersionLib.h > b/RedfishClientPkg/Include/Library/RedfishVersionLib.h > new file mode 100644 > index 00..5076c2ce9f > --- /dev/null > +++ b/RedfishClientPkg/Include/Library/RedfishVersionLib.h > @@ -0,0 +1,30 @@ > +/** @file > > + This file defines the Redfish version library interface. > > + > > + (C) Copyright 2022 Hewlett Packard Enterprise Development LP > > + > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > + > > +**/ > > + > > +#ifndef REDFISH_VERSION_LIB_H_ > > +#define REDFISH_VERSION_LIB_H_ > > + > > +/** > > + Query HTTP request to BMC with given redfish service and return redfish > > + version information. If there is troulbe to get Redfish version on BMC, > > + The value of PcdDefaultRedfishVersion is returned. > > + > > + It's call responsibility to release returned buffer. > > + > > + @param[in] Service Redfish service instance > > + > > + @retval EFI_STRING Redfish version string. NULL while error occurs. > > + > > +**/ > > +EFI_STRING > > +RedfishGetVersion ( > > + IN REDFISH_SERVICE *Service > > + ); > > + > > +#endif > > diff --git a/RedfishClientPkg/Include/RedfishBase.h > b/RedfishClientPkg/Include/RedfishBase.h > new file mode 100644 > index 00..60d585c54a > --- /dev/null > +++ b/RedfishClientPkg/Include/RedfishBase.h > @@ -0,0 +1,16 @@ > +/** @file > > + Redfish base header file. > > + > > + (C) Copyright 2022 Hewlett Packard Enterprise Development LP > > + > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > + > > +**/ > > + > > +#ifndef EFI_REDFISH_BASE_H_ > > +#define EFI_REDFISH_BASE_H_ > > + > > +#define IS_EMPTY_STRING(a)((a) == NULL || (a)[0] == '\0') > > +#define REDFISH_DEBUG_TRACE DEBUG_VERBOSE > > + > > +#endif > > diff --git a/RedfishClientPkg/Library/RedfishVersionLib/RedfishVersionLib.c > b/RedfishClientPkg/Library/RedfishVersionLib/RedfishVersionLib.c > new file mode 100644 > index 00..0fe2dd1bd0 > --- /dev/null > +++ b/RedfishClientPkg/Library/RedfishVersionLib/RedfishVersionLib.c > @@ -0,0 +1,211 @@ > +/** @file > > + Redfish version library implementation > > + > > + (C) Copyright 2022 Hewlett Packard Enterprise Development LP > > + > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > + > > +**/ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +#define REDFISH_VERSION_DEFAULT_STRING L"v1" > > +#define REDFISH_ROOT_URI "/redfish" > > + > > +REDFISH_SERVICE *mCacheService; > > +EFI_STRING mVersionCache; > > +UINTN mVersionStringSize; > > + > > +/** > > + Cache the redfish service version for later use so we don't have to query > > + HTTP request everytime. > > + > > + @param[in] Service Redfish service instance > > + @param[in] Version Version string to cache > > + > > + @retval EFI_SUCCESS Version is saved in cache successfully. > >
Re: [edk2-devel] [edk2-staging][PATCH v2 1/3] edk2-staging/RedfishClientPkg: Introduce Redfish event library
Reviewed-by: Abner Chang
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Nickle
> Wang
> Sent: Wednesday, May 25, 2022 11:14 AM
> To: devel@edk2.groups.io
> Cc: Wang, Nickle (Server BIOS) ; Chang, Abner (HPS
> SW/FW Technologist)
> Subject: [edk2-devel] [edk2-staging][PATCH v2 1/3] edk2-
> staging/RedfishClientPkg: Introduce Redfish event library
>
> Add RedfishEventLib to Redfish client package. This library provides
> interface for Redfish feature drivers to listen to Redfish event
> such as the event before provisioning and the event after
> provisioning. Feature driver can perform additional operation before
> and after Redfish provisioning.
>
> Signed-off-by: Nickle Wang
> Cc: Abner Chang
> ---
> .../Include/Guid/RedfishClientEventGroup.h| 27
> .../Include/Library/RedfishEventLib.h | 77 ++
> .../Library/RedfishEventLib/RedfishEventLib.c | 139 ++
> .../RedfishEventLib/RedfishEventLib.inf | 38 +
> RedfishClientPkg/RedfishClientLibs.dsc.inc| 2 +-
> RedfishClientPkg/RedfishClientPkg.dec | 7 +-
> 6 files changed, 288 insertions(+), 2 deletions(-)
> create mode 100644
> RedfishClientPkg/Include/Guid/RedfishClientEventGroup.h
> create mode 100644 RedfishClientPkg/Include/Library/RedfishEventLib.h
> create mode 100644
> RedfishClientPkg/Library/RedfishEventLib/RedfishEventLib.c
> create mode 100644
> RedfishClientPkg/Library/RedfishEventLib/RedfishEventLib.inf
>
> diff --git a/RedfishClientPkg/Include/Guid/RedfishClientEventGroup.h
> b/RedfishClientPkg/Include/Guid/RedfishClientEventGroup.h
> new file mode 100644
> index 00..0d88dd4726
> --- /dev/null
> +++ b/RedfishClientPkg/Include/Guid/RedfishClientEventGroup.h
> @@ -0,0 +1,27 @@
> +/** @file
> + GUID for Redfish Client Event Group GUID
> +
> + (C) Copyright 2022 Hewlett Packard Enterprise Development LP
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef REDFISH_CLIENT_EVENT_GROUP_GUID_H_
> +#define REDFISH_CLIENT_EVENT_GROUP_GUID_H_
> +
> +#define REDFISH_CLIENT_FEATURE_READY_TO_PROVISIONING_GUID \
> + { \
> +0x77E4FC1C, 0x2428, 0x47EE, { 0x9E, 0xEC, 0x8B, 0x77, 0xEF, 0x9D, 0x4E,
> 0xF0 } \
> + }
> +
> +extern EFI_GUID gEfiRedfishClientFeatureReadyToProvisioningGuid;
> +
> +#define REDFISH_CLIENT_FEATURE_AFTER_PROVISIONING_GUID \
> + { \
> +0xE547CB6F, 0x306F, 0x4226, { 0xAB, 0x70, 0xA0, 0x6E, 0x26, 0xF1, 0x2E,
> 0xD0 } \
> + }
> +
> +extern EFI_GUID gEfiRedfishClientFeatureAfterProvisioningGuid;
> +
> +#endif
> diff --git a/RedfishClientPkg/Include/Library/RedfishEventLib.h
> b/RedfishClientPkg/Include/Library/RedfishEventLib.h
> new file mode 100644
> index 00..9b553f4425
> --- /dev/null
> +++ b/RedfishClientPkg/Include/Library/RedfishEventLib.h
> @@ -0,0 +1,77 @@
> +/** @file
> + This file defines the Redfish event library interface.
> +
> + (C) Copyright 2022 Hewlett Packard Enterprise Development LP
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef REDFISH_EVENT_LIB_H_
> +#define REDFISH_EVENT_LIB_H_
> +
> +#include
> +
> +/**
> + Create an EFI event before Redfish provisioning start.
> +
> + @param NotifyFunctionThe notification function to call when
> the
> event is signaled.
> + @param NotifyContext The content to pass to NotifyFunction
> when
> the event is signaled.
> + @param ReadyToProvisioningEvent Returns the EFI event returned from
> gBS->CreateEvent(Ex).
> +
> + @retval EFI_SUCCESS Event was created.
> + @retval Other Event was not created.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +CreateReadyToProvisioningEvent (
> + IN EFI_EVENT_NOTIFY NotifyFunction, OPTIONAL
> + IN VOID *NotifyContext, OPTIONAL
> + OUT EFI_EVENT *ReadyToProvisioningEvent
> + );
> +
> +/**
> + Create an EFI event after Redfish provisioning finished.
> +
> + @param NotifyFunctionThe notification function to call when
> the
> event is signaled.
> + @param NotifyContext The content to pass to NotifyFunction
> when
> the event is signaled.
> + @param ReadyToProvisioningEvent Returns the EFI event returned from
> gBS->CreateEvent(Ex).
> +
> + @retval EFI_SUCCESS Event was created.
> + @retval Other Event was not created.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +CreateAfterProvisioningEvent (
> + IN EFI_EVENT_NOTIFY NotifyFunction, OPTIONAL
> + IN VOID *NotifyContext, OPTIONAL
> + OUT EFI_EVENT *ReadyToPro
Re: [edk2-devel] [edk2-staging][PATCH] edk2-staging/RedfishClientPkg: Introduce Redfish version library
> -Original Message- > From: Wang, Nickle (Server BIOS) > Sent: Tuesday, May 17, 2022 11:59 AM > To: devel@edk2.groups.io > Cc: Wang, Nickle (Server BIOS) ; Chang, Abner (HPS > SW/FW Technologist) > Subject: [edk2-staging][PATCH] edk2-staging/RedfishClientPkg: Introduce > Redfish version library > > Add RedfishVersionLib to Redfish client package. This library provides > interface for Redfish feature drivers to get Redfish version on BMC. > > Signed-off-by: Nickle Wang > Cc: Abner Chang > --- > .../Include/Library/RedfishVersionLib.h | 30 +++ > RedfishClientPkg/Include/RedfishBase.h| 16 ++ > .../RedfishVersionLib/RedfishVersionLib.c | 203 ++ > .../RedfishVersionLib/RedfishVersionLib.inf | 44 > RedfishClientPkg/RedfishClientLibs.dsc.inc| 2 +- > RedfishClientPkg/RedfishClientPkg.dec | 6 +- > 6 files changed, 298 insertions(+), 3 deletions(-) > create mode 100644 RedfishClientPkg/Include/Library/RedfishVersionLib.h > create mode 100644 RedfishClientPkg/Include/RedfishBase.h > create mode 100644 > RedfishClientPkg/Library/RedfishVersionLib/RedfishVersionLib.c > create mode 100644 > RedfishClientPkg/Library/RedfishVersionLib/RedfishVersionLib.inf > > diff --git a/RedfishClientPkg/Include/Library/RedfishVersionLib.h > b/RedfishClientPkg/Include/Library/RedfishVersionLib.h > new file mode 100644 > index 00..5076c2ce9f > --- /dev/null > +++ b/RedfishClientPkg/Include/Library/RedfishVersionLib.h > @@ -0,0 +1,30 @@ > +/** @file > > + This file defines the Redfish version library interface. > > + > > + (C) Copyright 2022 Hewlett Packard Enterprise Development LP > > + > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > + > > +**/ > > + > > +#ifndef REDFISH_VERSION_LIB_H_ > > +#define REDFISH_VERSION_LIB_H_ > > + > > +/** > > + Query HTTP request to BMC with given redfish service and return redfish > > + version information. If there is troulbe to get Redfish version on BMC, > > + The value of PcdDefaultRedfishVersion is returned. > > + > > + It's call responsibility to release returned buffer. It's caller's responsibility to release the returned buffer. > > + > > + @param[in] Service Redfish service instance > > + > > + @retval EFI_STRING Redfish version string. NULL while error occurs. > > + > > +**/ > > +EFI_STRING > > +RedfishGetVersion ( > > + IN REDFISH_SERVICE *Service > > + ); > > + > > +#endif > > diff --git a/RedfishClientPkg/Include/RedfishBase.h > b/RedfishClientPkg/Include/RedfishBase.h > new file mode 100644 > index 00..60d585c54a > --- /dev/null > +++ b/RedfishClientPkg/Include/RedfishBase.h > @@ -0,0 +1,16 @@ > +/** @file > > + Redfish base header file. > > + > > + (C) Copyright 2022 Hewlett Packard Enterprise Development LP > > + > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > + > > +**/ > > + > > +#ifndef EFI_REDFISH_BASE_H_ > > +#define EFI_REDFISH_BASE_H_ > > + > > +#define IS_EMPTY_STRING(a)((a) == NULL || (a)[0] == '\0') > > +#define REDFISH_DEBUG_TRACE DEBUG_VERBOSE > > + > > +#endif > > diff --git a/RedfishClientPkg/Library/RedfishVersionLib/RedfishVersionLib.c > b/RedfishClientPkg/Library/RedfishVersionLib/RedfishVersionLib.c > new file mode 100644 > index 00..0a2ace7726 > --- /dev/null > +++ b/RedfishClientPkg/Library/RedfishVersionLib/RedfishVersionLib.c > @@ -0,0 +1,203 @@ > +/** @file > > + Redfish version library implementation > > + > > + (C) Copyright 2022 Hewlett Packard Enterprise Development LP > > + > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > + > > +**/ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +#define REDFISH_VERSION_DEFAULT_STRING L"v1" > > +#define REDFISH_ROOT_URI "/redfish" > > + > > +REDFISH_SERVICE *mCacheService; > > +EFI_STRING mVersionCache; > > +UINTN mVersionStringSize; > > + > > +/** > > + Cache the redfish service version for later use so we don't have to query > > + HTTP request everytime. > > + > > + @param[in] Service Redfish service instance > > + @param[in] Version Version string to cache > > + > > + @retval EFI_SUCCESS Version is save
Re: [edk2-devel] [edk2-staging][PATCH] edk2-staging/RedfishClientPkg: Introduce Redfish event library
Few minor issues.
> -Original Message-
> From: Wang, Nickle (Server BIOS)
> Sent: Tuesday, May 17, 2022 10:40 AM
> To: devel@edk2.groups.io
> Cc: Wang, Nickle (Server BIOS) ; Chang, Abner (HPS
> SW/FW Technologist)
> Subject: [edk2-staging][PATCH] edk2-staging/RedfishClientPkg: Introduce
> Redfish event library
>
> Add RedfishEventLib to Redfish client package. This library provides
> interface for Redfish feature drivers to listen to Redfish event
> such as the event before provisioning and the event after
> provisioning. Feature driver can perform additional operation before
> and after Redfish provisioning.
>
> Signed-off-by: Nickle Wang
> Cc: Abner Chang
> ---
> .../Include/Guid/RedfishClientEventGroup.h| 27
> .../Include/Library/RedfishEventLib.h | 77 ++
> .../Library/RedfishEventLib/RedfishEventLib.c | 139 ++
> .../RedfishEventLib/RedfishEventLib.inf | 38 +
> RedfishClientPkg/RedfishClientLibs.dsc.inc| 2 +-
> RedfishClientPkg/RedfishClientPkg.dec | 7 +-
> 6 files changed, 288 insertions(+), 2 deletions(-)
> create mode 100644
> RedfishClientPkg/Include/Guid/RedfishClientEventGroup.h
> create mode 100644 RedfishClientPkg/Include/Library/RedfishEventLib.h
> create mode 100644
> RedfishClientPkg/Library/RedfishEventLib/RedfishEventLib.c
> create mode 100644
> RedfishClientPkg/Library/RedfishEventLib/RedfishEventLib.inf
>
> diff --git a/RedfishClientPkg/Include/Guid/RedfishClientEventGroup.h
> b/RedfishClientPkg/Include/Guid/RedfishClientEventGroup.h
> new file mode 100644
> index 00..0d88dd4726
> --- /dev/null
> +++ b/RedfishClientPkg/Include/Guid/RedfishClientEventGroup.h
> @@ -0,0 +1,27 @@
> +/** @file
>
> + GUID for Redfish Client Event Group GUID
>
> +
>
> + (C) Copyright 2022 Hewlett Packard Enterprise Development LP
>
> +
>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +
>
> +**/
>
> +
>
> +#ifndef REDFISH_CLIENT_EVENT_GROUP_GUID_H_
>
> +#define REDFISH_CLIENT_EVENT_GROUP_GUID_H_
>
> +
>
> +#define REDFISH_CLIENT_FEATURE_READY_TO_PROVISIONING_GUID \
>
> + { \
>
> +0x77E4FC1C, 0x2428, 0x47EE, { 0x9E, 0xEC, 0x8B, 0x77, 0xEF, 0x9D, 0x4E,
> 0xF0 } \
>
> + }
>
> +
>
> +extern EFI_GUID gEfiRedfishClientFeatureReadyToProvisioningGuid;
>
> +
>
> +#define REDFISH_CLIENT_FEATURE_AFTER_PROVISIONING_GUID \
>
> + { \
>
> +0xE547CB6F, 0x306F, 0x4226, { 0xAB, 0x70, 0xA0, 0x6E, 0x26, 0xF1, 0x2E,
> 0xD0 } \
>
> + }
>
> +
>
> +extern EFI_GUID gEfiRedfishClientFeatureAfterProvisioningGuid;
>
> +
>
> +#endif
>
> diff --git a/RedfishClientPkg/Include/Library/RedfishEventLib.h
> b/RedfishClientPkg/Include/Library/RedfishEventLib.h
> new file mode 100644
> index 00..1f3d0acf19
> --- /dev/null
> +++ b/RedfishClientPkg/Include/Library/RedfishEventLib.h
> @@ -0,0 +1,77 @@
> +/** @file
>
> + This file defines the Redfish event library interface.
>
> +
>
> + (C) Copyright 2022 Hewlett Packard Enterprise Development LP
>
> +
>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +
>
> +**/
>
> +
>
> +#ifndef REDFISH_EVENT_LIB_H_
>
> +#define REDFISH_EVENT_LIB_H_
>
> +
>
> +#include
>
> +
>
> +/**
>
> + Create an EFI event before Redfish provisioning start.
>
> +
>
> + @param NotifyFunctionThe notification function to call when
> the
> event is signaled.
>
> + @param NotifyContext The content to pass to NotifyFunction
> when
> the event is signaled.
>
> + @param ReadyToProvisioningEvent Returns the EFI event returned from
> gBS->CreateEvent(Ex).
>
> +
>
> + @retval EFI_SUCCESS Event was created.
>
> + @retval Other Event was not created.
>
> +
>
> +**/
>
> +EFI_STATUS
>
> +EFIAPI
>
> +CreateReadyToProvisioningEvent (
>
> + IN EFI_EVENT_NOTIFY NotifyFunction, OPTIONAL
>
> + IN VOID *NotifyContext, OPTIONAL
>
> + OUT EFI_EVENT *ReadyToProvisioningEvent
>
> + );
>
> +
>
> +/**
>
> + Create an EFI event after Redfish provisioning finished.
>
> +
>
> + @param NotifyFunctionThe notification function to call when
> the
> event is signaled.
>
> + @param NotifyContext The content to pass to NotifyFunction
> when
> the event is signaled.
>
> + @param ReadyToProvisioningEvent Returns the EFI event returned from
> gBS->CreateEvent(Ex).
>
> +
&g
Re: [edk2-devel] [PATCH 2/2] ShellPkg/SmbiosView: Print BIOS extension size
Hi Roger,
There is an update for SMBIOS type 0 at commit ID fdfbf1fd-a85ae8d9. Please
rebase the changes to edk2 master branch and send out the patch V2.
Thanks
Abner
From: Hsu, Roger (HPE ISS SW)
Sent: Friday, April 22, 2022 2:55 PM
To: devel@edk2.groups.io
Cc: Ray Ni ; Zhichao Gao ; Chang,
Abner (HPS SW/FW Technologist)
Subject: [PATCH 2/2] ShellPkg/SmbiosView: Print BIOS extension size
Update for printing BIOS extension size information.
Signed-off-by: Roger Hsu
Cc: Ray Ni
Cc: Zhichao Gao
Cc: Abner Chang
---
.../SmbiosView/PrintInfo.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c
b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c
index b144600a25..ee0dbc19be 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c
@@ -3,7 +3,7 @@
Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.
(C) Copyright 2014 Hewlett-Packard Development Company, L.P.
- (C) Copyright 2015-2019 Hewlett Packard Enterprise Development LP
+ (C) Copyright 2015-2022 Hewlett Packard Enterprise Development LP
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -338,7 +338,15 @@ SmbiosPrintStructure (
PRINT_PENDING_STRING (Struct, Type0, BiosVersion);
PRINT_STRUCT_VALUE_H (Struct, Type0, BiosSegment);
PRINT_PENDING_STRING (Struct, Type0, BiosReleaseDate);
- ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN
(STR_SMBIOSVIEW_PRINTINFO_BIOS_SIZE), gShellDebug1HiiHandle, 64 *
(Struct->Type0->BiosSize + 1));
+ if (Struct->Type0->BiosSize == EXCEED_BIOS_ROM_SIZE) {
+if (Struct->Type0->ExtendedBiosSize.Unit ==
BIOS_ROM_SIZE_IN_MEGABYTES) {
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN
(STR_SMBIOSVIEW_PRINTINFO_BIOS_SIZE), gShellDebug1HiiHandle,
(BYTES_IN_MEGABYTES * (Struct->Type0->ExtendedBiosSize.Size)) /
BYTES_IN_KILOBYTES);
+} else if (Struct->Type0->ExtendedBiosSize.Unit ==
BIOS_ROM_SIZE_IN_GIGABYTES) {
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN
(STR_SMBIOSVIEW_PRINTINFO_BIOS_SIZE), gShellDebug1HiiHandle,
(BYTES_IN_GIGABYTES *(Struct->Type0->ExtendedBiosSize.Size)) /
BYTES_IN_KILOBYTES);
+}
+ } else {
+ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN
(STR_SMBIOSVIEW_PRINTINFO_BIOS_SIZE), gShellDebug1HiiHandle, 64 *
(Struct->Type0->BiosSize + 1));
+ }
DisplayBiosCharacteristics (ReadUnaligned64 ((UINT64
*)(UINTN)&(Struct->Type0->BiosCharacteristics)), Option);
--
2.28.0.windows.1
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Re: [edk2-devel] [PATCH v6 2/6] OvmfPkg/FdtPciHostBridgeLib: io range is not mandatory
Thanks.
Reviewed-by: Abner Chang
> -Original Message-
> From: Gerd Hoffmann
> Sent: Monday, April 25, 2022 6:35 PM
> To: devel@edk2.groups.io
> Cc: Jiewen Yao ; Oliver Steffen
> ; Leif Lindholm ; Pawel
> Polawski ; Hao A Wu ;
> Chang, Abner (HPS SW/FW Technologist) ; Liming
> Gao ; Ray Ni ; Jordan Justen
> ; Jian J Wang ; Ard
> Biesheuvel ; Gerd Hoffmann
>
> Subject: [PATCH v6 2/6] OvmfPkg/FdtPciHostBridgeLib: io range is not
> mandatory
>
> io range is not mandatory according to pcie spec,
> so allow host bridges without io address space.
>
> Signed-off-by: Gerd Hoffmann
> ---
> .../FdtPciHostBridgeLib/FdtPciHostBridgeLib.c | 45 ++-
> 1 file changed, 23 insertions(+), 22 deletions(-)
>
> diff --git a/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
> b/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
> index 98828e0b262b..14b41a533e96 100644
> --- a/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
> +++ b/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
> @@ -292,13 +292,8 @@ ProcessPciHost (
> }
>}
>
> - if ((*IoSize == 0) || (*Mmio32Size == 0)) {
> -DEBUG ((
> - DEBUG_ERROR,
> - "%a: %a space empty\n",
> - __FUNCTION__,
> - (*IoSize == 0) ? "IO" : "MMIO32"
> - ));
> + if (*Mmio32Size == 0) {
> +DEBUG ((DEBUG_ERROR, "%a: MMIO32 space empty\n",
> __FUNCTION__));
> return EFI_PROTOCOL_ERROR;
>}
>
> @@ -333,13 +328,15 @@ ProcessPciHost (
> return Status;
>}
>
> - //
> - // Map the MMIO window that provides I/O access - the PCI host bridge
> code
> - // is not aware of this translation and so it will only map the I/O view
> - // in the GCD I/O map.
> - //
> - Status = MapGcdMmioSpace (*IoBase + IoTranslation, *IoSize);
> - ASSERT_EFI_ERROR (Status);
> + if (*IoSize != 0) {
> +//
> +// Map the MMIO window that provides I/O access - the PCI host bridge
> code
> +// is not aware of this translation and so it will only map the I/O view
> +// in the GCD I/O map.
> +//
> +Status = MapGcdMmioSpace (*IoBase + IoTranslation, *IoSize);
> +ASSERT_EFI_ERROR (Status);
> + }
>
>return Status;
> }
> @@ -413,17 +410,21 @@ PciHostBridgeGetRootBridges (
>
>AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;
>
> - Io.Base = IoBase;
> - Io.Limit = IoBase + IoSize - 1;
> + if (IoSize != 0) {
> +Io.Base = IoBase;
> +Io.Limit = IoBase + IoSize - 1;
> + } else {
> +Io.Base = MAX_UINT64;
> +Io.Limit = 0;
> + }
> +
>Mem.Base = Mmio32Base;
>Mem.Limit = Mmio32Base + Mmio32Size - 1;
>
> - if (sizeof (UINTN) == sizeof (UINT64)) {
> -MemAbove4G.Base = Mmio64Base;
> -MemAbove4G.Limit = Mmio64Base + Mmio64Size - 1;
> -if (Mmio64Size > 0) {
> - AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
> -}
> + if ((sizeof (UINTN) == sizeof (UINT64)) && (Mmio64Size != 0)) {
> +MemAbove4G.Base = Mmio64Base;
> +MemAbove4G.Limit = Mmio64Base + Mmio64Size - 1;
> +AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
>} else {
> //
> // UEFI mandates a 1:1 virtual-to-physical mapping, so on a 32-bit
> --
> 2.35.1
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Re: [edk2-devel] [PATCH v5 2/6] OvmfPkg/FdtPciHostBridgeLib: io range is not mandatory
Gerd, I have some comments in line.
With those fixes,
Reviewed-by: Abner Chang
> -Original Message-
> From: Gerd Hoffmann
> Sent: Friday, April 22, 2022 3:37 PM
> To: devel@edk2.groups.io
> Cc: Pawel Polawski ; Ard Biesheuvel
> ; Liming Gao ;
> Hao A Wu ; Ray Ni ; Oliver Steffen
> ; Leif Lindholm ; Jordan
> Justen ; Jiewen Yao ;
> Gerd Hoffmann ; Chang, Abner (HPS SW/FW
> Technologist) ; Jian J Wang
>
> Subject: [PATCH v5 2/6] OvmfPkg/FdtPciHostBridgeLib: io range is not
> mandatory
>
> io range is not mandatory according to pcie spec,
> so allow host bridges without io address space.
>
> Signed-off-by: Gerd Hoffmann
> ---
> .../FdtPciHostBridgeLib/FdtPciHostBridgeLib.c | 45 ++-
> 1 file changed, 23 insertions(+), 22 deletions(-)
>
> diff --git a/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
> b/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
> index 98828e0b262b..823ea47c80a3 100644
> --- a/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
> +++ b/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
> @@ -292,13 +292,8 @@ ProcessPciHost (
> }
>}
>
> - if ((*IoSize == 0) || (*Mmio32Size == 0)) {
> -DEBUG ((
> - DEBUG_ERROR,
> - "%a: %a space empty\n",
> - __FUNCTION__,
> - (*IoSize == 0) ? "IO" : "MMIO32"
> - ));
> + if (*Mmio32Size == 0) {
> +DEBUG ((DEBUG_ERROR, "%a: MMIO32 space empty\n",
> __FUNCTION__));
> return EFI_PROTOCOL_ERROR;
>}
>
> @@ -333,13 +328,15 @@ ProcessPciHost (
> return Status;
>}
>
> - //
> - // Map the MMIO window that provides I/O access - the PCI host bridge
> code
> - // is not aware of this translation and so it will only map the I/O view
> - // in the GCD I/O map.
> - //
> - Status = MapGcdMmioSpace (*IoBase + IoTranslation, *IoSize);
> - ASSERT_EFI_ERROR (Status);
> + if (*IoSize) {
I think I missed this in the previous review.
According to coding standard, this line should be
if (*IoSize != 0)
> +//
> +// Map the MMIO window that provides I/O access - the PCI host bridge
> code
> +// is not aware of this translation and so it will only map the I/O view
> +// in the GCD I/O map.
> +//
> +Status = MapGcdMmioSpace (*IoBase + IoTranslation, *IoSize);
> +ASSERT_EFI_ERROR (Status);
> + }
>
>return Status;
> }
> @@ -413,17 +410,21 @@ PciHostBridgeGetRootBridges (
>
>AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;
>
> - Io.Base = IoBase;
> - Io.Limit = IoBase + IoSize - 1;
> + if (IoSize) {
Same here
> +Io.Base = IoBase;
> +Io.Limit = IoBase + IoSize - 1;
> + } else {
> +Io.Base = MAX_UINT64;
> +Io.Limit = 0;
> + }
> +
>Mem.Base = Mmio32Base;
>Mem.Limit = Mmio32Base + Mmio32Size - 1;
>
> - if (sizeof (UINTN) == sizeof (UINT64)) {
> -MemAbove4G.Base = Mmio64Base;
> -MemAbove4G.Limit = Mmio64Base + Mmio64Size - 1;
> -if (Mmio64Size > 0) {
> - AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
> -}
> + if ((sizeof (UINTN) == sizeof (UINT64)) && Mmio64Size) {
Same here for Mmio64Size.
Abner
> +MemAbove4G.Base = Mmio64Base;
> +MemAbove4G.Limit = Mmio64Base + Mmio64Size - 1;
> +AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
>} else {
> //
> // UEFI mandates a 1:1 virtual-to-physical mapping, so on a 32-bit
> --
> 2.35.1
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Re: [edk2-devel] [edk2-staging][PATCH] edk2-staging/RedfishClientPkg: Do not create attribute for NULL object
Merged!
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Abner
> Chang
> Sent: Thursday, April 21, 2022 12:57 PM
> To: devel@edk2.groups.io; Wang, Nickle (Server BIOS)
>
> Cc: Chang, Abner (HPS SW/FW Technologist)
> Subject: Re: [edk2-devel] [edk2-staging][PATCH] edk2-
> staging/RedfishClientPkg: Do not create attribute for NULL object
>
> I will merge it. Thanks
>
> Reviewed-by: Abner Chang
>
>
> > -Original Message-
> > From: devel@edk2.groups.io On Behalf Of Wang,
> > Nickle (Server BIOS)
> > Sent: Thursday, April 21, 2022 11:16 AM
> > To: devel@edk2.groups.io
> > Cc: Wang, Nickle (Server BIOS) ; Chang, Abner
> (HPS
> > SW/FW Technologist)
> > Subject: [edk2-devel] [edk2-staging][PATCH] edk2-
> staging/RedfishClientPkg:
> > Do not create attribute for NULL object
> >
> > While input object is NULL, do not generate attribute with empty string
> > value. This can reduce the size of HTTP context while sending "PATCH"
> > or "POST" request to Redfish service.
> >
> > Signed-off-by: Nickle Wang
> > Cc: Abner Chang
> > ---
> > RedfishClientPkg/ConverterLib/src/RedfishCsCommon.c | 5 ++---
> > 1 file changed, 2 insertions(+), 3 deletions(-)
> >
> > diff --git a/RedfishClientPkg/ConverterLib/src/RedfishCsCommon.c
> > b/RedfishClientPkg/ConverterLib/src/RedfishCsCommon.c
> > index 624314a8ec..02e4c50c5f 100644
> > --- a/RedfishClientPkg/ConverterLib/src/RedfishCsCommon.c
> > +++ b/RedfishClientPkg/ConverterLib/src/RedfishCsCommon.c
> > @@ -1,6 +1,6 @@
> > /** @file
> >
> > - (C) Copyright 2018-2021 Hewlett Packard Enterprise Development
> LP
> > + (C) Copyright 2018-2022 Hewlett Packard Enterprise Development
> LP
> >
> >SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> > @@ -795,7 +795,6 @@ RedfishCS_status GetRedfishPropertyVague (void
> > *Cs, json_t *JsonObj, char *Key,
> > RedfishCS_status InsertJsonStringObj (json_t *ParentJsonObj, char *Key,
> > RedfishCS_char *StringValue)
> > {
> >json_t *JsonValue;
> > - RedfishCS_char NullStr[] = "";
> >RedfishCS_char *InsertStr;
> >
> >InsertStr = StringValue;
> > @@ -803,7 +802,7 @@ RedfishCS_status InsertJsonStringObj (json_t
> > *ParentJsonObj, char *Key, RedfishC
> > return RedfishCS_status_invalid_parameter;
> >}
> >if (InsertStr == (char *)NULL) {
> > -InsertStr = NullStr;
> > +return RedfishCS_status_success;
> >}
> >JsonValue = json_string(InsertStr);
> >if (JsonValue == NULL) {
> > --
> > 2.32.0.windows.2
> >
> >
> >
> >
> >
>
>
>
>
>
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Re: [edk2-devel] [edk2-staging][PATCH] edk2-staging/RedfishClientPkg: Do not create attribute for NULL object
I will merge it. Thanks
Reviewed-by: Abner Chang
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Wang,
> Nickle (Server BIOS)
> Sent: Thursday, April 21, 2022 11:16 AM
> To: devel@edk2.groups.io
> Cc: Wang, Nickle (Server BIOS) ; Chang, Abner (HPS
> SW/FW Technologist)
> Subject: [edk2-devel] [edk2-staging][PATCH] edk2-staging/RedfishClientPkg:
> Do not create attribute for NULL object
>
> While input object is NULL, do not generate attribute with empty string
> value. This can reduce the size of HTTP context while sending "PATCH"
> or "POST" request to Redfish service.
>
> Signed-off-by: Nickle Wang
> Cc: Abner Chang
> ---
> RedfishClientPkg/ConverterLib/src/RedfishCsCommon.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/RedfishClientPkg/ConverterLib/src/RedfishCsCommon.c
> b/RedfishClientPkg/ConverterLib/src/RedfishCsCommon.c
> index 624314a8ec..02e4c50c5f 100644
> --- a/RedfishClientPkg/ConverterLib/src/RedfishCsCommon.c
> +++ b/RedfishClientPkg/ConverterLib/src/RedfishCsCommon.c
> @@ -1,6 +1,6 @@
> /** @file
>
> - (C) Copyright 2018-2021 Hewlett Packard Enterprise Development LP
> + (C) Copyright 2018-2022 Hewlett Packard Enterprise Development LP
>
>SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @@ -795,7 +795,6 @@ RedfishCS_status GetRedfishPropertyVague (void
> *Cs, json_t *JsonObj, char *Key,
> RedfishCS_status InsertJsonStringObj (json_t *ParentJsonObj, char *Key,
> RedfishCS_char *StringValue)
> {
>json_t *JsonValue;
> - RedfishCS_char NullStr[] = "";
>RedfishCS_char *InsertStr;
>
>InsertStr = StringValue;
> @@ -803,7 +802,7 @@ RedfishCS_status InsertJsonStringObj (json_t
> *ParentJsonObj, char *Key, RedfishC
> return RedfishCS_status_invalid_parameter;
>}
>if (InsertStr == (char *)NULL) {
> -InsertStr = NullStr;
> +return RedfishCS_status_success;
>}
>JsonValue = json_string(InsertStr);
>if (JsonValue == NULL) {
> --
> 2.32.0.windows.2
>
>
>
>
>
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Re: [edk2-devel] [edk2-platforms][PATCH v1 07/10] U5SeriesPkg: Add VariableFlashInfoLib
Reviewed-by: Abner Chang > -Original Message- > From: devel@edk2.groups.io On Behalf Of Michael > Kubacki > Sent: Thursday, April 21, 2022 4:44 AM > To: devel@edk2.groups.io > Cc: Chang, Abner (HPS SW/FW Technologist) ; > Gilbert Chen ; Schaefer, Daniel (ROM Janitor) > > Subject: [edk2-devel] [edk2-platforms][PATCH v1 07/10] U5SeriesPkg: Add > VariableFlashInfoLib > > From: Michael Kubacki > > REF:INVALID URI REMOVED. > cgi?id=3479__;!!NpxR!3PhEOFQSnwjCzmgG3JnYXRlZBh_ix2221KBb7AJK4fIG_ > PlogbyEkSE_3IJvCdQ$ > > Adds an instance for the library class VariableFlashInfoLib that > was recently introduced in MdeModulePkg. This change is made to > allow the new variable driver to build that has a dependency on > this library class and does not require any further platform > changes. > > Cc: Abner Chang > Cc: Gilbert Chen > Cc: Daniel Schaefer > Signed-off-by: Michael Kubacki > --- > Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc | 1 + > > Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc > | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc > b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc > index 318851332a7f..7b36b2c885e0 100644 > --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc > +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc > @@ -100,6 +100,7 @@ [LibraryClasses] >ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf > > UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBoo > tManagerLib.inf >FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf > + > VariableFlashInfoLib|MdeModulePkg/Library/BaseVariableFlashInfoLib/Base > VariableFlashInfoLib.inf > > VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/Va > riablePolicyHelperLib.inf > > # RISC-V Platform Library > diff --git > a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.d > sc > b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540. > dsc > index 98a6a69ca3ec..26895a75ec2f 100644 > --- > a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.d > sc > +++ > b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540. > dsc > @@ -100,6 +100,7 @@ [LibraryClasses] >ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf > > UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBoo > tManagerLib.inf >FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf > + > VariableFlashInfoLib|MdeModulePkg/Library/BaseVariableFlashInfoLib/Base > VariableFlashInfoLib.inf > > VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/Va > riablePolicyHelperLib.inf > > # RISC-V Platform Library > -- > 2.28.0.windows.1 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#89169): https://edk2.groups.io/g/devel/message/89169 Mute This Topic: https://groups.io/mt/90592926/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v4 6/8] EmulatorPkg: Add VariableFlashInfoLib
I am not the reviewer for the changes under EmulatorPkg other than Redfish stuff. However, I have no problem with the entire patch set, so does the change under for EmulatorPkg. Reviewed-by: Abner Chang > -Original Message- > From: devel@edk2.groups.io On Behalf Of Michael > Kubacki > Sent: Thursday, April 21, 2022 6:52 AM > To: devel@edk2.groups.io; Andrew Fish ; Ray Ni > ; Chang, Abner (HPS SW/FW Technologist) > ; Wang, Nickle (Server BIOS) > > Subject: Re: [edk2-devel] [PATCH v4 6/8] EmulatorPkg: Add > VariableFlashInfoLib > > Hi EmulatorPkg maintainers, > > This is the only package in the series that has not given a review yet. > Can you please help review it? > > Thanks, > Michael > > On 4/12/2022 12:29 PM, Michael Kubacki wrote: > > From: Michael Kubacki > > > > > REF:INVALID URI REMOVED. > cgi?id=3479__;!!NpxR!3XNUZ5NC9M4mSbD7tIR6y_88TLasCu1rZ5-dyKIh2qyl- > RQ7xt-gSz5UZ-tm4Zs$ > > > > Adds an instance of VariableFlashInfoLib to the platform build as > > it is a new library class introduced in MdeModulePkg. > > > > Cc: Andrew Fish > > Cc: Ray Ni > > Cc: Abner Chang > > Cc: Nickle Wang > > Signed-off-by: Michael Kubacki > > --- > > EmulatorPkg/EmulatorPkg.dsc | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/EmulatorPkg/EmulatorPkg.dsc b/EmulatorPkg/EmulatorPkg.dsc > > index 554c13ddb500..4cf886b9eac7 100644 > > --- a/EmulatorPkg/EmulatorPkg.dsc > > +++ b/EmulatorPkg/EmulatorPkg.dsc > > @@ -122,6 +122,7 @@ [LibraryClasses] > > VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf > > > VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLi > bRuntimeDxe.inf > > > VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/Va > riablePolicyHelperLib.inf > > + > VariableFlashInfoLib|MdeModulePkg/Library/BaseVariableFlashInfoLib/Base > VariableFlashInfoLib.inf > > SortLib|MdeModulePkg/Library/BaseSortLib/BaseSortLib.inf > > ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf > > FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#89168): https://edk2.groups.io/g/devel/message/89168 Mute This Topic: https://groups.io/mt/90595285/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v3 1/6] MdeModulePkg/PciHostBridge: io range is not mandatory
> -Original Message-
> From: Gerd Hoffmann
> Sent: Tuesday, April 19, 2022 9:15 PM
> To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist)
>
> Cc: Leif Lindholm ; Ard Biesheuvel
> ; Jordan Justen ;
> Jian J Wang ; Ray Ni ; Hao A Wu
> ; Jiewen Yao ; Liming Gao
> ; Pawel Polawski ;
> Oliver Steffen ; Ard Biesheuvel
> Subject: Re: [edk2-devel] [PATCH v3 1/6] MdeModulePkg/PciHostBridge: io
> range is not mandatory
>
> On Wed, Apr 13, 2022 at 01:44:55PM +, Abner Chang wrote:
> >
> >
> > > -Original Message-
> > > From: Gerd Hoffmann
> > > Sent: Wednesday, April 13, 2022 4:12 PM
> > > To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist)
> > >
> > > Cc: Leif Lindholm ; Ard Biesheuvel
> > > ; Jordan Justen
> ;
> > > Jian J Wang ; Ray Ni ; Hao A
> Wu
> > > ; Jiewen Yao ; Liming
> Gao
> > > ; Pawel Polawski ;
> > > Oliver Steffen ; Ard Biesheuvel
>
> > > Subject: Re: [edk2-devel] [PATCH v3 1/6] MdeModulePkg/PciHostBridge:
> io
> > > range is not mandatory
> > >
> > > Hi,
> > >
> > > > > diff --git
> a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
> > > > > b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
> > > > > index b20bcd310ad5..51a3b987967f 100644
> > > > > --- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
> > > > > +++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
> > > > > @@ -1085,6 +1085,9 @@ NotifyPhase (
> > > > >RootBridge->ResAllocNode[Index].Base = BaseAddress;
> > > > >RootBridge->ResAllocNode[Index].Status = ResAllocated;
> > > > >DEBUG ((DEBUG_INFO, "Success\n"));
> > > > > +} else if (Index == TypeIo) {
> > > > How do we tell the BaseAddress is set to UINT64 because
> "(BaseAddress <
> > > Limit)" or "gDS->AllocateMemorySpace()" returns error in
> AllocateResource()
> > > for TypeIo ?
> > >
> > > Does the reason matter?
> > >
> > > io resources are optional, so if there is no io address space available
> > > it should not be a fatal error, no matter what the root cause is.
> > If the device requires I/O resource however the io address space is not
> available, shouldn't this an error?
>
> How do you figure that?
>
> The PCIe spec requires devices being fully functional without io address
> space resources, so in theory this case should not exist. In practice
> things are not that simple unfortunately. But the pure presence of an
> io bar doesn't imply it is actually required.
>
> I think we can't do much about that at this point. An actual driver for
> the device which has more knowledge about the device would be in a
> better position to figure whenever not having io resources is a fatal
> error or not.
Ok.
>
> > > > Is "else if (Index == TypeIo && RootBridge->Io.Base == MAX_UINT64)"
> > > more reliable? Or I missed the code logic here?
> > >
> > > I think it is not needed, but if you think it is better that way I can
> > > change it.
> > This is more clear to reader. That means that we don't have to treat it as
> > an
> error on the TypeIo if the base address for it is MAX_UINT64.
>
> Ok, I'll change it.
Thanks
Abner
>
> take care,
> Gerd
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Re: [edk2-devel] [PATCH v1 00/15] Merge UefiCpuLib to CpuLib
Hi Pu,
When would you expect having CpuLib merged to edk2 mainstream?
Regards,
Abner
From: devel@edk2.groups.io on behalf of Abner Chang
Sent: Friday, April 1, 2022 9:45 PM
To: devel@edk2.groups.io ; yu...@intel.com
Subject: Re: [edk2-devel] [PATCH v1 00/15] Merge UefiCpuLib to CpuLib
RISC-V port will follow this implementation.
Acked-by: Abner Chang
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Yu Pu
> Sent: Tuesday, March 29, 2022 2:37 PM
> To: devel@edk2.groups.io
> Cc: Yu Pu
> Subject: [edk2-devel] [PATCH v1 00/15] Merge UefiCpuLib to CpuLib
>
> REF:INVALID URI REMOVED.
> cgi?id=3394__;!!NpxR!xX2rZhlg2fzyUFxuyOaXIdXyQT_5yKUpj_ImUmTUQvQ
> cy3zCD4VRcBtL-uHKGxM$
>
> Today lots of duplicated code call CPUID and calculates the address
> mask. Adding an API named GetPhysicalAddressBits in UefiCpuLib can
> solve this problem, but at the same time cause MdeModulePkg depend
> on UefiCpuPkg which does not meet the design spec. So merge UefiCpuLib
> to CpuLib is a good way to sovle these problems. To minimize the impact,
> this operation is divided into four steps.
>
> Yu Pu (15):
> IntelFsp2Pkg: Add CpuLib to module INFs that depend on UefiCpuLib
> IntelFsp2WrapperPkg: Add CpuLib to module INFs that depend on
> UefiCpuLib.
> MdePkg: Add CpuLib to module INFs that depend on UefiCpuLib.
> OvmfPkg: Add CpuLib to module INFs that depend on UefiCpuLib.
> UefiCpuPkg: Add CpuLib to module INFs that depend on UefiCpuLib.
> UefiPayloadPkg: Add CpuLib to module INFs that depend on UefiCpuLib.
> MdePkg: Move API and implementation from UefiCpuLib to CpuLib
> UefiCpuPkg: Move API and implementation from UefiCpuLib to CpuLib
> IntelFsp2Pkg: Remove UefiCpuLib from module INFs.
> OvmfPkg: Remove UefiCpuLib from module INFs.
> PcAtChipsetPkg: Remove UefiCpuLib from module INFs.
> SourceLevelDebugPkg: Remove UefiCpuLib from module INFs.
> UefiCpuPkg: Remove UefiCpuLib from module INFs.
> UefiPayloadPkg: Remove UefiCpuLib from module INFs.
> UefiCpuLib: Remove UefiCpuLib.
>
> MdePkg/Library/BaseCpuLib/X86BaseCpuLib.c
> | 122
>
> OvmfPkg/Sec/SecMain.c
> | 2 +-
> UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c
> |
> 81 -
> UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> | 2
> +-
> UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> | 2 +-
> IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> | 2 +-
> IntelFsp2Pkg/FspSecCore/SecMain.h
> | 2 +-
> IntelFsp2Pkg/IntelFsp2Pkg.dsc
> | 1 -
> IntelFsp2Pkg/Tools/Tests/QemuFspPkg.dsc
> | 1 -
> IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
> | 2 +-
> IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf
> | 2 +-
> IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc
> | 1 -
> MdePkg/Include/Library/CpuLib.h
> | 65
> +++
> MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> | 6 +
> {UefiCpuPkg/Library/BaseUefiCpuLib =>
> MdePkg/Library/BaseCpuLib}/Ia32/InitializeFpu.nasm | 0
> {UefiCpuPkg/Library/BaseUefiCpuLib =>
> MdePkg/Library/BaseCpuLib}/X64/InitializeFpu.nasm | 0
> MdePkg/MdeLibs.dsc.inc
> | 1 +
> OvmfPkg/AmdSev/AmdSevX64.dsc
> | 1 -
> OvmfPkg/Bhyve/BhyveX64.dsc
> | 1 -
> OvmfPkg/CloudHv/CloudHvX64.dsc
> | 1 -
> OvmfPkg/Microvm/MicrovmX64.dsc
> | 1 -
> OvmfPkg/OvmfPkgIa32.dsc
> | 1 -
> OvmfPkg/OvmfPkgIa32X64.dsc
> | 1 -
> OvmfPkg/OvmfPkgX64.dsc
> | 1 -
> OvmfPkg/OvmfXen.dsc
> | 1 -
> OvmfPkg/Sec/SecMain.inf
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 19/33] MdePkg: Add LoongArch LOONGARCH64 binding
HI Li, No, you don’t have to remove the tailing “_”. You can check section 5.3.5. in EDK2 C Coding Standards Spec. Regards, Abner From: Chao Li Sent: Tuesday, April 12, 2022 5:05 PM To: Chang, Abner (HPS SW/FW Technologist) Cc: "devel@edk2.groups.io" ; Michael D Kinney ; Liming Gao ; Zhiguang Liu ; "Baoqi Zhang" ; Dongyan Qian Subject: Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 19/33] MdePkg: Add LoongArch LOONGARCH64 binding Hi Abner, Do I have to remove a "_" at the head and tail? All I found in MdePkg is that *.h files have two "_" at the head and tail. If you are sure that EDK II coding style must contain only one "_" at the head and tail, I will modify it. -- Thanks, Chao On 4月 7 2022, at 10:15 晚上, "Chang, Abner (HPS SW/FW Technologist)" wrote: > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:56 PM > To: devel@edk2.groups.io > Cc: Michael D Kinney ; Liming Gao > ; Zhiguang Liu ; Baoqi > Zhang ; Dongyan Qian > > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 19/33] MdePkg: > Add LoongArch LOONGARCH64 binding > > Add LOONGARCH64 sections in MdePkg.dec and LOONGARCH64 > ProcessorBind.h > > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Zhiguang Liu > > Signed-off-by: Chao Li > Co-authored-by: Baoqi Zhang > Co-authored-by: Dongyan Qian > --- > MdePkg/Include/LoongArch64/ProcessorBind.h | 121 > + > MdePkg/MdePkg.dec | 4 + > MdePkg/MdePkg.dsc | 3 +- > 3 files changed, 127 insertions(+), 1 deletion(-) > create mode 100644 MdePkg/Include/LoongArch64/ProcessorBind.h > > diff --git a/MdePkg/Include/LoongArch64/ProcessorBind.h > b/MdePkg/Include/LoongArch64/ProcessorBind.h > new file mode 100644 > index 00..a10481e285 > --- /dev/null > +++ b/MdePkg/Include/LoongArch64/ProcessorBind.h > @@ -0,0 +1,121 @@ > +/** @file > + Processor or Compiler specific defines and types for LoongArch > + > + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights > reserved. > + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#ifndef __PROCESSOR_BIND_H__ > +#define __PROCESSOR_BIND_H__ Please remove the leading "_" and only keep one trailing "_" to follow the edk2 coding standard. RISC-V ProcessorBind.h has the mistake. Abner > + > +// > +// Define the processor type so other code can make processor based > choices > +// > +#define MDE_CPU_LOONGARCH64 > + > +#define EFIAPI > + > +// > +// Make sure we are using the correct packing rules per EFI specification > +// > +#ifndef __GNUC__ > +#pragma pack() > +#endif > + > +// > +// Assume standard LoongArch 64-bit alignment. > +// Need to check portability of long long > +// > +typedef unsigned long UINT64; > +typedef long INT64; > +typedef unsigned int UINT32; > +typedef int INT32; > +typedef unsigned short UINT16; > +typedef unsigned short CHAR16; > +typedef short INT16; > +typedef unsigned char BOOLEAN; > +typedef unsigned char UINT8; > +typedef char CHAR8; > +typedef char INT8; > + > +// > +// Unsigned value of native width. (4 bytes on supported 32-bit processor > instructions, > +// 8 bytes on supported 64-bit processor instructions) > +// > + > +typedef UINT64 UINTN; > + > +// > +// Signed value of native width. (4 bytes on supported 32-bit processor > instructions, > +// 8 bytes on supported 64-bit processor instructions) > +// > +typedef INT64 INTN; > + > +// > +// Processor specific defines > +// > + > +// > +// A value of native width with the highest bit set. > +// > +#define MAX_BIT 0x8000ULL > +// > +// A value of native width with the two highest bits set. > +// > +#define MAX_2_BITS 0xC000ULL > + > +// > +// Maximum legal LoongArch 64-bit address > +// > +#define MAX_ADDRESS 0xULL > + > +// > +// Maximum usable address at boot time (48 bits using 4KB pages) > +// > +#define MAX_ALLOC_ADDRESS 0xULL > + > + > +// > +// Maximum legal LoongArch 64-bit INTN and UINTN values. > +// > +#define MAX_INTN ((INTN)0x7FFFULL) > +#define MAX_UINTN ((UINTN)0xULL) > + > +// > +// Page allocation granularity for LoongArch > +// > +#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000) > +#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x1) > + > +#if defined(__GNUC__) > + // > + // For GNU assembly code, .global or .globl can declare global symbols. > + // Define this macro to unify the usage. > + // > + #define ASM_GLOBAL .globl > +#endif > + > +// > +// The stack alignment required for LoongArch > +// > +#define CPU_STACK_ALIGNMENT 16 > + > +/** > + Return the pointer to the first instruction of a function given a function > pointer. > + On LOONGARCH CPU architectures, these two pointer values are the same, > + so the implementation of this macro is very simple. > + > + @param FunctionPointer A pointer to a function. > + > + @return The pointer to the first instruction of a function given a function > pointer.
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 25/33] MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.
Hi Li, Maybe I forget to attach it. The cover letter of that CpuLib patch set attached. Regards, Abner From: Chao Li Sent: Wednesday, April 13, 2022 11:17 AM To: Chang, Abner (HPS SW/FW Technologist) Cc: "devel@edk2.groups.io" ; Michael D Kinney ; Liming Gao ; Zhiguang Liu Subject: Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 25/33] MdePkg/BaseCpuLib: LoongArch Base CPU library implementation. Hi Abner, You pointed out that you attached a patch to your last email, but I didn't find it, do you forgot to put it? In the current EDK II code repo, I can not find the patch which you mentioned. -- Thanks, Chao On 4月 8 2022, at 7:26 晚上, "Chang, Abner (HPS SW/FW Technologist)" wrote: Recently there is a work to migrate UefiCpuLib to CpuLib (patch attached), you may want to sync up your changes with that patch set. RISC-V will do the same work later. Thanks Abner > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:56 PM > To: devel@edk2.groups.io > Cc: Michael D Kinney ; Liming Gao > ; Zhiguang Liu > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 25/33] > MdePkg/BaseCpuLib: LoongArch Base CPU library implementation. > > Implement LoongArch CPU related functions in BaseCpuLib. > > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Zhiguang Liu > > Signed-off-by: Chao Li > --- > MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 7 ++- > MdePkg/Library/BaseCpuLib/BaseCpuLib.uni | 5 +++-- > MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S | 15 > +++ > MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S | 15 > +++ > 4 files changed, 39 insertions(+), 3 deletions(-) > create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S > create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S > > diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > index 950f5229b2..3101fc656e 100644 > --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > @@ -8,6 +8,7 @@ > # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved. > # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved. > # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights > reserved. > +# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All > rights reserved. > # > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > @@ -25,7 +26,7 @@ > > > # > -# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64 > +# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64 > LOONGARCH64 > # > > [Sources.IA32] > @@ -63,6 +64,10 @@ > [Sources.RISCV64] > RiscV/Cpu.S > > +[Sources.LOONGARCH64] > + LoongArch/CpuFlushTlb.S | GCC > + LoongArch/CpuSleep.S | GCC > + > [Packages] > MdePkg/MdePkg.dec > > diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni > b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni > index 80dc495786..7c5c8dfb37 100644 > --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni > +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni > @@ -1,13 +1,14 @@ > // /** @file > // Instance of CPU Library for various architecture. > // > -// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64, > +// CPU Library implemented using ASM functions for IA-32, X64, RISCV64 > and LoongArch64, > // PAL CALLs for IPF, and empty functions for EBC. > // > // Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved. > // Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved. > // Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved. > // Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights > reserved. > +// Portions Copyright (c) 2022, Loongson Technology Corporation Limited. > All rights reserved. > // > // SPDX-License-Identifier: BSD-2-Clause-Patent > // > @@ -16,5 +17,5 @@ > > #string STR_MODULE_ABSTRACT #language en-US "Instance of CPU > Library for various architectures" > > -#string STR_MODULE_DESCRIPTION #language en-US "CPU Library > implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for > IPF, and empty functions for EBC." > +#string STR_MODULE_DESCRIPTION #language en-US "CPU Library > implemented using ASM functions for IA-32, X64, RISCV64 and LoongArch64, > PAL CALLs for IPF, and empty functions for EBC." > > diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S > b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S > new file mode 100644 > index 00..8b792f0a37 > --- /dev/null > +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S > @@ -0,0 +1,15 @@ > +#-- > +# > +# CpuFlushTlb() for LoongArch64 > +# > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# >
Re: [edk2-devel] [PATCH v3 1/6] MdeModulePkg/PciHostBridge: io range is not mandatory
> -Original Message-
> From: Gerd Hoffmann
> Sent: Wednesday, April 13, 2022 4:12 PM
> To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist)
>
> Cc: Leif Lindholm ; Ard Biesheuvel
> ; Jordan Justen ;
> Jian J Wang ; Ray Ni ; Hao A Wu
> ; Jiewen Yao ; Liming Gao
> ; Pawel Polawski ;
> Oliver Steffen ; Ard Biesheuvel
> Subject: Re: [edk2-devel] [PATCH v3 1/6] MdeModulePkg/PciHostBridge: io
> range is not mandatory
>
> Hi,
>
> > > diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
> > > b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
> > > index b20bcd310ad5..51a3b987967f 100644
> > > --- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
> > > +++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
> > > @@ -1085,6 +1085,9 @@ NotifyPhase (
> > >RootBridge->ResAllocNode[Index].Base = BaseAddress;
> > >RootBridge->ResAllocNode[Index].Status = ResAllocated;
> > >DEBUG ((DEBUG_INFO, "Success\n"));
> > > +} else if (Index == TypeIo) {
> > How do we tell the BaseAddress is set to UINT64 because "(BaseAddress <
> Limit)" or "gDS->AllocateMemorySpace()" returns error in AllocateResource()
> for TypeIo ?
>
> Does the reason matter?
>
> io resources are optional, so if there is no io address space available
> it should not be a fatal error, no matter what the root cause is.
If the device requires I/O resource however the io address space is not
available, shouldn't this an error?
>
> > Is "else if (Index == TypeIo && RootBridge->Io.Base == MAX_UINT64)"
> more reliable? Or I missed the code logic here?
>
> I think it is not needed, but if you think it is better that way I can
> change it.
This is more clear to reader. That means that we don't have to treat it as an
error on the TypeIo if the base address for it is MAX_UINT64.
Abner
>
> > > + /* optional on PCIe */
> > We should use double back slash for the comment in the function if my
> understanding of the coding standard is correct.
>
> I'll fix in v4.
>
> take care,
> Gerd
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Re: [edk2-devel] [PATCH v3 2/6] OvmfPkg/FdtPciHostBridgeLib: io range is not mandatory
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Gerd
> Hoffmann
> Sent: Tuesday, April 12, 2022 5:04 PM
> To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist)
>
> Cc: Leif Lindholm ; Ard Biesheuvel
> ; Jordan Justen ;
> Jian J Wang ; Ray Ni ; Hao A Wu
> ; Jiewen Yao ; Liming Gao
> ; Pawel Polawski ;
> Oliver Steffen
> Subject: Re: [edk2-devel] [PATCH v3 2/6] OvmfPkg/FdtPciHostBridgeLib: io
> range is not mandatory
>
> Hi,
>
> > > - Io.Base = IoBase;
> > > - Io.Limit = IoBase + IoSize - 1;
> > > + if (IoSize) {
> > > +Io.Base = IoBase;
> > > +Io.Limit = IoBase + IoSize - 1;
> > > + } else {
> > > +Io.Base = MAX_UINT64;
> > > +Io.Limit = 0;
> > HI Gerd,
> > Does the consumer of Io (in PCI_ROOT_BRIDGE structure) know that the
> MAX_UINT64 for Io.Base refers to no memory map I/O?
>
> Patch #1 handles that.
Ok, I had my comment in the response to patch #1.
Thanks
Abner
>
> take care,
> Gerd
>
>
>
>
>
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Re: [edk2-devel] [PATCH v3 1/6] MdeModulePkg/PciHostBridge: io range is not mandatory
> -Original Message-
> From: Gerd Hoffmann
> Sent: Thursday, April 7, 2022 5:33 PM
> To: devel@edk2.groups.io
> Cc: Leif Lindholm ; Ard Biesheuvel
> ; Jordan Justen ;
> Jian J Wang ; Ray Ni ; Hao A Wu
> ; Gerd Hoffmann ; Jiewen Yao
> ; Liming Gao ; Pawel
> Polawski ; Chang, Abner (HPS SW/FW Technologist)
> ; Oliver Steffen ; Ard
> Biesheuvel
> Subject: [PATCH v3 1/6] MdeModulePkg/PciHostBridge: io range is not
> mandatory
>
> io range is not mandatory according to pcie spec,
> so allow bridge configurations without io address
> space assigned.
>
> Signed-off-by: Gerd Hoffmann
> Reviewed-by: Ard Biesheuvel
> ---
> MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
> b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
> index b20bcd310ad5..51a3b987967f 100644
> --- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
> +++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c
> @@ -1085,6 +1085,9 @@ NotifyPhase (
>RootBridge->ResAllocNode[Index].Base = BaseAddress;
>RootBridge->ResAllocNode[Index].Status = ResAllocated;
>DEBUG ((DEBUG_INFO, "Success\n"));
> +} else if (Index == TypeIo) {
How do we tell the BaseAddress is set to UINT64 because "(BaseAddress < Limit)"
or "gDS->AllocateMemorySpace()" returns error in AllocateResource() for TypeIo ?
Is "else if (Index == TypeIo && RootBridge->Io.Base == MAX_UINT64)" more
reliable? Or I missed the code logic here?
> + /* optional on PCIe */
We should use double back slash for the comment in the function if my
understanding of the coding standard is correct.
Abner
> + DEBUG ((DEBUG_INFO, "No IO\n"));
> } else {
>ReturnStatus = EFI_OUT_OF_RESOURCES;
>DEBUG ((DEBUG_ERROR, "Out Of Resource!\n"));
> --
> 2.35.1
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Re: [edk2-devel] [PATCH v3 2/6] OvmfPkg/FdtPciHostBridgeLib: io range is not mandatory
> -Original Message-
> From: Gerd Hoffmann
> Sent: Thursday, April 7, 2022 5:33 PM
> To: devel@edk2.groups.io
> Cc: Leif Lindholm ; Ard Biesheuvel
> ; Jordan Justen ;
> Jian J Wang ; Ray Ni ; Hao A Wu
> ; Gerd Hoffmann ; Jiewen Yao
> ; Liming Gao ; Pawel
> Polawski ; Chang, Abner (HPS SW/FW Technologist)
> ; Oliver Steffen
> Subject: [PATCH v3 2/6] OvmfPkg/FdtPciHostBridgeLib: io range is not
> mandatory
>
> io range is not mandatory according to pcie spec,
> so allow host bridges without io address space.
>
> Signed-off-by: Gerd Hoffmann
> ---
> .../FdtPciHostBridgeLib/FdtPciHostBridgeLib.c | 45 ++-
> 1 file changed, 23 insertions(+), 22 deletions(-)
>
> diff --git a/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
> b/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
> index 98828e0b262b..823ea47c80a3 100644
> --- a/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
> +++ b/OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c
> @@ -292,13 +292,8 @@ ProcessPciHost (
> }
>}
>
> - if ((*IoSize == 0) || (*Mmio32Size == 0)) {
> -DEBUG ((
> - DEBUG_ERROR,
> - "%a: %a space empty\n",
> - __FUNCTION__,
> - (*IoSize == 0) ? "IO" : "MMIO32"
> - ));
> + if (*Mmio32Size == 0) {
> +DEBUG ((DEBUG_ERROR, "%a: MMIO32 space empty\n",
> __FUNCTION__));
> return EFI_PROTOCOL_ERROR;
>}
>
> @@ -333,13 +328,15 @@ ProcessPciHost (
> return Status;
>}
>
> - //
> - // Map the MMIO window that provides I/O access - the PCI host bridge
> code
> - // is not aware of this translation and so it will only map the I/O view
> - // in the GCD I/O map.
> - //
> - Status = MapGcdMmioSpace (*IoBase + IoTranslation, *IoSize);
> - ASSERT_EFI_ERROR (Status);
> + if (*IoSize) {
> +//
> +// Map the MMIO window that provides I/O access - the PCI host bridge
> code
> +// is not aware of this translation and so it will only map the I/O view
> +// in the GCD I/O map.
> +//
> +Status = MapGcdMmioSpace (*IoBase + IoTranslation, *IoSize);
> +ASSERT_EFI_ERROR (Status);
> + }
>
>return Status;
> }
> @@ -413,17 +410,21 @@ PciHostBridgeGetRootBridges (
>
>AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;
>
> - Io.Base = IoBase;
> - Io.Limit = IoBase + IoSize - 1;
> + if (IoSize) {
> +Io.Base = IoBase;
> +Io.Limit = IoBase + IoSize - 1;
> + } else {
> +Io.Base = MAX_UINT64;
> +Io.Limit = 0;
HI Gerd,
Does the consumer of Io (in PCI_ROOT_BRIDGE structure) know that the MAX_UINT64
for Io.Base refers to no memory map I/O?
Abner
> + }
> +
>Mem.Base = Mmio32Base;
>Mem.Limit = Mmio32Base + Mmio32Size - 1;
>
> - if (sizeof (UINTN) == sizeof (UINT64)) {
> -MemAbove4G.Base = Mmio64Base;
> -MemAbove4G.Limit = Mmio64Base + Mmio64Size - 1;
> -if (Mmio64Size > 0) {
> - AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
> -}
> + if ((sizeof (UINTN) == sizeof (UINT64)) && Mmio64Size) {
> +MemAbove4G.Base = Mmio64Base;
> +MemAbove4G.Limit = Mmio64Base + Mmio64Size - 1;
> +AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
>} else {
> //
> // UEFI mandates a 1:1 virtual-to-physical mapping, so on a 32-bit
> --
> 2.35.1
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Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 00/33] Add a new architecture called LoongArch in EDK II
Hi Li, I had went through the whole patch set and gave feedbacks to the patch respectively. Apart from those comments, I have no problems with this contribution. I think we can adopt LoongArch port in the mainstream edk2 repo after the comments are addressed and the corresponding spec defined in UEFI spec unless any objections from others. Thanks Abner From: devel@edk2.groups.io on behalf of Chao Li Sent: Wednesday, February 9, 2022 2:51 PM To: devel@edk2.groups.io Cc: Ray Ni ; Liming Gao ; Michael D Kinney ; Guomin Jiang ; Wei6 Xu ; Maciej Rabeda ; Jiaxin Wu ; Siyuan Fu ; Jiewen Yao ; Jian J Wang ; Xiaoyu Lu ; Zhiguang Liu ; Zhichao Gao ; Bob Feng ; Yuwei Chen Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 00/33] Add a new architecture called LoongArch in EDK II This new Arch should go through the EDK II Code First Process and then the USWG can review our ECR. This commit contains 34 patchs, patch 0 is the cover, patch 33 is Readme modification, and the others are the new Arch support. Modified modules: FatPkg, FmpDevicePkg, NetworkPkg, NetworkPkg/HttpBootDxe, CryptoPkg, MdePkg/Include, SecurityPkg, ShellPkg, UnitTestFrameworkPkg, MdePkg/DxeServicesLib, MdeModulePkg, .python/SpellCheck, BaseTools, .azurepipelines, .pytool, MdePkg, MdeModulePkg. Cc: Ray Ni Cc: Liming Gao Cc: Michael D Kinney Cc: Guomin Jiang Cc: Wei6 Xu Cc: Maciej Rabeda Cc: Jiaxin Wu Cc: Siyuan Fu Cc: Jiewen Yao Cc: Jian J Wang Cc: Xiaoyu Lu Cc: Zhiguang Liu Cc: Zhichao Gao Cc: Bob Feng Cc: Yuwei Chen Chao Li (33): FatPkg: Add LOONGARCH64 architecture for EDK2 CI. FmpDevicePkg: Add LOONGARCH64 architecture for EDK2 CI. NetworkPkg: Add LOONGARCH64 architecture for EDK2 CI. NetworkPkg/HttpBootDxe: Add LOONGARCH64 architecture for EDK2 CI. CryptoPkg: Add LOONGARCH64 architecture for EDK2 CI. MdePkg/Include: Add LOONGARCH related definitions EDK2 CI. SecurityPkg: Add LOONGARCH64 architecture for EDK2 CI. ShellPkg: Add LOONGARCH64 architecture for EDK2 CI. UnitTestFrameworkPkg: Add LOONGARCH64 architecture for EDK2 CI. MdePkg/DxeServicesLib: Add LOONGARCH64 architecture MdeModulePkg: Use LockBoxNullLib for LOONGARCH64 .python/SpellCheck: Add "Loongson" and "LOONGARCH" to "words" section BaseTools: BaseTools changes for LoongArch platform. BaseTools: BaseTools changes for LoongArch platform. BaseTools: BaseTools changes for LoongArch platform. BaseTools: Enable LoongArch64 architecture for LoongArch64 EDK2 CI. .azurepipelines: Add LoongArch64 architecture on LoongArch64 EDK2 CI. .pytool: Add LoongArch64 architecture on LoongArch64 EDK2 CI. MdePkg: Add LoongArch LOONGARCH64 binding MdePkg/Include: LoongArch definitions. MdePkg/BaseLib: BaseLib for LOONGARCH64 architecture. MdePkg/BaseCacheMaintenanceLib: LoongArch cache maintenance implementation. MdePkg/BaseIoLibIntrinsic: IoLibNoIo for LoongArch architecture. MdePkg/BasePeCoff: Add LoongArch PE/Coff related code. MdePkg/BaseCpuLib: LoongArch Base CPU library implementation. MdePkg/BaseSynchronizationLib: LoongArch cache related code. MdePkg/BaseSafeIntLib: Add LoongArch64 architecture for BaseSafeIntLib. MdeModulePkg/Logo: Add LoongArch64 architecture. MdeModulePkg/CapsuleRuntimeDxe: Add LoongArch64 architecture. MdeModulePkg/DxeIplPeim : LoongArch DxeIPL implementation. NetworkPkg: Add LoongArch64 architecture. BaseTools: Add LoongArch64 binding. Readme: Update the readme .azurepipelines/Ubuntu-GCC5.yml | 3 +- .pytool/CISettings.py | 5 +- .pytool/Plugin/SpellCheck/cspell.base.yaml| 4 +- ...gcc_loongarch64_unknown_linux_ext_dep.yaml | 22 ++ BaseTools/Conf/tools_def.template | 43 ++- .../LinuxGcc5ToolChain/LinuxGcc5ToolChain.py | 31 +++ BaseTools/Source/C/Common/BasePeCoff.c| 15 +- BaseTools/Source/C/Common/PeCoffLoaderEx.c| 76 ++ BaseTools/Source/C/GNUmakefile| 3 + BaseTools/Source/C/GenFv/GenFvInternalLib.c | 128 - BaseTools/Source/C/GenFw/Elf64Convert.c | 153 ++- BaseTools/Source/C/GenFw/elf_common.h | 58 .../C/Include/IndustryStandard/PeImage.h | 57 ++-- .../C/Include/LoongArch64/ProcessorBind.h | 80 ++ BaseTools/Source/Python/Common/DataType.py| 21 +- .../Source/Python/UPT/Library/DataType.py | 24 +- BaseTools/Source/Python/build/buildoptions.py | 3 +- CryptoPkg/CryptoPkg.dsc | 3 +- .../Library/BaseCryptLib/BaseCryptLib.inf | 6 +- .../Library/BaseCryptLib/RuntimeCryptLib.inf | 4 + .../BaseCryptLibNull/BaseCryptLibNull.inf | 3 +- .../BaseCryptLibOnProtocolPpi/DxeCryptLib.inf | 3 +- .../BaseCryptLibOnProtocolPpi/PeiCryptLib.inf | 3 +- CryptoPkg/Library/Include/CrtLibSupport.h | 3 +- CryptoPkg/Library/OpensslLib/OpensslLib.inf | 2 + .../Library/OpensslLib/OpensslLibCrypto.inf | 2 +
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 25/33] MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.
Recently there is a work to migrate UefiCpuLib to CpuLib (patch attached), you may want to sync up your changes with that patch set. RISC-V will do the same work later. Thanks Abner > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:56 PM > To: devel@edk2.groups.io > Cc: Michael D Kinney ; Liming Gao > ; Zhiguang Liu > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 25/33] > MdePkg/BaseCpuLib: LoongArch Base CPU library implementation. > > Implement LoongArch CPU related functions in BaseCpuLib. > > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Zhiguang Liu > > Signed-off-by: Chao Li > --- > MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 7 ++- > MdePkg/Library/BaseCpuLib/BaseCpuLib.uni | 5 +++-- > MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S | 15 > +++ > MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S| 15 > +++ > 4 files changed, 39 insertions(+), 3 deletions(-) > create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S > create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S > > diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > index 950f5229b2..3101fc656e 100644 > --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > @@ -8,6 +8,7 @@ > # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved. > # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved. > # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights > reserved. > +# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All > rights reserved. > # > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > @@ -25,7 +26,7 @@ > > > # > -# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64 > +# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64 > LOONGARCH64 > # > > [Sources.IA32] > @@ -63,6 +64,10 @@ > [Sources.RISCV64] >RiscV/Cpu.S > > +[Sources.LOONGARCH64] > + LoongArch/CpuFlushTlb.S | GCC > + LoongArch/CpuSleep.S| GCC > + > [Packages] >MdePkg/MdePkg.dec > > diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni > b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni > index 80dc495786..7c5c8dfb37 100644 > --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni > +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni > @@ -1,13 +1,14 @@ > // /** @file > // Instance of CPU Library for various architecture. > // > -// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64, > +// CPU Library implemented using ASM functions for IA-32, X64, RISCV64 > and LoongArch64, > // PAL CALLs for IPF, and empty functions for EBC. > // > // Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved. > // Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved. > // Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved. > // Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights > reserved. > +// Portions Copyright (c) 2022, Loongson Technology Corporation Limited. > All rights reserved. > // > // SPDX-License-Identifier: BSD-2-Clause-Patent > // > @@ -16,5 +17,5 @@ > > #string STR_MODULE_ABSTRACT #language en-US "Instance of CPU > Library for various architectures" > > -#string STR_MODULE_DESCRIPTION #language en-US "CPU Library > implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for > IPF, and empty functions for EBC." > +#string STR_MODULE_DESCRIPTION #language en-US "CPU Library > implemented using ASM functions for IA-32, X64, RISCV64 and LoongArch64, > PAL CALLs for IPF, and empty functions for EBC." > > diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S > b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S > new file mode 100644 > index 00..8b792f0a37 > --- /dev/null > +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S > @@ -0,0 +1,15 @@ > +#-- > +# > +# CpuFlushTlb() for LoongArch64 > +# > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +#-- > +ASM_GLOBAL ASM_PFX(CpuFlushTlb) > + > +ASM_PFX(CpuFlushTlb): > + tlbflush > + jirl $zero, $ra, 0 > + .end > diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S > b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S > new file mode 100644 > index 00..eb31b10714 > --- /dev/null > +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S > @@ -0,0 +1,15 @@ > +#-- > +# > +# CpuSleep() for LoongArch64 > +# > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights >
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 32/33] BaseTools: Add LoongArch64 binding.
> -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 4:02 PM > To: devel@edk2.groups.io > Cc: Bob Feng ; Liming Gao > ; Yuwei Chen ; Baoqi > Zhang > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 32/33] > BaseTools: Add LoongArch64 binding. > > Add LoongArch64 ProcessorBin.h and add LoongArch to Makefiles. > > Cc: Bob Feng > Cc: Liming Gao > Cc: Yuwei Chen > > Signed-off-by: Chao Li > Co-authored-by: Baoqi Zhang > --- > BaseTools/Source/C/GNUmakefile| 3 + > .../C/Include/LoongArch64/ProcessorBind.h | 80 +++ > 2 files changed, 83 insertions(+) > create mode 100644 > BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h > > diff --git a/BaseTools/Source/C/GNUmakefile > b/BaseTools/Source/C/GNUmakefile > index 8c191e0c38..5275f657ef 100644 > --- a/BaseTools/Source/C/GNUmakefile > +++ b/BaseTools/Source/C/GNUmakefile > @@ -29,6 +29,9 @@ ifndef HOST_ARCH >ifneq (,$(findstring riscv64,$(uname_m))) > HOST_ARCH=RISCV64 >endif > + ifneq (,$(findstring loongarch64,$(uname_m))) > +HOST_ARCH=LOONGARCH64 > + endif >ifndef HOST_ARCH > $(info Could not detected HOST_ARCH from uname results) > $(error HOST_ARCH is not defined!) > diff --git a/BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h > b/BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h > new file mode 100644 > index 00..84c6b8ea7a > --- /dev/null > +++ b/BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h > @@ -0,0 +1,80 @@ > +/** @file > + Processor or Compiler specific defines and types for LoongArch > + > + Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > +#ifndef __PROCESSOR_BIND_H__ > +#define __PROCESSOR_BIND_H__ Please remove the leading "__" and keep only one trailing "_". Abner > + > +// > +// Define the processor type so other code can make processor based > choices > +// > +#define MDE_CPU_LOONGARCH64 > + > +#define EFIAPI > + > +// > +// Make sure we are using the correct packing rules per EFI specification > +// > +#ifndef __GNUC__ > +#pragma pack() > +#endif > + > +// > +// Use ANSI C 2000 stdint.h integer width declarations > +// > +#include > +typedef uint8_t BOOLEAN; > +typedef int8_tINT8; > +typedef uint8_t UINT8; > +typedef int16_t INT16; > +typedef uint16_t UINT16; > +typedef int32_t INT32; > +typedef uint32_t UINT32; > +typedef int64_t INT64; > +typedef uint64_t UINT64; > +typedef char CHAR8; > +typedef uint16_t CHAR16; > + > +// > +// Signed value of native width. (4 bytes on supported 32-bit processor > instructions, > +// 8 bytes on supported 64-bit processor instructions) > +// > +typedef INT64 INTN; > + > +// > +// Unsigned value of native width. (4 bytes on supported 32-bit processor > instructions, > +// 8 bytes on supported 64-bit processor instructions) > +// > +typedef UINT64 UINTN; > + > +// > +// Processor specific defines > +// > + > +// > +// A value of native width with the highest bit set. > +// > +#define MAX_BIT 0x8000ULL > +// > +// A value of native width with the two highest bits set. > +// > +#define MAX_2_BITS 0xC000ULL > + > +#if defined(__GNUC__) > + // > + // For GNU assembly code, .global or .globl can declare global symbols. > + // Define this macro to unify the usage. > + // > + #define ASM_GLOBAL .globl > +#endif > + > +// > +// The stack alignment required for LoongArch > +// > +#define CPU_STACK_ALIGNMENT 16 > + > +#endif > -- > 2.27.0 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88630): https://edk2.groups.io/g/devel/message/88630 Mute This Topic: https://groups.io/mt/89017519/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 30/33] MdeModulePkg/DxeIplPeim : LoongArch DxeIPL implementation.
DxeLoadFunc.c is almost the same as RISC-V instance. However, I don't have idea
how to leverage it because DxeLoadFunc is currently in the architecture-based
folder.
Acked-by: Abner Chang
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Chao Li
> Sent: Wednesday, February 9, 2022 4:02 PM
> To: devel@edk2.groups.io
> Cc: Liming Gao ; Guomin Jiang
> ; Baoqi Zhang
> Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 30/33]
> MdeModulePkg/DxeIplPeim : LoongArch DxeIPL implementation.
>
> Implement LoongArch DxeIPL instance.
>
> Cc: Liming Gao
> Cc: Guomin Jiang
>
> Signed-off-by: Chao Li
> Co-authored-by: Baoqi Zhang
> ---
> MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 6 +-
> .../Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c | 61
> +++
> 2 files changed, 66 insertions(+), 1 deletion(-)
> create mode 100644
> MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c
>
> diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
> b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
> index 19b8a4c8ae..052ea0ec1a 100644
> --- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
> +++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
> @@ -8,6 +8,7 @@
> # Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
> # Copyright (c) 2017, AMD Incorporated. All rights reserved.
> # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.
> +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> reserved.
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> #
> @@ -26,7 +27,7 @@
> #
> # The following information is for reference only and not required by the
> build tools.
> #
> -# VALID_ARCHITECTURES = IA32 X64 EBC (EBC is for build only)
> AARCH64 RISCV64
> +# VALID_ARCHITECTURES = IA32 X64 EBC (EBC is for build only)
> AARCH64 RISCV64 LOONGARCH64
> #
>
> [Sources]
> @@ -53,6 +54,9 @@
> [Sources.RISCV64]
>RiscV64/DxeLoadFunc.c
>
> +[Sources.LOONGARCH64]
> + LoongArch64/DxeLoadFunc.c
> +
> [Packages]
>MdePkg/MdePkg.dec
>MdeModulePkg/MdeModulePkg.dec
> diff --git a/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c
> b/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c
> new file mode 100644
> index 00..27ffc072d0
> --- /dev/null
> +++ b/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c
> @@ -0,0 +1,61 @@
> +/** @file
> + LoongArch specifc functionality for DxeLoad.
> +
> + Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "DxeIpl.h"
> +
> +/**
> + Transfers control to DxeCore.
> +
> + This function performs a CPU architecture specific operations to execute
> + the entry point of DxeCore with the parameters of HobList.
> + It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.
> +
> + @param DxeCoreEntryPoint The entry point of DxeCore.
> + @param HobList The start of HobList passed to DxeCore.
> +
> +**/
> +VOID
> +HandOffToDxeCore (
> + IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
> + IN EFI_PEI_HOB_POINTERS HobList
> + )
> +{
> + VOID*BaseOfStack;
> + VOID*TopOfStack;
> + EFI_STATUS Status;
> +
> + //
> + // Allocate 128KB for the Stack
> + //
> + BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));
> + ASSERT (BaseOfStack != NULL);
> + //
> + // Compute the top of the stack we were allocated. Pre-allocate a UINTN
> + // for safety.
> + //
> + TopOfStack = (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES
> (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);
> + TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
> + //
> + // End of PEI phase singal
> + //
> + Status = PeiServicesInstallPpi ();
> + ASSERT_EFI_ERROR (Status);
> +
> + //
> + // Update the contents of BSP stack HOB to reflect the real stack info
> passed to DxeCore.
> + //
> + UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack,
> STACK_SIZE);
> +
> + SwitchStack (
> +(SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,
> +HobList.Raw,
> +NULL,
> +TopOfStack
> +);
> +}
> --
> 2.27.0
>
>
>
>
>
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Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 27/33] MdePkg/BaseSafeIntLib: Add LoongArch64 architecture for BaseSafeIntLib.
Acked-by: Abner Chang > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:56 PM > To: devel@edk2.groups.io > Cc: Michael D Kinney ; Liming Gao > ; Zhiguang Liu > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 27/33] > MdePkg/BaseSafeIntLib: Add LoongArch64 architecture for BaseSafeIntLib. > > Add LoongArch64 architecture for BaseSafeIntLib library. > > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Zhiguang Liu > > Signed-off-by: Chao Li > --- > MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf | 9 + > 1 file changed, 5 insertions(+), 4 deletions(-) > > diff --git a/MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf > b/MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf > index 40017ec88b..9d039f2e5b 100644 > --- a/MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf > +++ b/MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf > @@ -4,9 +4,10 @@ > # This library provides helper functions to prevent integer overflow during > # type conversion, addition, subtraction, and multiplication. > # > -# Copyright (c) 2018, Intel Corporation. All rights reserved. > +# Copyright (c) 2018, Intel Corporation. All rights reserved. > # Copyright (c) 2017, Microsoft Corporation > -# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights > reserved. > +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights > reserved. > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > > # > # All rights reserved. > @@ -25,7 +26,7 @@ > # > # The following information is for reference only and not required by the > build tools. > # > -# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64 > +# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64 > LOONGARCH64 > # > > [Sources] > @@ -34,7 +35,7 @@ > [Sources.Ia32, Sources.ARM] >SafeIntLib32.c > > -[Sources.X64, Sources.AARCH64, Sources.RISCV64] > +[Sources.X64, Sources.AARCH64, Sources.RISCV64, Sources.LOONGARCH64] >SafeIntLib64.c > > [Sources.EBC] > -- > 2.27.0 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88619): https://edk2.groups.io/g/devel/message/88619 Mute This Topic: https://groups.io/mt/89017015/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 26/33] MdePkg/BaseSynchronizationLib: LoongArch cache related code.
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Chao Li
> Sent: Wednesday, February 9, 2022 2:56 PM
> To: devel@edk2.groups.io
> Cc: Michael D Kinney ; Liming Gao
> ; Zhiguang Liu ; Baoqi
> Zhang
> Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 26/33]
> MdePkg/BaseSynchronizationLib: LoongArch cache related code.
>
> Support LoongArch cache related functions.
>
> Cc: Michael D Kinney
> Cc: Liming Gao
> Cc: Zhiguang Liu
>
> Signed-off-by: Chao Li
> Co-authored-by: Baoqi Zhang
> ---
> .../BaseSynchronizationLib.inf| 5 +
> .../LoongArch64/Synchronization.c | 239 ++
> 2 files changed, 244 insertions(+)
> create mode 100644
> MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c
>
> diff --git
> a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
> b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
> index 83d5b8ed7c..3cf5b6d4b1 100755
> --- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
> +++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
> @@ -4,6 +4,7 @@
> # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
> # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.
> +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> reserved.
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> #
> @@ -83,6 +84,10 @@
>Synchronization.c
>RiscV64/Synchronization.S
>
> +[Sources.LOONGARCH64]
> + Synchronization.c
> + LoongArch64/Synchronization.c
> +
> [Packages]
>MdePkg/MdePkg.dec
>
> diff --git
> a/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c
> b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c
> new file mode 100644
> index 00..a191a50c81
> --- /dev/null
> +++
> b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c
> @@ -0,0 +1,239 @@
> +/** @file
> + LoongArch synchronization functions.
> +
> + Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include
> +
> +/**
> + Performs an atomic compare exchange operation on a 16-bit
> + unsigned integer.
> +
> + Performs an atomic compare exchange operation on the 16-bit
> + unsigned integer specified by Value. If Value is equal to
> + CompareValue, then Value is set to ExchangeValue and
> + CompareValue is returned. If Value is not equal to
> + CompareValue, then Value is returned. The compare exchange
> + operation must be performed using MP safe mechanisms.
> +
> + @param Value A pointer to the 16-bit value for the
> +compare exchange operation.
> + @param CompareValue 16-bit value used in compare operation.
> + @param ExchangeValue 16-bit value used in exchange operation.
> +
> + @return The original *Value before exchange.
I see the modifiers (e.g., IN and/or OUT) are not assigned to @param of
arguments in the function header across the source files in this patch set. I
know some old source files don't have modifiers neither, however, we should
have those in the new source file according to the coding standard.
> +
> +**/
> +UINT16
> +EFIAPI
> +InternalSyncCompareExchange16 (
> + IN volatile UINT16 *Value,
> + IN UINT16CompareValue,
> + IN UINT16ExchangeValue
> + )
> +{
> + UINT32 RetValue, Temp, Shift;
> + UINT64 Mask, LocalCompareValue, LocalExchangeValue;
> + volatile UINT32 *Ptr32;
I can't find the statement in the edk2 C coding standard spec, however as I can
remember each local variable should start at a new line.
> +
> + /* Check that ptr is naturally aligned */
> + ASSERT(!((UINT64)Value & (sizeof(Value) - 1)));
Please use double back slash for the comment.
> +
> + /* Mask inputs to the correct size. */
> + Mask = (((~0UL) - (1UL << (0)) + 1) & (~0UL >> (64 - 1 - ((sizeof(UINT16)
> * 8)
> - 1;
> + LocalCompareValue = ((UINT64)CompareValue) & Mask;
> + LocalExchangeValue = ((UINT64)ExchangeValue) & Mask;
> +
> + /*
> + * Calculate a shift & mask that correspond to the value we wish to
> + * compare & exchange within the naturally aligned 4 byte integer
> + * that includes it.
> + */
> + Shift = (UINT64)Value & 0x3;
> + Shift *= 8; /* BITS_PER_BYTE */
> + LocalCompareValue <<= Shift;
> + LocalExchangeValue <<= Shift;
> + Mask <<= Shift;
> +
> + /*
> + * Calculate a pointer to the naturally aligned 4 byte integer that
> + * includes our byte of interest, and load its value.
> + */
> + Ptr32 = (UINT32 *)((UINT64)Value & ~0x3);
> +
> + __asm__ __volatile__ (
> +"1: \n"
> +"ll.w %0, %3 \n"
> +"and %1, %0, %4 \n"
> +"bne %1, %5, 2f \n"
> +"or%1,
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 24/33] MdePkg/BasePeCoff: Add LoongArch PE/Coff related code.
> -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:56 PM > To: devel@edk2.groups.io > Cc: Michael D Kinney ; Liming Gao > ; Zhiguang Liu ; Baoqi > Zhang > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 24/33] > MdePkg/BasePeCoff: Add LoongArch PE/Coff related code. > > Add LoongArch image relocation. > > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Zhiguang Liu > > Signed-off-by: Chao Li > Co-authored-by: Baoqi Zhang > --- > MdePkg/Library/BasePeCoffLib/BasePeCoff.c | 3 +- > .../Library/BasePeCoffLib/BasePeCoffLib.inf | 5 + > .../Library/BasePeCoffLib/BasePeCoffLib.uni | 2 + > .../BasePeCoffLib/LoongArch/PeCoffLoaderEx.c | 132 > ++ > 4 files changed, 141 insertions(+), 1 deletion(-) > create mode 100644 > MdePkg/Library/BasePeCoffLib/LoongArch/PeCoffLoaderEx.c > > diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoff.c > b/MdePkg/Library/BasePeCoffLib/BasePeCoff.c > index 6d8d9faeb8..97a8aaf8c7 100644 > --- a/MdePkg/Library/BasePeCoffLib/BasePeCoff.c > +++ b/MdePkg/Library/BasePeCoffLib/BasePeCoff.c > @@ -1,6 +1,6 @@ > /** @file >Base PE/COFF loader supports loading any PE32/PE32+ or TE image, but > - only supports relocating IA32, x64, IPF, ARM, RISC-V and EBC images. > + only supports relocating IA32, x64, IPF, ARM, RISC-V, LoongArch and EBC > images. > >Caution: This file requires additional review when modified. >This library will have external input - PE/COFF image. > @@ -18,6 +18,7 @@ >Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved. >Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved. >Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. > All rights reserved. > + Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All > rights reserved. >SPDX-License-Identifier: BSD-2-Clause-Patent > > **/ > diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > index 110b6d5a09..3b8b8eb191 100644 > --- a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > +++ b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > @@ -4,6 +4,7 @@ > # The IA32 version library support loading IA32, X64 and EBC PE/COFF images. > # The X64 version library support loading IA32, X64 and EBC PE/COFF images. > # The RISC-V version library support loading RISC-V images. > +# The LoongArch version library support loading LoongArch images. > # > # Caution: This module requires additional review when modified. > # This library will have external input - PE/COFF image. > @@ -13,6 +14,7 @@ > # Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved. > # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved. > # Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. > All rights reserved. > +# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All > rights reserved. > # > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > @@ -46,6 +48,9 @@ > [Sources.RISCV64] >RiscV/PeCoffLoaderEx.c > > +[Sources.LOONGARCH64] > + LoongArch/PeCoffLoaderEx.c > + > [Packages] >MdePkg/MdePkg.dec > > diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni > b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni > index 55417029f2..1f731344e1 100644 > --- a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni > +++ b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni > @@ -5,6 +5,7 @@ > // The IA32 version library support loading IA32, X64 and EBC PE/COFF > images. > // The X64 version library support loading IA32, X64 and EBC PE/COFF images. > // The RISC-V version library support loading RISC-V32 and RISC-V64 PE/COFF > images. > +// The LoongArch version library support loading LoongArch32 and > LoongArch64 PE/COFF images. > // > // Caution: This module requires additional review when modified. > // This library will have external input - PE/COFF image. > @@ -14,6 +15,7 @@ > // Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved. > // Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved. > // Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. > All rights reserved. > +// Portions Copyright (c) 2022, Loongson Technology Corporation Limited. > All rights reserved. > // > // SPDX-License-Identifier: BSD-2-Clause-Patent > // > diff --git a/MdePkg/Library/BasePeCoffLib/LoongArch/PeCoffLoaderEx.c > b/MdePkg/Library/BasePeCoffLib/LoongArch/PeCoffLoaderEx.c > new file mode 100644 > index 00..ec572c2dd6 > --- /dev/null > +++ b/MdePkg/Library/BasePeCoffLib/LoongArch/PeCoffLoaderEx.c > @@ -0,0 +1,132 @@ > +/** @file > + PE/Coff loader for LoongArch PE image > + > + Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > + > + SPDX-License-Identifier: BSD-2-Clause-Patent > +**/ > + > +#include
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 23/33] MdePkg/BaseIoLibIntrinsic: IoLibNoIo for LoongArch architecture.
Acked-by: Abner Chang > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:56 PM > To: devel@edk2.groups.io > Cc: Michael D Kinney ; Liming Gao > ; Zhiguang Liu > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 23/33] > MdePkg/BaseIoLibIntrinsic: IoLibNoIo for LoongArch architecture. > > LoongArch MMIO library instance, use the IoLibNoIo. > > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Zhiguang Liu > > Signed-off-by: Chao Li > --- > .../Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 10 +++--- > MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c | 3 ++- > 2 files changed, 9 insertions(+), 4 deletions(-) > > diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf > b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf > index 97eeada065..f668d4f2d7 100644 > --- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf > +++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf > @@ -4,13 +4,14 @@ > # I/O Library that uses compiler intrinsics to perform IN and OUT > instructions > # for IA-32 and x64. On IPF, I/O port requests are translated into MMIO > requests. > # MMIO requests are forwarded directly to memory. For EBC, I/O port > requests > -# ASSERT(). For ARM, AARCH64 and RISCV64, this I/O library only provides > non I/O > -# read and write. > +# ASSERT(). For ARM, AARCH64, RISCV64 and LoongArch, this I/O library > only provides > +# non I/O read and write. > # > # Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved. > # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved. > # Copyright (c) 2017, AMD Incorporated. All rights reserved. > # Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. > All rights reserved. > +# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All > rights reserved. > # > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > @@ -27,7 +28,7 @@ > > > # > -# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64 > +# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64 > LOONGARCH64 > # > > [Sources] > @@ -60,6 +61,9 @@ > [Sources.RISCV64] >IoLibNoIo.c > > +[Sources.LOONGARCH64] > + IoLibNoIo.c > + > [Packages] >MdePkg/MdePkg.dec > > diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c > b/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c > index c71f45b22e..c51e5da39b 100644 > --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c > +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c > @@ -1,11 +1,12 @@ > /** @file >I/O library for non I/O read and write access (memory map I/O read and > - write only) architecture, such as ARM and RISC-V processor. > + write only) architecture, such as ARM, RISC-V and LoongArch processor. > >Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved. >Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved. >Copyright (c) 2017, AMD Incorporated. All rights reserved. >Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights > reserved. > + Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > >SPDX-License-Identifier: BSD-2-Clause-Patent > > -- > 2.27.0 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88599): https://edk2.groups.io/g/devel/message/88599 Mute This Topic: https://groups.io/mt/89017006/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 22/33] MdePkg/BaseCacheMaintenanceLib: LoongArch cache maintenance implementation.
Acked-by: Abner Chang
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Chao Li
> Sent: Wednesday, February 9, 2022 2:56 PM
> To: devel@edk2.groups.io
> Cc: Michael D Kinney ; Liming Gao
> ; Zhiguang Liu
> Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 22/33]
> MdePkg/BaseCacheMaintenanceLib: LoongArch cache maintenance
> implementation.
>
> Implement LoongArch cache maintenance functions in
> BaseCacheMaintenanceLib.
>
> Cc: Michael D Kinney
> Cc: Liming Gao
> Cc: Zhiguang Liu
>
> Signed-off-by: Chao Li
> ---
> .../BaseCacheMaintenanceLib.inf | 4 +
> .../BaseCacheMaintenanceLib/LoongArchCache.c | 253
> ++
> 2 files changed, 257 insertions(+)
> create mode 100644
> MdePkg/Library/BaseCacheMaintenanceLib/LoongArchCache.c
>
> diff --git
> a/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.in
> f
> b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.in
> f
> index 33114243d5..e103705b2c 100644
> ---
> a/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.in
> f
> +++
> b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.in
> f
> @@ -7,6 +7,7 @@
> # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
> # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.
> +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> reserved.
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> #
> @@ -45,6 +46,9 @@
> [Sources.RISCV64]
>RiscVCache.c
>
> +[Sources.LOONGARCH64]
> + LoongArchCache.c
> +
> [Packages]
>MdePkg/MdePkg.dec
>
> diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/LoongArchCache.c
> b/MdePkg/Library/BaseCacheMaintenanceLib/LoongArchCache.c
> new file mode 100644
> index 00..4dcba9ecff
> --- /dev/null
> +++ b/MdePkg/Library/BaseCacheMaintenanceLib/LoongArchCache.c
> @@ -0,0 +1,253 @@
> +/** @file
> + Cache Maintenance Functions for LoongArch.
> + LoongArch cache maintenance functions has not yet been completed, and
> will added in later.
> + Functions are null functions now.
> +
> + Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +//
> +// Include common header file for this module.
> +//
> +#include
> +#include
> +#include
> +
> +/**
> + Invalidates the entire instruction cache in cache coherency domain of the
> + calling CPU.
> +
> +**/
> +VOID
> +EFIAPI
> +InvalidateInstructionCache (
> + VOID
> + )
> +{
> + __asm__ __volatile__(
> +"ibar 0\n"
> +:
> +:
> + );
> +}
> +
> +/**
> + Invalidates a range of instruction cache lines in the cache coherency
> domain
> + of the calling CPU.
> +
> + Invalidates the instruction cache lines specified by Address and Length. If
> + Address is not aligned on a cache line boundary, then entire instruction
> + cache line containing Address is invalidated. If Address + Length is not
> + aligned on a cache line boundary, then the entire instruction cache line
> + containing Address + Length -1 is invalidated. This function may choose to
> + invalidate the entire instruction cache if that is more efficient than
> + invalidating the specified range. If Length is 0, the no instruction cache
> + lines are invalidated. Address is returned.
> +
> + If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
> +
> + @param Address The base address of the instruction cache lines to
> + invalidate. If the CPU is in a physical addressing mode,
> then
> + Address is a physical address. If the CPU is in a virtual
> + addressing mode, then Address is a virtual address.
> +
> + @param Length The number of bytes to invalidate from the instruction
> cache.
> +
> + @return Address.
> +
> +**/
> +VOID *
> +EFIAPI
> +InvalidateInstructionCacheRange (
> + IN VOID *Address,
> + IN UINTN Length
> + )
> +{
> + __asm__ __volatile__(
> +"ibar 0\n"
> +:
> +:
> + );
> + return Address;
> +}
> +
> +/**
> + Writes Back and Invalidates the entire data cache in cache coherency
> domain
> + of the calling CPU.
> +
> + Writes Back and Invalidates the entire data cache in cache coherency
> domain
> + of the calling CPU. This function guaran
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 21/33] MdePkg/BaseLib: BaseLib for LOONGARCH64 architecture.
Acked-by: Abner Chang
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Chao Li
> Sent: Wednesday, February 9, 2022 2:56 PM
> To: devel@edk2.groups.io
> Cc: Michael D Kinney ; Liming Gao
> ; Zhiguang Liu ; Baoqi
> Zhang
> Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 21/33]
> MdePkg/BaseLib: BaseLib for LOONGARCH64 architecture.
>
> Add LoongArch LOONGARCH64 BaseLib functions.
>
> Cc: Michael D Kinney
> Cc: Liming Gao
> Cc: Zhiguang Liu
>
> Signed-off-by: Chao Li
> Co-authored-by: Baoqi Zhang
> ---
> MdePkg/Include/Library/BaseLib.h | 24 ++
> MdePkg/Library/BaseLib/BaseLib.inf| 13 +
> .../BaseLib/LoongArch64/CpuBreakpoint.S | 24 ++
> MdePkg/Library/BaseLib/LoongArch64/CpuPause.S | 31 +++
> .../BaseLib/LoongArch64/DisableInterrupts.S | 21 ++
> .../BaseLib/LoongArch64/EnableInterrupts.S| 21 ++
> .../BaseLib/LoongArch64/GetInterruptState.S | 35 +++
> .../BaseLib/LoongArch64/InternalSwitchStack.c | 58 +
> .../Library/BaseLib/LoongArch64/MemoryFence.S | 19 ++
> .../BaseLib/LoongArch64/SetJumpLongJump.S | 49
> .../Library/BaseLib/LoongArch64/SwitchStack.S | 39 +++
> .../Library/BaseLib/LoongArch64/Unaligned.c | 244 ++
> 12 files changed, 578 insertions(+)
> create mode 100644
> MdePkg/Library/BaseLib/LoongArch64/CpuBreakpoint.S
> create mode 100644 MdePkg/Library/BaseLib/LoongArch64/CpuPause.S
> create mode 100644
> MdePkg/Library/BaseLib/LoongArch64/DisableInterrupts.S
> create mode 100644
> MdePkg/Library/BaseLib/LoongArch64/EnableInterrupts.S
> create mode 100644
> MdePkg/Library/BaseLib/LoongArch64/GetInterruptState.S
> create mode 100644
> MdePkg/Library/BaseLib/LoongArch64/InternalSwitchStack.c
> create mode 100644
> MdePkg/Library/BaseLib/LoongArch64/MemoryFence.S
> create mode 100644
> MdePkg/Library/BaseLib/LoongArch64/SetJumpLongJump.S
> create mode 100644 MdePkg/Library/BaseLib/LoongArch64/SwitchStack.S
> create mode 100644 MdePkg/Library/BaseLib/LoongArch64/Unaligned.c
>
> diff --git a/MdePkg/Include/Library/BaseLib.h
> b/MdePkg/Include/Library/BaseLib.h
> index 6aa0d97218..3c27e2ea93 100644
> --- a/MdePkg/Include/Library/BaseLib.h
> +++ b/MdePkg/Include/Library/BaseLib.h
> @@ -6,6 +6,7 @@ Copyright (c) 2006 - 2021, Intel Corporation. All rights
> reserved.
> Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> Copyright (c) Microsoft Corporation.
> Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All
> rights reserved.
> +Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All
> rights reserved.
>
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @@ -152,6 +153,29 @@ typedef struct {
>
> #endif // defined (MDE_CPU_RISCV64)
>
> +#if defined (MDE_CPU_LOONGARCH64)
> +///
> +/// The LoongArch architecture context buffer used by SetJump() and
> LongJump()
> +///
> +typedef struct {
> + UINT64S0;
> + UINT64S1;
> + UINT64S2;
> + UINT64S3;
> + UINT64S4;
> + UINT64S5;
> + UINT64S6;
> + UINT64S7;
> + UINT64S8;
> + UINT64SP;
> + UINT64FP;
> + UINT64RA;
> +} BASE_LIBRARY_JUMP_BUFFER;
> +
> +#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
> +
> +#endif // defined (MDE_CPU_LOONGARCH64)
> +
> //
> // String Services
> //
> diff --git a/MdePkg/Library/BaseLib/BaseLib.inf
> b/MdePkg/Library/BaseLib/BaseLib.inf
> index cebda3b210..4c9b6b50dd 100644
> --- a/MdePkg/Library/BaseLib/BaseLib.inf
> +++ b/MdePkg/Library/BaseLib/BaseLib.inf
> @@ -409,6 +409,19 @@
>RiscV64/RiscVInterrupt.S | GCC
>RiscV64/FlushCache.S | GCC
>
> +[Sources.LOONGARCH64]
> + Math64.c
> + LoongArch64/Unaligned.c
> + LoongArch64/InternalSwitchStack.c
> + LoongArch64/GetInterruptState.S | GCC
> + LoongArch64/EnableInterrupts.S| GCC
> + LoongArch64/DisableInterrupts.S | GCC
> + LoongArch64/MemoryFence.S | GCC
> + LoongArch64/CpuBreakpoint.S | GCC
> + LoongArch64/CpuPause.S| GCC
> + LoongArch64/SetJumpLongJump.S | GCC
> + LoongArch64/SwitchStack.S | GCC
> +
> [Packages]
>MdePkg/MdePkg.dec
>
> diff --git a/MdePkg/Library/BaseLib/LoongArch64/CpuBreakpoint.S
> b/MdePkg/Library/BaseLib/LoongArch64/CpuBreakpoint.S
> new file mode 100644
> index 00..4e022e9bb5
> --- /dev/null
> +++ b/MdePkg/Library/BaseLib/LoongArch64/CpuBreakpoint.S
> @@ -0,0 +1,24 @@
> +#--
> +#
> +# CpuBreakpoint for LoongArch
> +#
> +# C
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 16/33] BaseTools: Enable LoongArch64 architecture for LoongArch64 EDK2 CI.
Acked-by: Abner Chang
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Chao Li
> Sent: Wednesday, February 9, 2022 2:55 PM
> To: devel@edk2.groups.io
> Cc: Bob Feng ; Liming Gao
> ; Yuwei Chen
> Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 16/33]
> BaseTools: Enable LoongArch64 architecture for LoongArch64 EDK2 CI.
>
> EDK CI for LoongArch64 architecture
>
> Enable LoongArch64 architecture for LoongArch64 EDK2 CI testing.
>
> Cc: Bob Feng
> Cc: Liming Gao
> Cc: Yuwei Chen
>
> Signed-off-by: Chao Li
> ---
> ...gcc_loongarch64_unknown_linux_ext_dep.yaml | 22 +
> .../LinuxGcc5ToolChain/LinuxGcc5ToolChain.py | 31
> +++
> 2 files changed, 53 insertions(+)
> create mode 100644
> BaseTools/Bin/gcc_loongarch64_unknown_linux_ext_dep.yaml
>
> diff --git a/BaseTools/Bin/gcc_loongarch64_unknown_linux_ext_dep.yaml
> b/BaseTools/Bin/gcc_loongarch64_unknown_linux_ext_dep.yaml
> new file mode 100644
> index 00..6bdd7388f8
> --- /dev/null
> +++ b/BaseTools/Bin/gcc_loongarch64_unknown_linux_ext_dep.yaml
> @@ -0,0 +1,22 @@
> +## @file
> +# Download GCC LoongArch64 compiler from LoongArch GitHub release site
> +# Set shell variable GCC5_LOONGARCH64_INSTALL to this folder
> +#
> +# This is only downloaded when a build activates scope
> gcc_loongarch64_unknown_linux
> +#
> +# Copyright (c) Microsoft Corporation.
> +# Copyright (c) 2022 Loongson Technology Corporation Limited. All rights
> reserved.
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +##
> +{
> + "scope": "gcc_loongarch64_unknown_linux",
> + "type": "web",
> + "name": "gcc_loongarch64_unknown_linux",
> + "source": "https://github.com/loongson/build-
> tools/releases/download/2021.12.21/loongarch64-clfs-2021-12-18-cross-
> tools-gcc-full.tar.xz",
> + "version": "12.0.0 20210810",
> + "sha256":
> "07f4e93423e76c57c775390099c76273b67cde2e441ed78192a2f4da9168c65a",
> + "compression_type": "tar",
> + "internal_path": "/cross-tools/",
> + "flags": ["set_shell_var", ],
> + "var_name": "GCC5_LOONGARCH64_INSTALL"
> +}
> diff --git a/BaseTools/Plugin/LinuxGcc5ToolChain/LinuxGcc5ToolChain.py
> b/BaseTools/Plugin/LinuxGcc5ToolChain/LinuxGcc5ToolChain.py
> index f0685d8040..5615f8bb35 100644
> --- a/BaseTools/Plugin/LinuxGcc5ToolChain/LinuxGcc5ToolChain.py
> +++ b/BaseTools/Plugin/LinuxGcc5ToolChain/LinuxGcc5ToolChain.py
> @@ -5,6 +5,7 @@
> #
> # Copyright (c) Microsoft Corporation
> # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.
> +# Copyright (c) 2022 Loongson Technology Corporation Limited. All rights
> reserved.
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> ##
> import os
> @@ -43,6 +44,12 @@ class LinuxGcc5ToolChain(IUefiBuildPlugin):
> self.Logger.critical("Failed in check riscv64")
> return ret
>
> +# Check LoongArch64 compiler
> +ret = self._check_loongarch64()
> +if ret != 0:
> +self.Logger.critical("Failed in check loongarch64")
> +return ret
> +
> return 0
>
> def _check_arm(self):
> @@ -121,3 +128,27 @@ class LinuxGcc5ToolChain(IUefiBuildPlugin):
>
> shell_environment.GetEnvironment().set_shell_var("LD_LIBRARY_PATH",
> prefix)
>
> return 0
> +
> +def _check_loongarch64(self):
> +# check to see if full path already configured
> +if
> shell_environment.GetEnvironment().get_shell_var("GCC5_LOONGARCH64
> _PREFIX") is not None:
> +self.Logger.info("GCC5_LOONGARCH64_PREFIX is already set.")
> +
> +else:
> +# now check for install dir. If set then set the Prefix
> +install_path = shell_environment.GetEnvironment(
> +).get_shell_var("GCC5_LOONGARCH64_INSTALL")
> +if install_path is None:
> +return 0
> +
> +# make GCC5_AARCH64_PREFIX to align with tools_def.txt
> +prefix = os.path.join(install_path, "bin",
> "loongarch64-unknown-linux-
> gnu-")
> +
> shell_environment.GetEnvironment().set_shell_var("GCC5_LOONGARCH64
> _PREFIX", prefix)
> +
> +# now confirm it exists
> +if not
> os.path.exists(shell_environment.GetEnvironment().get_shell_var("GCC5_L
> OONGARCH64_PREFIX") + "gcc"):
> +self.Logger.error(
> +"Path for GCC5_LOONGARCH64_PREFIX toolchain is invalid")
> +return -2
> +
> +return 0
> --
> 2.27.0
>
>
>
>
>
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Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 15/33] BaseTools: BaseTools changes for LoongArch platform.
Acked-by: Abner Chang
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Chao Li
> Sent: Wednesday, February 9, 2022 2:55 PM
> To: devel@edk2.groups.io
> Cc: Bob Feng ; Liming Gao
> ; Yuwei Chen ; Baoqi
> Zhang
> Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 15/33]
> BaseTools: BaseTools changes for LoongArch platform.
>
> Python code changes for building EDK2 LoongArch platform.
>
> Cc: Bob Feng
> Cc: Liming Gao
> Cc: Yuwei Chen
>
> Signed-off-by: Chao Li
> Co-authored-by: Baoqi Zhang
> ---
> BaseTools/Source/Python/Common/DataType.py| 21 ++--
> .../Source/Python/UPT/Library/DataType.py | 24 ++-
> BaseTools/Source/Python/build/buildoptions.py | 3 ++-
> 3 files changed, 44 insertions(+), 4 deletions(-)
>
> diff --git a/BaseTools/Source/Python/Common/DataType.py
> b/BaseTools/Source/Python/Common/DataType.py
> index dc4962..48dbf16495 100644
> --- a/BaseTools/Source/Python/Common/DataType.py
> +++ b/BaseTools/Source/Python/Common/DataType.py
> @@ -4,6 +4,7 @@
> # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
> # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
> # Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP.
> All rights reserved.
> +# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All
> rights reserved.
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> ##
> @@ -52,10 +53,10 @@ TAB_ARCH_X64 = 'X64'
> TAB_ARCH_ARM = 'ARM'
> TAB_ARCH_EBC = 'EBC'
> TAB_ARCH_AARCH64 = 'AARCH64'
> -
> TAB_ARCH_RISCV64 = 'RISCV64'
> +TAB_ARCH_LOONGARCH64 = 'LOONGARCH64'
>
> -ARCH_SET_FULL = {TAB_ARCH_IA32, TAB_ARCH_X64, TAB_ARCH_ARM,
> TAB_ARCH_EBC, TAB_ARCH_AARCH64, TAB_ARCH_RISCV64,
> TAB_ARCH_COMMON}
> +ARCH_SET_FULL = {TAB_ARCH_IA32, TAB_ARCH_X64, TAB_ARCH_ARM,
> TAB_ARCH_EBC, TAB_ARCH_AARCH64, TAB_ARCH_RISCV64,
> TAB_ARCH_LOONGARCH64, TAB_ARCH_COMMON}
>
> SUP_MODULE_BASE = 'BASE'
> SUP_MODULE_SEC = 'SEC'
> @@ -138,6 +139,7 @@ TAB_SOURCES_X64 = TAB_SOURCES + TAB_SPLIT +
> TAB_ARCH_X64
> TAB_SOURCES_ARM = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_ARM
> TAB_SOURCES_EBC = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_EBC
> TAB_SOURCES_AARCH64 = TAB_SOURCES + TAB_SPLIT +
> TAB_ARCH_AARCH64
> +TAB_SOURCES_LOONGARCH64 = TAB_SOURCES + TAB_SPLIT +
> TAB_ARCH_LOONGARCH64
>
> TAB_BINARIES = 'Binaries'
> TAB_BINARIES_COMMON = TAB_BINARIES + TAB_SPLIT +
> TAB_ARCH_COMMON
> @@ -146,6 +148,7 @@ TAB_BINARIES_X64 = TAB_BINARIES + TAB_SPLIT +
> TAB_ARCH_X64
> TAB_BINARIES_ARM = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_ARM
> TAB_BINARIES_EBC = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_EBC
> TAB_BINARIES_AARCH64 = TAB_BINARIES + TAB_SPLIT +
> TAB_ARCH_AARCH64
> +TAB_BINARIES_LOONGARCH64 = TAB_BINARIES + TAB_SPLIT +
> TAB_ARCH_LOONGARCH64
>
> TAB_INCLUDES = 'Includes'
> TAB_INCLUDES_COMMON = TAB_INCLUDES + TAB_SPLIT +
> TAB_ARCH_COMMON
> @@ -154,6 +157,7 @@ TAB_INCLUDES_X64 = TAB_INCLUDES + TAB_SPLIT +
> TAB_ARCH_X64
> TAB_INCLUDES_ARM = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_ARM
> TAB_INCLUDES_EBC = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_EBC
> TAB_INCLUDES_AARCH64 = TAB_INCLUDES + TAB_SPLIT +
> TAB_ARCH_AARCH64
> +TAB_INCLUDES_LOONGARCH64 = TAB_INCLUDES + TAB_SPLIT +
> TAB_ARCH_LOONGARCH64
>
> TAB_GUIDS = 'Guids'
> TAB_GUIDS_COMMON = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_COMMON
> @@ -162,6 +166,7 @@ TAB_GUIDS_X64 = TAB_GUIDS + TAB_SPLIT +
> TAB_ARCH_X64
> TAB_GUIDS_ARM = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_ARM
> TAB_GUIDS_EBC = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_EBC
> TAB_GUIDS_AARCH64 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_AARCH64
> +TAB_GUIDS_LOONGARCH64 = TAB_GUIDS + TAB_SPLIT +
> TAB_ARCH_LOONGARCH64
>
> TAB_PROTOCOLS = 'Protocols'
> TAB_PROTOCOLS_COMMON = TAB_PROTOCOLS + TAB_SPLIT +
> TAB_ARCH_COMMON
> @@ -170,6 +175,7 @@ TAB_PROTOCOLS_X64 = TAB_PROTOCOLS +
> TAB_SPLIT + TAB_ARCH_X64
> TAB_PROTOCOLS_ARM = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_ARM
> TAB_PROTOCOLS_EBC = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_EBC
> TAB_PROTOCOLS_AARCH64 = TAB_PROTOCOLS + TAB_SPLIT +
> TAB_ARCH_AARCH64
> +TAB_PROTOCOLS_LOONGARCH64 = TAB_PROTOCOLS + TAB_SPLIT +
> TAB_ARCH_LOONGARCH64
>
> TAB_PPIS = 'Ppis'
> TAB_PPIS_COMMON = TAB_PPIS + TAB_SPLIT + TAB_ARCH_COMMON
> @@ -178,6 +184,7 @@ TAB_PPIS_X64 = TAB_PPIS + TAB_SPLIT +
> TAB_ARCH_X64
> TAB_PPIS_ARM = TAB_PPIS + TAB_SPLIT + TAB_ARCH_ARM
> TAB_PPIS_EBC = TAB_PPIS + TAB_SPLIT + TAB_ARCH_EBC
> TAB_PPIS_AARCH64 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_AARCH64
> +TAB_PPIS_LOONGARCH64 = TAB_PPIS + TAB_SPLIT +
> TAB_ARCH_LOONGARCH64
>
> TAB_LIBRARY_CLASSES = 'LibraryClasses'
&
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 14/33] BaseTools: BaseTools changes for LoongArch platform.
Acked-by: Abner Chang > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:55 PM > To: devel@edk2.groups.io > Cc: Bob Feng ; Liming Gao > ; Yuwei Chen ; Baoqi > Zhang > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 14/33] > BaseTools: BaseTools changes for LoongArch platform. > > BaseTools define template files changes for building EDK2 LoongArch > platform. > > Cc: Bob Feng > Cc: Liming Gao > Cc: Yuwei Chen > > Signed-off-by: Chao Li > Co-authored-by: Baoqi Zhang > --- > BaseTools/Conf/tools_def.template | 43 > ++- > 1 file changed, 42 insertions(+), 1 deletion(-) > > diff --git a/BaseTools/Conf/tools_def.template > b/BaseTools/Conf/tools_def.template > index 85b8afbb2d..67b6c69dcf 100755 > --- a/BaseTools/Conf/tools_def.template > +++ b/BaseTools/Conf/tools_def.template > @@ -4,6 +4,7 @@ > # Portions copyright (c) 2011 - 2019, ARM Ltd. All rights reserved. > # Copyright (c) 2015, Hewlett-Packard Development Company, L.P. > # (C) Copyright 2020, Hewlett Packard Enterprise Development LP > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > # Copyright (c) Microsoft Corporation > # > # SPDX-License-Identifier: BSD-2-Clause-Patent > @@ -267,7 +268,7 @@ DEFINE DTC_BIN = ENV(DTC_PREFIX)dtc > # Intel(r) ACPI Compiler from > # https://acpica.org/downloads > # GCC5-Linux,Windows- Requires: > -# GCC 5 with LTO support, targeting > x86_64-linux-gnu, > aarch64-linux-gnu, arm-linux-gnueabi or riscv64-linux-gnu > +# GCC 5 with LTO support, targeting > x86_64-linux-gnu, > aarch64-linux-gnu, arm-linux-gnueabi, riscv64-linux-gnu ro loongarch64-linux- > gnu > #Optional: > # Required to build platforms or ACPI tables: > # Intel(r) ACPI Compiler from > @@ -1871,6 +1872,7 @@ DEFINE GCC_ALL_CC_FLAGS= -g -Os -fshort- > wchar -fno-builtin -fno-stri > DEFINE GCC_IA32_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -m32 - > malign-double -freorder-blocks -freorder-blocks-and-partition -O2 -mno- > stack-arg-probe > DEFINE GCC_X64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mno-red- > zone -Wno-address -mno-stack-arg-probe > DEFINE GCC_ARM_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle- > endian -mabi=aapcs -fno-short-enums -funsigned-char -ffunction-sections - > fdata-sections -fomit-frame-pointer -Wno-address -mthumb -mfloat- > abi=soft -fno-pic -fno-pie > +DEFINE GCC_LOONGARCH64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) - > march=loongarch64 -mabi=lp64d -Wa,-mla-global-with-abs -fno-plt -Wno- > address -fno-short-enums -fsigned-char -ffunction-sections -fdata-sections > DEFINE GCC_ARM_CC_XIPFLAGS = -mno-unaligned-access > DEFINE GCC_AARCH64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle- > endian -fno-short-enums -fverbose-asm -funsigned-char -ffunction-sections > -fdata-sections -Wno-address -fno-asynchronous-unwind-tables -fno- > unwind-tables -fno-pic -fno-pie -ffixed-x18 > DEFINE GCC_AARCH64_CC_XIPFLAGS = -mstrict-align -mgeneral-regs-only > @@ -1878,12 +1880,15 @@ DEFINE GCC_DLINK_FLAGS_COMMON = - > nostdlib --pie > DEFINE GCC_DLINK2_FLAGS_COMMON = -Wl,-- > script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds > DEFINE GCC_IA32_X64_DLINK_COMMON = > DEF(GCC_DLINK_FLAGS_COMMON) --gc-sections > DEFINE GCC_ARM_AARCH64_DLINK_COMMON= -Wl,--emit-relocs -nostdlib > -Wl,--gc-sections -u $(IMAGE_ENTRY_POINT) -Wl,- > e,$(IMAGE_ENTRY_POINT),-Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).map > +DEFINE GCC_LOONGARCH64_DLINK_COMMON= -Wl,--emit-relocs - > nostdlib -Wl,--gc-sections -u $(IMAGE_ENTRY_POINT) -Wl,- > e,$(IMAGE_ENTRY_POINT),-Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).map > DEFINE GCC_ARM_DLINK_FLAGS = > DEF(GCC_ARM_AARCH64_DLINK_COMMON) -z common-page-size=0x20 - > Wl,--pic-veneer > DEFINE GCC_AARCH64_DLINK_FLAGS = > DEF(GCC_ARM_AARCH64_DLINK_COMMON) -z common-page-size=0x20 > +DEFINE GCC_LOONGARCH64_DLINK_FLAGS = > DEF(GCC_LOONGARCH64_DLINK_COMMON) -z common-page-size=0x20 > DEFINE GCC_ARM_AARCH64_ASLDLINK_FLAGS = -Wl,-- > defsym=PECOFF_HEADER_SIZE=0 DEF(GCC_DLINK2_FLAGS_COMMON) -z > common-page-size=0x20 > DEFINE GCC_IA32_X64_ASLDLINK_FLAGS = > DEF(GCC_IA32_X64_DLINK_COMMON) --entry _ReferenceAcpiTable -u > $(IMAGE_ENTRY_POINT) > DEFINE GCC_ARM_ASLDLINK_FLAGS = DEF(GCC_ARM_DLINK_FLAGS) - > Wl,--entry,ReferenceAcpiTable -u $(IMAGE_ENTRY_POINT) > DEF(GCC_ARM_AARCH64_ASLDLINK_FLAGS) >
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 13/33] BaseTools: BaseTools changes for LoongArch platform.
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Chao Li
> Sent: Wednesday, February 9, 2022 2:55 PM
> To: devel@edk2.groups.io
> Cc: Bob Feng ; Liming Gao
> ; Yuwei Chen ; Baoqi
> Zhang
> Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 13/33]
> BaseTools: BaseTools changes for LoongArch platform.
>
> C code changes for building EDK2 LoongArch platform.
>
> Cc: Bob Feng
> Cc: Liming Gao
> Cc: Yuwei Chen
>
> Signed-off-by: Chao Li
> Co-authored-by: Baoqi Zhang
> ---
> BaseTools/Source/C/Common/BasePeCoff.c| 15 +-
> BaseTools/Source/C/Common/PeCoffLoaderEx.c| 76 +
> BaseTools/Source/C/GenFv/GenFvInternalLib.c | 128 ++-
> BaseTools/Source/C/GenFw/Elf64Convert.c | 153 +-
> BaseTools/Source/C/GenFw/elf_common.h | 58 +++
> .../C/Include/IndustryStandard/PeImage.h | 57 ---
> 6 files changed, 454 insertions(+), 33 deletions(-)
>
> diff --git a/BaseTools/Source/C/Common/BasePeCoff.c
> b/BaseTools/Source/C/Common/BasePeCoff.c
> index 62fbb2985c..30400d1341 100644
> --- a/BaseTools/Source/C/Common/BasePeCoff.c
> +++ b/BaseTools/Source/C/Common/BasePeCoff.c
> @@ -5,6 +5,7 @@
> Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.
> Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
> Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All
> rights reserved.
> +Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All
> rights reserved.
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> **/
> @@ -68,6 +69,14 @@ PeCoffLoaderRelocateRiscVImage (
>IN UINT64 Adjust
>);
>
> +RETURN_STATUS
> +PeCoffLoaderRelocateLoongArch64Image (
> + IN UINT16 *Reloc,
> + IN OUT CHAR8 *Fixup,
> + IN OUT CHAR8 **FixupData,
> + IN UINT64 Adjust
> + );
> +
> STATIC
> RETURN_STATUS
> PeCoffLoaderGetPeHeader (
> @@ -184,7 +193,8 @@ Returns:
>ImageContext->Machine != EFI_IMAGE_MACHINE_ARMT && \
>ImageContext->Machine != EFI_IMAGE_MACHINE_EBC && \
>ImageContext->Machine != EFI_IMAGE_MACHINE_AARCH64 && \
> - ImageContext->Machine != EFI_IMAGE_MACHINE_RISCV64) {
> + ImageContext->Machine != EFI_IMAGE_MACHINE_RISCV64 && \
> + ImageContext->Machine != EFI_IMAGE_MACHINE_LOONGARCH64) {
> if (ImageContext->Machine == IMAGE_FILE_MACHINE_ARM) {
>//
>// There are two types of ARM images. Pure ARM and ARM/Thumb.
> @@ -815,6 +825,9 @@ Returns:
> case EFI_IMAGE_MACHINE_RISCV64:
>Status = PeCoffLoaderRelocateRiscVImage (Reloc, Fixup, ,
> Adjust);
>break;
> +case EFI_IMAGE_MACHINE_LOONGARCH64:
> + Status = PeCoffLoaderRelocateLoongArch64Image (Reloc, Fixup,
> , Adjust);
> + break;
> default:
>Status = RETURN_UNSUPPORTED;
>break;
> diff --git a/BaseTools/Source/C/Common/PeCoffLoaderEx.c
> b/BaseTools/Source/C/Common/PeCoffLoaderEx.c
> index 799f282970..b50ce8bdef 100644
> --- a/BaseTools/Source/C/Common/PeCoffLoaderEx.c
> +++ b/BaseTools/Source/C/Common/PeCoffLoaderEx.c
> @@ -4,6 +4,7 @@ IA32 and X64 Specific relocation fixups
> Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.
> Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
> Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.
> +Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> reserved.
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> --*/
> @@ -332,3 +333,78 @@ PeCoffLoaderRelocateArmImage (
>
>return RETURN_SUCCESS;
> }
> +
> +/**
> + Performs a LoongArch specific relocation fixup.
> +
> + @param Reloc Pointer to the relocation record.
> + @param Fixup Pointer to the address to fix up.
> + @param FixupData Pointer to a buffer to log the fixups.
> + @param Adjust The offset to adjust the fixup.
> +
> + @return Status code.
> +**/
> +RETURN_STATUS
> +PeCoffLoaderRelocateLoongArch64Image (
> + IN UINT16 *Reloc,
> + IN OUT CHAR8 *Fixup,
> + IN OUT CHAR8 **FixupData,
> + IN UINT64 Adjust
> + )
> +{
> + UINT8 RelocType;
> + UINT64 Value = 0;
> + UINT64 Tmp1 = 0;
> + UINT64 Tmp2 = 0;
> +
> + RelocType = ((*Reloc) >> 12);
> +
> + switch (RelocType) {
> +case EFI_IMAGE_REL_BASED_LOONGARCH64_MARK_LA:
> + /* The next four instructions are used to load a 64 bit address, we
> change it together*/
> + Value = (*(UINT32*)Fixup & 0x1e0) << 7 | /* lu12i.w 20bits
> from
> bit5 */
Please use double back slash for the comment in the function. So the comment in
the entire file look consistent. This applied to the changes in this patch.
> + (*((UINT32*)Fixup + 1) & 0x3ffc00) >> 10; /* ori 12bits from
> bit10 */
> + Tmp1 = *((UINT32*)Fixup + 2) & 0x1e0; /* lu32i.d 20bits
> from bit5
> */
> + Tmp2 = *((UINT32*)Fixup +
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 28/33] MdeModulePkg/Logo: Add LoongArch64 architecture.
Acked-by: Abner Chang > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 4:02 PM > To: devel@edk2.groups.io > Cc: Zhichao Gao ; Ray Ni > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 28/33] > MdeModulePkg/Logo: Add LoongArch64 architecture. > > Add LoongArch64 architecture to the Logo. > > Cc: Zhichao Gao > Cc: Ray Ni > > Signed-off-by: Chao Li > --- > MdeModulePkg/Logo/Logo.inf | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/MdeModulePkg/Logo/Logo.inf b/MdeModulePkg/Logo/Logo.inf > index 70a66cae98..294482ccdc 100644 > --- a/MdeModulePkg/Logo/Logo.inf > +++ b/MdeModulePkg/Logo/Logo.inf > @@ -3,6 +3,7 @@ > # > # Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved. > # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights > reserved. > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > > # > # SPDX-License-Identifier: BSD-2-Clause-Patent > @@ -21,7 +22,7 @@ > # > # The following information is for reference only and not required by the > build tools. > # > -# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64 > +# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64 > LOONGARCH64 > # > > [Binaries] > -- > 2.27.0 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88541): https://edk2.groups.io/g/devel/message/88541 Mute This Topic: https://groups.io/mt/89017512/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 31/33] NetworkPkg: Add LoongArch64 architecture.
Acked-by: Abner Chang > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 4:02 PM > To: devel@edk2.groups.io > Cc: Maciej Rabeda ; Jiaxin Wu > ; Siyuan Fu > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 31/33] > NetworkPkg: Add LoongArch64 architecture. > > Add LoongArch64 architecture in to NetworkPkg. > > Cc: Maciej Rabeda > Cc: Jiaxin Wu > Cc: Siyuan Fu > > Signed-off-by: Chao Li > --- > NetworkPkg/Network.dsc.inc | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/NetworkPkg/Network.dsc.inc b/NetworkPkg/Network.dsc.inc > index 99fad885bf..04b515a0bb 100644 > --- a/NetworkPkg/Network.dsc.inc > +++ b/NetworkPkg/Network.dsc.inc > @@ -9,6 +9,7 @@ > # > # Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved. > # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights > reserved. > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > # > #SPDX-License-Identifier: BSD-2-Clause-Patent > # > @@ -38,7 +39,7 @@ > !include NetworkPkg/NetworkComponents.dsc.inc > > !else > -[Components.IA32, Components.X64, Components.ARM, > Components.AARCH64, Components.RISCV64] > +[Components.IA32, Components.X64, Components.ARM, > Components.AARCH64, Components.RISCV64, Components.LOONGARCH64] > !include NetworkPkg/NetworkComponents.dsc.inc > > !endif > -- > 2.27.0 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88540): https://edk2.groups.io/g/devel/message/88540 Mute This Topic: https://groups.io/mt/89017518/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 29/33] MdeModulePkg/CapsuleRuntimeDxe: Add LoongArch64 architecture.
Acked-by: Abner Chang > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 4:02 PM > To: devel@edk2.groups.io > Cc: Liming Gao ; Guomin Jiang > > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 29/33] > MdeModulePkg/CapsuleRuntimeDxe: Add LoongArch64 architecture. > > Add LoongArch in INF for building CapsuleRuntimeDxe LoongArch64 image. > > Cc: Liming Gao > Cc: Guomin Jiang > > Sigend-off-by: Chao Li > --- > .../Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf| 9 + > 1 file changed, 5 insertions(+), 4 deletions(-) > > diff --git > a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > index 8bf5035a69..601eada170 100644 > --- > a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > +++ > b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > @@ -6,6 +6,7 @@ > # > # Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved. > # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights > reserved. > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > ## > @@ -22,20 +23,20 @@ > # > # The following information is for reference only and not required by the > build tools. > # > -# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64 > +# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64 > LOONGARCH64 > # > > [Sources] >CapsuleService.c >CapsuleService.h > > -[Sources.Ia32, Sources.EBC, Sources.ARM, Sources.AARCH64, > Sources.RISCV64] > +[Sources.Ia32, Sources.EBC, Sources.ARM, Sources.AARCH64, > Sources.RISCV64, Sources.LOONGARCH64] >SaveLongModeContext.c > > -[Sources.Ia32, Sources.X64, Sources.ARM, Sources.AARCH64, > Sources.RISCV64] > +[Sources.Ia32, Sources.X64, Sources.ARM, Sources.AARCH64, > Sources.RISCV64, Sources.LOONGARCH64] >CapsuleCache.c > > -[Sources.Ia32, Sources.X64, Sources.EBC, Sources.RISCV64] > +[Sources.Ia32, Sources.X64, Sources.EBC, Sources.RISCV64, > Sources.LOONGARCH64] >CapsuleReset.c > > [Sources.ARM, Sources.AARCH64] > -- > 2.27.0 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88539): https://edk2.groups.io/g/devel/message/88539 Mute This Topic: https://groups.io/mt/89017515/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 20/33] MdePkg/Include: LoongArch definitions.
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Chao Li
> Sent: Wednesday, February 9, 2022 2:56 PM
> To: devel@edk2.groups.io
> Cc: Michael D Kinney ; Liming Gao
> ; Zhiguang Liu
> Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 20/33]
> MdePkg/Include: LoongArch definitions.
>
> Add LoongArch processor related definitions.
>
> Cc: Michael D Kinney
> Cc: Liming Gao
> Cc: Zhiguang Liu
>
> Signed-off-by: Chao Li
> ---
> MdePkg/Include/IndustryStandard/PeImage.h | 9
> MdePkg/Include/Protocol/DebugSupport.h| 65
> ---
> MdePkg/Include/Protocol/PxeBaseCode.h | 3 ++
> MdePkg/Include/Uefi/UefiBaseType.h| 14 +
> MdePkg/Include/Uefi/UefiSpec.h| 16 +++---
> 5 files changed, 94 insertions(+), 13 deletions(-)
>
> diff --git a/MdePkg/Include/IndustryStandard/PeImage.h
> b/MdePkg/Include/IndustryStandard/PeImage.h
> index 3109dc20f8..3741f21719 100644
> --- a/MdePkg/Include/IndustryStandard/PeImage.h
> +++ b/MdePkg/Include/IndustryStandard/PeImage.h
> @@ -10,6 +10,7 @@
> Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
> Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> Portions Copyright (c) 2016 - 2020, Hewlett Packard Enterprise Development
> LP. All rights reserved.
> +Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All
> rights reserved.
>
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @@ -38,6 +39,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> #define IMAGE_FILE_MACHINE_RISCV32 0x5032
> #define IMAGE_FILE_MACHINE_RISCV64 0x5064
> #define IMAGE_FILE_MACHINE_RISCV1280x5128
> +#define IMAGE_FILE_MACHINE_LOONGARCH32 0x6232
> +#define IMAGE_FILE_MACHINE_LOONGARCH64 0x6264
Are those Loongarch machine types already defined in PeCoff spec? Could you
please point me to the spec?
The rest looks good to me.
Acked-by: Abner Chang
>
> //
> // EXE file formats
> @@ -503,6 +506,12 @@ typedef struct {
> #define EFI_IMAGE_REL_BASED_RISCV_LOW12I 7
> #define EFI_IMAGE_REL_BASED_RISCV_LOW12S 8
>
> +//
> +// Relocation types of LoongArch processor.
> +//
> +#define EFI_IMAGE_REL_BASED_LOONGARCH32_MARK_LA 8
> +#define EFI_IMAGE_REL_BASED_LOONGARCH64_MARK_LA 8
> +
> ///
> /// Line number format.
> ///
> diff --git a/MdePkg/Include/Protocol/DebugSupport.h
> b/MdePkg/Include/Protocol/DebugSupport.h
> index ec5b92a5c5..47e3a44410 100644
> --- a/MdePkg/Include/Protocol/DebugSupport.h
> +++ b/MdePkg/Include/Protocol/DebugSupport.h
> @@ -654,17 +654,68 @@ typedef struct {
>UINT64X31;
> } EFI_SYSTEM_CONTEXT_RISCV64;
>
> +//
> +// LoongArch processor exception types.
> +//
> +#define MAX_LOONGARCH_EXCEPTION 14
> +
> +typedef struct {
> + UINT64 R0;
> + UINT64 R1;
> + UINT64 R2;
> + UINT64 R3;
> + UINT64 R4;
> + UINT64 R5;
> + UINT64 R6;
> + UINT64 R7;
> + UINT64 R8;
> + UINT64 R9;
> + UINT64 R10;
> + UINT64 R11;
> + UINT64 R12;
> + UINT64 R13;
> + UINT64 R14;
> + UINT64 R15;
> + UINT64 R16;
> + UINT64 R17;
> + UINT64 R18;
> + UINT64 R19;
> + UINT64 R20;
> + UINT64 R21;
> + UINT64 R22;
> + UINT64 R23;
> + UINT64 R24;
> + UINT64 R25;
> + UINT64 R26;
> + UINT64 R27;
> + UINT64 R28;
> + UINT64 R29;
> + UINT64 R30;
> + UINT64 R31;
> +
> + UINT64 CRMD; // CuRrent MoDe information
> + UINT64 PRMD; // PRe-exception MoDe information
> + UINT64 EUEN; // Extended component Unit ENable
> + UINT64 MISC; // MISCellaneous controller
> + UINT64 ECFG; // Exception ConFiGuration
> + UINT64 ESTAT; // Exception STATus
> + UINT64 ERA; // Exception Return Address
> + UINT64 BADV; // BAD Virtual address
> + UINT64 BADI; // BAD Instruction
> +} EFI_SYSTEM_CONTEXT_LOONGARCH64;
> +
> ///
> /// Universal EFI_SYSTEM_CONTEXT definition.
> ///
> typedef union {
> - EFI_SYSTEM_CONTEXT_EBC*SystemContextEbc;
> - EFI_SYSTEM_CONTEXT_IA32 *SystemContextIa32;
> - EFI_SYSTEM_CONTEXT_X64*SystemContextX64;
> - EFI_SYSTEM_CONTEXT_IPF*SystemContextIpf;
> - EFI_SYSTEM_CONTEXT_ARM*SystemContextArm;
> - EFI_SYSTEM_CONTEXT_AARCH64*SystemContextAArch64;
> - EFI_SYSTEM_CONTEXT_RISCV64*SystemContextRiscV64;
> + EFI_SYSTEM_CONTEXT_EBC *SystemContextEbc;
> + EFI_SYSTEM_CONTEXT_IA32 *SystemContextIa32;
> + EFI_SYSTEM_CONTEXT_X64 *SystemContextX64;
> + EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf;
> + EFI_SYSTEM_CONTEXT_ARM *SystemContextArm;
> + EFI_SYSTE
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 19/33] MdePkg: Add LoongArch LOONGARCH64 binding
> -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:56 PM > To: devel@edk2.groups.io > Cc: Michael D Kinney ; Liming Gao > ; Zhiguang Liu ; Baoqi > Zhang ; Dongyan Qian > > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 19/33] MdePkg: > Add LoongArch LOONGARCH64 binding > > Add LOONGARCH64 sections in MdePkg.dec and LOONGARCH64 > ProcessorBind.h > > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Zhiguang Liu > > Signed-off-by: Chao Li > Co-authored-by: Baoqi Zhang > Co-authored-by: Dongyan Qian > --- > MdePkg/Include/LoongArch64/ProcessorBind.h | 121 > + > MdePkg/MdePkg.dec | 4 + > MdePkg/MdePkg.dsc | 3 +- > 3 files changed, 127 insertions(+), 1 deletion(-) > create mode 100644 MdePkg/Include/LoongArch64/ProcessorBind.h > > diff --git a/MdePkg/Include/LoongArch64/ProcessorBind.h > b/MdePkg/Include/LoongArch64/ProcessorBind.h > new file mode 100644 > index 00..a10481e285 > --- /dev/null > +++ b/MdePkg/Include/LoongArch64/ProcessorBind.h > @@ -0,0 +1,121 @@ > +/** @file > + Processor or Compiler specific defines and types for LoongArch > + > + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights > reserved. > + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#ifndef __PROCESSOR_BIND_H__ > +#define __PROCESSOR_BIND_H__ Please remove the leading "_" and only keep one trailing "_" to follow the edk2 coding standard. RISC-V ProcessorBind.h has the mistake. Abner > + > +// > +// Define the processor type so other code can make processor based > choices > +// > +#define MDE_CPU_LOONGARCH64 > + > +#define EFIAPI > + > +// > +// Make sure we are using the correct packing rules per EFI specification > +// > +#ifndef __GNUC__ > +#pragma pack() > +#endif > + > +// > +// Assume standard LoongArch 64-bit alignment. > +// Need to check portability of long long > +// > +typedef unsigned long UINT64; > +typedef longINT64; > +typedef unsigned intUINT32; > +typedef int INT32; > +typedef unsigned short UINT16; > +typedef unsigned short CHAR16; > +typedef short INT16; > +typedef unsigned char BOOLEAN; > +typedef unsigned char UINT8; > +typedef charCHAR8; > +typedef charINT8; > + > +// > +// Unsigned value of native width. (4 bytes on supported 32-bit processor > instructions, > +// 8 bytes on supported 64-bit processor instructions) > +// > + > +typedef UINT64 UINTN; > + > +// > +// Signed value of native width. (4 bytes on supported 32-bit processor > instructions, > +// 8 bytes on supported 64-bit processor instructions) > +// > +typedef INT64 INTN; > + > +// > +// Processor specific defines > +// > + > +// > +// A value of native width with the highest bit set. > +// > +#define MAX_BIT 0x8000ULL > +// > +// A value of native width with the two highest bits set. > +// > +#define MAX_2_BITS 0xC000ULL > + > +// > +// Maximum legal LoongArch 64-bit address > +// > +#define MAX_ADDRESS 0xULL > + > +// > +// Maximum usable address at boot time (48 bits using 4KB pages) > +// > +#define MAX_ALLOC_ADDRESS 0xULL > + > + > +// > +// Maximum legal LoongArch 64-bit INTN and UINTN values. > +// > +#define MAX_INTN ((INTN)0x7FFFULL) > +#define MAX_UINTN ((UINTN)0xULL) > + > +// > +// Page allocation granularity for LoongArch > +// > +#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000) > +#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x1) > + > +#if defined(__GNUC__) > + // > + // For GNU assembly code, .global or .globl can declare global symbols. > + // Define this macro to unify the usage. > + // > + #define ASM_GLOBAL .globl > +#endif > + > +// > +// The stack alignment required for LoongArch > +// > +#define CPU_STACK_ALIGNMENT 16 > + > +/** > + Return the pointer to the first instruction of a function given a function > pointer. > + On LOONGARCH CPU architectures, these two pointer values are the same, > + so the implementation of this macro is very simple. > + > + @param FunctionPointer A pointer to a function. > + > + @return The pointer to the first instruction of a function given a function > pointer. > + > +**/ > +#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID > *)(UINTN)(FunctionPointer) > + > +#ifndef __USER_LABEL_PREFIX__ > +#define __USER_LABEL_PREFIX__ > +#endif > + > +#endif > diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec > index 59b405928b..18d42047e9 100644 > --- a/MdePkg/MdePkg.dec > +++ b/MdePkg/MdePkg.dec > @@ -7,6 +7,7 @@ > # Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved. > # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved. > # (C) Copyright 2016 - 2021 Hewlett Packard Enterprise Development LP > +# Copyright (c) 2022
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 18/33] .pytool: Add LoongArch64 architecture on LoongArch64 EDK2 CI.
Acked-by: Abner Chang
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Chao Li
> Sent: Wednesday, February 9, 2022 2:55 PM
> To: devel@edk2.groups.io
> Cc: Michael D Kinney ; Liming Gao
>
> Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 18/33] .pytool:
> Add LoongArch64 architecture on LoongArch64 EDK2 CI.
>
> Add LoongArch64 architecture on LoongArch64 EDK2 CI testing.
>
> Cc: Michael D Kinney
> Cc: Liming Gao
>
> Signed-off-by: Chao Li
> ---
> .pytool/CISettings.py | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/.pytool/CISettings.py b/.pytool/CISettings.py
> index ce330e2c73..22f84a8105 100644
> --- a/.pytool/CISettings.py
> +++ b/.pytool/CISettings.py
> @@ -78,7 +78,8 @@ class Settings(CiBuildSettingsManager,
> UpdateSettingsManager, SetupSettingsManag
> "X64",
> "ARM",
> "AARCH64",
> -"RISCV64")
> +"RISCV64",
> +"LOONGARCH64")
>
> def GetTargetsSupported(self):
> ''' return iterable of edk2 target tags supported by this build '''
> @@ -169,6 +170,8 @@ class Settings(CiBuildSettingsManager,
> UpdateSettingsManager, SetupSettingsManag
> scopes += ("gcc_arm_linux",)
> if "RISCV64" in self.ActualArchitectures:
> scopes += ("gcc_riscv64_unknown",)
> +if "LOONGARCH64" in self.ActualArchitectures:
> +scopes += ("gcc_loongarch64_unknown_linux",)
> self.ActualScopes = scopes
> return self.ActualScopes
>
> --
> 2.27.0
>
>
>
>
>
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Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 17/33] .azurepipelines: Add LoongArch64 architecture on LoongArch64 EDK2 CI.
Acked-by: Abner Chang > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:55 PM > To: devel@edk2.groups.io > Cc: Michael D Kinney ; Liming Gao > > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 > 17/33] .azurepipelines: Add LoongArch64 architecture on LoongArch64 EDK2 > CI. > > Add LoongArch64 architecture on LoongArch64 EDK2 CI. > > Cc: Michael D Kinney > Cc: Liming Gao > > Signed-off-by: Chao Li > --- > .azurepipelines/Ubuntu-GCC5.yml | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/.azurepipelines/Ubuntu-GCC5.yml b/.azurepipelines/Ubuntu- > GCC5.yml > index 3760c6efe1..1acd8d2a46 100644 > --- a/.azurepipelines/Ubuntu-GCC5.yml > +++ b/.azurepipelines/Ubuntu-GCC5.yml > @@ -3,6 +3,7 @@ > # > # Copyright (c) Microsoft Corporation. > # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights > reserved. > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > # SPDX-License-Identifier: BSD-2-Clause-Patent > ## > trigger: > @@ -17,5 +18,5 @@ jobs: >parameters: > tool_chain_tag: 'GCC5' > vm_image: 'ubuntu-latest' > -arch_list: "IA32,X64,ARM,AARCH64,RISCV64" > +arch_list: "IA32,X64,ARM,AARCH64,RISCV64,LOONGARCH64" > > -- > 2.27.0 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88534): https://edk2.groups.io/g/devel/message/88534 Mute This Topic: https://groups.io/mt/89016989/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 12/33] .python/SpellCheck: Add "Loongson" and "LOONGARCH" to "words" section
Acked-by: Abner Chang > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:55 PM > To: devel@edk2.groups.io > Cc: Michael D Kinney ; Liming Gao > > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 > 12/33] .python/SpellCheck: Add "Loongson" and "LOONGARCH" to "words" > section > > Add Loongson and LOONGARCH to "words" section in cspell.base.yaml file > to avoid spelling check error. > > Cc: Michael D Kinney > Cc: Liming Gao > > Signed-off-by: Chao Li > --- > .pytool/Plugin/SpellCheck/cspell.base.yaml | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/.pytool/Plugin/SpellCheck/cspell.base.yaml > b/.pytool/Plugin/SpellCheck/cspell.base.yaml > index ad6f7ac06a..aa985cd59a 100644 > --- a/.pytool/Plugin/SpellCheck/cspell.base.yaml > +++ b/.pytool/Plugin/SpellCheck/cspell.base.yaml > @@ -178,6 +178,8 @@ > "vcruntimed", > "ucrtd", > "msvcrtd", > -"XIPFLAGS" > +"XIPFLAGS", > +"Loongson", > +"LOONGARCH" > ] > } > -- > 2.27.0 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88533): https://edk2.groups.io/g/devel/message/88533 Mute This Topic: https://groups.io/mt/89016982/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 11/33] MdeModulePkg: Use LockBoxNullLib for LOONGARCH64
Acked-by: Abner Chang > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:55 PM > To: devel@edk2.groups.io > Cc: Jian J Wang ; Liming Gao > > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 11/33] > MdeModulePkg: Use LockBoxNullLib for LOONGARCH64 > > LoongArch doesn't have SMM by now. > > Cc: Jian J Wang > Cc: Liming Gao > > Signed-off-by: Chao Li > --- > MdeModulePkg/MdeModulePkg.dsc | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/MdeModulePkg/MdeModulePkg.dsc > b/MdeModulePkg/MdeModulePkg.dsc > index b1d8346186..6807e09648 100644 > --- a/MdeModulePkg/MdeModulePkg.dsc > +++ b/MdeModulePkg/MdeModulePkg.dsc > @@ -15,7 +15,7 @@ >PLATFORM_VERSION = 0.98 >DSC_SPECIFICATION = 0x00010005 >OUTPUT_DIRECTORY = Build/MdeModule > - SUPPORTED_ARCHITECTURES= > IA32|X64|EBC|ARM|AARCH64|RISCV64 > + SUPPORTED_ARCHITECTURES= > IA32|X64|EBC|ARM|AARCH64|RISCV64|LOONGARCH64 >BUILD_TARGETS = DEBUG|RELEASE|NOOPT >SKUID_IDENTIFIER = DEFAULT > > @@ -191,7 +191,7 @@ ># >NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf > > -[LibraryClasses.EBC, LibraryClasses.RISCV64] > +[LibraryClasses.EBC, LibraryClasses.RISCV64, LibraryClasses.LOONGARCH64] >LockBoxLib|MdeModulePkg/Library/LockBoxNullLib/LockBoxNullLib.inf > > [PcdsFeatureFlag] > -- > 2.27.0 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88532): https://edk2.groups.io/g/devel/message/88532 Mute This Topic: https://groups.io/mt/89016980/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 10/33] MdePkg/DxeServicesLib: Add LOONGARCH64 architecture
Acked-by: Abner Chang > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:55 PM > To: devel@edk2.groups.io > Cc: Michael D Kinney ; Liming Gao > ; Zhiguang Liu > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 10/33] > MdePkg/DxeServicesLib: Add LOONGARCH64 architecture > > Add LOONGARCH64 architecture to MdePkg/DxeServiceLib. > > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Zhiguang Liu > > Signed-off-by: Chao Li > --- > MdePkg/Library/DxeServicesLib/DxeServicesLib.inf | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > b/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > index ec3e8711c2..a93541847f 100644 > --- a/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > +++ b/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > @@ -22,13 +22,13 @@ >LIBRARY_CLASS = DxeServicesLib|DXE_CORE DXE_DRIVER > DXE_RUNTIME_DRIVER DXE_SMM_DRIVER SMM_CORE UEFI_APPLICATION > UEFI_DRIVER > > # > -# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64 > +# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64 > LOONGARCH64 > # > > [Sources] >DxeServicesLib.c > > -[Sources.IA32, Sources.EBC, Sources.ARM, Sources.AARCH64, > Sources.RISCV64] > +[Sources.IA32, Sources.EBC, Sources.ARM, Sources.AARCH64, > Sources.RISCV64, Sources.LOONGARCH64] >Allocate.c > > [Sources.X64] > -- > 2.27.0 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88531): https://edk2.groups.io/g/devel/message/88531 Mute This Topic: https://groups.io/mt/89016979/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 08/33] ShellPkg: Add LOONGARCH64 architecture for EDK2 CI.
Acked-by: Abner Chang > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:53 PM > To: devel@edk2.groups.io > Cc: Ray Ni ; Zhichao Gao > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 08/33] ShellPkg: > Add LOONGARCH64 architecture for EDK2 CI. > > Add LOONGARCH64 architecture to ShellPkg for EDK2 CI testing. > > Cc: Ray Ni > Cc: Zhichao Gao > > Signed-off-by: Chao Li > --- > ShellPkg/ShellPkg.dsc | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/ShellPkg/ShellPkg.dsc b/ShellPkg/ShellPkg.dsc > index 38fde3dc71..dd0d88603f 100644 > --- a/ShellPkg/ShellPkg.dsc > +++ b/ShellPkg/ShellPkg.dsc > @@ -4,6 +4,7 @@ > # Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved. > # Copyright (c) 2018 - 2020, Arm Limited. All rights reserved. > # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights > reserved. > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > # > #SPDX-License-Identifier: BSD-2-Clause-Patent > # > @@ -15,7 +16,7 @@ >PLATFORM_VERSION = 1.02 >DSC_SPECIFICATION = 0x00010006 >OUTPUT_DIRECTORY = Build/Shell > - SUPPORTED_ARCHITECTURES= > IA32|X64|EBC|ARM|AARCH64|RISCV64 > + SUPPORTED_ARCHITECTURES= > IA32|X64|EBC|ARM|AARCH64|RISCV64|LOONGARCH64 >BUILD_TARGETS = DEBUG|RELEASE|NOOPT >SKUID_IDENTIFIER = DEFAULT > > -- > 2.27.0 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88530): https://edk2.groups.io/g/devel/message/88530 Mute This Topic: https://groups.io/mt/89016972/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 07/33] SecurityPkg: Add LOONGARCH64 architecture for EDK2 CI.
Acked-by: Abner Chang > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:53 PM > To: devel@edk2.groups.io > Cc: Jiewen Yao ; Jian J Wang > > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 07/33] > SecurityPkg: Add LOONGARCH64 architecture for EDK2 CI. > > Add LOONGARCH64 architecture to SecurityPkg for EDK2 CI testing. > > Cc: Jiewen Yao > Cc: Jian J Wang > > Signed-off-by: Chao Li > --- > SecurityPkg/SecurityPkg.dsc | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/SecurityPkg/SecurityPkg.dsc b/SecurityPkg/SecurityPkg.dsc > index 73a93c2285..d96ac06b7d 100644 > --- a/SecurityPkg/SecurityPkg.dsc > +++ b/SecurityPkg/SecurityPkg.dsc > @@ -3,6 +3,7 @@ > # > # Copyright (c) 2009 - 2021, Intel Corporation. All rights reserved. > # (C) Copyright 2015-2020 Hewlett Packard Enterprise Development LP > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > ## > @@ -13,7 +14,7 @@ >PLATFORM_VERSION = 0.98 >DSC_SPECIFICATION = 0x00010005 >OUTPUT_DIRECTORY = Build/SecurityPkg > - SUPPORTED_ARCHITECTURES= > IA32|X64|EBC|ARM|AARCH64|RISCV64 > + SUPPORTED_ARCHITECTURES= > IA32|X64|EBC|ARM|AARCH64|RISCV64|LOONGARCH64 >BUILD_TARGETS = DEBUG|RELEASE|NOOPT >SKUID_IDENTIFIER = DEFAULT > > -- > 2.27.0 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88529): https://edk2.groups.io/g/devel/message/88529 Mute This Topic: https://groups.io/mt/89016971/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 06/33] MdePkg/Include: Add LOONGARCH related definitions EDK2 CI.
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Chao Li
> Sent: Wednesday, February 9, 2022 2:53 PM
> To: devel@edk2.groups.io
> Cc: Michael D Kinney ; Liming Gao
> ; Zhiguang Liu
> Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 06/33]
> MdePkg/Include: Add LOONGARCH related definitions EDK2 CI.
>
> HTTP/PXE boot LOONGARCH64 related definitions for EDK2 CI.
>
> Cc: Michael D Kinney
> Cc: Liming Gao
> Cc: Zhiguang Liu
>
> Signed-off-by: Chao Li
> ---
> MdePkg/Include/IndustryStandard/Dhcp.h | 41 +++--
> -
> 1 file changed, 23 insertions(+), 18 deletions(-)
>
> diff --git a/MdePkg/Include/IndustryStandard/Dhcp.h
> b/MdePkg/Include/IndustryStandard/Dhcp.h
> index f209f1b2eb..086d24422d 100644
> --- a/MdePkg/Include/IndustryStandard/Dhcp.h
> +++ b/MdePkg/Include/IndustryStandard/Dhcp.h
> @@ -4,6 +4,7 @@
>
>Copyright (c) 2016, Intel Corporation. All rights reserved.
>Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.
> + Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> reserved.
>SPDX-License-Identifier: BSD-2-Clause-Patent
> **/
>
> @@ -259,24 +260,28 @@ typedef enum {
> /// These identifiers are defined by IETF:
> ///
> INVALID URI REMOVED
> parameters/dhcpv6-
> parameters.xml__;!!NpxR!0va5dmepVxLVdaIQNLVUzW3iUkyqR_DNS1s_0Hz
> MksU2GzARlun433ILnBSn8MM$
The original link
(http://www.ietf.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml) to
DHCP parameter seems no longer exist? I can now see these architecture in below
link,
https://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xhtml
Could you please confirm this? We can also update the link if necessary.
Acked-by: Abner Chang
Thanks
Abner
> ///
> -#define PXE_CLIENT_ARCH_X86_BIOS 0x /// x86 BIOS for PXE
> -#define PXE_CLIENT_ARCH_IPF 0x0002 /// Itanium for PXE
> -#define PXE_CLIENT_ARCH_IA32 0x0006 /// x86 uefi for PXE
> -#define PXE_CLIENT_ARCH_X64 0x0007 /// x64 uefi for PXE
> -#define PXE_CLIENT_ARCH_EBC 0x0009 /// EBC for PXE
> -#define PXE_CLIENT_ARCH_ARM 0x000A /// Arm uefi 32 for PXE
> -#define PXE_CLIENT_ARCH_AARCH64 0x000B /// Arm uefi 64 for PXE
> -#define PXE_CLIENT_ARCH_RISCV32 0x0019 /// RISC-V uefi 32 for PXE
> -#define PXE_CLIENT_ARCH_RISCV64 0x001B /// RISC-V uefi 64 for PXE
> -#define PXE_CLIENT_ARCH_RISCV128 0x001D /// RISC-V uefi 128 for
> PXE
> +#define PXE_CLIENT_ARCH_X86_BIOS 0x /// x86 BIOS for PXE
> +#define PXE_CLIENT_ARCH_IPF 0x0002 /// Itanium for PXE
> +#define PXE_CLIENT_ARCH_IA32 0x0006 /// x86 uefi for PXE
> +#define PXE_CLIENT_ARCH_X64 0x0007 /// x64 uefi for PXE
> +#define PXE_CLIENT_ARCH_EBC 0x0009 /// EBC for PXE
> +#define PXE_CLIENT_ARCH_ARM 0x000A /// Arm uefi 32 for PXE
> +#define PXE_CLIENT_ARCH_AARCH64 0x000B /// Arm uefi 64 for
> PXE
> +#define PXE_CLIENT_ARCH_RISCV32 0x0019 /// RISC-V uefi 32 for
> PXE
> +#define PXE_CLIENT_ARCH_RISCV64 0x001B /// RISC-V uefi 64 for
> PXE
> +#define PXE_CLIENT_ARCH_RISCV128 0x001D /// RISC-V uefi 128 for
> PXE
> +#define PXE_CLIENT_ARCH_LOONGARCH32 0x0025 /// LOONGARCH
> uefi 32 for PXE
> +#define PXE_CLIENT_ARCH_LOONGARCH64 0x0027 /// LOONGARCH
> uefi 64 for PXE
>
> -#define HTTP_CLIENT_ARCH_IA32 0x000F /// x86 uefi boot from
> http
> -#define HTTP_CLIENT_ARCH_X64 0x0010 /// x64 uefi boot from
> http
> -#define HTTP_CLIENT_ARCH_EBC 0x0011 /// EBC boot from http
> -#define HTTP_CLIENT_ARCH_ARM 0x0012 /// Arm uefi 32 boot from
> http
> -#define HTTP_CLIENT_ARCH_AARCH64 0x0013 /// Arm uefi 64 boot
> from http
> -#define HTTP_CLIENT_ARCH_RISCV32 0x001A /// RISC-V uefi 32 boot
> from http
> -#define HTTP_CLIENT_ARCH_RISCV64 0x001C /// RISC-V uefi 64 boot
> from http
> -#define HTTP_CLIENT_ARCH_RISCV128 0x001E /// RISC-V uefi 128 boot
> from http
> +#define HTTP_CLIENT_ARCH_IA32 0x000F /// x86 uefi boot from
> http
> +#define HTTP_CLIENT_ARCH_X64 0x0010 /// x64 uefi boot from
> http
> +#define HTTP_CLIENT_ARCH_EBC 0x0011 /// EBC boot from http
> +#define HTTP_CLIENT_ARCH_ARM 0x0012 /// Arm uefi 32 boot
> from http
> +#define HTTP_CLIENT_ARCH_AARCH64 0x0013 /// Arm uefi 64 boot
> from h
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 05/33] CryptoPkg: Add LOONGARCH64 architecture for EDK2 CI.
Acked-by: Abner Chang > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:53 PM > To: devel@edk2.groups.io > Cc: Jiewen Yao ; Jian J Wang > ; Xiaoyu Lu ; Guomin Jiang > > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 05/33] > CryptoPkg: Add LOONGARCH64 architecture for EDK2 CI. > > Add LOONGARCH64 architecture for EDK2 CI testing. > > Cc: Jiewen Yao > Cc: Jian J Wang > Cc: Xiaoyu Lu > Cc: Guomin Jiang > > Signed-off-by: Chao Li > --- > CryptoPkg/CryptoPkg.dsc | 3 ++- > CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf | 6 +- > CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf | 4 > CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf | 3 ++- > CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf | 3 ++- > CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf | 3 ++- > CryptoPkg/Library/Include/CrtLibSupport.h | 3 ++- > CryptoPkg/Library/OpensslLib/OpensslLib.inf | 2 ++ > CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf | 2 ++ > CryptoPkg/Library/TlsLib/TlsLib.inf | 3 ++- > CryptoPkg/Library/TlsLibNull/TlsLibNull.inf | 3 ++- > 11 files changed, 27 insertions(+), 8 deletions(-) > > diff --git a/CryptoPkg/CryptoPkg.dsc b/CryptoPkg/CryptoPkg.dsc > index 0aa72ed878..f7170c6719 100644 > --- a/CryptoPkg/CryptoPkg.dsc > +++ b/CryptoPkg/CryptoPkg.dsc > @@ -4,6 +4,7 @@ > # > # Copyright (c) 2009 - 2021, Intel Corporation. All rights reserved. > # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights > reserved. > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > ## > @@ -19,7 +20,7 @@ >PLATFORM_VERSION = 0.98 >DSC_SPECIFICATION = 0x00010005 >OUTPUT_DIRECTORY = Build/CryptoPkg > - SUPPORTED_ARCHITECTURES= IA32|X64|ARM|AARCH64|RISCV64 > + SUPPORTED_ARCHITECTURES= > IA32|X64|ARM|AARCH64|RISCV64|LOONGARCH64 >BUILD_TARGETS = DEBUG|RELEASE|NOOPT >SKUID_IDENTIFIER = DEFAULT > > diff --git a/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf > b/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf > index 49703fa4c9..fcc2f28701 100644 > --- a/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf > +++ b/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf > @@ -8,6 +8,7 @@ > # > # Copyright (c) 2009 - 2020, Intel Corporation. All rights reserved. > # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights > reserved. > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > ## > @@ -24,7 +25,7 @@ > # > # The following information is for reference only and not required by the > build tools. > # > -# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64 > +# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64 RISCV64 > LOONGARCH64 > # > > [Sources] > @@ -73,6 +74,9 @@ > [Sources.RISCV64] >Rand/CryptRand.c > > +[Sources.LOONGARCH64] > + Rand/CryptRand.c > + > [Packages] >MdePkg/MdePkg.dec >CryptoPkg/CryptoPkg.dec > diff --git a/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf > b/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf > index fdbb6edfd2..c76ec56e86 100644 > --- a/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf > +++ b/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf > @@ -13,6 +13,7 @@ > # > # Copyright (c) 2009 - 2021, Intel Corporation. All rights reserved. > # Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights > reserved. > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > ## > @@ -78,6 +79,9 @@ > [Sources.RISCV64] >Rand/CryptRand.c > > +[Sources.LOONGARCH64] > + Rand/CryptRand.c > + > [Packages] >MdePkg/MdePkg.dec >CryptoPkg/CryptoPkg.dec > diff --git a/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf > b/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf > index faf959827b..271b29819c 100644 > --- a/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf > +++ b/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf > @@ -8,6 +8,7 @@ > # > # Copyright (c) 2009 - 2020, Intel Corporation. All rights reserved. > # Copyright (c) 2020, Hewlett Packard Ente
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 00/33] Add a new architecture called LoongArch in EDK II
Hi Li, I found there is no 9/33 of the RESEND patch. Is that I miss it? Regards, Abner > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:51 PM > To: devel@edk2.groups.io > Cc: Ray Ni ; Liming Gao ; > Michael D Kinney ; Guomin Jiang > ; Wei6 Xu ; Maciej Rabeda > ; Jiaxin Wu ; Siyuan > Fu ; Jiewen Yao ; Jian J Wang > ; Xiaoyu Lu ; Zhiguang Liu > ; Zhichao Gao ; Bob Feng > ; Yuwei Chen > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 00/33] Add a > new architecture called LoongArch in EDK II > > This new Arch should go through the EDK II Code First Process and then > the USWG can review our ECR. This commit contains 34 patchs, patch 0 is > the cover, patch 33 is Readme modification, and the others are the new > Arch support. > > Modified modules: FatPkg, FmpDevicePkg, NetworkPkg, > NetworkPkg/HttpBootDxe, CryptoPkg, MdePkg/Include, SecurityPkg, > ShellPkg, UnitTestFrameworkPkg, MdePkg/DxeServicesLib, MdeModulePkg, > .python/SpellCheck, BaseTools, .azurepipelines, .pytool, MdePkg, > MdeModulePkg. > > Cc: Ray Ni > Cc: Liming Gao > Cc: Michael D Kinney > Cc: Guomin Jiang > Cc: Wei6 Xu > Cc: Maciej Rabeda > Cc: Jiaxin Wu > Cc: Siyuan Fu > Cc: Jiewen Yao > Cc: Jian J Wang > Cc: Xiaoyu Lu > Cc: Zhiguang Liu > Cc: Zhichao Gao > Cc: Bob Feng > Cc: Yuwei Chen > > Chao Li (33): > FatPkg: Add LOONGARCH64 architecture for EDK2 CI. > FmpDevicePkg: Add LOONGARCH64 architecture for EDK2 CI. > NetworkPkg: Add LOONGARCH64 architecture for EDK2 CI. > NetworkPkg/HttpBootDxe: Add LOONGARCH64 architecture for EDK2 CI. > CryptoPkg: Add LOONGARCH64 architecture for EDK2 CI. > MdePkg/Include: Add LOONGARCH related definitions EDK2 CI. > SecurityPkg: Add LOONGARCH64 architecture for EDK2 CI. > ShellPkg: Add LOONGARCH64 architecture for EDK2 CI. > UnitTestFrameworkPkg: Add LOONGARCH64 architecture for EDK2 CI. > MdePkg/DxeServicesLib: Add LOONGARCH64 architecture > MdeModulePkg: Use LockBoxNullLib for LOONGARCH64 > .python/SpellCheck: Add "Loongson" and "LOONGARCH" to "words" section > BaseTools: BaseTools changes for LoongArch platform. > BaseTools: BaseTools changes for LoongArch platform. > BaseTools: BaseTools changes for LoongArch platform. > BaseTools: Enable LoongArch64 architecture for LoongArch64 EDK2 CI. > .azurepipelines: Add LoongArch64 architecture on LoongArch64 EDK2 CI. > .pytool: Add LoongArch64 architecture on LoongArch64 EDK2 CI. > MdePkg: Add LoongArch LOONGARCH64 binding > MdePkg/Include: LoongArch definitions. > MdePkg/BaseLib: BaseLib for LOONGARCH64 architecture. > MdePkg/BaseCacheMaintenanceLib: LoongArch cache maintenance > implementation. > MdePkg/BaseIoLibIntrinsic: IoLibNoIo for LoongArch architecture. > MdePkg/BasePeCoff: Add LoongArch PE/Coff related code. > MdePkg/BaseCpuLib: LoongArch Base CPU library implementation. > MdePkg/BaseSynchronizationLib: LoongArch cache related code. > MdePkg/BaseSafeIntLib: Add LoongArch64 architecture for > BaseSafeIntLib. > MdeModulePkg/Logo: Add LoongArch64 architecture. > MdeModulePkg/CapsuleRuntimeDxe: Add LoongArch64 architecture. > MdeModulePkg/DxeIplPeim : LoongArch DxeIPL implementation. > NetworkPkg: Add LoongArch64 architecture. > BaseTools: Add LoongArch64 binding. > Readme: Update the readme > > .azurepipelines/Ubuntu-GCC5.yml | 3 +- > .pytool/CISettings.py | 5 +- > .pytool/Plugin/SpellCheck/cspell.base.yaml| 4 +- > ...gcc_loongarch64_unknown_linux_ext_dep.yaml | 22 ++ > BaseTools/Conf/tools_def.template | 43 ++- > .../LinuxGcc5ToolChain/LinuxGcc5ToolChain.py | 31 +++ > BaseTools/Source/C/Common/BasePeCoff.c| 15 +- > BaseTools/Source/C/Common/PeCoffLoaderEx.c| 76 ++ > BaseTools/Source/C/GNUmakefile| 3 + > BaseTools/Source/C/GenFv/GenFvInternalLib.c | 128 - > BaseTools/Source/C/GenFw/Elf64Convert.c | 153 ++- > BaseTools/Source/C/GenFw/elf_common.h | 58 > .../C/Include/IndustryStandard/PeImage.h | 57 ++-- > .../C/Include/LoongArch64/ProcessorBind.h | 80 ++ > BaseTools/Source/Python/Common/DataType.py| 21 +- > .../Source/Python/UPT/Library/DataType.py | 24 +- > BaseTools/Source/Python/build/buildoptions.py | 3 +- > CryptoPkg/CryptoPkg.dsc | 3 +- > .../Library/BaseCryptLib/BaseCryptLib.inf | 6 +- > .../Library/BaseCryptLib/RuntimeCryptLib.inf | 4 + > .../BaseCryptLibNull/BaseCryptLibNull.inf | 3 +- > .../BaseCryptLibOnProtocolPpi/DxeCryptLib.inf | 3 +- > .../BaseCryptLibOnProtocolPpi/PeiCryptLib.inf | 3 +- > CryptoPkg/Library/Include/CrtLibSupport.h | 3 +- > CryptoPkg/Library/OpensslLib/OpensslLib.inf | 2 + > .../Library/OpensslLib/OpensslLibCrypto.inf | 2 + > CryptoPkg/Library/TlsLib/TlsLib.inf | 3 +- >
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 04/33] NetworkPkg/HttpBootDxe: Add LOONGARCH64 architecture for EDK2 CI.
Acked-by: Abner Chang > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:52 PM > To: devel@edk2.groups.io > Cc: Maciej Rabeda ; Jiaxin Wu > ; Siyuan Fu > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 04/33] > NetworkPkg/HttpBootDxe: Add LOONGARCH64 architecture for EDK2 CI. > > Add LOONGARCH architecture for EDK2 CI testing. > > Cc: Maciej Rabeda > Cc: Jiaxin Wu > Cc: Siyuan Fu > > Signed-off-by: Chao Li > --- > NetworkPkg/HttpBootDxe/HttpBootDhcp4.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h > b/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h > index d76f0e84d6..f00fabead2 100644 > --- a/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h > +++ b/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h > @@ -3,6 +3,7 @@ > > Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved. > Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights > reserved. > +Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > SPDX-License-Identifier: BSD-2-Clause-Patent > > **/ > @@ -40,6 +41,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent > #define EFI_HTTP_BOOT_CLIENT_SYSTEM_ARCHITECTURE > HTTP_CLIENT_ARCH_RISCV64 > #elif defined (MDE_CPU_EBC) > #define EFI_HTTP_BOOT_CLIENT_SYSTEM_ARCHITECTURE > HTTP_CLIENT_ARCH_EBC > +#elif defined (MDE_CPU_LOONGARCH64) > +#define EFI_HTTP_BOOT_CLIENT_SYSTEM_ARCHITECTURE > HTTP_CLIENT_ARCH_LOONGARCH64 > #endif > > /// DHCP offer types among HTTP boot. > -- > 2.27.0 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88492): https://edk2.groups.io/g/devel/message/88492 Mute This Topic: https://groups.io/mt/89016965/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 03/33] NetworkPkg: Add LOONGARCH64 architecture for EDK2 CI.
Acked-by: Abner Chang > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:52 PM > To: devel@edk2.groups.io > Cc: Maciej Rabeda ; Jiaxin Wu > ; Siyuan Fu > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 03/33] > NetworkPkg: Add LOONGARCH64 architecture for EDK2 CI. > > Add LOONGARCH64 architecture for EDK2 CI testing. > > Cc: Maciej Rabeda > Cc: Jiaxin Wu > Cc: Siyuan Fu > > Signed-off-by: Chao Li > --- > NetworkPkg/NetworkPkg.dsc | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/NetworkPkg/NetworkPkg.dsc b/NetworkPkg/NetworkPkg.dsc > index 762134023d..6c231c97b5 100644 > --- a/NetworkPkg/NetworkPkg.dsc > +++ b/NetworkPkg/NetworkPkg.dsc > @@ -4,6 +4,7 @@ > # (C) Copyright 2014 Hewlett-Packard Development Company, L.P. > # Copyright (c) 2009 - 2021, Intel Corporation. All rights reserved. > # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights > reserved. > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > #SPDX-License-Identifier: BSD-2-Clause-Patent > # > ## > @@ -14,7 +15,7 @@ >PLATFORM_VERSION = 0.98 >DSC_SPECIFICATION = 0x00010005 >OUTPUT_DIRECTORY = Build/NetworkPkg > - SUPPORTED_ARCHITECTURES= > IA32|X64|EBC|ARM|AARCH64|RISCV64 > + SUPPORTED_ARCHITECTURES= > IA32|X64|EBC|ARM|AARCH64|RISCV64|LOONGARCH64 >BUILD_TARGETS = DEBUG|RELEASE|NOOPT >SKUID_IDENTIFIER = DEFAULT > > -- > 2.27.0 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88491): https://edk2.groups.io/g/devel/message/88491 Mute This Topic: https://groups.io/mt/89016962/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 02/33] FmpDevicePkg: Add LOONGARCH64 architecture for EDK2 CI.
Acked-by: Abner Chang > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:52 PM > To: devel@edk2.groups.io > Cc: Liming Gao ; Michael D Kinney > ; Guomin Jiang ; Wei6 > Xu > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 02/33] > FmpDevicePkg: Add LOONGARCH64 architecture for EDK2 CI. > > Add LOONGARCH64 architecture for EDK2 CI testing. > > Cc: Liming Gao > Cc: Michael D Kinney > Cc: Guomin Jiang > Cc: Wei6 Xu > > Signed-off-by: Chao Li > --- > FmpDevicePkg/FmpDevicePkg.dsc | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/FmpDevicePkg/FmpDevicePkg.dsc > b/FmpDevicePkg/FmpDevicePkg.dsc > index 7b1af285dd..f9f26c54bb 100644 > --- a/FmpDevicePkg/FmpDevicePkg.dsc > +++ b/FmpDevicePkg/FmpDevicePkg.dsc > @@ -9,6 +9,7 @@ > # Copyright (c) Microsoft Corporation. > # Copyright (c) 2018 - 2021, Intel Corporation. All rights reserved. > # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights > reserved. > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > # > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > @@ -20,7 +21,7 @@ >PLATFORM_VERSION = 0.1 >DSC_SPECIFICATION = 0x00010005 >OUTPUT_DIRECTORY = Build/FmpDevicePkg > - SUPPORTED_ARCHITECTURES= IA32|X64|ARM|AARCH64|RISCV64 > + SUPPORTED_ARCHITECTURES= > IA32|X64|ARM|AARCH64|RISCV64|LOONGARCH64 >BUILD_TARGETS = DEBUG|RELEASE|NOOPT >SKUID_IDENTIFIER = DEFAULT > > -- > 2.27.0 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88434): https://edk2.groups.io/g/devel/message/88434 Mute This Topic: https://groups.io/mt/89016961/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 01/33] FatPkg: Add LOONGARCH64 architecture for EDK2 CI.
Acked-by: Abner Chang > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chao Li > Sent: Wednesday, February 9, 2022 2:52 PM > To: devel@edk2.groups.io > Cc: Ray Ni > Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 01/33] FatPkg: Add > LOONGARCH64 architecture for EDK2 CI. > > Add LOONGARCH64 architecture for EDK2 CI testing. > > Cc: Ray Ni > > Signed-off-by: Chao Li > --- > FatPkg/FatPkg.dsc | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/FatPkg/FatPkg.dsc b/FatPkg/FatPkg.dsc > index 4ddb5c3e00..c42059c59f 100644 > --- a/FatPkg/FatPkg.dsc > +++ b/FatPkg/FatPkg.dsc > @@ -5,6 +5,7 @@ > # for EDK II Prime release. > # Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved. > # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights > reserved. > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights > reserved. > # > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > @@ -15,7 +16,7 @@ >PLATFORM_GUID = 25b55dbc-9d0b-4a32-80da-46e1273d622c >PLATFORM_VERSION = 0.3 >DSC_SPECIFICATION = 0x00010005 > - SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64 > + SUPPORTED_ARCHITECTURES= > IA32|X64|EBC|ARM|AARCH64|RISCV64|LOONGARCH64 >OUTPUT_DIRECTORY = Build/Fat >BUILD_TARGETS = DEBUG|RELEASE|NOOPT >SKUID_IDENTIFIER = DEFAULT > -- > 2.27.0 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88433): https://edk2.groups.io/g/devel/message/88433 Mute This Topic: https://groups.io/mt/89016953/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v1 00/15] Merge UefiCpuLib to CpuLib
RISC-V port will follow this implementation.
Acked-by: Abner Chang
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Yu Pu
> Sent: Tuesday, March 29, 2022 2:37 PM
> To: devel@edk2.groups.io
> Cc: Yu Pu
> Subject: [edk2-devel] [PATCH v1 00/15] Merge UefiCpuLib to CpuLib
>
> REF:INVALID URI REMOVED.
> cgi?id=3394__;!!NpxR!xX2rZhlg2fzyUFxuyOaXIdXyQT_5yKUpj_ImUmTUQvQ
> cy3zCD4VRcBtL-uHKGxM$
>
> Today lots of duplicated code call CPUID and calculates the address
> mask. Adding an API named GetPhysicalAddressBits in UefiCpuLib can
> solve this problem, but at the same time cause MdeModulePkg depend
> on UefiCpuPkg which does not meet the design spec. So merge UefiCpuLib
> to CpuLib is a good way to sovle these problems. To minimize the impact,
> this operation is divided into four steps.
>
> Yu Pu (15):
> IntelFsp2Pkg: Add CpuLib to module INFs that depend on UefiCpuLib
> IntelFsp2WrapperPkg: Add CpuLib to module INFs that depend on
> UefiCpuLib.
> MdePkg: Add CpuLib to module INFs that depend on UefiCpuLib.
> OvmfPkg: Add CpuLib to module INFs that depend on UefiCpuLib.
> UefiCpuPkg: Add CpuLib to module INFs that depend on UefiCpuLib.
> UefiPayloadPkg: Add CpuLib to module INFs that depend on UefiCpuLib.
> MdePkg: Move API and implementation from UefiCpuLib to CpuLib
> UefiCpuPkg: Move API and implementation from UefiCpuLib to CpuLib
> IntelFsp2Pkg: Remove UefiCpuLib from module INFs.
> OvmfPkg: Remove UefiCpuLib from module INFs.
> PcAtChipsetPkg: Remove UefiCpuLib from module INFs.
> SourceLevelDebugPkg: Remove UefiCpuLib from module INFs.
> UefiCpuPkg: Remove UefiCpuLib from module INFs.
> UefiPayloadPkg: Remove UefiCpuLib from module INFs.
> UefiCpuLib: Remove UefiCpuLib.
>
> MdePkg/Library/BaseCpuLib/X86BaseCpuLib.c
> | 122
>
> OvmfPkg/Sec/SecMain.c
> | 2 +-
> UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c
> |
> 81 -
> UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> | 2
> +-
> UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> | 2 +-
> IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> | 2 +-
> IntelFsp2Pkg/FspSecCore/SecMain.h
> | 2 +-
> IntelFsp2Pkg/IntelFsp2Pkg.dsc
> | 1 -
> IntelFsp2Pkg/Tools/Tests/QemuFspPkg.dsc
> | 1 -
> IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
> | 2 +-
> IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf
> | 2 +-
> IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc
> | 1 -
> MdePkg/Include/Library/CpuLib.h
> | 65
> +++
> MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> | 6 +
> {UefiCpuPkg/Library/BaseUefiCpuLib =>
> MdePkg/Library/BaseCpuLib}/Ia32/InitializeFpu.nasm | 0
> {UefiCpuPkg/Library/BaseUefiCpuLib =>
> MdePkg/Library/BaseCpuLib}/X64/InitializeFpu.nasm | 0
> MdePkg/MdeLibs.dsc.inc
> | 1 +
> OvmfPkg/AmdSev/AmdSevX64.dsc
> | 1 -
> OvmfPkg/Bhyve/BhyveX64.dsc
> | 1 -
> OvmfPkg/CloudHv/CloudHvX64.dsc
> | 1 -
> OvmfPkg/Microvm/MicrovmX64.dsc
> | 1 -
> OvmfPkg/OvmfPkgIa32.dsc
> | 1 -
> OvmfPkg/OvmfPkgIa32X64.dsc
> | 1 -
> OvmfPkg/OvmfPkgX64.dsc
> | 1 -
> OvmfPkg/OvmfXen.dsc
> | 1 -
> OvmfPkg/Sec/SecMain.inf
> | 2 +-
> PcAtChipsetPkg/PcAtChipsetPkg.dsc
> | 1 -
> SourceLevelDebugPkg/SourceLevelDebugPkg.dsc
> | 1
> -
> UefiCpuPkg/CpuDxe/CpuDxe.h
Re: [edk2-devel] [PATCH 0/6] [RFC] Rework UefiCpuPkg
Hi Mike, In the v2, I moved two of OpenSBI header files to under MdePkg/Include/IndustryStadard (patch 5/8). However, it looks to me not quite proper to have those files there. Seems to keeping those files under UefiCpuPkg makes more sense. What do you think? Abner From: Chang, Abner (HPS SW/FW Technologist) Sent: Saturday, March 19, 2022 10:05 AM To: Kinney, Michael D ; devel@edk2.groups.io ; Ni, Ray Cc: Schaefer, Daniel (ROM Janitor) ; eric.d...@intel.com ; rahul1.ku...@intel.com ; Sunil V L ; Andrew Fish ; quic_llind...@quicinc.com ; Chao Li Subject: RE: [edk2-devel] [PATCH 0/6] [RFC] Rework UefiCpuPkg Just aware that I didn’t Cc stakeholders to the cover letter, add those people in CC. -Original Message- > From: Kinney, Michael D > Sent: Saturday, March 19, 2022 12:47 AM > To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist) > ; Kinney, Michael D ; > Ni, Ray > Subject: RE: [edk2-devel] [PATCH 0/6] [RFC] Rework UefiCpuPkg > > Hi Abner, > > Will OpenSBI content be needed by libs/modules outside of UefiCpuPkg? Edk2OpenSBILib is the wrapper library of OpenSBI, so there is module neither inside nor outside UefiCpuPkg uses OpenSBI directly. Edk2OpenSbiLib is currently used by SecCore only as it describes here: https://github.com/tianocore/edk2-platforms/tree/master/Platform/RISC-V/PlatformPkg. We had designed to expose OepnSBI API in both edk2 version OpenSBI PPI and Protocol, so the answer to your question is: No, OpenSBI/Edk2OpenSbiLib is not needed by modules outside UefiCpuPkg as the design we have so far. > > Should OpenSBI includes be promoted to MdePkg? That is possible and seems reasonable to move the entire OpenSBI(Edk2OpenSbiLib) source/include to under MdePkg because there is no dependency with edk2 RISC-V header files under UefiCpuPkg. But one question: Shall we have OpenSBI lib under MdePkg if it is only used by UefiCpuPkg? > > I do not think the dir name "RISC-V" follows the file/dir name requirements. > The '-' should not be used. We had the same discussion before and '-' is valid in the file name as it defined in the coding standard. I remember we also agreed or accepted having "RISC-V' as the directory name for the modules on edk2-platforms repo. Same scenario can applied on edk2 repo. > > I think there is a discussion about moving UefiCpuLib to MdePkg. Is that a serious discussion or just a verbal discussion? Any conclusion we had from the discussion? Move UefiCpuLib to MdePkg leads the dependency with UefiCpuPkg for those architecture header files. I consider this doesn't make sense to MdePkg, right? I would suggest still having UefiCPuPkg under UefiCpuPkg for now. Move it around one day when there is a clear decision for UefiCpuPkg comes out. Thanks for feedbacks Abner > > Thanks, > > Mike > > > -Original Message- > > From: devel@edk2.groups.io On Behalf Of Abner > Chang > > Sent: Thursday, March 17, 2022 10:43 PM > > To: devel@edk2.groups.io > > Cc: Chang, Abner > > Subject: [edk2-devel] [PATCH 0/6] [RFC] Rework UefiCpuPkg > > > > > INVALID URI REMOVED > d=3860__;!!NpxR!ymTSNAU_VEYCUYtX3YUSGsB0Ma3GzipVS95V5WEZxBeO > QvdiEx6MgV61kZMs6TM$ > > > > This is the project having rework on UefiCpuPkg in order to support a > variety > > of processor architectures. Some modules under UefiCpuPkg are required > to be > > abstract for the different archs. > > > > The first step is to classify UefiCpuPkg modules to IA32 and X64 sections in > > DSC file (Patch 1/6). Move the module to Common section later if more > than one > > archs can leverage the same module (such as Patch 3/6 for BaseUefiCpuLib). > > > > Abner Chang (6): > > [RFC] UefiCpuPkg: Classify IA32/X64 modules in DSC file > > [RFC] UefiCpuPkg/Include: Add header files of RISC-V processor > > architecture > > [RFC] UefiCpuPkg/BaseUefiCpuLib: Add RISC-V RISCV64 instace > > [RFC] UefiCpuPkg/RiscVOpensbLib: Add opensbi submodule > > [RFC] UefiCpuPkg/Library: Add RiscVOpensbiLib > > [RFC] UefiCpuPkg: Update YAML file for RISC-V arch > > > > UefiCpuPkg/UefiCpuPkg.dec | 12 +- > > UefiCpuPkg/UefiCpuPkg.dsc | 45 +++-- > > .../Library/BaseUefiCpuLib/BaseUefiCpuLib.inf | 8 +- > > .../RiscVOpensbiLib/RiscVOpensbiLib.inf | 89 ++ > > .../Include/IndustryStandard/RISC-V/RiscV.h | 162 > ++ > > .../IndustryStandard/RISC-V/RiscVOpensbi.h| 62 +++ > > .../Include/Library/RISC-V/RiscVCpuLib.h | 118 + > > UefiCpuPkg/Include/RISC-V/OpensbiTypes.h | 82 + > > UefiCpuPkg/Include/RISC-V/RiscVImpl.h | 87 +
[edk2-devel] [PATCH V2 6/8] [RFC] BaseTools/Conf: Relocate RiscVOpensbiTypes.h
Relocation of RiscVOpensbiTypes.h, which is under: MdePkg/Include/IndustryStandard/ Signed-off-by: Abner Chang Co-authored-by: Daniel Schaefer Cc: Sunil V L Cc: Leif Lindholm Cc: Michael D Kinney Cc: Bob Feng Cc: Liming Gao Cc: Yuwei Chen --- BaseTools/Conf/tools_def.template | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template index 9c310cf23d..c1eea33e71 100755 --- a/BaseTools/Conf/tools_def.template +++ b/BaseTools/Conf/tools_def.template @@ -1978,7 +1978,7 @@ DEFINE GCC5_RISCV_ALL_DLINK2_FLAGS= -Wl,--defsym=PECOFF_HEADER_S DEFINE GCC5_RISCV_ALL_ASM_FLAGS = -c -x assembler -imacros $(DEST_DIR_DEBUG)/AutoGen.h DEFINE GCC5_RISCV_ALL_CC_FLAGS_WARNING_DISABLE= -Wno-tautological-compare -Wno-pointer-compare -DEFINE GCC5_RISCV_OPENSBI_TYPES = -DOPENSBI_EXTERNAL_SBI_TYPES=OpensbiTypes.h +DEFINE GCC5_RISCV_OPENSBI_TYPES = -DOPENSBI_EXTERNAL_SBI_TYPES=IndustryStandard/RiscVOpensbiTypes.h DEFINE GCC5_RISCV64_ARCH = rv64imafdc DEFINE GCC5_RISCV32_RISCV64_ASLDLINK_FLAGS = DEF(GCC5_RISCV_ALL_DLINK_COMMON) -Wl,--entry,ReferenceAcpiTable -u ReferenceAcpiTable -- 2.31.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88020): https://edk2.groups.io/g/devel/message/88020 Mute This Topic: https://groups.io/mt/90017691/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH V2 8/8] [RFC] UefiCpuPkg: Update YAML file for RISC-V arch
https://bugzilla.tianocore.org/show_bug.cgi?id=3860
Signed-off-by: Abner Chang
Co-authored-by: Daniel Schaefer
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Sunil V L
Cc: Andrew Fish
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Chao Li
---
UefiCpuPkg/UefiCpuPkg.ci.yaml | 60 +--
1 file changed, 58 insertions(+), 2 deletions(-)
diff --git a/UefiCpuPkg/UefiCpuPkg.ci.yaml b/UefiCpuPkg/UefiCpuPkg.ci.yaml
index 6e0ab95fd8..3ac249bb46 100644
--- a/UefiCpuPkg/UefiCpuPkg.ci.yaml
+++ b/UefiCpuPkg/UefiCpuPkg.ci.yaml
@@ -3,6 +3,7 @@
#
# Copyright (c) Microsoft Corporation
# Copyright (c) 2020, Intel Corporation. All rights reserved.
+# Copyright (c) 2022 Hewlett Packard Enterprise Development LP. All rights
reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
{
@@ -18,6 +19,10 @@
],
## Both file path and directory path are accepted.
"IgnoreFiles": [
+## Below source files incorporate with open source
+## RISC-V OpenSBI project, in which some coding style is
+## not able to pass the ECC.
+"Library/RISC-V/RiscVOpensbiLib/opensbi"
]
},
"CompilerPlugin": {
@@ -69,8 +74,59 @@
## options defined ci/Plugin/SpellCheck
"SpellCheck": {
"AuditOnly": True, # Fails test but run in AuditOnly mode to
collect log
-"IgnoreFiles": [], # use gitignore syntax to ignore errors
in matching files
-"ExtendWords": [], # words to extend to the dictionary for
this package
+"IgnoreFiles": [ # use gitignore syntax to ignore errors
in matching files
+"Library/RISC-V/RiscVOpensbiLib/opensbi/**"
+],
+"ExtendWords": [# words to extend to the dictionary for
this package
+"aclint",
+"dmdepkg",
+"ecall",
+"ecalls",
+"efifstub",
+"excep",
+"execption",
+"gaisler",
+"hardfp",
+"hfence",
+"htimehw",
+"htimew",
+"impid",
+"irqchip",
+"keepexceptiontable",
+"libfdt",
+"mbase",
+"mbound",
+"mcause",
+"mdbase",
+"mdbound",
+"memeory",
+"mfromhost",
+"mhartid",
+"mibase",
+"mibound",
+"mideleg",
+"mscratch",
+"mstatus",
+"mtimeh",
+"mtimer",
+"mtohost",
+"mtvec",
+"mvendorid",
+"opensbi",
+"prilx",
+"rfence",
+"scasue",
+"scause",
+"sfence",
+"sifive",
+"smode",
+"sramt",
+"sscratch",
+"sstatus",
+"stval",
+"stvec",
+"transational"
+],
"IgnoreStandardPaths": [], # Standard Plugin defined paths that
should be ignore
"AdditionalIncludePaths": [] # Additional paths to spell check
(wildcards supported)
}
--
2.31.1
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[edk2-devel] [PATCH V2 7/8] [RFC] UefiCpuPkg/Library: Add RiscVOpensbiLib
https://bugzilla.tianocore.org/show_bug.cgi?id=3860
(This is migrated from edk2-platforms:Silicon/RISC-V)
EDK2 RISC-V OpenSBI library which pull in external source files under
UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/opensbi to the build process.
Signed-off-by: Abner Chang
Co-authored-by: Daniel Schaefer
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Sunil V L
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Chao Li
---
UefiCpuPkg/UefiCpuPkg.dec | 9 +-
UefiCpuPkg/UefiCpuPkg.dsc | 6 ++
.../RiscVOpensbiLib/RiscVOpensbiLib.inf | 89 +++
3 files changed, 103 insertions(+), 1 deletion(-)
create mode 100644
UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 613881368b..f7e7142882 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -15,9 +15,16 @@
PACKAGE_GUID = 2171df9b-0d39-45aa-ac37-2de190010d23
PACKAGE_VERSION= 0.90
-[Includes]
+[Includes.common]
Include
+[Includes.RISCV64]
+ Include/Library
+ Library/RISC-V/RiscVOpensbiLib/opensbi # OpenSBI header file
reference ("include/sbi/...")
+ Library/RISC-V/RiscVOpensbiLib/opensbi/include # Header file reference from
opensbi files, ("sbi/...")
+ Library/RISC-V/RiscVOpensbiLib/opensbi/platform/generic/include # Header
file reference from opensbi files, ("sbi/...")
+
+
[LibraryClasses]
## @libraryclass Defines some routines that are used to
register/manage/program
## CPU features.
diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index 50c9fc294c..374e951f29 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -66,6 +66,9 @@
MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf
SmmCpuRendezvousLib|UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezvousLib.inf
+[LibraryClasses.RISCV64]
+ RiscVOpensbiLib|UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf
+
[LibraryClasses.common.SEC]
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
@@ -185,5 +188,8 @@
UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezvousLib.inf
+[Components.RISCV64]
+ UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf
+
[BuildOptions]
*_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
diff --git a/UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf
b/UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf
new file mode 100644
index 00..54eed050d4
--- /dev/null
+++ b/UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf
@@ -0,0 +1,89 @@
+## @file
+# RISC-V Opensbi Library Instance.
+#
+# Copyright (c) 2022, Hewlett Packard Enterprise Development LP. All rights
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION= 0x0001001b
+ BASE_NAME = RiscVOpensbiLib
+ FILE_GUID = 6EF0C812-66F6-11E9-93CE-3F5D5F0DF0A7
+ MODULE_TYPE= BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = RiscVOpensbiLib
+
+[Sources]
+ opensbi/lib/sbi/riscv_asm.c
+ opensbi/lib/sbi/riscv_atomic.c
+ opensbi/lib/sbi/riscv_hardfp.S
+ opensbi/lib/sbi/riscv_locks.c
+ opensbi/lib/sbi/sbi_bitmap.c
+ opensbi/lib/sbi/sbi_bitops.c
+ opensbi/lib/sbi/sbi_console.c
+ opensbi/lib/sbi/sbi_domain.c
+ opensbi/lib/sbi/sbi_ecall.c
+ opensbi/lib/sbi/sbi_ecall_base.c
+ opensbi/lib/sbi/sbi_ecall_hsm.c
+ opensbi/lib/sbi/sbi_ecall_legacy.c
+ opensbi/lib/sbi/sbi_ecall_replace.c
+ opensbi/lib/sbi/sbi_ecall_vendor.c
+ opensbi/lib/sbi/sbi_emulate_csr.c
+ opensbi/lib/sbi/sbi_fifo.c
+ opensbi/lib/sbi/sbi_hart.c
+ opensbi/lib/sbi/sbi_math.c
+ opensbi/lib/sbi/sbi_hfence.S
+ opensbi/lib/sbi/sbi_hsm.c
+ opensbi/lib/sbi/sbi_illegal_insn.c
+ opensbi/lib/sbi/sbi_init.c
+ opensbi/lib/sbi/sbi_ipi.c
+ opensbi/lib/sbi/sbi_misaligned_ldst.c
+ opensbi/lib/sbi/sbi_platform.c
+ opensbi/lib/sbi/sbi_scratch.c
+ opensbi/lib/sbi/sbi_string.c
+ opensbi/lib/sbi/sbi_system.c
+ opensbi/lib/sbi/sbi_timer.c
+ opensbi/lib/sbi/sbi_tlb.c
+ opensbi/lib/sbi/sbi_trap.c
+ opensbi/lib/sbi/sbi_unpriv.c
+ opensbi/lib/sbi/sbi_expected_trap.S
+
+ opensbi/lib/utils/fdt/fdt_helper.c
+ opensbi/lib/utils/fdt/fdt_fixup.c
+ opensbi/lib/utils/fdt/fdt_domain.c
+ opensbi/lib/utils/ipi/fdt_ipi.c
+ opensbi/lib/utils/ipi/aclint_mswi.c
+ opensbi/lib/utils/ipi/fdt_ipi_mswi.c
+ opensbi/lib/utils/irqchip/fdt_irqchip.c
+ opensbi/lib/utils/irqchip/fdt_irqchip_plic.c
+ opensbi/lib/utils/irqchip/plic.c
+ opensbi/lib/utils/reset/fdt_reset.c
+ opensbi/lib/utils/reset/fdt_reset_htif.c
+ opensbi/lib/utils/reset/fdt_reset_sifive.c
+ opensbi/lib/utils/reset/fdt_reset_thead.c
+ opensbi/lib/utils/reset/fdt_reset_thead_asm.S
+ opensbi/lib/utils/serial/fdt_serial
[edk2-devel] [PATCH V2 5/8] [RFC] MdePkg/Include: Add RISC-V OpenSBI header files
https://bugzilla.tianocore.org/show_bug.cgi?id=3860
RiscVOpensbiTypes.h:
The header file for building RISC-V OpenSBI library.
RiscVOpenSBI.h:
The header file of using OpenSBI library.
Signed-off-by: Abner Chang
Co-authored-by: Daniel Schaefer
M: Liming Gao [lgao4]
R: Zhiguang Liu [LiuZhiguang001]
Cc: Sunil V L
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Chao Li
---
.../Include/IndustryStandard/RiscVOpensbi.h | 62 ++
.../IndustryStandard/RiscVOpensbiTypes.h | 82 +++
MdePkg/MdePkg.ci.yaml | 2 +
3 files changed, 146 insertions(+)
create mode 100644 MdePkg/Include/IndustryStandard/RiscVOpensbi.h
create mode 100644 MdePkg/Include/IndustryStandard/RiscVOpensbiTypes.h
diff --git a/MdePkg/Include/IndustryStandard/RiscVOpensbi.h
b/MdePkg/Include/IndustryStandard/RiscVOpensbi.h
new file mode 100644
index 00..4c9186f212
--- /dev/null
+++ b/MdePkg/Include/IndustryStandard/RiscVOpensbi.h
@@ -0,0 +1,62 @@
+/** @file
+ SBI inline function calls.
+
+ Copyright (c) 2022, Hewlett Packard Enterprise Development LP. All rights
reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef EDK2_RISC_V_SBI_H_
+#define EDK2_RISC_V_SBI_H_
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define RISC_V_MAX_HART_SUPPORTED SBI_HARTMASK_MAX_BITS
+
+typedef
+VOID
+(EFIAPI *RISCV_HART_SWITCH_MODE)(
+ IN UINTN FuncArg0,
+ IN UINTN FuncArg1,
+ IN UINTN NextAddr,
+ IN UINTN NextMode,
+ IN BOOLEAN NextVirt
+ );
+
+//
+// Keep the structure member in 64-bit alignment.
+//
+typedef struct {
+ UINT64IsaExtensionSupported; // The ISA extension this
core supported.
+ RISCV_UINT128 MachineVendorId; // Machine vendor ID
+ RISCV_UINT128 MachineArchId; // Machine Architecture ID
+ RISCV_UINT128 MachineImplId; // Machine Implementation ID
+ RISCV_HART_SWITCH_MODEHartSwitchMode;// OpenSBI's function to
switch the mode of a hart
+} EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC;
+#define FIRMWARE_CONTEXT_HART_SPECIFIC_SIZE (64 * 8) // This is the size of
EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC
+ // structure. Referred
by both C code and assembly code.
+
+typedef struct {
+ UINT64 BootHartId;
+ VOID*PeiServiceTable;// PEI
Service table
+ UINT64 FlattenedDeviceTree; // Pointer
to Flattened Device tree
+ UINT64 SecPeiHandOffData; // This is
EFI_SEC_PEI_HAND_OFF passed to PEI Core.
+ EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC
*HartSpecific[RISC_V_MAX_HART_SUPPORTED];
+} EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT;
+
+//
+// Typedefs of OpenSBI type to make them conform to EDK2 coding guidelines
+//
+typedef struct sbi_scratch SBI_SCRATCH;
+typedef struct sbi_platform SBI_PLATFORM;
+
+#endif
diff --git a/MdePkg/Include/IndustryStandard/RiscVOpensbiTypes.h
b/MdePkg/Include/IndustryStandard/RiscVOpensbiTypes.h
new file mode 100644
index 00..6a6a1f532d
--- /dev/null
+++ b/MdePkg/Include/IndustryStandard/RiscVOpensbiTypes.h
@@ -0,0 +1,82 @@
+/** @file
+ RISC-V OpenSBI header file reference.
+
+ Copyright (c) 2022, Hewlett Packard Enterprise Development LP. All rights
reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef EDK2_RISC_V_SBI_TYPES_H_
+#define EDK2_RISC_V_SBI_TYPES_H_
+
+#include
+
+typedef INT8 s8;
+typedef UINT8 u8;
+typedef UINT8 uint8_t;
+
+typedef INT16 s16;
+typedef UINT16 u16;
+typedef INT16 int16_t;
+typedef UINT16 uint16_t;
+
+typedef INT32 s32;
+typedef UINT32 u32;
+typedef INT32 int32_t;
+typedef UINT32 uint32_t;
+
+typedef INT64 s64;
+typedef UINT64 u64;
+typedef INT64 int64_t;
+typedef UINT64 uint64_t;
+
+// PRILX is not used in EDK2 but we need to define it here because when
+// defining our own types, this constant is not defined but used by OpenSBI.
+#define PRILX "016lx"
+
+typedef BOOLEANbool;
+typedef unsigned long ulong;
+typedef UINT64 uintptr_t;
+typedef UINT64 size_t;
+typedef INT64 ssize_t;
+typedef UINT64 virtual_addr_t;
+typedef UINT64 virtual_size_t;
+typedef UINT64 physical_addr_t;
+typedef UINT64 physical_size_t;
+
+#define true TRUE
+#define false FALSE
+
+#define __packed__attribute__((packed))
+#define __noreturn __attribute__((noreturn))
+#define __aligned(x) __attribute__((aligned(x)))
+
+#if defined (__GNUC__) || defined (__clang__)
+#define likely(x)__builtin_expect((x), 1)
+#define unlikely(x) __builtin_expect((x), 0)
+#else
+#define likely(x)(x)
+#define unlikely(x) (x)
+#endif
+
+#undef offsetof
+#ifdef __compiler_offsetof
+#define offsetof(TYPE, MEMBER) __compiler_offsetof(T
[edk2-devel] [PATCH V2 4/8] [RFC] UefiCpuPkg/RiscVOpensbLib: Add opensbi submodule
https://bugzilla.tianocore.org/show_bug.cgi?id=3860 (This is migrated from edk2-platforms:Silicon/RISC-V) Add RISC-V opensbi as the submoudle under UefiCpuPkg/Library/RISC-V Signed-off-by: Abner Chang Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Daniel Schaefer Cc: Sunil V L Cc: Andrew Fish Cc: Leif Lindholm Cc: Michael D Kinney Cc: Chao Li --- .gitmodules | 45 ++- .../Library/RISC-V/RiscVOpensbiLib/opensbi| 1 + 2 files changed, 25 insertions(+), 21 deletions(-) create mode 16 UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/opensbi diff --git a/.gitmodules b/.gitmodules index b845c9ee3f..dd68dbfc82 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,22 +1,25 @@ -[submodule "CryptoPkg/Library/OpensslLib/openssl"] - path = CryptoPkg/Library/OpensslLib/openssl - url = https://github.com/openssl/openssl -[submodule "SoftFloat"] - path = ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3 - url = https://github.com/ucb-bar/berkeley-softfloat-3.git -[submodule "UnitTestFrameworkPkg/Library/CmockaLib/cmocka"] - path = UnitTestFrameworkPkg/Library/CmockaLib/cmocka - url = https://github.com/tianocore/edk2-cmocka.git -[submodule "MdeModulePkg/Universal/RegularExpressionDxe/oniguruma"] - path = MdeModulePkg/Universal/RegularExpressionDxe/oniguruma - url = https://github.com/kkos/oniguruma -[submodule "MdeModulePkg/Library/BrotliCustomDecompressLib/brotli"] - path = MdeModulePkg/Library/BrotliCustomDecompressLib/brotli - url = https://github.com/google/brotli -[submodule "BaseTools/Source/C/BrotliCompress/brotli"] - path = BaseTools/Source/C/BrotliCompress/brotli - url = https://github.com/google/brotli +[submodule "CryptoPkg/Library/OpensslLib/openssl"] + path = CryptoPkg/Library/OpensslLib/openssl + url = https://github.com/openssl/openssl +[submodule "SoftFloat"] + path = ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3 + url = https://github.com/ucb-bar/berkeley-softfloat-3.git +[submodule "UnitTestFrameworkPkg/Library/CmockaLib/cmocka"] + path = UnitTestFrameworkPkg/Library/CmockaLib/cmocka + url = https://github.com/tianocore/edk2-cmocka.git +[submodule "MdeModulePkg/Universal/RegularExpressionDxe/oniguruma"] + path = MdeModulePkg/Universal/RegularExpressionDxe/oniguruma + url = https://github.com/kkos/oniguruma +[submodule "MdeModulePkg/Library/BrotliCustomDecompressLib/brotli"] + path = MdeModulePkg/Library/BrotliCustomDecompressLib/brotli + url = https://github.com/google/brotli +[submodule "BaseTools/Source/C/BrotliCompress/brotli"] + path = BaseTools/Source/C/BrotliCompress/brotli + url = https://github.com/google/brotli ignore = untracked -[submodule "RedfishPkg/Library/JsonLib/jansson"] - path = RedfishPkg/Library/JsonLib/jansson - url = https://github.com/akheron/jansson +[submodule "RedfishPkg/Library/JsonLib/jansson"] + path = RedfishPkg/Library/JsonLib/jansson + url = https://github.com/akheron/jansson +[submodule "UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/opensbi"] + path = UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/opensbi + url = https://github.com/riscv-software-src/opensbi diff --git a/UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/opensbi b/UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/opensbi new file mode 16 index 00..a731c7e369 --- /dev/null +++ b/UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/opensbi @@ -0,0 +1 @@ +Subproject commit a731c7e36988c3308e1978ecde491f2f6182d490 -- 2.31.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88018): https://edk2.groups.io/g/devel/message/88018 Mute This Topic: https://groups.io/mt/90017688/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH V2 3/8] [RFC] UefiCpuPkg/BaseUefiCpuLib: Add RISC-V RISCV64 instace
https://bugzilla.tianocore.org/show_bug.cgi?id=3860
Add BaseUefiCpuLib instance for RISC-V RISCV64 arch.
Signed-off-by: Abner Chang
Co-authored-by: Daniel Schaefer
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Sunil V L
Cc: Andrew Fish
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Chao Li
---
UefiCpuPkg/UefiCpuPkg.dec | 17 ++-
UefiCpuPkg/UefiCpuPkg.dsc | 7 +-
.../Library/BaseUefiCpuLib/BaseUefiCpuLib.inf | 8 +-
.../Include/Library/RISC-V/RiscVCpuLib.h | 118 +++
.../Library/BaseUefiCpuLib/BaseUefiCpuLib.uni | 5 +-
.../Library/BaseUefiCpuLib/RISCV64/Cpu.S | 143 ++
6 files changed, 286 insertions(+), 12 deletions(-)
create mode 100644 UefiCpuPkg/Include/Library/RISC-V/RiscVCpuLib.h
create mode 100644 UefiCpuPkg/Library/BaseUefiCpuLib/RISCV64/Cpu.S
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 525cde4634..613881368b 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -2,6 +2,7 @@
# This Package provides UEFI compatible CPU modules and libraries.
#
# Copyright (c) 2007 - 2022, Intel Corporation. All rights reserved.
+# Copyright (c) 2022 Hewlett Packard Enterprise Development LP. All rights
reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -18,17 +19,17 @@
Include
[LibraryClasses]
- ## @libraryclass Defines some routines that are generic for IA32 family CPU
- ## to be UEFI specification compliant.
- ##
- UefiCpuLib|Include/Library/UefiCpuLib.h
-
## @libraryclass Defines some routines that are used to
register/manage/program
## CPU features.
##
RegisterCpuFeaturesLib|Include/Library/RegisterCpuFeaturesLib.h
[LibraryClasses.IA32, LibraryClasses.X64]
+ ## @libraryclass Defines some routines that are generic for IA32 family CPU
+ ## to be UEFI specification compliant.
+ ##
+ UefiCpuLib|Include/Library/UefiCpuLib.h
+
## @libraryclass Provides functions to manage MTRR settings on IA32 and
X64 CPUs.
##
MtrrLib|Include/Library/MtrrLib.h
@@ -65,6 +66,12 @@
## @libraryclass Provides function for SMM CPU Rendezvous Library.
SmmCpuRendezvousLib|Include/Library/SmmCpuRendezvousLib.h
+[LibraryClasses.RISCV64]
+ ## @libraryclass Defines some routines that are generic for RISC-V CPU
+ ## to be UEFI specification compliant.
+ ##
+ UefiCpuLib|Include/Library/RISC-V/RiscVCpuLib.h
+
[Guids]
gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8,
0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
gMsegSmramGuid = { 0x5802bce4, 0x, 0x4e33, { 0xa1, 0x30,
0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }}
diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index 6b43ff6822..50c9fc294c 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -14,7 +14,7 @@
PLATFORM_VERSION = 0.90
DSC_SPECIFICATION = 0x00010005
OUTPUT_DIRECTORY = Build/UefiCpu
- SUPPORTED_ARCHITECTURES= IA32|X64
+ SUPPORTED_ARCHITECTURES= IA32|X64|RISCV64
BUILD_TARGETS = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER = DEFAULT
@@ -55,9 +55,9 @@
PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf
+ UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
[LibraryClasses.IA32, LibraryClasses.X64]
- UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
MtrrLib|UefiCpuPkg/Library/MtrrLib/MtrrLib.inf
LocalApicLib|UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf
SmmCpuPlatformHookLib|UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.inf
@@ -120,6 +120,8 @@
#
# Drivers/Libraries within this package
#
+[Components.common]
+ UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
[Components.IA32, Components.X64]
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
@@ -144,7 +146,6 @@
UefiCpuPkg/CpuIo2Smm/CpuIo2StandaloneMm.inf
UefiCpuPkg/CpuMpPei/CpuMpPei.inf
UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf
- UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf
UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf
UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
b/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
index 34d3a7bb43..f43498e9b4 100644
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
+++ b/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
@@ -5,6 +5,7 @@
#
# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.
# Copyright (c) 2020, AMD Inc. All rights
[edk2-devel] [PATCH V2 1/8] [RFC] UefiCpuPkg: Classify IA32/X64 modules in DSC file
https://bugzilla.tianocore.org/show_bug.cgi?id=3860 This is the first step of reworking on UefiCpuPkg in order to accommodating all processor architectures in UEfiCpuPkg. Classify UefiCpuPkg modules to IA32 and X64 sections in DSC file. Move the module to Common section if more than one archs can leverage the same module. Such as the patch 3/6 for BaseUefiCpuLib. Signed-off-by: Abner Chang Co-authored-by: Daniel Schaefer Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Sunil V L Cc: Andrew Fish Cc: Leif Lindholm Cc: Michael D Kinney Cc: Chao Li --- UefiCpuPkg/UefiCpuPkg.dsc | 34 +- 1 file changed, 21 insertions(+), 13 deletions(-) diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc index a0bbde9985..6b43ff6822 100644 --- a/UefiCpuPkg/UefiCpuPkg.dsc +++ b/UefiCpuPkg/UefiCpuPkg.dsc @@ -2,6 +2,7 @@ # UefiCpuPkg Package # # Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved. +# Copyright (c) 2022 Hewlett Packard Enterprise Development LP. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -23,7 +24,7 @@ !include MdePkg/MdeLibs.dsc.inc -[LibraryClasses] +[LibraryClasses.common] BaseLib|MdePkg/Library/BaseLib/BaseLib.inf BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf @@ -31,9 +32,7 @@ SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf - UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf - MtrrLib|UefiCpuPkg/Library/MtrrLib/MtrrLib.inf PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf UefiLib|MdePkg/Library/UefiLib/UefiLib.inf @@ -47,48 +46,56 @@ PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf TimerLib|MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf - LocalApicLib|UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf SmmMemLib|MdePkg/Library/SmmMemLib/SmmMemLib.inf CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf - SmmCpuPlatformHookLib|UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.inf - SmmCpuFeaturesLib|UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf + +[LibraryClasses.IA32, LibraryClasses.X64] + UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf + MtrrLib|UefiCpuPkg/Library/MtrrLib/MtrrLib.inf + LocalApicLib|UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf + SmmCpuPlatformHookLib|UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.inf + SmmCpuFeaturesLib|UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf SmmCpuRendezvousLib|UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezvousLib.inf [LibraryClasses.common.SEC] + HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf + MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf + +[LibraryClasses.IA32.SEC, LibraryClasses.X64.SEC] PlatformSecLib|UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.inf !if $(TOOL_CHAIN_TAG) == "XCODE5" CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPeiCpuExceptionHandlerLib.inf !else CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf !endif - HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf - MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf [LibraryClasses.common.PEIM] MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxPeiLib.inf - MpInitLib|UefiCpuPkg/Library
[edk2-devel] [PATCH V2 2/8] [RFC] UefiCpuPkg/Include: Add header files of RISC-V processor architecture
(This is migrated from edk2-platforms:Silicon/RISC-V) https://bugzilla.tianocore.org/show_bug.cgi?id=3860 RISC-V processor architecture definitions. Signed-off-by: Abner Chang Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Daniel Schaefer Cc: Sunil V L Cc: Andrew Fish Cc: Leif Lindholm Cc: Michael D Kinney Cc: Chao Li --- .../Include/IndustryStandard/RISC-V/RiscV.h | 162 ++ UefiCpuPkg/Include/RISC-V/RiscVImpl.h | 87 ++ 2 files changed, 249 insertions(+) create mode 100644 UefiCpuPkg/Include/IndustryStandard/RISC-V/RiscV.h create mode 100644 UefiCpuPkg/Include/RISC-V/RiscVImpl.h diff --git a/UefiCpuPkg/Include/IndustryStandard/RISC-V/RiscV.h b/UefiCpuPkg/Include/IndustryStandard/RISC-V/RiscV.h new file mode 100644 index 00..3edd1e6263 --- /dev/null +++ b/UefiCpuPkg/Include/IndustryStandard/RISC-V/RiscV.h @@ -0,0 +1,162 @@ +/** @file + RISC-V processor architecture definitions. + + Copyright (c) 2022 Hewlett Packard Enterprise Development LP. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef RISCV_INDUSTRY_STANDARD_H_ +#define RISCV_INDUSTRY_STANDARD_H_ + +#if defined (MDE_CPU_RISCV64) +#define RISC_V_XLEN_BITS 64 +#else +#endif + +#define RISC_V_ISA_ATOMIC_EXTENSION (0x0001 << 0) +#define RISC_V_ISA_BIT_OPERATION_EXTENSION(0x0001 << 1) +#define RISC_V_ISA_COMPRESSED_EXTENSION (0x0001 << 2) +#define RISC_V_ISA_DOUBLE_PRECISION_FP_EXTENSION (0x0001 << 3) +#define RISC_V_ISA_RV32E_ISA (0x0001 << 4) +#define RISC_V_ISA_SINGLE_PRECISION_FP_EXTENSION (0x0001 << 5) +#define RISC_V_ISA_ADDITIONAL_STANDARD_EXTENSION (0x0001 << 6) +#define RISC_V_ISA_RESERVED_1 (0x0001 << 7) +#define RISC_V_ISA_INTEGER_ISA_EXTENSION (0x0001 << 8) +#define RISC_V_ISA_DYNAMICALLY_TRANSLATED_LANGUAGE_EXTENSION (0x0001 << 9) +#define RISC_V_ISA_RESERVED_2 (0x0001 << 10) +#define RISC_V_ISA_DECIMAL_FP_EXTENSION (0x0001 << 11) +#define RISC_V_ISA_INTEGER_MUL_DIV_EXTENSION (0x0001 << 12) +#define RISC_V_ISA_USER_LEVEL_INTERRUPT_SUPPORTED (0x0001 << 13) +#define RISC_V_ISA_RESERVED_3 (0x0001 << 14) +#define RISC_V_ISA_PACKED_SIMD_EXTENSION (0x0001 << 15) +#define RISC_V_ISA_QUAD_PRECISION_FP_EXTENSION(0x0001 << 16) +#define RISC_V_ISA_RESERVED_4 (0x0001 << 17) +#define RISC_V_ISA_SUPERVISOR_MODE_IMPLEMENTED(0x0001 << 18) +#define RISC_V_ISA_TRANSATIONAL_MEMORY_EXTENSION (0x0001 << 19) +#define RISC_V_ISA_USER_MODE_IMPLEMENTED (0x0001 << 20) +#define RISC_V_ISA_VECTOR_EXTENSION (0x0001 << 21) +#define RISC_V_ISA_RESERVED_5 (0x0001 << 22) +#define RISC_V_ISA_NON_STANDARD_EXTENSION (0x0001 << 23) +#define RISC_V_ISA_RESERVED_6 (0x0001 << 24) +#define RISC_V_ISA_RESERVED_7 (0x0001 << 25) + +// +// RISC-V CSR definitions. +// +// +// Machine information +// +#define RISCV_CSR_MACHINE_MVENDORID 0xF11 +#define RISCV_CSR_MACHINE_MARCHID0xF12 +#define RISCV_CSR_MACHINE_MIMPID 0xF13 +#define RISCV_CSR_MACHINE_HARRID 0xF14 +// +// Machine Trap Setup. +// +#define RISCV_CSR_MACHINE_MSTATUS 0x300 +#define RISCV_CSR_MACHINE_MISA 0x301 +#define RISCV_CSR_MACHINE_MEDELEG 0x302 +#define RISCV_CSR_MACHINE_MIDELEG 0x303 +#define RISCV_CSR_MACHINE_MIE 0x304 +#define RISCV_CSR_MACHINE_MTVEC0x305 + +#define RISCV_TIMER_COMPARE_BITS 32 +// +// Machine Timer and Counter. +// +// #define RISCV_CSR_MACHINE_MTIME 0x701 +// #define RISCV_CSR_MACHINE_MTIMEH0x741 +// +// Machine Trap Handling. +// +#define RISCV_CSR_MACHINE_MSCRATCH 0x340 +#define RISCV_CSR_MACHINE_MEPC 0x341 +#define RISCV_CSR_MACHINE_MCAUSE0x342 +#define MACHINE_MCAUSE_EXCEPTION_ MASK 0x0f +#define MACHINE_MCAUSE_INTERRUPT(RISC_V_XLEN_BITS - 1) +#define RISCV_CSR_MACHINE_MBADADDR 0x343 +#define RISCV_CSR_MACHINE_MIP 0x344 + +// +// Machine Protection and Translation. +// +#define RISCV_CSR_MACHINE_MBASE0x380 +#define RISCV_CSR_MACHINE_MBOUND 0x381 +#define RISCV_CSR_MACHINE_MIBASE 0x382 +#define RISCV_CSR_MACHINE_MIBOUND 0x383 +#define RISCV_CSR_MACHINE_MDBASE 0x384 +#define RISCV_CSR_MACHINE_MDBOUND 0x385 + +// +// Supervisor mode CSR. +// +#define RISCV_CSR_SUPERVISOR_SS
[edk2-devel] [PATCH V2 0/8] Rework UefiCpuPkg
https://bugzilla.tianocore.org/show_bug.cgi?id=3860 This is the project having rework on UefiCpuPkg in order to support a variety of processor architectures. Some modules under UefiCpuPkg are required to be abstract for the different archs. In V2: - I moved two RISC-V OpenSBI header files to under MdePkg/Include/IndustryStandard (5/8). However I am not sure if that is proper having those files there. - Fixed some CI errors. In V1: The first step is to classify UefiCpuPkg modules to IA32 and X64 sections in DSC file (Patch 1/6). Move the module to Common section later if more than one archs can leverage the same module (such as Patch 3/6 for BaseUefiCpuLib). Signed-off-by: Abner Chang Co-authored-by: Daniel Schaefer Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Sunil V L Cc: Andrew Fish Cc: Leif Lindholm Cc: Michael D Kinney Cc: Chao Li Cc: Liming Gao Cc: Zhiguang Liu Cc: Bob Feng Cc: Liming Gao Cc: Yuwei Chen Abner Chang (8): [RFC] UefiCpuPkg: Classify IA32/X64 modules in DSC file [RFC] UefiCpuPkg/Include: Add header files of RISC-V processor architecture [RFC] UefiCpuPkg/BaseUefiCpuLib: Add RISC-V RISCV64 instace [RFC] UefiCpuPkg/RiscVOpensbLib: Add opensbi submodule [RFC] MdePkg/Include: Add RISC-V OpenSBI header files [RFC] BaseTools/Conf: Relocate RiscVOpensbiTypes.h [RFC] UefiCpuPkg/Library: Add RiscVOpensbiLib [RFC] UefiCpuPkg: Update YAML file for RISC-V arch UefiCpuPkg/UefiCpuPkg.dec | 26 ++- UefiCpuPkg/UefiCpuPkg.dsc | 45 +++-- .../Library/BaseUefiCpuLib/BaseUefiCpuLib.inf | 8 +- .../RiscVOpensbiLib/RiscVOpensbiLib.inf | 89 ++ .../Include/IndustryStandard/RiscVOpensbi.h | 62 +++ .../IndustryStandard/RiscVOpensbiTypes.h | 82 + .../Include/IndustryStandard/RISC-V/RiscV.h | 162 ++ .../Include/Library/RISC-V/RiscVCpuLib.h | 118 + UefiCpuPkg/Include/RISC-V/RiscVImpl.h | 87 ++ .gitmodules | 45 ++--- BaseTools/Conf/tools_def.template | 2 +- MdePkg/MdePkg.ci.yaml | 2 + .../Library/BaseUefiCpuLib/BaseUefiCpuLib.uni | 5 +- .../Library/BaseUefiCpuLib/RISCV64/Cpu.S | 143 .../Library/RISC-V/RiscVOpensbiLib/opensbi| 1 + UefiCpuPkg/UefiCpuPkg.ci.yaml | 60 ++- 16 files changed, 888 insertions(+), 49 deletions(-) create mode 100644 UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf create mode 100644 MdePkg/Include/IndustryStandard/RiscVOpensbi.h create mode 100644 MdePkg/Include/IndustryStandard/RiscVOpensbiTypes.h create mode 100644 UefiCpuPkg/Include/IndustryStandard/RISC-V/RiscV.h create mode 100644 UefiCpuPkg/Include/Library/RISC-V/RiscVCpuLib.h create mode 100644 UefiCpuPkg/Include/RISC-V/RiscVImpl.h create mode 100644 UefiCpuPkg/Library/BaseUefiCpuLib/RISCV64/Cpu.S create mode 16 UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/opensbi -- 2.31.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88015): https://edk2.groups.io/g/devel/message/88015 Mute This Topic: https://groups.io/mt/90017681/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH 0/6] [RFC] Rework UefiCpuPkg
Just aware that I didn’t Cc stakeholders to the cover letter, add those people in CC. -Original Message- > From: Kinney, Michael D > Sent: Saturday, March 19, 2022 12:47 AM > To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist) > ; Kinney, Michael D ; > Ni, Ray > Subject: RE: [edk2-devel] [PATCH 0/6] [RFC] Rework UefiCpuPkg > > Hi Abner, > > Will OpenSBI content be needed by libs/modules outside of UefiCpuPkg? Edk2OpenSBILib is the wrapper library of OpenSBI, so there is module neither inside nor outside UefiCpuPkg uses OpenSBI directly. Edk2OpenSbiLib is currently used by SecCore only as it describes here: https://github.com/tianocore/edk2-platforms/tree/master/Platform/RISC-V/PlatformPkg. We had designed to expose OepnSBI API in both edk2 version OpenSBI PPI and Protocol, so the answer to your question is: No, OpenSBI/Edk2OpenSbiLib is not needed by modules outside UefiCpuPkg as the design we have so far. > > Should OpenSBI includes be promoted to MdePkg? That is possible and seems reasonable to move the entire OpenSBI(Edk2OpenSbiLib) source/include to under MdePkg because there is no dependency with edk2 RISC-V header files under UefiCpuPkg. But one question: Shall we have OpenSBI lib under MdePkg if it is only used by UefiCpuPkg? > > I do not think the dir name "RISC-V" follows the file/dir name requirements. > The '-' should not be used. We had the same discussion before and '-' is valid in the file name as it defined in the coding standard. I remember we also agreed or accepted having "RISC-V' as the directory name for the modules on edk2-platforms repo. Same scenario can applied on edk2 repo. > > I think there is a discussion about moving UefiCpuLib to MdePkg. Is that a serious discussion or just a verbal discussion? Any conclusion we had from the discussion? Move UefiCpuLib to MdePkg leads the dependency with UefiCpuPkg for those architecture header files. I consider this doesn't make sense to MdePkg, right? I would suggest still having UefiCPuPkg under UefiCpuPkg for now. Move it around one day when there is a clear decision for UefiCpuPkg comes out. Thanks for feedbacks Abner > > Thanks, > > Mike > > > -Original Message- > > From: devel@edk2.groups.io On Behalf Of Abner > Chang > > Sent: Thursday, March 17, 2022 10:43 PM > > To: devel@edk2.groups.io > > Cc: Chang, Abner > > Subject: [edk2-devel] [PATCH 0/6] [RFC] Rework UefiCpuPkg > > > > > INVALID URI REMOVED > d=3860__;!!NpxR!ymTSNAU_VEYCUYtX3YUSGsB0Ma3GzipVS95V5WEZxBeO > QvdiEx6MgV61kZMs6TM$ > > > > This is the project having rework on UefiCpuPkg in order to support a > variety > > of processor architectures. Some modules under UefiCpuPkg are required > to be > > abstract for the different archs. > > > > The first step is to classify UefiCpuPkg modules to IA32 and X64 sections in > > DSC file (Patch 1/6). Move the module to Common section later if more > than one > > archs can leverage the same module (such as Patch 3/6 for BaseUefiCpuLib). > > > > Abner Chang (6): > > [RFC] UefiCpuPkg: Classify IA32/X64 modules in DSC file > > [RFC] UefiCpuPkg/Include: Add header files of RISC-V processor > > architecture > > [RFC] UefiCpuPkg/BaseUefiCpuLib: Add RISC-V RISCV64 instace > > [RFC] UefiCpuPkg/RiscVOpensbLib: Add opensbi submodule > > [RFC] UefiCpuPkg/Library: Add RiscVOpensbiLib > > [RFC] UefiCpuPkg: Update YAML file for RISC-V arch > > > > UefiCpuPkg/UefiCpuPkg.dec | 12 +- > > UefiCpuPkg/UefiCpuPkg.dsc | 45 +++-- > > .../Library/BaseUefiCpuLib/BaseUefiCpuLib.inf | 8 +- > > .../RiscVOpensbiLib/RiscVOpensbiLib.inf | 89 ++ > > .../Include/IndustryStandard/RISC-V/RiscV.h | 162 > ++ > > .../IndustryStandard/RISC-V/RiscVOpensbi.h| 62 +++ > > .../Include/Library/RISC-V/RiscVCpuLib.h | 118 + > > UefiCpuPkg/Include/RISC-V/OpensbiTypes.h | 82 + > > UefiCpuPkg/Include/RISC-V/RiscVImpl.h | 87 ++ > > .gitmodules | 45 ++--- > > BaseTools/Conf/tools_def.template | 2 +- > > .../Library/BaseUefiCpuLib/BaseUefiCpuLib.uni | 5 +- > > .../Library/BaseUefiCpuLib/RISCV64/Cpu.S | 143 > > .../Library/RISC-V/RiscVOpensbiLib/opensbi| 1 + > > UefiCpuPkg/UefiCpuPkg.ci.yaml | 61 ++- > > 15 files changed, 877 insertions(+), 45 deletions(-) > > create mode 100644 UefiCpuPkg/Library/RISC- > V/RiscVOpensbiLib/RiscVOpensbiLib.inf > > create mode 100644 UefiCpuPkg/Include/IndustryStan
[edk2-devel] [PATCH 6/6] [RFC] UefiCpuPkg: Update YAML file for RISC-V arch
https://bugzilla.tianocore.org/show_bug.cgi?id=3860
Signed-off-by: Abner Chang
Co-authored-by: Daniel Schaefer
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Sunil V L
Cc: Andrew Fish
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Chao Li
---
UefiCpuPkg/UefiCpuPkg.ci.yaml | 61 +--
1 file changed, 59 insertions(+), 2 deletions(-)
diff --git a/UefiCpuPkg/UefiCpuPkg.ci.yaml b/UefiCpuPkg/UefiCpuPkg.ci.yaml
index 6e0ab95fd8..3ead943e8e 100644
--- a/UefiCpuPkg/UefiCpuPkg.ci.yaml
+++ b/UefiCpuPkg/UefiCpuPkg.ci.yaml
@@ -3,6 +3,7 @@
#
# Copyright (c) Microsoft Corporation
# Copyright (c) 2020, Intel Corporation. All rights reserved.
+# Copyright (c) 2022 Hewlett Packard Enterprise Development LP. All rights
reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
{
@@ -18,6 +19,11 @@
],
## Both file path and directory path are accepted.
"IgnoreFiles": [
+## Below source files incorporate with open source
+## RISC-V OpenSBI project, in which some coding style is
+## not able to pass the ECC.
+"Library/RISC-V/RiscVOpensbiLib/opensbi",
+"Include/RISC-V/OpensbiTypes.h"
]
},
"CompilerPlugin": {
@@ -69,8 +75,59 @@
## options defined ci/Plugin/SpellCheck
"SpellCheck": {
"AuditOnly": True, # Fails test but run in AuditOnly mode to
collect log
-"IgnoreFiles": [], # use gitignore syntax to ignore errors
in matching files
-"ExtendWords": [], # words to extend to the dictionary for
this package
+"IgnoreFiles": [ # use gitignore syntax to ignore errors
in matching files
+"Library/RISC-V/RiscVOpensbiLib/opensbi/**"
+],
+"ExtendWords": [# words to extend to the dictionary for
this package
+"aclint",
+"dmdepkg",
+"ecall",
+"ecalls",
+"efifstub",
+"excep",
+"execption",
+"gaisler",
+"hardfp",
+"hfence",
+"htimehw",
+"htimew",
+"impid",
+"irqchip",
+"keepexceptiontable",
+"libfdt",
+"mbase",
+"mbound",
+"mcause",
+"mdbase",
+"mdbound",
+"memeory",
+"mfromhost",
+"mhartid",
+"mibase",
+"mibound",
+"mideleg",
+"mscratch",
+"mstatus",
+"mtimeh",
+"mtimer",
+"mtohost",
+"mtvec",
+"mvendorid",
+"opensbi",
+"prilx",
+"rfence",
+"scasue",
+"scause",
+"sfence",
+"sifive",
+"smode",
+"sramt",
+"sscratch",
+"sstatus",
+"stval",
+"stvec",
+"transational"
+],
"IgnoreStandardPaths": [], # Standard Plugin defined paths that
should be ignore
"AdditionalIncludePaths": [] # Additional paths to spell check
(wildcards supported)
}
--
2.31.1
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[edk2-devel] [PATCH 1/6] [RFC] UefiCpuPkg: Classify IA32/X64 modules in DSC file
https://bugzilla.tianocore.org/show_bug.cgi?id=3860 This is the first step of reworking on UefiCpuPkg in order to accommodating all processor architectures in UEfiCpuPkg. Classify UefiCpuPkg modules to IA32 and X64 sections in DSC file. Move the module to Common section if more than one archs can leverage the same module. Such as the patch 3/6 for BaseUefiCpuLib. Signed-off-by: Abner Chang Co-authored-by: Daniel Schaefer Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Sunil V L Cc: Andrew Fish Cc: Leif Lindholm Cc: Michael D Kinney Cc: Chao Li --- UefiCpuPkg/UefiCpuPkg.dsc | 34 +- 1 file changed, 21 insertions(+), 13 deletions(-) diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc index a0bbde9985..6b43ff6822 100644 --- a/UefiCpuPkg/UefiCpuPkg.dsc +++ b/UefiCpuPkg/UefiCpuPkg.dsc @@ -2,6 +2,7 @@ # UefiCpuPkg Package # # Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved. +# Copyright (c) 2022 Hewlett Packard Enterprise Development LP. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -23,7 +24,7 @@ !include MdePkg/MdeLibs.dsc.inc -[LibraryClasses] +[LibraryClasses.common] BaseLib|MdePkg/Library/BaseLib/BaseLib.inf BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf @@ -31,9 +32,7 @@ SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf - UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf - MtrrLib|UefiCpuPkg/Library/MtrrLib/MtrrLib.inf PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf UefiLib|MdePkg/Library/UefiLib/UefiLib.inf @@ -47,48 +46,56 @@ PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf TimerLib|MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf - LocalApicLib|UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf SmmMemLib|MdePkg/Library/SmmMemLib/SmmMemLib.inf CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf - SmmCpuPlatformHookLib|UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.inf - SmmCpuFeaturesLib|UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf + +[LibraryClasses.IA32, LibraryClasses.X64] + UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf + MtrrLib|UefiCpuPkg/Library/MtrrLib/MtrrLib.inf + LocalApicLib|UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf + SmmCpuPlatformHookLib|UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.inf + SmmCpuFeaturesLib|UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf SmmCpuRendezvousLib|UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezvousLib.inf [LibraryClasses.common.SEC] + HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf + MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf + +[LibraryClasses.IA32.SEC, LibraryClasses.X64.SEC] PlatformSecLib|UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.inf !if $(TOOL_CHAIN_TAG) == "XCODE5" CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPeiCpuExceptionHandlerLib.inf !else CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf !endif - HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf - MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf [LibraryClasses.common.PEIM] MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxPeiLib.inf - MpInitLib|UefiCpuPkg/Library
[edk2-devel] [PATCH 5/6] [RFC] UefiCpuPkg/Library: Add RiscVOpensbiLib
https://bugzilla.tianocore.org/show_bug.cgi?id=3860
(This is migrated from edk2-platforms:Silicon/RISC-V)
EDK2 RISC-V OpenSBI library which pull in external source files under
UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/opensbi to the build process.
Signed-off-by: Abner Chang
Co-authored-by: Daniel Schaefer
Cc: Eric Dong
Cc: Ray Ni
Cc: Rahul Kumar
Cc: Sunil V L
Cc: Andrew Fish
Cc: Leif Lindholm
Cc: Michael D Kinney
Cc: Chao Li
---
UefiCpuPkg/UefiCpuPkg.dec | 12 ++-
UefiCpuPkg/UefiCpuPkg.dsc | 6 ++
.../RiscVOpensbiLib/RiscVOpensbiLib.inf | 89 +++
.../IndustryStandard/RISC-V/RiscVOpensbi.h| 62 +
UefiCpuPkg/Include/RISC-V/OpensbiTypes.h | 82 +
BaseTools/Conf/tools_def.template | 2 +-
6 files changed, 250 insertions(+), 3 deletions(-)
create mode 100644
UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf
create mode 100644 UefiCpuPkg/Include/IndustryStandard/RISC-V/RiscVOpensbi.h
create mode 100644 UefiCpuPkg/Include/RISC-V/OpensbiTypes.h
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 525cde4634..8e85d242a3 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -1,7 +1,8 @@
## @file UefiCpuPkg.dec
# This Package provides UEFI compatible CPU modules and libraries.
#
-# Copyright (c) 2007 - 2022, Intel Corporation. All rights reserved.
+# Copyright (c) 2022, Hewlett Packard Enterprise Development LP. All rights
reserved.
+# Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -14,9 +15,16 @@
PACKAGE_GUID = 2171df9b-0d39-45aa-ac37-2de190010d23
PACKAGE_VERSION= 0.90
-[Includes]
+[Includes.common]
Include
+[Includes.RISCV64]
+ Include/Library
+ Library/RISC-V/RiscVOpensbiLib/opensbi # OpenSBI header file
reference ("include/sbi/...")
+ Library/RISC-V/RiscVOpensbiLib/opensbi/include # Header file reference from
opensbi files, ("sbi/...")
+ Library/RISC-V/RiscVOpensbiLib/opensbi/platform/generic/include # Header
file reference from opensbi files, ("sbi/...")
+
+
[LibraryClasses]
## @libraryclass Defines some routines that are generic for IA32 family CPU
## to be UEFI specification compliant.
diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index 50c9fc294c..374e951f29 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -66,6 +66,9 @@
MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf
SmmCpuRendezvousLib|UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezvousLib.inf
+[LibraryClasses.RISCV64]
+ RiscVOpensbiLib|UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf
+
[LibraryClasses.common.SEC]
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
@@ -185,5 +188,8 @@
UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezvousLib.inf
+[Components.RISCV64]
+ UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf
+
[BuildOptions]
*_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
diff --git a/UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf
b/UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf
new file mode 100644
index 00..54eed050d4
--- /dev/null
+++ b/UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf
@@ -0,0 +1,89 @@
+## @file
+# RISC-V Opensbi Library Instance.
+#
+# Copyright (c) 2022, Hewlett Packard Enterprise Development LP. All rights
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION= 0x0001001b
+ BASE_NAME = RiscVOpensbiLib
+ FILE_GUID = 6EF0C812-66F6-11E9-93CE-3F5D5F0DF0A7
+ MODULE_TYPE= BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = RiscVOpensbiLib
+
+[Sources]
+ opensbi/lib/sbi/riscv_asm.c
+ opensbi/lib/sbi/riscv_atomic.c
+ opensbi/lib/sbi/riscv_hardfp.S
+ opensbi/lib/sbi/riscv_locks.c
+ opensbi/lib/sbi/sbi_bitmap.c
+ opensbi/lib/sbi/sbi_bitops.c
+ opensbi/lib/sbi/sbi_console.c
+ opensbi/lib/sbi/sbi_domain.c
+ opensbi/lib/sbi/sbi_ecall.c
+ opensbi/lib/sbi/sbi_ecall_base.c
+ opensbi/lib/sbi/sbi_ecall_hsm.c
+ opensbi/lib/sbi/sbi_ecall_legacy.c
+ opensbi/lib/sbi/sbi_ecall_replace.c
+ opensbi/lib/sbi/sbi_ecall_vendor.c
+ opensbi/lib/sbi/sbi_emulate_csr.c
+ opensbi/lib/sbi/sbi_fifo.c
+ opensbi/lib/sbi/sbi_hart.c
+ opensbi/lib/sbi/sbi_math.c
+ opensbi/lib/sbi/sbi_hfence.S
+ opensbi/lib/sbi/sbi_hsm.c
+ opensbi/lib/sbi/sbi_illegal_insn.c
+ opensbi/lib/sbi/sbi_init.c
+ opensbi/lib/sbi/sbi_ipi.c
+ opensbi/lib/sbi/sbi_misaligned_ldst.c
+ opensbi/lib/sbi/sbi_platform.c
+ opensbi/lib/sbi/sbi_scratch.c
+ opensbi/lib/sbi/sbi_string.c
+ opensbi/lib/sbi/sbi_system.c
+ opensbi/lib/sbi/
[edk2-devel] [PATCH 4/6] [RFC] UefiCpuPkg/RiscVOpensbLib: Add opensbi submodule
https://bugzilla.tianocore.org/show_bug.cgi?id=3860 (This is migrated from edk2-platforms:Silicon/RISC-V) Add RISC-V opensbi as the submoudle under UefiCpuPkg/Library/RISC-V Signed-off-by: Abner Chang Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Daniel Schaefer Cc: Sunil V L Cc: Andrew Fish Cc: Leif Lindholm Cc: Michael D Kinney Cc: Chao Li --- .gitmodules | 45 ++- .../Library/RISC-V/RiscVOpensbiLib/opensbi| 1 + 2 files changed, 25 insertions(+), 21 deletions(-) create mode 16 UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/opensbi diff --git a/.gitmodules b/.gitmodules index b845c9ee3f..365bcd94bd 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,22 +1,25 @@ -[submodule "CryptoPkg/Library/OpensslLib/openssl"] - path = CryptoPkg/Library/OpensslLib/openssl - url = https://github.com/openssl/openssl -[submodule "SoftFloat"] - path = ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3 - url = https://github.com/ucb-bar/berkeley-softfloat-3.git -[submodule "UnitTestFrameworkPkg/Library/CmockaLib/cmocka"] - path = UnitTestFrameworkPkg/Library/CmockaLib/cmocka - url = https://github.com/tianocore/edk2-cmocka.git -[submodule "MdeModulePkg/Universal/RegularExpressionDxe/oniguruma"] - path = MdeModulePkg/Universal/RegularExpressionDxe/oniguruma - url = https://github.com/kkos/oniguruma -[submodule "MdeModulePkg/Library/BrotliCustomDecompressLib/brotli"] - path = MdeModulePkg/Library/BrotliCustomDecompressLib/brotli - url = https://github.com/google/brotli -[submodule "BaseTools/Source/C/BrotliCompress/brotli"] - path = BaseTools/Source/C/BrotliCompress/brotli - url = https://github.com/google/brotli +[submodule "CryptoPkg/Library/OpensslLib/openssl"] + path = CryptoPkg/Library/OpensslLib/openssl + url = https://github.com/openssl/openssl +[submodule "SoftFloat"] + path = ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3 + url = https://github.com/ucb-bar/berkeley-softfloat-3.git +[submodule "UnitTestFrameworkPkg/Library/CmockaLib/cmocka"] + path = UnitTestFrameworkPkg/Library/CmockaLib/cmocka + url = https://github.com/tianocore/edk2-cmocka.git +[submodule "MdeModulePkg/Universal/RegularExpressionDxe/oniguruma"] + path = MdeModulePkg/Universal/RegularExpressionDxe/oniguruma + url = https://github.com/kkos/oniguruma +[submodule "MdeModulePkg/Library/BrotliCustomDecompressLib/brotli"] + path = MdeModulePkg/Library/BrotliCustomDecompressLib/brotli + url = https://github.com/google/brotli +[submodule "BaseTools/Source/C/BrotliCompress/brotli"] + path = BaseTools/Source/C/BrotliCompress/brotli + url = https://github.com/google/brotli ignore = untracked -[submodule "RedfishPkg/Library/JsonLib/jansson"] - path = RedfishPkg/Library/JsonLib/jansson - url = https://github.com/akheron/jansson +[submodule "RedfishPkg/Library/JsonLib/jansson"] + path = RedfishPkg/Library/JsonLib/jansson + url = https://github.com/akheron/jansson +[submodule "UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/opensbi"] + path = UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/opensbi + url = https://github.com/riscv/opensbi diff --git a/UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/opensbi b/UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/opensbi new file mode 16 index 00..a731c7e369 --- /dev/null +++ b/UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/opensbi @@ -0,0 +1 @@ +Subproject commit a731c7e36988c3308e1978ecde491f2f6182d490 -- 2.31.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#87737): https://edk2.groups.io/g/devel/message/87737 Mute This Topic: https://groups.io/mt/89863234/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 3/6] [RFC] UefiCpuPkg/BaseUefiCpuLib: Add RISC-V RISCV64 instace
https://bugzilla.tianocore.org/show_bug.cgi?id=3860 Add BaseUefiCpuLib instance for RISC-V RISCV64 arch. Signed-off-by: Abner Chang Co-authored-by: Daniel Schaefer Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Sunil V L Cc: Andrew Fish Cc: Leif Lindholm Cc: Michael D Kinney Cc: Chao Li --- UefiCpuPkg/UefiCpuPkg.dsc | 7 +- .../Library/BaseUefiCpuLib/BaseUefiCpuLib.inf | 8 +- .../Include/Library/RISC-V/RiscVCpuLib.h | 118 +++ .../Library/BaseUefiCpuLib/BaseUefiCpuLib.uni | 5 +- .../Library/BaseUefiCpuLib/RISCV64/Cpu.S | 143 ++ 5 files changed, 274 insertions(+), 7 deletions(-) create mode 100644 UefiCpuPkg/Include/Library/RISC-V/RiscVCpuLib.h create mode 100644 UefiCpuPkg/Library/BaseUefiCpuLib/RISCV64/Cpu.S diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc index 6b43ff6822..50c9fc294c 100644 --- a/UefiCpuPkg/UefiCpuPkg.dsc +++ b/UefiCpuPkg/UefiCpuPkg.dsc @@ -14,7 +14,7 @@ PLATFORM_VERSION = 0.90 DSC_SPECIFICATION = 0x00010005 OUTPUT_DIRECTORY = Build/UefiCpu - SUPPORTED_ARCHITECTURES= IA32|X64 + SUPPORTED_ARCHITECTURES= IA32|X64|RISCV64 BUILD_TARGETS = DEBUG|RELEASE|NOOPT SKUID_IDENTIFIER = DEFAULT @@ -55,9 +55,9 @@ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf + UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf [LibraryClasses.IA32, LibraryClasses.X64] - UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf MtrrLib|UefiCpuPkg/Library/MtrrLib/MtrrLib.inf LocalApicLib|UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf SmmCpuPlatformHookLib|UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.inf @@ -120,6 +120,8 @@ # # Drivers/Libraries within this package # +[Components.common] + UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf [Components.IA32, Components.X64] UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf @@ -144,7 +146,6 @@ UefiCpuPkg/CpuIo2Smm/CpuIo2StandaloneMm.inf UefiCpuPkg/CpuMpPei/CpuMpPei.inf UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf - UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf b/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf index 34d3a7bb43..f43498e9b4 100644 --- a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf +++ b/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf @@ -5,6 +5,7 @@ # # Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved. # Copyright (c) 2020, AMD Inc. All rights reserved. +# Copyright (c) 2022, Hewlett Packard Enterprise Development LP. All rights reserved. # SPDX-License-Identifier: BSD-2-Clause-Patent # ## @@ -21,7 +22,7 @@ # # The following information is for reference only and not required by the build tools. # -# VALID_ARCHITECTURES = IA32 X64 +# VALID_ARCHITECTURES = IA32 X64 RISCV64 # [Sources.IA32] @@ -30,9 +31,12 @@ [Sources.X64] X64/InitializeFpu.nasm -[Sources] +[Sources.IA32, Sources.X64] BaseUefiCpuLib.c +[Sources.RISCV64] + RISCV64/Cpu.S + [Packages] MdePkg/MdePkg.dec UefiCpuPkg/UefiCpuPkg.dec diff --git a/UefiCpuPkg/Include/Library/RISC-V/RiscVCpuLib.h b/UefiCpuPkg/Include/Library/RISC-V/RiscVCpuLib.h new file mode 100644 index 00..610456d0be --- /dev/null +++ b/UefiCpuPkg/Include/Library/RISC-V/RiscVCpuLib.h @@ -0,0 +1,118 @@ +/** @file + RISC-V CPU library definitions. + + Copyright (c) 2022, Hewlett Packard Enterprise Development LP. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#ifndef RISCV_CPU_LIB_H_ +#define RISCV_CPU_LIB_H_ + +#include "RiscVImpl.h" + +/** + RISCV_TRAP_HANDLER +**/ +typedef +VOID +(EFIAPI *RISCV_TRAP_HANDLER)( + VOID + ); + +VOID +RiscVSetMachineScratch ( + RISCV_MACHINE_MODE_CONTEXT *RiscvContext + ); + +UINT32 +RiscVGetMachineScratch ( + VOID + ); + +UINT32 +RiscVGetMachineTrapCause ( + VOID + ); + +UINT64 +RiscVReadMachineTimer ( + VOID + ); + +UINT64 +RiscVReadMachineTimerInterface ( + VOID + ); + +VOID + RiscVSetMachineTimerCmp (UINT64); + +UINT64 +RiscVReadMachineTimerCmp ( + VOID + ); + +UINT64 +RiscVReadMachineInterruptEnable ( + VOID + ); + +UINT64 +RiscVReadMachineInterruptPending ( + VOID + ); + +UINT64 +RiscVReadMachineStatus ( + VOID + ); + +VOID + RiscVWriteMachineStatus (UINT64); + +UINT64 +RiscVReadMachineTrapVector ( + VOID + ); + +UINT64 +RiscVReadMachineIsa ( + VOID + );
[edk2-devel] [PATCH 2/6] [RFC] UefiCpuPkg/Include: Add header files of RISC-V processor architecture
(This is migrated from edk2-platforms:Silicon/RISC-V) https://bugzilla.tianocore.org/show_bug.cgi?id=3860 RISC-V processor architecture definitions. Signed-off-by: Abner Chang Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Daniel Schaefer Cc: Sunil V L Cc: Andrew Fish Cc: Leif Lindholm Cc: Michael D Kinney Cc: Chao Li --- .../Include/IndustryStandard/RISC-V/RiscV.h | 162 ++ UefiCpuPkg/Include/RISC-V/RiscVImpl.h | 87 ++ 2 files changed, 249 insertions(+) create mode 100644 UefiCpuPkg/Include/IndustryStandard/RISC-V/RiscV.h create mode 100644 UefiCpuPkg/Include/RISC-V/RiscVImpl.h diff --git a/UefiCpuPkg/Include/IndustryStandard/RISC-V/RiscV.h b/UefiCpuPkg/Include/IndustryStandard/RISC-V/RiscV.h new file mode 100644 index 00..3edd1e6263 --- /dev/null +++ b/UefiCpuPkg/Include/IndustryStandard/RISC-V/RiscV.h @@ -0,0 +1,162 @@ +/** @file + RISC-V processor architecture definitions. + + Copyright (c) 2022 Hewlett Packard Enterprise Development LP. All rights reserved. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef RISCV_INDUSTRY_STANDARD_H_ +#define RISCV_INDUSTRY_STANDARD_H_ + +#if defined (MDE_CPU_RISCV64) +#define RISC_V_XLEN_BITS 64 +#else +#endif + +#define RISC_V_ISA_ATOMIC_EXTENSION (0x0001 << 0) +#define RISC_V_ISA_BIT_OPERATION_EXTENSION(0x0001 << 1) +#define RISC_V_ISA_COMPRESSED_EXTENSION (0x0001 << 2) +#define RISC_V_ISA_DOUBLE_PRECISION_FP_EXTENSION (0x0001 << 3) +#define RISC_V_ISA_RV32E_ISA (0x0001 << 4) +#define RISC_V_ISA_SINGLE_PRECISION_FP_EXTENSION (0x0001 << 5) +#define RISC_V_ISA_ADDITIONAL_STANDARD_EXTENSION (0x0001 << 6) +#define RISC_V_ISA_RESERVED_1 (0x0001 << 7) +#define RISC_V_ISA_INTEGER_ISA_EXTENSION (0x0001 << 8) +#define RISC_V_ISA_DYNAMICALLY_TRANSLATED_LANGUAGE_EXTENSION (0x0001 << 9) +#define RISC_V_ISA_RESERVED_2 (0x0001 << 10) +#define RISC_V_ISA_DECIMAL_FP_EXTENSION (0x0001 << 11) +#define RISC_V_ISA_INTEGER_MUL_DIV_EXTENSION (0x0001 << 12) +#define RISC_V_ISA_USER_LEVEL_INTERRUPT_SUPPORTED (0x0001 << 13) +#define RISC_V_ISA_RESERVED_3 (0x0001 << 14) +#define RISC_V_ISA_PACKED_SIMD_EXTENSION (0x0001 << 15) +#define RISC_V_ISA_QUAD_PRECISION_FP_EXTENSION(0x0001 << 16) +#define RISC_V_ISA_RESERVED_4 (0x0001 << 17) +#define RISC_V_ISA_SUPERVISOR_MODE_IMPLEMENTED(0x0001 << 18) +#define RISC_V_ISA_TRANSATIONAL_MEMORY_EXTENSION (0x0001 << 19) +#define RISC_V_ISA_USER_MODE_IMPLEMENTED (0x0001 << 20) +#define RISC_V_ISA_VECTOR_EXTENSION (0x0001 << 21) +#define RISC_V_ISA_RESERVED_5 (0x0001 << 22) +#define RISC_V_ISA_NON_STANDARD_EXTENSION (0x0001 << 23) +#define RISC_V_ISA_RESERVED_6 (0x0001 << 24) +#define RISC_V_ISA_RESERVED_7 (0x0001 << 25) + +// +// RISC-V CSR definitions. +// +// +// Machine information +// +#define RISCV_CSR_MACHINE_MVENDORID 0xF11 +#define RISCV_CSR_MACHINE_MARCHID0xF12 +#define RISCV_CSR_MACHINE_MIMPID 0xF13 +#define RISCV_CSR_MACHINE_HARRID 0xF14 +// +// Machine Trap Setup. +// +#define RISCV_CSR_MACHINE_MSTATUS 0x300 +#define RISCV_CSR_MACHINE_MISA 0x301 +#define RISCV_CSR_MACHINE_MEDELEG 0x302 +#define RISCV_CSR_MACHINE_MIDELEG 0x303 +#define RISCV_CSR_MACHINE_MIE 0x304 +#define RISCV_CSR_MACHINE_MTVEC0x305 + +#define RISCV_TIMER_COMPARE_BITS 32 +// +// Machine Timer and Counter. +// +// #define RISCV_CSR_MACHINE_MTIME 0x701 +// #define RISCV_CSR_MACHINE_MTIMEH0x741 +// +// Machine Trap Handling. +// +#define RISCV_CSR_MACHINE_MSCRATCH 0x340 +#define RISCV_CSR_MACHINE_MEPC 0x341 +#define RISCV_CSR_MACHINE_MCAUSE0x342 +#define MACHINE_MCAUSE_EXCEPTION_ MASK 0x0f +#define MACHINE_MCAUSE_INTERRUPT(RISC_V_XLEN_BITS - 1) +#define RISCV_CSR_MACHINE_MBADADDR 0x343 +#define RISCV_CSR_MACHINE_MIP 0x344 + +// +// Machine Protection and Translation. +// +#define RISCV_CSR_MACHINE_MBASE0x380 +#define RISCV_CSR_MACHINE_MBOUND 0x381 +#define RISCV_CSR_MACHINE_MIBASE 0x382 +#define RISCV_CSR_MACHINE_MIBOUND 0x383 +#define RISCV_CSR_MACHINE_MDBASE 0x384 +#define RISCV_CSR_MACHINE_MDBOUND 0x385 + +// +// Supervisor mode CSR. +// +#define RISCV_CSR_SUPERVISOR_SS
[edk2-devel] [PATCH 0/6] [RFC] Rework UefiCpuPkg
https://bugzilla.tianocore.org/show_bug.cgi?id=3860 This is the project having rework on UefiCpuPkg in order to support a variety of processor architectures. Some modules under UefiCpuPkg are required to be abstract for the different archs. The first step is to classify UefiCpuPkg modules to IA32 and X64 sections in DSC file (Patch 1/6). Move the module to Common section later if more than one archs can leverage the same module (such as Patch 3/6 for BaseUefiCpuLib). Abner Chang (6): [RFC] UefiCpuPkg: Classify IA32/X64 modules in DSC file [RFC] UefiCpuPkg/Include: Add header files of RISC-V processor architecture [RFC] UefiCpuPkg/BaseUefiCpuLib: Add RISC-V RISCV64 instace [RFC] UefiCpuPkg/RiscVOpensbLib: Add opensbi submodule [RFC] UefiCpuPkg/Library: Add RiscVOpensbiLib [RFC] UefiCpuPkg: Update YAML file for RISC-V arch UefiCpuPkg/UefiCpuPkg.dec | 12 +- UefiCpuPkg/UefiCpuPkg.dsc | 45 +++-- .../Library/BaseUefiCpuLib/BaseUefiCpuLib.inf | 8 +- .../RiscVOpensbiLib/RiscVOpensbiLib.inf | 89 ++ .../Include/IndustryStandard/RISC-V/RiscV.h | 162 ++ .../IndustryStandard/RISC-V/RiscVOpensbi.h| 62 +++ .../Include/Library/RISC-V/RiscVCpuLib.h | 118 + UefiCpuPkg/Include/RISC-V/OpensbiTypes.h | 82 + UefiCpuPkg/Include/RISC-V/RiscVImpl.h | 87 ++ .gitmodules | 45 ++--- BaseTools/Conf/tools_def.template | 2 +- .../Library/BaseUefiCpuLib/BaseUefiCpuLib.uni | 5 +- .../Library/BaseUefiCpuLib/RISCV64/Cpu.S | 143 .../Library/RISC-V/RiscVOpensbiLib/opensbi| 1 + UefiCpuPkg/UefiCpuPkg.ci.yaml | 61 ++- 15 files changed, 877 insertions(+), 45 deletions(-) create mode 100644 UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf create mode 100644 UefiCpuPkg/Include/IndustryStandard/RISC-V/RiscV.h create mode 100644 UefiCpuPkg/Include/IndustryStandard/RISC-V/RiscVOpensbi.h create mode 100644 UefiCpuPkg/Include/Library/RISC-V/RiscVCpuLib.h create mode 100644 UefiCpuPkg/Include/RISC-V/OpensbiTypes.h create mode 100644 UefiCpuPkg/Include/RISC-V/RiscVImpl.h create mode 100644 UefiCpuPkg/Library/BaseUefiCpuLib/RISCV64/Cpu.S create mode 16 UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/opensbi -- 2.31.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#87734): https://edk2.groups.io/g/devel/message/87734 Mute This Topic: https://groups.io/mt/89863231/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH] EmulatorPkg/RedfishPlatformCredentialLib: Don't stop Redfish service
https://bugzilla.tianocore.org/show_bug.cgi?id=3859
Platform Redfish credential library shouldn't top the service at either
EndOfDXE or ExitBootService notification. RedfishConfiguHandler UEFI driver is
responsible to stop the Redfish service when EndOfDXE or ExitBootService event
is triggered.
Signed-off-by: Abner Chang
Cc: Nickle Wang
Cc: Andrew Fish
Cc: Ray Ni
---
.../RedfishPlatformCredentialLib/RedfishPlatformCredentialLib.c | 2 --
1 file changed, 2 deletions(-)
diff --git
a/EmulatorPkg/Library/RedfishPlatformCredentialLib/RedfishPlatformCredentialLib.c
b/EmulatorPkg/Library/RedfishPlatformCredentialLib/RedfishPlatformCredentialLib.c
index a0233a984d..614eaebb0d 100644
---
a/EmulatorPkg/Library/RedfishPlatformCredentialLib/RedfishPlatformCredentialLib.c
+++
b/EmulatorPkg/Library/RedfishPlatformCredentialLib/RedfishPlatformCredentialLib.c
@@ -223,7 +223,6 @@ LibCredentialExitBootServicesNotify (
IN EDKII_REDFISH_CREDENTIAL_PROTOCOL *This
)
{
- LibStopRedfishService (This, ServiceStopTypeExitBootService);
}
/**
@@ -237,5 +236,4 @@ LibCredentialEndOfDxeNotify (
IN EDKII_REDFISH_CREDENTIAL_PROTOCOL *This
)
{
- LibStopRedfishService (This, ServiceStopTypeSecureBootDisabled);
}
--
2.17.1
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[edk2-devel] [PATCH] Maintainers: Update Maintainers.txt for edk2 Redfish modules
Add maintainer and reviewer for the edk2 Redfish-related modules under EmulatorPkg. Signed-off-by: Abner Chang Cc: Andrew Fish Cc: Ray Ni Cc: Nickle Wang --- Maintainers.txt | 5 + 1 file changed, 5 insertions(+) diff --git a/Maintainers.txt b/Maintainers.txt index d26f91c02e..e32507dd6e 100644 --- a/Maintainers.txt +++ b/Maintainers.txt @@ -194,6 +194,11 @@ M: Andrew Fish [ajfish] M: Ray Ni [niruiyu] S: Maintained +EmulatorPkg: Redfish-related modules +F: EmulatorPkg/*Redfish* +M: Abner Chang [changab] +R: Nickle Wang [nicklela] + FatPkg F: FatPkg/ W: https://github.com/tianocore/tianocore.github.io/wiki/Edk2-fat-driver -- 2.17.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#87521): https://edk2.groups.io/g/devel/message/87521 Mute This Topic: https://groups.io/mt/89765382/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH EDK2 v1 1/1] RedfishPkg: fix memory leak issue
Hi Wenyi,
Please add my RB in the commit message and create the PR against edk2, let me
know the link to PR as well.
Thanks,
Abner
From: Chang, Abner (HPS SW/FW Technologist)
Sent: Friday, March 11, 2022 1:48 PM
To: Wenyi Xie ; devel@edk2.groups.io
; Wang, Nickle (Server BIOS)
Cc: songdongku...@huawei.com
Subject: RE: [PATCH EDK2 v1 1/1] RedfishPkg: fix memory leak issue
Thanks for catching this.
Reviewed-by: Abner Chang
> -Original Message-
> From: Wenyi Xie
> Sent: Thursday, March 10, 2022 7:26 PM
> To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist)
> ; Wang, Nickle (Server BIOS)
>
> Cc: songdongku...@huawei.com; xiewen...@huawei.com
> Subject: [PATCH EDK2 v1 1/1] RedfishPkg: fix memory leak issue
>
> The calloc memory is not free when function collectionEvalOp
> return in the halfway.
>
> Cc: Abner Chang
> Cc: Nickle Wang
> Signed-off-by: Wenyi Xie
> ---
> RedfishPkg/PrivateLibrary/RedfishLib/edk2libredfish/src/payload.c | 16
> +++-
> 1 file changed, 7 insertions(+), 9 deletions(-)
>
> diff --git
> a/RedfishPkg/PrivateLibrary/RedfishLib/edk2libredfish/src/payload.c
> b/RedfishPkg/PrivateLibrary/RedfishLib/edk2libredfish/src/payload.c
> index 3f2b83e834d0..6c6e2246abe3 100644
> --- a/RedfishPkg/PrivateLibrary/RedfishLib/edk2libredfish/src/payload.c
> +++ b/RedfishPkg/PrivateLibrary/RedfishLib/edk2libredfish/src/payload.c
> @@ -620,6 +620,7 @@ collectionEvalOp (
>if (((*StatusCode == NULL) && (members == NULL)) ||
>((*StatusCode != NULL) && ((**StatusCode < HTTP_STATUS_200_OK) ||
> (**StatusCode > HTTP_STATUS_206_PARTIAL_CONTENT
>{
> +free (valid);
> return members;
>}
>
> @@ -633,6 +634,7 @@ collectionEvalOp (
> if (((*StatusCode == NULL) && (tmp == NULL)) ||
> ((*StatusCode != NULL) && ((**StatusCode < HTTP_STATUS_200_OK) ||
> (**StatusCode > HTTP_STATUS_206_PARTIAL_CONTENT
> {
> + free (valid);
>return tmp;
> }
>
> @@ -658,19 +660,15 @@ collectionEvalOp (
>
>cleanupPayload (members);
>if (validCount == 0) {
> -free (valid);
> -return NULL;
> - }
> -
> - if (validCount == 1) {
> +ret = NULL;
> + } else if (validCount == 1) {
> ret = valid[0];
> -free (valid);
> -return ret;
>} else {
> ret = createCollection (payload->service, validCount, valid);
> -free (valid);
> -return ret;
>}
> +
> + free (valid);
> + return ret;
> }
>
> static redfishPayload *
> --
> 2.20.1.windows.1
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Re: [edk2-devel] [PATCH EDK2 v1 1/1] RedfishPkg: fix memory leak issue
Thanks for catching this.
Reviewed-by: Abner Chang
> -Original Message-
> From: Wenyi Xie
> Sent: Thursday, March 10, 2022 7:26 PM
> To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist)
> ; Wang, Nickle (Server BIOS)
>
> Cc: songdongku...@huawei.com; xiewen...@huawei.com
> Subject: [PATCH EDK2 v1 1/1] RedfishPkg: fix memory leak issue
>
> The calloc memory is not free when function collectionEvalOp
> return in the halfway.
>
> Cc: Abner Chang
> Cc: Nickle Wang
> Signed-off-by: Wenyi Xie
> ---
> RedfishPkg/PrivateLibrary/RedfishLib/edk2libredfish/src/payload.c | 16
> +++-
> 1 file changed, 7 insertions(+), 9 deletions(-)
>
> diff --git
> a/RedfishPkg/PrivateLibrary/RedfishLib/edk2libredfish/src/payload.c
> b/RedfishPkg/PrivateLibrary/RedfishLib/edk2libredfish/src/payload.c
> index 3f2b83e834d0..6c6e2246abe3 100644
> --- a/RedfishPkg/PrivateLibrary/RedfishLib/edk2libredfish/src/payload.c
> +++ b/RedfishPkg/PrivateLibrary/RedfishLib/edk2libredfish/src/payload.c
> @@ -620,6 +620,7 @@ collectionEvalOp (
>if (((*StatusCode == NULL) && (members == NULL)) ||
>((*StatusCode != NULL) && ((**StatusCode < HTTP_STATUS_200_OK) ||
> (**StatusCode > HTTP_STATUS_206_PARTIAL_CONTENT
>{
> +free (valid);
> return members;
>}
>
> @@ -633,6 +634,7 @@ collectionEvalOp (
> if (((*StatusCode == NULL) && (tmp == NULL)) ||
> ((*StatusCode != NULL) && ((**StatusCode < HTTP_STATUS_200_OK) ||
> (**StatusCode > HTTP_STATUS_206_PARTIAL_CONTENT
> {
> + free (valid);
>return tmp;
> }
>
> @@ -658,19 +660,15 @@ collectionEvalOp (
>
>cleanupPayload (members);
>if (validCount == 0) {
> -free (valid);
> -return NULL;
> - }
> -
> - if (validCount == 1) {
> +ret = NULL;
> + } else if (validCount == 1) {
> ret = valid[0];
> -free (valid);
> -return ret;
>} else {
> ret = createCollection (payload->service, validCount, valid);
> -free (valid);
> -return ret;
>}
> +
> + free (valid);
> + return ret;
> }
>
> static redfishPayload *
> --
> 2.20.1.windows.1
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[edk2-devel] [PATCH] EmulatorPkg/RedfishPlatformCredentialLib: Check EFI_SECURE_BOOT_MODE_NAME
Check EFI_SECURE_BOOT_MODE_NAME before setting the flags to
prohibit acquiring Redfish service credential and using Redfish
service.
Signed-off-by: Abner Chang
Cc: Nickle Wang
Cc: Andrew Fish
Cc: Ray Ni
---
.../RedfishPlatformCredentialLib.c| 32 +--
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git
a/EmulatorPkg/Library/RedfishPlatformCredentialLib/RedfishPlatformCredentialLib.c
b/EmulatorPkg/Library/RedfishPlatformCredentialLib/RedfishPlatformCredentialLib.c
index eaf9c56450..a0233a984d 100644
---
a/EmulatorPkg/Library/RedfishPlatformCredentialLib/RedfishPlatformCredentialLib.c
+++
b/EmulatorPkg/Library/RedfishPlatformCredentialLib/RedfishPlatformCredentialLib.c
@@ -165,6 +165,9 @@ LibStopRedfishService (
IN EDKII_REDFISH_CREDENTIAL_STOP_SERVICE_TYPE ServiceStopType
)
{
+ EFI_STATUS Status;
+ UINT8 *SecureBootVar;
+
if (ServiceStopType >= ServiceStopTypeMax) {
return EFI_INVALID_PARAMETER;
}
@@ -177,8 +180,18 @@ LibStopRedfishService (
if (!PcdGetBool (PcdRedfishServieStopIfSecureBootDisabled)) {
return EFI_UNSUPPORTED;
} else {
- mStopRedfishService = TRUE;
- DEBUG ((DEBUG_INFO, "EFI Redfish service is stopped due to SecureBoot is
disabled!!\n"));
+ //
+ // Check Secure Boot status and lock Redfish service if Secure Boot is
disabled.
+ //
+ Status = GetVariable2 (EFI_SECURE_BOOT_MODE_NAME,
, (VOID **), NULL);
+ if (EFI_ERROR (Status) || (*SecureBootVar != SECURE_BOOT_MODE_ENABLE)) {
+//
+// Secure Boot is disabled
+//
+mSecureBootDisabled = TRUE;
+mStopRedfishService = TRUE;
+DEBUG ((DEBUG_INFO, "EFI Redfish service is stopped due to SecureBoot
is disabled!!\n"));
+ }
}
} else if (ServiceStopType == ServiceStopTypeExitBootService) {
//
@@ -224,18 +237,5 @@ LibCredentialEndOfDxeNotify (
IN EDKII_REDFISH_CREDENTIAL_PROTOCOL *This
)
{
- EFI_STATUS Status;
- UINT8 *SecureBootVar;
-
- //
- // Check Secure Boot status and lock Redfish service if Secure Boot is
disabled.
- //
- Status = GetVariable2 (EFI_SECURE_BOOT_MODE_NAME, ,
(VOID **), NULL);
- if (EFI_ERROR (Status) || (*SecureBootVar != SECURE_BOOT_MODE_ENABLE)) {
-//
-// Secure Boot is disabled
-//
-mSecureBootDisabled = TRUE;
-LibStopRedfishService (This, ServiceStopTypeSecureBootDisabled);
- }
+ LibStopRedfishService (This, ServiceStopTypeSecureBootDisabled);
}
--
2.17.1
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Re: [edk2-devel] RFC: UefiCpuPkg for all processor archs
Hi Mike, Do you have any feedback on this? Or we just bring this topic to the design meeting? That would be good if any of you can give other thoughts, so I can have some POC code before the design meeting. Thanks Abner From: devel@edk2.groups.io on behalf of Abner Chang Sent: Tuesday, March 1, 2022 5:56 PM To: Ni, Ray ; Kinney, Michael D ; Leif Lindholm ; devel@edk2.groups.io ; LiChao Cc: Andrew Fish ; Sami Mujawar ; Schaefer, Daniel (ROM Janitor) ; Sunil V L Subject: Re: [edk2-devel] RFC: UefiCpuPkg for all processor archs Hi Ray, RISC-V doesn't have the similar functions as those are provided in BaseUefiCpuLib.c. In this case, what we can do is just leverage the library class but different implementation for archs? At least we don't need another library class for RISC-V. We can have the common source file if all archs provided the same functionality later. Regards, Abner From: Ni, Ray Sent: Tuesday, March 1, 2022 3:07 PM To: Chang, Abner (HPS SW/FW Technologist) ; Kinney, Michael D ; Leif Lindholm ; devel@edk2.groups.io ; LiChao Cc: Andrew Fish ; Sami Mujawar ; LiChao ; Schaefer, Daniel (ROM Janitor) ; Sunil V L Subject: RE: RFC: UefiCpuPkg for all processor archs Abner, UefiCpuPkg\SecCore\SecCoreNative.inf is a module that might not depend on X86. It assumes the UefiCpuPkg/ResetVector inits the CPU well. UefiCpuPKg/BaseUefiCpuLib 1. Rename BaseUefiCpuLib.c to BaseUefiCpuLibIa32X64.c BaseUefiCpuLibRiscV64.c for RISC-V arch and assembly code under /RISCV64 2. Or move all X86 source files to under BaseUefiCpuLib/X86, BaseUefiCpuLib/RISC-V for RISC-V arch (I prefer this way, the directory looks clean) That depends on whether the RISC-V or LoongArch can implement the same API as that in X86 version. Maybe some of the APIs are too X86 specific that makes it hard for implementing for other ARCHs. That might lead to a more abstraction. Without the concrete implementation available, I have no idea what abstraction is. Thanks, Ray From: Chang, Abner (HPS SW/FW Technologist) Sent: Tuesday, March 1, 2022 9:26 AM To: Kinney, Michael D ; Leif Lindholm ; devel@edk2.groups.io; Ni, Ray ; LiChao Cc: Andrew Fish ; Sami Mujawar ; LiChao ; Schaefer, Daniel ; Sunil V L Subject: RFC: UefiCpuPkg for all processor archs Hi Mike and Ray, I just got a chance to back on this topic and below are few questions regarding the UefiCpuPkg for all processor archs. I change the subject and loop Chao Li from Loongsoon who is contributing Loongarch64 to Uefi/edk2. He may have to handle the similar things for Loongarch64. I went through RISC-V modules that currently located on edk2-platforms repo (Platform/RISC-V/PlatformPKg and Silicon/RISC-V/ProcessorPkg) and figure out the modules we would move to under UefiCpuPkg and MdeModulePkg. We could go through the proposal in the design meeting later, however I would like to confirm the proposal of revising modules under /UEfiCpuPkg those were implemented in X86 oriented before we get to that point. * UefiCpuPKg\SecCore * The implementation of this module is very x86 oriented. There is likely nothing to leverage between archs. My thought was * 1. Having RISC-V SecCore in its own folder, e.g. UefiCpuPkg/RISC-V/SecCore and create the individual INF for archs. * However, 2. We can also consider having the separate section in SecCore/SecCore.inf. Move all X86 source files to under UefiCpuPkg/SecCore/X86 and have /RISC-V folder under UefiCpuPkg/SecCore for RISC-V arch. (I prefer this way) * * UefiCpuPKg/BaseUefiCpuLib * 1. Rename BaseUefiCpuLib.c to BaseUefiCpuLibIa32X64.c * BaseUefiCpuLibRiscV64.c for RISC-V arch and assembly code under /RISCV64 * 2. Or move all X86 source files to under BaseUefiCpuLib/X86, BaseUefiCpuLib/RISC-V for RISC-V arch (I prefer this way, the directory looks clean) * * UefiCpuPKg/CpuExceptionHandlerLib Too many X86 source files, move all X86 source files to under CpuExecptionHander/X86, CpuExecptionHander/RISC-V for RISC-V arch * Having abstract level under /CpuExecptionHander, e.g. INF, PeiException.c, DxeException.c and etc. * * UefiCpuPKg\Library\CpuTimerLib * 1. Rename BaseCpuTimerLib.c to BaseCpuTimerLibIa32X64.c, BaseCpuTimerLibRiscV64.c for RISC-V arch. * 2. Or move all X86 source files to under BaseUefiCpuLib/X86, BaseUefiCpuLib/RISC-V for RISC-V arch (I prefer this way) * * UefiCpuPKg/CpuDxe * Revise CpuDxe.c and CpuDxe.h to be abstract for the processor archs. * Move all x86 implementations to under /X86, CpuDxe/RISC-V for RISC-V CpuDxe implementation Let me know your thoughts, I can initiate the PoC code after we get on the same page. Thanks Abner From: Chang, Abner (HPS SW/FW Technologist) Sent: Saturday, February 5, 2022 10:56 PM To: Kinney, Michael D mailto:michael.d.kin...@intel.com
Re: [edk2-devel] RFC: UefiCpuPkg for all processor archs
added to OvmfPkg. > > > > > > > > Thanks > > > Abner > > > > > > > -Original Message- > > > > From: Kinney, Michael D > > > > mailto:michael.d.kin...@intel.com>> > > > > Sent: Monday, January 10, 2022 11:58 PM > > > > To: Leif Lindholm mailto:l...@nuviainc.com>>; > > > > devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Chang, > > Abner > > > > (HPS SW/FW Technologist) > > > > mailto:abner.ch...@hpe.com>>; Kinney, Michael D > > > > mailto:michael.d.kin...@intel.com>>; Ni, > > > > Ray mailto:ray...@intel.com>> > > > > Cc: Andrew Fish mailto:af...@apple.com>>; Sami Mujawar > > > > mailto:sami.muja...@arm.com>> > > > > Subject: RE: [edk2-devel] [PATCH 01/79] ProcessorPkg/Include: Add > > header > > > > files of RISC-V processor package > > > > > > > > Hi Abner, > > > > > > > > I see comments from Leif as well. > > > > > > > > Do you think a discussion in the design meeting Ray Ni runs would be > > > > valuable > > > > to review all the modules/libs/includes and discuss options for the best > > > > location for them to reside in the edk2 repos? > > > > > > > > Thanks, > > > > > > > > Mike > > > > > > > > > -Original Message- > > > > > From: Kinney, Michael D > > > > > mailto:michael.d.kin...@intel.com>> > > > > > Sent: Monday, January 10, 2022 7:55 AM > > > > > To: Leif Lindholm mailto:l...@nuviainc.com>>; > > > > > devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Chang, > > > > Abner mailto:abner.ch...@hpe.com>>; Kinney, > > > > Michael D > > > > > mailto:michael.d.kin...@intel.com>> > > > > > Cc: Andrew Fish mailto:af...@apple.com>>; Sami > > > > > Mujawar > > > > mailto:sami.muja...@arm.com>> > > > > > Subject: RE: [edk2-devel] [PATCH 01/79] ProcessorPkg/Include: Add > > > > header files of RISC-V processor package > > > > > > > > > > Hi Abner, > > > > > > > > > > I would also like to see some proposals on adding the RiscV CPU scoped > > > > content > > > > > to the existing MdePkg/UefiCpuPkg instead of adding a new top level > > CPU > > > > package. > > > > > > > > > > There is already some work started to move some of the ARM specific > > > > content > > > > > from ARM CPU packages into MdePkg. > > > > > > > > > > Thanks, > > > > > > > > > > Mike > > > > > > > > > > > -Original Message- > > > > > > From: Leif Lindholm mailto:l...@nuviainc.com>> > > > > > > Sent: Monday, January 10, 2022 5:11 AM > > > > > > To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Chang, Abner > > > > > > mailto:abner.ch...@hpe.com>> > > > > > > Cc: Andrew Fish mailto:af...@apple.com>>; Kinney, > > > > > > Michael D > > > > mailto:michael.d.kin...@intel.com>>; Sami > > > > Mujawar > > mailto:sami.muja...@arm.com>> > > > > > > Subject: Re: [edk2-devel] [PATCH 01/79] ProcessorPkg/Include: Add > > > > header files of RISC-V processor package > > > > > > > > > > > > On Sat, Jan 08, 2022 at 12:07:53 +0800, Abner Chang wrote: > > > > > > > (This is migrated from edk2-platforms:Silicon/RISC-V) > > > > > > > > > > > > > > RISC-V processor package library definitions. > > > > > > > > > > > > > > IndustryStandard/RiscV.h > > > > > > > -Add RiscV.h which conform with RISC-V Privilege Spec v1.10. > > > > > > > > > > > > > > RiscVImpl.h > > > > > > > -Definition of EDK2 RISC-V implementation. > > > > > > > > > > > > > > Signed-off-by: Abner Chang > > > > > > > mailto:abner.ch...@hpe.com>> > > > > > > > Co-authored-by: Daniel Schaefer > > > > > > > mailto:daniel.schae...@hpe.com>> > > > > > > > Co-authored-by: Gilbert Chen >
[edk2-devel] RFC: UefiCpuPkg for all processor archs
er > > files of RISC-V processor package > > > > Hi Abner, > > > > General recommendations included below. Of course each > > lib/modules/include needs to be reviewed and the > > best location selected. I am aware that there are components in edk2 that > > do not follow these general > > recommendations. This is due to content that was added before these > > recommendations were established > > and we have work to do to get everything aligned. > > > > Mike > > > > > -Original Message- > > > From: Chang, Abner (HPS SW/FW Technologist) > > > mailto:abner.ch...@hpe.com>> > > > Sent: Wednesday, January 12, 2022 9:34 PM > > > To: Kinney, Michael D > > > mailto:michael.d.kin...@intel.com>>; Leif > > > Lindholm > > mailto:l...@nuviainc.com>>; > > devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Ni, Ray > > > mailto:ray...@intel.com>> > > > Cc: Andrew Fish mailto:af...@apple.com>>; Sami Mujawar > > mailto:sami.muja...@arm.com>> > > > Subject: RE: [edk2-devel] [PATCH 01/79] ProcessorPkg/Include: Add > > header files of RISC-V processor package > > > > > > HI Mike, > > > It is no problem to meet there. However, I am not available to join the > > design meeting in the next two weeks. Before we can get > > > together to discuss the best locations, do you have information regarding > > the rationale of driver/library location? > > > > > > What is the best location for, > > > - Processor ARCH dependent modules > > > > MdePkg for libs > > UefiCpuPkg for modules > > > > > - Common modules for all processor ARCHs > > > > Feature Packages based on the common feature. Add to existing if it fits. > > Create new for completely new feature area. > > > > > - Platform module that is specific to processor ARCH? > > > > edk2-platform repository > How about Leif's suggestion? The CommonPlatformPkg on edk2? > > Abner > > > > > The only exception so far are platform modules used to support > > OvmfPkg/QEMU to support CI. > > In this case the modules are added to OvmfPkg. > > > > > - Platform module that is common to processor ARCHs? > > > > edk2-platform repository > > > > The only exception so far are platform modules used to support > > OvmfPkg/QEMU to support CI. > > In this case the modules are added to OvmfPkg. > > > > > > > > Thanks > > > Abner > > > > > > > -Original Message- > > > > From: Kinney, Michael D > > > > mailto:michael.d.kin...@intel.com>> > > > > Sent: Monday, January 10, 2022 11:58 PM > > > > To: Leif Lindholm mailto:l...@nuviainc.com>>; > > > > devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Chang, > > Abner > > > > (HPS SW/FW Technologist) > > > > mailto:abner.ch...@hpe.com>>; Kinney, Michael D > > > > mailto:michael.d.kin...@intel.com>>; Ni, > > > > Ray mailto:ray...@intel.com>> > > > > Cc: Andrew Fish mailto:af...@apple.com>>; Sami Mujawar > > > > mailto:sami.muja...@arm.com>> > > > > Subject: RE: [edk2-devel] [PATCH 01/79] ProcessorPkg/Include: Add > > header > > > > files of RISC-V processor package > > > > > > > > Hi Abner, > > > > > > > > I see comments from Leif as well. > > > > > > > > Do you think a discussion in the design meeting Ray Ni runs would be > > > > valuable > > > > to review all the modules/libs/includes and discuss options for the best > > > > location for them to reside in the edk2 repos? > > > > > > > > Thanks, > > > > > > > > Mike > > > > > > > > > -Original Message- > > > > > From: Kinney, Michael D > > > > > mailto:michael.d.kin...@intel.com>> > > > > > Sent: Monday, January 10, 2022 7:55 AM > > > > > To: Leif Lindholm mailto:l...@nuviainc.com>>; > > > > > devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Chang, > > > > Abner mailto:abner.ch...@hpe.com>>; Kinney, > > > > Michael D > > > > > mailto:michael.d.kin...@intel.com>> > > > > > Cc: Andrew Fish mailto:af...@apple.com>>; Sami > > > > > Mujawar > > > >
Re: [edk2-devel] [PATCH 01/79] ProcessorPkg/Include: Add header files of RISC-V processor package
> > > -Original Message- > > > > From: Kinney, Michael D > > > > mailto:michael.d.kin...@intel.com>> > > > > Sent: Monday, January 10, 2022 11:58 PM > > > > To: Leif Lindholm mailto:l...@nuviainc.com>>; > > > > devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Chang, > > Abner > > > > (HPS SW/FW Technologist) > > > > mailto:abner.ch...@hpe.com>>; Kinney, Michael D > > > > mailto:michael.d.kin...@intel.com>>; Ni, > > > > Ray mailto:ray...@intel.com>> > > > > Cc: Andrew Fish mailto:af...@apple.com>>; Sami Mujawar > > > > mailto:sami.muja...@arm.com>> > > > > Subject: RE: [edk2-devel] [PATCH 01/79] ProcessorPkg/Include: Add > > header > > > > files of RISC-V processor package > > > > > > > > Hi Abner, > > > > > > > > I see comments from Leif as well. > > > > > > > > Do you think a discussion in the design meeting Ray Ni runs would be > > > > valuable > > > > to review all the modules/libs/includes and discuss options for the best > > > > location for them to reside in the edk2 repos? > > > > > > > > Thanks, > > > > > > > > Mike > > > > > > > > > -Original Message- > > > > > From: Kinney, Michael D > > > > > mailto:michael.d.kin...@intel.com>> > > > > > Sent: Monday, January 10, 2022 7:55 AM > > > > > To: Leif Lindholm mailto:l...@nuviainc.com>>; > > > > > devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Chang, > > > > Abner mailto:abner.ch...@hpe.com>>; Kinney, > > > > Michael D > > > > > mailto:michael.d.kin...@intel.com>> > > > > > Cc: Andrew Fish mailto:af...@apple.com>>; Sami > > > > > Mujawar > > > > mailto:sami.muja...@arm.com>> > > > > > Subject: RE: [edk2-devel] [PATCH 01/79] ProcessorPkg/Include: Add > > > > header files of RISC-V processor package > > > > > > > > > > Hi Abner, > > > > > > > > > > I would also like to see some proposals on adding the RiscV CPU scoped > > > > content > > > > > to the existing MdePkg/UefiCpuPkg instead of adding a new top level > > CPU > > > > package. > > > > > > > > > > There is already some work started to move some of the ARM specific > > > > content > > > > > from ARM CPU packages into MdePkg. > > > > > > > > > > Thanks, > > > > > > > > > > Mike > > > > > > > > > > > -Original Message- > > > > > > From: Leif Lindholm mailto:l...@nuviainc.com>> > > > > > > Sent: Monday, January 10, 2022 5:11 AM > > > > > > To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Chang, Abner > > > > > > mailto:abner.ch...@hpe.com>> > > > > > > Cc: Andrew Fish mailto:af...@apple.com>>; Kinney, > > > > > > Michael D > > > > mailto:michael.d.kin...@intel.com>>; Sami > > > > Mujawar > > mailto:sami.muja...@arm.com>> > > > > > > Subject: Re: [edk2-devel] [PATCH 01/79] ProcessorPkg/Include: Add > > > > header files of RISC-V processor package > > > > > > > > > > > > On Sat, Jan 08, 2022 at 12:07:53 +0800, Abner Chang wrote: > > > > > > > (This is migrated from edk2-platforms:Silicon/RISC-V) > > > > > > > > > > > > > > RISC-V processor package library definitions. > > > > > > > > > > > > > > IndustryStandard/RiscV.h > > > > > > > -Add RiscV.h which conform with RISC-V Privilege Spec v1.10. > > > > > > > > > > > > > > RiscVImpl.h > > > > > > > -Definition of EDK2 RISC-V implementation. > > > > > > > > > > > > > > Signed-off-by: Abner Chang > > > > > > > mailto:abner.ch...@hpe.com>> > > > > > > > Co-authored-by: Daniel Schaefer > > > > > > > mailto:daniel.schae...@hpe.com>> > > > > > > > Co-authored-by: Gilbert Chen > > > > > > > mailto:gilbert.c...@hpe.com>> > > > > > &g
Re: [edk2-devel] [PATCH 01/79] ProcessorPkg/Include: Add header files of RISC-V processor package
t; lib/modules/include needs to be reviewed and the > > best location selected. I am aware that there are components in edk2 that > > do not follow these general > > recommendations. This is due to content that was added before these > > recommendations were established > > and we have work to do to get everything aligned. > > > > Mike > > > > > -Original Message- > > > From: Chang, Abner (HPS SW/FW Technologist) > > > mailto:abner.ch...@hpe.com>> > > > Sent: Wednesday, January 12, 2022 9:34 PM > > > To: Kinney, Michael D > > > mailto:michael.d.kin...@intel.com>>; Leif > > > Lindholm > > mailto:l...@nuviainc.com>>; > > devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Ni, Ray > > > mailto:ray...@intel.com>> > > > Cc: Andrew Fish mailto:af...@apple.com>>; Sami Mujawar > > mailto:sami.muja...@arm.com>> > > > Subject: RE: [edk2-devel] [PATCH 01/79] ProcessorPkg/Include: Add > > header files of RISC-V processor package > > > > > > HI Mike, > > > It is no problem to meet there. However, I am not available to join the > > design meeting in the next two weeks. Before we can get > > > together to discuss the best locations, do you have information regarding > > the rationale of driver/library location? > > > > > > What is the best location for, > > > - Processor ARCH dependent modules > > > > MdePkg for libs > > UefiCpuPkg for modules > > > > > - Common modules for all processor ARCHs > > > > Feature Packages based on the common feature. Add to existing if it fits. > > Create new for completely new feature area. > > > > > - Platform module that is specific to processor ARCH? > > > > edk2-platform repository > How about Leif's suggestion? The CommonPlatformPkg on edk2? > > Abner > > > > > The only exception so far are platform modules used to support > > OvmfPkg/QEMU to support CI. > > In this case the modules are added to OvmfPkg. > > > > > - Platform module that is common to processor ARCHs? > > > > edk2-platform repository > > > > The only exception so far are platform modules used to support > > OvmfPkg/QEMU to support CI. > > In this case the modules are added to OvmfPkg. > > > > > > > > Thanks > > > Abner > > > > > > > -Original Message- > > > > From: Kinney, Michael D > > > > mailto:michael.d.kin...@intel.com>> > > > > Sent: Monday, January 10, 2022 11:58 PM > > > > To: Leif Lindholm mailto:l...@nuviainc.com>>; > > > > devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Chang, > > Abner > > > > (HPS SW/FW Technologist) > > > > mailto:abner.ch...@hpe.com>>; Kinney, Michael D > > > > mailto:michael.d.kin...@intel.com>>; Ni, > > > > Ray mailto:ray...@intel.com>> > > > > Cc: Andrew Fish mailto:af...@apple.com>>; Sami Mujawar > > > > mailto:sami.muja...@arm.com>> > > > > Subject: RE: [edk2-devel] [PATCH 01/79] ProcessorPkg/Include: Add > > header > > > > files of RISC-V processor package > > > > > > > > Hi Abner, > > > > > > > > I see comments from Leif as well. > > > > > > > > Do you think a discussion in the design meeting Ray Ni runs would be > > > > valuable > > > > to review all the modules/libs/includes and discuss options for the best > > > > location for them to reside in the edk2 repos? > > > > > > > > Thanks, > > > > > > > > Mike > > > > > > > > > -Original Message- > > > > > From: Kinney, Michael D > > > > > mailto:michael.d.kin...@intel.com>> > > > > > Sent: Monday, January 10, 2022 7:55 AM > > > > > To: Leif Lindholm mailto:l...@nuviainc.com>>; > > > > > devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Chang, > > > > Abner mailto:abner.ch...@hpe.com>>; Kinney, > > > > Michael D > > > > > mailto:michael.d.kin...@intel.com>> > > > > > Cc: Andrew Fish mailto:af...@apple.com>>; Sami > > > > > Mujawar > > > > mailto:sami.muja...@arm.com>> > > > > > Subject: RE: [edk2-devel] [PATCH 01/79] ProcessorPkg/Include: Add > > > > header files of RISC-V processor package
Re: [edk2-devel] [PATCH v2 2/2] OvmfPkg/BaseCachingPciExpressLib: Update BaseCachingPciExpressLib.inf
> -Original Message- > From: Ard Biesheuvel > Sent: Sunday, January 30, 2022 1:17 AM > To: edk2-devel-groups-io ; Chang, Abner (HPS > SW/FW Technologist) > Cc: Schaefer, Daniel (ROM Janitor) ; Sunil V L > ; Ard Biesheuvel ; > Jiewen Yao ; Jordan Justen > ; Gerd Hoffmann ; Leif > Lindholm ; Sami Mujawar > Subject: Re: [edk2-devel] [PATCH v2 2/2] > OvmfPkg/BaseCachingPciExpressLib: Update BaseCachingPciExpressLib.inf > > On Sat, 29 Jan 2022 at 18:05, Abner Chang wrote: > > > > Remove the dependency with ArmVirtPkg and add RISCV64 in > VALID_ARCHITECTURES. > > > > Signed-off-by: Abner Chang > > Cc: Daniel Schaefer > > Cc: Sunil V L > > Cc: Ard Biesheuvel > > Cc: Jiewen Yao > > Cc: Jordan Justen > > Cc: Gerd Hoffmann > > Cc: Leif Lindholm > > Cc: Sami Mujawar > > --- > > .../BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git > a/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf > b/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf > > index 33568f568f..0383a37cbf 100644 > > --- > a/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf > > +++ > b/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf > > @@ -21,15 +21,15 @@ > >CONSTRUCTOR= PciExpressLibInitialize > > > > # > > -# VALID_ARCHITECTURES = ARM AARCH64 > > +# VALID_ARCHITECTURES = ARM AARCH64 RISCV64 > > # > > > > I am going to fold the above hunk into patch #1, given that > > > [Sources] > >PciExpressLib.c > > > > [Packages] > > - ArmVirtPkg/ArmVirtPkg.dec > >MdePkg/MdePkg.dec > > + OvmfPkg/OvmfPkg.dec > > > > this change is unnecessary - either package reference is unnecessary > so I will just drop the reference to ArmVirtPkg/ArmVirtPkg.dec when > moving it. [Abner] Thanks. Yes, adding OvmfPkg is redundant. BTW, I saw CI reported the errors on this merge. However, those errors seem irrelevant to the code changes. Does that matter? https://github.com/tianocore/edk2/runs/4992385347 Abner > > > [LibraryClasses] > >BaseLib > > -- > > 2.31.1 > > > > > > > > > > Groups.io Links: You receive all messages sent to this group. > > View/Reply Online (#86214): > https://edk2.groups.io/g/devel/message/86214 > > Mute This Topic: https://groups.io/mt/88770183/5717338 > > Group Owner: devel+ow...@edk2.groups.io > > Unsubscribe: https://edk2.groups.io/g/devel/unsub > [ardb+tianoc...@kernel.org] > > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#86223): https://edk2.groups.io/g/devel/message/86223 Mute This Topic: https://groups.io/mt/88770183/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v2 2/2] OvmfPkg/BaseCachingPciExpressLib: Update BaseCachingPciExpressLib.inf
Remove the dependency with ArmVirtPkg and add RISCV64 in VALID_ARCHITECTURES. Signed-off-by: Abner Chang Cc: Daniel Schaefer Cc: Sunil V L Cc: Ard Biesheuvel Cc: Jiewen Yao Cc: Jordan Justen Cc: Gerd Hoffmann Cc: Leif Lindholm Cc: Sami Mujawar --- .../BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf b/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf index 33568f568f..0383a37cbf 100644 --- a/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf +++ b/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf @@ -21,15 +21,15 @@ CONSTRUCTOR= PciExpressLibInitialize # -# VALID_ARCHITECTURES = ARM AARCH64 +# VALID_ARCHITECTURES = ARM AARCH64 RISCV64 # [Sources] PciExpressLib.c [Packages] - ArmVirtPkg/ArmVirtPkg.dec MdePkg/MdePkg.dec + OvmfPkg/OvmfPkg.dec [LibraryClasses] BaseLib -- 2.31.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#86214): https://edk2.groups.io/g/devel/message/86214 Mute This Topic: https://groups.io/mt/88770183/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v2 1/2] OvmfPkg/BaseCachingPciExpressLib: Migrate BaseCachingPciExpressLib
Move BaseCachingPciExpressLib library from ArmVirtPkg to under OvmfPkg.
RISC-V Virt platform can leverage the same library to access PCI Express
registers through PCI Express base address set in PcdPciExpressBaseAddress
and cached in a global variable.
Signed-off-by: Abner Chang
Cc: Daniel Schaefer
Cc: Sunil V L
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Jordan Justen
Cc: Gerd Hoffmann
---
ArmVirtPkg/ArmVirt.dsc.inc | 2 +-
ArmVirtPkg/ArmVirtKvmTool.dsc | 6 +++---
.../BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf | 0
.../Library/BaseCachingPciExpressLib/PciExpressLib.c| 0
4 files changed, 4 insertions(+), 4 deletions(-)
rename {ArmVirtPkg =>
OvmfPkg}/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf (100%)
rename {ArmVirtPkg =>
OvmfPkg}/Library/BaseCachingPciExpressLib/PciExpressLib.c (100%)
diff --git a/ArmVirtPkg/ArmVirt.dsc.inc b/ArmVirtPkg/ArmVirt.dsc.inc
index 5a1598d90c..4db8ad5a79 100644
--- a/ArmVirtPkg/ArmVirt.dsc.inc
+++ b/ArmVirtPkg/ArmVirt.dsc.inc
@@ -141,7 +141,7 @@
# PCI Libraries
PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
-
PciExpressLib|ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
+
PciExpressLib|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
PciCapLib|OvmfPkg/Library/BasePciCapLib/BasePciCapLib.inf
PciCapPciSegmentLib|OvmfPkg/Library/BasePciCapPciSegmentLib/BasePciCapPciSegmentLib.inf
PciCapPciIoLib|OvmfPkg/Library/UefiPciCapPciIoLib/UefiPciCapPciIoLib.inf
diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc
index 9d23072d8f..4a54d13735 100644
--- a/ArmVirtPkg/ArmVirtKvmTool.dsc
+++ b/ArmVirtPkg/ArmVirtKvmTool.dsc
@@ -339,17 +339,17 @@
ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf {
NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
-
NULL|ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
+
NULL|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
}
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
-
NULL|ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
+
NULL|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
}
MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf {
NULL|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
-
NULL|ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
+
NULL|OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
}
OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf
OvmfPkg/Virtio10Dxe/Virtio10.inf
diff --git
a/ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
b/OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
similarity index 100%
rename from
ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
rename to OvmfPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
diff --git a/ArmVirtPkg/Library/BaseCachingPciExpressLib/PciExpressLib.c
b/OvmfPkg/Library/BaseCachingPciExpressLib/PciExpressLib.c
similarity index 100%
rename from ArmVirtPkg/Library/BaseCachingPciExpressLib/PciExpressLib.c
rename to OvmfPkg/Library/BaseCachingPciExpressLib/PciExpressLib.c
--
2.31.1
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[edk2-devel] [PATCH v2 0/2] Migrate BaseCachingPciExpressLib
Move BaseCachingPciExpressLib library from ArmVirtPkg to under OvmfPkg.
RISC-V Virt platform can leverage the same library to access PCI Express
registers through PCI Express base address set in PcdPciExpressBaseAddress
and cached in a global variable.
In V2: One patch for movement and ArmVirtPkg DSC file changes.
The patch [2/2] updates BaseCachingPciExpressLib.inf. Remove the
dependency with ArmVirtPkg.
Signed-off-by: Abner Chang
Cc: Daniel Schaefer
Cc: Sunil V L
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Jordan Justen
Cc: Gerd Hoffmann
Cc: Leif Lindholm
Cc: Sami Mujawar
Abner Chang (2):
OvmfPkg/BaseCachingPciExpressLib: Migrate BaseCachingPciExpressLib
OvmfPkg/BaseCachingPciExpressLib: Update BaseCachingPciExpressLib.inf
ArmVirtPkg/ArmVirt.dsc.inc | 2 +-
ArmVirtPkg/ArmVirtKvmTool.dsc | 6 +++---
.../BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf | 4 ++--
.../Library/BaseCachingPciExpressLib/PciExpressLib.c| 0
4 files changed, 6 insertions(+), 6 deletions(-)
rename {ArmVirtPkg =>
OvmfPkg}/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf (89%)
rename {ArmVirtPkg =>
OvmfPkg}/Library/BaseCachingPciExpressLib/PciExpressLib.c (100%)
--
2.31.1
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Re: [edk2-devel] [PATCH 0/2] Migrate ArmVirtPkg BaseCachingPciExpressLib
> -Original Message-
> From: Gerd Hoffmann
> Sent: Thursday, January 27, 2022 9:20 PM
> To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist)
>
> Cc: Schaefer, Daniel (ROM Janitor) ; Sunil V L
> ; Ard Biesheuvel ;
> Jiewen Yao ; Jordan Justen
> ; Leif Lindholm ; Sami
> Mujawar
> Subject: Re: [edk2-devel] [PATCH 0/2] Migrate ArmVirtPkg
> BaseCachingPciExpressLib
>
> On Mon, Jan 24, 2022 at 09:52:07PM +0800, Abner Chang wrote:
> > Clone BaseCachingPciExpressLib library from ArmVirtPkg to under OvmfPkg.
> > RISC-V Virt platform can leverage the same library to access PCI Express
> > registers through PCI Express base address set in
> PcdPciExpressBaseAddress
> > and cached in a global variable. Also remove the one under ArmVirtPkg.
> >
> > Signed-off-by: Abner Chang
> > Cc: Daniel Schaefer
> > Cc: Sunil V L
> > Cc: Ard Biesheuvel
> > Cc: Jiewen Yao
> > Cc: Jordan Justen
> > Cc: Gerd Hoffmann
> > Cc: Leif Lindholm
> > Cc: Sami Mujawar
>
> Given you are mostly moving code around as git noticed ...
>
> > rename {ArmVirtPkg =>
> OvmfPkg}/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
> (87%)
> > rename {ArmVirtPkg =>
> OvmfPkg}/Library/BaseCachingPciExpressLib/PciExpressLib.c (100%)
>
> ... it doesn't make sense to split that into two patches.
Hi Gerd,
I missed this message.
Because the movement impacts two packages thus I split this change into two
patches. I just realized that you are the reviewer of these two packages, I
will send the v2 that keeps the git history.
Thanks
Abner
>
> Just using "git mv" instead has the additional advantage to keep the git
> history intact (using 'git log --follow').
>
> take care,
> Gerd
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Re: [edk2-devel] [PATCH 0/2] Migrate ArmVirtPkg BaseCachingPciExpressLib
Thanks for the reminder. Apparently, I missed Gerd's feedback. His reply is
buried with another patch set he sent in my mailbox.
Abner
From: Ard Biesheuvel
Sent: Saturday, January 29, 2022 2:06 AM
To: edk2-devel-groups-io ; Chang, Abner (HPS SW/FW
Technologist)
Cc: Schaefer, Daniel (ROM Janitor) ; Sunil V L
; Ard Biesheuvel ; Jiewen
Yao ; Jordan Justen ; Gerd
Hoffmann ; Leif Lindholm ; Sami Mujawar
Subject: Re: [edk2-devel] [PATCH 0/2] Migrate ArmVirtPkg
BaseCachingPciExpressLib
On Fri, 28 Jan 2022 at 17:14, Abner Chang wrote:
>
> Hi package owners,
> Please take a look at this patch, this patch moves ArmVirtPkg
> BaseCachingPciExpressLib to OvmfPkg for OvmfRiscV64.
>
Do you intend to incorporate Gerd's feedback?
>
>
> From: devel@edk2.groups.io on behalf of Abner Chang
>
> Sent: Monday, January 24, 2022 9:52 PM
> To: devel@edk2.groups.io
> Cc: Chang, Abner (HPS SW/FW Technologist) ; Schaefer,
> Daniel (ROM Janitor) ; Sunil V L
> ; Ard Biesheuvel ;
> Jiewen Yao ; Jordan Justen ;
> Gerd Hoffmann ; Leif Lindholm ; Sami
> Mujawar
> Subject: [edk2-devel] [PATCH 0/2] Migrate ArmVirtPkg BaseCachingPciExpressLib
>
> Clone BaseCachingPciExpressLib library from ArmVirtPkg to under OvmfPkg.
> RISC-V Virt platform can leverage the same library to access PCI Express
> registers through PCI Express base address set in PcdPciExpressBaseAddress
> and cached in a global variable. Also remove the one under ArmVirtPkg.
>
> Signed-off-by: Abner Chang
> Cc: Daniel Schaefer
> Cc: Sunil V L
> Cc: Ard Biesheuvel
> Cc: Jiewen Yao
> Cc: Jordan Justen
> Cc: Gerd Hoffmann
> Cc: Leif Lindholm
> Cc: Sami Mujawar
>
> Abner Chang (2):
> OvmfPkg/BaseCachingPciExpressLib: Clone ArmVirtPkg
> BaseCachingPciExpressLib
> ArmVirtPkg/BaseCachingPciExpressLib: Remove BaseCachingPciExpressLib
>
> ArmVirtPkg/ArmVirt.dsc.inc | 2 +-
> ArmVirtPkg/ArmVirtKvmTool.dsc | 6 +++---
> .../BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf | 5 +++--
> .../Library/BaseCachingPciExpressLib/PciExpressLib.c| 0
> 4 files changed, 7 insertions(+), 6 deletions(-)
> rename {ArmVirtPkg =>
> OvmfPkg}/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf (87%)
> rename {ArmVirtPkg =>
> OvmfPkg}/Library/BaseCachingPciExpressLib/PciExpressLib.c (100%)
>
> --
> 2.31.1
>
>
>
>
>
>
>
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Re: [edk2-devel] [PATCH 0/2] Migrate ArmVirtPkg BaseCachingPciExpressLib
Hi package owners,
Please take a look at this patch, this patch moves ArmVirtPkg
BaseCachingPciExpressLib to OvmfPkg for OvmfRiscV64.
Thanks
Abner
From: devel@edk2.groups.io on behalf of Abner Chang
Sent: Monday, January 24, 2022 9:52 PM
To: devel@edk2.groups.io
Cc: Chang, Abner (HPS SW/FW Technologist) ; Schaefer,
Daniel (ROM Janitor) ; Sunil V L
; Ard Biesheuvel ; Jiewen
Yao ; Jordan Justen ; Gerd
Hoffmann ; Leif Lindholm ; Sami Mujawar
Subject: [edk2-devel] [PATCH 0/2] Migrate ArmVirtPkg BaseCachingPciExpressLib
Clone BaseCachingPciExpressLib library from ArmVirtPkg to under OvmfPkg.
RISC-V Virt platform can leverage the same library to access PCI Express
registers through PCI Express base address set in PcdPciExpressBaseAddress
and cached in a global variable. Also remove the one under ArmVirtPkg.
Signed-off-by: Abner Chang
Cc: Daniel Schaefer
Cc: Sunil V L
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Jordan Justen
Cc: Gerd Hoffmann
Cc: Leif Lindholm
Cc: Sami Mujawar
Abner Chang (2):
OvmfPkg/BaseCachingPciExpressLib: Clone ArmVirtPkg
BaseCachingPciExpressLib
ArmVirtPkg/BaseCachingPciExpressLib: Remove BaseCachingPciExpressLib
ArmVirtPkg/ArmVirt.dsc.inc | 2 +-
ArmVirtPkg/ArmVirtKvmTool.dsc | 6 +++---
.../BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf | 5 +++--
.../Library/BaseCachingPciExpressLib/PciExpressLib.c| 0
4 files changed, 7 insertions(+), 6 deletions(-)
rename {ArmVirtPkg =>
OvmfPkg}/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf (87%)
rename {ArmVirtPkg =>
OvmfPkg}/Library/BaseCachingPciExpressLib/PciExpressLib.c (100%)
--
2.31.1
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Re: [edk2-devel] [PATCH 1/1] EmbeddedPkg: Fix a build error in FwVol.c in X64 arch
Merged.
From: devel@edk2.groups.io on behalf of Min Xu
Sent: Thursday, January 27, 2022 12:39 PM
To: devel@edk2.groups.io ; Chang, Abner (HPS SW/FW
Technologist)
Cc: Leif Lindholm ; Ard Biesheuvel
; Schaefer, Daniel (ROM Janitor)
Subject: Re: [edk2-devel] [PATCH 1/1] EmbeddedPkg: Fix a build error in FwVol.c
in X64 arch
This is the PR: https://github.com/tianocore/edk2/pull/2444
From: devel@edk2.groups.io On Behalf Of Abner Chang
Sent: Thursday, January 27, 2022 11:46 AM
To: Xu, Min M ; devel@edk2.groups.io
Cc: Leif Lindholm ; Ard Biesheuvel
; Schaefer, Daniel
Subject: Re: [edk2-devel] [PATCH 1/1] EmbeddedPkg: Fix a build error in FwVol.c
in X64 arch
Reviewed-by: Abner Chang mailto:abner.ch...@hpe.com>>
Please create a PR (give me the link) for running Core CI, I will merge it once
it gets passed through.
Thanks
Abner
From: Min Xu mailto:min.m...@intel.com>>
Sent: Thursday, January 27, 2022 11:36 AM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
mailto:devel@edk2.groups.io>>
Cc: Min Xu mailto:min.m...@intel.com>>; Leif Lindholm
mailto:l...@nuviainc.com>>; Ard Biesheuvel
mailto:ardb+tianoc...@kernel.org>>; Chang, Abner
(HPS SW/FW Technologist) mailto:abner.ch...@hpe.com>>;
Schaefer, Daniel (ROM Janitor)
mailto:daniel.schae...@hpe.com>>
Subject: [PATCH 1/1] EmbeddedPkg: Fix a build error in FwVol.c in X64 arch
BZ:
https://bugzilla.tianocore.org/show_bug.cgi?id=3814<https://bugzilla.tianocore.org/show_bug.cgi?id=3814>
CompressedDataLength is declared as UINTN which is UINT64 in X64 arch.
But the second parameter of UefiDecompressGetInfo() is declared as
UINT32. So a build error is triggered. To declare CompressedDataLength
as UINT32 to fix the build error.
Cc: Leif Lindholm mailto:l...@nuviainc.com>>
Cc: Ard Biesheuvel mailto:ardb+tianoc...@kernel.org>>
Cc: Abner Chang mailto:abner.ch...@hpe.com>>
Cc: Daniel Schaefer mailto:daniel.schae...@hpe.com>>
Signed-off-by: Min Xu mailto:min.m...@intel.com>>
---
EmbeddedPkg/Library/PrePiLib/FwVol.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/EmbeddedPkg/Library/PrePiLib/FwVol.c
b/EmbeddedPkg/Library/PrePiLib/FwVol.c
index 92ae68f0d382..0a6d6925b7ea 100644
--- a/EmbeddedPkg/Library/PrePiLib/FwVol.c
+++ b/EmbeddedPkg/Library/PrePiLib/FwVol.c
@@ -291,7 +291,7 @@ FfsProcessSection (
UINT16SectionAttribute;
UINT32AuthenticationStatus;
CHAR8 *CompressedData;
- UINTN CompressedDataLength;
+ UINT32CompressedDataLength;
*OutputBuffer = NULL;
ParsedLength = 0;
@@ -320,7 +320,7 @@ FfsProcessSection (
}
CompressedData = (CHAR8 *)((EFI_COMPRESSION_SECTION2 *)Section
+ 1);
- CompressedDataLength = (UINT32)SectionLength - sizeof
(EFI_COMPRESSION_SECTION2);
+ CompressedDataLength = SectionLength - sizeof
(EFI_COMPRESSION_SECTION2);
} else {
CompressionSection = (EFI_COMPRESSION_SECTION *)Section;
SectionLength = SECTION_SIZE (Section);
@@ -330,7 +330,7 @@ FfsProcessSection (
}
CompressedData = (CHAR8 *)((EFI_COMPRESSION_SECTION *)Section
+ 1);
- CompressedDataLength = (UINT32)SectionLength - sizeof
(EFI_COMPRESSION_SECTION);
+ CompressedDataLength = SectionLength - sizeof
(EFI_COMPRESSION_SECTION);
}
Status = UefiDecompressGetInfo (
--
2.29.2.windows.2
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Re: [edk2-devel] [PATCH 1/1] EmbeddedPkg: Fix a build error in FwVol.c in X64 arch
Reviewed-by: Abner Chang
Please create a PR (give me the link) for running Core CI, I will merge it once
it gets passed through.
Thanks
Abner
From: Min Xu
Sent: Thursday, January 27, 2022 11:36 AM
To: devel@edk2.groups.io
Cc: Min Xu ; Leif Lindholm ; Ard
Biesheuvel ; Chang, Abner (HPS SW/FW Technologist)
; Schaefer, Daniel (ROM Janitor)
Subject: [PATCH 1/1] EmbeddedPkg: Fix a build error in FwVol.c in X64 arch
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3814
CompressedDataLength is declared as UINTN which is UINT64 in X64 arch.
But the second parameter of UefiDecompressGetInfo() is declared as
UINT32. So a build error is triggered. To declare CompressedDataLength
as UINT32 to fix the build error.
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Cc: Abner Chang
Cc: Daniel Schaefer
Signed-off-by: Min Xu
---
EmbeddedPkg/Library/PrePiLib/FwVol.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/EmbeddedPkg/Library/PrePiLib/FwVol.c
b/EmbeddedPkg/Library/PrePiLib/FwVol.c
index 92ae68f0d382..0a6d6925b7ea 100644
--- a/EmbeddedPkg/Library/PrePiLib/FwVol.c
+++ b/EmbeddedPkg/Library/PrePiLib/FwVol.c
@@ -291,7 +291,7 @@ FfsProcessSection (
UINT16SectionAttribute;
UINT32AuthenticationStatus;
CHAR8 *CompressedData;
- UINTN CompressedDataLength;
+ UINT32CompressedDataLength;
*OutputBuffer = NULL;
ParsedLength = 0;
@@ -320,7 +320,7 @@ FfsProcessSection (
}
CompressedData = (CHAR8 *)((EFI_COMPRESSION_SECTION2 *)Section
+ 1);
- CompressedDataLength = (UINT32)SectionLength - sizeof
(EFI_COMPRESSION_SECTION2);
+ CompressedDataLength = SectionLength - sizeof
(EFI_COMPRESSION_SECTION2);
} else {
CompressionSection = (EFI_COMPRESSION_SECTION *)Section;
SectionLength = SECTION_SIZE (Section);
@@ -330,7 +330,7 @@ FfsProcessSection (
}
CompressedData = (CHAR8 *)((EFI_COMPRESSION_SECTION *)Section
+ 1);
- CompressedDataLength = (UINT32)SectionLength - sizeof
(EFI_COMPRESSION_SECTION);
+ CompressedDataLength = SectionLength - sizeof
(EFI_COMPRESSION_SECTION);
}
Status = UefiDecompressGetInfo (
--
2.29.2.windows.2
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Re: [edk2-devel] [PATCH V2 01/10] EmbeddedPkg: Fix a build error in FwVol.c in X64 arch
yes, I can do that if you separate it to a standalone patch. This change
doesn't hurt others.
Abner
From: Xu, Min M
Sent: Thursday, January 27, 2022 10:39 AM
To: Chang, Abner (HPS SW/FW Technologist) ;
devel@edk2.groups.io
Subject: RE: [edk2-devel] [PATCH V2 01/10] EmbeddedPkg: Fix a build error in
FwVol.c in X64 arch
Hi, Abner
Other patches are still in review. I am thinking if this patch can be in a
separate patch-sets so that you can merge it to EmbeddedPkg? What’s your
thought?
Thanks
Min
From: Chang, Abner (HPS SW/FW Technologist)
Sent: Thursday, January 27, 2022 9:56 AM
To: Xu, Min M ; devel@edk2.groups.io
Subject: Re: [edk2-devel] [PATCH V2 01/10] EmbeddedPkg: Fix a build error in
FwVol.c in X64 arch
Hi Min,
Did you get the reviewed-by for other patches? Just let me know when the review
process is done, I can then merge the patch to EmbeddedPkg.
Regards,
Abner
From: Xu, Min M mailto:min.m...@intel.com>>
Sent: Thursday, January 27, 2022 8:58 AM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
mailto:devel@edk2.groups.io>>; Chang, Abner (HPS SW/FW
Technologist) mailto:abner.ch...@hpe.com>>
Subject: RE: [edk2-devel] [PATCH V2 01/10] EmbeddedPkg: Fix a build error in
FwVol.c in X64 arch
Hi, Abner
This is the PR of the patch-sets.
https://github.com/tianocore/edk2/pull/2313
Thanks
Min
From: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
mailto:devel@edk2.groups.io>> On Behalf Of Abner Chang
Sent: Thursday, January 27, 2022 8:43 AM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Xu, Min M
mailto:min.m...@intel.com>>
Subject: Re: [edk2-devel] [PATCH V2 01/10] EmbeddedPkg: Fix a build error in
FwVol.c in X64 arch
Hi Min,
Would you please create a PR for this and point me to the link?
Thanks
Abner
From: Chang, Abner (HPS SW/FW Technologist)
Sent: Tuesday, January 25, 2022 11:09 PM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
mailto:devel@edk2.groups.io>>;
min.m...@intel.com<mailto:min.m...@intel.com>
mailto:min.m...@intel.com>>
Subject: RE: [edk2-devel] [PATCH V2 01/10] EmbeddedPkg: Fix a build error in
FwVol.c in X64 arch
Reviewed-by: Abner Chang mailto:abner.ch...@hpe.com>>
> -Original Message-
> From: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
> mailto:devel@edk2.groups.io>> On Behalf Of Min Xu
> Sent: Tuesday, January 25, 2022 2:33 PM
> To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
> Cc: Min Xu mailto:min.m...@intel.com>>; Leif Lindholm
> mailto:l...@nuviainc.com>>; Ard
> Biesheuvel mailto:ardb+tianoc...@kernel.org>>;
> Chang, Abner (HPS SW/FW
> Technologist) mailto:abner.ch...@hpe.com>>; Schaefer,
> Daniel (ROM Janitor)
> mailto:daniel.schae...@hpe.com>>
> Subject: [edk2-devel] [PATCH V2 01/10] EmbeddedPkg: Fix a build error in
> FwVol.c in X64 arch
>
> RFC:
> INVALID URI REMOVED
> d=3429__;!!NpxR!xMRxJim2LXdgV0CClUrT7jWBUouLzrVwMc5fB_wt1PT17W
> WWyZKgREYswYM1Tz0$
>
> CompressedDataLength is declared as UINTN which is UINT64 in X64 arch.
> But the second parameter of UefiDecompressGetInfo() is declared as
> UINT32. So a build error is triggered. To declare CompressedDataLength
> as UINT32 to fix the build error.
>
> Cc: Leif Lindholm mailto:l...@nuviainc.com>>
> Cc: Ard Biesheuvel
> mailto:ardb+tianoc...@kernel.org>>
> Cc: Abner Chang mailto:abner.ch...@hpe.com>>
> Cc: Daniel Schaefer mailto:daniel.schae...@hpe.com>>
> Signed-off-by: Min Xu mailto:min.m...@intel.com>>
> ---
> EmbeddedPkg/Library/PrePiLib/FwVol.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/EmbeddedPkg/Library/PrePiLib/FwVol.c
> b/EmbeddedPkg/Library/PrePiLib/FwVol.c
> index 92ae68f0d382..0a6d6925b7ea 100644
> --- a/EmbeddedPkg/Library/PrePiLib/FwVol.c
> +++ b/EmbeddedPkg/Library/PrePiLib/FwVol.c
> @@ -291,7 +291,7 @@ FfsProcessSection (
>UINT16SectionAttribute;
>UINT32AuthenticationStatus;
>CHAR8 *CompressedData;
> - UINTN CompressedDataLength;
> + UINT32CompressedDataLength;
>
>*OutputBuffer = NULL;
>ParsedLength = 0;
> @@ -320,7 +320,7 @@ FfsProcessSection (
>}
>
>CompressedData = (CHAR8 *)((EFI_COMPRESSION_SECTION2
> *)Section + 1);
> - CompressedDataLength = (UINT32)SectionLength - sizeof
> (EFI_COMPRESSION_SECTION2);
> + CompressedDataLength = SectionLength - sizeof
> (EFI_COMPRESSION_SECTION2);
> } else {
>CompressionSection = (EFI_COMPRESSION_SECTION *)Section;
Re: [edk2-devel] [PATCH V2 01/10] EmbeddedPkg: Fix a build error in FwVol.c in X64 arch
Hi Min,
Did you get the reviewed-by for other patches? Just let me know when the review
process is done, I can then merge the patch to EmbeddedPkg.
Regards,
Abner
From: Xu, Min M
Sent: Thursday, January 27, 2022 8:58 AM
To: devel@edk2.groups.io ; Chang, Abner (HPS SW/FW
Technologist)
Subject: RE: [edk2-devel] [PATCH V2 01/10] EmbeddedPkg: Fix a build error in
FwVol.c in X64 arch
Hi, Abner
This is the PR of the patch-sets.
https://github.com/tianocore/edk2/pull/2313
Thanks
Min
From: devel@edk2.groups.io On Behalf Of Abner Chang
Sent: Thursday, January 27, 2022 8:43 AM
To: devel@edk2.groups.io; Xu, Min M
Subject: Re: [edk2-devel] [PATCH V2 01/10] EmbeddedPkg: Fix a build error in
FwVol.c in X64 arch
Hi Min,
Would you please create a PR for this and point me to the link?
Thanks
Abner
From: Chang, Abner (HPS SW/FW Technologist)
Sent: Tuesday, January 25, 2022 11:09 PM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
mailto:devel@edk2.groups.io>>;
min.m...@intel.com<mailto:min.m...@intel.com>
mailto:min.m...@intel.com>>
Subject: RE: [edk2-devel] [PATCH V2 01/10] EmbeddedPkg: Fix a build error in
FwVol.c in X64 arch
Reviewed-by: Abner Chang mailto:abner.ch...@hpe.com>>
> -Original Message-
> From: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
> mailto:devel@edk2.groups.io>> On Behalf Of Min Xu
> Sent: Tuesday, January 25, 2022 2:33 PM
> To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
> Cc: Min Xu mailto:min.m...@intel.com>>; Leif Lindholm
> mailto:l...@nuviainc.com>>; Ard
> Biesheuvel mailto:ardb+tianoc...@kernel.org>>;
> Chang, Abner (HPS SW/FW
> Technologist) mailto:abner.ch...@hpe.com>>; Schaefer,
> Daniel (ROM Janitor)
> mailto:daniel.schae...@hpe.com>>
> Subject: [edk2-devel] [PATCH V2 01/10] EmbeddedPkg: Fix a build error in
> FwVol.c in X64 arch
>
> RFC:
> INVALID URI REMOVED
> d=3429__;!!NpxR!xMRxJim2LXdgV0CClUrT7jWBUouLzrVwMc5fB_wt1PT17W
> WWyZKgREYswYM1Tz0$
>
> CompressedDataLength is declared as UINTN which is UINT64 in X64 arch.
> But the second parameter of UefiDecompressGetInfo() is declared as
> UINT32. So a build error is triggered. To declare CompressedDataLength
> as UINT32 to fix the build error.
>
> Cc: Leif Lindholm mailto:l...@nuviainc.com>>
> Cc: Ard Biesheuvel
> mailto:ardb+tianoc...@kernel.org>>
> Cc: Abner Chang mailto:abner.ch...@hpe.com>>
> Cc: Daniel Schaefer mailto:daniel.schae...@hpe.com>>
> Signed-off-by: Min Xu mailto:min.m...@intel.com>>
> ---
> EmbeddedPkg/Library/PrePiLib/FwVol.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/EmbeddedPkg/Library/PrePiLib/FwVol.c
> b/EmbeddedPkg/Library/PrePiLib/FwVol.c
> index 92ae68f0d382..0a6d6925b7ea 100644
> --- a/EmbeddedPkg/Library/PrePiLib/FwVol.c
> +++ b/EmbeddedPkg/Library/PrePiLib/FwVol.c
> @@ -291,7 +291,7 @@ FfsProcessSection (
>UINT16SectionAttribute;
>UINT32AuthenticationStatus;
>CHAR8 *CompressedData;
> - UINTN CompressedDataLength;
> + UINT32CompressedDataLength;
>
>*OutputBuffer = NULL;
>ParsedLength = 0;
> @@ -320,7 +320,7 @@ FfsProcessSection (
>}
>
>CompressedData = (CHAR8 *)((EFI_COMPRESSION_SECTION2
> *)Section + 1);
> - CompressedDataLength = (UINT32)SectionLength - sizeof
> (EFI_COMPRESSION_SECTION2);
> + CompressedDataLength = SectionLength - sizeof
> (EFI_COMPRESSION_SECTION2);
> } else {
>CompressionSection = (EFI_COMPRESSION_SECTION *)Section;
>SectionLength = SECTION_SIZE (Section);
> @@ -330,7 +330,7 @@ FfsProcessSection (
>}
>
>CompressedData = (CHAR8 *)((EFI_COMPRESSION_SECTION
> *)Section + 1);
> - CompressedDataLength = (UINT32)SectionLength - sizeof
> (EFI_COMPRESSION_SECTION);
> + CompressedDataLength = SectionLength - sizeof
> (EFI_COMPRESSION_SECTION);
> }
>
> Status = UefiDecompressGetInfo (
> --
> 2.29.2.windows.2
>
>
>
>
>
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Re: [edk2-devel] [PATCH V2 01/10] EmbeddedPkg: Fix a build error in FwVol.c in X64 arch
Hi Min,
Would you please create a PR for this and point me to the link?
Thanks
Abner
From: Chang, Abner (HPS SW/FW Technologist)
Sent: Tuesday, January 25, 2022 11:09 PM
To: devel@edk2.groups.io ; min.m...@intel.com
Subject: RE: [edk2-devel] [PATCH V2 01/10] EmbeddedPkg: Fix a build error in
FwVol.c in X64 arch
Reviewed-by: Abner Chang
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Min Xu
> Sent: Tuesday, January 25, 2022 2:33 PM
> To: devel@edk2.groups.io
> Cc: Min Xu ; Leif Lindholm ; Ard
> Biesheuvel ; Chang, Abner (HPS SW/FW
> Technologist) ; Schaefer, Daniel (ROM Janitor)
>
> Subject: [edk2-devel] [PATCH V2 01/10] EmbeddedPkg: Fix a build error in
> FwVol.c in X64 arch
>
> RFC:
> INVALID URI REMOVED
> d=3429__;!!NpxR!xMRxJim2LXdgV0CClUrT7jWBUouLzrVwMc5fB_wt1PT17W
> WWyZKgREYswYM1Tz0$
>
> CompressedDataLength is declared as UINTN which is UINT64 in X64 arch.
> But the second parameter of UefiDecompressGetInfo() is declared as
> UINT32. So a build error is triggered. To declare CompressedDataLength
> as UINT32 to fix the build error.
>
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Cc: Abner Chang
> Cc: Daniel Schaefer
> Signed-off-by: Min Xu
> ---
> EmbeddedPkg/Library/PrePiLib/FwVol.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/EmbeddedPkg/Library/PrePiLib/FwVol.c
> b/EmbeddedPkg/Library/PrePiLib/FwVol.c
> index 92ae68f0d382..0a6d6925b7ea 100644
> --- a/EmbeddedPkg/Library/PrePiLib/FwVol.c
> +++ b/EmbeddedPkg/Library/PrePiLib/FwVol.c
> @@ -291,7 +291,7 @@ FfsProcessSection (
>UINT16SectionAttribute;
>UINT32AuthenticationStatus;
>CHAR8 *CompressedData;
> - UINTN CompressedDataLength;
> + UINT32CompressedDataLength;
>
>*OutputBuffer = NULL;
>ParsedLength = 0;
> @@ -320,7 +320,7 @@ FfsProcessSection (
>}
>
>CompressedData = (CHAR8 *)((EFI_COMPRESSION_SECTION2
> *)Section + 1);
> - CompressedDataLength = (UINT32)SectionLength - sizeof
> (EFI_COMPRESSION_SECTION2);
> + CompressedDataLength = SectionLength - sizeof
> (EFI_COMPRESSION_SECTION2);
> } else {
>CompressionSection = (EFI_COMPRESSION_SECTION *)Section;
>SectionLength = SECTION_SIZE (Section);
> @@ -330,7 +330,7 @@ FfsProcessSection (
>}
>
>CompressedData = (CHAR8 *)((EFI_COMPRESSION_SECTION
> *)Section + 1);
> - CompressedDataLength = (UINT32)SectionLength - sizeof
> (EFI_COMPRESSION_SECTION);
> + CompressedDataLength = SectionLength - sizeof
> (EFI_COMPRESSION_SECTION);
> }
>
> Status = UefiDecompressGetInfo (
> --
> 2.29.2.windows.2
>
>
>
>
>
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Re: [edk2-devel] [PATCH V2 01/10] EmbeddedPkg: Fix a build error in FwVol.c in X64 arch
Reviewed-by: Abner Chang
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Min Xu
> Sent: Tuesday, January 25, 2022 2:33 PM
> To: devel@edk2.groups.io
> Cc: Min Xu ; Leif Lindholm ; Ard
> Biesheuvel ; Chang, Abner (HPS SW/FW
> Technologist) ; Schaefer, Daniel (ROM Janitor)
>
> Subject: [edk2-devel] [PATCH V2 01/10] EmbeddedPkg: Fix a build error in
> FwVol.c in X64 arch
>
> RFC:
> INVALID URI REMOVED
> d=3429__;!!NpxR!xMRxJim2LXdgV0CClUrT7jWBUouLzrVwMc5fB_wt1PT17W
> WWyZKgREYswYM1Tz0$
>
> CompressedDataLength is declared as UINTN which is UINT64 in X64 arch.
> But the second parameter of UefiDecompressGetInfo() is declared as
> UINT32. So a build error is triggered. To declare CompressedDataLength
> as UINT32 to fix the build error.
>
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Cc: Abner Chang
> Cc: Daniel Schaefer
> Signed-off-by: Min Xu
> ---
> EmbeddedPkg/Library/PrePiLib/FwVol.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/EmbeddedPkg/Library/PrePiLib/FwVol.c
> b/EmbeddedPkg/Library/PrePiLib/FwVol.c
> index 92ae68f0d382..0a6d6925b7ea 100644
> --- a/EmbeddedPkg/Library/PrePiLib/FwVol.c
> +++ b/EmbeddedPkg/Library/PrePiLib/FwVol.c
> @@ -291,7 +291,7 @@ FfsProcessSection (
>UINT16SectionAttribute;
>UINT32AuthenticationStatus;
>CHAR8 *CompressedData;
> - UINTN CompressedDataLength;
> + UINT32CompressedDataLength;
>
>*OutputBuffer = NULL;
>ParsedLength = 0;
> @@ -320,7 +320,7 @@ FfsProcessSection (
>}
>
>CompressedData = (CHAR8 *)((EFI_COMPRESSION_SECTION2
> *)Section + 1);
> - CompressedDataLength = (UINT32)SectionLength - sizeof
> (EFI_COMPRESSION_SECTION2);
> + CompressedDataLength = SectionLength - sizeof
> (EFI_COMPRESSION_SECTION2);
> } else {
>CompressionSection = (EFI_COMPRESSION_SECTION *)Section;
>SectionLength = SECTION_SIZE (Section);
> @@ -330,7 +330,7 @@ FfsProcessSection (
>}
>
>CompressedData = (CHAR8 *)((EFI_COMPRESSION_SECTION
> *)Section + 1);
> - CompressedDataLength = (UINT32)SectionLength - sizeof
> (EFI_COMPRESSION_SECTION);
> + CompressedDataLength = SectionLength - sizeof
> (EFI_COMPRESSION_SECTION);
> }
>
> Status = UefiDecompressGetInfo (
> --
> 2.29.2.windows.2
>
>
>
>
>
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