Re: [edk2-devel] [PATCH] IntelFsp2Pkg: Add FSP 2.3 header support
Reviewed-by: Chasel Chiu
Thanks TungLun!
> -Original Message-
> From: Loo, Tung Lun
> Sent: Thursday, May 12, 2022 7:26 AM
> To: devel@edk2.groups.io
> Cc: Loo, Tung Lun ; Desimone, Nathaniel L
> ; Zeng, Star ; Chiu,
> Chasel
> Subject: [PATCH] IntelFsp2Pkg: Add FSP 2.3 header support
>
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3921
>
> This patch adds a couple of fields supported in FSP 2.3 header from both
> header generation and tool support perspective.
>
> Signed-off-by: Loo Tung Lun
> Cc: Nate DeSimone
> Cc: Star Zeng
> Cc: Chasel Chiu
> ---
> IntelFsp2Pkg/Tools/ConfigEditor/ConfigEditor.py | 63
> ++-
>
> IntelFsp2Pkg/Tools/ConfigEditor/GenYamlCfg.py | 14 +++---
> 2 files changed, 69 insertions(+), 8 deletions(-)
>
> diff --git a/IntelFsp2Pkg/Tools/ConfigEditor/ConfigEditor.py
> b/IntelFsp2Pkg/Tools/ConfigEditor/ConfigEditor.py
> index 680b90e09d..5271504282 100644
> --- a/IntelFsp2Pkg/Tools/ConfigEditor/ConfigEditor.py
> +++ b/IntelFsp2Pkg/Tools/ConfigEditor/ConfigEditor.py
> @@ -13,6 +13,7 @@ import tkinter.ttk as ttk
> import tkinter.messagebox as messagebox import tkinter.filedialog as
> filedialog +from pickle import FALSE, TRUE from pathlib import Path from
> GenYamlCfg import CGenYamlCfg, bytes_to_value, \
> bytes_to_bracket_str, value_to_bytes, array_str_to_value@@ -458,7
> +459,10 @@ class FSP_INFORMATION_HEADER(Structure):
> ('NotifyPhaseEntryOffset', c_uint32),
> ('FspMemoryInitEntryOffset', c_uint32), ('TempRamExitEntryOffset',
> c_uint32),-('FspSiliconInitEntryOffset', c_uint32)+
> ('FspSiliconInitEntryOffset', c_uint32),+
> ('FspMultiPhaseSiInitEntryOffset', c_uint32),+
> ('ExtendedImageRevision',
> c_uint16),+('Reserved4', c_uint16) ] @@ -700,6 +704,34 @@
> class FirmwareDevice:
> raise Exception("ERROR: Incorrect FV size in image !")
> self.CheckFsp() +def IsIntegerType(self, val):+if
> sys.version_info[0] <
> 3:+if type(val) in (int, long):+return True+
> else:+if
> type(val) is int:+return True+return False++def
> ConvertRevisionString(self, obj):+for field in obj._fields_:+
>key =
> field[0]+val = getattr(obj, key)+rep = ''++
> if
> self.IsIntegerType(val):+if (key == 'ImageRevision'):+
> FspImageRevisionMajor = ((val >> 24) & 0xFF)+
> FspImageRevisionMinor = ((val >> 16) & 0xFF)+
> FspImageRevisionRevision = ((val >> 8) & 0xFF)+
> FspImageRevisionBuildNumber = (val & 0xFF)+rep = '0x%08X'
> %
> val+elif (key == 'ExtendedImageRevision'):+
> FspImageRevisionRevision |= (val & 0xFF00)+
> FspImageRevisionBuildNumber |= ((val << 8) & 0xFF00)+rep =
> "0x%04X ('%02X.%02X.%04X.%04X')" % (val, FspImageRevisionMajor,
> FspImageRevisionMinor, FspImageRevisionRevision,
> FspImageRevisionBuildNumber)+return rep+ def
> OutputFsp(self): def copy_text_to_clipboard():
> window.clipboard_clear()@@ -721,7 +753,8 @@ class FirmwareDevice:
> self.OutputText = self.OutputText + "Fsp Header Details \n\n"
> while i < len(self.FihList): try:-self.OutputText
> +=
> str(self.BuildList[i].decode()) + "\n"+# self.OutputText +=
> str(self.BuildList[i].decode()) + "\n"+self.OutputText +=
> str(self.BuildList[i]) + "\n" except Exception:
> self.OutputText
> += "No description found\n" self.OutputText += "FSP Header :\n
> "@@ -729,6 +762,8 @@ class FirmwareDevice:
> str(self.FihList[i].Signature.decode('utf-8')) + "\n "
> self.OutputText += "Header Length : " + \
> str(hex(self.FihList[i].HeaderLength)) + "\n "+self.OutputText +=
> "Reserved1 : " + \+str(hex(self.FihList[i].Reserved1)) + "\n "
> self.OutputText += "Header Revision : " + \
> str(hex(self.FihList[i].HeaderRevision)) + "\n " self.OutputText
> +=
> "Spec Version : " + \@@ -743,15 +778,17 @@ class FirmwareDevice:
> str(hex(self.FihList[i].ImageBase)) + "\n "
> self.OutputText +=
> "Image Attribute : " + \
> str(hex(self.FihList[i].ImageAttribute)) + "\n
> "+self.OutputText += "Component
Re: [edk2-devel] [PATCH] IntelFsp2Pkg: Add FSP 2.3 header support
Patch pushed:
https://github.com/tianocore/edk2/commit/fa2b212d61dfeb9c00a174280a73a4f573ef617d
Thanks,
Chasel
> -Original Message-
> From: Loo, Tung Lun
> Sent: Thursday, May 12, 2022 7:26 AM
> To: devel@edk2.groups.io
> Cc: Loo, Tung Lun ; Desimone, Nathaniel L
> ; Zeng, Star ; Chiu,
> Chasel
> Subject: [PATCH] IntelFsp2Pkg: Add FSP 2.3 header support
>
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3921
>
> This patch adds a couple of fields supported in FSP 2.3 header from both
> header
> generation and tool support perspective.
>
> Signed-off-by: Loo Tung Lun
> Cc: Nate DeSimone
> Cc: Star Zeng
> Cc: Chasel Chiu
> ---
> IntelFsp2Pkg/Tools/ConfigEditor/ConfigEditor.py | 63
> ++-
> IntelFsp2Pkg/Tools/ConfigEditor/GenYamlCfg.py | 14 +++---
> 2 files changed, 69 insertions(+), 8 deletions(-)
>
> diff --git a/IntelFsp2Pkg/Tools/ConfigEditor/ConfigEditor.py
> b/IntelFsp2Pkg/Tools/ConfigEditor/ConfigEditor.py
> index 680b90e09d..5271504282 100644
> --- a/IntelFsp2Pkg/Tools/ConfigEditor/ConfigEditor.py
> +++ b/IntelFsp2Pkg/Tools/ConfigEditor/ConfigEditor.py
> @@ -13,6 +13,7 @@ import tkinter.ttk as ttk
> import tkinter.messagebox as messagebox import tkinter.filedialog as
> filedialog
> +from pickle import FALSE, TRUE from pathlib import Path from GenYamlCfg
> import CGenYamlCfg, bytes_to_value, \ bytes_to_bracket_str,
> value_to_bytes, array_str_to_value@@ -458,7 +459,10 @@ class
> FSP_INFORMATION_HEADER(Structure):
> ('NotifyPhaseEntryOffset', c_uint32),
> ('FspMemoryInitEntryOffset',
> c_uint32), ('TempRamExitEntryOffset', c_uint32),-
> ('FspSiliconInitEntryOffset', c_uint32)+('FspSiliconInitEntryOffset',
> c_uint32),+('FspMultiPhaseSiInitEntryOffset', c_uint32),+
> ('ExtendedImageRevision', c_uint16),+('Reserved4', c_uint16)
> ] @@ -
> 700,6 +704,34 @@ class FirmwareDevice:
> raise Exception("ERROR: Incorrect FV size in image !")
> self.CheckFsp() +def IsIntegerType(self, val):+if
> sys.version_info[0] < 3:+
> if type(val) in (int, long):+return True+else:+
> if type(val) is
> int:+return True+return False++def
> ConvertRevisionString(self,
> obj):+for field in obj._fields_:+key = field[0]+
> val = getattr(obj,
> key)+rep = ''++if self.IsIntegerType(val):+
> if (key ==
> 'ImageRevision'):+FspImageRevisionMajor = ((val >> 24) &
> 0xFF)+
> FspImageRevisionMinor = ((val >> 16) & 0xFF)+
> FspImageRevisionRevision = ((val >> 8) & 0xFF)+
> FspImageRevisionBuildNumber = (val & 0xFF)+rep = '0x%08X'
> % val+
> elif (key == 'ExtendedImageRevision'):+
> FspImageRevisionRevision |=
> (val & 0xFF00)+FspImageRevisionBuildNumber |= ((val << 8)
> &
> 0xFF00)+rep = "0x%04X ('%02X.%02X.%04X.%04X')" % (val,
> FspImageRevisionMajor, FspImageRevisionMinor, FspImageRevisionRevision,
> FspImageRevisionBuildNumber)+return rep+ def
> OutputFsp(self):
> def copy_text_to_clipboard(): window.clipboard_clear()@@ -721,7
> +753,8 @@ class FirmwareDevice:
> self.OutputText = self.OutputText + "Fsp Header Details \n\n"
> while i <
> len(self.FihList): try:-self.OutputText +=
> str(self.BuildList[i].decode()) + "\n"+# self.OutputText +=
> str(self.BuildList[i].decode()) + "\n"+self.OutputText +=
> str(self.BuildList[i]) + "\n" except Exception:
> self.OutputText +=
> "No description found\n" self.OutputText += "FSP Header :\n "@@
> -729,6
> +762,8 @@ class FirmwareDevice:
> str(self.FihList[i].Signature.decode('utf-8')) + "\n "
> self.OutputText += "Header Length : " + \
> str(hex(self.FihList[i].HeaderLength)) + "\n "+self.OutputText +=
> "Reserved1 : " + \+str(hex(self.FihList[i].Reserved1)) + "\n "
> self.OutputText += "Header Revision : " + \
> str(hex(self.FihList[i].HeaderRevision)) + "\n " self.OutputText
> += "Spec
> Version : " + \@@ -743,15 +778,17 @@ class FirmwareDevice:
> str(hex(self.FihList[i].ImageBase)) + "\n "
>
Re: [edk2-devel] [PATCH v2] FSP_TEMP_RAM_INIT API call must follow X64 Calling Convention
Thanks Chinni! Just few comments below inline, please help to check. Would you also help to update commit message format and include Bugzilla link for reference? Thanks, Chasel > -Original Message- > From: devel@edk2.groups.io On Behalf Of > cbduggap > Sent: Thursday, May 12, 2022 5:13 PM > To: devel@edk2.groups.io > Subject: [edk2-devel] [PATCH v2] FSP_TEMP_RAM_INIT API call must follow > X64 Calling Convention > > This API accept one parameter using RCX and this is consumed in mutiple > sub functions. > Signed-off-by: cbduggap > --- > IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm | 21 -- > .../Include/SaveRestoreSseAvxNasm.inc | 28 +++ > 2 files changed, 40 insertions(+), 9 deletions(-) > > diff --git a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm > b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm > index a9f5f28ed7..cddc41125e 100644 > --- a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm > +++ b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm > @@ -130,10 +130,9 @@ ASM_PFX(LoadMicrocodeDefault): > cmprsp, 0jz ParamError- moveax, dword [rsp + 8]; > Parameter pointer- cmpeax, 0+ cmpecx, 0jz ParamError- > mov Do you have corresponding change for IntelFsp2WrapperPkg\Library\SecFspWrapperPlatformSecLibSample\X64\SecEntry.nasm to pass parameters by RCX? Please help to update comments for LoadMicrocodeDefault as it still mentioning below old implementation: ; Inputs: ; rsp -> LoadMicrocodeParams pointer > esp, eax+ movesp, ecx ; skip loading Microcode if the > MicrocodeCodeSize is zero; and report error if size is less than 2k@@ - > 321,8 +320,7 @@ ASM_PFX(EstablishStackFsp): >; ; Save parameter pointer in rdx ;- mov rdx, qword [rsp + 8]-+ > mov > rdx, rcx ; ; Enable FSP STACK ;@@ -420,7 +418,10 @@ > ASM_PFX(TempRamInitApi): >; ENABLE_SSE ENABLE_AVX-+ ;+ ; Save Input Parameter in YMM10+ ;+ > SAVE_RCX ; ; Save RBP, RBX, RSI, RDI and RSP in YMM7, YMM8 and > YMM6 ;@@ -442,9 +443,8 @@ ASM_PFX(TempRamInitApi): >; ; Check Parameter ;- mov rax, qword [rsp + 8]- cmp > rax, 0- > mov rax, 08002h+ cmp rcx, 0+ mov rcx, > 08002h jzTempRamInitExit;@@ -456,17 +456,20 > @@ ASM_PFX(TempRamInitApi): > ; Load microcode LOAD_RSP+ LOAD_RCX CALL_YMM Since we have following X64 calling convention to pass parameter by RCX, I think we do not need LOAD_RSP anymore. Please help to check if we still need it. > ASM_PFX(LoadMicrocodeDefault) SAVE_UCODE_STATUS rax ; Save > microcode return status in SLOT 0 in YMM9 (upper 128bits). ; @note If > return value rax is not 0, microcode did not load, but continue and attempt > to boot.; Call Sec CAR Init LOAD_RSP+ LOAD_RCX CALL_YMM > ASM_PFX(SecCarInit) cmp rax, 0 jnz TempRamInitExit > LOAD_RSP+ LOAD_RCX CALL_YMM ASM_PFX(EstablishStackFsp) cmp > rax, 0 jnz TempRamInitExitdiff --git > a/IntelFsp2Pkg/Include/SaveRestoreSseAvxNasm.inc > b/IntelFsp2Pkg/Include/SaveRestoreSseAvxNasm.inc > index e8bd91669d..38c807a311 100644 > --- a/IntelFsp2Pkg/Include/SaveRestoreSseAvxNasm.inc > +++ b/IntelFsp2Pkg/Include/SaveRestoreSseAvxNasm.inc > @@ -177,6 +177,30 @@ > LXMMN xmm5, %1, 1 %endmacro +;+; Upper half of > YMM10 to save/restore RCX+;+;+; Save RCX to YMM10[128:191]+; > Modified: XMM5 and YMM10+;++%macro SAVE_RCX 0+LYMMN > ymm10, xmm5, 1+SXMMN xmm5, 0, rcx+SYMMN ymm10, > 1, xmm5+%endmacro++;+; Restore RCX from YMM10[128:191]+; > Modified: XMM5 and RCX+;++%macro LOAD_RCX 0+LYMMN > ymm10, xmm5, 1+movqrcx, xmm5+%endmacro+ ; ; > YMM7[128:191] for calling stack ; arg 1:Entry@@ -231,6 +255,7 @@ > NextAddress: > ; Use CpuId instruction (CPUID.01H:EDX.SSE[bit 25] = 1) to > test ; whether the processor supports SSE instruction. > ;+ > mov r10, rcx mov rax, 1 cpuid bt > rdx, 25@@ - > 241,6 +266,7 @@ NextAddress: > ; bt ecx, 19 jnc SseError+ > mov rcx, > r10 ; ; Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit > #10)@@ -258,6 +284,7 @@ NextAddress: > %endmacro %macro ENABLE_AVX 0+mov r10, rcx > mov eax, 1 cpuid and ecx, 1000h@@ -280,5 > +307,6 > @@ EnableAvx: > xgetbv ; result in edx:eax or > eax, 0006h ; Set > XCR0 bit #1 and bit #2 to enable SSE state and AVX state xsetbv+ > mov rcx, r10 %endmacro -- > 2.36.0.windows.1 > > > > -=-=-=-=-=-= > Groups.io Links: You receive all messages sent to this group. > View/Reply Online (#89694): >
Re: [edk2-devel][PATCH v2 2/2] IntelFsp2Pkg: Update SEC_IDT_TABLE struct
Thanks for updating!
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Kuo, Ted
> Sent: Tuesday, July 12, 2022 2:31 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star ; S, Ashraf
> Ali
> Subject: [edk2-devel][PATCH v2 2/2] IntelFsp2Pkg: Update SEC_IDT_TABLE
> struct
>
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3957
> The reserved IDT table size in SecCore is too small for X64. Changed the type
> of
> IdtTable in SEC_IDT_TABLE from UINT64 to IA32_IDT_GATE_DESCRIPTOR to
> have sufficient size reserved in IdtTable for X64.
>
> Cc: Chasel Chiu
> Cc: Nate DeSimone
> Cc: Star Zeng
> Cc: Ashraf Ali S
> Signed-off-by: Ted Kuo
> ---
> IntelFsp2Pkg/FspSecCore/SecFsp.c | 9 +
> IntelFsp2Pkg/FspSecCore/SecFsp.h | 2 +- IntelFsp2Pkg/FspSecCore/SecMain.c
> | 16 IntelFsp2Pkg/FspSecCore/SecMain.h | 4 ++--
> 4 files changed, 16 insertions(+), 15 deletions(-)
>
> diff --git a/IntelFsp2Pkg/FspSecCore/SecFsp.c
> b/IntelFsp2Pkg/FspSecCore/SecFsp.c
> index 7fde6e7f41..e9b4091b20 100644
> --- a/IntelFsp2Pkg/FspSecCore/SecFsp.c
> +++ b/IntelFsp2Pkg/FspSecCore/SecFsp.c
> @@ -16,19 +16,20 @@
>@return FSP specific IDT gate descriptor. **/-
> UINT64+IA32_IDT_GATE_DESCRIPTOR FspGetExceptionHandler ( IN UINT64
> IdtEntryTemplate ) { UINT32Entry;- UINT64
> ExceptionHandler;+ IA32_IDT_GATE_DESCRIPTOR ExceptionHandler;
> IA32_IDT_GATE_DESCRIPTOR *IdtGateDescriptor; FSP_INFO_HEADER
> *FspInfoHeader; + ZeroMem ((VOID *), sizeof
> (IA32_IDT_GATE_DESCRIPTOR)); FspInfoHeader =
> (FSP_INFO_HEADER *)(UINTN)AsmGetFspInfoHeader ();- ExceptionHandler
> = IdtEntryTemplate;- IdtGateDescriptor =
> (IA32_IDT_GATE_DESCRIPTOR *)+ *(UINT64
> *) = IdtEntryTemplate;+ IdtGateDescriptor
> =
>Entry = (IdtGateDescriptor-
> >Bits.OffsetHigh << 16) | IdtGateDescriptor->Bits.OffsetLow; Entry
> = FspInfoHeader->ImageBase + FspInfoHeader->ImageSize - (~Entry + 1);
> IdtGateDescriptor->Bits.OffsetHigh = (UINT16)(Entry >> 16);diff --git
> a/IntelFsp2Pkg/FspSecCore/SecFsp.h b/IntelFsp2Pkg/FspSecCore/SecFsp.h
> index 41931a33dd..e84528b378 100644
> --- a/IntelFsp2Pkg/FspSecCore/SecFsp.h
> +++ b/IntelFsp2Pkg/FspSecCore/SecFsp.h
> @@ -30,7 +30,7 @@
>@return FSP specific IDT gate descriptor. **/-
> UINT64+IA32_IDT_GATE_DESCRIPTOR FspGetExceptionHandler ( IN UINT64
> IdtEntryTemplate );diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c
> b/IntelFsp2Pkg/FspSecCore/SecMain.c
> index 8effe2225c..94ea3865b4 100644
> --- a/IntelFsp2Pkg/FspSecCore/SecMain.c
> +++ b/IntelFsp2Pkg/FspSecCore/SecMain.c
> @@ -58,13 +58,13 @@ SecStartup (
>IN UINT32 ApiIdx ) {- EFI_SEC_PEI_HAND_OFF SecCoreData;-
> IA32_DESCRIPTOR IdtDescriptor;- SEC_IDT_TABLE IdtTableInStack;-
> UINT32Index;- FSP_GLOBAL_DATA PeiFspData;- UINT64
> ExceptionHandler;- UINTN IdtSize;+ EFI_SEC_PEI_HAND_OFF
> SecCoreData;+ IA32_DESCRIPTOR IdtDescriptor;+ SEC_IDT_TABLE
> IdtTableInStack;+ UINT32Index;+ FSP_GLOBAL_DATA
> PeiFspData;+ IA32_IDT_GATE_DESCRIPTOR ExceptionHandler;+ UINTN
> IdtSize;// // Process all libraries constructor function linked to
> SecCore.@@ -
> 119,7 +119,7 @@ SecStartup (
>if (IdtDescriptor.Base == 0) { ExceptionHandler =
> FspGetExceptionHandler
> (mIdtEntryTemplate); for (Index = 0; Index < FixedPcdGet8
> (PcdFspMaxInterruptSupported); Index++) {- CopyMem ((VOID
> *)[Index], (VOID *), sizeof
> (UINT64));+ CopyMem ((VOID *)[Index], (VOID
> *), sizeof (IA32_IDT_GATE_DESCRIPTOR)); } IdtSize =
> sizeof (IdtTableInStack.IdtTable);diff --git
> a/IntelFsp2Pkg/FspSecCore/SecMain.h
> b/IntelFsp2Pkg/FspSecCore/SecMain.h
> index 7c2642ad48..1fe7c15aeb 100644
> --- a/IntelFsp2Pkg/FspSecCore/SecMain.h
> +++ b/IntelFsp2Pkg/FspSecCore/SecMain.h
> @@ -38,8 +38,8 @@ typedef struct _SEC_IDT_TABLE {
>// Note: For IA32, only the 4 bytes immediately preceding IDT is used to
> store
> // EFI_PEI_SERVICES** //- UINT64PeiService;- UINT64
> IdtTable[FixedPcdGet8 (PcdFspMaxInterruptSupported)];+ UINT64
> PeiService;+ IA32_IDT_GATE_DESCRIPTOR IdtTable[FixedPcdGet8
> (PcdFspMaxInterruptSupported)]; } SEC_IDT_TABLE; /**--
> 2.35.3.windows.1
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Re: [edk2-devel] [edk2-platforms] [PATCH V2 1/4] KabylakeOpenBoardPkg: Indicate width of CLK duty cycle in FADT
Reviewed-by: Chasel Chiu Thanks, Chasel > -Original Message- > From: Desimone, Nathaniel L > Sent: Tuesday, June 7, 2022 7:17 AM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Kubacki, Michael > ; Benjamin Doron > ; Soller, Jeremy > Subject: [edk2-platforms] [PATCH V2 1/4] KabylakeOpenBoardPkg: Indicate > width of CLK duty cycle in FADT > > Set the location of the DUTY_CYCLE field in the P_CNT register and indicate > the > width of the clock duty cycle to OS power management > > Cc: Chasel Chiu > Cc: Michael Kubacki > Cc: Benjamin Doron > Cc: Jeremy Soller > Signed-off-by: Nate DeSimone > --- > .../AspireVn7Dash572G/OpenBoardPkgPcd.dsc | 9 - > .../GalagoPro3/OpenBoardPkgPcd.dsc| 8 +++- > .../KabylakeRvp3/OpenBoardPkgPcd.dsc | 11 +-- > 3 files changed, 24 insertions(+), 4 deletions(-) > > diff --git > a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPc > d.dsc > b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPc > d.dsc > index 21ee86403d..02080aa864 100644 > --- > a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPc > d.dsc > +++ > b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg > +++ Pcd.dsc > @@ -1,7 +1,7 @@ > ## @file > # PCD configuration build description file for the Aspire VN7-572G board. > # > -# Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved. > +# Copyright (c) 2017 - 2022, Intel Corporation. All rights > +reserved. > # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -346,6 +346,13 @@ >gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1|0xF2 # FIXME: Boot Guard and > BIOS Guard not present, measured boot enforcement checking code not present >gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2|0x07 > > + # > + # Set the location of the DUTY_CYCLE field in the P_CNT register # > + and indicate the width of the clock duty cycle to OS power management > + # > + gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1 > + gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3 > + >## ># Platform Configuration >## > diff --git > a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc > b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc > index 44dacdf082..dce4db17c2 100644 > --- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc > +++ > b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc > @@ -1,7 +1,7 @@ > ## @file > # PCD configuration build description file for the GalagoPro3 board. > # > -# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved. > +# Copyright (c) 2019 - 2022, Intel Corporation. All rights > +reserved. > # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -251,6 +251,12 @@ >gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1|0xF2 >gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2|0x07 > > + # > + # Set the location of the DUTY_CYCLE field in the P_CNT register # > + and indicate the width of the clock duty cycle to OS power management > + # > + gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1 > + gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3 > > gSiPkgTokenSpaceGuid.PcdSiPciExpressBaseAddress|gEfiMdePkgTokenSpaceGui > d.PcdPciExpressBaseAddress > > gSiPkgTokenSpaceGuid.PcdSiPciExpressRegionLength|gMinPlatformPkgTokenSp > aceGuid.PcdPciExpressRegionLength > > diff --git > a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc > b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc > index 725596cbf7..ccf757e202 100644 > --- > a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc > +++ > b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.d > +++ sc > @@ -1,7 +1,7 @@ > ## @file > # PCD configuration build description file for the KabylakeRvp3 board. > # > -# Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved. > +# Copyright (c) 2017 - 2022, Intel Corporation. All rights > +reserved. > # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -78,6 +78,7 @@ ># so FSP needs more temporary memory for FSP heap + stack size. ># >gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize|0x26000 > + ># ># FSP API mode does not need to enlarge the boot loader stack size ># since the stacks are separate. > @@ -290,6 +291,13 @@ >gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1|0xF2 >gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2|0x07 > > + # > + # Set the location of the
Re: [edk2-devel] [PATCH V2 1/1] MinPlatformPkg: Add PCDs to update FADT entries from board package
Reviewed-by: Chasel Chiu Thanks, Chasel > -Original Message- > From: Desimone, Nathaniel L > Sent: Wednesday, June 8, 2022 7:23 AM > To: devel@edk2.groups.io > Cc: Sinha, Ankit ; Chiu, Chasel > ; > Gao, Liming ; Dong, Eric ; > Kubacki, Michael > Subject: [PATCH V2 1/1] MinPlatformPkg: Add PCDs to update FADT entries from > board package > > From: Ankit Sinha > > Adds new PCDs to allow entries in FADT to be customized during platform > integration. Board packages will can update these PCDs during boot. > > Cc: Chasel Chiu > Cc: Nate DeSimone > Cc: Liming Gao > Cc: Eric Dong > Cc: Michael Kubacki > > Signed-off-by: Ankit Sinha > --- > Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 84 > > Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf | 23 ++ > Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 43 > +++--- > 3 files changed, 106 insertions(+), 44 deletions(-) > > diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c > b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c > index 508de9101306..3c9f79de5c6c 100644 > --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c > +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c > @@ -1165,6 +1165,11 @@ PlatformUpdateTables ( >// Update the creator revision >// >TableHeader->CreatorRevision = PcdGet32(PcdAcpiDefaultCreatorRevision); > + > + // > + // Update the oem revision > + // > + TableHeader->OemRevision = PcdGet32(PcdAcpiDefaultOemRevision); > } >} > > @@ -1187,44 +1192,53 @@ PlatformUpdateTables ( >case EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE: > FadtHeader = (EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE *) Table; > > -FadtHeader->PreferredPmProfile = PcdGet8 (PcdFadtPreferredPmProfile); > -FadtHeader->IaPcBootArch = PcdGet16 (PcdFadtIaPcBootArch); > -FadtHeader->Flags = PcdGet32 (PcdFadtFlags); > +FadtHeader->PreferredPmProfile= PcdGet8 > (PcdFadtPreferredPmProfile); > +FadtHeader->IaPcBootArch = PcdGet16 > (PcdFadtIaPcBootArch); > +FadtHeader->Flags = PcdGet32 (PcdFadtFlags); > +FadtHeader->AcpiEnable= PcdGet8 > (PcdAcpiEnableSwSmi); > +FadtHeader->AcpiDisable = PcdGet8 > (PcdAcpiDisableSwSmi); > +FadtHeader->Pm1aEvtBlk= PcdGet16 > (PcdAcpiPm1AEventBlockAddress); > +FadtHeader->Pm1bEvtBlk= PcdGet16 > (PcdAcpiPm1BEventBlockAddress); > +FadtHeader->Pm1aCntBlk= PcdGet16 > (PcdAcpiPm1AControlBlockAddress); > +FadtHeader->Pm1bCntBlk= PcdGet16 > (PcdAcpiPm1BControlBlockAddress); > +FadtHeader->Pm2CntBlk = PcdGet16 > (PcdAcpiPm2ControlBlockAddress); > +FadtHeader->PmTmrBlk = PcdGet16 > (PcdAcpiPmTimerBlockAddress); > +FadtHeader->Gpe0Blk = PcdGet16 > (PcdAcpiGpe0BlockAddress); > +FadtHeader->Gpe0BlkLen= PcdGet8 > (PcdAcpiGpe0BlockLength); > +FadtHeader->Gpe1Blk = PcdGet16 > (PcdAcpiGpe1BlockAddress); > +FadtHeader->Gpe1Base = PcdGet8 > (PcdAcpiGpe1Base); > > -FadtHeader->AcpiEnable = PcdGet8 (PcdAcpiEnableSwSmi); > -FadtHeader->AcpiDisable = PcdGet8 (PcdAcpiDisableSwSmi); > +FadtHeader->XPm1aEvtBlk.Address = PcdGet16 > (PcdAcpiPm1AEventBlockAddress); > +FadtHeader->XPm1aCntBlk.Address = PcdGet16 > (PcdAcpiPm1AControlBlockAddress); > +FadtHeader->XPm1bCntBlk.Address = PcdGet16 > (PcdAcpiPm1BControlBlockAddress); > +FadtHeader->XPm2CntBlk.Address= PcdGet16 > (PcdAcpiPm2ControlBlockAddress); > +FadtHeader->XPmTmrBlk.Address = PcdGet16 > (PcdAcpiPmTimerBlockAddress); > +FadtHeader->XGpe0Blk.Address = PcdGet16 > (PcdAcpiGpe0BlockAddress); > +FadtHeader->XGpe1Blk.Address = PcdGet16 > (PcdAcpiGpe1BlockAddress); > > -FadtHeader->Pm1aEvtBlk = PcdGet16 (PcdAcpiPm1AEventBlockAddress); > -FadtHeader->Pm1bEvtBlk = PcdGet16 (PcdAcpiPm1BEventBlockAddress); > -FadtHeader->Pm1aCntBlk = PcdGet16 (PcdAcpiPm1AControlBlockAddress); > -FadtHeader->Pm1bCntBlk = PcdGet16 (PcdAcpiPm1BControlBlockAddress); > -Fad
Re: [edk2-devel] [edk2-platforms] [PATCH V2 2/4] WhiskeylakeOpenBoardPkg: Indicate width of CLK duty cycle in FADT
Reviewed-by: Chasel Chiu Thanks, Chasel > -Original Message- > From: Desimone, Nathaniel L > Sent: Tuesday, June 7, 2022 7:17 AM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Kubacki, Michael > > Subject: [edk2-platforms] [PATCH V2 2/4] WhiskeylakeOpenBoardPkg: Indicate > width of CLK duty cycle in FADT > > Set the location of the DUTY_CYCLE field in the P_CNT register and indicate > the > width of the clock duty cycle to OS power management > > Cc: Chasel Chiu > Cc: Michael Kubacki > Signed-off-by: Nate DeSimone > --- > .../WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc | 9 - > .../WhiskeylakeURvp/OpenBoardPkgPcd.dsc | 9 - > 2 files changed, 16 insertions(+), 2 deletions(-) > > diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc > b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc > index 84d4ec1331..8f3cc6ba28 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.ds > +++ c > @@ -1,7 +1,7 @@ > ## @file > # PCD configuration build description file for the UpXtreme board. > # > -# Copyright (c) 2020, Intel Corporation. All rights reserved. > +# Copyright (c) 2020 - 2022, Intel Corporation. All rights > +reserved. > # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -259,6 +259,13 @@ >gSiPkgTokenSpaceGuid.PcdSerialIoUartNumber|2 > > gSiPkgTokenSpaceGuid.PcdPciExpressRegionLength|gMinPlatformPkgTokenSpa > ceGuid.PcdPciExpressRegionLength > > + # > + # Set the location of the DUTY_CYCLE field in the P_CNT register # > + and indicate the width of the clock duty cycle to OS power management > + # > + gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1 > + gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3 > + >## ># Platform Configuration >## > diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg > Pcd.dsc > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg > Pcd.dsc > index 4a7ba4d5f0..4a5d5ef03b 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg > Pcd.dsc > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPk > +++ gPcd.dsc > @@ -1,7 +1,7 @@ > ## @file > # PCD configuration build description file for the WhiskeylakeURvp board. > # > -# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved. > +# Copyright (c) 2019 - 2022, Intel Corporation. All rights > +reserved. > # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -242,6 +242,13 @@ >## > > gSiPkgTokenSpaceGuid.PcdPciExpressRegionLength|gMinPlatformPkgTokenSpa > ceGuid.PcdPciExpressRegionLength > > + # > + # Set the location of the DUTY_CYCLE field in the P_CNT register # > + and indicate the width of the clock duty cycle to OS power management > + # > + gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1 > + gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3 > + >## ># Platform Configuration >## > -- > 2.27.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#90316): https://edk2.groups.io/g/devel/message/90316 Mute This Topic: https://groups.io/mt/91589973/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platforms] [PATCH V2 3/4] CometlakeOpenBoardPkg: Indicate width of CLK duty cycle in FADT
Reviewed-by: Chasel Chiu Thanks, Chasel > -Original Message- > From: Desimone, Nathaniel L > Sent: Tuesday, June 7, 2022 7:17 AM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Kubacki, Michael > ; Chaganty, Rangasai V > ; Kethi Reddy, Deepika > ; Esakkithevar, Kathappan > > Subject: [edk2-platforms] [PATCH V2 3/4] CometlakeOpenBoardPkg: Indicate > width of CLK duty cycle in FADT > > Set the location of the DUTY_CYCLE field in the P_CNT register and indicate > the > width of the clock duty cycle to OS power management > > Cc: Chasel Chiu > Cc: Michael Kubacki > Cc: Rangasai V Chaganty > Cc: Deepika Kethi Reddy > Cc: Kathappan Esakkithevar > Signed-off-by: Nate DeSimone > --- > .../CometlakeURvp/OpenBoardPkgPcd.dsc| 9 - > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git > a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd. > dsc > b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd. > dsc > index 589b002d06..68dd08423b 100644 > --- > a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd. > dsc > +++ > b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd > +++ .dsc > @@ -1,7 +1,7 @@ > ## @file > # PCD configuration build description file for the CometlakeURvp board. > # > -# Copyright (c) 2020, Intel Corporation. All rights reserved. > +# Copyright (c) 2020 - 2022, Intel Corporation. All rights > +reserved. > # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -253,6 +253,13 @@ >gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8 >gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2 > > + # > + # Set the location of the DUTY_CYCLE field in the P_CNT register # > + and indicate the width of the clock duty cycle to OS power management > + # > + gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1 > + gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3 > + ># ># The PCDs are used to control the Windows SMM Security Mitigations Table - > Protection Flags ># > -- > 2.27.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#90317): https://edk2.groups.io/g/devel/message/90317 Mute This Topic: https://groups.io/mt/91589976/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg/GalagoPro3: Add FSP Dispatch Mode PCDs
Reviewed-by: Chasel Chiu Thanks, Chasel > -Original Message- > From: Desimone, Nathaniel L > Sent: Tuesday, June 7, 2022 7:09 AM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Sinha, Ankit > ; > Kubacki, Michael ; Soller, Jeremy > > Subject: [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg/GalagoPro3: Add > FSP Dispatch Mode PCDs > > Adds missing FSP dispatch mode PCDs to the Galago Pro 3. > > Cc: Chasel Chiu > Cc: Ankit Sinha > Cc: Michael Kubacki > Cc: Jeremy Soller > Signed-off-by: Nate DeSimone > --- > .../GalagoPro3/OpenBoardPkgPcd.dsc| 46 +-- > 1 file changed, 42 insertions(+), 4 deletions(-) > > diff --git > a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc > b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc > index 44dacdf082..28f044df5e 100644 > --- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc > +++ > b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc > @@ -1,7 +1,7 @@ > ## @file > # PCD configuration build description file for the GalagoPro3 board. > # > -# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved. > +# Copyright (c) 2019 - 2022, Intel Corporation. All rights > +reserved. > # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -40,6 +40,26 @@ ># >gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|TRUE > > + # > + # FALSE: The PEI Main included in FvPreMemory is used to dispatch all PEIMs > + #(both inside FSP and outside FSP). > + #Pros: > + # * PEI Main is re-built from source and is always the latest > version > + # * Platform code can link any desired LibraryClass to PEI Main > + #(Ex: Custom DebugLib instance, SerialPortLib, etc.) > + #Cons: > + # * The PEI Main being used to execute FSP PEIMs is not the PEI > Main > + #that the FSP PEIMs were tested with, adding risk of breakage. > + # * Two copies of PEI Main will exist in the final binary, > + ##1 in FSP-M, #2 in FvPreMemory. The copy in FSP-M is never > + #executed, wasting space. > + # > + # TRUE: The PEI Main included in FSP is used to dispatch all PEIMs > + #(both inside FSP and outside FSP). PEI Main will not be included > in > + #FvPreMemory. This is the default and is the recommended choice. > + # > + gMinPlatformPkgTokenSpaceGuid.PcdFspDispatchModeUseFspPeiMain|TRUE > + ># ># FSP Base address PCD will be updated in FDF basing on flash map. ># > @@ -52,6 +72,7 @@ >gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x0004 >gSiPkgTokenSpaceGuid.PcdTsegSize|0x100 > > +!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1 ># ># FSP API mode does not share stack with the boot loader, ># so FSP needs more temporary memory for FSP heap + stack size. > @@ -63,6 +84,24 @@ ># since the stacks are separate. ># >gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x2 > +!else > + # > + # In FSP Dispatch mode boot loader stack size must be large > + # enough for executing both boot loader and FSP. > + # > + gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x4 > +!endif > + > +!if (gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode == FALSE) || > +(gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1) > + > +gSiPkgTokenSpaceGuid.PcdSiPciExpressBaseAddress|gEfiMdePkgTokenSpaceG > ui > +d.PcdPciExpressBaseAddress > + > +gSiPkgTokenSpaceGuid.PcdSiPciExpressRegionLength|gMinPlatformPkgTokenS > p > +aceGuid.PcdPciExpressRegionLength > +!else > + # > + # FSP Dispatch mode requires more platform memory as boot loader and > +FSP sharing the same > + # platform memory. > + # > + gSiPkgTokenSpaceGuid.PcdPeiMinMemorySize|0x550 > +!endif > > [PcdsFeatureFlag.common] >## > @@ -222,7 +261,7 @@ >gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|1000 >gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|1 >gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x2 > - > +!if (gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode == FALSE) || > +(gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1) ># ># In non-FSP build (EDK2 build) or FSP API mode below PCD are FixedAtBuild ># (They will be DynamicEx in FSP Dispatch mode) @@ -242,6 +281,7 @@ ># 3: Place AP in the Run-Loop state. ># @Prompt The AP wait loop state. >gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|2 > +!endif > >## &g
Re: [edk2-devel] [PATCH 0/2] Support 64bit FspResetType in X64 build.
patch series merged: https://github.com/tianocore/edk2/commit/140446cd595cad870a0e8cef7a367bae8f09effa https://github.com/tianocore/edk2/commit/24eac4caf31afae48349af44588a52783c1819b8 Thanks, Chasel > -Original Message- > From: Chiu, Chasel > Sent: Monday, July 18, 2022 9:42 PM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > ; Zeng, Star > Subject: [PATCH 0/2] Support 64bit FspResetType in X64 build. > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3999 > FspResetType will be either 32bit or 64 bit basing on the build type > > Cc: Nate DeSimone > Cc: Star Zeng > Signed-off-by: Chasel Chiu > > Chasel Chiu (2): > IntelFsp2Pkg: Support 64bit FspResetType for X64 build. > IntelFsp2WrapperPkg: Support 64bit FspResetType for X64 build. > > IntelFsp2Pkg/Library/BaseFspCommonLib/FspCommonLib.c > | 10 +- > IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c > | 6 +++--- > IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c > | 10 +- > IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c > | 15 +++ > IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/DispatchExecute.c > | 5 - > > IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperP > latformLibSample.c | 2 +- > IntelFsp2Pkg/Include/FspEas/FspApi.h > | 61 > + > IntelFsp2Pkg/Include/Library/FspCommonLib.h > | 2 +- > IntelFsp2Pkg/Include/Library/FspSwitchStackLib.h > | 4 ++- > - > IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h > | 2 +- > 10 files changed, 62 insertions(+), 55 deletions(-) > > -- > 2.35.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#91557): https://edk2.groups.io/g/devel/message/91557 Mute This Topic: https://groups.io/mt/92476842/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v2 0/2] MinPlatformPkg: FspResetType support for X64 build.
This patch series has been merged: cfd7e5f231fd644a5cb585d8ab68aa701af6a286 0f836bd4e3e18b9bd0d1a73b849a554519ee82fa Thanks, Chasel > -Original Message- > From: Chiu, Chasel > Sent: Monday, July 18, 2022 5:37 PM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > ; Oram, Isaac W ; > Gao, Liming ; Dong, Eric > Subject: [PATCH v2 0/2] MinPlatformPkg: FspResetType support for X64 build. > > FSP_STATUS_RESET_REQUIRED_* will be either 32bit or 64bit basing on the > build and this patch series extended the support for 64bit build. > > Cc: Nate DeSimone > Cc: Isaac Oram > Cc: Liming Gao > Cc: Eric Dong > Signed-off-by: Chasel Chiu > > V2: Change ResetType from UINTN to EFI_STATUS > > Chasel Chiu (2): > MinPlatformPkg/FspWrapper: FspResetType support for X64 build. > WhitleySiliconPkg: FspResetType support for X64 build. > > > Platform/Intel/MinPlatformPkg/FspWrapper/Library/DxeFspWrapperPlatformLi > b/DxeFspWrapperPlatformResetLib.c | 2 +- > Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperPlatformLib > /PeiFspWrapperPlatformResetLib.c | 2 +- > > Silicon/Intel/WhitleySiliconPkg/Library/FspWrapperPlatformLib/FspWrapperPlat > formLib.c | 2 +- > 3 files changed, 3 insertions(+), 3 deletions(-) > > -- > 2.35.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#91556): https://edk2.groups.io/g/devel/message/91556 Mute This Topic: https://groups.io/mt/92473321/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel][edk2-platforms][PATCH V2 0/2] Add MinPlatformPkg NOOPT build option
For this series, Reviewed-by: Chasel Chiu Thanks, Chasel > -Original Message- > From: Oram, Isaac W > Sent: Tuesday, July 19, 2022 12:43 PM > To: devel@edk2.groups.io > Cc: Oram, Isaac W ; Chiu, Chasel > ; Desimone, Nathaniel L > ; Gao, Liming ; > Dong, Eric > Subject: [edk2-devel][edk2-platforms][PATCH V2 0/2] Add MinPlatformPkg > NOOPT build option > > V2: > Wrap DXE performance library with feature PCD > > V1: > Add the NOOPT build option. > Use the same libraries for DEBUG and NOOPT Clean up some duplication and > coding style issues with the include files. > > Cc: Chasel Chiu > Cc: Nate DeSimone > Cc: Liming Gao > Cc: Eric Dong > Signed-off-by: Isaac Oram > > Isaac Oram (2): > MinPlatformPkg/Build: Add NOOPT build > MinPlatformPkg/Build: Reduce duplication > > .../MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc | 66 ++- > .../MinPlatformPkg/Include/Dsc/CorePeiLib.dsc | 29 ++-- > .../Intel/MinPlatformPkg/MinPlatformPkg.dsc | 2 +- > 3 files changed, 27 insertions(+), 70 deletions(-) > > -- > 2.36.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#91555): https://edk2.groups.io/g/devel/message/91555 Mute This Topic: https://groups.io/mt/92490676/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH] IntelFsp2Pkg: Add FSPI_ARCH_UPD.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
Adding the missing FSPI_ARCH_UPD, FSP_GLOBAL_DATA_VERSION bumpping up,
and some comments for clarification.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Include/FspEas/FspApi.h | 69
++---
IntelFsp2Pkg/Include/FspGlobalData.h | 2 +-
2 files changed, 63 insertions(+), 8 deletions(-)
diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h
b/IntelFsp2Pkg/Include/FspEas/FspApi.h
index bf46f13f73..ad5d62c385 100644
--- a/IntelFsp2Pkg/Include/FspEas/FspApi.h
+++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h
@@ -1,6 +1,6 @@
/** @file
Intel FSP API definition from Intel Firmware Support Package External
- Architecture Specification v2.0 - v2.2
+ Architecture Specification v2.0 and above.
Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -100,13 +100,14 @@ typedef struct {
/// "XX_T" for FSP-T
/// "XX_M" for FSP-M
/// "XX_S" for FSP-S
+ /// "XX_I" for FSP-I
/// Where XX is an unique signature
///
UINT64Signature;
///
/// Revision of the Data structure.
- /// For FSP spec 2.0/2.1 value is 1.
- /// For FSP spec 2.2 value is 2.
+ /// For FSP spec 2.0/2.1, this value is 1 and only FSPM_UPD having
ARCH_UPD.
+ /// For FSP spec 2.2 and above, this value is 2 and ARCH_UPD present in
all UPD structures.
///
UINT8 Revision;
UINT8 Reserved[23];
@@ -134,7 +135,7 @@ typedef struct {
} FSPT_ARCH_UPD;
///
-/// FSPT_ARCH2_UPD Configuration.
+/// FSPT_ARCH2_UPD Configuration for FSP 2.4 and above.
///
typedef struct {
///
@@ -196,7 +197,7 @@ typedef struct {
} FSPM_ARCH_UPD;
///
-/// FSPM_ARCH2_UPD Configuration.
+/// FSPM_ARCH2_UPD Configuration for FSP 2.4 and above.
///
typedef struct {
///
@@ -209,6 +210,11 @@ typedef struct {
///
UINT32 Length;
///
+ /// Pointer to the non-volatile storage (NVS) data buffer.
+ /// If it is NULL it indicates the NVS data is not available.
+ ///
+ EFI_PHYSICAL_ADDRESSNvsBufferPtr;
+ ///
/// Pointer to the temporary stack base address to be
/// consumed inside FspMemoryInit() API.
///
@@ -232,7 +238,7 @@ typedef struct {
/// This value is only valid if Revision is >= 2.
///
EFI_PHYSICAL_ADDRESSFspEventHandler;
- UINT8 Reserved1[24];
+ UINT8 Reserved1[16];
} FSPM_ARCH2_UPD;
///
@@ -265,7 +271,7 @@ typedef struct {
} FSPS_ARCH_UPD;
///
-/// FSPS_ARCH2_UPD Configuration.
+/// FSPS_ARCH2_UPD Configuration for FSP 2.4 and above.
///
typedef struct {
///
@@ -285,6 +291,40 @@ typedef struct {
UINT8 Reserved1[16];
} FSPS_ARCH2_UPD;
+///
+/// FSPI_ARCH_UPD Configuration.
+///
+typedef struct {
+ ///
+ /// Revision of the structure is 1 for this version of the specification.
+ ///
+ UINT8 Revision;
+ UINT8 Reserved[3];
+ ///
+ /// Length of the structure in bytes. The current value for this field is 32.
+ ///
+ UINT32 Length;
+ ///
+ /// The physical memory-mapped base address of the bootloader SMM firmware
volume (FV).
+ ///
+ EFI_PHYSICAL_ADDRESSBootloaderSmmFvBaseAddress;
+ ///
+ /// The length in bytes of the bootloader SMM firmware volume (FV).
+ ///
+ UINT64 BootloaderSmmFvLength;
+ ///
+ /// The physical memory-mapped base address of the bootloader SMM FV context
data.
+ /// This data is provided to bootloader SMM drivers through a HOB by the FSP
MM Foundation.
+ ///
+ EFI_PHYSICAL_ADDRESSBootloaderSmmFvContextData;
+ ///
+ /// The length in bytes of the bootloader SMM FV context data.
+ /// This data is provided to bootloader SMM drivers through a HOB by the FSP
MM Foundation.
+ ///
+ UINT16 BootloaderSmmFvContextDataLength;
+ UINT8 Reserved1[24];
+} FSPI_ARCH_UPD;
+
///
/// FSPT_UPD_COMMON Configuration.
///
@@ -393,6 +433,21 @@ typedef struct {
FSPS_ARCH2_UPDFspsArchUpd;
} FSPS_UPD_COMMON_FSP24;
+///
+/// FSPI_UPD_COMMON Configuration.
+///
+typedef struct {
+ ///
+ /// FSP_UPD_HEADER Configuration.
+ ///
+ FSP_UPD_HEADERFspUpdHeader;
+
+ ///
+ /// FSPI_ARCH_UPD Configuration.
+ ///
+ FSPI_ARCH_UPD FspiArchUpd;
+} FSPI_UPD_COMMON;
+
///
/// Enumeration of FSP_INIT_PHASE for NOTIFY_PHASE.
///
diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h
b/IntelFsp2Pkg/Include/FspGlobalData.h
index 697b20ed4c..cf94f7b6a5 100644
--- a/IntelFsp2Pkg/Include/FspGlobalData.h
+++ b/IntelFsp2Pkg/Include/FspGlobalData.h
@@ -12,7 +12,7 @@
#define FSP_IN_API_MODE 0
#define FSP_IN_DISPATCH_MODE 1
-#define FSP_GLOBAL_DATA_VERSION 1
+#define FSP_GLOBAL_DATA_VERSION 0x2
#pragma pack(1)
--
2.35.0.windows.1
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages
[edk2-devel] [PATCH v3] IntelFsp2Pkg: Add FSPI_ARCH_UPD.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
Adding the missing FSPI_ARCH_UPD, FSP_GLOBAL_DATA_VERSION bumpping up,
and some comments for clarification.
Also fixed a bug in SplitFspBin.py for FSP-I support.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Include/FspEas/FspApi.h | 71
---
IntelFsp2Pkg/Include/FspGlobalData.h | 2 +-
IntelFsp2Pkg/Include/Guid/FspHeaderFile.h | 21 +++--
IntelFsp2Pkg/Tools/SplitFspBin.py | 2 +-
4 files changed, 85 insertions(+), 11 deletions(-)
diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h
b/IntelFsp2Pkg/Include/FspEas/FspApi.h
index bf46f13f73..3f368574e8 100644
--- a/IntelFsp2Pkg/Include/FspEas/FspApi.h
+++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h
@@ -1,6 +1,6 @@
/** @file
Intel FSP API definition from Intel Firmware Support Package External
- Architecture Specification v2.0 - v2.2
+ Architecture Specification v2.0 and above.
Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -100,13 +100,14 @@ typedef struct {
/// "XX_T" for FSP-T
/// "XX_M" for FSP-M
/// "XX_S" for FSP-S
+ /// "XX_I" for FSP-I
/// Where XX is an unique signature
///
UINT64Signature;
///
/// Revision of the Data structure.
- /// For FSP spec 2.0/2.1 value is 1.
- /// For FSP spec 2.2 value is 2.
+ /// For FSP spec 2.0/2.1, this value is 1 and only FSPM_UPD having
ARCH_UPD.
+ /// For FSP spec 2.2 and above, this value is 2 and ARCH_UPD present in
all UPD structures.
///
UINT8 Revision;
UINT8 Reserved[23];
@@ -134,7 +135,7 @@ typedef struct {
} FSPT_ARCH_UPD;
///
-/// FSPT_ARCH2_UPD Configuration.
+/// FSPT_ARCH2_UPD Configuration for FSP 2.4 and above.
///
typedef struct {
///
@@ -196,7 +197,7 @@ typedef struct {
} FSPM_ARCH_UPD;
///
-/// FSPM_ARCH2_UPD Configuration.
+/// FSPM_ARCH2_UPD Configuration for FSP 2.4 and above.
///
typedef struct {
///
@@ -209,6 +210,13 @@ typedef struct {
///
UINT32 Length;
///
+ /// Pointer to the non-volatile storage (NVS) data buffer.
+ /// If it is NULL it indicates the NVS data is not available.
+ /// This value is deprecated starting with v2.4 of the FSP specification,
+ /// and will be removed in an upcoming version of the FSP specification.
+ ///
+ EFI_PHYSICAL_ADDRESSNvsBufferPtr;
+ ///
/// Pointer to the temporary stack base address to be
/// consumed inside FspMemoryInit() API.
///
@@ -232,7 +240,7 @@ typedef struct {
/// This value is only valid if Revision is >= 2.
///
EFI_PHYSICAL_ADDRESSFspEventHandler;
- UINT8 Reserved1[24];
+ UINT8 Reserved1[16];
} FSPM_ARCH2_UPD;
///
@@ -265,7 +273,7 @@ typedef struct {
} FSPS_ARCH_UPD;
///
-/// FSPS_ARCH2_UPD Configuration.
+/// FSPS_ARCH2_UPD Configuration for FSP 2.4 and above.
///
typedef struct {
///
@@ -285,6 +293,40 @@ typedef struct {
UINT8 Reserved1[16];
} FSPS_ARCH2_UPD;
+///
+/// FSPI_ARCH_UPD Configuration.
+///
+typedef struct {
+ ///
+ /// Revision of the structure is 1 for this version of the specification.
+ ///
+ UINT8 Revision;
+ UINT8 Reserved[3];
+ ///
+ /// Length of the structure in bytes. The current value for this field is 32.
+ ///
+ UINT32 Length;
+ ///
+ /// The physical memory-mapped base address of the bootloader SMM firmware
volume (FV).
+ ///
+ EFI_PHYSICAL_ADDRESSBootloaderSmmFvBaseAddress;
+ ///
+ /// The length in bytes of the bootloader SMM firmware volume (FV).
+ ///
+ UINT64 BootloaderSmmFvLength;
+ ///
+ /// The physical memory-mapped base address of the bootloader SMM FV context
data.
+ /// This data is provided to bootloader SMM drivers through a HOB by the FSP
MM Foundation.
+ ///
+ EFI_PHYSICAL_ADDRESSBootloaderSmmFvContextData;
+ ///
+ /// The length in bytes of the bootloader SMM FV context data.
+ /// This data is provided to bootloader SMM drivers through a HOB by the FSP
MM Foundation.
+ ///
+ UINT16 BootloaderSmmFvContextDataLength;
+ UINT8 Reserved1[24];
+} FSPI_ARCH_UPD;
+
///
/// FSPT_UPD_COMMON Configuration.
///
@@ -393,6 +435,21 @@ typedef struct {
FSPS_ARCH2_UPDFspsArchUpd;
} FSPS_UPD_COMMON_FSP24;
+///
+/// FSPI_UPD_COMMON Configuration.
+///
+typedef struct {
+ ///
+ /// FSP_UPD_HEADER Configuration.
+ ///
+ FSP_UPD_HEADERFspUpdHeader;
+
+ ///
+ /// FSPI_ARCH_UPD Configuration.
+ ///
+ FSPI_ARCH_UPD FspiArchUpd;
+} FSPI_UPD_COMMON;
+
///
/// Enumeration of FSP_INIT_PHASE for NOTIFY_PHASE.
///
diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h
b/IntelFsp2Pkg/Include/FspGlobalData.h
index 697b20ed4c..cf94f7b6a5 100644
---
Re: [edk2-devel] [PATCH] IntelFsp2Pkg: Add FSPI_ARCH_UPD.
Thanks Nate! I have sent V2 to add this comment, please review again.
> -Original Message-
> From: Desimone, Nathaniel L
> Sent: Wednesday, July 20, 2022 1:52 PM
> To: Chiu, Chasel ; devel@edk2.groups.io
> Cc: Zeng, Star
> Subject: RE: [PATCH] IntelFsp2Pkg: Add FSPI_ARCH_UPD.
>
> Hi Chasel,
>
> Please see feedback inline.
>
> Thanks,
> Nate
>
> > -Original Message-
> > From: Chiu, Chasel
> > Sent: Wednesday, July 20, 2022 12:02 PM
> > To: devel@edk2.groups.io
> > Cc: Chiu, Chasel ; Desimone, Nathaniel L
> > ; Zeng, Star
> > Subject: [PATCH] IntelFsp2Pkg: Add FSPI_ARCH_UPD.
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
> >
> > Adding the missing FSPI_ARCH_UPD, FSP_GLOBAL_DATA_VERSION bumpping
> up,
> > and some comments for clarification.
> >
> > Cc: Nate DeSimone
> > Cc: Star Zeng
> > Signed-off-by: Chasel Chiu
> > ---
> > IntelFsp2Pkg/Include/FspEas/FspApi.h | 69
> > ++--
> -
> > IntelFsp2Pkg/Include/FspGlobalData.h | 2 +-
> > 2 files changed, 63 insertions(+), 8 deletions(-)
> >
> > diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h
> > b/IntelFsp2Pkg/Include/FspEas/FspApi.h
> > index bf46f13f73..ad5d62c385 100644
> > --- a/IntelFsp2Pkg/Include/FspEas/FspApi.h
> > +++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h
> > @@ -1,6 +1,6 @@
> > /** @file
> >Intel FSP API definition from Intel Firmware Support Package
> > External
> > - Architecture Specification v2.0 - v2.2
> > + Architecture Specification v2.0 and above.
> >
> >Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.
> >SPDX-License-Identifier: BSD-2-Clause-Patent @@ -100,13 +100,14 @@
> > typedef struct {
> >/// "XX_T" for FSP-T
> >/// "XX_M" for FSP-M
> >/// "XX_S" for FSP-S
> > + /// "XX_I" for FSP-I
> >/// Where XX is an unique signature
> >///
> >UINT64Signature;
> >///
> >/// Revision of the Data structure.
> > - /// For FSP spec 2.0/2.1 value is 1.
> > - /// For FSP spec 2.2 value is 2.
> > + /// For FSP spec 2.0/2.1, this value is 1 and only FSPM_UPD having
> ARCH_UPD.
> > + /// For FSP spec 2.2 and above, this value is 2 and ARCH_UPD present
> > in all
> UPD structures.
> >///
> >UINT8 Revision;
> >UINT8 Reserved[23];
> > @@ -134,7 +135,7 @@ typedef struct {
> > } FSPT_ARCH_UPD;
> >
> > ///
> > -/// FSPT_ARCH2_UPD Configuration.
> > +/// FSPT_ARCH2_UPD Configuration for FSP 2.4 and above.
> > ///
> > typedef struct {
> >///
> > @@ -196,7 +197,7 @@ typedef struct {
> > } FSPM_ARCH_UPD;
> >
> > ///
> > -/// FSPM_ARCH2_UPD Configuration.
> > +/// FSPM_ARCH2_UPD Configuration for FSP 2.4 and above.
> > ///
> > typedef struct {
> >///
> > @@ -209,6 +210,11 @@ typedef struct {
> >///
> >UINT32 Length;
> >///
> > + /// Pointer to the non-volatile storage (NVS) data buffer.
> > + /// If it is NULL it indicates the NVS data is not available.
>
> Please add the following to this comment:
>
> This value is deprecated starting with v2.4 of the FSP specification and will
> be
> removed in an upcoming version of the FSP specification.
>
> > + ///
> > + EFI_PHYSICAL_ADDRESSNvsBufferPtr;
> > + ///
> >/// Pointer to the temporary stack base address to be
> >/// consumed inside FspMemoryInit() API.
> >///
> > @@ -232,7 +238,7 @@ typedef struct {
> >/// This value is only valid if Revision is >= 2.
> >///
> >EFI_PHYSICAL_ADDRESSFspEventHandler;
> > - UINT8 Reserved1[24];
> > + UINT8 Reserved1[16];
> > } FSPM_ARCH2_UPD;
> >
> > ///
> > @@ -265,7 +271,7 @@ typedef struct {
> > } FSPS_ARCH_UPD;
> >
> > ///
> > -/// FSPS_ARCH2_UPD Configuration.
> > +/// FSPS_ARCH2_UPD Configuration for FSP 2.4 and above.
> > ///
> > typedef struct {
> >///
> > @@ -285,6 +291,40 @@ typedef struct {
> >UINT8 Reserved1[16];
> > } FSPS_ARCH2_UPD;
> >
> > +///
> > +/// FSPI_ARCH_UPD Configuration.
> > +///
> > +typedef struct {
> > + ///
> > + /// Revision of the structure is 1 for this version of the spe
[edk2-devel] [PATCH v2] IntelFsp2Pkg: Add FSPI_ARCH_UPD.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
Adding the missing FSPI_ARCH_UPD, FSP_GLOBAL_DATA_VERSION bumpping up,
and some comments for clarification.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Include/FspEas/FspApi.h | 71
---
IntelFsp2Pkg/Include/FspGlobalData.h | 2 +-
2 files changed, 65 insertions(+), 8 deletions(-)
diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h
b/IntelFsp2Pkg/Include/FspEas/FspApi.h
index bf46f13f73..3f368574e8 100644
--- a/IntelFsp2Pkg/Include/FspEas/FspApi.h
+++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h
@@ -1,6 +1,6 @@
/** @file
Intel FSP API definition from Intel Firmware Support Package External
- Architecture Specification v2.0 - v2.2
+ Architecture Specification v2.0 and above.
Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -100,13 +100,14 @@ typedef struct {
/// "XX_T" for FSP-T
/// "XX_M" for FSP-M
/// "XX_S" for FSP-S
+ /// "XX_I" for FSP-I
/// Where XX is an unique signature
///
UINT64Signature;
///
/// Revision of the Data structure.
- /// For FSP spec 2.0/2.1 value is 1.
- /// For FSP spec 2.2 value is 2.
+ /// For FSP spec 2.0/2.1, this value is 1 and only FSPM_UPD having
ARCH_UPD.
+ /// For FSP spec 2.2 and above, this value is 2 and ARCH_UPD present in
all UPD structures.
///
UINT8 Revision;
UINT8 Reserved[23];
@@ -134,7 +135,7 @@ typedef struct {
} FSPT_ARCH_UPD;
///
-/// FSPT_ARCH2_UPD Configuration.
+/// FSPT_ARCH2_UPD Configuration for FSP 2.4 and above.
///
typedef struct {
///
@@ -196,7 +197,7 @@ typedef struct {
} FSPM_ARCH_UPD;
///
-/// FSPM_ARCH2_UPD Configuration.
+/// FSPM_ARCH2_UPD Configuration for FSP 2.4 and above.
///
typedef struct {
///
@@ -209,6 +210,13 @@ typedef struct {
///
UINT32 Length;
///
+ /// Pointer to the non-volatile storage (NVS) data buffer.
+ /// If it is NULL it indicates the NVS data is not available.
+ /// This value is deprecated starting with v2.4 of the FSP specification,
+ /// and will be removed in an upcoming version of the FSP specification.
+ ///
+ EFI_PHYSICAL_ADDRESSNvsBufferPtr;
+ ///
/// Pointer to the temporary stack base address to be
/// consumed inside FspMemoryInit() API.
///
@@ -232,7 +240,7 @@ typedef struct {
/// This value is only valid if Revision is >= 2.
///
EFI_PHYSICAL_ADDRESSFspEventHandler;
- UINT8 Reserved1[24];
+ UINT8 Reserved1[16];
} FSPM_ARCH2_UPD;
///
@@ -265,7 +273,7 @@ typedef struct {
} FSPS_ARCH_UPD;
///
-/// FSPS_ARCH2_UPD Configuration.
+/// FSPS_ARCH2_UPD Configuration for FSP 2.4 and above.
///
typedef struct {
///
@@ -285,6 +293,40 @@ typedef struct {
UINT8 Reserved1[16];
} FSPS_ARCH2_UPD;
+///
+/// FSPI_ARCH_UPD Configuration.
+///
+typedef struct {
+ ///
+ /// Revision of the structure is 1 for this version of the specification.
+ ///
+ UINT8 Revision;
+ UINT8 Reserved[3];
+ ///
+ /// Length of the structure in bytes. The current value for this field is 32.
+ ///
+ UINT32 Length;
+ ///
+ /// The physical memory-mapped base address of the bootloader SMM firmware
volume (FV).
+ ///
+ EFI_PHYSICAL_ADDRESSBootloaderSmmFvBaseAddress;
+ ///
+ /// The length in bytes of the bootloader SMM firmware volume (FV).
+ ///
+ UINT64 BootloaderSmmFvLength;
+ ///
+ /// The physical memory-mapped base address of the bootloader SMM FV context
data.
+ /// This data is provided to bootloader SMM drivers through a HOB by the FSP
MM Foundation.
+ ///
+ EFI_PHYSICAL_ADDRESSBootloaderSmmFvContextData;
+ ///
+ /// The length in bytes of the bootloader SMM FV context data.
+ /// This data is provided to bootloader SMM drivers through a HOB by the FSP
MM Foundation.
+ ///
+ UINT16 BootloaderSmmFvContextDataLength;
+ UINT8 Reserved1[24];
+} FSPI_ARCH_UPD;
+
///
/// FSPT_UPD_COMMON Configuration.
///
@@ -393,6 +435,21 @@ typedef struct {
FSPS_ARCH2_UPDFspsArchUpd;
} FSPS_UPD_COMMON_FSP24;
+///
+/// FSPI_UPD_COMMON Configuration.
+///
+typedef struct {
+ ///
+ /// FSP_UPD_HEADER Configuration.
+ ///
+ FSP_UPD_HEADERFspUpdHeader;
+
+ ///
+ /// FSPI_ARCH_UPD Configuration.
+ ///
+ FSPI_ARCH_UPD FspiArchUpd;
+} FSPI_UPD_COMMON;
+
///
/// Enumeration of FSP_INIT_PHASE for NOTIFY_PHASE.
///
diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h
b/IntelFsp2Pkg/Include/FspGlobalData.h
index 697b20ed4c..cf94f7b6a5 100644
--- a/IntelFsp2Pkg/Include/FspGlobalData.h
+++ b/IntelFsp2Pkg/Include/FspGlobalData.h
@@ -12,7 +12,7 @@
#define FSP_IN_API_MODE 0
#define FSP_IN_DISPATCH_MODE 1
-#define
Re: [edk2-devel] [PATCH] Maintainers.txt: Add IntelFsp2*Pkg Maintainer
Reviewed-by: Chasel Chiu Thanks, Chasel > -Original Message- > From: Desimone, Nathaniel L > Sent: Monday, July 18, 2022 1:28 PM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Andrew Fish ; Leif > Lindholm ; Kinney, Michael D > > Subject: [PATCH] Maintainers.txt: Add IntelFsp2*Pkg Maintainer > > Cc: Chasel Chiu > Cc: Andrew Fish > Cc: Leif Lindholm > Cc: Michael D Kinney > Signed-off-by: Nate DeSimone > --- > Maintainers.txt | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/Maintainers.txt b/Maintainers.txt index bc08ce1f15..7893c0d09f > 100644 > --- a/Maintainers.txt > +++ b/Maintainers.txt > @@ -218,14 +218,14 @@ IntelFsp2Pkg > F: IntelFsp2Pkg/ > W: https://github.com/tianocore/tianocore.github.io/wiki/IntelFsp2Pkg > M: Chasel Chiu [ChaselChiu] > -R: Nate DeSimone [nate-desimone] > +M: Nate DeSimone [nate-desimone] > R: Star Zeng [lzeng14] > > IntelFsp2WrapperPkg > F: IntelFsp2WrapperPkg/ > W: > https://github.com/tianocore/tianocore.github.io/wiki/IntelFsp2WrapperPkg > M: Chasel Chiu [ChaselChiu] > -R: Nate DeSimone [nate-desimone] > +M: Nate DeSimone [nate-desimone] > R: Star Zeng [lzeng14] > > MdeModulePkg > -- > 2.27.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#91478): https://edk2.groups.io/g/devel/message/91478 Mute This Topic: https://groups.io/mt/92468132/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH] IntelFsp2Pkg/FspSecCore: Add FSP-I API for SMM support.
Hi Nate,
Those whitespace and indents are for passing Uncrustify check.
I notice Uncrustify was enabled in Edk2 merging check and one of my previous
patch was failed due to spaces/indents were not agreed by Uncrustify, that's
why this time I run the Uncrustify offline before submitting the patch for
reviewing.
Wiki link:
https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Code-Formatting#recommended-usage-visual-studio-vs-code-plugin
I will fix ApiIdx issue and resend patch again.
Thanks,
Chasel
> -Original Message-
> From: Desimone, Nathaniel L
> Sent: Monday, July 18, 2022 2:41 PM
> To: Chiu, Chasel ; devel@edk2.groups.io
> Cc: Zhang, Hongbin1 ; Zeng, Star
>
> Subject: RE: [PATCH] IntelFsp2Pkg/FspSecCore: Add FSP-I API for SMM support.
>
> Hi Chasel,
>
> Please see comments inline. Here is a summary of my feedback:
>
> #1) IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm - line 34 - Bug: eax should
> be rax
> #2) IntelFsp2Pkg/Include/FspEas/FspApi.h - Various unnecessary whitespace
> changes that make the file look worse than before.
> #3) IntelFsp2Pkg/Include/Guid/FspHeaderFile.h - Why indent the #pragma lines?
>
> Thanks,
> Nate
>
> > -Original Message-
> > From: Chiu, Chasel
> > Sent: Thursday, July 14, 2022 1:04 PM
> > To: devel@edk2.groups.io
> > Cc: Zhang, Hongbin1 ; Desimone, Nathaniel L
> > ; Zeng, Star ;
> > Chiu, Chasel
> > Subject: [PATCH] IntelFsp2Pkg/FspSecCore: Add FSP-I API for SMM support.
> >
> > From: Hongbin1 Zhang
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
> > Add FSP-I API entry point for SMM support.
> >
> > Cc: Nate DeSimone
> > Cc: Star Zeng
> > Signed-off-by: Chasel Chiu
> > Signed-off-by: Hongbin1 Zhang
> > ---
> > IntelFsp2Pkg/FspSecCore/SecFspApiChk.c | 13 +
> > IntelFsp2Pkg/FspSecCore/FspSecCoreI.inf| 54
> ++
> > IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm | 44
> >
> > IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm | 44
>
> > IntelFsp2Pkg/Include/FspEas/FspApi.h | 57
> ++---
> > IntelFsp2Pkg/Include/FspGlobalData.h | 53
> -
> > IntelFsp2Pkg/Include/Guid/FspHeaderFile.h | 22 +++---
> > IntelFsp2Pkg/IntelFsp2Pkg.dsc | 1 +
> > IntelFsp2Pkg/Tools/GenCfgOpt.py| 26
> > --
> > IntelFsp2Pkg/Tools/SplitFspBin.py | 6 +++---
> > 10 files changed, 256 insertions(+), 64 deletions(-)
> >
> > diff --git a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
> > b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
> > index e22a88cc84..35d223a404 100644
> > --- a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
> > +++ b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
> > @@ -71,6 +71,19 @@ FspApiCallingCheck (
> > Status = EFI_INVALID_PARAMETER;
> >}
> > }
> > + } else if (ApiIdx == FspSmmInitApiIndex) {
> > +//
> > +// FspSmmInitApiIndex check
> > +//
> > +if ((FspData == NULL) || ((UINTN)FspData == MAX_ADDRESS) ||
> ((UINTN)FspData == MAX_UINT32)) {
> > + Status = EFI_UNSUPPORTED;
> > +} else {
> > + if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
> > +Status = EFI_UNSUPPORTED;
> > + } else if (EFI_ERROR (FspUpdSignatureCheck (FspSmmInitApiIndex,
> ApiParam))) {
> > +Status = EFI_INVALID_PARAMETER;
> > + }
> > +}
> >} else {
> > Status = EFI_UNSUPPORTED;
> >}
> > diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreI.inf
> > b/IntelFsp2Pkg/FspSecCore/FspSecCoreI.inf
> > new file mode 100644
> > index 00..d31576c00b
> > --- /dev/null
> > +++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreI.inf
> > @@ -0,0 +1,54 @@
> > +## @file
> > +# Sec Core for FSP
> > +#
> > +# Copyright (c) 2022, Intel Corporation. All rights reserved. #
> > +# SPDX-License-Identifier: BSD-2-Clause-Patent # ##
> > +
> > +[Defines]
> > + INF_VERSION= 0x00010005
> > + BASE_NAME = FspSecCoreI
> > + FILE_GUID = 558782b5-782d-415e-ab9e-0ceb79dc3425
> > + MODULE_TYPE= SEC
> > + VERSION_STRING = 1.0
> > +
> > +#
> > +# The following information is f
Re: [edk2-devel] [PATCH 0/2] MinPlatformPkg: FspResetType support for X64 build.
Thanks Nate! I have sent V2 accordingly, please help to review again. > -Original Message- > From: Desimone, Nathaniel L > Sent: Monday, July 18, 2022 4:53 PM > To: Chiu, Chasel ; devel@edk2.groups.io > Cc: Oram, Isaac W ; Gao, Liming > ; Dong, Eric > Subject: RE: [PATCH 0/2] MinPlatformPkg: FspResetType support for X64 build. > > Hi Chasel, > > Please change the function signature for CallFspWrapperResetSystem() to take a > EFI_STATUS as input. UINTN is certainly better than UINT32, but the actual > data > type defined in the FSP specification is EFI_STATUS. Also, that is the data > type > that FspmWrapperPeim.c and FspsWrapperPeim.c is passing in. Using > EFI_STATUS instead of UINTN would prevent us from having to do > CallFspWrapperResetSystem ((UINTN)Status); in those 2 files. > > Thanks, > Nate > > > -Original Message- > > From: Chiu, Chasel > > Sent: Monday, July 18, 2022 3:13 PM > > To: devel@edk2.groups.io > > Cc: Chiu, Chasel ; Desimone, Nathaniel L > > ; Oram, Isaac W > > ; Gao, Liming ; > > Dong, Eric > > Subject: [PATCH 0/2] MinPlatformPkg: FspResetType support for X64 build. > > > > FSP_STATUS_RESET_REQUIRED_* will be either 32bit or 64bit basing on > > the build and this patch series extended the support for 64bit build. > > > > Cc: Nate DeSimone > > Cc: Isaac Oram > > Cc: Liming Gao > > Cc: Eric Dong > > Signed-off-by: Chasel Chiu > > > > Chasel Chiu (2): > > MinPlatformPkg/FspWrapper: FspResetType support for X64 build. > > WhitleySiliconPkg: FspResetType support for X64 build. > > > > > > Platform/Intel/MinPlatformPkg/FspWrapper/Library/DxeFspWrapperPlatfor > > mLib/DxeFspWrapperPlatformResetLib.c | 4 ++-- > > Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperPlatfor > > mLib/PeiFspWrapperPlatformResetLib.c | 4 ++-- > > > > Silicon/Intel/WhitleySiliconPkg/Library/FspWrapperPlatformLib/FspWrapper > > PlatformLib.c | 4 ++-- > > 3 files changed, 6 insertions(+), 6 deletions(-) > > > > -- > > 2.35.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#91507): https://edk2.groups.io/g/devel/message/91507 Mute This Topic: https://groups.io/mt/92470479/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 0/2] MinPlatformPkg: FspResetType support for X64 build.
FSP_STATUS_RESET_REQUIRED_* will be either 32bit or 64bit basing on the build and this patch series extended the support for 64bit build. Cc: Nate DeSimone Cc: Isaac Oram Cc: Liming Gao Cc: Eric Dong Signed-off-by: Chasel Chiu Chasel Chiu (2): MinPlatformPkg/FspWrapper: FspResetType support for X64 build. WhitleySiliconPkg: FspResetType support for X64 build. Platform/Intel/MinPlatformPkg/FspWrapper/Library/DxeFspWrapperPlatformLib/DxeFspWrapperPlatformResetLib.c | 4 ++-- Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformResetLib.c | 4 ++-- Silicon/Intel/WhitleySiliconPkg/Library/FspWrapperPlatformLib/FspWrapperPlatformLib.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) -- 2.35.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#91488): https://edk2.groups.io/g/devel/message/91488 Mute This Topic: https://groups.io/mt/92470479/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 1/2] MinPlatformPkg/FspWrapper: FspResetType support for X64 build.
FSP_STATUS_RESET_REQUIRED_* will be either 32bit or 64bit basing
on the build and this patch extended the support for 64bit build.
Cc: Nate DeSimone
Cc: Isaac Oram
Cc: Liming Gao
Cc: Eric Dong
Signed-off-by: Chasel Chiu
---
Platform/Intel/MinPlatformPkg/FspWrapper/Library/DxeFspWrapperPlatformLib/DxeFspWrapperPlatformResetLib.c
| 4 ++--
Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformResetLib.c
| 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/DxeFspWrapperPlatformLib/DxeFspWrapperPlatformResetLib.c
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/DxeFspWrapperPlatformLib/DxeFspWrapperPlatformResetLib.c
index b4d509db85..e5e09eb762 100644
---
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/DxeFspWrapperPlatformLib/DxeFspWrapperPlatformResetLib.c
+++
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/DxeFspWrapperPlatformLib/DxeFspWrapperPlatformResetLib.c
@@ -1,7 +1,7 @@
/** @file
Dxe library function to reset the system from FSP wrapper.
-Copyright (c) 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -22,7 +22,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
VOID
EFIAPI
CallFspWrapperResetSystem (
- UINT32ResetType
+ UINTNResetType
)
{
EFI_RESET_TYPE EfiResetType;
diff --git
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformResetLib.c
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformResetLib.c
index 191bcb2fbb..75fd5a6ea2 100644
---
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformResetLib.c
+++
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformResetLib.c
@@ -1,7 +1,7 @@
/** @file
Pei library function to reset the system from FSP wrapper.
-Copyright (c) 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -21,7 +21,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
VOID
EFIAPI
CallFspWrapperResetSystem (
- UINT32ResetType
+ UINTNResetType
)
{
EFI_RESET_TYPE EfiResetType;
--
2.35.0.windows.1
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[edk2-devel] [PATCH 2/2] WhitleySiliconPkg: FspResetType support for X64 build.
FSP_STATUS_RESET_REQUIRED_* will be either 32bit or 64bit basing
on the build and this patch extended the support for 64bit build.
Cc: Isaac Oram
Cc: Nate DeSimone
Signed-off-by: Chasel Chiu
---
Silicon/Intel/WhitleySiliconPkg/Library/FspWrapperPlatformLib/FspWrapperPlatformLib.c
| 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
a/Silicon/Intel/WhitleySiliconPkg/Library/FspWrapperPlatformLib/FspWrapperPlatformLib.c
b/Silicon/Intel/WhitleySiliconPkg/Library/FspWrapperPlatformLib/FspWrapperPlatformLib.c
index 95a1f2a33c..94b98ef2df 100644
---
a/Silicon/Intel/WhitleySiliconPkg/Library/FspWrapperPlatformLib/FspWrapperPlatformLib.c
+++
b/Silicon/Intel/WhitleySiliconPkg/Library/FspWrapperPlatformLib/FspWrapperPlatformLib.c
@@ -2,7 +2,7 @@
Sample to provide FSP wrapper related function.
@copyright
- Copyright 2014 - 2021 Intel Corporation.
+ Copyright 2014 - 2022 Intel Corporation.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -190,7 +190,7 @@ GetS3MemoryInfo (
VOID
EFIAPI
CallFspWrapperResetSystem (
- IN UINT32FspStatusResetType
+ IN UINTNFspStatusResetType
)
{
//
--
2.35.0.windows.1
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[edk2-devel] [PATCH v2 2/2] WhitleySiliconPkg: FspResetType support for X64 build.
FSP_STATUS_RESET_REQUIRED_* will be either 32bit or 64bit basing
on the build and this patch extended the support for 64bit build.
Cc: Isaac Oram
Cc: Nate DeSimone
Signed-off-by: Chasel Chiu
---
Silicon/Intel/WhitleySiliconPkg/Library/FspWrapperPlatformLib/FspWrapperPlatformLib.c
| 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/Silicon/Intel/WhitleySiliconPkg/Library/FspWrapperPlatformLib/FspWrapperPlatformLib.c
b/Silicon/Intel/WhitleySiliconPkg/Library/FspWrapperPlatformLib/FspWrapperPlatformLib.c
index 95a1f2a33c..e61e8178ed 100644
---
a/Silicon/Intel/WhitleySiliconPkg/Library/FspWrapperPlatformLib/FspWrapperPlatformLib.c
+++
b/Silicon/Intel/WhitleySiliconPkg/Library/FspWrapperPlatformLib/FspWrapperPlatformLib.c
@@ -190,7 +190,7 @@ GetS3MemoryInfo (
VOID
EFIAPI
CallFspWrapperResetSystem (
- IN UINT32FspStatusResetType
+ IN EFI_STATUSFspStatusResetType
)
{
//
--
2.35.0.windows.1
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[edk2-devel] [PATCH v2 1/2] MinPlatformPkg/FspWrapper: FspResetType support for X64 build.
FSP_STATUS_RESET_REQUIRED_* will be either 32bit or 64bit basing
on the build and this patch extended the support for 64bit build.
Cc: Nate DeSimone
Cc: Isaac Oram
Cc: Liming Gao
Cc: Eric Dong
Signed-off-by: Chasel Chiu
---
Platform/Intel/MinPlatformPkg/FspWrapper/Library/DxeFspWrapperPlatformLib/DxeFspWrapperPlatformResetLib.c
| 2 +-
Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformResetLib.c
| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/DxeFspWrapperPlatformLib/DxeFspWrapperPlatformResetLib.c
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/DxeFspWrapperPlatformLib/DxeFspWrapperPlatformResetLib.c
index b4d509db85..832027d3ee 100644
---
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/DxeFspWrapperPlatformLib/DxeFspWrapperPlatformResetLib.c
+++
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/DxeFspWrapperPlatformLib/DxeFspWrapperPlatformResetLib.c
@@ -22,7 +22,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
VOID
EFIAPI
CallFspWrapperResetSystem (
- UINT32ResetType
+ EFI_STATUSResetType
)
{
EFI_RESET_TYPE EfiResetType;
diff --git
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformResetLib.c
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformResetLib.c
index 191bcb2fbb..2f6f7d058c 100644
---
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformResetLib.c
+++
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformResetLib.c
@@ -21,7 +21,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
VOID
EFIAPI
CallFspWrapperResetSystem (
- UINT32ResetType
+ EFI_STATUSResetType
)
{
EFI_RESET_TYPE EfiResetType;
--
2.35.0.windows.1
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[edk2-devel] [PATCH v2 0/2] MinPlatformPkg: FspResetType support for X64 build.
FSP_STATUS_RESET_REQUIRED_* will be either 32bit or 64bit basing on the build and this patch series extended the support for 64bit build. Cc: Nate DeSimone Cc: Isaac Oram Cc: Liming Gao Cc: Eric Dong Signed-off-by: Chasel Chiu V2: Change ResetType from UINTN to EFI_STATUS Chasel Chiu (2): MinPlatformPkg/FspWrapper: FspResetType support for X64 build. WhitleySiliconPkg: FspResetType support for X64 build. Platform/Intel/MinPlatformPkg/FspWrapper/Library/DxeFspWrapperPlatformLib/DxeFspWrapperPlatformResetLib.c | 2 +- Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformResetLib.c | 2 +- Silicon/Intel/WhitleySiliconPkg/Library/FspWrapperPlatformLib/FspWrapperPlatformLib.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) -- 2.35.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#91504): https://edk2.groups.io/g/devel/message/91504 Mute This Topic: https://groups.io/mt/92473321/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH V1] IntelFsp2Pkg: Add Definition of EDKII_PEI_VARIABLE_PPI
Reviewed-by: Chasel Chiu
Thanks,
Chasel
> -Original Message-
> From: Desimone, Nathaniel L
> Sent: Monday, July 18, 2022 1:17 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel
> Subject: [PATCH V1] IntelFsp2Pkg: Add Definition of EDKII_PEI_VARIABLE_PPI
>
> Adds definition of EDKII_PEI_VARIABLE_PPI.
>
> Cc: Chasel Chiu
> Signed-off-by: Nate DeSimone
> ---
> IntelFsp2Pkg/Include/Ppi/Variable.h | 195
> IntelFsp2Pkg/IntelFsp2Pkg.dec | 8 +-
> 2 files changed, 202 insertions(+), 1 deletion(-) create mode 100644
> IntelFsp2Pkg/Include/Ppi/Variable.h
>
> diff --git a/IntelFsp2Pkg/Include/Ppi/Variable.h
> b/IntelFsp2Pkg/Include/Ppi/Variable.h
> new file mode 100644
> index 00..3e1f4b98a9
> --- /dev/null
> +++ b/IntelFsp2Pkg/Include/Ppi/Variable.h
> @@ -0,0 +1,195 @@
> +/** @file
> + EDKII PEI Variable PPI provides an implementation of variables
> + intended for use as a means to store data in the PEI environment.
> +
> + Copyright (c) 2022, Intel Corporation. All rights reserved.
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef EDKII_PEI_VARIABLE_PPI_H_
> +#define EDKII_PEI_VARIABLE_PPI_H_
> +
> +#define EDKII_PEI_VARIABLE_PPI_GUID \
> + { \
> +0xe7b2cd04, 0x4b14, 0x44c2, { 0xb7, 0x48, 0xce, 0xaf, 0x2b, 0x66,
> +0x4a, 0xb0 } \
> + }
> +
> +typedef struct _EDKII_PEI_VARIABLE_PPI EDKII_PEI_VARIABLE_PPI;
> +
> +/**
> + This service retrieves a variable's value using its name and GUID.
> +
> + Read the specified variable from the UEFI variable store. If the Data
> + buffer is too small to hold the contents of the variable, the error
> + EFI_BUFFER_TOO_SMALL is returned and DataSize is set to the required
> + buffer size to obtain the data.
> +
> + @param[in]This A pointer to this instance of the
> EDKII_PEI_VARIABLE_PPI.
> + @param[in]VariableName A pointer to a null-terminated string
> that is
> the variable's name.
> + @param[in]VariableGuid A pointer to an EFI_GUID that is the
> variable's
> GUID. The combination of
> + VariableGuid and VariableName must be
> unique.
> + @param[out] AttributesIf non-NULL, on return, points to the
> variable's attributes.
> + @param[in, out] DataSize On entry, points to the size in bytes
> of the
> Data buffer.
> + On return, points to the size of the
> data returned in Data.
> + @param[out] Data Points to the buffer which will hold
> the returned
> variable value.
> + May be NULL with a zero DataSize in
> order to determine
> the size of the
> + buffer needed.
> +
> + @retval EFI_SUCCESS The variable was read successfully.
> + @retval EFI_NOT_FOUND The variable was not found.
> + @retval EFI_BUFFER_TOO_SMALLThe DataSize is too small for the
> resulting data.
> + DataSize is updated with the size
> required for
> + the specified variable.
> + @retval EFI_INVALID_PARAMETER VariableName, VariableGuid, DataSize
> or Data is NULL.
> + @retval EFI_DEVICE_ERRORThe variable could not be retrieved
> because of a device error.
> +
> +**/
> +typedef
> +EFI_STATUS
> +(EFIAPI *EDKII_PEI_GET_VARIABLE)(
> + IN CONST EDKII_PEI_VARIABLE_PPI*This,
> + IN CONST CHAR16*VariableName,
> + IN CONST EFI_GUID *VariableGuid,
> + OUT UINT32*Attributes OPTIONAL,
> + IN OUTUINTN *DataSize,
> + OUT VOID *Data OPTIONAL
> + );
> +
> +/**
> + Return the next variable name and GUID.
> +
> + This function is called multiple times to retrieve the VariableName
> + and VariableGuid of all variables currently available in the system.
> + On each call, the previous results are passed into the interface,
> + and, on return, the interface returns the data for the next variable.
> + To get started, VariableName should initially contain L"\0"
> + and VariableNameSize should be sizeof(CHAR16). When the entire
> + variable list has been returned, EFI_NOT_FOUND is returned.
> +
> + @param[in]This A pointer to this instance of the
> EDKII_PEI_VARIABLE_PPI.
> + @param[in, out] VariableNameSize On entry, points to the size of the
> buffer
> pointed to by VariableName.
> + On
[edk2-devel] [PATCH 1/2] IntelFsp2Pkg: Support 64bit FspResetType for X64 build.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3999
FspResetType will be either 32bit or 64 bit basing on
the build type.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Library/BaseFspCommonLib/FspCommonLib.c | 10 +-
IntelFsp2Pkg/Include/FspEas/FspApi.h | 61
+
IntelFsp2Pkg/Include/Library/FspCommonLib.h | 2 +-
IntelFsp2Pkg/Include/Library/FspSwitchStackLib.h | 4 ++--
4 files changed, 41 insertions(+), 36 deletions(-)
diff --git a/IntelFsp2Pkg/Library/BaseFspCommonLib/FspCommonLib.c
b/IntelFsp2Pkg/Library/BaseFspCommonLib/FspCommonLib.c
index 67e08a9e7e..a22b0e7825 100644
--- a/IntelFsp2Pkg/Library/BaseFspCommonLib/FspCommonLib.c
+++ b/IntelFsp2Pkg/Library/BaseFspCommonLib/FspCommonLib.c
@@ -200,13 +200,13 @@ SetFspCoreStackPointer (
UINT32 StackContextLen;
FspData = GetFspGlobalDataPointer ();
- StackContextLen = sizeof(CONTEXT_STACK) / sizeof(UINTN);
+ StackContextLen = sizeof (CONTEXT_STACK) / sizeof (UINTN);
//
// Reserve space for the ContinuationFunc two parameters
//
- OldStack = (UINTN *)FspData->CoreStack;
- NewStack = (UINTN *)NewStackTop - StackContextLen - 2;
+ OldStack = (UINTN *)FspData->CoreStack;
+ NewStack = (UINTN *)NewStackTop - StackContextLen - 2;
FspData->CoreStack = (UINTN)NewStack;
while (StackContextLen-- != 0) {
*NewStack++ = *OldStack++;
@@ -533,7 +533,7 @@ SetPhaseStatusCode (
VOID
EFIAPI
FspApiReturnStatusReset (
- IN UINT32 FspResetType
+ IN EFI_STATUS FspResetType
)
{
volatile BOOLEAN LoopUntilReset;
@@ -546,7 +546,7 @@ FspApiReturnStatusReset (
/// calls the FSP API without honoring the reset request by FSP
///
do {
- SetFspApiReturnStatus ((EFI_STATUS)FspResetType);
+ SetFspApiReturnStatus (FspResetType);
Pei2LoaderSwitchStack ();
DEBUG ((DEBUG_ERROR, "!!!ERROR: FSP has requested BootLoader for reset.
But BootLoader has not honored the reset\n"));
DEBUG ((DEBUG_ERROR, "!!!ERROR: Please add support in BootLoader to
honor the reset request from FSP\n"));
diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h
b/IntelFsp2Pkg/Include/FspEas/FspApi.h
index b36bc2b9ae..5e47f475db 100644
--- a/IntelFsp2Pkg/Include/FspEas/FspApi.h
+++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h
@@ -11,19 +11,24 @@
#define _FSP_API_H_
#include
+#include
///
/// FSP Reset Status code
-/// These are defined in FSP EAS v2.0 section 11.2.2 - OEM Status Code
+/// These are defined in FSP EAS v2.4 section 13.2.2 - OEM Status Code
/// @{
-#define FSP_STATUS_RESET_REQUIRED_COLD 0x4001
-#define FSP_STATUS_RESET_REQUIRED_WARM 0x4002
-#define FSP_STATUS_RESET_REQUIRED_3 0x4003
-#define FSP_STATUS_RESET_REQUIRED_4 0x4004
-#define FSP_STATUS_RESET_REQUIRED_5 0x4005
-#define FSP_STATUS_RESET_REQUIRED_6 0x4006
-#define FSP_STATUS_RESET_REQUIRED_7 0x4007
-#define FSP_STATUS_RESET_REQUIRED_8 0x4008
+
+#define ENCODE_RESET_REQUEST(ResetType) \
+((EFI_STATUS)((MAX_BIT >> 1) | (ResetType)))
+#define FSP_STATUS_RESET_REQUIRED_COLD ENCODE_RESET_REQUEST(1)
+#define FSP_STATUS_RESET_REQUIRED_WARM ENCODE_RESET_REQUEST(2)
+#define FSP_STATUS_RESET_REQUIRED_3 ENCODE_RESET_REQUEST(3)
+#define FSP_STATUS_RESET_REQUIRED_4 ENCODE_RESET_REQUEST(4)
+#define FSP_STATUS_RESET_REQUIRED_5 ENCODE_RESET_REQUEST(5)
+#define FSP_STATUS_RESET_REQUIRED_6 ENCODE_RESET_REQUEST(6)
+#define FSP_STATUS_RESET_REQUIRED_7 ENCODE_RESET_REQUEST(7)
+#define FSP_STATUS_RESET_REQUIRED_8 ENCODE_RESET_REQUEST(8)
+#define FSP_STATUS_VARIABLE_REQUEST ENCODE_RESET_REQUEST(10)
/// @}
///
@@ -135,18 +140,18 @@ typedef struct {
///
/// Revision of the structure is 2 for this version of the specification.
///
- UINT8Revision;
- UINT8Reserved[3];
+ UINT8 Revision;
+ UINT8 Reserved[3];
///
/// Length of the structure in bytes. The current value for this field is 32.
///
- UINT32 Length;
+ UINT32 Length;
///
/// FspDebugHandler Optional debug handler for the bootloader to receive
debug messages
/// occurring during FSP execution.
///
- EFI_PHYSICAL_ADDRESS FspDebugHandler;
- UINT8Reserved1[16];
+ EFI_PHYSICAL_ADDRESSFspDebugHandler;
+ UINT8 Reserved1[16];
} FSPT_ARCH2_UPD;
///
@@ -197,37 +202,37 @@ typedef struct {
///
/// Revision of the structure is 3 for this version of the specification.
///
- UINT8Revision;
- UINT8Reserved[3];
+ UINT8 Revision;
+ UINT8 Reserved[3];
///
/// Length of the structure in bytes. The current value for this field is 64.
///
- UINT32 Length;
+ UINT32 Length;
[edk2-devel] [PATCH 0/2] Support 64bit FspResetType in X64 build.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3999 FspResetType will be either 32bit or 64 bit basing on the build type Cc: Nate DeSimone Cc: Star Zeng Signed-off-by: Chasel Chiu Chasel Chiu (2): IntelFsp2Pkg: Support 64bit FspResetType for X64 build. IntelFsp2WrapperPkg: Support 64bit FspResetType for X64 build. IntelFsp2Pkg/Library/BaseFspCommonLib/FspCommonLib.c | 10 +- IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c | 6 +++--- IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c | 10 +- IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c | 15 +++ IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/DispatchExecute.c | 5 - IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c | 2 +- IntelFsp2Pkg/Include/FspEas/FspApi.h | 61 + IntelFsp2Pkg/Include/Library/FspCommonLib.h | 2 +- IntelFsp2Pkg/Include/Library/FspSwitchStackLib.h | 4 ++-- IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h | 2 +- 10 files changed, 62 insertions(+), 55 deletions(-) -- 2.35.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#91517): https://edk2.groups.io/g/devel/message/91517 Mute This Topic: https://groups.io/mt/92476842/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 2/2] IntelFsp2WrapperPkg: Support 64bit FspResetType for X64 build.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3999
FspResetType will be either 32bit or 64 bit basing on
the build type.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
| 6 +++---
IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
| 10 +-
IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
| 15 +++
IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/DispatchExecute.c
| 5 -
IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c
| 2 +-
IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h
| 2 +-
6 files changed, 21 insertions(+), 19 deletions(-)
diff --git a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
index 21385ac0b2..7aa2c93e99 100644
--- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
+++ b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
@@ -97,7 +97,7 @@ OnPciEnumerationComplete (
//
if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <=
FSP_STATUS_RESET_REQUIRED_8)) {
DEBUG ((DEBUG_INFO, "FSP NotifyPhase AfterPciEnumeration requested reset
0x%x\n", Status));
-CallFspWrapperResetSystem ((UINT32)Status);
+CallFspWrapperResetSystem (Status);
}
if (Status != EFI_SUCCESS) {
@@ -140,7 +140,7 @@ OnReadyToBoot (
//
if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <=
FSP_STATUS_RESET_REQUIRED_8)) {
DEBUG ((DEBUG_INFO, "FSP NotifyPhase ReadyToBoot requested reset 0x%x\n",
Status));
-CallFspWrapperResetSystem ((UINT32)Status);
+CallFspWrapperResetSystem (Status);
}
if (Status != EFI_SUCCESS) {
@@ -184,7 +184,7 @@ OnEndOfFirmware (
//
if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <=
FSP_STATUS_RESET_REQUIRED_8)) {
DEBUG ((DEBUG_INFO, "FSP NotifyPhase EndOfFirmware requested reset
0x%x\n", Status));
-CallFspWrapperResetSystem ((UINT32)Status);
+CallFspWrapperResetSystem (Status);
}
if (Status != EFI_SUCCESS) {
diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
index 047c2965a3..ac27524d08 100644
--- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
+++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
@@ -43,16 +43,15 @@ extern EFI_GUID gFspHobGuid;
@return FSP-M UPD Data Address
**/
-
UINTN
GetFspmUpdDataAddress (
VOID
)
{
if (PcdGet64 (PcdFspmUpdDataAddress64) != 0) {
-return (UINTN) PcdGet64 (PcdFspmUpdDataAddress64);
+return (UINTN)PcdGet64 (PcdFspmUpdDataAddress64);
} else {
-return (UINTN) PcdGet32 (PcdFspmUpdDataAddress);
+return (UINTN)PcdGet32 (PcdFspmUpdDataAddress);
}
}
@@ -97,7 +96,7 @@ PeiFspMemoryInit (
//
// External UPD is ready, get the buffer from PCD pointer.
//
-FspmUpdDataPtr = (VOID *) GetFspmUpdDataAddress();
+FspmUpdDataPtr = (VOID *)GetFspmUpdDataAddress ();
ASSERT (FspmUpdDataPtr != NULL);
}
@@ -115,6 +114,7 @@ PeiFspMemoryInit (
DEBUG ((DEBUG_INFO, " BootLoaderTolumSize - 0x%x\n", ((FSPM_UPD_COMMON
*)FspmUpdDataPtr)->FspmArchUpd.BootLoaderTolumSize));
DEBUG ((DEBUG_INFO, " BootMode- 0x%x\n", ((FSPM_UPD_COMMON
*)FspmUpdDataPtr)->FspmArchUpd.BootMode));
}
+
DEBUG ((DEBUG_INFO, " HobListPtr - 0x%x\n", ));
TimeStampCounterStart = AsmReadTsc ();
@@ -129,7 +129,7 @@ PeiFspMemoryInit (
//
if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <=
FSP_STATUS_RESET_REQUIRED_8)) {
DEBUG ((DEBUG_INFO, "FspMemoryInitApi requested reset 0x%x\n", Status));
-CallFspWrapperResetSystem ((UINT32)Status);
+CallFspWrapperResetSystem (Status);
}
if (EFI_ERROR (Status)) {
diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
index fadadd40e6..ee48dd69d3 100644
--- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
+++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
@@ -96,7 +96,7 @@ S3EndOfPeiNotify (
//
if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <=
FSP_STATUS_RESET_REQUIRED_8)) {
DEBUG ((DEBUG_INFO, "FSP S3NotifyPhase AfterPciEnumeration requested reset
0x%x\n", Status));
-CallFspWrapperResetSystem ((UINT32)Status);
+CallFspWrapperResetSystem (Status);
}
NotifyPhaseParams.Phase = EnumInitPhaseReadyToBoot;
@@ -108,7 +108,7 @@ S3EndOfPeiNotify (
//
if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <=
FSP_STATUS_RESET_REQUIRED_8)) {
DEBUG ((DEBUG_INFO, "FSP S3NotifyPhase ReadyToBoot requested reset
0x%x\n", Status));
-CallFspWrapperResetSystem ((UINT32)Status);
+
Re: [edk2-devel][PATCH v2 0/2] Update SEC_IDT_TABLE struct to reserve sufficient size in IdtTable for both IA32 and X64
This series has been merged: https://github.com/tianocore/edk2/commit/9ab389c01b875869c6173557aa053d397aaf14f1 https://github.com/tianocore/edk2/commit/470206ba7f118aaa1153d66689cf3ee4d17051b7 Thanks, Chasel > -Original Message- > From: devel@edk2.groups.io On Behalf Of Kuo, Ted > Sent: Tuesday, July 12, 2022 2:31 AM > To: devel@edk2.groups.io > Subject: [edk2-devel][PATCH v2 0/2] Update SEC_IDT_TABLE struct to reserve > sufficient size in IdtTable for both IA32 and X64 > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3957 > The reserved IDT table size in SecCore is too small for X64. Changed the type > of > IdtTable in SEC_IDT_TABLE from UINT64 to IA32_IDT_GATE_DESCRIPTOR to > have sufficient size reserved in IdtTable for X64. > > Ted Kuo (2): > UefiCpuPkg: Update SEC_IDT_TABLE struct > IntelFsp2Pkg: Update SEC_IDT_TABLE struct > > IntelFsp2Pkg/FspSecCore/SecFsp.c | 9 + > IntelFsp2Pkg/FspSecCore/SecFsp.h | 2 +- IntelFsp2Pkg/FspSecCore/SecMain.c > | 16 IntelFsp2Pkg/FspSecCore/SecMain.h | 4 ++-- > UefiCpuPkg/SecCore/SecMain.c | 1 + > UefiCpuPkg/SecCore/SecMain.h | 4 ++-- > 6 files changed, 19 insertions(+), 17 deletions(-) > > -- > 2.35.3.windows.1 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#91382): https://edk2.groups.io/g/devel/message/91382 Mute This Topic: https://groups.io/mt/92329471/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH] IntelFsp2Pkg/FspSecCore: Add FSP-I API for SMM support.
From: Hongbin1 Zhang
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
Add FSP-I API entry point for SMM support.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
Signed-off-by: Hongbin1 Zhang
---
IntelFsp2Pkg/FspSecCore/SecFspApiChk.c | 13 +
IntelFsp2Pkg/FspSecCore/FspSecCoreI.inf| 54
++
IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm | 44
IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm | 44
IntelFsp2Pkg/Include/FspEas/FspApi.h | 57
++---
IntelFsp2Pkg/Include/FspGlobalData.h | 53
-
IntelFsp2Pkg/Include/Guid/FspHeaderFile.h | 22 +++---
IntelFsp2Pkg/IntelFsp2Pkg.dsc | 1 +
IntelFsp2Pkg/Tools/GenCfgOpt.py| 26 --
IntelFsp2Pkg/Tools/SplitFspBin.py | 6 +++---
10 files changed, 256 insertions(+), 64 deletions(-)
diff --git a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
index e22a88cc84..35d223a404 100644
--- a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
+++ b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
@@ -71,6 +71,19 @@ FspApiCallingCheck (
Status = EFI_INVALID_PARAMETER;
}
}
+ } else if (ApiIdx == FspSmmInitApiIndex) {
+//
+// FspSmmInitApiIndex check
+//
+if ((FspData == NULL) || ((UINTN)FspData == MAX_ADDRESS) ||
((UINTN)FspData == MAX_UINT32)) {
+ Status = EFI_UNSUPPORTED;
+} else {
+ if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
+Status = EFI_UNSUPPORTED;
+ } else if (EFI_ERROR (FspUpdSignatureCheck (FspSmmInitApiIndex,
ApiParam))) {
+Status = EFI_INVALID_PARAMETER;
+ }
+}
} else {
Status = EFI_UNSUPPORTED;
}
diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreI.inf
b/IntelFsp2Pkg/FspSecCore/FspSecCoreI.inf
new file mode 100644
index 00..d31576c00b
--- /dev/null
+++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreI.inf
@@ -0,0 +1,54 @@
+## @file
+# Sec Core for FSP
+#
+# Copyright (c) 2022, Intel Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION= 0x00010005
+ BASE_NAME = FspSecCoreI
+ FILE_GUID = 558782b5-782d-415e-ab9e-0ceb79dc3425
+ MODULE_TYPE= SEC
+ VERSION_STRING = 1.0
+
+#
+# The following information is for reference only and not required by the
build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[Sources]
+ SecFspApiChk.c
+ SecFsp.h
+
+[Sources.X64]
+ X64/FspApiEntryI.nasm
+ X64/FspApiEntryCommon.nasm
+ X64/FspHelper.nasm
+
+[Sources.IA32]
+ Ia32/FspApiEntryI.nasm
+ Ia32/FspApiEntryCommon.nasm
+ Ia32/FspHelper.nasm
+
+[Binaries.Ia32]
+ RAW|Vtf0/Bin/ResetVec.ia32.raw |GCC
+
+[Packages]
+ MdePkg/MdePkg.dec
+ IntelFsp2Pkg/IntelFsp2Pkg.dec
+
+[LibraryClasses]
+ BaseMemoryLib
+ DebugLib
+ BaseLib
+ PciCf8Lib
+ SerialPortLib
+ FspSwitchStackLib
+ FspCommonLib
+ FspSecPlatformLib
+
+
diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm
b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm
new file mode 100644
index 00..e9365d6832
--- /dev/null
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm
@@ -0,0 +1,44 @@
+;; @file
+; Provide FSP API entry points.
+;
+; Copyright (c) 2022, Intel Corporation. All rights reserved.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;;
+
+SECTION .text
+
+;
+; Following functions will be provided in C
+;
+extern ASM_PFX(FspApiCommon)
+
+;
+; FspApiCommonContinue API
+;
+; This is the FSP API common entry point to resume the FSP execution
+;
+;
+global ASM_PFX(FspApiCommonContinue)
+ASM_PFX(FspApiCommonContinue):
+ jmp $
+
+;
+; FspSmmInit API
+;
+; This FSP API will notify the FSP about the different phases in the boot
+; process
+;
+;
+global ASM_PFX(FspSmmInitApi)
+ASM_PFX(FspSmmInitApi):
+ moveax, 7 ; FSP_API_INDEX.FspSmmInitApiIndex
+ jmpASM_PFX(FspApiCommon)
+
+;
+; Module Entrypoint API
+;
+global ASM_PFX(_ModuleEntryPoint)
+ASM_PFX(_ModuleEntryPoint):
+ jmp $
+ ; Add reference to APIs so that it will not be optimized by compiler
+ jmp ASM_PFX(FspSmmInitApi)
diff --git a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm
[edk2-devel] [PATCH] IntelFsp2Pkg: Fix GenCfgOpt bug for FSPI_UPD support.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
Fixed a logic bug in GenCfgOpt.py to skip FSPI_UPD when platforms
do not support.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Tools/GenCfgOpt.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py b/IntelFsp2Pkg/Tools/GenCfgOpt.py
index 71c48f10e0..13be81ddbc 100644
--- a/IntelFsp2Pkg/Tools/GenCfgOpt.py
+++ b/IntelFsp2Pkg/Tools/GenCfgOpt.py
@@ -1301,7 +1301,7 @@ EndList
elif '_S' in SignatureStr[6:6+2]:
TxtBody.append("#define FSPS_UPD_SIGNATURE %s
/* '%s' */\n\n" % (Item['value'], SignatureStr))
elif '_I' in SignatureStr[6:6+2]:
- if NoFSPI == True:
+ if NoFSPI == False:
TxtBody.append("#define FSPI_UPD_SIGNATURE
%s/* '%s' */\n\n" % (Item['value'], SignatureStr))
TxtBody.append("\n")
--
2.35.0.windows.1
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Re: [edk2-devel] [PATCH] IntelFsp2Pkg: Fix GenCfgOpt bug for FSPI_UPD support.
Patch merged:
https://github.com/tianocore/edk2/commit/0d0bfcb4571caa65b7875003f38e67e2ac7e5560
Thanks,
Chasel
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Chiu, Chasel
> Sent: Thursday, July 28, 2022 7:57 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star
> Subject: [edk2-devel] [PATCH] IntelFsp2Pkg: Fix GenCfgOpt bug for FSPI_UPD
> support.
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
> Fixed a logic bug in GenCfgOpt.py to skip FSPI_UPD when platforms do not
> support.
>
> Cc: Nate DeSimone
> Cc: Star Zeng
> Signed-off-by: Chasel Chiu
> ---
> IntelFsp2Pkg/Tools/GenCfgOpt.py | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py
> b/IntelFsp2Pkg/Tools/GenCfgOpt.py index 71c48f10e0..13be81ddbc 100644
> --- a/IntelFsp2Pkg/Tools/GenCfgOpt.py
> +++ b/IntelFsp2Pkg/Tools/GenCfgOpt.py
> @@ -1301,7 +1301,7 @@ EndList
> elif '_S' in SignatureStr[6:6+2]:
> TxtBody.append("#define
> FSPS_UPD_SIGNATURE %s/* '%s' */\n\n" % (Item['value'],
> SignatureStr))elif '_I' in SignatureStr[6:6+2]:-
> if NoFSPI ==
> True:+ if NoFSPI == False:
> TxtBody.append("#define
> FSPI_UPD_SIGNATURE %s/* '%s' */\n\n" % (Item['value'],
> SignatureStr)) TxtBody.append("\n") --
> 2.35.0.windows.1
>
>
>
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Re: [edk2-devel] [PATCH v2] IntelFsp2Pkg: FSPI_UPD is not mandatory.
Patch merged:
https://github.com/tianocore/edk2/commit/3eca64f157c340f9bbf552d89a69698a3090c080
Thanks,
Chasel
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Chiu, Chasel
> Sent: Wednesday, July 27, 2022 10:15 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star
> Subject: [edk2-devel] [PATCH v2] IntelFsp2Pkg: FSPI_UPD is not mandatory.
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
> FSPI_UPD is required only When platforms implemented FSP_I component.
> Updated the scripts to allow FSPI_UPD not present scenario.
> Also fixed FSP_GLOBAL_DATA structure alignment issue and unnecessary non-
> backward compatibility change in previous FSP_I patch.
>
> Cc: Nate DeSimone
> Cc: Star Zeng
> Signed-off-by: Chasel Chiu
> ---
> IntelFsp2Pkg/Include/FspGlobalData.h | 43 +-
> -
> IntelFsp2Pkg/Tools/GenCfgOpt.py | 14 ++
> 2 files changed, 31 insertions(+), 26 deletions(-)
>
> diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h
> b/IntelFsp2Pkg/Include/FspGlobalData.h
> index cf94f7b6a5..32c6d460e4 100644
> --- a/IntelFsp2Pkg/Include/FspGlobalData.h
> +++ b/IntelFsp2Pkg/Include/FspGlobalData.h
> @@ -42,58 +42,57 @@ typedef struct {
> #define FSP_PERFORMANCE_DATA_TIMER_MASK 0xFF typedef
> struct {- UINT32Signature;- UINT8 Version;- UINT8
> Reserved1[3];+
> UINT32 Signature;+ UINT8 Version;+ UINT8
>Reserved1[3];
> /// /// Offset 0x08 ///- UINTN CoreStack;- UINTN Reserved2;+
> UINTN
> CoreStack;+ VOID *SmmInitUpdPtr; /// /// IA32: Offset
> 0x10; X64:
> Offset 0x18 ///- UINT32StatusCode;- UINT8 ApiIdx;+ UINT32
> StatusCode;+ UINT8 ApiIdx; /// /// 0: FSP in API mode; 1:
> FSP in
> DISPATCH mode ///- UINT8 FspMode;- UINT8 OnSeparateStack;- UINT8
> Reserved3;- UINT32NumberOfPhases;- UINT32PhasesExecuted;- UINT32
> Reserved4[8];+ UINT8 FspMode;+ UINT8
> OnSeparateStack;+
> UINT8 Reserved2;+ UINT32 NumberOfPhases;+ UINT32
> PhasesExecuted;+ UINT32 Reserved3[8]; /// /// IA32: Offset
> 0x40; X64:
> Offset 0x48 /// Start of UINTN and pointer section- /// All UINTN and
> pointer
> members must be put in this section- /// except CoreStack and Reserved2. In
> addition, the number of- /// UINTN and pointer members must be even for
> natural alignment- /// in both IA32 and X64.+ /// All UINTN and pointer
> members are put in this section+ /// for maintaining natural alignment for
> both
> IA32 and X64 builds. /// FSP_PLAT_DATA PlatformData; VOID
> *TempRamInitUpdPtr; VOID *MemoryInitUpdPtr; VOID
> *SiliconInitUpdPtr;- VOID *SmmInitUpdPtr; ///- /// IA32:
> Offset 0x68;
> X64: Offset 0x98+ /// IA32: Offset 0x64; X64: Offset 0x90 /// To store
> function
> parameters pointer /// so it can be retrieved after stack switched. ///
> VOID
> *FunctionParameterPtr; FSP_INFO_HEADER*FspInfoHeader; VOID
> *UpdDataPtr;- UINTN Reserved5; /// /// End of UINTN and
> pointer
> section+ /// At this point, next field offset must be either *0h or *8h to+
> ///
> meet natural alignment requirement. ///- UINT8 Reserved6[16];+
> UINT8 Reserved4[16]; UINT32 PerfSig; UINT16
>PerfLen;-
> UINT16 Reserved7;+ UINT16 Reserved5; UINT32
> PerfIdx;+
> UINT32 Reserved6; UINT64 PerfData[32]; }
> FSP_GLOBAL_DATA;
> diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py
> b/IntelFsp2Pkg/Tools/GenCfgOpt.py
> index 128b896592..71c48f10e0 100644
> --- a/IntelFsp2Pkg/Tools/GenCfgOpt.py
> +++ b/IntelFsp2Pkg/Tools/GenCfgOpt.py
> @@ -959,8 +959,13 @@ EndList
> UpdTxtFile = '' FvDir = self._FvDir if
> GuidList[Index] not in
> self._MacroDict:-self.Error = "%s definition is missing in
> DSC file" %
> (GuidList[Index])-return 1+NoFSPI = False+
> if
> GuidList[Index] == 'FSP_I_UPD_TOOL_GUID':+NoFSPI = True+
> continue+else:+self.Error = "%s
> definition is missing in DSC
> file" % (GuidList[Index])+return 1 if
> UpdTxtFile == '':
> UpdTxtFile = os.path.join(FvDir, self._MacroDict[GuidList[Index]] + '.txt')@@
> -
> 1296,7 +1301,8 @@ EndList
> elif '_S' in SignatureStr[6:6+2]:
[edk2-devel] [PATCH] IntelFsp2Pkg: FSPI_UPD is not mandatory.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
FSPI_UPD is required only When platforms implemented FSP_I component.
Updated the scripts to allow FSPI_UPD not present scenario.
Also fixed FSP_GLOBAL_DATA structure alignment issue and unnecessary
non-backward compatibility change in previous FSP_I patch.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Include/FspGlobalData.h | 5 +++--
IntelFsp2Pkg/Tools/GenCfgOpt.py | 14 ++
2 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h
b/IntelFsp2Pkg/Include/FspGlobalData.h
index cf94f7b6a5..d1b3dfbfc4 100644
--- a/IntelFsp2Pkg/Include/FspGlobalData.h
+++ b/IntelFsp2Pkg/Include/FspGlobalData.h
@@ -76,15 +76,15 @@ typedef struct {
VOID *TempRamInitUpdPtr;
VOID *MemoryInitUpdPtr;
VOID *SiliconInitUpdPtr;
- VOID *SmmInitUpdPtr;
///
- /// IA32: Offset 0x68; X64: Offset 0x98
+ /// IA32: Offset 0x64; X64: Offset 0x90
/// To store function parameters pointer
/// so it can be retrieved after stack switched.
///
VOID *FunctionParameterPtr;
FSP_INFO_HEADER*FspInfoHeader;
VOID *UpdDataPtr;
+ VOID *SmmInitUpdPtr;
UINTN Reserved5;
///
/// End of UINTN and pointer section
@@ -94,6 +94,7 @@ typedef struct {
UINT16 PerfLen;
UINT16 Reserved7;
UINT32 PerfIdx;
+ UINT32 Reserved8;
UINT64 PerfData[32];
} FSP_GLOBAL_DATA;
diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py b/IntelFsp2Pkg/Tools/GenCfgOpt.py
index 128b896592..71c48f10e0 100644
--- a/IntelFsp2Pkg/Tools/GenCfgOpt.py
+++ b/IntelFsp2Pkg/Tools/GenCfgOpt.py
@@ -959,8 +959,13 @@ EndList
UpdTxtFile = ''
FvDir = self._FvDir
if GuidList[Index] not in self._MacroDict:
-self.Error = "%s definition is missing in DSC file" %
(GuidList[Index])
-return 1
+NoFSPI = False
+if GuidList[Index] == 'FSP_I_UPD_TOOL_GUID':
+NoFSPI = True
+continue
+else:
+self.Error = "%s definition is missing in DSC file" %
(GuidList[Index])
+return 1
if UpdTxtFile == '':
UpdTxtFile = os.path.join(FvDir,
self._MacroDict[GuidList[Index]] + '.txt')
@@ -1296,7 +1301,8 @@ EndList
elif '_S' in SignatureStr[6:6+2]:
TxtBody.append("#define FSPS_UPD_SIGNATURE %s
/* '%s' */\n\n" % (Item['value'], SignatureStr))
elif '_I' in SignatureStr[6:6+2]:
- TxtBody.append("#define FSPI_UPD_SIGNATURE %s
/* '%s' */\n\n" % (Item['value'], SignatureStr))
+ if NoFSPI == True:
+ TxtBody.append("#define FSPI_UPD_SIGNATURE
%s/* '%s' */\n\n" % (Item['value'], SignatureStr))
TxtBody.append("\n")
for Region in ['UPD']:
@@ -1702,7 +1708,7 @@ EndList
def Usage():
-print ("GenCfgOpt Version 0.58")
+print ("GenCfgOpt Version 0.59")
print ("Usage:")
print ("GenCfgOpt UPDTXT PlatformDscFile BuildFvDir
[-D Macros]")
print ("GenCfgOpt HEADER PlatformDscFile BuildFvDir InputHFile
[-D Macros]")
--
2.35.0.windows.1
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[edk2-devel] [PATCH v2] IntelFsp2Pkg: FSPI_UPD is not mandatory.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
FSPI_UPD is required only When platforms implemented FSP_I component.
Updated the scripts to allow FSPI_UPD not present scenario.
Also fixed FSP_GLOBAL_DATA structure alignment issue and unnecessary
non-backward compatibility change in previous FSP_I patch.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Include/FspGlobalData.h | 43
+--
IntelFsp2Pkg/Tools/GenCfgOpt.py | 14 ++
2 files changed, 31 insertions(+), 26 deletions(-)
diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h
b/IntelFsp2Pkg/Include/FspGlobalData.h
index cf94f7b6a5..32c6d460e4 100644
--- a/IntelFsp2Pkg/Include/FspGlobalData.h
+++ b/IntelFsp2Pkg/Include/FspGlobalData.h
@@ -42,58 +42,57 @@ typedef struct {
#define FSP_PERFORMANCE_DATA_TIMER_MASK 0xFF
typedef struct {
- UINT32Signature;
- UINT8 Version;
- UINT8 Reserved1[3];
+ UINT32 Signature;
+ UINT8 Version;
+ UINT8 Reserved1[3];
///
/// Offset 0x08
///
- UINTN CoreStack;
- UINTN Reserved2;
+ UINTN CoreStack;
+ VOID *SmmInitUpdPtr;
///
/// IA32: Offset 0x10; X64: Offset 0x18
///
- UINT32StatusCode;
- UINT8 ApiIdx;
+ UINT32 StatusCode;
+ UINT8 ApiIdx;
///
/// 0: FSP in API mode; 1: FSP in DISPATCH mode
///
- UINT8 FspMode;
- UINT8 OnSeparateStack;
- UINT8 Reserved3;
- UINT32NumberOfPhases;
- UINT32PhasesExecuted;
- UINT32Reserved4[8];
+ UINT8 FspMode;
+ UINT8 OnSeparateStack;
+ UINT8 Reserved2;
+ UINT32 NumberOfPhases;
+ UINT32 PhasesExecuted;
+ UINT32 Reserved3[8];
///
/// IA32: Offset 0x40; X64: Offset 0x48
/// Start of UINTN and pointer section
- /// All UINTN and pointer members must be put in this section
- /// except CoreStack and Reserved2. In addition, the number of
- /// UINTN and pointer members must be even for natural alignment
- /// in both IA32 and X64.
+ /// All UINTN and pointer members are put in this section
+ /// for maintaining natural alignment for both IA32 and X64 builds.
///
FSP_PLAT_DATA PlatformData;
VOID *TempRamInitUpdPtr;
VOID *MemoryInitUpdPtr;
VOID *SiliconInitUpdPtr;
- VOID *SmmInitUpdPtr;
///
- /// IA32: Offset 0x68; X64: Offset 0x98
+ /// IA32: Offset 0x64; X64: Offset 0x90
/// To store function parameters pointer
/// so it can be retrieved after stack switched.
///
VOID *FunctionParameterPtr;
FSP_INFO_HEADER*FspInfoHeader;
VOID *UpdDataPtr;
- UINTN Reserved5;
///
/// End of UINTN and pointer section
+ /// At this point, next field offset must be either *0h or *8h to
+ /// meet natural alignment requirement.
///
- UINT8 Reserved6[16];
+ UINT8 Reserved4[16];
UINT32 PerfSig;
UINT16 PerfLen;
- UINT16 Reserved7;
+ UINT16 Reserved5;
UINT32 PerfIdx;
+ UINT32 Reserved6;
UINT64 PerfData[32];
} FSP_GLOBAL_DATA;
diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py b/IntelFsp2Pkg/Tools/GenCfgOpt.py
index 128b896592..71c48f10e0 100644
--- a/IntelFsp2Pkg/Tools/GenCfgOpt.py
+++ b/IntelFsp2Pkg/Tools/GenCfgOpt.py
@@ -959,8 +959,13 @@ EndList
UpdTxtFile = ''
FvDir = self._FvDir
if GuidList[Index] not in self._MacroDict:
-self.Error = "%s definition is missing in DSC file" %
(GuidList[Index])
-return 1
+NoFSPI = False
+if GuidList[Index] == 'FSP_I_UPD_TOOL_GUID':
+NoFSPI = True
+continue
+else:
+self.Error = "%s definition is missing in DSC file" %
(GuidList[Index])
+return 1
if UpdTxtFile == '':
UpdTxtFile = os.path.join(FvDir,
self._MacroDict[GuidList[Index]] + '.txt')
@@ -1296,7 +1301,8 @@ EndList
elif '_S' in SignatureStr[6:6+2]:
TxtBody.append("#define FSPS_UPD_SIGNATURE %s
/* '%s' */\n\n" % (Item['value'], SignatureStr))
elif '_I' in SignatureStr[6:6+2]:
- TxtBody.append("#define FSPI_UPD_SIGNATURE %s
/* '%s' */\n\n" % (Item['value'], SignatureStr))
+ if NoFSPI == True:
+ TxtBody.append("#define FSPI_UPD_SIGNATURE
%s/* '%s' */\n\n" % (Item['value'], SignatureStr))
TxtBody.append("\n")
for Region in ['UPD']:
@@ -1702,7 +1708,7 @@ EndList
def Usage():
-print ("GenCfgOpt Version 0.58")
+print ("GenCfgOpt Version
[edk2-devel] [PATCH v4] IntelFsp2Pkg: Add FSPI_ARCH_UPD.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
Adding the missing FSPI_ARCH_UPD, FSP_GLOBAL_DATA_VERSION bumpping up,
and some comments for clarification.
Also fixed a bug in SplitFspBin.py for FSP-I support.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Include/FspEas/FspApi.h | 71
---
IntelFsp2Pkg/Include/FspGlobalData.h | 2 +-
IntelFsp2Pkg/Include/Guid/FspHeaderFile.h | 21 +++--
IntelFsp2Pkg/Tools/SplitFspBin.py | 2 +-
4 files changed, 85 insertions(+), 11 deletions(-)
diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h
b/IntelFsp2Pkg/Include/FspEas/FspApi.h
index bf46f13f73..361e916b5f 100644
--- a/IntelFsp2Pkg/Include/FspEas/FspApi.h
+++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h
@@ -1,6 +1,6 @@
/** @file
Intel FSP API definition from Intel Firmware Support Package External
- Architecture Specification v2.0 - v2.2
+ Architecture Specification v2.0 and above.
Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -100,13 +100,14 @@ typedef struct {
/// "XX_T" for FSP-T
/// "XX_M" for FSP-M
/// "XX_S" for FSP-S
+ /// "XX_I" for FSP-I
/// Where XX is an unique signature
///
UINT64Signature;
///
/// Revision of the Data structure.
- /// For FSP spec 2.0/2.1 value is 1.
- /// For FSP spec 2.2 value is 2.
+ /// For FSP spec 2.0/2.1, this value is 1 and only FSPM_UPD having
ARCH_UPD.
+ /// For FSP spec 2.2 and above, this value is 2 and ARCH_UPD present in
all UPD structures.
///
UINT8 Revision;
UINT8 Reserved[23];
@@ -134,7 +135,7 @@ typedef struct {
} FSPT_ARCH_UPD;
///
-/// FSPT_ARCH2_UPD Configuration.
+/// FSPT_ARCH2_UPD Configuration for FSP 2.4 and above.
///
typedef struct {
///
@@ -196,7 +197,7 @@ typedef struct {
} FSPM_ARCH_UPD;
///
-/// FSPM_ARCH2_UPD Configuration.
+/// FSPM_ARCH2_UPD Configuration for FSP 2.4 and above.
///
typedef struct {
///
@@ -209,6 +210,13 @@ typedef struct {
///
UINT32 Length;
///
+ /// Pointer to the non-volatile storage (NVS) data buffer.
+ /// If it is NULL it indicates the NVS data is not available.
+ /// This value is deprecated starting with v2.4 of the FSP specification,
+ /// and will be removed in an upcoming version of the FSP specification.
+ ///
+ EFI_PHYSICAL_ADDRESSNvsBufferPtr;
+ ///
/// Pointer to the temporary stack base address to be
/// consumed inside FspMemoryInit() API.
///
@@ -232,7 +240,7 @@ typedef struct {
/// This value is only valid if Revision is >= 2.
///
EFI_PHYSICAL_ADDRESSFspEventHandler;
- UINT8 Reserved1[24];
+ UINT8 Reserved1[16];
} FSPM_ARCH2_UPD;
///
@@ -265,7 +273,7 @@ typedef struct {
} FSPS_ARCH_UPD;
///
-/// FSPS_ARCH2_UPD Configuration.
+/// FSPS_ARCH2_UPD Configuration for FSP 2.4 and above.
///
typedef struct {
///
@@ -285,6 +293,40 @@ typedef struct {
UINT8 Reserved1[16];
} FSPS_ARCH2_UPD;
+///
+/// FSPI_ARCH_UPD Configuration.
+///
+typedef struct {
+ ///
+ /// Revision of the structure is 1 for this version of the specification.
+ ///
+ UINT8 Revision;
+ UINT8 Reserved[3];
+ ///
+ /// Length of the structure in bytes. The current value for this field is 64.
+ ///
+ UINT32 Length;
+ ///
+ /// The physical memory-mapped base address of the bootloader SMM firmware
volume (FV).
+ ///
+ EFI_PHYSICAL_ADDRESSBootloaderSmmFvBaseAddress;
+ ///
+ /// The length in bytes of the bootloader SMM firmware volume (FV).
+ ///
+ UINT64 BootloaderSmmFvLength;
+ ///
+ /// The physical memory-mapped base address of the bootloader SMM FV context
data.
+ /// This data is provided to bootloader SMM drivers through a HOB by the FSP
MM Foundation.
+ ///
+ EFI_PHYSICAL_ADDRESSBootloaderSmmFvContextData;
+ ///
+ /// The length in bytes of the bootloader SMM FV context data.
+ /// This data is provided to bootloader SMM drivers through a HOB by the FSP
MM Foundation.
+ ///
+ UINT16 BootloaderSmmFvContextDataLength;
+ UINT8 Reserved1[30];
+} FSPI_ARCH_UPD;
+
///
/// FSPT_UPD_COMMON Configuration.
///
@@ -393,6 +435,21 @@ typedef struct {
FSPS_ARCH2_UPDFspsArchUpd;
} FSPS_UPD_COMMON_FSP24;
+///
+/// FSPI_UPD_COMMON Configuration.
+///
+typedef struct {
+ ///
+ /// FSP_UPD_HEADER Configuration.
+ ///
+ FSP_UPD_HEADERFspUpdHeader;
+
+ ///
+ /// FSPI_ARCH_UPD Configuration.
+ ///
+ FSPI_ARCH_UPD FspiArchUpd;
+} FSPI_UPD_COMMON;
+
///
/// Enumeration of FSP_INIT_PHASE for NOTIFY_PHASE.
///
diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h
b/IntelFsp2Pkg/Include/FspGlobalData.h
index 697b20ed4c..cf94f7b6a5 100644
---
Re: [edk2-devel] [PATCH v4] IntelFsp2Pkg: Add FSPI_ARCH_UPD.
Patch merged:
https://github.com/tianocore/edk2/commit/5a3641bfcdcf99fd76817833488f2af8abb69383
Thanks,
Chasel
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Chiu, Chasel
> Sent: Friday, July 22, 2022 10:49 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star
> Subject: [edk2-devel] [PATCH v4] IntelFsp2Pkg: Add FSPI_ARCH_UPD.
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
>
> Adding the missing FSPI_ARCH_UPD, FSP_GLOBAL_DATA_VERSION bumpping up,
> and some comments for clarification.
> Also fixed a bug in SplitFspBin.py for FSP-I support.
>
> Cc: Nate DeSimone
> Cc: Star Zeng
> Signed-off-by: Chasel Chiu
> ---
> IntelFsp2Pkg/Include/FspEas/FspApi.h | 71
> --
> -
> IntelFsp2Pkg/Include/FspGlobalData.h | 2 +-
> IntelFsp2Pkg/Include/Guid/FspHeaderFile.h | 21 +++--
> IntelFsp2Pkg/Tools/SplitFspBin.py | 2 +-
> 4 files changed, 85 insertions(+), 11 deletions(-)
>
> diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h
> b/IntelFsp2Pkg/Include/FspEas/FspApi.h
> index bf46f13f73..361e916b5f 100644
> --- a/IntelFsp2Pkg/Include/FspEas/FspApi.h
> +++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h
> @@ -1,6 +1,6 @@
> /** @file Intel FSP API definition from Intel Firmware Support Package
> External- Architecture Specification v2.0 - v2.2+ Architecture
> Specification v2.0
> and above.Copyright (c) 2014 - 2022, Intel Corporation. All rights
> reserved. SPDX-License-Identifier: BSD-2-Clause-Patent@@ -100,13
> +100,14 @@ typedef struct {
>/// "XX_T" for FSP-T /// "XX_M" for FSP-M /// "XX_S" for
> FSP-
> S+ /// "XX_I" for FSP-I /// Where XX is an unique signature ///
> UINT64Signature; /// /// Revision of the Data structure.- /// For
> FSP spec
> 2.0/2.1 value is 1.- /// For FSP spec 2.2 value is 2.+ /// For FSP spec
> 2.0/2.1,
> this value is 1 and only FSPM_UPD having ARCH_UPD.+ /// For FSP spec 2.2
> and above, this value is 2 and ARCH_UPD present in all UPD structures. ///
> UINT8 Revision; UINT8 Reserved[23];@@ -134,7 +135,7 @@ typedef
> struct {
> } FSPT_ARCH_UPD; ///-/// FSPT_ARCH2_UPD Configuration.+///
> FSPT_ARCH2_UPD Configuration for FSP 2.4 and above. /// typedef struct
> { ///@@ -196,7 +197,7 @@ typedef struct {
> } FSPM_ARCH_UPD; ///-/// FSPM_ARCH2_UPD Configuration.+///
> FSPM_ARCH2_UPD Configuration for FSP 2.4 and above. /// typedef struct
> { ///@@ -209,6 +210,13 @@ typedef struct {
>/// UINT32 Length; ///+ /// Pointer to the
> non-volatile storage
> (NVS) data buffer.+ /// If it is NULL it indicates the NVS data is not
> available.+
> /// This value is deprecated starting with v2.4 of the FSP specification,+
> /// and
> will be removed in an upcoming version of the FSP specification.+ ///+
> EFI_PHYSICAL_ADDRESSNvsBufferPtr;+ /// /// Pointer to the temporary
> stack base address to be /// consumed inside FspMemoryInit() API. ///@@ -
> 232,7 +240,7 @@ typedef struct {
>/// This value is only valid if Revision is >= 2. ///
> EFI_PHYSICAL_ADDRESS
> FspEventHandler;- UINT8 Reserved1[24];+ UINT8
> Reserved1[16]; } FSPM_ARCH2_UPD; ///@@ -265,7 +273,7 @@ typedef struct {
> } FSPS_ARCH_UPD; ///-/// FSPS_ARCH2_UPD Configuration.+///
> FSPS_ARCH2_UPD Configuration for FSP 2.4 and above. /// typedef struct
> { ///@@ -285,6 +293,40 @@ typedef struct {
>UINT8 Reserved1[16]; } FSPS_ARCH2_UPD; +///+///
> FSPI_ARCH_UPD
> Configuration.+///+typedef struct {+ ///+ /// Revision of the structure is
> 1 for
> this version of the specification.+ ///+ UINT8 Revision;+
> UINT8
> Reserved[3];+ ///+ /// Length of the structure in bytes. The current value
> for
> this field is 64.+ ///+ UINT32 Length;+ ///+ /// The
> physical memory-
> mapped base address of the bootloader SMM firmware volume (FV).+ ///+
> EFI_PHYSICAL_ADDRESSBootloaderSmmFvBaseAddress;+ ///+ /// The length
> in bytes of the bootloader SMM firmware volume (FV).+ ///+ UINT64
> BootloaderSmmFvLength;+ ///+ /// The physical memory-mapped base address
> of the bootloader SMM FV context data.+ /// This data is provided to
> bootloader SMM drivers through a HOB by the FSP MM Foundation.+ ///+
> EFI_PHYSICAL_ADDRESSBootloaderSmmFvContextData;+ ///+ /// The length
> in bytes of the bootloader SMM FV context data.+ /// This data is provided to
> bootloader SMM drivers through a HOB by the FSP MM Foundatio
[edk2-devel] [PATCH v2] IntelFsp2Pkg/FspSecCore: Add FSP-I API for SMM support.
From: Hongbin1 Zhang
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
Add FSP-I API entry point for SMM support.
Also update 64bit API entry code to assign ApiIdx to RAX
to avoid confusion.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
Signed-off-by: Hongbin1 Zhang
---
IntelFsp2Pkg/FspSecCore/SecFspApiChk.c | 13 +
IntelFsp2Pkg/FspSecCore/FspSecCoreI.inf | 54
++
IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm | 44
IntelFsp2Pkg/FspSecCore/X64/Fsp22ApiEntryS.nasm | 8
IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm | 44
IntelFsp2Pkg/FspSecCore/X64/FspApiEntryM.nasm | 4 ++--
IntelFsp2Pkg/FspSecCore/X64/FspApiEntryS.nasm | 4 ++--
IntelFsp2Pkg/Include/FspEas/FspApi.h| 57
++---
IntelFsp2Pkg/Include/FspGlobalData.h| 53
-
IntelFsp2Pkg/Include/Guid/FspHeaderFile.h | 22 +++---
IntelFsp2Pkg/IntelFsp2Pkg.dsc | 1 +
IntelFsp2Pkg/Tools/GenCfgOpt.py | 26 --
IntelFsp2Pkg/Tools/SplitFspBin.py | 6 +++---
13 files changed, 264 insertions(+), 72 deletions(-)
diff --git a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
index e22a88cc84..35d223a404 100644
--- a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
+++ b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
@@ -71,6 +71,19 @@ FspApiCallingCheck (
Status = EFI_INVALID_PARAMETER;
}
}
+ } else if (ApiIdx == FspSmmInitApiIndex) {
+//
+// FspSmmInitApiIndex check
+//
+if ((FspData == NULL) || ((UINTN)FspData == MAX_ADDRESS) ||
((UINTN)FspData == MAX_UINT32)) {
+ Status = EFI_UNSUPPORTED;
+} else {
+ if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
+Status = EFI_UNSUPPORTED;
+ } else if (EFI_ERROR (FspUpdSignatureCheck (FspSmmInitApiIndex,
ApiParam))) {
+Status = EFI_INVALID_PARAMETER;
+ }
+}
} else {
Status = EFI_UNSUPPORTED;
}
diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreI.inf
b/IntelFsp2Pkg/FspSecCore/FspSecCoreI.inf
new file mode 100644
index 00..d31576c00b
--- /dev/null
+++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreI.inf
@@ -0,0 +1,54 @@
+## @file
+# Sec Core for FSP
+#
+# Copyright (c) 2022, Intel Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION= 0x00010005
+ BASE_NAME = FspSecCoreI
+ FILE_GUID = 558782b5-782d-415e-ab9e-0ceb79dc3425
+ MODULE_TYPE= SEC
+ VERSION_STRING = 1.0
+
+#
+# The following information is for reference only and not required by the
build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[Sources]
+ SecFspApiChk.c
+ SecFsp.h
+
+[Sources.X64]
+ X64/FspApiEntryI.nasm
+ X64/FspApiEntryCommon.nasm
+ X64/FspHelper.nasm
+
+[Sources.IA32]
+ Ia32/FspApiEntryI.nasm
+ Ia32/FspApiEntryCommon.nasm
+ Ia32/FspHelper.nasm
+
+[Binaries.Ia32]
+ RAW|Vtf0/Bin/ResetVec.ia32.raw |GCC
+
+[Packages]
+ MdePkg/MdePkg.dec
+ IntelFsp2Pkg/IntelFsp2Pkg.dec
+
+[LibraryClasses]
+ BaseMemoryLib
+ DebugLib
+ BaseLib
+ PciCf8Lib
+ SerialPortLib
+ FspSwitchStackLib
+ FspCommonLib
+ FspSecPlatformLib
+
+
diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm
b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm
new file mode 100644
index 00..e9365d6832
--- /dev/null
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm
@@ -0,0 +1,44 @@
+;; @file
+; Provide FSP API entry points.
+;
+; Copyright (c) 2022, Intel Corporation. All rights reserved.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;;
+
+SECTION .text
+
+;
+; Following functions will be provided in C
+;
+extern ASM_PFX(FspApiCommon)
+
+;
+; FspApiCommonContinue API
+;
+; This is the FSP API common entry point to resume the FSP execution
+;
+;
+global ASM_PFX(FspApiCommonContinue)
+ASM_PFX(FspApiCommonContinue):
+ jmp $
+
+;
+; FspSmmInit API
+;
+; This FSP API will notify the FSP about the different phases in the boot
+; process
+;
+;
+global ASM_PFX(FspSmmInitApi)
+ASM_PFX(FspSmmInitApi):
+ moveax, 7 ; FSP_API_INDEX.FspSmmInitApiIndex
+ jmpASM_PFX(FspApiCommon)
+
+;
+; Module Entrypoint API
Re: [edk2-devel] [PATCH] IntelFsp2Pkg/FspSecCore: Add FSP-I API for SMM support.
Hi,
I have sent V2 to assign ApiIdx to RAX in X64 case to avoid confusion.
Please help to review again,
Thanks,
Chasel
> -Original Message-
> From: Desimone, Nathaniel L
> Sent: Monday, July 18, 2022 4:41 PM
> To: Pedro Falcato ; edk2-devel-groups-io
>
> Cc: Chiu, Chasel ; Zhang, Hongbin1
> ; Zeng, Star
> Subject: RE: [edk2-devel] [PATCH] IntelFsp2Pkg/FspSecCore: Add FSP-I API for
> SMM support.
>
> Hi Pedro,
>
> Wow you are totally right... that is crazy! The exact opposite of the way
> 32-bit
> mode works!
>
> Good catch thank you!
>
> Please consider by code review feedback downgraded from a bug to a
> recommendation to use rax instead of eax to avoid confusion .
>
> Thanks,
> Nate
>
> From: Pedro Falcato
> Sent: Monday, July 18, 2022 2:50 PM
> To: edk2-devel-groups-io ; Desimone, Nathaniel L
>
> Cc: Chiu, Chasel ; Zhang, Hongbin1
> ; Zeng, Star
> Subject: Re: [edk2-devel] [PATCH] IntelFsp2Pkg/FspSecCore: Add FSP-I API for
> SMM support.
>
>
>
> On Mon, Jul 18, 2022 at 10:40 PM Nate DeSimone
> <mailto:nathaniel.l.desim...@intel.com> wrote:
> Hi Chasel,
>
> Please see comments inline. Here is a summary of my feedback:
>
> #1) IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm - line 34 - Bug: eax should
> be rax
> #2) IntelFsp2Pkg/Include/FspEas/FspApi.h - Various unnecessary whitespace
> changes that make the file look worse than before.
> #3) IntelFsp2Pkg/Include/Guid/FspHeaderFile.h - Why indent the #pragma lines?
>
> Thanks,
> Nate
>
> > -Original Message-
> > From: Chiu, Chasel <mailto:chasel.c...@intel.com>
> > Sent: Thursday, July 14, 2022 1:04 PM
> > To: mailto:devel@edk2.groups.io
> > Cc: Zhang, Hongbin1 <mailto:hongbin1.zh...@intel.com>; Desimone,
> Nathaniel L
> > <mailto:nathaniel.l.desim...@intel.com>; Zeng, Star
> <mailto:star.z...@intel.com>; Chiu,
> > Chasel <mailto:chasel.c...@intel.com>
> > Subject: [PATCH] IntelFsp2Pkg/FspSecCore: Add FSP-I API for SMM support.
> >
> > From: Hongbin1 Zhang <mailto:hongbin1.zh...@intel.com>
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
> > Add FSP-I API entry point for SMM support.
> >
> > Cc: Nate DeSimone <mailto:nathaniel.l.desim...@intel.com>
> > Cc: Star Zeng <mailto:star.z...@intel.com>
> > Signed-off-by: Chasel Chiu <mailto:chasel.c...@intel.com>
> > Signed-off-by: Hongbin1 Zhang <mailto:hongbin1.zh...@intel.com>
> > ---
> > IntelFsp2Pkg/FspSecCore/SecFspApiChk.c | 13 +
> > IntelFsp2Pkg/FspSecCore/FspSecCoreI.inf | 54
> ++
> > IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm | 44
>
> > IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm | 44
>
> > IntelFsp2Pkg/Include/FspEas/FspApi.h | 57
> ++---
> > IntelFsp2Pkg/Include/FspGlobalData.h | 53
> -
> > IntelFsp2Pkg/Include/Guid/FspHeaderFile.h | 22 +++---
> > IntelFsp2Pkg/IntelFsp2Pkg.dsc | 1 +
> > IntelFsp2Pkg/Tools/GenCfgOpt.py | 26
> >--
> > IntelFsp2Pkg/Tools/SplitFspBin.py | 6 +++---
> > 10 files changed, 256 insertions(+), 64 deletions(-)
> >
> > diff --git a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
> b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
> > index e22a88cc84..35d223a404 100644
> > --- a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
> > +++ b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
> > @@ -71,6 +71,19 @@ FspApiCallingCheck (
> > Status = EFI_INVALID_PARAMETER;
> > }
> > }
> > + } else if (ApiIdx == FspSmmInitApiIndex) {
> > + //
> > + // FspSmmInitApiIndex check
> > + //
> > + if ((FspData == NULL) || ((UINTN)FspData == MAX_ADDRESS) ||
> ((UINTN)FspData == MAX_UINT32)) {
> > + Status = EFI_UNSUPPORTED;
> > + } else {
> > + if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
> > + Status = EFI_UNSUPPORTED;
> > + } else if (EFI_ERROR (FspUpdSignatureCheck (FspSmmInitApiIndex,
> ApiParam))) {
> > + Status = EFI_INVALID_PARAMETER;
> > + }
> > + }
> > } else {
> > Status = EFI_UNSUPPORTED;
> > }
> > diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreI.inf
> b/IntelFsp2Pkg/FspSecCore/Fs
Re: [edk2-devel][edk2-platforms][PATCH V1 2/2] MinPlatformPkg/Build: Reduce duplication
Hi Isaac, Please see my question below inline. Thanks, Chasel > -Original Message- > From: Oram, Isaac W > Sent: Wednesday, June 29, 2022 3:12 PM > To: devel@edk2.groups.io > Cc: Oram, Isaac W ; Chiu, Chasel > ; Desimone, Nathaniel L > ; Gao, Liming ; > Dong, Eric > Subject: [edk2-devel][edk2-platforms][PATCH V1 2/2] MinPlatformPkg/Build: > Reduce duplication > > Removed needless duplication between sections. > Addes spaces after commas. > Remove commented out code. > > Cc: Chasel Chiu > Cc: Nate DeSimone > Cc: Liming Gao > Cc: Eric Dong > Signed-off-by: Isaac Oram > --- > .../MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc | 55 +-- > .../MinPlatformPkg/Include/Dsc/CorePeiLib.dsc | 29 +++--- > 2 files changed, 20 insertions(+), 64 deletions(-) > > diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc > b/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc > index 9b3095d662..6a4d586ddf 100644 > --- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc > +++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc > @@ -8,14 +8,14 @@ > ## > > > - # > - # Generic EDKII Lib > - # > +# > +# Generic EDKII Lib > +# > > - # > - # DXE phase common > - # > - > [LibraryClasses.common.DXE_CORE,LibraryClasses.common.DXE_SMM_DRIVER > ,LibraryClasses.common.SMM_CORE,LibraryClasses.common.DXE_DRIVER,Libra > ryClasses.common.DXE_RUNTIME_DRIVER,LibraryClasses.common.UEFI_DRIVE > R,LibraryClasses.common.UEFI_APPLICATION] > +# > +# DXE phase common > +# > +[LibraryClasses.common.DXE_CORE, > LibraryClasses.common.DXE_SMM_DRIVER, > +LibraryClasses.common.SMM_CORE, LibraryClasses.common.DXE_DRIVER, > +LibraryClasses.common.DXE_RUNTIME_DRIVER, > +LibraryClasses.common.UEFI_DRIVER, > +LibraryClasses.common.UEFI_APPLICATION] >HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf >PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf > > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryA > llocationLib.inf > @@ -32,14 +32,8 @@ > > FrameBufferBltLib|MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltLi > b.inf >TimerLib|PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.inf > > -!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE > - > PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceL > ib.inf > -!endif > - TimerLib|PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.inf > > TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMe > asurementLib.inf > - >BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf > - > > Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibRouter/Tpm2DeviceLibRout > erDxe.inf > > HashLib|SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRout > erDxe.inf > > Tcg2PhysicalPresenceLib|SecurityPkg/Library/DxeTcg2PhysicalPresenceLib/DxeT > cg2PhysicalPresenceLib.inf > @@ -50,6 +44,9 @@ > > VariableReadLib|MinPlatformPkg/Library/DxeRuntimeVariableReadLib/DxeRunti > meVariableReadLib.inf > > VariableWriteLib|MinPlatformPkg/Library/DxeRuntimeVariableWriteLib/DxeRun > timeVariableWriteLib.inf > > +[LibraryClasses.common.DXE_DRIVER, > +LibraryClasses.common.DXE_RUNTIME_DRIVER, > +LibraryClasses.common.UEFI_DRIVER, > +LibraryClasses.common.UEFI_APPLICATION] > + > +PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformance > Lib > +.inf > + Why we always include DxePerformanceLib without checking enabling /disabling PCD? I think platforms might want to exclude DxePerformanceLib in some types of builds. (e.g., Debug build) > [LibraryClasses.common.DXE_CORE, LibraryClasses.common.SMM_CORE] !if > $(TARGET) != RELEASE > > DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf > @@ -62,21 +59,15 @@ > > !if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE > > PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerf > ormanceLib.inf > - TimerLib|PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.inf > -!endif > !endif > > +[LibraryClasses.common.DXE_DRIVER, LibraryClasses.common.UEFI_DRIVER] > + > +Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibTcg2/Tpm2DeviceLibTcg2.i > +nf > + > [LibraryClasses.common.DXE_DRIVER] > - > Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibTcg2/Tpm2DeviceLibTcg2.in > f > > TpmPlatformHierarchyLib|MinPlatformPkg/Tcg/Library/PeiDxeTpmPlatformHier > archyLib/PeiDxeTpmPlatformHierarchyLib.inf > - PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf > - > -[LibraryClasses.common.UEFI_DRIVER] > - PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf > -# PcdLib|MdePkg/Libr
Re: [edk2-devel] [PATCH v3] IntelFsp2Pkg: Add FSPI_ARCH_UPD.
Hi Star, this is following current specification.
Thanks,
Chasel
> -Original Message-
> From: Zeng, Star
> Sent: Wednesday, July 20, 2022 8:07 PM
> To: Chiu, Chasel ; devel@edk2.groups.io
> Cc: Desimone, Nathaniel L ; Zeng, Star
>
> Subject: RE: [PATCH v3] IntelFsp2Pkg: Add FSPI_ARCH_UPD.
>
> Is the reserved bytes number correct for FSPI_ARCH_UPD alignment?
> UINT16 BootloaderSmmFvContextDataLength;
> UINT8Reserved1[24];
>
> Thanks,
> Star
> -----Original Message-
> From: Chiu, Chasel
> Sent: Thursday, July 21, 2022 10:29 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star
> Subject: [PATCH v3] IntelFsp2Pkg: Add FSPI_ARCH_UPD.
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
>
> Adding the missing FSPI_ARCH_UPD, FSP_GLOBAL_DATA_VERSION bumpping up,
> and some comments for clarification.
> Also fixed a bug in SplitFspBin.py for FSP-I support.
>
> Cc: Nate DeSimone
> Cc: Star Zeng
> Signed-off-by: Chasel Chiu
> ---
> IntelFsp2Pkg/Include/FspEas/FspApi.h | 71
> --
> -
> IntelFsp2Pkg/Include/FspGlobalData.h | 2 +-
> IntelFsp2Pkg/Include/Guid/FspHeaderFile.h | 21 +++--
> IntelFsp2Pkg/Tools/SplitFspBin.py | 2 +-
> 4 files changed, 85 insertions(+), 11 deletions(-)
>
> diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h
> b/IntelFsp2Pkg/Include/FspEas/FspApi.h
> index bf46f13f73..3f368574e8 100644
> --- a/IntelFsp2Pkg/Include/FspEas/FspApi.h
> +++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h
> @@ -1,6 +1,6 @@
> /** @file
>
>Intel FSP API definition from Intel Firmware Support Package External
>
> - Architecture Specification v2.0 - v2.2
>
> + Architecture Specification v2.0 and above.
>
>
>
>Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.
>
>SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @@ -100,13 +100,14 @@ typedef struct {
>/// "XX_T" for FSP-T
>
>/// "XX_M" for FSP-M
>
>/// "XX_S" for FSP-S
>
> + /// "XX_I" for FSP-I
>
>/// Where XX is an unique signature
>
>///
>
>UINT64Signature;
>
>///
>
>/// Revision of the Data structure.
>
> - /// For FSP spec 2.0/2.1 value is 1.
>
> - /// For FSP spec 2.2 value is 2.
>
> + /// For FSP spec 2.0/2.1, this value is 1 and only FSPM_UPD having
> ARCH_UPD.
>
> + /// For FSP spec 2.2 and above, this value is 2 and ARCH_UPD present in
> all
> UPD structures.
>
>///
>
>UINT8 Revision;
>
>UINT8 Reserved[23];
>
> @@ -134,7 +135,7 @@ typedef struct {
> } FSPT_ARCH_UPD;
>
>
>
> ///
>
> -/// FSPT_ARCH2_UPD Configuration.
>
> +/// FSPT_ARCH2_UPD Configuration for FSP 2.4 and above.
>
> ///
>
> typedef struct {
>
>///
>
> @@ -196,7 +197,7 @@ typedef struct {
> } FSPM_ARCH_UPD;
>
>
>
> ///
>
> -/// FSPM_ARCH2_UPD Configuration.
>
> +/// FSPM_ARCH2_UPD Configuration for FSP 2.4 and above.
>
> ///
>
> typedef struct {
>
>///
>
> @@ -209,6 +210,13 @@ typedef struct {
>///
>
>UINT32 Length;
>
>///
>
> + /// Pointer to the non-volatile storage (NVS) data buffer.
>
> + /// If it is NULL it indicates the NVS data is not available.
>
> + /// This value is deprecated starting with v2.4 of the FSP
> + specification,
>
> + /// and will be removed in an upcoming version of the FSP specification.
>
> + ///
>
> + EFI_PHYSICAL_ADDRESSNvsBufferPtr;
>
> + ///
>
>/// Pointer to the temporary stack base address to be
>
>/// consumed inside FspMemoryInit() API.
>
>///
>
> @@ -232,7 +240,7 @@ typedef struct {
>/// This value is only valid if Revision is >= 2.
>
>///
>
>EFI_PHYSICAL_ADDRESSFspEventHandler;
>
> - UINT8 Reserved1[24];
>
> + UINT8 Reserved1[16];
>
> } FSPM_ARCH2_UPD;
>
>
>
> ///
>
> @@ -265,7 +273,7 @@ typedef struct {
> } FSPS_ARCH_UPD;
>
>
>
> ///
>
> -/// FSPS_ARCH2_UPD Configuration.
>
> +/// FSPS_ARCH2_UPD Configuration for FSP 2.4 and above.
>
> ///
>
> typedef struct {
>
>///
>
> @@ -285,6 +293,40 @@ typedef struct {
>UINT8 Reserved1[16];
>
> } FSPS_ARCH2_UPD;
>
>
>
> +///
>
> +/// FSPI_A
Re: [edk2-devel] [PATCH 11/24] IntelFsp2WrapperPkg: Remove duplicated words
Thanks for fixing the typo! Reviewed-by: Chasel Chiu > -Original Message- > From: pierre.gond...@arm.com > Sent: Tuesday, August 23, 2022 9:00 AM > To: devel@edk2.groups.io > Cc: Pierre Gondois ; Chiu, Chasel > ; Desimone, Nathaniel L > > Subject: [PATCH 11/24] IntelFsp2WrapperPkg: Remove duplicated words > > From: Pierre Gondois > > In an effort to clean the documentation of the above package, remove > duplicated words. > > Cc: Chasel Chiu > Cc: Nate DeSimone > Signed-off-by: Pierre Gondois > --- > IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > index c43b0c2267a7..08af6d814ad1 100644 > --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > @@ -87,7 +87,7 @@ [PcdsFixedAtBuild, PcdsPatchableInModule] ># We need a flag (PCD) to indicate if there is need to do such FSP > measurement or NOT. ># 2) The FSP binary includes FSP code and FSP UPD region. The UPD region > is considered ># as configuration block, and it may be updated by OEM by design. > - # This flag (PCD) is to indicate if we need isolate the the UPD region from > the FSP code region. > + # This flag (PCD) is to indicate if we need isolate the UPD region from the > FSP code region. ># BIT0: Need measure FSP. (for FSP1.x) - reserved in FSP2. ># BIT1: Need measure FSPT. (for FSP 2.x) ># BIT2: Need measure FSPM. (for FSP 2.x) > -- > 2.25.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#92712): https://edk2.groups.io/g/devel/message/92712 Mute This Topic: https://groups.io/mt/93207394/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH] IntelFsp2WrapperPkg: Rename PlatformMultiPhaseLibSample.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916
Basing on offline feedbacks to rename
FspWrapperPlatformMultiPhaseLibSample to
FspWrapperPlatformMultiPhaseLibNull.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2WrapperPkg/Library/{BaseFspWrapperPlatformMultiPhaseLibSample/FspWrapperPlatformMultiPhaseLibSample.c
=>
BaseFspWrapperPlatformMultiPhaseLibNull/FspWrapperPlatformMultiPhaseLibNull.c}
| 0
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc
| 4 ++--
IntelFsp2WrapperPkg/Library/{BaseFspWrapperPlatformMultiPhaseLibSample/BaseFspWrapperPlatformMultiPhaseLibSample.inf
=>
BaseFspWrapperPlatformMultiPhaseLibNull/BaseFspWrapperPlatformMultiPhaseLibNull.inf}
| 4 ++--
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git
a/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSample/FspWrapperPlatformMultiPhaseLibSample.c
b/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibNull/FspWrapperPlatformMultiPhaseLibNull.c
similarity index 100%
rename from
IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSample/FspWrapperPlatformMultiPhaseLibSample.c
rename to
IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibNull/FspWrapperPlatformMultiPhaseLibNull.c
diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc
b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc
index 79a5c7f13d..b1fc2291c8 100644
--- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc
+++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc
@@ -48,7 +48,7 @@
FspWrapperApiLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/BaseFspWrapperApiLib.inf
FspWrapperApiTestLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperApiTestLibNull/BaseFspWrapperApiTestLibNull.inf
FspMeasurementLib|IntelFsp2WrapperPkg/Library/BaseFspMeasurementLib/BaseFspMeasurementLib.inf
-
FspWrapperPlatformMultiPhaseLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSample/BaseFspWrapperPlatformMultiPhaseLibSample.inf
+
FspWrapperPlatformMultiPhaseLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibNull/BaseFspWrapperPlatformMultiPhaseLibNull.inf
FspWrapperMultiPhaseProcessLib|IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/FspWrapperMultiPhaseProcessLib.inf
# FSP platform sample
@@ -93,7 +93,7 @@
IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/BaseFspWrapperApiLib.inf
IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/BaseFspWrapperPlatformLibSample.inf
IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
-
IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSample/BaseFspWrapperPlatformMultiPhaseLibSample.inf
+
IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibNull/BaseFspWrapperPlatformMultiPhaseLibNull.inf
IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/FspWrapperMultiPhaseProcessLib.inf
[PcdsFixedAtBuild.common]
diff --git
a/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSample/BaseFspWrapperPlatformMultiPhaseLibSample.inf
b/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibNull/BaseFspWrapperPlatformMultiPhaseLibNull.inf
similarity index 90%
rename from
IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSample/BaseFspWrapperPlatformMultiPhaseLibSample.inf
rename to
IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibNull/BaseFspWrapperPlatformMultiPhaseLibNull.inf
index 607ad41a23..4580e80e2e 100644
---
a/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSample/BaseFspWrapperPlatformMultiPhaseLibSample.inf
+++
b/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibNull/BaseFspWrapperPlatformMultiPhaseLibNull.inf
@@ -10,7 +10,7 @@
[Defines]
INF_VERSION= 0x00010005
- BASE_NAME = BaseFspWrapperPlatformMultiPhaseLibSample
+ BASE_NAME = BaseFspWrapperPlatformMultiPhaseLibNull
FILE_GUID = DB63E5AA-21C6-40BB-879A-CD1762C8427B
MODULE_TYPE= BASE
VERSION_STRING = 1.0
@@ -23,7 +23,7 @@
#
[Sources]
- FspWrapperPlatformMultiPhaseLibSample.c
+ FspWrapperPlatformMultiPhaseLibNull.c
[Packages]
MdePkg/MdePkg.dec
--
2.35.0.windows.1
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Re: [edk2-devel] [edk2-platforms: PATCH] MinPlatformPkg: Add FSP 2.4 MultiPhase library.
Agree. I'm sending patch to rename this lib from edk2 and will send patch to rename this lib from MinPlatformPkg dsc too. Thanks, Chasel > -Original Message- > From: Oram, Isaac W > Sent: Wednesday, August 31, 2022 4:10 PM > To: Chiu, Chasel ; devel@edk2.groups.io > Cc: Desimone, Nathaniel L ; Gao, Liming > ; Dong, Eric > Subject: RE: [edk2-platforms: PATCH] MinPlatformPkg: Add FSP 2.4 > MultiPhase library. > > This sample library does not do anything. If the design is such that a NULL > library is functional, then a NULL library should be implemented. Having a > sample library that has the same function as a NULL library doesn't make > sense to me. > It looks like a NULL library would work fine in this design. If you update to > IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibNull/B > aseFspWrapperPlatformMultiPhaseLibNull.inf, that would be acceptable to > me. > > Regards, > Isaac > > -Original Message- > From: Chiu, Chasel > Sent: Wednesday, August 31, 2022 11:19 AM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > ; Oram, Isaac W > ; Gao, Liming ; Dong, > Eric > Subject: [edk2-platforms: PATCH] MinPlatformPkg: Add FSP 2.4 MultiPhase > library. > > FSP Wrapper has implemented FSP 2.4 MultiPhase support and required > platform to include new library instance. > > Cc: Nate DeSimone > Cc: Isaac Oram > Cc: Liming Gao > Cc: Eric Dong > Signed-off-by: Chasel Chiu > --- > Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc > b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc > index 8e91dba6ac..d4191c4b01 100644 > --- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc > +++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc > @@ -54,6 +54,8 @@ > > TpmPlatformHierarchyLib|MinPlatformPkg/Tcg/Library/PeiDxeTpmPlatform > HierarchyLib/PeiDxeTpmPlatformHierarchyLib.inf > FspMeasurementLib|IntelFsp2WrapperPkg/Library/BaseFspMeasurementLi > b/BaseFspMeasurementLib.inf+ > FspWrapperPlatformMultiPhaseLib|IntelFsp2WrapperPkg/Library/BaseFspW > rapperPlatformMultiPhaseLibSample/BaseFspWrapperPlatformMultiPhaseLi > bSample.inf+ > FspWrapperMultiPhaseProcessLib|IntelFsp2WrapperPkg/Library/FspWrappe > rMultiPhaseProcessLib/FspWrapperMultiPhaseProcessLib.inf > TcgEventLogRecordLib|SecurityPkg/Library/TcgEventLogRecordLib/TcgEventL > ogRecordLib.inf > TpmMeasurementLib|SecurityPkg/Library/PeiTpmMeasurementLib/PeiTpm > MeasurementLib.inf -- > 2.35.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#93026): https://edk2.groups.io/g/devel/message/93026 Mute This Topic: https://groups.io/mt/93377589/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms: PATCH v2] MinPlatformPkg: Add FSP 2.4 MultiPhase library.
FSP Wrapper has implemented FSP 2.4 MultiPhase support and required platform to include new library instance. Cc: Nate DeSimone Cc: Isaac Oram Cc: Liming Gao Cc: Eric Dong Signed-off-by: Chasel Chiu --- Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc index 8e91dba6ac..9bac751eaf 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc +++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc @@ -54,6 +54,8 @@ TpmPlatformHierarchyLib|MinPlatformPkg/Tcg/Library/PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.inf FspMeasurementLib|IntelFsp2WrapperPkg/Library/BaseFspMeasurementLib/BaseFspMeasurementLib.inf + FspWrapperPlatformMultiPhaseLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibNull/BaseFspWrapperPlatformMultiPhaseLibNull.inf + FspWrapperMultiPhaseProcessLib|IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/FspWrapperMultiPhaseProcessLib.inf TcgEventLogRecordLib|SecurityPkg/Library/TcgEventLogRecordLib/TcgEventLogRecordLib.inf TpmMeasurementLib|SecurityPkg/Library/PeiTpmMeasurementLib/PeiTpmMeasurementLib.inf -- 2.35.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#93077): https://edk2.groups.io/g/devel/message/93077 Mute This Topic: https://groups.io/mt/93408670/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH] IntelFsp2WrapperPkg: Rename PlatformMultiPhaseLibSample.
Patch merged:
https://github.com/tianocore/edk2/commit/ec87181192f013f4f7ff916b2a39ff2c87b079f3
Thanks,
Chasel
> -Original Message-
> From: Chiu, Chasel
> Sent: Wednesday, August 31, 2022 11:00 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star
> Subject: [PATCH] IntelFsp2WrapperPkg: Rename
> PlatformMultiPhaseLibSample.
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916
>
> Basing on offline feedbacks to rename
> FspWrapperPlatformMultiPhaseLibSample to
> FspWrapperPlatformMultiPhaseLibNull.
>
> Cc: Nate DeSimone
> Cc: Star Zeng
> Signed-off-by: Chasel Chiu
> ---
>
> IntelFsp2WrapperPkg/Library/{BaseFspWrapperPlatformMultiPhaseLibSampl
> e/FspWrapperPlatformMultiPhaseLibSample.c =>
> BaseFspWrapperPlatformMultiPhaseLibNull/FspWrapperPlatformMultiPhase
> LibNull.c} | 0
> IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc
> | 4 ++--
>
> IntelFsp2WrapperPkg/Library/{BaseFspWrapperPlatformMultiPhaseLibSampl
> e/BaseFspWrapperPlatformMultiPhaseLibSample.inf =>
> BaseFspWrapperPlatformMultiPhaseLibNull/BaseFspWrapperPlatformMultiP
> haseLibNull.inf} | 4 ++--
> 3 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git
> a/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSam
> ple/FspWrapperPlatformMultiPhaseLibSample.c
> b/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibNull
> /FspWrapperPlatformMultiPhaseLibNull.c
> similarity index 100%
> rename from
> IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSampl
> e/FspWrapperPlatformMultiPhaseLibSample.c
> rename to
> IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibNull/F
> spWrapperPlatformMultiPhaseLibNull.c
> diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc
> b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc
> index 79a5c7f13d..b1fc2291c8 100644
> --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc
> +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc
> @@ -48,7 +48,7 @@
>
> FspWrapperApiLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/Ba
> seFspWrapperApiLib.inf
> FspWrapperApiTestLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperApiTe
> stLibNull/BaseFspWrapperApiTestLibNull.inf
> FspMeasurementLib|IntelFsp2WrapperPkg/Library/BaseFspMeasurementLi
> b/BaseFspMeasurementLib.inf-
> FspWrapperPlatformMultiPhaseLib|IntelFsp2WrapperPkg/Library/BaseFspW
> rapperPlatformMultiPhaseLibSample/BaseFspWrapperPlatformMultiPhaseLi
> bSample.inf+
> FspWrapperPlatformMultiPhaseLib|IntelFsp2WrapperPkg/Library/BaseFspW
> rapperPlatformMultiPhaseLibNull/BaseFspWrapperPlatformMultiPhaseLibN
> ull.inf
> FspWrapperMultiPhaseProcessLib|IntelFsp2WrapperPkg/Library/FspWrappe
> rMultiPhaseProcessLib/FspWrapperMultiPhaseProcessLib.inf# FSP
> platform sample@@ -93,7 +93,7 @@
>
> IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/BaseFspWrapperApiLi
> b.inf
> IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/BaseFsp
> WrapperPlatformLibSample.inf
> IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf-
> IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSampl
> e/BaseFspWrapperPlatformMultiPhaseLibSample.inf+
> IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibNull/B
> aseFspWrapperPlatformMultiPhaseLibNull.inf
> IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/FspWrappe
> rMultiPhaseProcessLib.inf [PcdsFixedAtBuild.common]diff --git
> a/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSam
> ple/BaseFspWrapperPlatformMultiPhaseLibSample.inf
> b/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibNull
> /BaseFspWrapperPlatformMultiPhaseLibNull.inf
> similarity index 90%
> rename from
> IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSampl
> e/BaseFspWrapperPlatformMultiPhaseLibSample.inf
> rename to
> IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibNull/B
> aseFspWrapperPlatformMultiPhaseLibNull.inf
> index 607ad41a23..4580e80e2e 100644
> ---
> a/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSam
> ple/BaseFspWrapperPlatformMultiPhaseLibSample.inf
> +++
> b/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibNul
> +++ l/BaseFspWrapperPlatformMultiPhaseLibNull.inf
> @@ -10,7 +10,7 @@
> [Defines] INF_VERSION= 0x00010005- BASE_NAME
> =
> BaseFspWrapperPlatformMultiPhaseLibSample+ BASE_NAME =
> BaseFspWrapperPlatformMultiPhaseLibNull FILE_GUID =
> DB63E5AA-21C6-40BB-879A-CD1762C8427B MODULE_TYPE= BASE
> VERSION_STRING = 1.0@@ -23,7 +23,7 @@
> # [Sources]-
Re: [edk2-devel] [edk2-platforms: PATCH v2] MinPlatformPkg: Add FSP 2.4 MultiPhase library.
Patch pushed: https://github.com/tianocore/edk2-platforms/commit/07bcc0be8c1bcfbd88eb254ebd4f674217013dca Thanks, Chasel > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chiu, > Chasel > Sent: Thursday, September 1, 2022 4:55 PM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > ; Oram, Isaac W > ; Gao, Liming ; Dong, > Eric > Subject: [edk2-devel] [edk2-platforms: PATCH v2] MinPlatformPkg: Add FSP > 2.4 MultiPhase library. > > FSP Wrapper has implemented FSP 2.4 MultiPhase support and required > platform to include new library instance. > > Cc: Nate DeSimone > Cc: Isaac Oram > Cc: Liming Gao > Cc: Eric Dong > Signed-off-by: Chasel Chiu > --- > Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc > b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc > index 8e91dba6ac..9bac751eaf 100644 > --- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc > +++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc > @@ -54,6 +54,8 @@ > > TpmPlatformHierarchyLib|MinPlatformPkg/Tcg/Library/PeiDxeTpmPlatform > HierarchyLib/PeiDxeTpmPlatformHierarchyLib.inf > FspMeasurementLib|IntelFsp2WrapperPkg/Library/BaseFspMeasurementLi > b/BaseFspMeasurementLib.inf+ > FspWrapperPlatformMultiPhaseLib|IntelFsp2WrapperPkg/Library/BaseFspW > rapperPlatformMultiPhaseLibNull/BaseFspWrapperPlatformMultiPhaseLibN > ull.inf+ > FspWrapperMultiPhaseProcessLib|IntelFsp2WrapperPkg/Library/FspWrappe > rMultiPhaseProcessLib/FspWrapperMultiPhaseProcessLib.inf > TcgEventLogRecordLib|SecurityPkg/Library/TcgEventLogRecordLib/TcgEventL > ogRecordLib.inf > TpmMeasurementLib|SecurityPkg/Library/PeiTpmMeasurementLib/PeiTpm > MeasurementLib.inf -- > 2.35.0.windows.1 > > > > -=-=-=-=-=-= > Groups.io Links: You receive all messages sent to this group. > View/Reply Online (#93077): https://edk2.groups.io/g/devel/message/93077 > Mute This Topic: https://groups.io/mt/93408670/1777047 > Group Owner: devel+ow...@edk2.groups.io > Unsubscribe: https://edk2.groups.io/g/devel/unsub [chasel.c...@intel.com] > -=-=-=-=-=-= > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#93080): https://edk2.groups.io/g/devel/message/93080 Mute This Topic: https://groups.io/mt/93408670/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v1 4/7] IntelFsp2WrapperPkg: Fix code formatting errors
Reviewed-by: Chasel Chiu
Thanks,
Chasel
> -Original Message-
> From: mikub...@linux.microsoft.com
> Sent: Tuesday, September 6, 2022 8:19 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star
> Subject: [PATCH v1 4/7] IntelFsp2WrapperPkg: Fix code formatting errors
>
> From: Michael Kubacki
>
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048
>
> This package did not have CI enabled so code changes were merged that fail
> uncrustify formatting. This change updates those files to include uncustify
> formatting.
>
> Cc: Chasel Chiu
> Cc: Nate DeSimone
> Cc: Star Zeng
> Signed-off-by: Michael Kubacki
> ---
> IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
> | 4
> IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
> | 1 -
>
> IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInit
> Data.c | 8
> 3 files changed, 8 insertions(+), 5 deletions(-)
>
> diff --git
> a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
> b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
> index 5b5beb5c6557..2e82a0c1b59a 100644
> --- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
> +++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.
> +++ c
> @@ -115,6 +115,7 @@ CallFspNotifyPhase (
>} else {
> Status = Execute64BitCode ((UINTN)NotifyPhaseApi,
> (UINTN)NotifyPhaseParams, (UINTN)NULL);
>}
> +
>SetInterruptState (InterruptState);
>
>return Status;
> @@ -152,6 +153,7 @@ CallFspMemoryInit (
>} else {
> Status = Execute64BitCode ((UINTN)FspMemoryInitApi,
> (UINTN)FspmUpdDataPtr, (UINTN)HobListPtr);
>}
> +
>SetInterruptState (InterruptState);
>
>return Status;
> @@ -187,6 +189,7 @@ CallTempRamExit (
>} else {
> Status = Execute64BitCode ((UINTN)TempRamExitApi,
> (UINTN)TempRamExitParam, (UINTN)NULL);
>}
> +
>SetInterruptState (InterruptState);
>
>return Status;
> @@ -222,6 +225,7 @@ CallFspSiliconInit (
>} else {
> Status = Execute64BitCode ((UINTN)FspSiliconInitApi,
> (UINTN)FspsUpdDataPtr, (UINTN)NULL);
>}
> +
>SetInterruptState (InterruptState);
>
>return Status;
> diff --git
> a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
> b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
> index a17ca7dcabe8..c8248eb88851 100644
> ---
> a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
> +++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExec
> +++ ute.c
> @@ -69,4 +69,3 @@ Execute64BitCode (
> {
>return EFI_UNSUPPORTED;
> }
> -
> diff --git
> a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamI
> nitData.c
> b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamI
> nitData.c
> index d2acb2fd46cd..fb0d9a8683a9 100644
> ---
> a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamI
> nitData.c
> +++ b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecR
> +++ amInitData.c
> @@ -10,10 +10,10 @@
> #include
>
> typedef struct {
> - EFI_PHYSICAL_ADDRESS MicrocodeRegionBase;
> - UINT64MicrocodeRegionSize;
> - EFI_PHYSICAL_ADDRESS CodeRegionBase;
> - UINT64CodeRegionSize;
> + EFI_PHYSICAL_ADDRESSMicrocodeRegionBase;
> + UINT64 MicrocodeRegionSize;
> + EFI_PHYSICAL_ADDRESSCodeRegionBase;
> + UINT64 CodeRegionSize;
> } FSPT_CORE_UPD;
>
> typedef struct {
> --
> 2.28.0.windows.1
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Re: [edk2-devel] [PATCH v2 0/4] IntelFsp2(Wrapper)Pkg: Support FSP 2.4 MultiPhase.
patch3 Fsp24SecCore modules have been merged: https://github.com/tianocore/edk2/commit/df25a5457f04ec465dce97428cfee96f462676e7 Thanks, Chasel > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chiu, Chasel > Sent: Wednesday, August 31, 2022 11:13 AM > To: devel@edk2.groups.io > Cc: Desimone, Nathaniel L ; Zeng, Star > > Subject: Re: [edk2-devel] [PATCH v2 0/4] IntelFsp2(Wrapper)Pkg: Support FSP > 2.4 MultiPhase. > > > Patch1 and patch2 have been merged: > https://github.com/tianocore/edk2/commit/df25a5457f04ec465dce97428cfee9 > 6f462676e7 > https://github.com/tianocore/edk2/commit/31a94f7fba2a2c1244fc35b6f631e2 > 35e267715b > > Rest of the patches will be merged later. > > Thanks, > Chasel > > > > -Original Message- > > From: Chiu, Chasel > > Sent: Tuesday, August 9, 2022 5:48 PM > > To: devel@edk2.groups.io > > Cc: Chiu, Chasel ; Desimone, Nathaniel L > > ; Zeng, Star > > Subject: [PATCH v2 0/4] IntelFsp2(Wrapper)Pkg: Support FSP 2.4 MultiPhase. > > > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916 > > > > Add FSP 2.4 MultiPhase interfaces and implementation. > > > > Cc: Nate DeSimone > > Cc: Star Zeng > > Signed-off-by: Chasel Chiu > > > > V2: > > . Add FspMultiPhasePlatformGetNumberOfPhases() and > > FspWrapperPlatformMultiPhaseHandler() to support platform porting. > > > > . Add FSP reset support in FspWrapperVariableRequestHandler() > > > > . Fix bug that wrong parameter given when calling > > FspWrapperVariableRequestHandler() > > > > . Corrected code comments. > > > > Chasel Chiu (4): > > IntelFsp2Pkg: Add FSP 2.4 MultiPhase interface. > > IntelFsp2WrapperPkg: Add FSP 2.4 MultiPhase interface. > > IntelFsp2Pkg: Adopt FSP 2.4 MultiPhase functions. > > IntelFsp2WrapperPkg: Implement FSP 2.4 MultiPhase wrapper handlers. > > > > IntelFsp2Pkg/FspSecCore/SecFsp.c > > | 4 > > IntelFsp2Pkg/FspSecCore/SecFspApiChk.c > > | 9 + > > IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c > > | 184 > > > + > > > + > > ++ > > IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c > > | 30 ++ > > IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c > > | 33 + > > IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c > > | 27 +-- > > > > > IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSample/Fs > > pWrapperPlatformMultiPhaseLibSample.c | 49 > > + > > > > > IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapper > > MultiPhaseProcessLib.c | 355 > > > + > > > + > > > + > > > + > > > + > > ++ > > IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf > > | 75 > > > + > > ++ > > IntelFsp2Pkg/FspSecCore/Fsp24SecCoreS.inf > > | 59 +++ > > IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm > > | 304 > > > + > > > + > > > + > > > + > > > > IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryS.nasm > > | 101 > > > + > > > > IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryCommon.nasm > > | 3 +++ > > IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm > > | 303 > > > + > > > +++
Re: [edk2-devel] [PATCH v1 5/7] IntelFsp2WrapperPkg.dec: Remove duplicate LibraryClasses entry
Looks good to me! Thanks Michael! > -Original Message- > From: Michael Kubacki > Sent: Tuesday, September 6, 2022 9:35 PM > To: Chiu, Chasel ; devel@edk2.groups.io > Cc: Desimone, Nathaniel L ; Zeng, Star > > Subject: Re: [edk2-devel] [PATCH v1 5/7] IntelFsp2WrapperPkg.dec: Remove > duplicate LibraryClasses entry > > If that's your intention, yes the CI can allow that. I've pushed a v2 > candidate > branch of this series here with your review tags provided so far. > > https://github.com/makubacki/edk2/tree/add_missing_ci_yaml_intel_fsp_pkgs_ > v2 > > This patch (v1 5/7) is removed from that branch and the change to explicitly > allow this is in the following commit on that branch: > > https://github.com/makubacki/edk2/commit/b11dd1a4f59a62b90ed401b6b7ca > d889dd1e013f#diff- > ba7b110a0ec2f7f8fabc973b327ddb98a7d65b6a00b544a609a56593e6b87be3R8 > 0-R86 > > If that looks good, let me know and I can send the v2 series on the list after > leaving v1 open for a bit longer to collect other feedback and reviews. > > Thanks, > Michael > > On 9/6/2022 11:49 PM, Chiu, Chasel wrote: > > > > Hi Michael, > > > > In this case we intended to provide a single-small function in separate > > library > for platform customization so platforms do not have to override the whole main > library instance, and I think it is not valuable to create another H file to > hold this > single small library function. Is it possible to support such scenario in CI? > > > > Thanks, > > Chasel > > > > > >> -Original Message- > >> From: devel@edk2.groups.io On Behalf Of > >> Michael Kubacki > >> Sent: Tuesday, September 6, 2022 8:19 PM > >> To: devel@edk2.groups.io > >> Cc: Chiu, Chasel ; Desimone, Nathaniel L > >> ; Zeng, Star > >> Subject: [edk2-devel] [PATCH v1 5/7] IntelFsp2WrapperPkg.dec: Remove > >> duplicate LibraryClasses entry > >> > >> From: Michael Kubacki > >> > >> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048 > >> > >> The last [LibraryClasses] entry for FspWrapperPlatformMultiPhaseLib > >> points to the same entry as FspWrapperMultiPhaseProcessLib. > >> > >> FspWrapperPlatformMultiPhaseHandler() is the only function > >> implemented in FspWrapperPlatformMultiPhaseLibNull.c and it is only > >> called (not implemented) in PeiFspWrapperMultiPhaseProcessLib.c, > >> so I'd assume: > >> > >> - Producing library: FspWrapperPlatformMultiPhaseLib > >> - Consuming library: FspWrapperMultiPhaseProcessLib > >> > >> But, the API descriptions do not provide any descriptive information: > >> > >> FspWrapperPlatformMultiPhaseHandler(): > >> > >> ``` > >> /** > >>FSP Wrapper Platform MultiPhase Handler > >> > >>@param[in] FspHobListPtr- Pointer to FSP HobList (valid > >> after FSP-M completed) > >>@param[in] ComponentIndex - FSP Component which executing > >> MultiPhase initialization. > >>@param[in] PhaseIndex - Indicates current execution phase > >> of FSP MultiPhase initialization. > >> > >>@retval EFI_STATUSAlways return EFI_SUCCESS > >> > >> **/ > >> ``` > >> > >> In any case, this removes the redundant header file entry so the > >> Library Class Check CI test can pass on the package. > >> > >> Cc: Chasel Chiu > >> Cc: Nate DeSimone > >> Cc: Star Zeng > >> Signed-off-by: Michael Kubacki > >> --- > >> IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 4 > >> 1 file changed, 4 deletions(-) > >> > >> diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > >> b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > >> index 95ada0f7a151..c3bbc5c45517 100644 > >> --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > >> +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > >> @@ -32,10 +32,6 @@ [LibraryClasses] > >> ## @libraryclass Provide MultiPhase handling related functions. > >> > >> FspWrapperMultiPhaseProcessLib|Include/Library/FspWrapperMultiPhasePr > >> FspWrapperMultiPhaseProcessLib|oce > >> ssLib.h > >> > >> - ## @libraryclass Provide MultiPhase platform actions related > >> functions. > >> - > >> FspWrapperPlatformMultiPhaseLib|
Re: [edk2-devel] [PATCH v1 1/7] IntelFsp2Pkg: Fix code formatting errors
Reviewed-by: Chasel Chiu
Thanks,
Chasel
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Michael
> Kubacki
> Sent: Tuesday, September 6, 2022 8:19 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star
> Subject: [edk2-devel] [PATCH v1 1/7] IntelFsp2Pkg: Fix code formatting errors
>
> From: Michael Kubacki
>
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048
>
> This package did not have CI enabled so code changes were merged that fail
> uncrustify formatting. This change updates those files to include uncustify
> formatting.
>
> Cc: Chasel Chiu
> Cc: Nate DeSimone
> Cc: Star Zeng
> Signed-off-by: Michael Kubacki
> ---
> IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c | 9 +
> IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c | 2 +-
> IntelFsp2Pkg/Include/Ppi/Variable.h| 8
> 3 files changed, 10 insertions(+), 9 deletions(-)
>
> diff --git a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> index cb2317bfb240..8e24b946cd88 100644
> --- a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> +++ b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> @@ -193,8 +193,8 @@ DebugBPrint (
> **/
> VOID
> FillHex (
> - UINTN Value,
> - CHAR8 *Buffer
> + UINTN Value,
> + CHAR8 *Buffer
>)
> {
>INTN Idx;
> @@ -227,8 +227,8 @@ DebugAssertInternal (
>VOID
>)
> {
> - CHAR8 Buffer[MAX_DEBUG_MESSAGE_LENGTH];
> - UINTN *Frame;
> + CHAR8 Buffer[MAX_DEBUG_MESSAGE_LENGTH]; UINTN *Frame;
>
>Frame = (UINTN *)GetStackFramePointer ();
>
> @@ -250,6 +250,7 @@ DebugAssertInternal (
>sizeof (Buffer) / sizeof (CHAR8) - 1
>);
>}
> +
>SerialPortWrite ((UINT8 *)"ASSERT DUMP:\n", 13);
>while (Frame != NULL) {
> FillHex ((UINTN)Frame, Buffer + 9); diff --git
> a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
> b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
> index 69a021f42b39..a0b2193bdeab 100644
> --- a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
> +++ b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
> @@ -31,6 +31,6 @@ SwapStack (
>
>FspData= GetFspGlobalDataPointer ();
>OldStack = FspData->CoreStack;
> - FspData->CoreStack = (UINTN) NewStack;
> + FspData->CoreStack = (UINTN)NewStack;
>return OldStack;
> }
> diff --git a/IntelFsp2Pkg/Include/Ppi/Variable.h
> b/IntelFsp2Pkg/Include/Ppi/Variable.h
> index 3e1f4b98a999..581f14880813 100644
> --- a/IntelFsp2Pkg/Include/Ppi/Variable.h
> +++ b/IntelFsp2Pkg/Include/Ppi/Variable.h
> @@ -184,10 +184,10 @@ EFI_STATUS
> /// to store data in the PEI environment.
> ///
> struct _EDKII_PEI_VARIABLE_PPI {
> - EDKII_PEI_GET_VARIABLEGetVariable;
> - EDKII_PEI_GET_NEXT_VARIABLE_NAME GetNextVariableName;
> - EDKII_PEI_SET_VARIABLESetVariable;
> - EDKII_PEI_QUERY_VARIABLE_INFO QueryVariableInfo;
> + EDKII_PEI_GET_VARIABLE GetVariable;
> + EDKII_PEI_GET_NEXT_VARIABLE_NAMEGetNextVariableName;
> + EDKII_PEI_SET_VARIABLE SetVariable;
> + EDKII_PEI_QUERY_VARIABLE_INFO QueryVariableInfo;
> };
>
> extern EFI_GUID gEdkiiPeiVariablePpiGuid;
> --
> 2.28.0.windows.1
>
>
>
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Re: [edk2-devel] [PATCH v1 5/7] IntelFsp2WrapperPkg.dec: Remove duplicate LibraryClasses entry
Hi Michael, In this case we intended to provide a single-small function in separate library for platform customization so platforms do not have to override the whole main library instance, and I think it is not valuable to create another H file to hold this single small library function. Is it possible to support such scenario in CI? Thanks, Chasel > -Original Message- > From: devel@edk2.groups.io On Behalf Of Michael > Kubacki > Sent: Tuesday, September 6, 2022 8:19 PM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > ; Zeng, Star > Subject: [edk2-devel] [PATCH v1 5/7] IntelFsp2WrapperPkg.dec: Remove > duplicate LibraryClasses entry > > From: Michael Kubacki > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048 > > The last [LibraryClasses] entry for FspWrapperPlatformMultiPhaseLib points to > the same entry as FspWrapperMultiPhaseProcessLib. > > FspWrapperPlatformMultiPhaseHandler() is the only function implemented in > FspWrapperPlatformMultiPhaseLibNull.c and it is only called (not implemented) > in PeiFspWrapperMultiPhaseProcessLib.c, > so I'd assume: > > - Producing library: FspWrapperPlatformMultiPhaseLib > - Consuming library: FspWrapperMultiPhaseProcessLib > > But, the API descriptions do not provide any descriptive information: > > FspWrapperPlatformMultiPhaseHandler(): > > ``` > /** > FSP Wrapper Platform MultiPhase Handler > > @param[in] FspHobListPtr- Pointer to FSP HobList (valid > after FSP-M completed) > @param[in] ComponentIndex - FSP Component which executing > MultiPhase initialization. > @param[in] PhaseIndex - Indicates current execution phase > of FSP MultiPhase initialization. > > @retval EFI_STATUSAlways return EFI_SUCCESS > > **/ > ``` > > In any case, this removes the redundant header file entry so the Library Class > Check CI test can pass on the package. > > Cc: Chasel Chiu > Cc: Nate DeSimone > Cc: Star Zeng > Signed-off-by: Michael Kubacki > --- > IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 4 > 1 file changed, 4 deletions(-) > > diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > index 95ada0f7a151..c3bbc5c45517 100644 > --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > @@ -32,10 +32,6 @@ [LibraryClasses] >## @libraryclass Provide MultiPhase handling related functions. > > FspWrapperMultiPhaseProcessLib|Include/Library/FspWrapperMultiPhaseProce > ssLib.h > > - ## @libraryclass Provide MultiPhase platform actions related functions. > - > FspWrapperPlatformMultiPhaseLib|Include/Library/FspWrapperMultiPhaseProc > essLib.h > - > - > [Guids] ># ># GUID defined in package > -- > 2.28.0.windows.1 > > > > -=-=-=-=-=-= > Groups.io Links: You receive all messages sent to this group. > View/Reply Online (#93319): https://edk2.groups.io/g/devel/message/93319 > Mute This Topic: https://groups.io/mt/93518040/1777047 > Group Owner: devel+ow...@edk2.groups.io > Unsubscribe: https://edk2.groups.io/g/devel/unsub [chasel.c...@intel.com] > -=-=-=-=-=-= > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#93326): https://edk2.groups.io/g/devel/message/93326 Mute This Topic: https://groups.io/mt/93518040/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v1 2/7] IntelFsp2Pkg/BaseFspMultiPhaseLib: Replace duplicate GUID
Thanks for fixing this bug. Reviewed-by: Chasel Chiu > -Original Message- > From: mikub...@linux.microsoft.com > Sent: Tuesday, September 6, 2022 8:19 PM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > ; Zeng, Star > Subject: [PATCH v1 2/7] IntelFsp2Pkg/BaseFspMultiPhaseLib: Replace duplicate > GUID > > From: Michael Kubacki > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048 > > The FILE_GUID for this library instance file is a duplicate of > Library/SecFspSecPlatformLibNull/SecFspSecPlatformLibNull.inf. > > This change replaces the duplicated GUID value with a unique GUID. > > Cc: Chasel Chiu > Cc: Nate DeSimone > Cc: Star Zeng > Signed-off-by: Michael Kubacki > --- > IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git > a/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf > b/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf > index a79f6aecda6d..b9dd132ea863 100644 > --- a/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf > +++ b/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf > @@ -15,7 +15,7 @@ > [Defines] >INF_VERSION= 0x00010005 >BASE_NAME = BaseFspMultiPhaseLib > - FILE_GUID = C128CADC-623E-4E41-97CB-A7138E627460 > + FILE_GUID = 74C14477-E742-4A0A-9787-27B1CF34F698 >MODULE_TYPE= SEC >VERSION_STRING = 1.0 >LIBRARY_CLASS = FspMultiPhaseLib > -- > 2.28.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#93323): https://edk2.groups.io/g/devel/message/93323 Mute This Topic: https://groups.io/mt/93518037/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH] IntelFsp2Pkg: Fix FspSecCoreI build failure.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4049 Link error occurred in certain compiling environment when building FspSecCoreI: unresolved external symbol _TempRamInitApi. Cc: Nate DeSimone Cc: Star Zeng Signed-off-by: Chasel Chiu --- IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm | 11 +++ IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm | 11 +++ 2 files changed, 22 insertions(+) diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm index e9365d6832..e392ebed58 100644 --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm @@ -22,6 +22,17 @@ global ASM_PFX(FspApiCommonContinue) ASM_PFX(FspApiCommonContinue): jmp $ +; +; TempRamInit API +; +; Empty function for WHOLEARCHIVE build option +; +; +global ASM_PFX(TempRamInitApi) +ASM_PFX(TempRamInitApi): + jmp $ + ret + ; ; FspSmmInit API ; diff --git a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm index e74bf0a26b..5c9ffbd569 100644 --- a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm +++ b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm @@ -22,6 +22,17 @@ global ASM_PFX(FspApiCommonContinue) ASM_PFX(FspApiCommonContinue): jmp $ +; +; TempRamInit API +; +; Empty function for WHOLEARCHIVE build option +; +; +global ASM_PFX(TempRamInitApi) +ASM_PFX(TempRamInitApi): + jmp $ + ret + ; ; FspSmmInit API ; -- 2.35.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#93455): https://edk2.groups.io/g/devel/message/93455 Mute This Topic: https://groups.io/mt/93532998/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v2 0/4] IntelFsp2(Wrapper)Pkg: Support FSP 2.4 MultiPhase.
Patch1 and patch2 have been merged: https://github.com/tianocore/edk2/commit/df25a5457f04ec465dce97428cfee96f462676e7 https://github.com/tianocore/edk2/commit/31a94f7fba2a2c1244fc35b6f631e235e267715b Rest of the patches will be merged later. Thanks, Chasel > -Original Message- > From: Chiu, Chasel > Sent: Tuesday, August 9, 2022 5:48 PM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > ; Zeng, Star > Subject: [PATCH v2 0/4] IntelFsp2(Wrapper)Pkg: Support FSP 2.4 MultiPhase. > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916 > > Add FSP 2.4 MultiPhase interfaces and implementation. > > Cc: Nate DeSimone > Cc: Star Zeng > Signed-off-by: Chasel Chiu > > V2: > . Add FspMultiPhasePlatformGetNumberOfPhases() and > FspWrapperPlatformMultiPhaseHandler() to support platform porting. > > . Add FSP reset support in FspWrapperVariableRequestHandler() > > . Fix bug that wrong parameter given when calling > FspWrapperVariableRequestHandler() > > . Corrected code comments. > > Chasel Chiu (4): > IntelFsp2Pkg: Add FSP 2.4 MultiPhase interface. > IntelFsp2WrapperPkg: Add FSP 2.4 MultiPhase interface. > IntelFsp2Pkg: Adopt FSP 2.4 MultiPhase functions. > IntelFsp2WrapperPkg: Implement FSP 2.4 MultiPhase wrapper handlers. > > IntelFsp2Pkg/FspSecCore/SecFsp.c > | 4 > IntelFsp2Pkg/FspSecCore/SecFspApiChk.c > | 9 + > IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c > | 184 > + > + > ++ > IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c > | 30 ++ > IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c > | 33 + > IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c > | 27 +-- > > IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSample/Fs > pWrapperPlatformMultiPhaseLibSample.c | 49 > + > > IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapper > MultiPhaseProcessLib.c | 355 > + > + > + > + > + > ++ > IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf > | 75 > + > ++ > IntelFsp2Pkg/FspSecCore/Fsp24SecCoreS.inf > | 59 +++ > IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm > | 304 > + > + > + > + > > IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryS.nasm > | 101 > + > > IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryCommon.nasm > | 3 +++ > IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm > | 303 > + > + > + > + > +++ > IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryS.nasm > | 108 > + > +++ > IntelFsp2Pkg/FspSecCore/X64/FspApiEntryCommon.nasm > | 3 +++ > IntelFsp2Pkg/Include/FspEas/FspApi.h > | 62 - > - > IntelFsp2Pkg/Include/FspGlobalData.h > | 5 - > IntelFsp2Pkg/Include/Library/FspMultiPhaseLib.h > | 54 ++ > IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h > | 19 +++ > IntelFsp2Pkg/IntelFsp2Pkg.dec >| > 12
[edk2-devel] [edk2-platforms: PATCH] MinPlatformPkg: Add FSP 2.4 MultiPhase library.
FSP Wrapper has implemented FSP 2.4 MultiPhase support and required platform to include new library instance. Cc: Nate DeSimone Cc: Isaac Oram Cc: Liming Gao Cc: Eric Dong Signed-off-by: Chasel Chiu --- Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc index 8e91dba6ac..d4191c4b01 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc +++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc @@ -54,6 +54,8 @@ TpmPlatformHierarchyLib|MinPlatformPkg/Tcg/Library/PeiDxeTpmPlatformHierarchyLib/PeiDxeTpmPlatformHierarchyLib.inf FspMeasurementLib|IntelFsp2WrapperPkg/Library/BaseFspMeasurementLib/BaseFspMeasurementLib.inf + FspWrapperPlatformMultiPhaseLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSample/BaseFspWrapperPlatformMultiPhaseLibSample.inf + FspWrapperMultiPhaseProcessLib|IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/FspWrapperMultiPhaseProcessLib.inf TcgEventLogRecordLib|SecurityPkg/Library/TcgEventLogRecordLib/TcgEventLogRecordLib.inf TpmMeasurementLib|SecurityPkg/Library/PeiTpmMeasurementLib/PeiTpmMeasurementLib.inf -- 2.35.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#93013): https://edk2.groups.io/g/devel/message/93013 Mute This Topic: https://groups.io/mt/93377589/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v2 0/4] IntelFsp2(Wrapper)Pkg: Support FSP 2.4 MultiPhase.
Patch 4 Fspw to adopt FSP 2.4 MultiPhase has been merged: https://github.com/tianocore/edk2/commit/96f3efbd991db83c608909c1c861a77fe26982f1 Thanks, Chasel > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chiu, Chasel > Sent: Tuesday, September 6, 2022 9:28 PM > To: devel@edk2.groups.io; Chiu, Chasel > Cc: Desimone, Nathaniel L ; Zeng, Star > > Subject: Re: [edk2-devel] [PATCH v2 0/4] IntelFsp2(Wrapper)Pkg: Support FSP > 2.4 MultiPhase. > > > patch3 Fsp24SecCore modules have been merged: > https://github.com/tianocore/edk2/commit/df25a5457f04ec465dce97428cfee9 > 6f462676e7 > > Thanks, > Chasel > > > > -Original Message- > > From: devel@edk2.groups.io On Behalf Of Chiu, > > Chasel > > Sent: Wednesday, August 31, 2022 11:13 AM > > To: devel@edk2.groups.io > > Cc: Desimone, Nathaniel L ; Zeng, Star > > > > Subject: Re: [edk2-devel] [PATCH v2 0/4] IntelFsp2(Wrapper)Pkg: > > Support FSP > > 2.4 MultiPhase. > > > > > > Patch1 and patch2 have been merged: > > > https://github.com/tianocore/edk2/commit/df25a5457f04ec465dce97428cfee > > 9 > > 6f462676e7 > > > https://github.com/tianocore/edk2/commit/31a94f7fba2a2c1244fc35b6f631e > > 2 > > 35e267715b > > > > Rest of the patches will be merged later. > > > > Thanks, > > Chasel > > > > > > > -Original Message- > > > From: Chiu, Chasel > > > Sent: Tuesday, August 9, 2022 5:48 PM > > > To: devel@edk2.groups.io > > > Cc: Chiu, Chasel ; Desimone, Nathaniel L > > > ; Zeng, Star > > > Subject: [PATCH v2 0/4] IntelFsp2(Wrapper)Pkg: Support FSP 2.4 MultiPhase. > > > > > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916 > > > > > > Add FSP 2.4 MultiPhase interfaces and implementation. > > > > > > Cc: Nate DeSimone > > > Cc: Star Zeng > > > Signed-off-by: Chasel Chiu > > > > > > V2: > > > . Add FspMultiPhasePlatformGetNumberOfPhases() and > > > FspWrapperPlatformMultiPhaseHandler() to support platform porting. > > > > > > . Add FSP reset support in FspWrapperVariableRequestHandler() > > > > > > . Fix bug that wrong parameter given when calling > > > FspWrapperVariableRequestHandler() > > > > > > . Corrected code comments. > > > > > > Chasel Chiu (4): > > > IntelFsp2Pkg: Add FSP 2.4 MultiPhase interface. > > > IntelFsp2WrapperPkg: Add FSP 2.4 MultiPhase interface. > > > IntelFsp2Pkg: Adopt FSP 2.4 MultiPhase functions. > > > IntelFsp2WrapperPkg: Implement FSP 2.4 MultiPhase wrapper handlers. > > > > > > IntelFsp2Pkg/FspSecCore/SecFsp.c > > > | 4 > > > IntelFsp2Pkg/FspSecCore/SecFspApiChk.c > > > | 9 + > > > IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c > > > | 184 > > > > > > + > > > > > > + > > > ++ > > > IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c > > > | 30 ++ > > > IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c > > > | 33 + > > > IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c > > > | 27 +-- > > > > > > > > IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSample/ > > Fs > > > pWrapperPlatformMultiPhaseLibSample.c | 49 > > > + > > > > > > > > IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapp > > er > > > MultiPhaseProcessLib.c | 355 > > > > > > + > > > > > > + > > > > > > + > > > > > > + > > > > > > + > > > ++ > > > IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf > > > | 75 > > > > > > +++
Re: [edk2-devel] [PATCH] IntelFsp2WrapprPkg: Check header revision for MultiPhase support.
Patch merged:
https://github.com/tianocore/edk2/commit/26638d2aa399e436f47d629f877e581ed402020a
Thanks,
Chasel
> -Original Message-
> From: Desimone, Nathaniel L
> Sent: Tuesday, October 25, 2022 3:19 PM
> To: Chiu, Chasel ; devel@edk2.groups.io
> Cc: Zeng, Star
> Subject: RE: [PATCH] IntelFsp2WrapprPkg: Check header revision for
> MultiPhase support.
>
> Hi Chasel,
>
> There is a spelling error in your commit message. IntelFsp2WrapprPkg
> should be IntelFsp2WrapperPkg. Please fix this during the push. No need to
> send a 2nd review.
>
> With that change...
>
> Reviewed-by: Nate DeSimone
>
> > -Original Message-
> > From: Chiu, Chasel
> > Sent: Tuesday, October 25, 2022 1:56 PM
> > To: devel@edk2.groups.io
> > Cc: Chiu, Chasel ; Desimone, Nathaniel L
> > ; Zeng, Star
> > Subject: [PATCH] IntelFsp2WrapprPkg: Check header revision for
> > MultiPhase support.
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4119
> >
> > Earlier version of FSP header may not have MultiPhase fields present
> > in the FspInfoHeader so the handler should verify header revision
> > before accessing the MultiPhase fields from the header.
> >
> > Cc: Nate DeSimone
> > Cc: Star Zeng
> > Signed-off-by: Chasel Chiu
> > ---
> >
> >
> IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWr
> app
> > erMultiPhaseProcessLib.c | 30 --
> > 1 file changed, 24 insertions(+), 6 deletions(-)
> >
> > diff --git
> >
> a/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFsp
> Wra
> > pperMultiPhaseProcessLib.c
> >
> b/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFsp
> Wra
> > pperMultiPhaseProcessLib.c
> > index 1248accf87..0f524910d5 100644
> > ---
> >
> a/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFsp
> Wra
> > pperMultiPhaseProcessLib.c
> > +++
> b/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFs
> > +++ pWrapperMultiPhaseProcessLib.c
> > @@ -73,15 +73,27 @@ CallFspMultiPhaseEntry (
> >//
> >// FSP_MULTI_PHASE_INIT and FSP_MULTI_PHASE_SI_INIT API
> functions having same prototype.
> >//
> > - UINTN FspMultiPhaseApiEntry;
> > - UINTN FspMultiPhaseApiOffset;
> > - EFI_STATUS Status;
> > - BOOLEAN InterruptState;
> > + UINTN FspMultiPhaseApiEntry;
> > + UINTN FspMultiPhaseApiOffset;
> > + EFI_STATUS Status;
> > + BOOLEAN InterruptState;
> > + BOOLEAN IsVariableServiceRequest;
> > + FSP_MULTI_PHASE_PARAMS *FspMultiPhaseParamsPtr;
> > +
> > + FspMultiPhaseParamsPtr = (FSP_MULTI_PHASE_PARAMS
> *)FspMultiPhaseParams;
> > + IsVariableServiceRequest = FALSE;
> > + if ((FspMultiPhaseParamsPtr->MultiPhaseAction ==
> EnumMultiPhaseGetVariableRequestInfo) ||
> > + (FspMultiPhaseParamsPtr->MultiPhaseAction ==
> > + EnumMultiPhaseCompleteVariableRequest))
> > + {
> > +IsVariableServiceRequest = TRUE;
> > + }
> >
> >if (ComponentIndex == FspMultiPhaseMemInitApiIndex) {
> > FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32
> (PcdFspmBaseAddress));
> > if (FspHeader == NULL) {
> >return EFI_DEVICE_ERROR;
> > +} else if (FspHeader->SpecVersion < 0x24) {
> > + return EFI_UNSUPPORTED;
> > }
> >
> > FspMultiPhaseApiOffset =
> > FspHeader->FspMultiPhaseMemInitEntryOffset;
> > @@ -89,6 +101,10 @@ CallFspMultiPhaseEntry (
> > FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32
> (PcdFspsBaseAddress));
> > if (FspHeader == NULL) {
> >return EFI_DEVICE_ERROR;
> > +} else if (FspHeader->SpecVersion < 0x22) {
> > + return EFI_UNSUPPORTED;
> > +} else if ((FspHeader->SpecVersion < 0x24) &&
> (IsVariableServiceRequest == TRUE)) {
> > + return EFI_UNSUPPORTED;
> > }
> >
> > FspMultiPhaseApiOffset =
> > FspHeader->FspMultiPhaseSiInitEntryOffset;
> > @@ -120,7 +136,8 @@ CallFspMultiPhaseEntry (
> >@param[in] FspHobListPtr- Pointer to FSP HobList (valid after
> > FSP-
> M completed)
> >@param[in] ComponentIndex - FSP Component which executing
> MultiPhase initialization.
> >
> > - @retval EFI_UNSUPPORTED FSP Wrapper cannot support the specific
> variable request
> > + @retval EFI_UNSUPPORTED FS
[edk2-devel] [PATCH] IntelFsp2WrapprPkg: Check header revision for MultiPhase support.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4119
Earlier version of FSP header may not have MultiPhase fields present in
the FspInfoHeader so the handler should verify header revision before
accessing the MultiPhase fields from the header.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c
| 30 --
1 file changed, 24 insertions(+), 6 deletions(-)
diff --git
a/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c
b/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c
index 1248accf87..0f524910d5 100644
---
a/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c
+++
b/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c
@@ -73,15 +73,27 @@ CallFspMultiPhaseEntry (
//
// FSP_MULTI_PHASE_INIT and FSP_MULTI_PHASE_SI_INIT API functions having
same prototype.
//
- UINTN FspMultiPhaseApiEntry;
- UINTN FspMultiPhaseApiOffset;
- EFI_STATUS Status;
- BOOLEAN InterruptState;
+ UINTN FspMultiPhaseApiEntry;
+ UINTN FspMultiPhaseApiOffset;
+ EFI_STATUS Status;
+ BOOLEAN InterruptState;
+ BOOLEAN IsVariableServiceRequest;
+ FSP_MULTI_PHASE_PARAMS *FspMultiPhaseParamsPtr;
+
+ FspMultiPhaseParamsPtr = (FSP_MULTI_PHASE_PARAMS *)FspMultiPhaseParams;
+ IsVariableServiceRequest = FALSE;
+ if ((FspMultiPhaseParamsPtr->MultiPhaseAction ==
EnumMultiPhaseGetVariableRequestInfo) ||
+ (FspMultiPhaseParamsPtr->MultiPhaseAction ==
EnumMultiPhaseCompleteVariableRequest))
+ {
+IsVariableServiceRequest = TRUE;
+ }
if (ComponentIndex == FspMultiPhaseMemInitApiIndex) {
FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32
(PcdFspmBaseAddress));
if (FspHeader == NULL) {
return EFI_DEVICE_ERROR;
+} else if (FspHeader->SpecVersion < 0x24) {
+ return EFI_UNSUPPORTED;
}
FspMultiPhaseApiOffset = FspHeader->FspMultiPhaseMemInitEntryOffset;
@@ -89,6 +101,10 @@ CallFspMultiPhaseEntry (
FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32
(PcdFspsBaseAddress));
if (FspHeader == NULL) {
return EFI_DEVICE_ERROR;
+} else if (FspHeader->SpecVersion < 0x22) {
+ return EFI_UNSUPPORTED;
+} else if ((FspHeader->SpecVersion < 0x24) && (IsVariableServiceRequest ==
TRUE)) {
+ return EFI_UNSUPPORTED;
}
FspMultiPhaseApiOffset = FspHeader->FspMultiPhaseSiInitEntryOffset;
@@ -120,7 +136,8 @@ CallFspMultiPhaseEntry (
@param[in] FspHobListPtr- Pointer to FSP HobList (valid after FSP-M
completed)
@param[in] ComponentIndex - FSP Component which executing MultiPhase
initialization.
- @retval EFI_UNSUPPORTED FSP Wrapper cannot support the specific variable
request
+ @retval EFI_UNSUPPORTED FSP Wrapper cannot support the specific variable
request,
+or FSP does not support VariableService
@retval EFI_STATUSReturn FSP returned status
**/
@@ -287,7 +304,8 @@ FspWrapperVariableRequestHandler (
@param[in] FspHobListPtr- Pointer to FSP HobList (valid after FSP-M
completed)
@param[in] ComponentIndex - FSP Component which executing MultiPhase
initialization.
- @retval EFI_STATUSAlways return EFI_SUCCESS
+ @retval EFI_UNSUPPORTED Specific MultiPhase action was not supported.
+ @retval EFI_SUCCESS MultiPhase action were completed successfully.
**/
EFI_STATUS
--
2.35.0.windows.1
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[edk2-devel] [PATCH] IntelFsp2Pkg: Update Function header to support IA32/X64.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4126 Common functions will have either 32bit or 64bit instances which having different return code size. Function header should support both scenarios. Cc: Nate DeSimone Cc: Star Zeng Signed-off-by: Chasel Chiu --- IntelFsp2Pkg/FspSecCore/SecFsp.h | 4 ++-- IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h | 12 ++-- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/IntelFsp2Pkg/FspSecCore/SecFsp.h b/IntelFsp2Pkg/FspSecCore/SecFsp.h index e84528b378..d7a5976c12 100644 --- a/IntelFsp2Pkg/FspSecCore/SecFsp.h +++ b/IntelFsp2Pkg/FspSecCore/SecFsp.h @@ -70,7 +70,7 @@ FspDataPointerFixUp ( @return FSP binary base address. **/ -UINT32 +UINTN EFIAPI AsmGetFspBaseAddress ( VOID @@ -82,7 +82,7 @@ AsmGetFspBaseAddress ( @return FSP binary base address. **/ -UINT32 +UINTN EFIAPI AsmGetFspInfoHeader ( VOID diff --git a/IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h b/IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h index c91ea4a78f..598fdb9ec5 100644 --- a/IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h +++ b/IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h @@ -17,10 +17,10 @@ The callee should not use XMM6/XMM7. The return address is saved in MM7. - @retval in saved in EAX - 0 means platform initialization success. + @retval in saved in EAX/RAX - 0 means platform initialization success. other means platform initialization fail. **/ -UINT32 +UINTN EFIAPI SecPlatformInit ( VOID @@ -37,10 +37,10 @@ SecPlatformInit ( @param[in] FsptUpdDataPtr Address pointer to the FSPT_UPD data structure. It is saved in ESP. - @retval in saved in EAX - 0 means Microcode is loaded successfully. + @retval in saved in EAX/RAX - 0 means Microcode is loaded successfully. other means Microcode is not loaded successfully. **/ -UINT32 +UINTN EFIAPI LoadMicrocode ( IN VOID *FsptUpdDataPtr @@ -56,10 +56,10 @@ LoadMicrocode ( @param[in] FsptUpdDataPtr Address pointer to the FSPT_UPD data structure. It is saved in ESP. - @retval in saved in EAX - 0 means CAR initialization success. + @retval in saved in EAX/RAX - 0 means CAR initialization success. other means CAR initialization fail. **/ -UINT32 +UINTN EFIAPI SecCarInit ( IN VOID *FsptUpdDataPtr -- 2.35.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#95662): https://edk2.groups.io/g/devel/message/95662 Mute This Topic: https://groups.io/mt/94619463/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH] IntelFsp2Pkg: FSP should support input UPD as NULL.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4114
FSP specification supports input UPD as NULL cases which FSP will
use built-in UPD region instead.
FSP should not return INVALID_PARAMETER in such cases.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/FspSecCore/SecFspApiChk.c | 11 +--
IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm | 8
IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm | 7 ---
3 files changed, 9 insertions(+), 17 deletions(-)
diff --git a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
index a44fbf2a50..bfbdf70083 100644
--- a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
+++ b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
@@ -44,6 +44,8 @@ FspApiCallingCheck (
//
if (((UINTN)FspData != MAX_ADDRESS) && ((UINTN)FspData != MAX_UINT32)) {
Status = EFI_UNSUPPORTED;
+} else if (ApiParam == NULL) {
+ Status = EFI_SUCCESS;
} else if (EFI_ERROR (FspUpdSignatureCheck (ApiIdx, ApiParam))) {
Status = EFI_INVALID_PARAMETER;
}
@@ -67,9 +69,12 @@ FspApiCallingCheck (
} else {
if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
Status = EFI_UNSUPPORTED;
- } else if (EFI_ERROR (FspUpdSignatureCheck (FspSiliconInitApiIndex,
ApiParam))) {
-Status = EFI_INVALID_PARAMETER;
} else if (ApiIdx == FspSiliconInitApiIndex) {
+if (ApiParam == NULL) {
+ Status = EFI_SUCCESS;
+} else if (EFI_ERROR (FspUpdSignatureCheck (FspSiliconInitApiIndex,
ApiParam))) {
+ Status = EFI_INVALID_PARAMETER;
+}
//
// Reset MultiPhase NumberOfPhases to zero
//
@@ -89,6 +94,8 @@ FspApiCallingCheck (
} else {
if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
Status = EFI_UNSUPPORTED;
+ } else if (ApiParam == NULL) {
+Status = EFI_SUCCESS;
} else if (EFI_ERROR (FspUpdSignatureCheck (FspSmmInitApiIndex,
ApiParam))) {
Status = EFI_INVALID_PARAMETER;
}
diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
index 61030a843b..52e1ff6f1f 100644
--- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
@@ -555,14 +555,6 @@ ASM_PFX(TempRamInitApi):
SAVE_EAX
SAVE_EDX
- ;
- ; Check Parameter
- ;
- mov eax, dword [esp + 4]
- cmp eax, 0
- mov eax, 8002h
- jzTempRamInitExit
-
;
; Sec Platform Init
;
diff --git a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm
b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm
index 7dd89c531a..23bb2b0481 100644
--- a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm
+++ b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm
@@ -441,13 +441,6 @@ ASM_PFX(TempRamInitApi):
orrax, rdx
SAVE_TS rax
- ;
- ; Check Parameter
- ;
- cmp rcx, 0
- mov rcx, 08002h
- jzTempRamInitExit
-
;
; Sec Platform Init
;
--
2.35.0.windows.1
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Re: [edk2-devel][PATCH v2] IntelFsp2Pkg: NvsBufferPtr is missing in Fsp24ApiEntryM.nasm
Thanks Ted! Reviewed-by: Chasel Chiu > -Original Message- > From: Kuo, Ted > Sent: Thursday, September 15, 2022 6:40 AM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > ; Zeng, Star ; S, Ashraf > Ali ; Duggapu, Chinni B > Subject: [edk2-devel][PATCH v2] IntelFsp2Pkg: NvsBufferPtr is missing in > Fsp24ApiEntryM.nasm > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4063 > Added NvsBufferPtr to FSPM_UPD_COMMON_FSP24 in Fsp24ApiEntryM.nasm > to align with FSP 2.4 SPEC. > > Cc: Chasel Chiu > Cc: Nate DeSimone > Cc: Star Zeng > Cc: Ashraf Ali S > Cc: Chinni B Duggapu > Signed-off-by: Ted Kuo > --- > IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm | 3 ++- > IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm | 3 ++- > 2 files changed, 4 insertions(+), 2 deletions(-) > > diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm > b/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm > index 997b9c0bff..15f8ecea83 100644 > --- a/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm > +++ b/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm > @@ -40,12 +40,13 @@ struc FSPM_UPD_COMMON_FSP24 > .Revision: resb 1 .Reserved: resb > 3 .Length > resd 1+.NvsBufferPtr resq 1 .StackBase: > resq > 1 .StackSize: resq 1 .BootLoaderTolumSize: resd > 1 .BootMode: resd 1 .FspEventHandler > resq 1-.Reserved1: > resb 24+.Reserved1: resb 16 ; } .size: > endstrucdiff --git > a/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm > b/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm > index 8880721f29..a3b38e4585 100644 > --- a/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm > +++ b/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm > @@ -22,12 +22,13 @@ struc FSPM_UPD_COMMON_FSP24 > .Revision: resb 1 .Reserved: resb > 3 .Length > resd 1+.NvsBufferPtr resq 1 .StackBase: > resq > 1 .StackSize: resq 1 .BootLoaderTolumSize: resd > 1 .BootMode: resd 1 .FspEventHandler > resq 1-.Reserved1: > resb 24+.Reserved1: resb 16 ; } .size: endstruc-- > 2.35.3.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#93847): https://edk2.groups.io/g/devel/message/93847 Mute This Topic: https://groups.io/mt/93699989/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH] IntelFsp2Pkg: Fix FspSecCoreI build failure.
Patch merged: https://github.com/tianocore/edk2/commit/f46c7d1e36c901e72cc0daee8429275bcb319eb9 Thanks, Chasel > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chiu, Chasel > Sent: Wednesday, September 7, 2022 12:43 PM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > ; Zeng, Star > Subject: [edk2-devel] [PATCH] IntelFsp2Pkg: Fix FspSecCoreI build failure. > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4049 > > Link error occurred in certain compiling environment when building > FspSecCoreI: unresolved external symbol _TempRamInitApi. > > Cc: Nate DeSimone > Cc: Star Zeng > Signed-off-by: Chasel Chiu > --- > IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm | 11 +++ > IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm | 11 +++ > 2 files changed, 22 insertions(+) > > diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm > b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm > index e9365d6832..e392ebed58 100644 > --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm > +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm > @@ -22,6 +22,17 @@ global ASM_PFX(FspApiCommonContinue) > ASM_PFX(FspApiCommonContinue): jmp $ > +;- > ---+; TempRamInit API+;+; Empty function for > WHOLEARCHIVE build > option+;+;-- > --+global ASM_PFX(TempRamInitApi)+ASM_PFX(TempRamInitApi):+ > jmp $+ ret+ > ; > ; > FspSmmInit API ;diff --git a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm > b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm > index e74bf0a26b..5c9ffbd569 100644 > --- a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm > +++ b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm > @@ -22,6 +22,17 @@ global ASM_PFX(FspApiCommonContinue) > ASM_PFX(FspApiCommonContinue): jmp $ > +;- > ---+; TempRamInit API+;+; Empty function for > WHOLEARCHIVE build > option+;+;-- > --+global ASM_PFX(TempRamInitApi)+ASM_PFX(TempRamInitApi):+ > jmp $+ ret+ > ; > ; > FspSmmInit API ;-- > 2.35.0.windows.1 > > > > -=-=-=-=-=-= > Groups.io Links: You receive all messages sent to this group. > View/Reply Online (#93455): https://edk2.groups.io/g/devel/message/93455 > Mute This Topic: https://groups.io/mt/93532998/1777047 > Group Owner: devel+ow...@edk2.groups.io > Unsubscribe: https://edk2.groups.io/g/devel/unsub [chasel.c...@intel.com] -=- > =-=-=-=-= > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#93855): https://edk2.groups.io/g/devel/message/93855 Mute This Topic: https://groups.io/mt/93532998/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel][PATCH v2] IntelFsp2Pkg: NvsBufferPtr is missing in Fsp24ApiEntryM.nasm
Patch merged: https://github.com/tianocore/edk2/commit/981bf66d5a7b1a31be5ffccc15fe13b97300e124 Thanks, Chasel > -Original Message- > From: Kuo, Ted > Sent: Thursday, September 15, 2022 6:40 AM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > ; Zeng, Star ; S, Ashraf > Ali ; Duggapu, Chinni B > Subject: [edk2-devel][PATCH v2] IntelFsp2Pkg: NvsBufferPtr is missing in > Fsp24ApiEntryM.nasm > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4063 > Added NvsBufferPtr to FSPM_UPD_COMMON_FSP24 in Fsp24ApiEntryM.nasm > to align with FSP 2.4 SPEC. > > Cc: Chasel Chiu > Cc: Nate DeSimone > Cc: Star Zeng > Cc: Ashraf Ali S > Cc: Chinni B Duggapu > Signed-off-by: Ted Kuo > --- > IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm | 3 ++- > IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm | 3 ++- > 2 files changed, 4 insertions(+), 2 deletions(-) > > diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm > b/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm > index 997b9c0bff..15f8ecea83 100644 > --- a/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm > +++ b/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm > @@ -40,12 +40,13 @@ struc FSPM_UPD_COMMON_FSP24 > .Revision: resb 1 .Reserved: resb > 3 .Length > resd 1+.NvsBufferPtr resq 1 .StackBase: > resq > 1 .StackSize: resq 1 .BootLoaderTolumSize: resd > 1 .BootMode: resd 1 .FspEventHandler > resq 1-.Reserved1: > resb 24+.Reserved1: resb 16 ; } .size: > endstrucdiff --git > a/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm > b/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm > index 8880721f29..a3b38e4585 100644 > --- a/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm > +++ b/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm > @@ -22,12 +22,13 @@ struc FSPM_UPD_COMMON_FSP24 > .Revision: resb 1 .Reserved: resb > 3 .Length > resd 1+.NvsBufferPtr resq 1 .StackBase: > resq > 1 .StackSize: resq 1 .BootLoaderTolumSize: resd > 1 .BootMode: resd 1 .FspEventHandler > resq 1-.Reserved1: > resb 24+.Reserved1: resb 16 ; } .size: endstruc-- > 2.35.3.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#93851): https://edk2.groups.io/g/devel/message/93851 Mute This Topic: https://groups.io/mt/93699989/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v3] MinPlatformPkg: Remove _ADR from MinDsdt.asl
Patch has been merged:
https://github.com/tianocore/edk2-platforms/commit/ae75c51f27e21036b6ee021a2d5b9f365f951413
Thanks,
Chasel
> -Original Message-
> From: Chen, Aryeh
> Sent: Sunday, September 11, 2022 10:18 PM
> To: devel@edk2.groups.io
> Cc: Chen, Aryeh ; Chiu, Chasel
> ; Desimone, Nathaniel L
> ; Oram, Isaac W ;
> Sinha, Ankit ; Gao, Liming
> ; Dong, Eric
> Subject: [PATCH v3] MinPlatformPkg: Remove _ADR from MinDsdt.asl
>
> From: Aryeh Chen
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4057
>
> According to ASL Coding Guidelines - Device Identifiers "A Device should
> contain
> either an _ADR or a _HID object, never both."
> , so remove _ADR due to _HID exist.
>
> Signed-off-by: Aryeh Chen
> Cc: Chasel Chiu
> Cc: Nate DeSimone
> Cc: Isaac Oram
> Cc: Ankit Sinha
> Cc: Liming Gao
> Cc: Eric Dong
> ---
> Platform/Intel/MinPlatformPkg/Acpi/MinDsdt/MinDsdt.asl | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/Platform/Intel/MinPlatformPkg/Acpi/MinDsdt/MinDsdt.asl
> b/Platform/Intel/MinPlatformPkg/Acpi/MinDsdt/MinDsdt.asl
> index 0d94472450..4efb8709ac 100644
> --- a/Platform/Intel/MinPlatformPkg/Acpi/MinDsdt/MinDsdt.asl
> +++ b/Platform/Intel/MinPlatformPkg/Acpi/MinDsdt/MinDsdt.asl
> @@ -27,7 +27,6 @@ DefinitionBlock (
>Name(_HID, EISAID("PNP0A08")) // Indicates PCI Express/PCI-X Mode2 host
> hierarchy Name(_CID, EISAID("PNP0A03")) // To support legacy OS that
> doesn't understand the new HID Name(_SEG, 0)- Name(_ADR,
> 0x)
> Method(^BN00, 0){ return(0x) } // Returns default Bus number for Peer PCI
> busses. Name can be overriden with control method placed directly under
> Device scope Method(_BBN, 0){ return(BN00()) } // Bus number, optional
> for
> the Root PCI Bus Name(_UID, 0x) // Unique Bus ID, optional--
> 2.26.2.windows.1
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[edk2-devel] [PATCH] IntelFsp2WrapperPkg: Add header for PlatformMultiPhaseLib.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4092 To comply with coding style rule each library class should have its own header even if it is just a private child library instance consumed by parent public library in the same package. Cc: Nate DeSimone Cc: Star Zeng Signed-off-by: Chasel Chiu --- IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c | 2 +- IntelFsp2WrapperPkg/Include/Library/FspWrapperMultiPhaseProcessLib.h | 18 -- IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformMultiPhaseLib.h | 30 ++ IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 2 +- 4 files changed, 32 insertions(+), 20 deletions(-) diff --git a/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c b/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c index 3ddc07690a..1248accf87 100644 --- a/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c +++ b/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include /** Execute 32-bit FSP API entry code. diff --git a/IntelFsp2WrapperPkg/Include/Library/FspWrapperMultiPhaseProcessLib.h b/IntelFsp2WrapperPkg/Include/Library/FspWrapperMultiPhaseProcessLib.h index 65a5db233f..aadacc9b50 100644 --- a/IntelFsp2WrapperPkg/Include/Library/FspWrapperMultiPhaseProcessLib.h +++ b/IntelFsp2WrapperPkg/Include/Library/FspWrapperMultiPhaseProcessLib.h @@ -9,24 +9,6 @@ #ifndef __FSP_WRAPPER_MULTI_PHASE_PROCESS_LIB_H__ #define __FSP_WRAPPER_MULTI_PHASE_PROCESS_LIB_H__ -/** - FSP Wrapper Platform MultiPhase Handler - - @param[in] FspHobListPtr- Pointer to FSP HobList (valid after FSP-M completed) - @param[in] ComponentIndex - FSP Component which executing MultiPhase initialization. - @param[in] PhaseIndex - Indicates current execution phase of FSP MultiPhase initialization. - - @retval EFI_STATUSAlways return EFI_SUCCESS - -**/ -VOID -EFIAPI -FspWrapperPlatformMultiPhaseHandler ( - IN OUT VOID **FspHobListPtr, - IN UINT8 ComponentIndex, - IN UINT32PhaseIndex - ); - /** FSP Wrapper Variable Request Handler diff --git a/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformMultiPhaseLib.h b/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformMultiPhaseLib.h new file mode 100644 index 00..79b5ba0ec3 --- /dev/null +++ b/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformMultiPhaseLib.h @@ -0,0 +1,30 @@ +/** @file + Provide FSP wrapper Platform MultiPhase handling functions. + + Copyright (c) 2022, Intel Corporation. All rights reserved. + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef __FSP_WRAPPER_PLATFORM_MULTI_PHASE_PROCESS_LIB_H__ +#define __FSP_WRAPPER_PLATFORM_MULTI_PHASE_PROCESS_LIB_H__ + +/** + FSP Wrapper Platform MultiPhase Handler + + @param[in] FspHobListPtr- Pointer to FSP HobList (valid after FSP-M completed) + @param[in] ComponentIndex - FSP Component which executing MultiPhase initialization. + @param[in] PhaseIndex - Indicates current execution phase of FSP MultiPhase initialization. + + @retval EFI_STATUSAlways return EFI_SUCCESS + +**/ +VOID +EFIAPI +FspWrapperPlatformMultiPhaseHandler ( + IN OUT VOID **FspHobListPtr, + IN UINT8 ComponentIndex, + IN UINT32PhaseIndex + ); + +#endif diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec index 95ada0f7a1..922ccc063f 100644 --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec @@ -33,7 +33,7 @@ FspWrapperMultiPhaseProcessLib|Include/Library/FspWrapperMultiPhaseProcessLib.h ## @libraryclass Provide MultiPhase platform actions related functions. - FspWrapperPlatformMultiPhaseLib|Include/Library/FspWrapperMultiPhaseProcessLib.h + FspWrapperPlatformMultiPhaseLib|Include/Library/FspWrapperPlatformMultiPhaseLib.h [Guids] -- 2.35.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#94722): https://edk2.groups.io/g/devel/message/94722 Mute This Topic: https://groups.io/mt/94122844/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 0/2] IntelFsp2WrapperPkg: Add header for PlatformMultiPhaseLib.
To comply with coding style rule each library class should have its own header even if it is just a private child library instance consumed by parent public library in the same package. Cc: Nate DeSimone Cc: Star Zeng Cc: Michael Kubacki Signed-off-by: Chasel Chiu Reviewed-by: Nate DeSimone Chasel Chiu (2): IntelFsp2WrapperPkg: Add header for PlatformMultiPhaseLib. IntelFsp2WrapperPkg: Remove CI exception of PlatformMultiPhaseLib. IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c | 2 +- IntelFsp2WrapperPkg/Include/Library/FspWrapperMultiPhaseProcessLib.h | 18 -- IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformMultiPhaseLib.h | 30 ++ IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml | 6 +- IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 2 +- 5 files changed, 33 insertions(+), 25 deletions(-) create mode 100644 IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformMultiPhaseLib.h -- 2.35.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#94725): https://edk2.groups.io/g/devel/message/94725 Mute This Topic: https://groups.io/mt/94127791/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 1/2] IntelFsp2WrapperPkg: Add header for PlatformMultiPhaseLib.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4092 To comply with coding style rule each library class should have its own header even if it is just a private child library instance consumed by parent public library in the same package. Cc: Nate DeSimone Cc: Star Zeng Signed-off-by: Chasel Chiu Reviewed-by: Nate DeSimone --- IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c | 2 +- IntelFsp2WrapperPkg/Include/Library/FspWrapperMultiPhaseProcessLib.h | 18 -- IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformMultiPhaseLib.h | 30 ++ IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 2 +- 4 files changed, 32 insertions(+), 20 deletions(-) diff --git a/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c b/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c index 3ddc07690a..1248accf87 100644 --- a/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c +++ b/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include /** Execute 32-bit FSP API entry code. diff --git a/IntelFsp2WrapperPkg/Include/Library/FspWrapperMultiPhaseProcessLib.h b/IntelFsp2WrapperPkg/Include/Library/FspWrapperMultiPhaseProcessLib.h index 65a5db233f..aadacc9b50 100644 --- a/IntelFsp2WrapperPkg/Include/Library/FspWrapperMultiPhaseProcessLib.h +++ b/IntelFsp2WrapperPkg/Include/Library/FspWrapperMultiPhaseProcessLib.h @@ -9,24 +9,6 @@ #ifndef __FSP_WRAPPER_MULTI_PHASE_PROCESS_LIB_H__ #define __FSP_WRAPPER_MULTI_PHASE_PROCESS_LIB_H__ -/** - FSP Wrapper Platform MultiPhase Handler - - @param[in] FspHobListPtr- Pointer to FSP HobList (valid after FSP-M completed) - @param[in] ComponentIndex - FSP Component which executing MultiPhase initialization. - @param[in] PhaseIndex - Indicates current execution phase of FSP MultiPhase initialization. - - @retval EFI_STATUSAlways return EFI_SUCCESS - -**/ -VOID -EFIAPI -FspWrapperPlatformMultiPhaseHandler ( - IN OUT VOID **FspHobListPtr, - IN UINT8 ComponentIndex, - IN UINT32PhaseIndex - ); - /** FSP Wrapper Variable Request Handler diff --git a/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformMultiPhaseLib.h b/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformMultiPhaseLib.h new file mode 100644 index 00..272b0e3911 --- /dev/null +++ b/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformMultiPhaseLib.h @@ -0,0 +1,30 @@ +/** @file + Provide FSP wrapper Platform MultiPhase handling functions. + + Copyright (c) 2022, Intel Corporation. All rights reserved. + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef FSP_WRAPPER_PLATFORM_MULTI_PHASE_LIB_H_ +#define FSP_WRAPPER_PLATFORM_MULTI_PHASE_LIB_H_ + +/** + FSP Wrapper Platform MultiPhase Handler + + @param[in] FspHobListPtr- Pointer to FSP HobList (valid after FSP-M completed) + @param[in] ComponentIndex - FSP Component which executing MultiPhase initialization. + @param[in] PhaseIndex - Indicates current execution phase of FSP MultiPhase initialization. + + @retval EFI_STATUSAlways return EFI_SUCCESS + +**/ +VOID +EFIAPI +FspWrapperPlatformMultiPhaseHandler ( + IN OUT VOID **FspHobListPtr, + IN UINT8 ComponentIndex, + IN UINT32PhaseIndex + ); + +#endif //FSP_WRAPPER_PLATFORM_MULTI_PHASE_LIB_H_ diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec index 95ada0f7a1..922ccc063f 100644 --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec @@ -33,7 +33,7 @@ FspWrapperMultiPhaseProcessLib|Include/Library/FspWrapperMultiPhaseProcessLib.h ## @libraryclass Provide MultiPhase platform actions related functions. - FspWrapperPlatformMultiPhaseLib|Include/Library/FspWrapperMultiPhaseProcessLib.h + FspWrapperPlatformMultiPhaseLib|Include/Library/FspWrapperPlatformMultiPhaseLib.h [Guids] -- 2.35.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#94726): https://edk2.groups.io/g/devel/message/94726 Mute This Topic: https://groups.io/mt/94127792/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH 2/2] IntelFsp2WrapperPkg: Remove CI exception of PlatformMultiPhaseLib.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4092
Duplicate library class header issue will be resolved and CI
exception for FspWrapperPlatformMultiPhaseLib should be removed too.
Cc: Nate DeSimone
Cc: Star Zeng
Cc: Michael Kubacki
Signed-off-by: Chasel Chiu
---
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml
b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml
index 6788a723a1..45cb5a7d6f 100644
--- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml
+++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml
@@ -78,11 +78,7 @@
## options defined .pytool/Plugin/LibraryClassCheck
"LibraryClassCheck": {
-"IgnoreLibraryClass": [
- # This header file contains a small function in a separate library
so platforms
- # do not have to override the whole main library instance.
- "FspWrapperPlatformMultiPhaseLib"
-]
+"IgnoreLibraryClass": []
},
## options defined .pytool/Plugin/SpellCheck
--
2.35.0.windows.1
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Re: [edk2-devel] [PATCH v2 5/6] IntelFsp2WrapperPkg: Add CI YAML file
Yes. Thanks Michael! > -Original Message- > From: Michael Kubacki > Sent: Tuesday, October 4, 2022 8:09 PM > To: devel@edk2.groups.io; Chiu, Chasel ; Kinney, > Michael D > Cc: Desimone, Nathaniel L ; Zeng, Star > > Subject: Re: [edk2-devel] [PATCH v2 5/6] IntelFsp2WrapperPkg: Add CI YAML file > > It looks like you only need my review on patch 2/2 which I provided. I see > Nate > gave R-b on 1/2 so you should be good to go. > > On 10/4/2022 9:27 PM, Chiu, Chasel wrote: > > > > Hi Michael Kubacki, > > > > Please help to review below patch series which will resolve the duplicate > library header in DEC issue. > > > > Thanks, > > Chasel > > > > https://edk2.groups.io/g/devel/message/94725 > > https://edk2.groups.io/g/devel/message/94726 > > https://edk2.groups.io/g/devel/message/94727 > > > > > >> -Original Message- > >> From: Michael Kubacki > >> Sent: Tuesday, October 4, 2022 9:22 AM > >> To: Kinney, Michael D ; > >> devel@edk2.groups.io > >> Cc: Chiu, Chasel ; Desimone, Nathaniel L > >> ; Zeng, Star > >> Subject: Re: [edk2-devel] [PATCH v2 5/6] IntelFsp2WrapperPkg: Add CI > >> YAML file > >> > >> Hi Mike, > >> > >> I agree that it is a design issue and I had a patch for it in the v1 > >> series. It did not fix the issue but took a different approach to work > >> around it > for CI enabling. > >> > >> See the following conversation between Chasel and I regarding that patch: > >> https://edk2.groups.io/g/devel/message/93319 > >> > >> Since it was described as intended, I removed made that change in the v2 > series. > >> > >> I'm happy to turn the write up into a bug, depending on what > >> maintainers want to do. > >> > >> For now I plan to submit this series as-is to get out of the way and > >> let the maintainers handle it. > >> > >> Regards, > >> Michael > >> > >> On 10/4/2022 12:01 PM, Kinney, Michael D wrote: > >>> Michael, > >>> > >>> This looks like a design issue in the IntelFsp2WrapperPkg for 2 lib > >>> classes to point to the same include file. > >>> > >>> Do you have a recommended fix for this issue? > >>> > >>> I am ok with this YAML file that ignores the error, but I think a > >>> new issue should be opened to fix this package to follow the > >>> standard package rules. > >>> > >>> Mike > >>> > >>>> -Original Message- > >>>> From: devel@edk2.groups.io On Behalf Of > >>>> Michael Kubacki > >>>> Sent: Thursday, September 15, 2022 11:55 AM > >>>> To: devel@edk2.groups.io > >>>> Cc: Chiu, Chasel ; Desimone, Nathaniel L > >>>> ; Zeng, Star > >>>> Subject: [edk2-devel] [PATCH v2 5/6] IntelFsp2WrapperPkg: Add CI > >>>> YAML file > >>>> > >>>> From: Michael Kubacki > >>>> > >>>> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048 > >>>> > >>>> Adds IntelFsp2WrapperPkg to the list of supported build packages > >>>> for > >>>> edk2 CI and defines an initial set of CI configuration options. > >>>> > >>>> Adds a special case for the Library Class check CI plugin to ignore > >>>> FspWrapperPlatformMultiPhaseLib with an explanatory comment. > >>>> > >>>> Cc: Chasel Chiu > >>>> Cc: Nate DeSimone > >>>> Cc: Star Zeng > >>>> Signed-off-by: Michael Kubacki > >>>> --- > >>>>.pytool/CISettings.py | 1 + > >>>>IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml | 96 > >> > >>>>2 files changed, 97 insertions(+) > >>>> > >>>> diff --git a/.pytool/CISettings.py b/.pytool/CISettings.py index > >>>> 0205c26a58f8..d9a260784e59 100644 > >>>> --- a/.pytool/CISettings.py > >>>> +++ b/.pytool/CISettings.py > >>>> @@ -55,6 +55,7 @@ class Settings(CiBuildSettingsManager, > >> UpdateSettingsManager, SetupSettingsManag > >>>>"DynamicTablesPkg", > >>>>"EmulatorPkg", > >>>>"IntelFsp2Pkg", > >>>>
Re: [edk2-devel] [PATCH 0/2] IntelFsp2WrapperPkg: Add header for PlatformMultiPhaseLib.
Patch series have been merged: https://github.com/tianocore/edk2/commit/f054beec548eb3cc718b35be20efa9d344fe7097 https://github.com/tianocore/edk2/commit/1bd2ff18664b9564a5802d0ac153b5023f2fa41e Thanks, Chasel > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chiu, Chasel > Sent: Tuesday, October 4, 2022 6:22 PM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > ; Zeng, Star ; Kubacki, > Michael > Subject: [edk2-devel] [PATCH 0/2] IntelFsp2WrapperPkg: Add header for > PlatformMultiPhaseLib. > > To comply with coding style rule each library class should have its own header > even if it is just a private child library instance consumed by parent public > library > in the same package. > > Cc: Nate DeSimone > Cc: Star Zeng > Cc: Michael Kubacki > Signed-off-by: Chasel Chiu > Reviewed-by: Nate DeSimone > > Chasel Chiu (2): > IntelFsp2WrapperPkg: Add header for PlatformMultiPhaseLib. > IntelFsp2WrapperPkg: Remove CI exception of PlatformMultiPhaseLib. > > > IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapper > MultiPhaseProcessLib.c | 2 +- > IntelFsp2WrapperPkg/Include/Library/FspWrapperMultiPhaseProcessLib.h > | 18 -- > IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformMultiPhaseLib.h > | 30 ++ > IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml > | > 6 +- > IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > | 2 > +- > 5 files changed, 33 insertions(+), 25 deletions(-) create mode 100644 > IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformMultiPhaseLib.h > > -- > 2.35.0.windows.1 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#94742): https://edk2.groups.io/g/devel/message/94742 Mute This Topic: https://groups.io/mt/94127791/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v2 5/6] IntelFsp2WrapperPkg: Add CI YAML file
Hi Michael Kubacki,
Please help to review below patch series which will resolve the duplicate
library header in DEC issue.
Thanks,
Chasel
https://edk2.groups.io/g/devel/message/94725
https://edk2.groups.io/g/devel/message/94726
https://edk2.groups.io/g/devel/message/94727
> -Original Message-
> From: Michael Kubacki
> Sent: Tuesday, October 4, 2022 9:22 AM
> To: Kinney, Michael D ; devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star
> Subject: Re: [edk2-devel] [PATCH v2 5/6] IntelFsp2WrapperPkg: Add CI YAML file
>
> Hi Mike,
>
> I agree that it is a design issue and I had a patch for it in the v1 series.
> It did not
> fix the issue but took a different approach to work around it for CI enabling.
>
> See the following conversation between Chasel and I regarding that patch:
> https://edk2.groups.io/g/devel/message/93319
>
> Since it was described as intended, I removed made that change in the v2
> series.
>
> I'm happy to turn the write up into a bug, depending on what maintainers want
> to do.
>
> For now I plan to submit this series as-is to get out of the way and let the
> maintainers handle it.
>
> Regards,
> Michael
>
> On 10/4/2022 12:01 PM, Kinney, Michael D wrote:
> > Michael,
> >
> > This looks like a design issue in the IntelFsp2WrapperPkg for 2 lib
> > classes to point to the same include file.
> >
> > Do you have a recommended fix for this issue?
> >
> > I am ok with this YAML file that ignores the error, but I think a new
> > issue should be opened to fix this package to follow the standard
> > package rules.
> >
> > Mike
> >
> >> -Original Message-
> >> From: devel@edk2.groups.io On Behalf Of
> >> Michael Kubacki
> >> Sent: Thursday, September 15, 2022 11:55 AM
> >> To: devel@edk2.groups.io
> >> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> >> ; Zeng, Star
> >> Subject: [edk2-devel] [PATCH v2 5/6] IntelFsp2WrapperPkg: Add CI YAML
> >> file
> >>
> >> From: Michael Kubacki
> >>
> >> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048
> >>
> >> Adds IntelFsp2WrapperPkg to the list of supported build packages for
> >> edk2 CI and defines an initial set of CI configuration options.
> >>
> >> Adds a special case for the Library Class check CI plugin to ignore
> >> FspWrapperPlatformMultiPhaseLib with an explanatory comment.
> >>
> >> Cc: Chasel Chiu
> >> Cc: Nate DeSimone
> >> Cc: Star Zeng
> >> Signed-off-by: Michael Kubacki
> >> ---
> >> .pytool/CISettings.py | 1 +
> >> IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml | 96
>
> >> 2 files changed, 97 insertions(+)
> >>
> >> diff --git a/.pytool/CISettings.py b/.pytool/CISettings.py index
> >> 0205c26a58f8..d9a260784e59 100644
> >> --- a/.pytool/CISettings.py
> >> +++ b/.pytool/CISettings.py
> >> @@ -55,6 +55,7 @@ class Settings(CiBuildSettingsManager,
> UpdateSettingsManager, SetupSettingsManag
> >> "DynamicTablesPkg",
> >> "EmulatorPkg",
> >> "IntelFsp2Pkg",
> >> +"IntelFsp2WrapperPkg",
> >> "MdePkg",
> >> "MdeModulePkg",
> >> "NetworkPkg",
> >> diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml
> >> b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml
> >> new file mode 100644
> >> index ..55f28d90870c
> >> --- /dev/null
> >> +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml
> >> @@ -0,0 +1,96 @@
> >> +## @file
> >> +# Core CI configuration for IntelFsp2WrapperPkg # # Copyright (c)
> >> +Microsoft Corporation # # SPDX-License-Identifier:
> >> +BSD-2-Clause-Patent ## {
> >> +## options defined .pytool/Plugin/LicenseCheck
> >> +"LicenseCheck": {
> >> +"IgnoreFiles": []
> >> +},
> >> +
> >> +"EccCheck": {
> >> +## Exception sample looks like below:
> >> +## "ExceptionList": [
> >> +## "", ""
> >> +## ]
> >> +"ExceptionList": [
> >> +],
> >> +## Both file path and directory path are accepted.
> >> +
[edk2-devel] [PATCH 1/4] IntelFsp2Pkg: Add FSP 2.4 MultiPhase interface.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916
Provide FSP 2.4 MultiPhase interface and scripts
support.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c | 176
IntelFsp2Pkg/Include/FspEas/FspApi.h | 62
--
IntelFsp2Pkg/Include/FspGlobalData.h | 5 -
IntelFsp2Pkg/Include/Library/FspMultiPhaseLib.h| 54
++
IntelFsp2Pkg/IntelFsp2Pkg.dec | 12
++--
IntelFsp2Pkg/IntelFsp2Pkg.dsc | 4
IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf | 50
++
IntelFsp2Pkg/Tools/SplitFspBin.py | 48
+---
8 files changed, 383 insertions(+), 28 deletions(-)
diff --git a/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c
b/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c
new file mode 100644
index 00..728ac4c2c1
--- /dev/null
+++ b/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c
@@ -0,0 +1,176 @@
+/** @file
+ Null instance of Platform Sec Lib.
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+EFI_STATUS
+EFIAPI
+FspMultiPhaseSwitchStack (
+ )
+{
+ SetFspApiReturnStatus (EFI_SUCCESS);
+ Pei2LoaderSwitchStack ();
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+FspVariableRequestSwitchStack (
+ IN FSP_MULTI_PHASE_VARIABLE_REQUEST_INFO_PARAMS *FspVariableRequestParams
+ )
+{
+ FSP_GLOBAL_DATA *FspData;
+
+ FspData = GetFspGlobalDataPointer ();
+ if (((UINTN)FspData == 0) || ((UINTN)FspData == 0x)) {
+return EFI_UNSUPPORTED;
+ }
+
+ FspData->VariableRequestParameterPtr = (VOID *)FspVariableRequestParams;
+ SetFspApiReturnStatus (FSP_STATUS_VARIABLE_REQUEST);
+ Pei2LoaderSwitchStack ();
+
+ return EFI_SUCCESS;
+}
+
+/**
+ This function supports FspMultiPhase implementation.
+
+ @param[in] ApiIdx Internal index of the FSP API.
+ @param[in] ApiParam Parameter of the FSP API.
+
+ @retval EFI_SUCCESS FSP execution was successful.
+ @retval EFI_INVALID_PARAMETER Input parameters are invalid.
+ @retval EFI_UNSUPPORTED The FSP calling conditions were not met.
+ @retval EFI_DEVICE_ERRORFSP initialization failed.
+**/
+EFI_STATUS
+EFIAPI
+FspMultiPhaseWorker (
+ IN UINT32 ApiIdx,
+ IN VOID*ApiParam
+ )
+{
+ FSP_MULTI_PHASE_PARAMS *FspMultiPhaseParams;
+ FSP_GLOBAL_DATA *FspData;
+ FSP_MULTI_PHASE_GET_NUMBER_OF_PHASES_PARAMS *FspMultiPhaseGetNumber;
+ BOOLEAN FspDataValid;
+
+ FspDataValid = TRUE;
+ FspData = GetFspGlobalDataPointer ();
+ if (((UINTN)FspData == 0) || ((UINTN)FspData == 0x)) {
+FspDataValid = FALSE;
+ }
+
+ //
+ // It is required that FspData->NumberOfPhases to be reset to 0 after
+ // current FSP component finished.
+ // The next component FspData->NumberOfPhases will only be re-initialized
when FspData->NumberOfPhases = 0
+ //
+ if ((FspDataValid == TRUE) && (FspData->NumberOfPhases == 0)) {
+FspData->NumberOfPhases = PcdGet32 (PcdMultiPhaseNumberOfPhases);
+FspData->PhasesExecuted = 0;
+ }
+
+ FspMultiPhaseParams = (FSP_MULTI_PHASE_PARAMS *)ApiParam;
+
+ if (FspDataValid == FALSE) {
+return EFI_DEVICE_ERROR;
+ } else {
+switch (FspMultiPhaseParams->MultiPhaseAction) {
+ case EnumMultiPhaseGetNumberOfPhases:
+if ((FspMultiPhaseParams->MultiPhaseParamPtr == NULL) ||
(FspMultiPhaseParams->PhaseIndex != 0)) {
+ return EFI_INVALID_PARAMETER;
+}
+
+FspMultiPhaseGetNumber =
(FSP_MULTI_PHASE_GET_NUMBER_OF_PHASES_PARAMS
*)FspMultiPhaseParams->MultiPhaseParamPtr;
+FspMultiPhaseGetNumber->NumberOfPhases = FspData->NumberOfPhases;
+FspMultiPhaseGetNumber->PhasesExecuted = FspData->PhasesExecuted;
+break;
+
+ case EnumMultiPhaseExecutePhase:
+if ((FspMultiPhaseParams->PhaseIndex > FspData->PhasesExecuted) &&
(FspMultiPhaseParams->PhaseIndex <= FspData->NumberOfPhases)) {
+ FspData->PhasesExecuted = FspMultiPhaseParams->PhaseIndex;
+ return Loader2PeiSwitchStack ();
+} else {
+ return EFI_INVALID_PARAMETER;
+}
+
+break;
+
+ case
[edk2-devel] [PATCH 0/4] IntelFsp2(Wrapper)Pkg: Support FSP 2.4 MultiPhase.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916 Add FSP 2.4 MultiPhase interfaces and implementation. Cc: Nate DeSimone Cc: Star Zeng Signed-off-by: Chasel Chiu Chasel Chiu (4): IntelFsp2Pkg: Add FSP 2.4 MultiPhase interface. IntelFsp2WrapperPkg: Add FSP 2.4 MultiPhase interface. IntelFsp2Pkg: Adopt FSP 2.4 MultiPhase functions. IntelFsp2WrapperPkg: Implement FSP 2.4 MultiPhase wrapper handlers. IntelFsp2Pkg/FspSecCore/SecFsp.c | 4 IntelFsp2Pkg/FspSecCore/SecFspApiChk.c | 9 + IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c | 176 IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c | 33 + IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c | 27 +-- IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c | 337 + IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf | 75 +++ IntelFsp2Pkg/FspSecCore/Fsp24SecCoreS.inf | 59 +++ IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm | 304 IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryS.nasm | 101 + IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryCommon.nasm | 3 +++ IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm | 303 +++ IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryS.nasm | 108 IntelFsp2Pkg/FspSecCore/X64/FspApiEntryCommon.nasm | 3 +++ IntelFsp2Pkg/Include/FspEas/FspApi.h | 62 -- IntelFsp2Pkg/Include/FspGlobalData.h | 5 - IntelFsp2Pkg/Include/Library/FspMultiPhaseLib.h | 54 ++ IntelFsp2Pkg/IntelFsp2Pkg.dec | 12 ++-- IntelFsp2Pkg/IntelFsp2Pkg.dsc | 4 IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf | 50 ++ IntelFsp2Pkg/Tools/SplitFspBin.py | 48 +--- IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf | 1 + IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf | 3 ++- IntelFsp2WrapperPkg/Include/Library/FspWrapperMultiPhaseProcessLib.h | 38 ++ IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 6 +- IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc | 4 +++- IntelFsp2WrapperPkg/Library
[edk2-devel] [PATCH 4/4] IntelFsp2WrapperPkg: Implement FSP 2.4 MultiPhase wrapper handlers.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916
Implement MultiPhase wrapper handlers and only call to MultiPhase
handlers when FSP supports.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c | 33
+
IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c | 27
+--
IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf | 1 +
IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf | 3 ++-
4 files changed, 49 insertions(+), 15 deletions(-)
diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
index ac27524d08..ea206a7960 100644
--- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
+++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
@@ -23,6 +23,7 @@
#include
#include
#include
+#include
#include
#include
@@ -35,6 +36,8 @@
#include
#include
#include
+#include
+#include
extern EFI_GUID gFspHobGuid;
@@ -119,25 +122,39 @@ PeiFspMemoryInit (
TimeStampCounterStart = AsmReadTsc ();
Status= CallFspMemoryInit (FspmUpdDataPtr, );
- // Create hobs after memory initialization and not in temp RAM. Hence
passing the recorded timestamp here
- PERF_START_EX (, "EventRec", NULL,
TimeStampCounterStart, FSP_STATUS_CODE_MEMORY_INIT |
FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY);
- PERF_END_EX (, "EventRec", NULL, 0,
FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE |
FSP_STATUS_CODE_API_EXIT);
- DEBUG ((DEBUG_INFO, "Total time spent executing FspMemoryInitApi: %d
millisecond\n", DivU64x32 (GetTimeInNanoSecond (AsmReadTsc () -
TimeStampCounterStart), 100)));
//
// Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status
//
if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <=
FSP_STATUS_RESET_REQUIRED_8)) {
-DEBUG ((DEBUG_INFO, "FspMemoryInitApi requested reset 0x%x\n", Status));
+DEBUG ((DEBUG_INFO, "FspMemoryInitApi requested reset %r\n", Status));
CallFspWrapperResetSystem (Status);
}
- if (EFI_ERROR (Status)) {
+ if ((Status != FSP_STATUS_VARIABLE_REQUEST) && EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "ERROR - Failed to execute FspMemoryInitApi(), Status
= %r\n", Status));
+ASSERT_EFI_ERROR (Status);
}
- DEBUG ((DEBUG_INFO, "FspMemoryInit status: 0x%x\n", Status));
- ASSERT_EFI_ERROR (Status);
+ DEBUG ((DEBUG_INFO, "FspMemoryInit status: %r\n", Status));
+ if (Status == FSP_STATUS_VARIABLE_REQUEST) {
+//
+// call to Variable request handler
+//
+FspWrapperVariableRequestHandler (,
FspMultiPhaseMemInitApiIndex);
+ }
+
+ //
+ // See if MultiPhase process is required or not
+ //
+ FspWrapperMultiPhaseHandler (, FspMultiPhaseMemInitApiIndex);
// FspM MultiPhase
+
+ //
+ // Create hobs after memory initialization and not in temp RAM. Hence
passing the recorded timestamp here
+ //
+ PERF_START_EX (, "EventRec", NULL,
TimeStampCounterStart, FSP_STATUS_CODE_MEMORY_INIT |
FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY);
+ PERF_END_EX (, "EventRec", NULL, 0,
FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE |
FSP_STATUS_CODE_API_EXIT);
+ DEBUG ((DEBUG_INFO, "Total time spent executing FspMemoryInitApi: %d
millisecond\n", DivU64x32 (GetTimeInNanoSecond (AsmReadTsc () -
TimeStampCounterStart), 100)));
Status = TestFspMemoryInitApiOutput (FspmUpdDataPtr, );
if (EFI_ERROR (Status)) {
diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
index ee48dd69d3..a41c809c62 100644
--- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
+++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
@@ -21,6 +21,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -36,6 +37,7 @@
#include
#include
#include
+#include
extern EFI_PEI_NOTIFY_DESCRIPTOR mS3EndOfPeiNotifyDesc;
extern EFI_GUID gFspHobGuid;
@@ -318,23 +320,36 @@ PeiMemoryDiscoveredNotify (
TimeStampCounterStart = AsmReadTsc ();
PERF_START_EX (, "EventRec", NULL, 0,
FSP_STATUS_CODE_SILICON_INIT | FSP_STATUS_CODE_COMMON_CODE |
FSP_STATUS_CODE_API_ENTRY);
Status = CallFspSiliconInit ((VOID *)FspsUpdDataPtr);
- PERF_END_EX (, "EventRec", NULL, 0,
FSP_STATUS_CODE_SILICON_INIT | FSP_STATUS_CODE_COMMON_CODE |
FSP_STATUS_CODE_API_EXIT);
- DEBUG ((DEBUG_INFO, "Total time spent executing FspSiliconInitApi: %d
millisecond\n", DivU64x32 (GetTimeInNanoSecond (AsmReadTsc () -
TimeStampCounterStart), 100)));
//
// Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status
//
if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <=
FSP_STATUS_RESET_REQUIRED_8)) {
-DEBUG ((DEBUG_INFO, "FspSiliconInitApi requested reset 0x%x\n", Status));
+DEBUG ((DEBUG_INFO,
[edk2-devel] [PATCH 3/4] IntelFsp2Pkg: Adopt FSP 2.4 MultiPhase functions.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916
Adopt MultiPhase functions for both FspSecCoreS and FspSecCoreM.
For backward compatibility, new INF are created for new modules.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/FspSecCore/SecFsp.c| 4
IntelFsp2Pkg/FspSecCore/SecFspApiChk.c | 9 +
IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf | 75
+++
IntelFsp2Pkg/FspSecCore/Fsp24SecCoreS.inf | 59
+++
IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm| 304
IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryS.nasm| 101
+
IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryCommon.nasm | 3 +++
IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm | 303
+++
IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryS.nasm | 108
IntelFsp2Pkg/FspSecCore/X64/FspApiEntryCommon.nasm | 3 +++
10 files changed, 969 insertions(+)
diff --git a/IntelFsp2Pkg/FspSecCore/SecFsp.c b/IntelFsp2Pkg/FspSecCore/SecFsp.c
index d9085ef51f..11be1f97ca 100644
--- a/IntelFsp2Pkg/FspSecCore/SecFsp.c
+++ b/IntelFsp2Pkg/FspSecCore/SecFsp.c
@@ -135,6 +135,10 @@ FspGlobalDataInit (
PeiFspData->CoreStack = BootLoaderStack;
PeiFspData->PerfIdx = 2;
PeiFspData->PerfSig = FSP_PERFORMANCE_DATA_SIGNATURE;
+ //
+ // Cache FspHobList pointer passed by bootloader via ApiParameter2
+ //
+ PeiFspData->FspHobListPtr = (VOID **)GetFspApiParameter2 ();
SetFspMeasurePoint (FSP_PERF_ID_API_FSP_MEMORY_INIT_ENTRY);
diff --git a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
index 35d223a404..a44fbf2a50 100644
--- a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
+++ b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
@@ -69,8 +69,17 @@ FspApiCallingCheck (
Status = EFI_UNSUPPORTED;
} else if (EFI_ERROR (FspUpdSignatureCheck (FspSiliconInitApiIndex,
ApiParam))) {
Status = EFI_INVALID_PARAMETER;
+ } else if (ApiIdx == FspSiliconInitApiIndex) {
+//
+// Reset MultiPhase NumberOfPhases to zero
+//
+FspData->NumberOfPhases = 0;
}
}
+ } else if (ApiIdx == FspMultiPhaseMemInitApiIndex) {
+if ((FspData == NULL) || ((UINTN)FspData == MAX_ADDRESS) ||
((UINTN)FspData == MAX_UINT32)) {
+ Status = EFI_UNSUPPORTED;
+}
} else if (ApiIdx == FspSmmInitApiIndex) {
//
// FspSmmInitApiIndex check
diff --git a/IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf
b/IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf
new file mode 100644
index 00..e93e176f15
--- /dev/null
+++ b/IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf
@@ -0,0 +1,75 @@
+## @file
+# Sec Core for FSP to support MultiPhase (SeparatePhase) MemInitialization.
+#
+# Copyright (c) 2022, Intel Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION= 0x00010005
+ BASE_NAME = Fsp24SecCoreM
+ FILE_GUID = C5BC0719-4A23-4F6E-94DA-05FB6A0DFA9C
+ MODULE_TYPE= SEC
+ VERSION_STRING = 1.0
+
+#
+# The following information is for reference only and not required by the
build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[Sources]
+ SecMain.c
+ SecMain.h
+ SecFsp.c
+ SecFsp.h
+ SecFspApiChk.c
+
+[Sources.IA32]
+ Ia32/Stack.nasm
+ Ia32/Fsp24ApiEntryM.nasm
+ Ia32/FspApiEntryCommon.nasm
+ Ia32/FspHelper.nasm
+ Ia32/ReadEsp.nasm
+
+[Sources.X64]
+ X64/Stack.nasm
+ X64/Fsp24ApiEntryM.nasm
+ X64/FspApiEntryCommon.nasm
+ X64/FspHelper.nasm
+ X64/ReadRsp.nasm
+
+[Binaries.Ia32]
+ RAW|Vtf0/Bin/ResetVec.ia32.raw |GCC
+
+[Packages]
+ MdePkg/MdePkg.dec
+ IntelFsp2Pkg/IntelFsp2Pkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+ BaseMemoryLib
+ DebugLib
+ BaseLib
+ PciCf8Lib
+ SerialPortLib
+ FspSwitchStackLib
+ FspCommonLib
+ FspSecPlatformLib
+ CpuLib
+ UefiCpuLib
+ FspMultiPhaseLib
+
+[Pcd]
+ gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES
+
[edk2-devel] [PATCH 2/4] IntelFsp2WrapperPkg: Add FSP 2.4 MultiPhase interface.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916
Provide FSP 2.4 MultiPhase wrapper support library.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c
| 337
+
IntelFsp2WrapperPkg/Include/Library/FspWrapperMultiPhaseProcessLib.h
| 38 ++
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
| 6 +-
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc
| 4 +++-
IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/FspWrapperMultiPhaseProcessLib.inf
| 47 +++
5 files changed, 430 insertions(+), 2 deletions(-)
diff --git
a/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c
b/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c
new file mode 100644
index 00..25fac73bac
--- /dev/null
+++
b/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c
@@ -0,0 +1,337 @@
+/** @file
+ Support FSP MultiPhase process.
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/**
+ Execute 32-bit FSP API entry code.
+
+ @param[in] Function The 32bit code entry to be executed.
+ @param[in] Param1 The first parameter to pass to 32bit code.
+ @param[in] Param2 The second parameter to pass to 32bit code.
+
+ @return EFI_STATUS.
+**/
+EFI_STATUS
+Execute32BitCode (
+ IN UINT64 Function,
+ IN UINT64 Param1,
+ IN UINT64 Param2
+ );
+
+/**
+ Execute 64-bit FSP API entry code.
+
+ @param[in] Function The 64bit code entry to be executed.
+ @param[in] Param1 The first parameter to pass to 64bit code.
+ @param[in] Param2 The second parameter to pass to 64bit code.
+
+ @return EFI_STATUS.
+**/
+EFI_STATUS
+Execute64BitCode (
+ IN UINT64 Function,
+ IN UINT64 Param1,
+ IN UINT64 Param2
+ );
+
+/**
+ Call FspsMultiPhase API.
+
+ @param[in] FspsMultiPhaseParams - Parameters for MultiPhase API.
+
+ @return EFI_UNSUPPORTED - the requested FspsMultiPhase API is not supported.
+ @return EFI_DEVICE_ERROR - the FSP header was not found.
+ @return EFI status returned by FspsMultiPhase API.
+**/
+EFI_STATUS
+EFIAPI
+CallFspMultiPhaseEntry (
+ IN VOID *FspMultiPhaseParams,
+ IN OUT VOID **FspHobListPtr,
+ IN UINT8 ComponentIndex
+ )
+{
+ FSP_INFO_HEADER *FspHeader;
+ //
+ // FSP_MULTI_PHASE_INIT and FSP_MULTI_PHASE_SI_INIT API functions having
same prototype.
+ //
+ UINTN FspMultiPhaseApiEntry;
+ UINTN FspMultiPhaseApiOffset;
+ EFI_STATUS Status;
+ BOOLEAN InterruptState;
+
+ if (ComponentIndex == FspMultiPhaseMemInitApiIndex) {
+FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32
(PcdFspmBaseAddress));
+if (FspHeader == NULL) {
+ return EFI_DEVICE_ERROR;
+}
+
+FspMultiPhaseApiOffset = FspHeader->FspMultiPhaseMemInitEntryOffset;
+ } else if (ComponentIndex == FspMultiPhaseSiInitApiIndex) {
+FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32
(PcdFspsBaseAddress));
+if (FspHeader == NULL) {
+ return EFI_DEVICE_ERROR;
+}
+
+FspMultiPhaseApiOffset = FspHeader->FspMultiPhaseSiInitEntryOffset;
+ }
+
+ if (FspMultiPhaseApiOffset == 0) {
+return EFI_UNSUPPORTED;
+ }
+
+ FspMultiPhaseApiEntry = FspHeader->ImageBase + FspMultiPhaseApiOffset;
+ InterruptState= SaveAndDisableInterrupts ();
+ if ((FspHeader->ImageAttribute & BIT2) == 0) {
+// BIT2: IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT
+Status = Execute32BitCode ((UINTN)FspMultiPhaseApiEntry,
(UINTN)FspMultiPhaseParams, (UINTN)NULL);
+ } else {
+Status = Execute64BitCode ((UINTN)FspMultiPhaseApiEntry,
(UINTN)FspMultiPhaseParams, (UINTN)NULL);
+ }
+
+ SetInterruptState (InterruptState);
+
+ DEBUG ((DEBUG_ERROR, "CallFspMultiPhaseEntry return Status %r \n", Status));
+
+ return Status;
+}
+
+/**
+ FSP Wrapper Variable Request Handler
+
+ @retval EFI_UNSUPPORTED FSP Wrapper cannot support the specific variable
request
+ @retval EFI_STATUSReturn FSP returned status
+
+**/
+EFI_STATUS
+EFIAPI
+FspWrapperVariableRequestHandler (
+ IN OUT VOID **FspHobListPtr,
+ IN UINT8 ComponentIndex
+ )
+{
+ EFI_STATUS
[edk2-devel] [PATCH] IntelFsp2Pkg: FSPM_ARCH2_UPD mismatching bug.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4019 FSPM_ARCH2_UPD in FspApiEntryM.nasm was not up-to-date and should be fixed. Cc: Nate DeSimone Cc: Star Zeng Signed-off-by: Chasel Chiu --- IntelFsp2Pkg/FspSecCore/X64/FspApiEntryM.nasm | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryM.nasm b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryM.nasm index dacf515845..2d2f75b1f0 100644 --- a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryM.nasm +++ b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryM.nasm @@ -22,12 +22,13 @@ struc FSPM_UPD_COMMON_FSP24 .Revision: resb 1 .Reserved: resb 3 .Length resd 1 +.NvsBufferPtr resq 1 .StackBase: resq 1 .StackSize: resq 1 .BootLoaderTolumSize: resd 1 .BootMode: resd 1 .FspEventHandlerresq 1 -.Reserved1: resb 24 +.Reserved1: resb 16 ; } .size: endstruc -- 2.35.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#92415): https://edk2.groups.io/g/devel/message/92415 Mute This Topic: https://groups.io/mt/93031129/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v2] IntelFsp2Pkg: FSPM_ARCH2_UPD mismatching bug.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4019 FSPM_ARCH2_UPD in FspApiEntryM.nasm was not up-to-date and should be fixed for both IA32 and X64 builds. Cc: Nate DeSimone Cc: Star Zeng Signed-off-by: Chasel Chiu --- IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm | 3 ++- IntelFsp2Pkg/FspSecCore/X64/FspApiEntryM.nasm | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm index 5dada2af54..61ab4612a3 100644 --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm @@ -40,12 +40,13 @@ struc FSPM_UPD_COMMON_FSP24 .Revision: resb 1 .Reserved: resb 3 .Length resd 1 +.NvsBufferPtr resq 1 .StackBase: resq 1 .StackSize: resq 1 .BootLoaderTolumSize: resd 1 .BootMode: resd 1 .FspEventHandlerresq 1 -.Reserved1: resb 24 +.Reserved1: resb 16 ; } .size: endstruc diff --git a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryM.nasm b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryM.nasm index dacf515845..2d2f75b1f0 100644 --- a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryM.nasm +++ b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryM.nasm @@ -22,12 +22,13 @@ struc FSPM_UPD_COMMON_FSP24 .Revision: resb 1 .Reserved: resb 3 .Length resd 1 +.NvsBufferPtr resq 1 .StackBase: resq 1 .StackSize: resq 1 .BootLoaderTolumSize: resd 1 .BootMode: resd 1 .FspEventHandlerresq 1 -.Reserved1: resb 24 +.Reserved1: resb 16 ; } .size: endstruc -- 2.35.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#92416): https://edk2.groups.io/g/devel/message/92416 Mute This Topic: https://groups.io/mt/93031167/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v1] MinPlatformPkg: Add PcdAcpiGpe1BlockLength for FADT from board package
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Chen, Aryeh
> Sent: Monday, August 15, 2022 1:36 AM
> To: devel@edk2.groups.io
> Cc: Chen, Aryeh ; Chiu, Chasel
> ; Desimone, Nathaniel L
> ; Oram, Isaac W ;
> Gao, Liming ; Dong, Eric
> Subject: [PATCH v1] MinPlatformPkg: Add PcdAcpiGpe1BlockLength for FADT
> from board package
>
> From: Aryeh Chen
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4020
>
> Add PcdAcpiGpe1BlockLength of FADT Gpe1BlkLen register on MinPlatformPkg
> for PlatformBoardpkg to update platform setting.
>
> Signed-off-by: Aryeh Chen
> Cc: Chasel Chiu
> Cc: Nate DeSimone
> Cc: Isaac Oram
> Cc: Liming Gao
> Cc: Eric Dong
> ---
> Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 3 ++-
> Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf | 1 +
> Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 1 +
> 3 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> index f134c8a58f..6e57b638e0 100644
> --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> @@ -88,7 +88,7 @@ EFI_STATUS
> AppendCpuMapTableEntry ( IN VOID *ApicPtr, IN UINT32
> LocalApicCounter,-IN EFI_CPU_ID_ORDER_MAP *CpuApicIdOrderTable +IN
> EFI_CPU_ID_ORDER_MAP *CpuApicIdOrderTable ) { EFI_STATUSStatus;@@
> -,6 +,7 @@ PlatformUpdateTables (
> FadtHeader->Gpe0Blk = PcdGet16
> (PcdAcpiGpe0BlockAddress);
> FadtHeader->Gpe0BlkLen= PcdGet8
> (PcdAcpiGpe0BlockLength);
> FadtHeader->Gpe1Blk = PcdGet16
> (PcdAcpiGpe1BlockAddress);+
> FadtHeader->Gpe1BlkLen= PcdGet8
> (PcdAcpiGpe1BlockLength);
> FadtHeader->Gpe1Base = PcdGet8 (PcdAcpiGpe1Base);
> FadtHeader->XPm1aEvtBlk.Address = PcdGet16
> (PcdAcpiPm1AEventBlockAddress);diff --git
> a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
> b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
> index 89350828d6..451034fb8a 100644
> --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
> +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
> @@ -84,6 +84,7 @@
>gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress+
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockLength
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegisterAccessSize
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSizediff --git
> a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> index db0a19066f..8e603b7bf9 100644
> --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> @@ -123,6 +123,7 @@
>
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress|0x1880|UINT16|0
> x0001003B
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength|0x00|UINT8|0x000
> 1003C
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x|UINT16|0
> x0001003D+
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockLength|0x00|UINT8|0x000
> 1003E
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base|0x00|UINT8|0x00010040
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegisterAccessSize|0x00|UINT8
> |0x00010042 --
> 2.26.2.windows.1
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[edk2-devel] [PATCH v2 2/4] IntelFsp2WrapperPkg: Add FSP 2.4 MultiPhase interface.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916
Provide FSP 2.4 MultiPhase wrapper support library.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSample/FspWrapperPlatformMultiPhaseLibSample.c
| 49 +
IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c
| 355
+++
IntelFsp2WrapperPkg/Include/Library/FspWrapperMultiPhaseProcessLib.h
| 62
++
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
| 10 +-
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc
| 6 +-
IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSample/BaseFspWrapperPlatformMultiPhaseLibSample.inf
| 37 +
IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/FspWrapperMultiPhaseProcessLib.inf
| 48
7 files changed, 565 insertions(+), 2 deletions(-)
diff --git
a/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSample/FspWrapperPlatformMultiPhaseLibSample.c
b/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSample/FspWrapperPlatformMultiPhaseLibSample.c
new file mode 100644
index 00..ef8819203d
--- /dev/null
+++
b/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSample/FspWrapperPlatformMultiPhaseLibSample.c
@@ -0,0 +1,49 @@
+/** @file
+ Support FSP MultiPhase process.
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include
+#include
+#include
+
+/**
+ FSP Wrapper Platform MultiPhase Handler
+
+ @param[in] FspHobListPtr- Pointer to FSP HobList (valid after FSP-M
completed)
+ @param[in] ComponentIndex - FSP Component which executing MultiPhase
initialization.
+ @param[in] PhaseIndex - Indicates current execution phase of FSP
MultiPhase initialization.
+
+ @retval EFI_STATUSAlways return EFI_SUCCESS
+
+**/
+VOID
+EFIAPI
+FspWrapperPlatformMultiPhaseHandler (
+ IN OUT VOID **FspHobListPtr,
+ IN UINT8 ComponentIndex,
+ IN UINT32PhaseIndex
+ )
+{
+ /* Example platform actions as below
+ switch (ComponentIndex) {
+ case FspMultiPhaseMemInitApiIndex:
+switch (PhaseIndex) {
+ case 1:
+PlatformAction1 ();
+ break;
+}
+break;
+ case FspMultiPhaseSiInitApiIndex:
+switch (PhaseIndex) {
+ case 1:
+PlatformAction2 ();
+ break;
+}
+break;
+ }
+ */
+}
diff --git
a/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c
b/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c
new file mode 100644
index 00..c29a8277df
--- /dev/null
+++
b/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c
@@ -0,0 +1,355 @@
+/** @file
+ Support FSP MultiPhase process.
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/**
+ Execute 32-bit FSP API entry code.
+
+ @param[in] Function The 32bit code entry to be executed.
+ @param[in] Param1 The first parameter to pass to 32bit code.
+ @param[in] Param2 The second parameter to pass to 32bit code.
+
+ @return EFI_STATUS.
+**/
+EFI_STATUS
+Execute32BitCode (
+ IN UINT64 Function,
+ IN UINT64 Param1,
+ IN UINT64 Param2
+ );
+
+/**
+ Execute 64-bit FSP API entry code.
+
+ @param[in] Function The 64bit code entry to be executed.
+ @param[in] Param1 The first parameter to pass to 64bit code.
+ @param[in] Param2 The second parameter to pass to 64bit code.
+
+ @return EFI_STATUS.
+**/
+EFI_STATUS
+Execute64BitCode (
+ IN UINT64 Function,
+ IN UINT64 Param1,
+ IN UINT64 Param2
+ );
+
+/**
+ Call FspsMultiPhase API.
+
+ @param[in] FspsMultiPhaseParams - Parameters for MultiPhase API.
+ @param[in] FspHobListPtr- Pointer to FSP HobList (valid after FSP-M
completed)
+ @param[in] ComponentIndex - FSP Component which executing MultiPhase
initialization.
+
+
[edk2-devel] [PATCH v2 1/4] IntelFsp2Pkg: Add FSP 2.4 MultiPhase interface.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916
Provide FSP 2.4 MultiPhase interface and scripts
support.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c | 184
IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c | 30
++
IntelFsp2Pkg/Include/FspEas/FspApi.h | 62
--
IntelFsp2Pkg/Include/FspGlobalData.h | 5 -
IntelFsp2Pkg/Include/Library/FspMultiPhaseLib.h| 54
++
IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h | 19
+++
IntelFsp2Pkg/IntelFsp2Pkg.dec | 12
++--
IntelFsp2Pkg/IntelFsp2Pkg.dsc | 4
IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf | 50
++
IntelFsp2Pkg/Tools/SplitFspBin.py | 48
+---
10 files changed, 440 insertions(+), 28 deletions(-)
diff --git a/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c
b/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c
new file mode 100644
index 00..1ab355085b
--- /dev/null
+++ b/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c
@@ -0,0 +1,184 @@
+/** @file
+ Null instance of Platform Sec Lib.
+
+ Copyright (c) 2022, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+EFI_STATUS
+EFIAPI
+FspMultiPhaseSwitchStack (
+ )
+{
+ SetFspApiReturnStatus (EFI_SUCCESS);
+ Pei2LoaderSwitchStack ();
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+FspVariableRequestSwitchStack (
+ IN FSP_MULTI_PHASE_VARIABLE_REQUEST_INFO_PARAMS *FspVariableRequestParams
+ )
+{
+ FSP_GLOBAL_DATA *FspData;
+
+ FspData = GetFspGlobalDataPointer ();
+ if (((UINTN)FspData == 0) || ((UINTN)FspData == 0x)) {
+return EFI_UNSUPPORTED;
+ }
+
+ FspData->VariableRequestParameterPtr = (VOID *)FspVariableRequestParams;
+ SetFspApiReturnStatus (FSP_STATUS_VARIABLE_REQUEST);
+ Pei2LoaderSwitchStack ();
+
+ return EFI_SUCCESS;
+}
+
+/**
+ This function supports FspMultiPhase implementation.
+
+ @param[in] ApiIdx Internal index of the FSP API.
+ @param[in] ApiParam Parameter of the FSP API.
+
+ @retval EFI_SUCCESS FSP execution was successful.
+ @retval EFI_INVALID_PARAMETER Input parameters are invalid.
+ @retval EFI_UNSUPPORTED The FSP calling conditions were not met.
+ @retval EFI_DEVICE_ERRORFSP initialization failed.
+**/
+EFI_STATUS
+EFIAPI
+FspMultiPhaseWorker (
+ IN UINT32 ApiIdx,
+ IN VOID*ApiParam
+ )
+{
+ FSP_MULTI_PHASE_PARAMS *FspMultiPhaseParams;
+ FSP_GLOBAL_DATA *FspData;
+ FSP_MULTI_PHASE_GET_NUMBER_OF_PHASES_PARAMS *FspMultiPhaseGetNumber;
+ BOOLEAN FspDataValid;
+ UINT32 NumberOfPhasesSupported;
+
+ FspDataValid = TRUE;
+ FspData = GetFspGlobalDataPointer ();
+ if (((UINTN)FspData == 0) || ((UINTN)FspData == 0x)) {
+FspDataValid = FALSE;
+ }
+
+ //
+ // It is required that FspData->NumberOfPhases to be reset to 0 after
+ // current FSP component finished.
+ // The next component FspData->NumberOfPhases will only be re-initialized
when FspData->NumberOfPhases = 0
+ //
+ if ((FspDataValid == TRUE) && (FspData->NumberOfPhases == 0)) {
+FspData->NumberOfPhases = PcdGet32 (PcdMultiPhaseNumberOfPhases);
+FspData->PhasesExecuted = 0;
+if (FspMultiPhasePlatformGetNumberOfPhases (ApiIdx,
) == TRUE) {
+ //
+ // Platform has implemented runtime controling for
NumberOfPhasesSupported
+ //
+ FspData->NumberOfPhases = NumberOfPhasesSupported;
+}
+ }
+
+ FspMultiPhaseParams = (FSP_MULTI_PHASE_PARAMS *)ApiParam;
+
+ if (FspDataValid == FALSE) {
+return EFI_DEVICE_ERROR;
+ } else {
+switch (FspMultiPhaseParams->MultiPhaseAction) {
+ case EnumMultiPhaseGetNumberOfPhases:
+if ((FspMultiPhaseParams->MultiPhaseParamPtr == NULL) ||
(FspMultiPhaseParams->PhaseIndex != 0)) {
+ return EFI_INVALID_PARAMETER;
+}
+
+FspMultiPhaseGetNumber =
(FSP_MULTI_PHASE_GET_NUMBER_OF_PHASES_PARAMS
*)FspMultiPhaseParams->MultiPhaseParamPtr;
+FspMultiPhaseGetNumber->NumberOfPhases =
[edk2-devel] [PATCH v2 3/4] IntelFsp2Pkg: Adopt FSP 2.4 MultiPhase functions.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916
Adopt MultiPhase functions for both FspSecCoreS and FspSecCoreM.
For backward compatibility, new INF are created for new modules.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/FspSecCore/SecFsp.c| 4
IntelFsp2Pkg/FspSecCore/SecFspApiChk.c | 9 +
IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf | 75
+++
IntelFsp2Pkg/FspSecCore/Fsp24SecCoreS.inf | 59
+++
IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm| 304
IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryS.nasm| 101
+
IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryCommon.nasm | 3 +++
IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm | 303
+++
IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryS.nasm | 108
IntelFsp2Pkg/FspSecCore/X64/FspApiEntryCommon.nasm | 3 +++
10 files changed, 969 insertions(+)
diff --git a/IntelFsp2Pkg/FspSecCore/SecFsp.c b/IntelFsp2Pkg/FspSecCore/SecFsp.c
index d9085ef51f..11be1f97ca 100644
--- a/IntelFsp2Pkg/FspSecCore/SecFsp.c
+++ b/IntelFsp2Pkg/FspSecCore/SecFsp.c
@@ -135,6 +135,10 @@ FspGlobalDataInit (
PeiFspData->CoreStack = BootLoaderStack;
PeiFspData->PerfIdx = 2;
PeiFspData->PerfSig = FSP_PERFORMANCE_DATA_SIGNATURE;
+ //
+ // Cache FspHobList pointer passed by bootloader via ApiParameter2
+ //
+ PeiFspData->FspHobListPtr = (VOID **)GetFspApiParameter2 ();
SetFspMeasurePoint (FSP_PERF_ID_API_FSP_MEMORY_INIT_ENTRY);
diff --git a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
index 35d223a404..a44fbf2a50 100644
--- a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
+++ b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
@@ -69,8 +69,17 @@ FspApiCallingCheck (
Status = EFI_UNSUPPORTED;
} else if (EFI_ERROR (FspUpdSignatureCheck (FspSiliconInitApiIndex,
ApiParam))) {
Status = EFI_INVALID_PARAMETER;
+ } else if (ApiIdx == FspSiliconInitApiIndex) {
+//
+// Reset MultiPhase NumberOfPhases to zero
+//
+FspData->NumberOfPhases = 0;
}
}
+ } else if (ApiIdx == FspMultiPhaseMemInitApiIndex) {
+if ((FspData == NULL) || ((UINTN)FspData == MAX_ADDRESS) ||
((UINTN)FspData == MAX_UINT32)) {
+ Status = EFI_UNSUPPORTED;
+}
} else if (ApiIdx == FspSmmInitApiIndex) {
//
// FspSmmInitApiIndex check
diff --git a/IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf
b/IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf
new file mode 100644
index 00..e93e176f15
--- /dev/null
+++ b/IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf
@@ -0,0 +1,75 @@
+## @file
+# Sec Core for FSP to support MultiPhase (SeparatePhase) MemInitialization.
+#
+# Copyright (c) 2022, Intel Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION= 0x00010005
+ BASE_NAME = Fsp24SecCoreM
+ FILE_GUID = C5BC0719-4A23-4F6E-94DA-05FB6A0DFA9C
+ MODULE_TYPE= SEC
+ VERSION_STRING = 1.0
+
+#
+# The following information is for reference only and not required by the
build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[Sources]
+ SecMain.c
+ SecMain.h
+ SecFsp.c
+ SecFsp.h
+ SecFspApiChk.c
+
+[Sources.IA32]
+ Ia32/Stack.nasm
+ Ia32/Fsp24ApiEntryM.nasm
+ Ia32/FspApiEntryCommon.nasm
+ Ia32/FspHelper.nasm
+ Ia32/ReadEsp.nasm
+
+[Sources.X64]
+ X64/Stack.nasm
+ X64/Fsp24ApiEntryM.nasm
+ X64/FspApiEntryCommon.nasm
+ X64/FspHelper.nasm
+ X64/ReadRsp.nasm
+
+[Binaries.Ia32]
+ RAW|Vtf0/Bin/ResetVec.ia32.raw |GCC
+
+[Packages]
+ MdePkg/MdePkg.dec
+ IntelFsp2Pkg/IntelFsp2Pkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+ BaseMemoryLib
+ DebugLib
+ BaseLib
+ PciCf8Lib
+ SerialPortLib
+ FspSwitchStackLib
+ FspCommonLib
+ FspSecPlatformLib
+ CpuLib
+ UefiCpuLib
+ FspMultiPhaseLib
+
+[Pcd]
+ gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES
+
[edk2-devel] [PATCH v2 0/4] IntelFsp2(Wrapper)Pkg: Support FSP 2.4 MultiPhase.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916 Add FSP 2.4 MultiPhase interfaces and implementation. Cc: Nate DeSimone Cc: Star Zeng Signed-off-by: Chasel Chiu V2: . Add FspMultiPhasePlatformGetNumberOfPhases() and FspWrapperPlatformMultiPhaseHandler() to support platform porting. . Add FSP reset support in FspWrapperVariableRequestHandler() . Fix bug that wrong parameter given when calling FspWrapperVariableRequestHandler() . Corrected code comments. Chasel Chiu (4): IntelFsp2Pkg: Add FSP 2.4 MultiPhase interface. IntelFsp2WrapperPkg: Add FSP 2.4 MultiPhase interface. IntelFsp2Pkg: Adopt FSP 2.4 MultiPhase functions. IntelFsp2WrapperPkg: Implement FSP 2.4 MultiPhase wrapper handlers. IntelFsp2Pkg/FspSecCore/SecFsp.c | 4 IntelFsp2Pkg/FspSecCore/SecFspApiChk.c | 9 + IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/FspMultiPhaseLib.c | 184 IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c | 30 ++ IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c | 33 + IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c | 27 +-- IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSample/FspWrapperPlatformMultiPhaseLibSample.c | 49 + IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c | 355 +++ IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf | 75 +++ IntelFsp2Pkg/FspSecCore/Fsp24SecCoreS.inf | 59 +++ IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm | 304 IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryS.nasm | 101 + IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryCommon.nasm | 3 +++ IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm | 303 +++ IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryS.nasm | 108 IntelFsp2Pkg/FspSecCore/X64/FspApiEntryCommon.nasm | 3 +++ IntelFsp2Pkg/Include/FspEas/FspApi.h | 62 -- IntelFsp2Pkg/Include/FspGlobalData.h | 5 - IntelFsp2Pkg/Include/Library/FspMultiPhaseLib.h | 54 ++ IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h |
[edk2-devel] [PATCH v2 4/4] IntelFsp2WrapperPkg: Implement FSP 2.4 MultiPhase wrapper handlers.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916
Implement MultiPhase wrapper handlers and only call to MultiPhase
handlers when FSP supports.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c | 33
+
IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c | 27
+--
IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf | 1 +
IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf | 3 ++-
4 files changed, 49 insertions(+), 15 deletions(-)
diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
index ac27524d08..ea206a7960 100644
--- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
+++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
@@ -23,6 +23,7 @@
#include
#include
#include
+#include
#include
#include
@@ -35,6 +36,8 @@
#include
#include
#include
+#include
+#include
extern EFI_GUID gFspHobGuid;
@@ -119,25 +122,39 @@ PeiFspMemoryInit (
TimeStampCounterStart = AsmReadTsc ();
Status= CallFspMemoryInit (FspmUpdDataPtr, );
- // Create hobs after memory initialization and not in temp RAM. Hence
passing the recorded timestamp here
- PERF_START_EX (, "EventRec", NULL,
TimeStampCounterStart, FSP_STATUS_CODE_MEMORY_INIT |
FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY);
- PERF_END_EX (, "EventRec", NULL, 0,
FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE |
FSP_STATUS_CODE_API_EXIT);
- DEBUG ((DEBUG_INFO, "Total time spent executing FspMemoryInitApi: %d
millisecond\n", DivU64x32 (GetTimeInNanoSecond (AsmReadTsc () -
TimeStampCounterStart), 100)));
//
// Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status
//
if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <=
FSP_STATUS_RESET_REQUIRED_8)) {
-DEBUG ((DEBUG_INFO, "FspMemoryInitApi requested reset 0x%x\n", Status));
+DEBUG ((DEBUG_INFO, "FspMemoryInitApi requested reset %r\n", Status));
CallFspWrapperResetSystem (Status);
}
- if (EFI_ERROR (Status)) {
+ if ((Status != FSP_STATUS_VARIABLE_REQUEST) && EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "ERROR - Failed to execute FspMemoryInitApi(), Status
= %r\n", Status));
+ASSERT_EFI_ERROR (Status);
}
- DEBUG ((DEBUG_INFO, "FspMemoryInit status: 0x%x\n", Status));
- ASSERT_EFI_ERROR (Status);
+ DEBUG ((DEBUG_INFO, "FspMemoryInit status: %r\n", Status));
+ if (Status == FSP_STATUS_VARIABLE_REQUEST) {
+//
+// call to Variable request handler
+//
+FspWrapperVariableRequestHandler (,
FspMultiPhaseMemInitApiIndex);
+ }
+
+ //
+ // See if MultiPhase process is required or not
+ //
+ FspWrapperMultiPhaseHandler (, FspMultiPhaseMemInitApiIndex);
// FspM MultiPhase
+
+ //
+ // Create hobs after memory initialization and not in temp RAM. Hence
passing the recorded timestamp here
+ //
+ PERF_START_EX (, "EventRec", NULL,
TimeStampCounterStart, FSP_STATUS_CODE_MEMORY_INIT |
FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY);
+ PERF_END_EX (, "EventRec", NULL, 0,
FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE |
FSP_STATUS_CODE_API_EXIT);
+ DEBUG ((DEBUG_INFO, "Total time spent executing FspMemoryInitApi: %d
millisecond\n", DivU64x32 (GetTimeInNanoSecond (AsmReadTsc () -
TimeStampCounterStart), 100)));
Status = TestFspMemoryInitApiOutput (FspmUpdDataPtr, );
if (EFI_ERROR (Status)) {
diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
index ee48dd69d3..091ddb697a 100644
--- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
+++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
@@ -21,6 +21,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -36,6 +37,7 @@
#include
#include
#include
+#include
extern EFI_PEI_NOTIFY_DESCRIPTOR mS3EndOfPeiNotifyDesc;
extern EFI_GUID gFspHobGuid;
@@ -318,23 +320,36 @@ PeiMemoryDiscoveredNotify (
TimeStampCounterStart = AsmReadTsc ();
PERF_START_EX (, "EventRec", NULL, 0,
FSP_STATUS_CODE_SILICON_INIT | FSP_STATUS_CODE_COMMON_CODE |
FSP_STATUS_CODE_API_ENTRY);
Status = CallFspSiliconInit ((VOID *)FspsUpdDataPtr);
- PERF_END_EX (, "EventRec", NULL, 0,
FSP_STATUS_CODE_SILICON_INIT | FSP_STATUS_CODE_COMMON_CODE |
FSP_STATUS_CODE_API_EXIT);
- DEBUG ((DEBUG_INFO, "Total time spent executing FspSiliconInitApi: %d
millisecond\n", DivU64x32 (GetTimeInNanoSecond (AsmReadTsc () -
TimeStampCounterStart), 100)));
//
// Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED status
//
if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <=
FSP_STATUS_RESET_REQUIRED_8)) {
-DEBUG ((DEBUG_INFO, "FspSiliconInitApi requested reset 0x%x\n", Status));
+DEBUG ((DEBUG_INFO,
Re: [edk2-devel] [PATCH 0/4] IntelFsp2(Wrapper)Pkg: Support FSP 2.4 MultiPhase.
Thanks Nate for detail reviewing and all the good feedbacks!
I have applied all of them and sent a V2 patch series, please help to review
again.
From: Desimone, Nathaniel L
Sent: Thursday, August 4, 2022 5:51 PM
To: Chiu, Chasel ; devel@edk2.groups.io
Cc: Zeng, Star
Subject: RE: [PATCH 0/4] IntelFsp2(Wrapper)Pkg: Support FSP 2.4 MultiPhase.
Hi Chasel,
I have a few comments for you.
First, we should have a platform provided LibraryClass for running code in
between multi-phase actions. Right now you just have this comment in
IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c:
//
// Platform handling can be added here to take care specific actions for
each phase
// before returning control back to FSP.
//
I would like a new LibraryClass added: FspWrapperPlatformMultiPhaseLib
This would implement a single function:
VOID
EFIAPI
FspWrapperPlatformMultiPhaseHandler (
IN UINT8 ComponentIndex,
IN UINT32PhaseIndex
);
Add an implementation of this in
IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformMultiPhaseLibSample. That
.inf will provide an implementation of FspWrapperPlatformMultiPhaseHandler()
that doesn't do anything (just leave it empty).
Then, invoke FspWrapperPlatformMultiPhaseHandler() at the point where you have
that comment above in FspWrapperMultiPhaseHandler().
The *BoardPkg can provide an SOC specific implementation. Typically the real
*BoardPkg implementation will look something like this:
VOID
EFIAPI
FspWrapperPlatformMultiPhaseHandler (
IN UINT8 ComponentIndex,
IN UINT32PhaseIndex
)
{
switch (ComponentIndex) {
case FspMultiPhaseMemInitApiIndex:
switch (PhaseIndex) {
case 1:
PeiServicesInstallPpi (mSomePlatformSpecificNotifyPpi1);
break;
}
break;
case FspMultiPhaseSiInitApiIndex:
switch (PhaseIndex) {
case 1:
PeiServicesInstallPpi (mSomePlatformSpecificNotifyPpi2);
break;
}
break;
}
}
The exact specifics would vary by SOC design and are out of scope for this
patch series. But you do need to provide the base case of "do nothing" in
IntelFsp2WrapperPkg.
Second, in
IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c:
case EnumFspVariableRequestSetVariable:
if (WriteVariableSupport) {
Status = VariablePpi->SetVariable (
VariablePpi,
FspVariableRequestParams->VariableName,
FspVariableRequestParams->VariableGuid,
*FspVariableRequestParams->Attributes,
(UINTN)*FspVariableRequestParams->DataSize,
FspVariableRequestParams->Data
);
} else {
return EFI_UNSUPPORTED;
}
Instead of return EFI_UNSUPPORTED; it should be Status = EFI_UNSUPPORTED;. Same
thing with EnumFspVariableRequestQueryVariableInfo.
Third, in FspWrapperVariableRequestHandler(), after you call
EnumMultiPhaseCompleteVariableRequest you need to check if one of the
FSP_STATUS_RESET_REQUIRED_* status codes is returned and if so invoke
CallFspWrapperResetSystem().
Fourth, there is a bug in IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c:
FspWrapperVariableRequestHandler (,
FspMultiPhaseMemInitApiIndex);
Should be this:
FspWrapperVariableRequestHandler (,
FspMultiPhaseSiInitApiIndex);
Fifth, I noticed some spelling errors in
IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c:
// Firstly querry variable request informaiton from FSP.
Should be:
// Get the variable request information from FSP.
And this:
// Firstly querry FSP for how many phases supported.
Should be:
// Query FSP for the number of phases supported.
Thanks,
Nate
-Original Message-
From: Chiu, Chasel mailto:chasel.c...@intel.com>>
Sent: Thursday, August 4, 2022 5:20 PM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
Cc: Chiu, Chasel mailto:chasel.c...@intel.com>>;
Desimone, Nathaniel L
mailto:nathaniel.l.desim...@intel.com>>; Zeng,
Star mailto:star.z...@intel.com>>
Subject: [PATCH 0/4] IntelFsp2(Wrapper)Pkg: Support FSP 2.4 MultiPhase.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916
Add FSP 2.4 MultiPhase interfaces and implementation.
Cc: Nate DeSimone
mailto:nathaniel.l.desim...@intel.com>>
Cc: Star Zeng mailto:star.z...@intel.com>>
Signed-off-by: Chasel Chiu mailto:chasel.c...@intel.com>>
Chasel Chiu (4):
IntelFsp2Pkg: Add FSP 2.4 MultiPhase interface.
IntelFsp2WrapperPkg: Add FSP 2.4 MultiPhase interface.
IntelFsp2Pkg: Adopt FSP 2.4 MultiPhase functions.
IntelFsp2WrapperPkg: Implement FSP 2.4 MultiPhase wrapper handlers.
IntelFsp2Pkg/FspSecCore/S
Re: [edk2-devel] [PATCH v1] MinPlatformPkg: Add PcdAcpiGpe1BlockLength for FADT from board package
Hello,
Patch has been merged:
https://github.com/tianocore/edk2-platforms/commit/d56523d0c1fae5311f5bcecd93ccabd8a5c73830
Thanks,
Chasel
> -Original Message-
> From: Chen, Aryeh
> Sent: Monday, August 15, 2022 1:36 AM
> To: devel@edk2.groups.io
> Cc: Chen, Aryeh ; Chiu, Chasel
> ; Desimone, Nathaniel L
> ; Oram, Isaac W ;
> Gao, Liming ; Dong, Eric
> Subject: [PATCH v1] MinPlatformPkg: Add PcdAcpiGpe1BlockLength for FADT
> from board package
>
> From: Aryeh Chen
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4020
>
> Add PcdAcpiGpe1BlockLength of FADT Gpe1BlkLen register on MinPlatformPkg
> for PlatformBoardpkg to update platform setting.
>
> Signed-off-by: Aryeh Chen
> Cc: Chasel Chiu
> Cc: Nate DeSimone
> Cc: Isaac Oram
> Cc: Liming Gao
> Cc: Eric Dong
> ---
> Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 3 ++-
> Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf | 1 +
> Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 1 +
> 3 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> index f134c8a58f..6e57b638e0 100644
> --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c
> @@ -88,7 +88,7 @@ EFI_STATUS
> AppendCpuMapTableEntry ( IN VOID *ApicPtr, IN UINT32
> LocalApicCounter,-IN EFI_CPU_ID_ORDER_MAP *CpuApicIdOrderTable +IN
> EFI_CPU_ID_ORDER_MAP *CpuApicIdOrderTable ) { EFI_STATUSStatus;@@
> -,6 +,7 @@ PlatformUpdateTables (
> FadtHeader->Gpe0Blk = PcdGet16
> (PcdAcpiGpe0BlockAddress);
> FadtHeader->Gpe0BlkLen= PcdGet8
> (PcdAcpiGpe0BlockLength);
> FadtHeader->Gpe1Blk = PcdGet16
> (PcdAcpiGpe1BlockAddress);+
> FadtHeader->Gpe1BlkLen= PcdGet8
> (PcdAcpiGpe1BlockLength);
> FadtHeader->Gpe1Base = PcdGet8 (PcdAcpiGpe1Base);
> FadtHeader->XPm1aEvtBlk.Address = PcdGet16
> (PcdAcpiPm1AEventBlockAddress);diff --git
> a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
> b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
> index 89350828d6..451034fb8a 100644
> --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
> +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf
> @@ -84,6 +84,7 @@
>gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress+
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockLength
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegisterAccessSize
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSizediff --git
> a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> index db0a19066f..8e603b7bf9 100644
> --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
> @@ -123,6 +123,7 @@
>
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress|0x1880|UINT16|0
> x0001003B
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength|0x00|UINT8|0x000
> 1003C
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x|UINT16|0
> x0001003D+
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockLength|0x00|UINT8|0x000
> 1003E
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base|0x00|UINT8|0x00010040
> gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegisterAccessSize|0x00|UINT8
> |0x00010042 --
> 2.26.2.windows.1
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Re: [edk2-devel] [PATCH v3 3/9] IntelFsp2Pkg: Remove UefiCpuLib from module INFs.
Reviewed-by: Chasel Chiu Thanks, Chasel > -Original Message- > From: Liu, Zhiguang > Sent: Tuesday, November 1, 2022 12:59 AM > To: devel@edk2.groups.io > Cc: Yu Pu ; Chiu, Chasel ; > Desimone, Nathaniel L ; Zeng, Star > > Subject: [PATCH v3 3/9] IntelFsp2Pkg: Remove UefiCpuLib from module > INFs. > > From: Yu Pu > > Because UefiCpuPkg/UefiCpuLib is merged to MdePkg/CpuLib, remove the > dependency of UefiCpuLib. > > Cc: Chasel Chiu > Cc: Nate DeSimone > Cc: Star Zeng > Signed-off-by: Yu Pu > Reviewed-by: Chasel Chiu > --- > IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf | 1 - > IntelFsp2Pkg/FspSecCore/SecMain.h | 1 - > IntelFsp2Pkg/IntelFsp2Pkg.dsc | 1 - > IntelFsp2Pkg/Tools/Tests/QemuFspPkg.dsc | 1 - > IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf | 1 - > IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf | 1 - > IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc | 1 - > 7 files changed, 7 deletions(-) > > diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf > b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf > index f920f1f6d0..8029832235 100644 > --- a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf > +++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf > @@ -59,7 +59,6 @@ >FspCommonLib >FspSecPlatformLib >CpuLib > - UefiCpuLib > > [Pcd] >gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## > CONSUMES > diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.h > b/IntelFsp2Pkg/FspSecCore/SecMain.h > index a09653da96..023deb7e2b 100644 > --- a/IntelFsp2Pkg/FspSecCore/SecMain.h > +++ b/IntelFsp2Pkg/FspSecCore/SecMain.h > @@ -21,7 +21,6 @@ > #include > #include > #include > -#include > #include > > typedef > diff --git a/IntelFsp2Pkg/IntelFsp2Pkg.dsc b/IntelFsp2Pkg/IntelFsp2Pkg.dsc > index 0713f0028d..f236a7010b 100644 > --- a/IntelFsp2Pkg/IntelFsp2Pkg.dsc > +++ b/IntelFsp2Pkg/IntelFsp2Pkg.dsc > @@ -27,7 +27,6 @@ >PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf >IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf > > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > mpressLib.inf > - UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf > > > ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseR > eportStatusCodeLibNull.inf > > PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanc > eLibNull.inf > diff --git a/IntelFsp2Pkg/Tools/Tests/QemuFspPkg.dsc > b/IntelFsp2Pkg/Tools/Tests/QemuFspPkg.dsc > index 961576c9a7..3155812118 100644 > --- a/IntelFsp2Pkg/Tools/Tests/QemuFspPkg.dsc > +++ b/IntelFsp2Pkg/Tools/Tests/QemuFspPkg.dsc > @@ -107,7 +107,6 @@ > > PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePl > atformHookLibNull.inf > > PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanc > eLibNull.inf > > OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLib > Null/OemHookStatusCodeLibNull.inf > - UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf > !if $(TARGET) == DEBUG > > DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort > .inf > > SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPo > rtLib16550.inf > diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf > b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf > index 332509e0bc..0307ce0acc 100644 > --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf > +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf > @@ -38,7 +38,6 @@ >FspWrapperPlatformLib >FspWrapperHobProcessLib >CpuLib > - UefiCpuLib >PeCoffGetEntryPointLib >PeCoffExtraActionLib >PerformanceLib > diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf > b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf > index f9c2ffca1c..a7b28e56b5 100644 > --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf > +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf > @@ -39,7 +39,6 @@ >FspWrapperPlatformLib >FspWrapperHobProcessLib >CpuLib > - UefiCpuLib >PeCoffGetEntryPointLib >PeCoffExtraActionLib >PerformanceLib > diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc > b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc > index b1fc2291c8..fe621244a6 100644 > --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc > +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc > @@ -41,7 +41,6 @@ > > DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLi > bNull.inf > ># UefiCp
Re: [edk2-devel] [PATCH] IntelFsp2Pkg: Update Function header to support IA32/X64.
Hi Michael D and Michael,
Could you please help me to clarify why CI build failed in this PR?
https://github.com/tianocore/edk2/pull/3575
>From log file it seems to be some CI script crashed but I have no idea what
>caused that failure.
Thanks,
Chasel
CI Failing log:
2022-11-01T18:58:09.3441767Z PROGRESS - --Running IntelFsp2Pkg: Guid Check Test
NO-TARGET --
2022-11-01T18:58:09.3448996Z CRITICAL - EXCEPTION: global flags not at the
start of the expression at position 1
2022-11-01T18:58:09.3474186Z CRITICAL - Traceback (most recent call last):
2022-11-01T18:58:09.3475314ZFile
"/opt/hostedtoolcache/Python/3.11.0/x64/lib/python3.11/site-packages/edk2toolext/invocables/edk2_ci_build.py",
line 174, in Go
2022-11-01T18:58:09.3478154Z rc = Descriptor.Obj.RunBuildPlugin(pkgToRunOn,
edk2path, pkg_plugin_configuration,
2022-11-01T18:58:09.3479182Z
^
2022-11-01T18:58:09.3479821ZFile
"/home/vsts/work/1/s/.pytool/Plugin/GuidCheck/GuidCheck.py", line 133, in
RunBuildPlugin
2022-11-01T18:58:09.3480427Z gs = GuidList.guidlist_from_filesystem(
2022-11-01T18:58:09.3480971Z ^^
2022-11-01T18:58:09.3482084ZFile
"/opt/hostedtoolcache/Python/3.11.0/x64/lib/python3.11/site-packages/edk2toollib/uefi/edk2/guid_list.py",
line 47, in guidlist_from_filesystem
2022-11-01T18:58:09.3482840Z if(ignore(fullpath)):
2022-11-01T18:58:09.3483313Z
2022-11-01T18:58:09.3484178ZFile
"/opt/hostedtoolcache/Python/3.11.0/x64/lib/python3.11/site-packages/edk2toollib/gitignore_parser.py",
line 68, in
2022-11-01T18:58:09.3485030Z return lambda file_path:
any(r.match(file_path) for r in rules)
2022-11-01T18:58:09.3485564Z
^^
2022-11-01T18:58:09.3486488ZFile
"/opt/hostedtoolcache/Python/3.11.0/x64/lib/python3.11/site-packages/edk2toollib/gitignore_parser.py",
line 68, in
2022-11-01T18:58:09.3487221Z return lambda file_path:
any(r.match(file_path) for r in rules)
2022-11-01T18:58:09.3487773Z ^^
2022-11-01T18:58:09.3488632ZFile
"/opt/hostedtoolcache/Python/3.11.0/x64/lib/python3.11/site-packages/edk2toollib/gitignore_parser.py",
line 163, in match
2022-11-01T18:58:09.3489366Z if re.search(self.regex, rel_path):
2022-11-01T18:58:09.3490472Z^^^
2022-11-01T18:58:09.3491099ZFile
"/opt/hostedtoolcache/Python/3.11.0/x64/lib/python3.11/re/__init__.py", line
176, in search
2022-11-01T18:58:09.3491662Z return _compile(pattern, flags).search(string)
2022-11-01T18:58:09.3492114Z
2022-11-01T18:58:09.3493037ZFile
"/opt/hostedtoolcache/Python/3.11.0/x64/lib/python3.11/re/__init__.py", line
294, in _compile
2022-11-01T18:58:09.3493661Z p = _compiler.compile(pattern, flags)
2022-11-01T18:58:09.3494047Z ^
2022-11-01T18:58:09.3494593ZFile
"/opt/hostedtoolcache/Python/3.11.0/x64/lib/python3.11/re/_compiler.py", line
743, in compile
2022-11-01T18:58:09.3495110Z p = _parser.parse(p, flags)
2022-11-01T18:58:09.3495570Z ^^^
2022-11-01T18:58:09.3496047ZFile
"/opt/hostedtoolcache/Python/3.11.0/x64/lib/python3.11/re/_parser.py", line
980, in parse
2022-11-01T18:58:09.3496665Z p = _parse_sub(source, state, flags &
SRE_FLAG_VERBOSE, 0)
2022-11-01T18:58:09.3497100Z
^^
2022-11-01T18:58:09.3497650ZFile
"/opt/hostedtoolcache/Python/3.11.0/x64/lib/python3.11/re/_parser.py", line
455, in _parse_sub
2022-11-01T18:58:09.3498286Z itemsappend(_parse(source, state, verbose,
nested + 1,
2022-11-01T18:58:09.3498727Z
^^
2022-11-01T18:58:09.3499272ZFile
"/opt/hostedtoolcache/Python/3.11.0/x64/lib/python3.11/re/_parser.py", line
841, in _parse
2022-11-01T18:58:09.3500126Z raise source.error('global flags not at the
start '
2022-11-01T18:58:09.3500721Z re.error: global flags not at the start of the
expression at position 1
2022-11-01T18:58:09.3501035Z
2022-11-01T18:58:09.3501615Z ERROR - --->Test Failed: Guid Check Test NO-TARGET
returned 1
> -Original Message-
> From: Desimone, Nathaniel L
> Sent: Monday, October 31, 2022 5:52 PM
> To: Chiu, Chasel ; devel@edk2.groups.io
> Cc: Zeng, Star
> Subject: RE: [PATCH] IntelFsp2Pkg: Update Function header to support
> IA32/X64.
>
> Reviewed-by: Nate DeSimone
>
> > -Original Message-
> > From: Chiu, Chasel
> > Sent: Thursday, October 27, 2022 7:58 PM
> > To: devel@edk2.groups.io
> > Cc: Ch
[edk2-devel] [PATCH v2] IntelFsp2Pkg: FSP should support input UPD as NULL.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4114
FSP specification supports input UPD as NULL cases which FSP will
use built-in UPD region instead.
FSP should not return INVALID_PARAMETER in such cases.
In FSP-T entry point case, the valid FSP-T UPD region pointer will be
passed to platform FSP code to consume.
In FSP-M and FSP-S cases, valid UPD pointer will be decided when
updating corresponding pointer field in FspGlobalData.
Cc: Nate DeSimone
Cc: Star Zeng
Signed-off-by: Chasel Chiu
---
IntelFsp2Pkg/FspSecCore/SecFspApiChk.c | 12 ++--
IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm | 73
+++--
IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm | 40
++--
3 files changed, 91 insertions(+), 34 deletions(-)
diff --git a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
index a44fbf2a50..5f59938518 100644
--- a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
+++ b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
@@ -44,6 +44,8 @@ FspApiCallingCheck (
//
if (((UINTN)FspData != MAX_ADDRESS) && ((UINTN)FspData != MAX_UINT32)) {
Status = EFI_UNSUPPORTED;
+} else if (ApiParam == NULL) {
+ Status = EFI_SUCCESS;
} else if (EFI_ERROR (FspUpdSignatureCheck (ApiIdx, ApiParam))) {
Status = EFI_INVALID_PARAMETER;
}
@@ -67,9 +69,13 @@ FspApiCallingCheck (
} else {
if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
Status = EFI_UNSUPPORTED;
- } else if (EFI_ERROR (FspUpdSignatureCheck (FspSiliconInitApiIndex,
ApiParam))) {
-Status = EFI_INVALID_PARAMETER;
} else if (ApiIdx == FspSiliconInitApiIndex) {
+if (ApiParam == NULL) {
+ Status = EFI_SUCCESS;
+} else if (EFI_ERROR (FspUpdSignatureCheck (FspSiliconInitApiIndex,
ApiParam))) {
+ Status = EFI_INVALID_PARAMETER;
+}
+
//
// Reset MultiPhase NumberOfPhases to zero
//
@@ -89,6 +95,8 @@ FspApiCallingCheck (
} else {
if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
Status = EFI_UNSUPPORTED;
+ } else if (ApiParam == NULL) {
+Status = EFI_SUCCESS;
} else if (EFI_ERROR (FspUpdSignatureCheck (FspSmmInitApiIndex,
ApiParam))) {
Status = EFI_INVALID_PARAMETER;
}
diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
index 61030a843b..73821ad22a 100644
--- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
@@ -21,7 +21,7 @@ extern ASM_PFX(PcdGet32 (PcdFspReservedBufferSize))
; Following functions will be provided in PlatformSecLib
;
extern ASM_PFX(AsmGetFspBaseAddress)
-extern ASM_PFX(AsmGetFspInfoHeader)
+extern ASM_PFX(AsmGetFspInfoHeaderNoStack)
;extern ASM_PFX(LoadMicrocode); @todo: needs a weak implementation
extern ASM_PFX(SecPlatformInit) ; @todo: needs a weak implementation
extern ASM_PFX(SecCarInit)
@@ -160,6 +160,47 @@ endstruc
RET_ESI_EXT mm7
%endmacro
+%macro CALL_EDI 1
+
+ mov edi, %%ReturnAddress
+ jmp %1
+%%ReturnAddress:
+
+%endmacro
+
+%macro CALL_EBP 1
+ mov ebp, %%ReturnAddress
+ jmp %1
+%%ReturnAddress:
+%endmacro
+
+%macro RET_EBP 0
+ jmp ebp ; restore EIP from EBP
+%endmacro
+
+;
+; Load UPD region pointer in ECX
+;
+global ASM_PFX(LoadUpdPointerToECX)
+ASM_PFX(LoadUpdPointerToECX):
+ ;
+ ; esp + 4 is input UPD parameter
+ ; If esp + 4 is NULL the default UPD should be used
+ ; ecx will be the UPD region that should be used
+ ;
+ mov ecx, dword [esp + 4]
+ cmp ecx, 0
+ jnz ParamValid
+
+ ;
+ ; Fall back to default UPD region
+ ;
+ CALL_EDI ASM_PFX(AsmGetFspInfoHeaderNoStack)
+ mov ecx, DWORD [eax + 01Ch] ; Read FsptImageBaseAddress
+ add ecx, DWORD [eax + 024h] ; Get Cfg Region base address =
FsptImageBaseAddress + CfgRegionOffset
+ParamValid:
+ RET_EBP
+
;
; @todo: The strong/weak implementation does not work.
;This needs to be reviewed later.
@@ -187,10 +228,9 @@ endstruc
global ASM_PFX(LoadMicrocodeDefault)
ASM_PFX(LoadMicrocodeDefault):
; Inputs:
- ; esp -> LoadMicrocodeParams pointer
+ ; ecx -> UPD region contains LoadMicrocodeParams pointer
; Register Usage:
- ; esp Preserved
- ; All others destroyed
+ ; All are destroyed
; Assumptions:
; No memory available, stack is hard-coded and used for return address
; Executed by SBSP and NBSP
@@ -201,12 +241,9 @@ ASM_PFX(LoadMicrocodeDefault):
;
movd ebp, mm7
+ movesp, ecx ; ECX has been assigned to UPD region
cmpesp, 0
jz ParamError
- moveax, dword [esp + 4]; Parameter pointer
- cmpeax, 0
- jz ParamError
- movesp, eax
; skip loading Microcode if the MicrocodeCodeSize is zero
;
Re: [edk2-devel][edk2-platforms][PATCH V1 1/1] WhitleyOpenBoardPkg/AcpiTables: Fix EFI_ACPI_GPE0_BLK_LEN calculation
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Oram, Isaac W
> Sent: Wednesday, January 4, 2023 5:34 PM
> To: devel@edk2.groups.io
> Cc: Oram, Isaac W ; Desimone, Nathaniel L
> ; Chiu, Chasel ;
> Sinha, Ankit ; Ponnusamy, Suresh
>
> Subject: [edk2-devel][edk2-platforms][PATCH V1 1/1]
> WhitleyOpenBoardPkg/AcpiTables: Fix EFI_ACPI_GPE0_BLK_LEN calculation
>
> Block length incorrectly calculated off of the block width.
> Reverted EFI_ACPI_GPE0_BLK_WIDTH change and added #defines for
> X_GPE0 and X_GPE1 contents.
>
> Cc: Nate DeSimone
> Cc: Chasel Chiu
> Cc: Ankit Sinha
> Cc: Suresh Ponnusamy
> Signed-off-by: Isaac Oram
> ---
> .../Features/Acpi/AcpiTables/Fadt/Fadt62.aslc | 16 +++---
> .../WhitleyOpenBoardPkg/Include/Acpi/Fadt.h | 21
> ++-
> 2 files changed, 28 insertions(+), 9 deletions(-)
>
> diff --git
> a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Fadt/Fa
> dt62.aslc
> b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Fadt/Fa
> dt62.aslc
> index f37cf0a508..b7f15ef716 100644
> ---
> a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Fadt/Fa
> dt62.aslc
> +++
> b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Fadt/F
> +++ adt62.aslc
> @@ -143,19 +143,19 @@ EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE
> Fadt = {
>//
>// X_General Purpose Event 0 Register Block
>//
> - {EFI_ACPI_GPE0_BLK_ADDRESS_SPACE_ID,
> - EFI_ACPI_GPE0_BLK_BIT_WIDTH,
> - EFI_ACPI_GPE0_BLK_BIT_OFFSET,
> + {EFI_ACPI_X_GPE0_BLK_ADDRESS_SPACE_ID,
> + EFI_ACPI_X_GPE0_BLK_BIT_WIDTH,
> + EFI_ACPI_X_GPE0_BLK_BIT_OFFSET,
>EFI_ACPI_6_2_BYTE,
> - EFI_ACPI_GPE0_BLK_ADDRESS},
> + EFI_ACPI_X_GPE0_BLK_ADDRESS},
>//
>// X_General Purpose Event 1 Register Block
>//
> - {EFI_ACPI_GPE1_BLK_ADDRESS_SPACE_ID,
> - EFI_ACPI_GPE1_BLK_BIT_WIDTH,
> - EFI_ACPI_GPE1_BLK_BIT_OFFSET,
> + {EFI_ACPI_X_GPE1_BLK_ADDRESS_SPACE_ID,
> + EFI_ACPI_X_GPE1_BLK_BIT_WIDTH,
> + EFI_ACPI_X_GPE1_BLK_BIT_OFFSET,
>EFI_ACPI_6_2_UNDEFINED,
> - EFI_ACPI_GPE1_BLK_ADDRESS}
> + EFI_ACPI_X_GPE1_BLK_ADDRESS}
> };
>
> VOID*
> diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/Fadt.h
> b/Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/Fadt.h
> index ebfd21b6cc..8857879370 100644
> --- a/Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/Fadt.h
> +++ b/Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/Fadt.h
> @@ -152,10 +152,19 @@ For Watson Creek we set this to 0 and then
> dynamically update this to 1 in the D // Information // #define
> EFI_ACPI_GPE0_BLK_ADDRESS_SPACE_ID EFI_ACPI_6_2_SYSTEM_IO
> -#define EFI_ACPI_GPE0_BLK_BIT_WIDTH 0 // size of
> R_PCH_ACPI_GPE0_STS_127_96 + R_PCH_ACPI_GPE0_EN_127_96
> +#define EFI_ACPI_GPE0_BLK_BIT_WIDTH 0x100 // size of
> R_PCH_ACPI_GPE0_STS_127_96 + R_PCH_ACPI_GPE0_EN_127_96
> #define EFI_ACPI_GPE0_BLK_BIT_OFFSET0x00
> #define EFI_ACPI_GPE0_BLK_ADDRESS
> (EFI_ACPI_PM1A_EVT_BLK_ADDRESS + 0x80)
>
> +//
> +// X General Purpose Event 0 Register Block Generic Address //
> +Information // #define EFI_ACPI_X_GPE0_BLK_ADDRESS_SPACE_ID
> +EFI_ACPI_6_2_SYSTEM_IO
> +#define EFI_ACPI_X_GPE0_BLK_BIT_WIDTH 0x00
> +#define EFI_ACPI_X_GPE0_BLK_BIT_OFFSET0x00
> +#define EFI_ACPI_X_GPE0_BLK_ADDRESS
> EFI_ACPI_GPE0_BLK_ADDRESS
> +
> //
> // General Purpose Event 1 Register Block Generic Address // Information
> @@ -164,6 +173,16 @@ For Watson Creek we set this to 0 and then
> dynamically update this to 1 in the D
> #define EFI_ACPI_GPE1_BLK_BIT_WIDTH 0x0
> #define EFI_ACPI_GPE1_BLK_BIT_OFFSET0x0
> #define EFI_ACPI_GPE1_BLK_ADDRESS 0x0
> +
> +//
> +// X General Purpose Event 1 Register Block Generic Address //
> +Information // #define EFI_ACPI_X_GPE1_BLK_ADDRESS_SPACE_ID
> +EFI_ACPI_6_2_SYSTEM_IO
> +#define EFI_ACPI_X_GPE1_BLK_BIT_WIDTH 0x00
> +#define EFI_ACPI_X_GPE1_BLK_BIT_OFFSET0x00
> +#define EFI_ACPI_X_GPE1_BLK_ADDRESS 0x00
> +
> //
> // Reset Register Generic Address Information //
> --
> 2.39.0.windows.1
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Re: [edk2-devel] [PATCH] Platform/Intel/MinPlatformPkg:Add CpuPageTableLib required by MpInitLib.
Thanks for the update! Reviewed-by: Chasel Chiu > -Original Message- > From: Xie, Yuanhao > Sent: Tuesday, December 27, 2022 12:31 AM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > ; Oram, Isaac W > ; Gao, Liming ; > Dong, Eric > Subject: [PATCH] Platform/Intel/MinPlatformPkg:Add CpuPageTableLib > required by MpInitLib. > > Add CpuPageTableLib required by MpInitLib. > > Cc: Chasel Chiu > Cc: Nate DeSimone > Cc: Isaac Oram > Cc: Liming Gao > Cc: Eric Dong > Signed-off-by: Yuanhao Xie > --- > Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc > b/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc > index e48d4b06d..5a6183761 100644 > --- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc > +++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc > @@ -27,7 +27,7 @@ > > LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxDxeLib.i > nf > > > CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeC > puExceptionHandlerLib.inf > - > + > CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.in > f >MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf > > FrameBufferBltLib|MdeModulePkg/Library/FrameBufferBltLib/FrameBuffer > BltLib.inf >TimerLib|PcAtChipsetPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.inf > -- > 2.36.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#97764): https://edk2.groups.io/g/devel/message/97764 Mute This Topic: https://groups.io/mt/95900312/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting null UPD pointer in FSP-T
Hi Liming, Michael, May I know why we cannot merge this PR https://github.com/tianocore/edk2/pull/3624 ? Was it due to Hard Feature Freeze? But I thought we still have time right? Thanks, Chasel > -Original Message- > From: devel@edk2.groups.io On Behalf Of Kuo, > Ted > Sent: Wednesday, November 9, 2022 3:31 AM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > ; Zeng, Star ; S, > Ashraf Ali ; Duggapu, Chinni B > > Subject: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting > null UPD pointer in FSP-T > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4114 > > 1.Use xmm5 slot 1 and xmm6 slot 3 to save ucode status and UPD pointer > respectively in TempRamInitApi in IA32 FspSecCoreT. > 2.Correct inappropriate description in the return value of > AsmGetFspInfoHeader. > 3.Replace hardcoded offset value 0x1C with > FSP_HEADER_IMGBASE_OFFSET in > FspHeler.nasm. > > Cc: Chasel Chiu > Cc: Nate DeSimone > Cc: Star Zeng > Cc: Ashraf Ali S > Cc: Chinni B Duggapu > Signed-off-by: Ted Kuo > --- > .../FspSecCore/Ia32/FspApiEntryT.nasm | 17 +++-- > IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm | 4 +- > .../FspSecCore/Ia32/SaveRestoreSseNasm.inc| 74 ++- > IntelFsp2Pkg/FspSecCore/SecFsp.h | 2 +- > IntelFsp2Pkg/FspSecCore/X64/FspHelper.nasm| 4 +- > 5 files changed, 55 insertions(+), 46 deletions(-) > > diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm > b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm > index 73821ad22a..2cff8b3643 100644 > --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm > +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm > @@ -594,37 +594,38 @@ ASM_PFX(TempRamInitApi): >SAVE_EAX SAVE_EDX + CALL_EBP ASM_PFX(LoadUpdPointerToECX) ; > ECX for UPD param+ SAVE_ECX ; save UPD param > to slot > 3 in xmm6+ ; ; Sec Platform Init ;- CALL_EBP > ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param CALL_MMX > ASM_PFX(SecPlatformInit) cmp eax, 0 jnz TempRamInitExit; > Load microcode LOAD_ESP- CALL_EBP ASM_PFX(LoadUpdPointerToECX) ; > ECX for UPD param+ LOAD_ECX CALL_MMX > ASM_PFX(LoadMicrocodeDefault)- SXMMN xmm6, 3, eax;Save > microcode return status in ECX-SLOT 3 in xmm6.+ > SAVE_UCODE_STATUS ; Save microcode return status in slot 1 in > xmm5. ;@note If return value eax is not 0, microcode did not load, but > continue and attempt to boot.; Call Sec CAR Init LOAD_ESP- CALL_EBP > ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param+ LOAD_ECX > CALL_MMX ASM_PFX(SecCarInit) cmp eax, 0 jnz TempRamInitExit > LOAD_ESP- CALL_EBP ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD > param- mov edi, ecx ; Save UPD param to EDI for > later code > use+ LOAD_ECX+ mov edi, ecx; Save UPD param to EDI for > later code use CALL_MMX ASM_PFX(EstablishStackFsp) cmp eax, 0 > jnz TempRamInitExit - LXMMN xmm6, eax, 3 ;Restore microcode > status if no CAR init error from ECX-SLOT 3 in xmm6.- SXMMN xmm6, 3, > edi ;Save FSP-T UPD parameter pointer in ECX-SLOT 3 in xmm6.+ > LOAD_UCODE_STATUS ; Restore microcode status if no CAR init > error from slot 1 in xmm5. TempRamInitExit: mov bl, al >; > save al data in bldiff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm > b/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm > index e3e1945473..3c63f6eea5 100644 > --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm > +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm > @@ -7,6 +7,8 @@ > SECTION .text +FSP_HEADER_IMGBASE_OFFSETEQU 1Ch+ global > ASM_PFX(FspInfoHeaderRelativeOff) ASM_PFX(FspInfoHeaderRelativeOff): > DD0x12345678 ; This value must be patched by the build > script@@ -14,7 +16,7 @@ ASM_PFX(FspInfoHeaderRelativeOff): > global ASM_PFX(AsmGetFspBaseAddress) > ASM_PFX(AsmGetFspBaseAddress):call > ASM_PFX(AsmGetFspInfoHeader)- add eax, 0x1C+ add eax, > FSP_HEADER_IMGBASE_OFFSETmov eax, dword [eax]ret diff --git > a/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc > b/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc > index 4c321cbece..a222f2e376 100644 > --- a/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc > +++ b/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc > @@ -1,6 +1,6 @@ > > ;-- > ;-; Copyright (c) > 2015 - 2019, Intel Corporation. All rights reserved.+; Copyright (c) > 2015 - 2022, Intel Corporation. All rights reserved. ; SPDX-License- >
Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting null UPD pointer in FSP-T
Thanks Liming!! > -Original Message- > From: gaoliming > Sent: Thursday, November 10, 2022 5:37 PM > To: devel@edk2.groups.io; Chiu, Chasel ; Kinney, > Michael D > Cc: Desimone, Nathaniel L ; Zeng, Star > ; S, Ashraf Ali ; Duggapu, > Chinni B ; Kuo, Ted > Subject: 回复: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of > supporting null UPD pointer in FSP-T > > Chasel: > Seemly, this is a bug fix for the previous change. In soft feature freeze, > the > bug is still allowed. Since this patch has passed review, I can help merge it. > > Thanks > Liming > > -----邮件原件- > > 发件人: devel@edk2.groups.io 代表 Chiu, > Chasel > > 发送时间: 2022年11月11日 9:08 > > 收件人: devel@edk2.groups.io; Gao, Liming > ; > > Kinney, Michael D > > 抄送: Desimone, Nathaniel L ; Zeng, > Star > > ; S, Ashraf Ali ; > > Duggapu, Chinni B ; Kuo, Ted > > > > 主题: Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of > supporting > > null UPD pointer in FSP-T > > > > > > Sorry for missing this message. > > Since this patch is important for unblocking platform FSP > > implementation, @Gao, Liming, @Kinney, Michael D, could you please > > help to merge it to catch this stable tag? > > > > Thanks, > > Chasel > > > > > > > > > -Original Message- > > > From: devel@edk2.groups.io On Behalf Of > > > gaoliming via groups.io > > > Sent: Thursday, November 10, 2022 4:54 PM > > > To: Chiu, Chasel ; Kinney, Michael D > > > > > > Cc: Desimone, Nathaniel L ; Zeng, > > > Star ; S, Ashraf Ali ; > > > Duggapu, Chinni B ; > > > devel@edk2.groups.io; Kuo, Ted > > > Subject: 回复: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of > > > supporting null UPD pointer in FSP-T > > > > > > Chasel: > > > Please see the announce mail > > > https://edk2.groups.io/g/devel/message/96175 > > > > > > Now, we are in soft feature freeze. If the patch wants to catch > > > this stable tag, please highlight it and get approval from Stewards. > > > > > > Thanks > > > Liming > > > > -邮件原件- > > > > 发件人: Chiu, Chasel > > > > 发送时间: 2022年11月11日 8:47 > > > > 收件人: Gao, Liming ; Kinney, Michael D > > > > > > > > 抄送: Desimone, Nathaniel L ; Zeng, > > > Star > > > > ; S, Ashraf Ali ; > > > > Duggapu, Chinni B ; > > > > devel@edk2.groups.io; Kuo, Ted > > > > 主题: RE: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of > > > supporting > > > > null UPD pointer in FSP-T > > > > > > > > > > > > Hi Liming, Michael, > > > > > > > > May I know why we cannot merge this PR > > > > https://github.com/tianocore/edk2/pull/3624 ? > > > > Was it due to Hard Feature Freeze? But I thought we still have time > right? > > > > > > > > Thanks, > > > > Chasel > > > > > > > > > > > > > -Original Message- > > > > > From: devel@edk2.groups.io On Behalf Of > > > > > Kuo, Ted > > > > > Sent: Wednesday, November 9, 2022 3:31 AM > > > > > To: devel@edk2.groups.io > > > > > Cc: Chiu, Chasel ; Desimone, Nathaniel L > > > > > ; Zeng, Star > > > > > ; S, Ashraf Ali ; > > > > > Duggapu, Chinni B > > > > > Subject: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of > > > > > supporting null UPD pointer in FSP-T > > > > > > > > > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4114 > > > > > > > > > > 1.Use xmm5 slot 1 and xmm6 slot 3 to save ucode status and UPD > > > pointer > > > > > respectively in TempRamInitApi in IA32 FspSecCoreT. > > > > > 2.Correct inappropriate description in the return value of > > > > > AsmGetFspInfoHeader. > > > > > 3.Replace hardcoded offset value 0x1C with > > > FSP_HEADER_IMGBASE_OFFSET > > > > > in > > > > > FspHeler.nasm. > > > > > > > > > > Cc: Chasel Chiu > > > > > Cc: Nate DeSimone > > > > > Cc: Star Zeng > > > > > Cc: Ashraf Ali S > > > > > Cc: Chinni B Duggapu > > > > > Signed-off-by: Ted Kuo > > > > > --- > > > > > .../FspSecCore/Ia32/FspApiEntryT.nasm | 17
Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting null UPD pointer in FSP-T
Sorry for missing this message. Since this patch is important for unblocking platform FSP implementation, @Gao, Liming, @Kinney, Michael D, could you please help to merge it to catch this stable tag? Thanks, Chasel > -Original Message- > From: devel@edk2.groups.io On Behalf Of > gaoliming via groups.io > Sent: Thursday, November 10, 2022 4:54 PM > To: Chiu, Chasel ; Kinney, Michael D > > Cc: Desimone, Nathaniel L ; Zeng, Star > ; S, Ashraf Ali ; Duggapu, > Chinni B ; devel@edk2.groups.io; Kuo, Ted > > Subject: 回复: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of > supporting null UPD pointer in FSP-T > > Chasel: > Please see the announce mail > https://edk2.groups.io/g/devel/message/96175 > > Now, we are in soft feature freeze. If the patch wants to catch this stable > tag, please highlight it and get approval from Stewards. > > Thanks > Liming > > -邮件原件- > > 发件人: Chiu, Chasel > > 发送时间: 2022年11月11日 8:47 > > 收件人: Gao, Liming ; Kinney, Michael D > > > > 抄送: Desimone, Nathaniel L ; Zeng, > Star > > ; S, Ashraf Ali ; > > Duggapu, Chinni B ; devel@edk2.groups.io; > > Kuo, Ted > > 主题: RE: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of > supporting > > null UPD pointer in FSP-T > > > > > > Hi Liming, Michael, > > > > May I know why we cannot merge this PR > > https://github.com/tianocore/edk2/pull/3624 ? > > Was it due to Hard Feature Freeze? But I thought we still have time right? > > > > Thanks, > > Chasel > > > > > > > -Original Message- > > > From: devel@edk2.groups.io On Behalf Of Kuo, > > > Ted > > > Sent: Wednesday, November 9, 2022 3:31 AM > > > To: devel@edk2.groups.io > > > Cc: Chiu, Chasel ; Desimone, Nathaniel L > > > ; Zeng, Star ; > > > S, Ashraf Ali ; Duggapu, Chinni B > > > > > > Subject: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of > > > supporting null UPD pointer in FSP-T > > > > > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4114 > > > > > > 1.Use xmm5 slot 1 and xmm6 slot 3 to save ucode status and UPD > pointer > > > respectively in TempRamInitApi in IA32 FspSecCoreT. > > > 2.Correct inappropriate description in the return value of > > > AsmGetFspInfoHeader. > > > 3.Replace hardcoded offset value 0x1C with > FSP_HEADER_IMGBASE_OFFSET > > > in > > > FspHeler.nasm. > > > > > > Cc: Chasel Chiu > > > Cc: Nate DeSimone > > > Cc: Star Zeng > > > Cc: Ashraf Ali S > > > Cc: Chinni B Duggapu > > > Signed-off-by: Ted Kuo > > > --- > > > .../FspSecCore/Ia32/FspApiEntryT.nasm | 17 +++-- > > > IntelFsp2Pkg/FspSecCore/Ia32/FspHelper.nasm | 4 +- > > > .../FspSecCore/Ia32/SaveRestoreSseNasm.inc| 74 > > ++- > > > IntelFsp2Pkg/FspSecCore/SecFsp.h | 2 +- > > > IntelFsp2Pkg/FspSecCore/X64/FspHelper.nasm| 4 +- > > > 5 files changed, 55 insertions(+), 46 deletions(-) > > > > > > diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm > > > b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm > > > index 73821ad22a..2cff8b3643 100644 > > > --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm > > > +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm > > > @@ -594,37 +594,38 @@ ASM_PFX(TempRamInitApi): > > >SAVE_EAX SAVE_EDX + CALL_EBP > > ASM_PFX(LoadUpdPointerToECX) ; > > > ECX for UPD param+ SAVE_ECX ; > > save UPD param to slot > > > 3 in xmm6+ ; ; Sec Platform Init ;- CALL_EBP > > > ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param CALL_MMX > > > ASM_PFX(SecPlatformInit) cmp eax, 0 jnz > > TempRamInitExit; > > > Load microcode LOAD_ESP- CALL_EBP > > ASM_PFX(LoadUpdPointerToECX) ; > > > ECX for UPD param+ LOAD_ECX CALL_MMX > > > ASM_PFX(LoadMicrocodeDefault)- SXMMN xmm6, 3, > > eax;Save > > > microcode return status in ECX-SLOT 3 in xmm6.+ > > > SAVE_UCODE_STATUS ; Save microcode return status in > > slot 1 in > > > xmm5. ;@note If return value eax is not 0, microcode did not load, but > > > continue and attempt to boot.; Call Sec CAR Init LOAD_ESP- > > CALL_EBP > > > ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param+ LOAD_ECX > > > CALL_MMX ASM_PFX(SecCarInit) cmp eax, 0 jnz > > TempRamInitExit
Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of supporting null UPD pointer in FSP-T
Thanks Liming!! > -Original Message- > From: devel@edk2.groups.io On Behalf Of > gaoliming via groups.io > Sent: Thursday, November 10, 2022 8:52 PM > To: devel@edk2.groups.io; Chiu, Chasel ; Kinney, > Michael D > Cc: Desimone, Nathaniel L ; Zeng, Star > ; S, Ashraf Ali ; Duggapu, > Chinni B ; Kuo, Ted > Subject: 回复: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of > supporting null UPD pointer in FSP-T > > This change has been merged at > 3182843f3bc92599fa2ed4fd13ffd3f75907fe9e > > Thanks > Liming > > -邮件原件- > > 发件人: devel@edk2.groups.io 代表 Chiu, > Chasel > > 发送时间: 2022年11月11日 9:57 > > 收件人: Gao, Liming ; > devel@edk2.groups.io; > > Kinney, Michael D > > 抄送: Desimone, Nathaniel L ; Zeng, > Star > > ; S, Ashraf Ali ; > > Duggapu, Chinni B ; Kuo, Ted > > > > 主题: Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of > supporting > > null UPD pointer in FSP-T > > > > > > Thanks Liming!! > > > > > -Original Message- > > > From: gaoliming > > > Sent: Thursday, November 10, 2022 5:37 PM > > > To: devel@edk2.groups.io; Chiu, Chasel ; > > > Kinney, Michael D > > > Cc: Desimone, Nathaniel L ; Zeng, > > > Star ; S, Ashraf Ali ; > > > Duggapu, Chinni B ; Kuo, Ted > > > > > > Subject: 回复: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of > > > supporting null UPD pointer in FSP-T > > > > > > Chasel: > > > Seemly, this is a bug fix for the previous change. In soft feature > > > freeze, > > the > > > bug is still allowed. Since this patch has passed review, I can help merge > it. > > > > > > Thanks > > > Liming > > > > -邮件原件- > > > > 发件人: devel@edk2.groups.io 代表 Chiu, > > > Chasel > > > > 发送时间: 2022年11月11日 9:08 > > > > 收件人: devel@edk2.groups.io; Gao, Liming > > > ; > > > > Kinney, Michael D > > > > 抄送: Desimone, Nathaniel L ; Zeng, > > > Star > > > > ; S, Ashraf Ali ; > > > > Duggapu, Chinni B ; Kuo, Ted > > > > > > > > 主题: Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of > > > supporting > > > > null UPD pointer in FSP-T > > > > > > > > > > > > Sorry for missing this message. > > > > Since this patch is important for unblocking platform FSP > > > > implementation, @Gao, Liming, @Kinney, Michael D, could you please > > > > help to merge it to catch this stable tag? > > > > > > > > Thanks, > > > > Chasel > > > > > > > > > > > > > > > > > -Original Message- > > > > > From: devel@edk2.groups.io On Behalf Of > > > > > gaoliming via groups.io > > > > > Sent: Thursday, November 10, 2022 4:54 PM > > > > > To: Chiu, Chasel ; Kinney, Michael D > > > > > > > > > > Cc: Desimone, Nathaniel L ; > > > > > Zeng, Star ; S, Ashraf Ali > > > > > ; Duggapu, Chinni B > > > > > ; devel@edk2.groups.io; Kuo, Ted > > > > > > > > > > Subject: 回复: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement > of > > > > > supporting null UPD pointer in FSP-T > > > > > > > > > > Chasel: > > > > > Please see the announce mail > > > > > https://edk2.groups.io/g/devel/message/96175 > > > > > > > > > > Now, we are in soft feature freeze. If the patch wants to > > > > > catch this stable tag, please highlight it and get approval from > Stewards. > > > > > > > > > > Thanks > > > > > Liming > > > > > > -邮件原件- > > > > > > 发件人: Chiu, Chasel > > > > > > 发送时间: 2022年11月11日 8:47 > > > > > > 收件人: Gao, Liming ; Kinney, > Michael D > > > > > > > > > > > > 抄送: Desimone, Nathaniel L ; > > Zeng, > > > > > Star > > > > > > ; S, Ashraf Ali ; > > > > > > Duggapu, Chinni B ; > > > > > > devel@edk2.groups.io; Kuo, Ted > > > > > > 主题: RE: [edk2-devel][PATCH v1] IntelFsp2Pkg: Improvement of > > > > > supporting > > > > > > null UPD pointer in FSP-T > > > > > > > > > > > > > > > > > > Hi Liming, M
Re: [edk2-devel] [PATCH v2] IntelFsp2Pkg: FSP should support input UPD as NULL.
Hi Ted,
Please see my reply below inline.
Thanks,
Chasel
> -Original Message-
> From: Kuo, Ted
> Sent: Wednesday, November 2, 2022 7:32 PM
> To: devel@edk2.groups.io; Chiu, Chasel
> Cc: Desimone, Nathaniel L ; Zeng, Star
>
> Subject: RE: [edk2-devel] [PATCH v2] IntelFsp2Pkg: FSP should support
> input UPD as NULL.
>
> Hi Chasel,
>
> I have few comments. Please find [Ted] inline.
>
> Thanks,
> Ted
>
> -Original Message-----
> From: devel@edk2.groups.io On Behalf Of Chiu,
> Chasel
> Sent: Wednesday, November 2, 2022 1:46 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star
> Subject: [edk2-devel] [PATCH v2] IntelFsp2Pkg: FSP should support input
> UPD as NULL.
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4114
>
> FSP specification supports input UPD as NULL cases which FSP will use built-
> in UPD region instead.
> FSP should not return INVALID_PARAMETER in such cases.
>
> In FSP-T entry point case, the valid FSP-T UPD region pointer will be passed
> to platform FSP code to consume.
> In FSP-M and FSP-S cases, valid UPD pointer will be decided when updating
> corresponding pointer field in FspGlobalData.
>
> Cc: Nate DeSimone
> Cc: Star Zeng
> Signed-off-by: Chasel Chiu
> ---
> IntelFsp2Pkg/FspSecCore/SecFspApiChk.c | 12 ++--
> IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm | 73
> +++--
>
> IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm | 40
> ++--
> 3 files changed, 91 insertions(+), 34 deletions(-)
>
> diff --git a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
> b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
> index a44fbf2a50..5f59938518 100644
> --- a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
> +++ b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
> @@ -44,6 +44,8 @@ FspApiCallingCheck (
> //
> if (((UINTN)FspData != MAX_ADDRESS) && ((UINTN)FspData !=
> MAX_UINT32)) {
>Status = EFI_UNSUPPORTED;
> +} else if (ApiParam == NULL) {
> + Status = EFI_SUCCESS;
> } else if (EFI_ERROR (FspUpdSignatureCheck (ApiIdx, ApiParam))) {
>Status = EFI_INVALID_PARAMETER;
> }
> @@ -67,9 +69,13 @@ FspApiCallingCheck (
> } else {
>if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
> Status = EFI_UNSUPPORTED;
> - } else if (EFI_ERROR (FspUpdSignatureCheck (FspSiliconInitApiIndex,
> ApiParam))) {
> -Status = EFI_INVALID_PARAMETER;
>} else if (ApiIdx == FspSiliconInitApiIndex) {
> +if (ApiParam == NULL) {
> + Status = EFI_SUCCESS;
> +} else if (EFI_ERROR (FspUpdSignatureCheck (FspSiliconInitApiIndex,
> ApiParam))) {
> + Status = EFI_INVALID_PARAMETER;
> +}
> +
> //
> // Reset MultiPhase NumberOfPhases to zero
> //
> @@ -89,6 +95,8 @@ FspApiCallingCheck (
> } else {
>if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
> Status = EFI_UNSUPPORTED;
> + } else if (ApiParam == NULL) {
> +Status = EFI_SUCCESS;
>} else if (EFI_ERROR (FspUpdSignatureCheck (FspSmmInitApiIndex,
> ApiParam))) {
> Status = EFI_INVALID_PARAMETER;
>}
> diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> index 61030a843b..73821ad22a 100644
> --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> @@ -21,7 +21,7 @@ extern ASM_PFX(PcdGet32
> (PcdFspReservedBufferSize))
> ; Following functions will be provided in PlatformSecLib ; extern
> ASM_PFX(AsmGetFspBaseAddress) -extern
> ASM_PFX(AsmGetFspInfoHeader)
> +extern ASM_PFX(AsmGetFspInfoHeaderNoStack)
> ;extern ASM_PFX(LoadMicrocode); @todo: needs a weak
> implementation
> extern ASM_PFX(SecPlatformInit) ; @todo: needs a weak implementation
> extern ASM_PFX(SecCarInit)
> @@ -160,6 +160,47 @@ endstruc
> RET_ESI_EXT mm7
> %endmacro
>
> +%macro CALL_EDI 1
> +
> + mov edi, %%ReturnAddress
> + jmp %1
> +%%ReturnAddress:
> +
> +%endmacro
> +
> +%macro CALL_EBP 1
> + mov ebp, %%ReturnAddress
> + jmp %1
> +%%ReturnAddress:
> +%endmacro
> +
> +%macro RET_EBP 0
> + jmp ebp ; restore EIP from EBP
> +%endmacro
> +
> +;
> +; Load UPD region pointer in ECX
> +;
> +global ASM_PFX(LoadUpdPointerToECX)
> +ASM_PFX(LoadUpdPointerToECX):
> + ;
> + ; esp + 4 is input UPD parameter
> + ; If esp + 4 is NULL the
Re: [edk2-devel] [PATCH v2] IntelFsp2Pkg: FSP should support input UPD as NULL.
Patch merged:
https://github.com/tianocore/edk2/commit/b84f32ae5b475ce657ea1c9db29d4e4ec7711948
Thanks,
Chasel
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Chiu,
> Chasel
> Sent: Tuesday, November 1, 2022 10:46 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star
> Subject: [edk2-devel] [PATCH v2] IntelFsp2Pkg: FSP should support input
> UPD as NULL.
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4114
>
> FSP specification supports input UPD as NULL cases which FSP will use built-
> in UPD region instead.
> FSP should not return INVALID_PARAMETER in such cases.
>
> In FSP-T entry point case, the valid FSP-T UPD region pointer will be passed
> to platform FSP code to consume.
> In FSP-M and FSP-S cases, valid UPD pointer will be decided when updating
> corresponding pointer field in FspGlobalData.
>
> Cc: Nate DeSimone
> Cc: Star Zeng
> Signed-off-by: Chasel Chiu
> ---
> IntelFsp2Pkg/FspSecCore/SecFspApiChk.c | 12 ++--
> IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm | 73
> +++--
>
> IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm | 40
> ++--
> 3 files changed, 91 insertions(+), 34 deletions(-)
>
> diff --git a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
> b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
> index a44fbf2a50..5f59938518 100644
> --- a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
> +++ b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
> @@ -44,6 +44,8 @@ FspApiCallingCheck (
> // if (((UINTN)FspData != MAX_ADDRESS) && ((UINTN)FspData !=
> MAX_UINT32)) { Status = EFI_UNSUPPORTED;+} else if (ApiParam ==
> NULL) {+ Status = EFI_SUCCESS; } else if (EFI_ERROR
> (FspUpdSignatureCheck (ApiIdx, ApiParam))) { Status =
> EFI_INVALID_PARAMETER; }@@ -67,9 +69,13 @@ FspApiCallingCheck (
> } else { if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE)
> { Status = EFI_UNSUPPORTED;- } else if (EFI_ERROR
> (FspUpdSignatureCheck (FspSiliconInitApiIndex, ApiParam))) {-Status =
> EFI_INVALID_PARAMETER; } else if (ApiIdx == FspSiliconInitApiIndex) {+
> if (ApiParam == NULL) {+ Status = EFI_SUCCESS;+} else if
> (EFI_ERROR (FspUpdSignatureCheck (FspSiliconInitApiIndex, ApiParam))) {+
> Status = EFI_INVALID_PARAMETER;+}+ // // Reset
> MultiPhase
> NumberOfPhases to zero //@@ -89,6 +95,8 @@ FspApiCallingCheck (
> } else { if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE)
> { Status = EFI_UNSUPPORTED;+ } else if (ApiParam == NULL) {+
> Status = EFI_SUCCESS; } else if (EFI_ERROR (FspUpdSignatureCheck
> (FspSmmInitApiIndex, ApiParam))) { Status =
> EFI_INVALID_PARAMETER; }diff --git
> a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> index 61030a843b..73821ad22a 100644
> --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> @@ -21,7 +21,7 @@ extern ASM_PFX(PcdGet32
> (PcdFspReservedBufferSize))
> ; Following functions will be provided in PlatformSecLib ; extern
> ASM_PFX(AsmGetFspBaseAddress)-extern
> ASM_PFX(AsmGetFspInfoHeader)+extern
> ASM_PFX(AsmGetFspInfoHeaderNoStack) ;extern
> ASM_PFX(LoadMicrocode); @todo: needs a weak implementation extern
> ASM_PFX(SecPlatformInit) ; @todo: needs a weak implementation extern
> ASM_PFX(SecCarInit)@@ -160,6 +160,47 @@ endstruc
> RET_ESI_EXT mm7 %endmacro +%macro CALL_EDI 1++ mov edi,
> %%ReturnAddress+ jmp %1+%%ReturnAddress:++%endmacro++%macro
> CALL_EBP 1+ mov ebp, %%ReturnAddress+ jmp
> %1+%%ReturnAddress:+%endmacro++%macro RET_EBP 0+ jmp
> ebp ; restore EIP from EBP+%endmacro++;+; Load UPD
> region pointer in ECX+;+global
> ASM_PFX(LoadUpdPointerToECX)+ASM_PFX(LoadUpdPointerToECX):+ ;+ ;
> esp + 4 is input UPD parameter+ ; If esp + 4 is NULL the default UPD should
> be used+ ; ecx will be the UPD region that should be used+ ;+ mov
> ecx,
> dword [esp + 4]+ cmp ecx, 0+ jnz ParamValid++ ;+ ; Fall back
> to
> default UPD region+ ;+ CALL_EDI
> ASM_PFX(AsmGetFspInfoHeaderNoStack)+ mov ecx, DWORD [eax +
> 01Ch] ; Read FsptImageBaseAddress+ add ecx, DWORD [eax +
> 024h] ; Get Cfg Region base address = FsptImageBaseAddress +
> CfgRegionOffset+ParamValid:+ RET_EBP+ ; ; @todo: The strong/weak
> implementation does not work. ;This needs to be reviewed later.@@ -
> 187,10 +228,9 @@ endstruc
> global ASM_PF
Re: [edk2-devel] [PATCH] IntelFsp2Pkg: Update Function header to support IA32/X64.
Patch merged: https://github.com/tianocore/edk2/commit/c46204e25f5b929fae2b336c03c73fada632d4f4 Thanks, Chasel > -Original Message- > From: devel@edk2.groups.io On Behalf Of Chiu, > Chasel > Sent: Thursday, October 27, 2022 7:58 PM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > ; Zeng, Star > Subject: [edk2-devel] [PATCH] IntelFsp2Pkg: Update Function header to > support IA32/X64. > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4126 > > Common functions will have either 32bit or 64bit instances which having > different return code size. Function header should support both scenarios. > > Cc: Nate DeSimone > Cc: Star Zeng > Signed-off-by: Chasel Chiu > --- > IntelFsp2Pkg/FspSecCore/SecFsp.h | 4 ++-- > IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h | 12 ++-- > 2 files changed, 8 insertions(+), 8 deletions(-) > > diff --git a/IntelFsp2Pkg/FspSecCore/SecFsp.h > b/IntelFsp2Pkg/FspSecCore/SecFsp.h > index e84528b378..d7a5976c12 100644 > --- a/IntelFsp2Pkg/FspSecCore/SecFsp.h > +++ b/IntelFsp2Pkg/FspSecCore/SecFsp.h > @@ -70,7 +70,7 @@ FspDataPointerFixUp ( >@return FSP binary base address. **/-UINT32+UINTN EFIAPI > AsmGetFspBaseAddress ( VOID@@ -82,7 +82,7 @@ > AsmGetFspBaseAddress ( >@return FSP binary base address. **/-UINT32+UINTN EFIAPI > AsmGetFspInfoHeader ( VOIDdiff --git > a/IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h > b/IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h > index c91ea4a78f..598fdb9ec5 100644 > --- a/IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h > +++ b/IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h > @@ -17,10 +17,10 @@ >The callee should not use XMM6/XMM7. The return address is saved in > MM7. - @retval in saved in EAX - 0 means platform initialization success.+ > @retval in saved in EAX/RAX - 0 means platform initialization success. > other means platform initialization fail. **/-UINT32+UINTN EFIAPI > SecPlatformInit ( VOID@@ -37,10 +37,10 @@ SecPlatformInit ( > @param[in] FsptUpdDataPtr Address pointer to the FSPT_UPD data > structure. It is saved in ESP. - @retval in saved in EAX - 0 means Microcode > is loaded successfully.+ @retval in saved in EAX/RAX - 0 means Microcode > is loaded successfully. other means Microcode is > not loaded > successfully. **/-UINT32+UINTN EFIAPI LoadMicrocode ( IN VOID > *FsptUpdDataPtr@@ -56,10 +56,10 @@ LoadMicrocode ( > @param[in] FsptUpdDataPtr Address pointer to the FSPT_UPD data > structure. It is saved in ESP. - @retval in saved in EAX - 0 means CAR > initialization success.+ @retval in saved in EAX/RAX - 0 means CAR > initialization success. other means CAR > initialization fail. > **/-UINT32+UINTN EFIAPI SecCarInit ( IN VOID *FsptUpdDataPtr-- > 2.35.0.windows.1 > > > > -=-=-=-=-=-= > Groups.io Links: You receive all messages sent to this group. > View/Reply Online (#95662): > https://edk2.groups.io/g/devel/message/95662 > Mute This Topic: https://groups.io/mt/94619463/1777047 > Group Owner: devel+ow...@edk2.groups.io > Unsubscribe: https://edk2.groups.io/g/devel/unsub [chasel.c...@intel.com] > -=-=-=-=-=-= > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#95870): https://edk2.groups.io/g/devel/message/95870 Mute This Topic: https://groups.io/mt/94619463/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
