Re: RTEMS booting on PolarFire SoC FPGA

2021-01-05 Thread Hesham Almatary
On Wed, 6 Jan 2021 at 07:30, somesh deshmukh  wrote:
>
> After testing multiple times I observed that the failing instruction is not 
> consistent but I am getting mcause as 2 every time, which represents Illegal 
> instruction.
This sounds like memory is being overwritten.

> Is it compulsory to use the device tree to boot RTEMS? I am trying to boot it 
> using a simple bootloader application that will copy the executable at 0x8000 
> and point the processor to that location to start execution. As the primary 
> goal is to execute the default hello world application on PolarFire SoC 
> Hardware.
> Is BSP_START_COPY_FDT_FROM_U_BOOT macro in the start.S enabled by default?
It is not compulsory to enable BSP_START_COPY_FDT_FROM_U_BOOT, but
it's compulsory for RTEMS to have FDT passed to it in a1. That's how
it knows about devices, CPU, etc. So even if you disable
BSP_START_COPY_FDT_FROM_U_BOOT, this will get you a bit far ahead but
will still fail during the FDT probing done later.

>
> Thanks and Regards,
> Somesh
>
> On Tue, Jan 5, 2021 at 5:53 PM Hesham Almatary  
> wrote:
>>
>> I don't see why the "auipc" would fail. Are you sure that's the
>> faulting instruction? Can you read mcause/mepc from your debugger
>> after it hangs?
>> How/where do you prepare the FDT and pass it to RTEMS? bsp_fdt_copy
>> expects the bootloader to pass the HARTID in a0, and the FDT pointer
>> in a1.
>>
>>
>> On Tue, 5 Jan 2021 at 13:16, somesh deshmukh  
>> wrote:
>> >
>> > Hi All,
>> > I am trying to boot RTEMS on PolarFire SoC FPGA using rv64imafdc_medany 
>> > BSP.
>> > I am using a simple bare-metal bootloader application to copy the 
>> > hello.bin(I generated a hello.bin file from hello.exe from 
>> > testsuits/samples directory) at the address 0x8000.
>> > Attached is the disassembly of the example that I am using to boot the 
>> > RTEMS. I kept breakpoint at 0x8032  and the breakpoint gets a hit. 
>> > After this instruction, the processor just hangs in some unknown state, 
>> > and the breakpoints after this don't get hit as the processor is in the 
>> > unknown state, the register values cant be read.
>> >
>> > Does anyone have any idea how to debug this issue? Any leads will be 
>> > helpful.
>> >
>> >
>> > Thanks and Regards,
>> > Somesh
>> > ___
>> > devel mailing list
>> > devel@rtems.org
>> > http://lists.rtems.org/mailman/listinfo/devel
___
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel


Re: RTEMS booting on PolarFire SoC FPGA

2021-01-05 Thread somesh deshmukh
After testing multiple times I observed that the failing instruction is not
consistent but I am getting mcause as 2 every time, which represents
Illegal instruction.
Is it compulsory to use the device tree to boot RTEMS? I am trying to boot
it using a simple bootloader application that will copy the executable at
0x8000 and point the processor to that location to start execution. As the
primary goal is to execute the default hello world application on PolarFire
SoC Hardware.
Is BSP_START_COPY_FDT_FROM_U_BOOT macro in the start.S enabled by default?

Thanks and Regards,
Somesh

On Tue, Jan 5, 2021 at 5:53 PM Hesham Almatary 
wrote:

> I don't see why the "auipc" would fail. Are you sure that's the
> faulting instruction? Can you read mcause/mepc from your debugger
> after it hangs?
> How/where do you prepare the FDT and pass it to RTEMS? bsp_fdt_copy
> expects the bootloader to pass the HARTID in a0, and the FDT pointer
> in a1.
>
>
> On Tue, 5 Jan 2021 at 13:16, somesh deshmukh 
> wrote:
> >
> > Hi All,
> > I am trying to boot RTEMS on PolarFire SoC FPGA using rv64imafdc_medany
> BSP.
> > I am using a simple bare-metal bootloader application to copy the
> hello.bin(I generated a hello.bin file from hello.exe from
> testsuits/samples directory) at the address 0x8000.
> > Attached is the disassembly of the example that I am using to boot the
> RTEMS. I kept breakpoint at 0x8032  and the breakpoint gets a hit.
> After this instruction, the processor just hangs in some unknown state, and
> the breakpoints after this don't get hit as the processor is in the unknown
> state, the register values cant be read.
> >
> > Does anyone have any idea how to debug this issue? Any leads will be
> helpful.
> >
> >
> > Thanks and Regards,
> > Somesh
> > ___
> > devel mailing list
> > devel@rtems.org
> > http://lists.rtems.org/mailman/listinfo/devel
>
___
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel

Re: [PATCH] Squashed commit of the following:

2021-01-05 Thread Gedare Bloom
Hi Robin,

On Tue, Jan 5, 2021 at 5:20 AM Robin.Mueller 
wrote:

> commit 8bcd2c40ac28bf575d6e012c57e3546799eefb40
> Author: Robin.Mueller 
> Date:   Tue Jan 5 12:16:19 2021 +0100
>
> deleted old cfg file
>
> commit 2da3db8799018e98d2237ee54b13f163690fbeb2
> Author: Robin.Mueller 
> Date:   Tue Jan 5 12:13:03 2021 +0100
>
> removed some moved components
>
> commit d63a12b6fde4c6025be5e755bb4fde547f968979
> Author: Robin.Mueller 
> Date:   Tue Jan 5 12:10:37 2021 +0100
>
> reverted gitignore change
>
> commit 6ac23279ddc8d8cf5b57c38f7c0e994f225f74af
> Author: Robin.Mueller 
> Date:   Tue Jan 5 12:09:31 2021 +0100
>
> merged changes from upstream
>
> commit a51d8f3c977abb23871dea6926de75a26592db09
> Merge: d238213dd6 0cb2f4f4de
> Author: Robin.Mueller 
> Date:   Mon Jan 4 16:04:26 2021 +0100
>
> Merge branch 'mueller/nucleo-patch' into mueller/nucleo_another_try
>
> commit 0cb2f4f4deb0015f96866bc00869095b2e637437
> Author: Robin.Mueller 
> Date:   Mon Jan 4 16:04:03 2021 +0100
>
> better help output
>
>
> commit 4e2645f7586508b0f68e2fb19f888e92d4ac5530
> Author: Robin.Mueller 
> Date:   Mon Jan 4 16:00:46 2021 +0100
>
> functions made public
>
> commit d238213dd657dcdd4825c8fa3db33422ecb37719
> Merge: 3a243aabc1 a6675d388e
> Author: Robin.Mueller 
> Date:   Mon Jan 4 15:52:35 2021 +0100
>
> Merge branch 'mueller/nucleo-patch' into mueller/nucleo_another_try
>
> commit a6675d388e174ad23ce6d61b3084742c056186be
> Author: Robin.Mueller 
> Date:   Mon Jan 4 15:51:39 2021 +0100
>
> prepared patch
>
> commit 3a243aabc1cb933a1d1a0ed86eea0c9f54d97f90
> Merge: 50a549d493 f867e7b6f4
> Author: Robin.Mueller 
> Date:   Mon Jan 4 15:48:18 2021 +0100
>
> Merge branch 'master' into mueller/nucleo_another_try
>
> commit 50a549d4938dc2681ec0cf18aa49bd1c74e1d13d
> Author: Robin.Mueller 
> Date:   Mon Jan 4 13:01:31 2021 +0100
>
> small tweak
>
> commit d920a820d4ad442dfb10ff733cef43b65b4bdea7
> Author: Robin.Mueller 
> Date:   Mon Jan 4 12:59:25 2021 +0100
>
> reverted stuff and made definitions weak
>
> commit ce36d0583959c146e48b3215b3b9000bd4a9ab66
> Author: Robin.Mueller 
> Date:   Mon Jan 4 11:24:03 2021 +0100
>
> stm32h7 config
>
> commit 3f460f0073d67f75bdd8ded2c02c0391bef9a131
> Author: Robin.Mueller 
> Date:   Sat Jan 2 18:51:47 2021 +0100
>
> correct uart chosen
>
> commit b6f27f08107450e832fa2dea30f8e7dae925fd31
> Author: Robin.Mueller 
> Date:   Sat Jan 2 16:39:25 2021 +0100
>
> trying to load bspopts
>
> commit cb345ef21d4ef442290715ce1e5fce48db91119b
> Merge: 93c21c74f9 a299c4feef
> Author: Robin Mueller 
> Date:   Thu Dec 17 23:10:56 2020 +0100
>
> Merge remote-tracking branch 'upstream/master' into
> mueller/added-nucleo-yaml
>
> commit 93c21c74f928796cbc618c7c4aef492244973402
> Merge: 51104ac6a5 fe58f6ce4b
> Author: Robin Mueller 
> Date:   Fri Nov 27 00:00:59 2020 +0100
>
> Merge remote-tracking branch 'upstream/master' into
> mueller/added-nucleo-yaml
>
> commit 51104ac6a5b700a65efb3ecca22b3c5df41a80f5
> Author: Robin.Mueller 
> Date:   Thu Nov 26 11:25:22 2020 +0100
>
> value hardcoded again
>
> commit 2d96d82a84ca4f96a1b17406a0aefe07bb52510e
> Author: Robin.Mueller 
> Date:   Thu Nov 26 11:15:38 2020 +0100
>
> define not propagated to header
>
> commit 706a4542c3bdc963497d6404602dcf24391dea01
> Author: Robin.Mueller 
> Date:   Wed Nov 25 23:48:36 2020 +0100
>
> comment moved
>
> commit bd8359bbd7c3d154f401a1ffdf16d90a6e8b34dd
> Author: Robin.Mueller 
> Date:   Wed Nov 25 21:40:19 2020 +0100
>
> moved config option
>
> commit ede140e783479c09fc82a0008651e07b612dc488
> Author: Robin.Mueller 
> Date:   Wed Nov 25 21:37:31 2020 +0100
>
> added build dependency
>
> commit 4e5c1404ce9277eaadd1b7e697310fc97206000f
> Author: Robin.Mueller 
> Date:   Wed Nov 25 20:16:45 2020 +0100
>
> trying to make it externally configurable
>
> commit 4fbd5f99683518c3442612c639b3894036de8b1e
> Author: Robin.Mueller 
> Date:   Wed Nov 25 19:53:11 2020 +0100
>
> added nucleo adaption
> ---
>
> Squached version of the patch
>
>
Can you please reword your commit message to provide a useful single
message? https://devel.rtems.org/wiki/Developer/Git#GitCommits

We don't need all the intermediate commit messages/states of your code.


>  bsps/arm/stm32h7/console/console-usart3-cfg.c | 21 +++
>  bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h |  8 +++
>  bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h |  1 +
>  bsps/arm/stm32h7/start/system_stm32h7xx.c |  6 ++
>  spec/build/bsps/arm/stm32h7/bspstm32h7.yml|  2 ++
>  spec/build/bsps/arm/stm32h7/opth743nucleo.yml | 13 
>  6 files changed, 51 insertions(+)
>  create mode 100644 spec/build/bsps/arm/stm32h7/opth743nucleo.yml
>
> diff --git a/bsps/arm/stm32h7/console/console-usart3-cfg.c
> b/bsps/arm/stm32h7/console/console-usart3-cfg.c
> index b40f6da5aa..dc552610e1 100644
> --- a/bsps/arm/stm32h7/console/console-usart3-cfg.c
> +++ 

Re: RTEMS booting on PolarFire SoC FPGA

2021-01-05 Thread Hesham Almatary
I don't see why the "auipc" would fail. Are you sure that's the
faulting instruction? Can you read mcause/mepc from your debugger
after it hangs?
How/where do you prepare the FDT and pass it to RTEMS? bsp_fdt_copy
expects the bootloader to pass the HARTID in a0, and the FDT pointer
in a1.


On Tue, 5 Jan 2021 at 13:16, somesh deshmukh  wrote:
>
> Hi All,
> I am trying to boot RTEMS on PolarFire SoC FPGA using rv64imafdc_medany BSP.
> I am using a simple bare-metal bootloader application to copy the hello.bin(I 
> generated a hello.bin file from hello.exe from testsuits/samples directory) 
> at the address 0x8000.
> Attached is the disassembly of the example that I am using to boot the RTEMS. 
> I kept breakpoint at 0x8032  and the breakpoint gets a hit. After this 
> instruction, the processor just hangs in some unknown state, and the 
> breakpoints after this don't get hit as the processor is in the unknown 
> state, the register values cant be read.
>
> Does anyone have any idea how to debug this issue? Any leads will be helpful.
>
>
> Thanks and Regards,
> Somesh
> ___
> devel mailing list
> devel@rtems.org
> http://lists.rtems.org/mailman/listinfo/devel
___
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel


[PATCH] Squashed commit of the following:

2021-01-05 Thread Robin.Mueller
commit 8bcd2c40ac28bf575d6e012c57e3546799eefb40
Author: Robin.Mueller 
Date:   Tue Jan 5 12:16:19 2021 +0100

deleted old cfg file

commit 2da3db8799018e98d2237ee54b13f163690fbeb2
Author: Robin.Mueller 
Date:   Tue Jan 5 12:13:03 2021 +0100

removed some moved components

commit d63a12b6fde4c6025be5e755bb4fde547f968979
Author: Robin.Mueller 
Date:   Tue Jan 5 12:10:37 2021 +0100

reverted gitignore change

commit 6ac23279ddc8d8cf5b57c38f7c0e994f225f74af
Author: Robin.Mueller 
Date:   Tue Jan 5 12:09:31 2021 +0100

merged changes from upstream

commit a51d8f3c977abb23871dea6926de75a26592db09
Merge: d238213dd6 0cb2f4f4de
Author: Robin.Mueller 
Date:   Mon Jan 4 16:04:26 2021 +0100

Merge branch 'mueller/nucleo-patch' into mueller/nucleo_another_try

commit 0cb2f4f4deb0015f96866bc00869095b2e637437
Author: Robin.Mueller 
Date:   Mon Jan 4 16:04:03 2021 +0100

better help output


commit 4e2645f7586508b0f68e2fb19f888e92d4ac5530
Author: Robin.Mueller 
Date:   Mon Jan 4 16:00:46 2021 +0100

functions made public

commit d238213dd657dcdd4825c8fa3db33422ecb37719
Merge: 3a243aabc1 a6675d388e
Author: Robin.Mueller 
Date:   Mon Jan 4 15:52:35 2021 +0100

Merge branch 'mueller/nucleo-patch' into mueller/nucleo_another_try

commit a6675d388e174ad23ce6d61b3084742c056186be
Author: Robin.Mueller 
Date:   Mon Jan 4 15:51:39 2021 +0100

prepared patch

commit 3a243aabc1cb933a1d1a0ed86eea0c9f54d97f90
Merge: 50a549d493 f867e7b6f4
Author: Robin.Mueller 
Date:   Mon Jan 4 15:48:18 2021 +0100

Merge branch 'master' into mueller/nucleo_another_try

commit 50a549d4938dc2681ec0cf18aa49bd1c74e1d13d
Author: Robin.Mueller 
Date:   Mon Jan 4 13:01:31 2021 +0100

small tweak

commit d920a820d4ad442dfb10ff733cef43b65b4bdea7
Author: Robin.Mueller 
Date:   Mon Jan 4 12:59:25 2021 +0100

reverted stuff and made definitions weak

commit ce36d0583959c146e48b3215b3b9000bd4a9ab66
Author: Robin.Mueller 
Date:   Mon Jan 4 11:24:03 2021 +0100

stm32h7 config

commit 3f460f0073d67f75bdd8ded2c02c0391bef9a131
Author: Robin.Mueller 
Date:   Sat Jan 2 18:51:47 2021 +0100

correct uart chosen

commit b6f27f08107450e832fa2dea30f8e7dae925fd31
Author: Robin.Mueller 
Date:   Sat Jan 2 16:39:25 2021 +0100

trying to load bspopts

commit cb345ef21d4ef442290715ce1e5fce48db91119b
Merge: 93c21c74f9 a299c4feef
Author: Robin Mueller 
Date:   Thu Dec 17 23:10:56 2020 +0100

Merge remote-tracking branch 'upstream/master' into 
mueller/added-nucleo-yaml

commit 93c21c74f928796cbc618c7c4aef492244973402
Merge: 51104ac6a5 fe58f6ce4b
Author: Robin Mueller 
Date:   Fri Nov 27 00:00:59 2020 +0100

Merge remote-tracking branch 'upstream/master' into 
mueller/added-nucleo-yaml

commit 51104ac6a5b700a65efb3ecca22b3c5df41a80f5
Author: Robin.Mueller 
Date:   Thu Nov 26 11:25:22 2020 +0100

value hardcoded again

commit 2d96d82a84ca4f96a1b17406a0aefe07bb52510e
Author: Robin.Mueller 
Date:   Thu Nov 26 11:15:38 2020 +0100

define not propagated to header

commit 706a4542c3bdc963497d6404602dcf24391dea01
Author: Robin.Mueller 
Date:   Wed Nov 25 23:48:36 2020 +0100

comment moved

commit bd8359bbd7c3d154f401a1ffdf16d90a6e8b34dd
Author: Robin.Mueller 
Date:   Wed Nov 25 21:40:19 2020 +0100

moved config option

commit ede140e783479c09fc82a0008651e07b612dc488
Author: Robin.Mueller 
Date:   Wed Nov 25 21:37:31 2020 +0100

added build dependency

commit 4e5c1404ce9277eaadd1b7e697310fc97206000f
Author: Robin.Mueller 
Date:   Wed Nov 25 20:16:45 2020 +0100

trying to make it externally configurable

commit 4fbd5f99683518c3442612c639b3894036de8b1e
Author: Robin.Mueller 
Date:   Wed Nov 25 19:53:11 2020 +0100

added nucleo adaption
---

Squached version of the patch

 bsps/arm/stm32h7/console/console-usart3-cfg.c | 21 +++
 bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h |  8 +++
 bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h |  1 +
 bsps/arm/stm32h7/start/system_stm32h7xx.c |  6 ++
 spec/build/bsps/arm/stm32h7/bspstm32h7.yml|  2 ++
 spec/build/bsps/arm/stm32h7/opth743nucleo.yml | 13 
 6 files changed, 51 insertions(+)
 create mode 100644 spec/build/bsps/arm/stm32h7/opth743nucleo.yml

diff --git a/bsps/arm/stm32h7/console/console-usart3-cfg.c 
b/bsps/arm/stm32h7/console/console-usart3-cfg.c
index b40f6da5aa..dc552610e1 100644
--- a/bsps/arm/stm32h7/console/console-usart3-cfg.c
+++ b/bsps/arm/stm32h7/console/console-usart3-cfg.c
@@ -25,12 +25,32 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
+#ifdef __rtems__
+#include 
+#endif
+
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
 
 #include 
 
+#if STM32H743ZI_NUCLEO == 1
+const stm32h7_uart_config stm32h7_usart3_config = {
+  .gpio = {
+.regs = GPIOD,
+.config = {
+  .Pin = GPIO_PIN_8 | GPIO_PIN_9,
+  .Mode = GPIO_MODE_AF_PP,
+  .Pull = GPIO_NOPULL,
+  .Speed = GPIO_SPEED_FREQ_LOW,
+  .Alternate = GPIO_AF7_USART3
+}
+  },
+  .irq = USART3_IRQn,
+  .device_index = 2
+};
+#else
 

[PATCH 01/19] added nucleo adaption

2021-01-05 Thread Robin.Mueller
---

This patch was updated after the configuration structs for the STM32
were moved into separate files.

 bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h 
b/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h
index d423e4f782..715a36d807 100644
--- a/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h
+++ b/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h
@@ -103,7 +103,9 @@
   *(when HSE is used as system clock source, directly or through the 
PLL).  
   */
 #if !defined  (HSE_VALUE) 
-#define HSE_VALUE((uint32_t)2500) /*!< Value of the External 
oscillator in Hz : FPGA case fixed to 60MHZ */
+//#define HSE_VALUE((uint32_t)2500) /*!< Value of the External 
oscillator in Hz : FPGA case fixed to 60MHZ */
+// Correction for the STM32H743ZI Nucleo
+#define HSE_VALUE  ((uint32_t)800)
 #endif /* HSE_VALUE */
 
 #if !defined  (HSE_STARTUP_TIMEOUT)
-- 
2.25.1


>From 4e5c1404ce9277eaadd1b7e697310fc97206000f Mon Sep 17 00:00:00 2001
From: "Robin.Mueller" 
Date: Wed, 25 Nov 2020 20:16:45 +0100
Subject: [PATCH 02/19] trying to make it externally configurable

---
 .gitignore|  1 +
 bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h |  8 ++--
 spec/build/bsps/arm/stm32h7/opth743nucleo.yml | 13 +
 3 files changed, 20 insertions(+), 2 deletions(-)
 create mode 100644 spec/build/bsps/arm/stm32h7/opth743nucleo.yml

diff --git a/.gitignore b/.gitignore
index 8b28b186e1..ec719d4cf0 100644
--- a/.gitignore
+++ b/.gitignore
@@ -12,3 +12,4 @@ Makefile.in
 /testsuites/build/build
 /testsuites/build/wscript
 .waf*
+.project
diff --git a/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h 
b/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h
index 715a36d807..ff59180d72 100644
--- a/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h
+++ b/bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h
@@ -103,9 +103,13 @@
   *(when HSE is used as system clock source, directly or through the 
PLL).  
   */
 #if !defined  (HSE_VALUE) 
-//#define HSE_VALUE((uint32_t)2500) /*!< Value of the External 
oscillator in Hz : FPGA case fixed to 60MHZ */
+#ifdef STM32H743ZI_NUCLEO
+#define HSE_VALUE((uint32_t)800)
+#else
+#define HSE_VALUE((uint32_t)2500) /*!< Value of the External 
oscillator in Hz : FPGA case fixed to 60MHZ */
+#endif
 // Correction for the STM32H743ZI Nucleo
-#define HSE_VALUE  ((uint32_t)800)
+
 #endif /* HSE_VALUE */
 
 #if !defined  (HSE_STARTUP_TIMEOUT)
diff --git a/spec/build/bsps/arm/stm32h7/opth743nucleo.yml 
b/spec/build/bsps/arm/stm32h7/opth743nucleo.yml
new file mode 100644
index 00..3e68455893
--- /dev/null
+++ b/spec/build/bsps/arm/stm32h7/opth743nucleo.yml
@@ -0,0 +1,13 @@
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+default: false
+default-by-variant: []
+enabled-by: true
+format: '{}'
+links: []
+name: STM32H743ZI_NUCLEO
+description: |
+  Nucleo board. Use 8 MHz HSE external clock.
+type: build
-- 
2.25.1


>From ede140e783479c09fc82a0008651e07b612dc488 Mon Sep 17 00:00:00 2001
From: "Robin.Mueller" 
Date: Wed, 25 Nov 2020 21:37:31 +0100
Subject: [PATCH 03/19] added build dependency

---
 spec/build/bsps/arm/stm32h7/bspstm32h7.yml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/spec/build/bsps/arm/stm32h7/bspstm32h7.yml 
b/spec/build/bsps/arm/stm32h7/bspstm32h7.yml
index 835247316c..d2573d89fe 100644
--- a/spec/build/bsps/arm/stm32h7/bspstm32h7.yml
+++ b/spec/build/bsps/arm/stm32h7/bspstm32h7.yml
@@ -226,6 +226,8 @@ links:
   uid: optmemsdram2sz
 - role: build-dependency
   uid: optmemsram1sz
+- role: build-dependency
+  uid: opth743nucleo
 - role: build-dependency
   uid: optmemsram2sz
 - role: build-dependency
-- 
2.25.1


>From bd8359bbd7c3d154f401a1ffdf16d90a6e8b34dd Mon Sep 17 00:00:00 2001
From: "Robin.Mueller" 
Date: Wed, 25 Nov 2020 21:40:19 +0100
Subject: [PATCH 04/19] moved config option

---
 spec/build/bsps/arm/stm32h7/bspstm32h7.yml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/spec/build/bsps/arm/stm32h7/bspstm32h7.yml 
b/spec/build/bsps/arm/stm32h7/bspstm32h7.yml
index d2573d89fe..cd3446d1d4 100644
--- a/spec/build/bsps/arm/stm32h7/bspstm32h7.yml
+++ b/spec/build/bsps/arm/stm32h7/bspstm32h7.yml
@@ -226,8 +226,6 @@ links:
   uid: optmemsdram2sz
 - role: build-dependency
   uid: optmemsram1sz
-- role: build-dependency
-  uid: opth743nucleo
 - role: build-dependency
   uid: optmemsram2sz
 - role: build-dependency
@@ -246,6 +244,8 @@ links:
   uid: ../../optconsolebaud
 - role: build-dependency
   uid: ../../optconsoleirq
+- role: build-dependency
+  uid: opth743nucleo
 - role: build-dependency
   uid: ../grp
 - role: build-dependency
-- 
2.25.1


>From 706a4542c3bdc963497d6404602dcf24391dea01 Mon Sep 17 00:00:00 2001
From: "Robin.Mueller" 
Date: Wed, 25 Nov 2020 23:48:36 +0100
Subject: [PATCH 05/19] comment moved

---
 

RTEMS booting on PolarFire SoC FPGA

2021-01-05 Thread somesh deshmukh
Hi All,
I am trying to boot RTEMS on PolarFire SoC FPGA using rv64imafdc_medany BSP.
I am using a simple bare-metal bootloader application to copy the
hello.bin(I generated a hello.bin file from hello.exe from
testsuits/samples directory) at the address 0x8000.
Attached is the disassembly of the example that I am using to boot the
RTEMS. I kept breakpoint at 0x8032  and the breakpoint gets a hit.
After this instruction, the processor just hangs in some unknown state, and
the breakpoints after this don't get hit as the processor is in the unknown
state, the register values cant be read.

Does anyone have any idea how to debug this issue? Any leads will be
helpful.

[image: image.png]

Thanks and Regards,
Somesh
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