Re: [seL4] loading and booting seL4test on a zynq7000

2017-11-11 Thread Alexander.Kroh
Hi Joel,

 The serial driver in the elfloader and kernel are very limited. It
doesn't perform any baud rate configuration and hence won't be affected
by frequency variations between platforms. Only the user space drivers
are affected.

Memory is defined in the kernel here:
https://github.com/seL4/seL4/blob/master/include/plat/zynq7000/plat/mac
hine/hardware.h#L57

Note that the kernel will limit usable memory to ~512MB. It is probably
safe to assume that your 128MB memory is in the range 0x to
0x0800.

Additionally, the start address of the elfloader must be changed to a
valid address:
https://github.com/seL4/seL4_tools/blob/master/elfloader-
tool/gen_boot_image.sh#L51

Try 0x0400 or 0x0600.

 - Alex


On Sat, 2017-11-11 at 08:46 +0100, Joel Svensson wrote:
> Thanks again Alex, 
> 
> I'm suspecting something else (to begin with). Since I do get some
> output from elf_loader I went in there 
> and added a few printfs. It seems execution just stops when it has
> entered into the unpack_elf_to_paddr function. 
> It seems to be a memset call in there that just locks up any
> progress. 
> 
> One big difference my platform and the supported one is the amount of
> memory. The board I tried this 
> on has only 128mb. Is it possible that I need to change some memory
> layout-describing files to take this into account. 
> 
> If 128mb is just way too little I have some 512mb variants as well. 
> 
> At least for elf_loader it seems the uart setup is compatible with
> the configuration for the supported board. Maybe 
> this will be a problem again, later in the boot process, but right
> now I suspect the memory difference. 
> 
> Thanks again and have a great weekend. 
> /Joel 
> 
> On Sat, Nov 11, 2017 at 12:42 AM, 
> wrote:
> > Hi Joel,
> > 
> > You could try changing the reported frequency of the UART reference
> > clock:
> > https://github.com/seL4/util_libs/blob/master/libplatsupport/src/ma
> > ch/z
> > ynq/serial.c#L20
> > 
> > Or you could skip the baudrate configuration step altogether:
> > https://github.com/seL4/util_libs/blob/master/libplatsupport/src/ma
> > ch/z
> > ynq/serial.c#L379
> > 
> >  - Alex
> > 
> > 
> > 
> > 
> > On Fri, 2017-11-10 at 07:51 +0100, Joel Svensson wrote:
> > > Hello Alex and thank you. 
> > >
> > > You assumption is correct, I am on a non-supported platform (the
> > > Trenz ZynqBerry). So probably some tweaks will be needed. 
> > > Do you suspect that I will need to make these changes in the sel4
> > > code or will finding and changing some configuration file be
> > enough? 
> > > First, of course, I need to figure out what the important
> > differences
> > > between the ZC706 and the ZynqBerry are. 
> > >
> > > I was using the release build but now switched to debug and tried
> > > that as well. That did not produce any additional output. 
> > > So that UART configuration changes are needed sound very
> > likely.  
> > >
> > > Thanks again and have a great day
> > > /Joel 
> > >
> > > On Fri, Nov 10, 2017 at 12:18 AM,  > >
> > > wrote:
> > > > Hi Joel,
> > > >
> > > > Which Zynq-7000 platform are you using?
> > > > The supported platform is the ZC706. Other platforms might need
> > > > some
> > > > trivial changes, particularly for UART baudrate configuration.
> > > >
> > > > Are you using the debug or release config?
> > > > The debug build should show additional messages during boot.
> > > >
> > > >  - Alex
> > > >
> > > >
> > > >
> > > >
> > > > On Thu, 2017-11-09 at 13:35 +0100, Joel Svensson wrote:
> > > > > Hello, 
> > > > >
> > > > > I want to learn about seL4 so I am trying to get is started
> > on
> > > > the
> > > > > hardware I already have (a zynq 7000). 
> > > > >
> > > > > I have generated the image: sel4test-driver-image-arm-
> > zynq7000
> > > > >
> > > > > Now I try to load that onto the zynq by executing these
> > commands
> > > > in
> > > > > XMD:
> > > > > connect arm hw 
> > > > > rst
> > > > > fpga -f design_1_wrapper.bit
> > > > > source ps7_init.tcl
> > > > > ps7_init
> > > > > ps7_post_config
> > > > > dow sel4test-driver-image-arm-zynq7000
> > > > > run 
> > > > >
> > > > > All of the above seem to be successful. Then, I have a serial
> > > > link
> > > > > hooked up to the board (uart)
> > > > > and there I get the following output (screen /dev/ttyUSB1
> > 115200)
> > > > : 
> > > > > ELF-loader started on CPU: ARM Ltd. Cortex-A9 r3p0
> > > > >   paddr=[1000..103c881f]
> > > > > ELF-loading image 'kernel'
> > > > >   paddr=[0..2afff]
> > > > >   vaddr=[e000..e002afff]
> > > > >   virt_entry=e000
> > > > >
> > > > > But then nothing more. I am lost what to do from this
> > position in
> > > > > order to continue exploring seL4. 
> > > > > I don't even know if what I see is an indication of a problem
> > or
> > > > > not. 
> > > > > If anyone has experience in running seL4 on zynq and if you
> > sit
> > > > on
> > > > > knowledge you want to share, 
> > > > > please fill me in. 
> > > > >
> > > > > Thank you
> > > > >
> > > > 

Re: [seL4] loading and booting seL4 on a tegra Tx2

2017-11-11 Thread Alexander.Kroh
Hi Munees,

I am afraid I can't be much help, but I can offer some tips for debug
printing.

The elfloader boots the kernel with unity mappings. If you would like
to use debug printing before the kernel maps the serial port, try
changing UARTA_PPTR to UARTA_PADDR in the UART driver:
https://github.com/seL4/seL4/blob/master/src/plat/tx1/machine/io.c#L23

 - Alex

On Sat, 2017-11-11 at 11:26 +0530, Muneeswaran Rajendran wrote:
> Hi,
> 
> I am trying to bring up sel4 on tegra Tx2 platform using tegra Tx1 as
> reference.
> 
> I tweaked the important changes of UART,Timer configuration and IRQ
> number and also GIC controller, GIC distributor configuration w.r.t
> Tx2
> 
> after loading and booting the Tx2 board sel4 enter into init kernel
> to initialize the kerenl memory map for GIC and UART devices then
> control transfer to user space. I underdtand from ref manual both Tx1
> and Tx2 using the same clock and baud rate for UART configuration. 
> 
> ## Starting application at 0x8200 ...
> 
> ELF-loader started on CPU: ARM Ltd. Cortex-A57 r1p3
>   paddr=[8200..827abfff]
>  kernel_phys_start: 0x8000 
>  kernel_phys_end:0x8022fcdf
>  load_elf : image_size 0x23
> ELF-loading image 'kernel'
>   paddr=[8000..8022]
>   vaddr=[ff80..ff800022]
>   virt_entry=ff80
> load_elf : image_size 0x5e9000
> ELF-loading image 'sel4test-driver'
>   paddr=[8023..80818fff]
>   vaddr=[40..9e8fff]
>   virt_entry=41b160
> Enabling MMU and paging
> Jumping to kernel-image entry point...
> 
> Also try to add debug print in the init kernel thread to understand
> the virtual memory set-up but its crashed with synchronous exception.
> 
> It indicates that the UART driver till not available to log the
> messages this was seen in Tx1 and Tx2. Not able to check/debug
> further on this issue.
> 
> Also experimented with various arbitrary address for UARTA_PPTR and
> GIC_PPTR because Tx1 UARTA has 64byte size in case of Tx2 its 1MB.but
> still nothing has improved the state remain same.
> 
> I completely walk through the sel4 boot and arm MMU code.I do not see
> any board specific changes in this code apart from UART,GIC
> configuration and IRQ number. The assembly code of MMU mainly setting
> up TCR ,TTBR , TLB invalidation and pagetable setup for arma-57.
> 
> Please let me know your thought on this issue and how do debug this
> kind of issue.
> 
> Regards,
> Munees
> 
> 
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