Re: [PATCH v2 3/8] firmware/sysfb: Set firmware-framebuffer parent device
Hi Thomas,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-misc/drm-misc-next]
[also build test ERROR on drm-tip/drm-tip linus/master v6.8-rc2 next-20240202]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/Thomas-Zimmermann/video-Add-helpers-for-decoding-screen_info/20240202-200314
base: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
patch link:
https://lore.kernel.org/r/20240202120140.3517-4-tzimmermann%40suse.de
patch subject: [PATCH v2 3/8] firmware/sysfb: Set firmware-framebuffer parent
device
config: i386-buildonly-randconfig-003-20240203
(https://download.01.org/0day-ci/archive/20240204/202402041001.rjrt47he-...@intel.com/config)
compiler: clang version 17.0.6 (https://github.com/llvm/llvm-project
6009708b4367171ccdbf4b5905cb6a803753fe18)
reproduce (this is a W=1 build):
(https://download.01.org/0day-ci/archive/20240204/202402041001.rjrt47he-...@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot
| Closes:
https://lore.kernel.org/oe-kbuild-all/202402041001.rjrt47he-...@intel.com/
All errors (new ones prefixed by >>):
>> drivers/firmware/sysfb.c:104:41: error: too many arguments to function call,
>> expected 2, have 3
104 | pd = sysfb_create_simplefb(si, &mode, parent);
| ~^~
include/linux/sysfb.h:105:39: note: 'sysfb_create_simplefb' declared here
105 | static inline struct platform_device *sysfb_create_simplefb(const
struct screen_info *si,
| ^
~
106 | const
struct simplefb_platform_data *mode)
|
~
1 error generated.
vim +104 drivers/firmware/sysfb.c
83
84 static __init int sysfb_init(void)
85 {
86 struct screen_info *si = &screen_info;
87 struct device *parent;
88 struct simplefb_platform_data mode;
89 const char *name;
90 bool compatible;
91 int ret = 0;
92
93 mutex_lock(&disable_lock);
94 if (disabled)
95 goto unlock_mutex;
96
97 sysfb_apply_efi_quirks();
98
99 parent = sysfb_parent_dev(si);
100
101 /* try to create a simple-framebuffer device */
102 compatible = sysfb_parse_mode(si, &mode);
103 if (compatible) {
> 104 pd = sysfb_create_simplefb(si, &mode, parent);
105 if (!IS_ERR(pd))
106 goto unlock_mutex;
107 }
108
109 /* if the FB is incompatible, create a legacy framebuffer
device */
110 if (si->orig_video_isVGA == VIDEO_TYPE_EFI)
111 name = "efi-framebuffer";
112 else if (si->orig_video_isVGA == VIDEO_TYPE_VLFB)
113 name = "vesa-framebuffer";
114 else if (si->orig_video_isVGA == VIDEO_TYPE_VGAC)
115 name = "vga-framebuffer";
116 else if (si->orig_video_isVGA == VIDEO_TYPE_EGAC)
117 name = "ega-framebuffer";
118 else
119 name = "platform-framebuffer";
120
121 pd = platform_device_alloc(name, 0);
122 if (!pd) {
123 ret = -ENOMEM;
124 goto unlock_mutex;
125 }
126
127 pd->dev.parent = parent;
128
129 sysfb_set_efifb_fwnode(pd);
130
131 ret = platform_device_add_data(pd, si, sizeof(*si));
132 if (ret)
133 goto err;
134
135 ret = platform_device_add(pd);
136 if (ret)
137 goto err;
138
139 goto unlock_mutex;
140 err:
141 platform_device_put(pd);
142 unlock_mutex:
143 mutex_unlock(&disable_lock);
144 return ret;
145 }
146
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
Re: [PATCH v2 2/8] video: Provide screen_info_get_pci_dev() to find screen_info's PCI device
Hi Thomas,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-misc/drm-misc-next]
[also build test WARNING on drm-tip/drm-tip linus/master v6.8-rc2 next-20240202]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/Thomas-Zimmermann/video-Add-helpers-for-decoding-screen_info/20240202-200314
base: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
patch link:
https://lore.kernel.org/r/20240202120140.3517-3-tzimmermann%40suse.de
patch subject: [PATCH v2 2/8] video: Provide screen_info_get_pci_dev() to find
screen_info's PCI device
config: i386-buildonly-randconfig-004-20240203
(https://download.01.org/0day-ci/archive/20240204/202402040957.xnquv75n-...@intel.com/config)
compiler: clang version 17.0.6 (https://github.com/llvm/llvm-project
6009708b4367171ccdbf4b5905cb6a803753fe18)
reproduce (this is a W=1 build):
(https://download.01.org/0day-ci/archive/20240204/202402040957.xnquv75n-...@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot
| Closes:
https://lore.kernel.org/oe-kbuild-all/202402040957.xnquv75n-...@intel.com/
All warnings (new ones prefixed by >>):
>> drivers/video/screen_info_pci.c:10:6: warning: variable 'pdev' is used
>> uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]
10 | if (!(res->flags & IORESOURCE_MEM))
| ^~
drivers/video/screen_info_pci.c:13:19: note: uninitialized use occurs here
13 | for_each_pci_dev(pdev) {
| ^~~~
include/linux/pci.h:546:80: note: expanded from macro 'for_each_pci_dev'
546 | #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID,
PCI_ANY_ID, d)) != NULL)
|
^
drivers/video/screen_info_pci.c:10:2: note: remove the 'if' if its condition
is always true
10 | if (!(res->flags & IORESOURCE_MEM))
| ^~~
11 | return NULL;
drivers/video/screen_info_pci.c:8:22: note: initialize the variable 'pdev'
to silence this warning
8 | struct pci_dev *pdev;
| ^
| = NULL
1 warning generated.
vim +10 drivers/video/screen_info_pci.c
5
6 static struct pci_dev *__screen_info_pci_dev(struct resource *res)
7 {
8 struct pci_dev *pdev;
9
> 10 if (!(res->flags & IORESOURCE_MEM))
11 return NULL;
12
13 for_each_pci_dev(pdev) {
14 const struct resource *r;
15
16 if ((pdev->class >> 16) != PCI_BASE_CLASS_DISPLAY)
17 continue;
18
19 r = pci_find_resource(pdev, res);
20 if (r)
21 return pdev;
22 }
23
24 return NULL;
25 }
26
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
[drm-misc:drm-misc-next 1/1] drivers/gpu/drm/xe/xe_bo.c:42:20: warning: incompatible pointer to integer conversion initializing 'unsigned int' with an expression of type 'const struct ttm_place *'
tree: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next head: 3d94e7584486f7ac4a44fe215330ae6a1094e492 commit: 4db102dcb0396a4ccf89b1eac0f4eb3fd167a080 [1/1] Merge drm/drm-next into drm-misc-next config: arm64-randconfig-002-20240204 (https://download.01.org/0day-ci/archive/20240204/202402040923.vzprv5x8-...@intel.com/config) compiler: clang version 14.0.6 (https://github.com/llvm/llvm-project.git f28c006a5895fc0e329fe15fead81e37457cb1d1) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240204/202402040923.vzprv5x8-...@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202402040923.vzprv5x8-...@intel.com/ All warnings (new ones prefixed by >>): drivers/gpu/drm/xe/xe_bo.c:41:3: error: field designator 'num_busy_placement' does not refer to any field in type 'struct ttm_placement'; did you mean 'num_placement'? .num_busy_placement = 1, ^~ num_placement include/drm/ttm/ttm_placement.h:99:12: note: 'num_placement' declared here unsignednum_placement; ^ drivers/gpu/drm/xe/xe_bo.c:41:24: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides] .num_busy_placement = 1, ^ drivers/gpu/drm/xe/xe_bo.c:39:19: note: previous initialization is here .num_placement = 1, ^ drivers/gpu/drm/xe/xe_bo.c:42:3: error: field designator 'busy_placement' does not refer to any field in type 'struct ttm_placement'; did you mean 'num_placement'? .busy_placement = &sys_placement_flags, ^~ num_placement include/drm/ttm/ttm_placement.h:99:12: note: 'num_placement' declared here unsignednum_placement; ^ >> drivers/gpu/drm/xe/xe_bo.c:42:20: warning: incompatible pointer to integer >> conversion initializing 'unsigned int' with an expression of type 'const >> struct ttm_place *' [-Wint-conversion] .busy_placement = &sys_placement_flags, ^~~~ drivers/gpu/drm/xe/xe_bo.c:42:20: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides] .busy_placement = &sys_placement_flags, ^~~~ drivers/gpu/drm/xe/xe_bo.c:41:24: note: previous initialization is here .num_busy_placement = 1, ^ drivers/gpu/drm/xe/xe_bo.c:55:3: error: field designator 'num_busy_placement' does not refer to any field in type 'struct ttm_placement'; did you mean 'num_placement'? .num_busy_placement = 1, ^~ num_placement include/drm/ttm/ttm_placement.h:99:12: note: 'num_placement' declared here unsignednum_placement; ^ drivers/gpu/drm/xe/xe_bo.c:55:24: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides] .num_busy_placement = 1, ^ drivers/gpu/drm/xe/xe_bo.c:53:19: note: previous initialization is here .num_placement = 1, ^ drivers/gpu/drm/xe/xe_bo.c:56:3: error: field designator 'busy_placement' does not refer to any field in type 'struct ttm_placement'; did you mean 'num_placement'? .busy_placement = &sys_placement_flags, ^~ num_placement include/drm/ttm/ttm_placement.h:99:12: note: 'num_placement' declared here unsignednum_placement; ^ drivers/gpu/drm/xe/xe_bo.c:56:20: warning: incompatible pointer to integer conversion initializing 'unsigned int' with an expression of type 'const struct ttm_place *' [-Wint-conversion] .busy_placement = &sys_placement_flags, ^~~~ drivers/gpu/drm/xe/xe_bo.c:56:20: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides] .busy_placement = &sys_placement_flags, ^~~~ drivers/gpu/drm/xe/xe_bo.c:55:24: note: previous initialization is here .num_busy_placement = 1, ^ drivers/gpu/drm/xe/xe_bo.c:233:4: error: field designator 'num_busy_placement' does not refer to any field in type 'struct ttm_placement'; did you mean 'num_placement'? .num_busy_placement = c, ^~ num_placement include/drm/ttm/ttm_placement.h:99:12: note: 'num_
Re:Re: [PATCH v4 00/14] drm: Add a driver for CSF-based Mali GPUs
Hi Boris： I saw this warning sometimes（Run on a armbain based bookworm），not sure is a know issue or something else。 [15368.293031] systemd-journald[715]: Received client request to relinquish /var/log/journal/1bc4a340506142af9bd31a6a3d2170ba access. [37743.040737] [ cut here ] [37743.040764] panthor fb00.gpu: drm_WARN_ON(shmem->pages_use_count) [37743.040890] WARNING: CPU: 2 PID: 5702 at drivers/gpu/drm/drm_gem_shmem_helper.c:158 drm_gem_shmem_free+0x144/0x14c [drm_shmem_helper] [37743.040929] Modules linked in: joydev rfkill sunrpc lz4hc lz4 zram binfmt_misc hantro_vpu crct10dif_ce v4l2_vp9 v4l2_h264 snd_soc_simple_amplifier v4l2_mem2mem videobuf2_dma_contig snd_soc_es8328_i2c videobuf2_memops rk_crypto2 snd_soc_es8328 videobuf2_v4l2 sm3_generic videodev crypto_engine sm3 rockchip_rng videobuf2_common nvmem_rockchip_otp snd_soc_rockchip_i2s_tdm snd_soc_hdmi_codec snd_soc_simple_card mc snd_soc_simple_card_utils snd_soc_core snd_compress ac97_bus snd_pcm_dmaengine snd_pcm snd_timer snd soundcore dm_mod ip_tables x_tables autofs4 dw_hdmi_qp_i2s_audio dw_hdmi_qp_cec rk808_regulator rockchipdrm dw_mipi_dsi dw_hdmi_qp dw_hdmi analogix_dp drm_dma_helper fusb302 display_connector rk8xx_spi drm_display_helper phy_rockchip_snps_pcie3 phy_rockchip_samsung_hdptx_hdmi panthor tcpm rk8xx_core cec drm_gpuvm gpu_sched drm_kms_helper drm_shmem_helper drm_exec r8169 drm pwm_bl adc_keys [37743.041108] CPU: 2 PID: 5702 Comm: kworker/u16:8 Not tainted 6.8.0-rc1-edge-rockchip-rk3588 #2 [37743.041115] Hardware name: Rockchip RK3588 EVB1 V10 Board (DT) [37743.041120] Workqueue: panthor-cleanup panthor_vm_bind_job_cleanup_op_ctx_work [panthor] [37743.041151] pstate: 6049 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--) [37743.041157] pc : drm_gem_shmem_free+0x144/0x14c [drm_shmem_helper] [37743.041169] lr : drm_gem_shmem_free+0x144/0x14c [drm_shmem_helper] [37743.041181] sp : 80008d37bcc0 [37743.041184] x29: 80008d37bcc0 x28: 800081d379c0 x27: 800081d37000 [37743.041196] x26: 00019909a280 x25: 00019909a2c0 x24: 0001017a4c05 [37743.041206] x23: dead0100 x22: dead0122 x21: 0001627ac1a0 [37743.041217] x20: x19: 0001627ac000 x18: [37743.041227] x17: 00040044 x16: 005000f2b5503510 x15: fff91b77 [37743.041238] x14: 0001 x13: 03c5 x12: ffea [37743.041248] x11: dfff x10: dfff x9 : 800081e0e818 [37743.041259] x8 : 0002ffe8 x7 : c000dfff x6 : 000affa8 [37743.041269] x5 : 1fff x4 : x3 : 8000819a6008 [37743.041279] x2 : x1 : x0 : 00018465e900 [37743.041290] Call trace: [37743.041293] drm_gem_shmem_free+0x144/0x14c [drm_shmem_helper] [37743.041306] panthor_gem_free_object+0x24/0xa0 [panthor] [37743.041321] drm_gem_object_free+0x1c/0x30 [drm] [37743.041452] panthor_vm_bo_put+0xc4/0x12c [panthor] [37743.041475] panthor_vm_cleanup_op_ctx.constprop.0+0xb0/0x104 [panthor] [37743.041491] panthor_vm_bind_job_cleanup_op_ctx_work+0x28/0xd0 [panthor] [37743.041507] process_one_work+0x15c/0x3a4 [37743.041526] worker_thread+0x32c/0x438 [37743.041536] kthread+0x108/0x10c [37743.041546] ret_from_fork+0x10/0x20 [37743.041557] ---[ end trace ]--- rk3588@rk3588-evb1:~$ rk3588@rk3588-evb1:~$ neofetch -- █ █ █ █ █ █ █ █ █ █ █ OS: Armbian (24.2.0-trunk) aarch64 ███ Host: Rockchip RK3588 EVB1 V10 Board ▄▄██ ██▄▄ Kernel: 6.8.0-rc1-edge-rockchip-rk3588 ▄▄███████▄▄ Uptime: 13 hours, 28 mins ▄▄██ ██ ██ ██▄▄ Packages: 1455 (dpkg) ▄▄██ ██ ██ ██▄▄ Shell: bash 5.2.15 ▄▄██ ██ ██ ██▄▄ Resolution: 3840x2160 ▄▄██ █ ██▄▄ Terminal: /dev/pts/1 ▄▄██ ██ ██ ██▄▄ CPU: (8) @ 1.800GHz ▄▄██ ██ ██ ██▄▄ Memory: 2062MiB / 7687MiB ▄▄██ ██ ██ ██▄▄ ▄▄██ ██▄▄ ███ █ █ █ █ █ █ █ █ █ █ █ 在 2024-01-29 18:41:47，"Boris Brezillon" 写道： >On Mon, 29 Jan 2024 17:20:47 +0800 (CST) >"Andy Yan" wrote: > >> Hi Boris： >> >> Thanks for you great work。 >> >> One thing please take note： >> commit (arm64: dts: rockchip: rk3588: Add GPU nodes) in [1] seems remove >> the "disabled" status >> of usb_host2_xhci, this may cause a boot issue on some boards that use >> combphy2_psu phy for other functions. > >Oops, should be fixed in >https://gitlab.freedesktop.org/panfrost/linux/-/commits/panthor-next+rk3588 >now. > >Thanks, > >Boris
[Bug 213145] AMDGPU resets, timesout and crashes after "*ERROR* Waiting for fences timed out!"
https://bugzilla.kernel.org/show_bug.cgi?id=213145 fichterfran...@gmail.com changed: What|Removed |Added CC||fichterfran...@gmail.com --- Comment #34 from fichterfran...@gmail.com --- Hello, With my mini pc ryzen 5 6600H (six core) processor : 11 vendor_id : AuthenticAMD cpu family : 25 model : 68 model name : AMD Ryzen 5 6600H with Radeon Graphics stepping: 1 microcode : 0xa404102 cpu MHz : 400.000 cache size : 512 KB physical id : 0 siblings: 12 core id : 5 cpu cores : 6 apicid : 11 initial apicid : 11 fpu : yes fpu_exception : yes cpuid level : 16 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf rapl pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 x2apic movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb cat_l3 cdp_l3 hw_pstate ssbd mba ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 erms invpcid cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local clzero irperf xsaveerptr rdpru wbnoinvd cppc arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif v_spec_ctrl umip pku ospke vaes vpclmulqdq rdpid overflow_recov succor smca fsrm bugs: sysret_ss_attrs spectre_v1 spectre_v2 spec_store_bypass srso bogomips: 6587.56 TLB size: 2560 4K pages clflush size: 64 cache_alignment : 64 address sizes : 48 bits physical, 48 bits virtual power management: ts ttp tm hwpstate cpb eff_freq_ro [13] [14] cat /etc/debian_version trixie/sid cat /etc/debian_version trixie/sid Feb 3 21:38:50 debser kernel: [drm] PCIE GART of 1024M enabled (table at 0x00F4FFC0). Feb 3 21:38:50 debser kernel: [drm] PSP is resuming... Feb 3 21:38:50 debser kernel: [drm] reserve 0xa0 from 0xf4fe00 for PSP TMR Feb 3 21:38:51 debser kernel: [drm] DMUB hardware initialized: version=0x043C Feb 3 21:38:51 debser kernel: [drm] kiq ring mec 2 pipe 1 q 0 Feb 3 21:38:51 debser kernel: [drm] VCN decode and encode initialized successfully(under DPG Mode). Feb 3 21:38:51 debser kernel: [drm] JPEG decode initialized successfully. Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip Feb 3 21:38:50 debser kernel: [drm] PCIE GART of 1024M enabled (table at 0x00F4FFC0). Feb 3 21:38:50 debser kernel: [drm] PSP is resuming... Feb 3 21:38:50 debser kernel: [drm] reserve 0xa0 from 0xf4fe00 for PSP TMR Feb 3 21:38:51 debser kernel: [drm] DMUB hardware initialized: version=0x043C Feb 3 21:38:51 debser kernel: [drm] kiq ring mec 2 pipe 1 q 0 Feb 3 21:38:51 debser kernel: [drm] VCN decode and encode initialized successfully(under DPG Mode). Feb 3 21:38:51 debser kernel: [drm] JPEG decode initialized successfully. Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:51 debser kernel: [drm] Skip scheduling IBs! Feb 3 21:38:
[PATCH 0/2] drivers: drm: struct bus_type cleanup
This series is part of an effort to cleanup the users of the driver core, as can be seen in many recent patches authored by Greg across the tree (e.g. [1]). Specifically, this series is part of the task of splitting one of his TODOs [2]. --- [1]: https://lore.kernel.org/lkml/?q=f%3Agregkh%40linuxfoundation.org+s%3A%22make%22+and+s%3A%22const%22 [2]: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core.git/commit/?h=bus_cleanup&id=26105f537f0c60eacfeb430abd2e05d7ddcdd8aa To: Maarten Lankhorst To: Maxime Ripard To: Thomas Zimmermann To: David Airlie To: Daniel Vetter Cc: Greg Kroah-Hartman Cc: Cc: Signed-off-by: Ricardo B. Marliere --- Ricardo B. Marliere (2): drm: display: make dp_aux_bus_type const drm: mipi-dsi: make mipi_dsi_bus_type const drivers/gpu/drm/display/drm_dp_aux_bus.c | 2 +- drivers/gpu/drm/drm_mipi_dsi.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) --- base-commit: 3d94e7584486f7ac4a44fe215330ae6a1094e492 change-id: 20240203-bus_cleanup-gpu-0f90574bce24 Best regards, -- Ricardo B. Marliere
[PATCH 1/2] drm: display: make dp_aux_bus_type const
Now that the driver core can properly handle constant struct bus_type,
move the dp_aux_bus_type variable to be a constant structure as well,
placing it into read-only memory which can not be modified at runtime.
Cc: Greg Kroah-Hartman
Suggested-by: Greg Kroah-Hartman
Signed-off-by: Ricardo B. Marliere
---
drivers/gpu/drm/display/drm_dp_aux_bus.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/display/drm_dp_aux_bus.c
b/drivers/gpu/drm/display/drm_dp_aux_bus.c
index 8a165be1a821..5afc26be9d2a 100644
--- a/drivers/gpu/drm/display/drm_dp_aux_bus.c
+++ b/drivers/gpu/drm/display/drm_dp_aux_bus.c
@@ -127,7 +127,7 @@ static void dp_aux_ep_shutdown(struct device *dev)
aux_ep_drv->shutdown(to_dp_aux_ep_dev(dev));
}
-static struct bus_type dp_aux_bus_type = {
+static const struct bus_type dp_aux_bus_type = {
.name = "dp-aux",
.match = dp_aux_ep_match,
.probe = dp_aux_ep_probe,
--
2.43.0
[PATCH 2/2] drm: mipi-dsi: make mipi_dsi_bus_type const
Now that the driver core can properly handle constant struct bus_type,
move the mipi_dsi_bus_type variable to be a constant structure as well,
placing it into read-only memory which can not be modified at runtime.
Cc: Greg Kroah-Hartman
Suggested-by: Greg Kroah-Hartman
Signed-off-by: Ricardo B. Marliere
---
drivers/gpu/drm/drm_mipi_dsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index 843a6dbda93a..ef6e416522f8 100644
--- a/drivers/gpu/drm/drm_mipi_dsi.c
+++ b/drivers/gpu/drm/drm_mipi_dsi.c
@@ -89,7 +89,7 @@ static const struct dev_pm_ops mipi_dsi_device_pm_ops = {
.restore = pm_generic_restore,
};
-static struct bus_type mipi_dsi_bus_type = {
+static const struct bus_type mipi_dsi_bus_type = {
.name = "mipi-dsi",
.match = mipi_dsi_device_match,
.uevent = mipi_dsi_uevent,
--
2.43.0
Re: [PATCH v2 3/8] firmware/sysfb: Set firmware-framebuffer parent device
Hi Thomas,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-misc/drm-misc-next]
[also build test ERROR on drm-tip/drm-tip linus/master v6.8-rc2 next-20240202]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/Thomas-Zimmermann/video-Add-helpers-for-decoding-screen_info/20240202-200314
base: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
patch link:
https://lore.kernel.org/r/20240202120140.3517-4-tzimmermann%40suse.de
patch subject: [PATCH v2 3/8] firmware/sysfb: Set firmware-framebuffer parent
device
config: i386-buildonly-randconfig-002-20240203
(https://download.01.org/0day-ci/archive/20240204/202402040214.gfutmkrc-...@intel.com/config)
compiler: gcc-7 (Ubuntu 7.5.0-6ubuntu2) 7.5.0
reproduce (this is a W=1 build):
(https://download.01.org/0day-ci/archive/20240204/202402040214.gfutmkrc-...@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot
| Closes:
https://lore.kernel.org/oe-kbuild-all/202402040214.gfutmkrc-...@intel.com/
All errors (new ones prefixed by >>):
drivers/firmware/sysfb.c: In function 'sysfb_init':
>> drivers/firmware/sysfb.c:104:8: error: too many arguments to function
>> 'sysfb_create_simplefb'
pd = sysfb_create_simplefb(si, &mode, parent);
^
In file included from drivers/firmware/sysfb.c:36:0:
include/linux/sysfb.h:105:39: note: declared here
static inline struct platform_device *sysfb_create_simplefb(const struct
screen_info *si,
^
vim +/sysfb_create_simplefb +104 drivers/firmware/sysfb.c
83
84 static __init int sysfb_init(void)
85 {
86 struct screen_info *si = &screen_info;
87 struct device *parent;
88 struct simplefb_platform_data mode;
89 const char *name;
90 bool compatible;
91 int ret = 0;
92
93 mutex_lock(&disable_lock);
94 if (disabled)
95 goto unlock_mutex;
96
97 sysfb_apply_efi_quirks();
98
99 parent = sysfb_parent_dev(si);
100
101 /* try to create a simple-framebuffer device */
102 compatible = sysfb_parse_mode(si, &mode);
103 if (compatible) {
> 104 pd = sysfb_create_simplefb(si, &mode, parent);
105 if (!IS_ERR(pd))
106 goto unlock_mutex;
107 }
108
109 /* if the FB is incompatible, create a legacy framebuffer
device */
110 if (si->orig_video_isVGA == VIDEO_TYPE_EFI)
111 name = "efi-framebuffer";
112 else if (si->orig_video_isVGA == VIDEO_TYPE_VLFB)
113 name = "vesa-framebuffer";
114 else if (si->orig_video_isVGA == VIDEO_TYPE_VGAC)
115 name = "vga-framebuffer";
116 else if (si->orig_video_isVGA == VIDEO_TYPE_EGAC)
117 name = "ega-framebuffer";
118 else
119 name = "platform-framebuffer";
120
121 pd = platform_device_alloc(name, 0);
122 if (!pd) {
123 ret = -ENOMEM;
124 goto unlock_mutex;
125 }
126
127 pd->dev.parent = parent;
128
129 sysfb_set_efifb_fwnode(pd);
130
131 ret = platform_device_add_data(pd, si, sizeof(*si));
132 if (ret)
133 goto err;
134
135 ret = platform_device_add(pd);
136 if (ret)
137 goto err;
138
139 goto unlock_mutex;
140 err:
141 platform_device_put(pd);
142 unlock_mutex:
143 mutex_unlock(&disable_lock);
144 return ret;
145 }
146
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
Re: [PATCH 0/2] drivers: drm: struct bus_type cleanup
On Sat, Feb 03, 2024 at 03:25:02PM -0300, Ricardo B. Marliere wrote: > This series is part of an effort to cleanup the users of the driver > core, as can be seen in many recent patches authored by Greg across the > tree (e.g. [1]). Specifically, this series is part of the task of > splitting one of his TODOs [2]. > > --- > [1]: > https://lore.kernel.org/lkml/?q=f%3Agregkh%40linuxfoundation.org+s%3A%22make%22+and+s%3A%22const%22 > [2]: > https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core.git/commit/?h=bus_cleanup&id=26105f537f0c60eacfeb430abd2e05d7ddcdd8aa > > To: Maarten Lankhorst > To: Maxime Ripard > To: Thomas Zimmermann > To: David Airlie > To: Daniel Vetter > Cc: Greg Kroah-Hartman > Cc: > Cc: > Signed-off-by: Ricardo B. Marliere > > --- > Ricardo B. Marliere (2): > drm: display: make dp_aux_bus_type const > drm: mipi-dsi: make mipi_dsi_bus_type const > Reviewed-by: Greg Kroah-Hartman
Re: [PATCH V8 02/12] phy: freescale: add Samsung HDMI PHY
Le 03/02/2024 à 17:52, Adam Ford a écrit :
From: Lucas Stach
This adds the driver for the Samsung HDMI PHY found on the
i.MX8MP SoC.
Signed-off-by: Lucas Stach
Signed-off-by: Adam Ford
Tested-by: Alexander Stein
---
...
+static int fsl_samsung_hdmi_phy_probe(struct platform_device *pdev)
+{
+ struct fsl_samsung_hdmi_phy *phy;
+ int ret;
+
+ phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL);
+ if (!phy)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, phy);
+ phy->dev = &pdev->dev;
+
+ phy->regs = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(phy->regs))
+ return PTR_ERR(phy->regs);
+
+ phy->apbclk = devm_clk_get(phy->dev, "apb");
+ if (IS_ERR(phy->apbclk))
+ return dev_err_probe(phy->dev, PTR_ERR(phy->apbclk),
+"failed to get apb clk\n");
+
+ phy->refclk = devm_clk_get(phy->dev, "ref");
+ if (IS_ERR(phy->refclk))
+ return dev_err_probe(phy->dev, PTR_ERR(phy->refclk),
+"failed to get ref clk\n");
+
+ ret = clk_prepare_enable(phy->apbclk);
+ if (ret) {
+ dev_err(phy->dev, "failed to enable apbclk\n");
+ return ret;
+ }
+
+ pm_runtime_get_noresume(phy->dev);
+ pm_runtime_set_active(phy->dev);
+ pm_runtime_enable(phy->dev);
+
+ ret = phy_clk_register(phy);
+ if (ret) {
+ dev_err(&pdev->dev, "register clk failed\n");
+ goto register_clk_failed;
+ }
+
+ pm_runtime_put(phy->dev);
+
+ return 0;
+
+register_clk_failed:
+ clk_disable_unprepare(phy->apbclk);
+
+ return ret;
+}
+
+static int fsl_samsung_hdmi_phy_remove(struct platform_device *pdev)
+{
+ of_clk_del_provider(pdev->dev.of_node);
A clk_disable_unprepare(phy->apbclk) call seems to be missing here.
Or maybe devm_clk_get_enabled() should be used for 'apbclk'?
CJ
+
+ return 0;
+}
...
[PATCH V8 12/12] arm64: defconfig: Enable DRM_IMX8MP_DW_HDMI_BRIDGE as module
The i.MX8M Plus has support for an HDMI transmitter. The video is genereated by lcdif3, routed to the hdmi parallel video interface, then fed to a DW HDMI bridge to support up to 4K video output. Signed-off-by: Adam Ford --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index e6cf3e5d63c3..3e33825f0ed7 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -880,6 +880,7 @@ CONFIG_DRM_ANALOGIX_ANX7625=m CONFIG_DRM_I2C_ADV7511=m CONFIG_DRM_I2C_ADV7511_AUDIO=y CONFIG_DRM_CDNS_MHDP8546=m +CONFIG_DRM_IMX8MP_DW_HDMI_BRIDGE=m CONFIG_DRM_DW_HDMI_AHB_AUDIO=m CONFIG_DRM_DW_HDMI_CEC=m CONFIG_DRM_IMX_DCSS=m -- 2.43.0
[PATCH V8 11/12] arm64: dts: imx8mp: add HDMI display pipeline
From: Lucas Stach
This adds the DT nodes for all the peripherals that make up the
HDMI display pipeline.
Signed-off-by: Lucas Stach
Signed-off-by: Adam Ford
---
V2: I took this from Lucas' original submission with the following:
Removed extra clock from HDMI-TX since it is now part of the
power domain
Added interrupt-parent to PVI
Changed the name of the HDMI tranmitter to fsl,imx8mp-hdmi-tx
Added ports to HDMI-tx
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 94 +++
1 file changed, 94 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 5e51a766f3d9..e84b4f40e570 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1412,6 +1412,100 @@ irqsteer_hdmi: interrupt-controller@32fc2000 {
clock-names = "ipg";
power-domains = <&hdmi_blk_ctrl
IMX8MP_HDMIBLK_PD_IRQSTEER>;
};
+
+ hdmi_pvi: display-bridge@32fc4000 {
+ compatible = "fsl,imx8mp-hdmi-pvi";
+ reg = <0x32fc4000 0x40>;
+ interrupt-parent = <&irqsteer_hdmi>;
+ interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&hdmi_blk_ctrl
IMX8MP_HDMIBLK_PD_PVI>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ pvi_from_lcdif3: endpoint {
+ remote-endpoint =
<&lcdif3_to_pvi>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ pvi_to_hdmi_tx: endpoint {
+ remote-endpoint =
<&hdmi_tx_from_pvi>;
+ };
+ };
+ };
+ };
+
+ lcdif3: display-controller@32fc6000 {
+ compatible = "fsl,imx8mp-lcdif";
+ reg = <0x32fc6000 0x238>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&irqsteer_hdmi>;
+ clocks = <&hdmi_tx_phy>,
+<&clk IMX8MP_CLK_HDMI_APB>,
+<&clk IMX8MP_CLK_HDMI_ROOT>;
+ clock-names = "pix", "axi", "disp_axi";
+ power-domains = <&hdmi_blk_ctrl
IMX8MP_HDMIBLK_PD_LCDIF>;
+
+ port {
+ lcdif3_to_pvi: endpoint {
+ remote-endpoint =
<&pvi_from_lcdif3>;
+ };
+ };
+ };
+
+ hdmi_tx: hdmi@32fd8000 {
+ compatible = "fsl,imx8mp-hdmi-tx";
+ reg = <0x32fd8000 0x7eff>;
+ interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&irqsteer_hdmi>;
+ clocks = <&clk IMX8MP_CLK_HDMI_APB>,
+<&clk IMX8MP_CLK_HDMI_REF_266M>,
+<&clk IMX8MP_CLK_32K>,
+<&hdmi_tx_phy>;
+ clock-names = "iahb", "isfr", "cec", "pix";
+ assigned-clocks = <&clk
IMX8MP_CLK_HDMI_REF_266M>;
+ assigned-clock-parents = <&clk
IMX8MP_SYS_PLL1_266M>;
+ power-domains = <&hdmi_blk_ctrl
IMX8MP_HDMIBLK_PD_HDMI_TX>;
+ reg-io-width = <1>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ hdmi_tx_from_pvi: endpoint {
+ remote-endpoint =
<&pvi_to_hdmi_tx>;
+ };
+ };
+
+
[PATCH V8 10/12] drm/bridge: imx: add bridge wrapper driver for i.MX8MP DWC HDMI
From: Lucas Stach
Add a simple wrapper driver for the DWC HDMI bridge driver that
implements the few bits that are necessary to abstract the i.MX8MP
SoC integration.
Signed-off-by: Lucas Stach
Reviewed-by: Laurent Pinchart
Tested-by: Marek Vasut
Tested-by: Adam Ford #imx8mp-beacon
Tested-by: Richard Leitner
Tested-by: Frieder Schrempf
Tested-by: Luca Ceresoli
Signed-off-by: Adam Ford
---
v3: To move this along, I (Adam) took Lucas' V2 and attempted
to address concerns:
Changed name to imx8mp-hdmi-tx
Re-ordered includes to make drm come after linux
Removed unused variable build warning
Removed fdcc clock since it's part of the power domain now
set the phy_force_vendor = true
Removed comma after sentinel
Also added suspend/resume functions from Marek Vasut
Configured Kconfig to select the PVI and PHY automatically
since the HDMI-tx is useless without the other two components
I apologize that don't have the version history prior to V2.
---
drivers/gpu/drm/bridge/imx/Kconfig | 11 ++
drivers/gpu/drm/bridge/imx/Makefile | 1 +
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c | 154
3 files changed, 166 insertions(+)
create mode 100644 drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
diff --git a/drivers/gpu/drm/bridge/imx/Kconfig
b/drivers/gpu/drm/bridge/imx/Kconfig
index a4d13331e320..5965e8027529 100644
--- a/drivers/gpu/drm/bridge/imx/Kconfig
+++ b/drivers/gpu/drm/bridge/imx/Kconfig
@@ -3,6 +3,17 @@ if ARCH_MXC || COMPILE_TEST
config DRM_IMX_LDB_HELPER
tristate
+config DRM_IMX8MP_DW_HDMI_BRIDGE
+ tristate "Freescale i.MX8MP HDMI-TX bridge support"
+ depends on OF
+ depends on COMMON_CLK
+ select DRM_DW_HDMI
+ select DRM_IMX8MP_HDMI_PVI
+ select PHY_FSL_SAMSUNG_HDMI_PHY
+ help
+ Choose this to enable support for the internal HDMI encoder found
+ on the i.MX8MP SoC.
+
config DRM_IMX8MP_HDMI_PVI
tristate "Freescale i.MX8MP HDMI PVI bridge support"
depends on OF
diff --git a/drivers/gpu/drm/bridge/imx/Makefile
b/drivers/gpu/drm/bridge/imx/Makefile
index e2c2106509fa..edb0a7b71b30 100644
--- a/drivers/gpu/drm/bridge/imx/Makefile
+++ b/drivers/gpu/drm/bridge/imx/Makefile
@@ -1,4 +1,5 @@
obj-$(CONFIG_DRM_IMX_LDB_HELPER) += imx-ldb-helper.o
+obj-$(CONFIG_DRM_IMX8MP_DW_HDMI_BRIDGE) += imx8mp-hdmi-tx.o
obj-$(CONFIG_DRM_IMX8MP_HDMI_PVI) += imx8mp-hdmi-pvi.o
obj-$(CONFIG_DRM_IMX8QM_LDB) += imx8qm-ldb.o
obj-$(CONFIG_DRM_IMX8QXP_LDB) += imx8qxp-ldb.o
diff --git a/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
b/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
new file mode 100644
index ..89fc432ac611
--- /dev/null
+++ b/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
@@ -0,0 +1,154 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/*
+ * Copyright (C) 2022 Pengutronix, Lucas Stach
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+struct imx8mp_hdmi {
+ struct dw_hdmi_plat_data plat_data;
+ struct dw_hdmi *dw_hdmi;
+ struct clk *pixclk;
+};
+
+static enum drm_mode_status
+imx8mp_hdmi_mode_valid(struct dw_hdmi *dw_hdmi, void *data,
+ const struct drm_display_info *info,
+ const struct drm_display_mode *mode)
+{
+ struct imx8mp_hdmi *hdmi = (struct imx8mp_hdmi *)data;
+
+ if (mode->clock < 13500)
+ return MODE_CLOCK_LOW;
+
+ if (mode->clock > 297000)
+ return MODE_CLOCK_HIGH;
+
+ if (clk_round_rate(hdmi->pixclk, mode->clock * 1000) !=
+ mode->clock * 1000)
+ return MODE_CLOCK_RANGE;
+
+ /* We don't support double-clocked and Interlaced modes */
+ if ((mode->flags & DRM_MODE_FLAG_DBLCLK) ||
+ (mode->flags & DRM_MODE_FLAG_INTERLACE))
+ return MODE_BAD;
+
+ return MODE_OK;
+}
+
+static int imx8mp_hdmi_phy_init(struct dw_hdmi *dw_hdmi, void *data,
+ const struct drm_display_info *display,
+ const struct drm_display_mode *mode)
+{
+ return 0;
+}
+
+static void imx8mp_hdmi_phy_disable(struct dw_hdmi *dw_hdmi, void *data)
+{
+}
+
+static void im8mp_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi, void *data)
+{
+ /*
+* Just release PHY core from reset, all other power management is done
+* by the PHY driver.
+*/
+ dw_hdmi_phy_gen1_reset(hdmi);
+
+ dw_hdmi_phy_setup_hpd(hdmi, data);
+}
+
+static const struct dw_hdmi_phy_ops imx8mp_hdmi_phy_ops = {
+ .init = imx8mp_hdmi_phy_init,
+ .disable= imx8mp_hdmi_phy_disable,
+ .setup_hpd = im8mp_hdmi_phy_setup_hpd,
+ .read_hpd = dw_hdmi_phy_read_hpd,
+ .update_hpd = dw_hdmi_phy_update_hpd,
+};
+
+static int imx8mp_dw_hdmi_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct dw_hdmi_plat_data *plat_da
[PATCH V8 09/12] dt-bindings: display: imx: add binding for i.MX8MP HDMI TX
From: Lucas Stach
The HDMI TX controller on the i.MX8MP SoC is a Synopsys designware IP
core with a little bit of SoC integration around it.
Signed-off-by: Lucas Stach
Signed-off-by: Adam Ford
---
V3: Change name and location to better idenfity as a bridge and
HDMI 2.0a transmitter
Fix typos and feedback from Rob and added ports.
---
.../display/bridge/fsl,imx8mp-hdmi-tx.yaml| 102 ++
1 file changed, 102 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/bridge/fsl,imx8mp-hdmi-tx.yaml
diff --git
a/Documentation/devicetree/bindings/display/bridge/fsl,imx8mp-hdmi-tx.yaml
b/Documentation/devicetree/bindings/display/bridge/fsl,imx8mp-hdmi-tx.yaml
new file mode 100644
index ..3791c9f4ebab
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/fsl,imx8mp-hdmi-tx.yaml
@@ -0,0 +1,102 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/bridge/fsl,imx8mp-hdmi-tx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX8MP DWC HDMI TX Encoder
+
+maintainers:
+ - Lucas Stach
+
+description:
+ The i.MX8MP HDMI transmitter is a Synopsys DesignWare
+ HDMI 2.0a TX controller IP.
+
+allOf:
+ - $ref: /schemas/display/bridge/synopsys,dw-hdmi.yaml#
+
+properties:
+ compatible:
+enum:
+ - fsl,imx8mp-hdmi-tx
+
+ reg-io-width:
+const: 1
+
+ clocks:
+maxItems: 4
+
+ clock-names:
+items:
+ - const: iahb
+ - const: isfr
+ - const: cec
+ - const: pix
+
+ power-domains:
+maxItems: 1
+
+ ports:
+$ref: /schemas/graph.yaml#/properties/ports
+
+properties:
+ port@0:
+$ref: /schemas/graph.yaml#/properties/port
+description: Parallel RGB input port
+
+ port@1:
+$ref: /schemas/graph.yaml#/properties/port
+description: HDMI output port
+
+required:
+ - port@0
+ - port@1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - interrupts
+ - power-domains
+ - ports
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+#include
+#include
+
+hdmi@32fd8000 {
+compatible = "fsl,imx8mp-hdmi-tx";
+reg = <0x32fd8000 0x7eff>;
+interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+clocks = <&clk IMX8MP_CLK_HDMI_APB>,
+ <&clk IMX8MP_CLK_HDMI_REF_266M>,
+ <&clk IMX8MP_CLK_32K>,
+ <&hdmi_tx_phy>;
+clock-names = "iahb", "isfr", "cec", "pix";
+power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX>;
+reg-io-width = <1>;
+ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+
+ hdmi_tx_from_pvi: endpoint {
+ remote-endpoint = <&pvi_to_hdmi_tx>;
+ };
+ };
+
+ port@1 {
+reg = <1>;
+ hdmi_tx_out: endpoint {
+remote-endpoint = <&hdmi0_con>;
+ };
+ };
+};
+};
--
2.43.0
[PATCH V8 08/12] drm/bridge: imx: add driver for HDMI TX Parallel Video Interface
From: Lucas Stach
This IP block is found in the HDMI subsystem of the i.MX8MP SoC. It has a
full timing generator and can switch between different video sources. On
the i.MX8MP however the only supported source is the LCDIF. The block
just needs to be powered up and told about the polarity of the video
sync signals to act in bypass mode.
Signed-off-by: Lucas Stach
Reviewed-by: Luca Ceresoli (v7)
Tested-by: Marek Vasut (v1)
Tested-by: Luca Ceresoli (v7)
Tested-by: Richard Leitner (v2)
Tested-by: Frieder Schrempf (v2)
Reviewed-by: Laurent Pinchart (v3)
Reviewed-by: Luca Ceresoli
Tested-by: Luca Ceresoli
Tested-by: Fabio Estevam
Signed-off-by: Adam Ford
---
V8: No Change
V7: Re-do some includes to address build issues after rebasing from
Linux-next
V6: No change.
V5: I (Adam) tried to help move this along, so I took Lucas' patch and
attempted to apply fixes based on feedback. I don't have
all the history, so apologies for that.
No changes from V4 to V5
---
drivers/gpu/drm/bridge/imx/Kconfig | 7 +
drivers/gpu/drm/bridge/imx/Makefile | 1 +
drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c | 207 +++
3 files changed, 215 insertions(+)
create mode 100644 drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c
diff --git a/drivers/gpu/drm/bridge/imx/Kconfig
b/drivers/gpu/drm/bridge/imx/Kconfig
index 5a4f3d58501e..a4d13331e320 100644
--- a/drivers/gpu/drm/bridge/imx/Kconfig
+++ b/drivers/gpu/drm/bridge/imx/Kconfig
@@ -3,6 +3,13 @@ if ARCH_MXC || COMPILE_TEST
config DRM_IMX_LDB_HELPER
tristate
+config DRM_IMX8MP_HDMI_PVI
+ tristate "Freescale i.MX8MP HDMI PVI bridge support"
+ depends on OF
+ help
+ Choose this to enable support for the internal HDMI TX Parallel
+ Video Interface found on the Freescale i.MX8MP SoC.
+
config DRM_IMX8QM_LDB
tristate "Freescale i.MX8QM LVDS display bridge"
depends on OF
diff --git a/drivers/gpu/drm/bridge/imx/Makefile
b/drivers/gpu/drm/bridge/imx/Makefile
index 2b0c2e44aa1b..e2c2106509fa 100644
--- a/drivers/gpu/drm/bridge/imx/Makefile
+++ b/drivers/gpu/drm/bridge/imx/Makefile
@@ -1,4 +1,5 @@
obj-$(CONFIG_DRM_IMX_LDB_HELPER) += imx-ldb-helper.o
+obj-$(CONFIG_DRM_IMX8MP_HDMI_PVI) += imx8mp-hdmi-pvi.o
obj-$(CONFIG_DRM_IMX8QM_LDB) += imx8qm-ldb.o
obj-$(CONFIG_DRM_IMX8QXP_LDB) += imx8qxp-ldb.o
obj-$(CONFIG_DRM_IMX8QXP_PIXEL_COMBINER) += imx8qxp-pixel-combiner.o
diff --git a/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c
b/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c
new file mode 100644
index ..a76b7669fe8a
--- /dev/null
+++ b/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c
@@ -0,0 +1,207 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/*
+ * Copyright (C) 2022 Pengutronix, Lucas Stach
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define HTX_PVI_CTRL 0x0
+#define PVI_CTRL_OP_VSYNC_POL BIT(18)
+#define PVI_CTRL_OP_HSYNC_POL BIT(17)
+#define PVI_CTRL_OP_DE_POLBIT(16)
+#define PVI_CTRL_INP_VSYNC_POLBIT(14)
+#define PVI_CTRL_INP_HSYNC_POLBIT(13)
+#define PVI_CTRL_INP_DE_POL BIT(12)
+#define PVI_CTRL_MODE_MASKGENMASK(2, 1)
+#define PVI_CTRL_MODE_LCDIF 2
+#define PVI_CTRL_EN BIT(0)
+
+struct imx8mp_hdmi_pvi {
+ struct drm_bridge bridge;
+ struct device *dev;
+ struct drm_bridge *next_bridge;
+ void __iomem*regs;
+};
+
+static inline struct imx8mp_hdmi_pvi *
+to_imx8mp_hdmi_pvi(struct drm_bridge *bridge)
+{
+ return container_of(bridge, struct imx8mp_hdmi_pvi, bridge);
+}
+
+static int imx8mp_hdmi_pvi_bridge_attach(struct drm_bridge *bridge,
+enum drm_bridge_attach_flags flags)
+{
+ struct imx8mp_hdmi_pvi *pvi = to_imx8mp_hdmi_pvi(bridge);
+
+ return drm_bridge_attach(bridge->encoder, pvi->next_bridge,
+bridge, flags);
+}
+
+static void imx8mp_hdmi_pvi_bridge_enable(struct drm_bridge *bridge,
+ struct drm_bridge_state *bridge_state)
+{
+ struct drm_atomic_state *state = bridge_state->base.state;
+ struct imx8mp_hdmi_pvi *pvi = to_imx8mp_hdmi_pvi(bridge);
+ struct drm_connector_state *conn_state;
+ const struct drm_display_mode *mode;
+ struct drm_crtc_state *crtc_state;
+ struct drm_connector *connector;
+ u32 bus_flags, val;
+
+ connector = drm_atomic_get_new_connector_for_encoder(state,
bridge->encoder);
+ conn_state = drm_atomic_get_new_connector_state(state, connector);
+ crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
+
+ if (WARN_ON(pm_runtime_resume_and_get(pvi->dev)))
+ return;
+
+ mode = &crtc_state->adjusted_mode;
+
+ val = FIELD_PREP(PVI_CTR
[PATCH V8 07/12] dt-bindings: display: imx: add binding for i.MX8MP HDMI PVI
From: Lucas Stach
Add binding for the i.MX8MP HDMI parallel video interface block.
Signed-off-by: Lucas Stach
Reviewed-by: Laurent Pinchart
Reviewed-by: Conor Dooley
Signed-off-by: Adam Ford
---
V8: Add interrupt-parent
V7: No Change
V6: Add s-o-b message for myself (Adam)
V5: I tried to help move this along, so I took Lucas' patch and
attempted to apply fixes based on feedback. I don't have
all the history, so apologies for that.
Removed the pipe character from the Description.
Increased the register size from 0x40 to 0x44.
---
.../display/imx/fsl,imx8mp-hdmi-pvi.yaml | 84 +++
1 file changed, 84 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml
diff --git
a/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml
b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml
new file mode 100644
index ..56da1636014c
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml
@@ -0,0 +1,84 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi-pvi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX8MP HDMI Parallel Video Interface
+
+maintainers:
+ - Lucas Stach
+
+description:
+ The HDMI parallel video interface is a timing and sync generator block in the
+ i.MX8MP SoC, that sits between the video source and the HDMI TX controller.
+
+properties:
+ compatible:
+const: fsl,imx8mp-hdmi-pvi
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ power-domains:
+maxItems: 1
+
+ ports:
+$ref: /schemas/graph.yaml#/properties/ports
+
+properties:
+ port@0:
+$ref: /schemas/graph.yaml#/properties/port
+description: Input from the LCDIF controller.
+
+ port@1:
+$ref: /schemas/graph.yaml#/properties/port
+description: Output to the HDMI TX controller.
+
+required:
+ - port@0
+ - port@1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - power-domains
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+#include
+
+display-bridge@32fc4000 {
+compatible = "fsl,imx8mp-hdmi-pvi";
+reg = <0x32fc4000 0x44>;
+interrupt-parent = <&irqsteer_hdmi>;
+interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
+power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>;
+
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+
+port@0 {
+reg = <0>;
+pvi_from_lcdif3: endpoint {
+remote-endpoint = <&lcdif3_to_pvi>;
+};
+};
+
+port@1 {
+reg = <1>;
+pvi_to_hdmi_tx: endpoint {
+remote-endpoint = <&hdmi_tx_from_pvi>;
+};
+};
+};
+};
--
2.43.0
[PATCH V8 05/12] arm64: dts: imx8mp: add HDMI power-domains
From: Lucas Stach
This adds the PGC and HDMI blk-ctrl nodes providing power control for
HDMI subsystem peripherals.
Signed-off-by: Adam Ford
Signed-off-by: Lucas Stach
---
V2: Add missing power-domains hdcp and hrv
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 38 +++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 76c73daf546b..5c54073de615 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -836,6 +836,23 @@ pgc_mediamix: power-domain@10 {
<&clk
IMX8MP_CLK_MEDIA_APB_ROOT>;
};
+ pgc_hdmimix: power-domains@14 {
+ #power-domain-cells = <0>;
+ reg =
;
+ clocks = <&clk
IMX8MP_CLK_HDMI_ROOT>,
+<&clk
IMX8MP_CLK_HDMI_APB>;
+ assigned-clocks = <&clk
IMX8MP_CLK_HDMI_AXI>,
+ <&clk
IMX8MP_CLK_HDMI_APB>;
+ assigned-clock-parents = <&clk
IMX8MP_SYS_PLL2_500M>,
+<&clk
IMX8MP_SYS_PLL1_133M>;
+ assigned-clock-rates =
<5>, <13300>;
+ };
+
+ pgc_hdmi_phy: power-domains@15 {
+ #power-domain-cells = <0>;
+ reg =
;
+ };
+
pgc_mipi_phy2: power-domain@16 {
#power-domain-cells = <0>;
reg =
;
@@ -1361,6 +1378,27 @@ eqos: ethernet@30bf {
intf_mode = <&gpr 0x4>;
status = "disabled";
};
+
+ hdmi_blk_ctrl: blk-ctrl@32fc {
+ compatible = "fsl,imx8mp-hdmi-blk-ctrl",
"syscon";
+ reg = <0x32fc 0x23c>;
+ clocks = <&clk IMX8MP_CLK_HDMI_APB>,
+<&clk IMX8MP_CLK_HDMI_ROOT>,
+<&clk IMX8MP_CLK_HDMI_REF_266M>,
+<&clk IMX8MP_CLK_HDMI_24M>,
+<&clk IMX8MP_CLK_HDMI_FDCC_TST>;
+ clock-names = "apb", "axi", "ref_266m",
"ref_24m", "fdcc";
+ power-domains = <&pgc_hdmimix>, <&pgc_hdmimix>,
+ <&pgc_hdmimix>, <&pgc_hdmimix>,
+ <&pgc_hdmimix>, <&pgc_hdmimix>,
+ <&pgc_hdmimix>, <&pgc_hdmi_phy>,
+ <&pgc_hdmimix>, <&pgc_hdmimix>;
+ power-domain-names = "bus", "irqsteer", "lcdif",
+"pai", "pvi", "trng",
+"hdmi-tx", "hdmi-tx-phy",
+"hdcp", "hrv";
+ #power-domain-cells = <1>;
+ };
};
aips5: bus@30c0 {
--
2.43.0
[PATCH V8 06/12] arm64: dts: imx8mp: add HDMI irqsteer
From: Lucas Stach
The HDMI irqsteer is a secondary interrupt controller within the HDMI
subsystem that maps all HDMI peripheral IRQs into a single upstream
IRQ line.
Signed-off-by: Lucas Stach
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 5c54073de615..5e51a766f3d9 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1399,6 +1399,19 @@ hdmi_blk_ctrl: blk-ctrl@32fc {
"hdcp", "hrv";
#power-domain-cells = <1>;
};
+
+ irqsteer_hdmi: interrupt-controller@32fc2000 {
+ compatible = "fsl,imx-irqsteer";
+ reg = <0x32fc2000 0x44>;
+ interrupts = ;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ fsl,channel = <1>;
+ fsl,num-irqs = <64>;
+ clocks = <&clk IMX8MP_CLK_HDMI_APB>;
+ clock-names = "ipg";
+ power-domains = <&hdmi_blk_ctrl
IMX8MP_HDMIBLK_PD_IRQSTEER>;
+ };
};
aips5: bus@30c0 {
--
2.43.0
[PATCH V8 04/12] pmdomain: imx8mp-blk-ctrl: imx8mp_blk: Add fdcc clock to hdmimix domain
According to i.MX8MP RM and HDMI ADD, the fdcc clock is part of
hdmi rx verification IP that should not enable for HDMI TX.
But actually if the clock is disabled before HDMI/LCDIF probe,
LCDIF will not get pixel clock from HDMI PHY and print the error
logs:
[CRTC:39:crtc-2] vblank wait timed out
WARNING: CPU: 2 PID: 9 at drivers/gpu/drm/drm_atomic_helper.c:1634
drm_atomic_helper_wait_for_vblanks.part.0+0x23c/0x260
Add fdcc clock to LCDIF and HDMI TX power domains to fix the issue.
Signed-off-by: Adam Ford
Reviewed-by: Jacky Bai
Signed-off-by: Sandor Yu
---
V2: No Change
---
drivers/pmdomain/imx/imx8mp-blk-ctrl.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/pmdomain/imx/imx8mp-blk-ctrl.c
b/drivers/pmdomain/imx/imx8mp-blk-ctrl.c
index e488cf79b800..77e889165eed 100644
--- a/drivers/pmdomain/imx/imx8mp-blk-ctrl.c
+++ b/drivers/pmdomain/imx/imx8mp-blk-ctrl.c
@@ -55,7 +55,7 @@ struct imx8mp_blk_ctrl_domain_data {
const char *gpc_name;
};
-#define DOMAIN_MAX_CLKS 2
+#define DOMAIN_MAX_CLKS 3
#define DOMAIN_MAX_PATHS 3
struct imx8mp_blk_ctrl_domain {
@@ -457,8 +457,8 @@ static const struct imx8mp_blk_ctrl_domain_data
imx8mp_hdmi_domain_data[] = {
},
[IMX8MP_HDMIBLK_PD_LCDIF] = {
.name = "hdmiblk-lcdif",
- .clk_names = (const char *[]){ "axi", "apb" },
- .num_clks = 2,
+ .clk_names = (const char *[]){ "axi", "apb", "fdcc" },
+ .num_clks = 3,
.gpc_name = "lcdif",
.path_names = (const char *[]){"lcdif-hdmi"},
.num_paths = 1,
@@ -483,8 +483,8 @@ static const struct imx8mp_blk_ctrl_domain_data
imx8mp_hdmi_domain_data[] = {
},
[IMX8MP_HDMIBLK_PD_HDMI_TX] = {
.name = "hdmiblk-hdmi-tx",
- .clk_names = (const char *[]){ "apb", "ref_266m" },
- .num_clks = 2,
+ .clk_names = (const char *[]){ "apb", "ref_266m", "fdcc" },
+ .num_clks = 3,
.gpc_name = "hdmi-tx",
},
[IMX8MP_HDMIBLK_PD_HDMI_TX_PHY] = {
--
2.43.0
[PATCH V8 03/12] dt-bindings: soc: imx: add missing clock and power-domains to imx8mp-hdmi-blk-ctrl
Per guidance from the NXP downstream kernel, if the clock is disabled before HDMI/LCDIF probe, LCDIF will not get pixel clock from HDMI PHY and throw an error: [CRTC:39:crtc-2] vblank wait timed out WARNING: CPU: 2 PID: 9 at drivers/gpu/drm/drm_atomic_helper.c: 1634 drm_atomic_helper_wait_for_vblanks.part.0+0x23c/0x260 Fix this by adding the fdcc clock to the hdmi_blk_ctrl. This should be safe, since neither this power domain nor the dependent HDMI and LCDIF drivers been enabled or added to the SoC device tree yet. According to Sandor Yu from NXP, "the FDCC clock is not for HDMITX in desgin, but it is part of HDMI domain that needed by HDMITX. So I think it is reasonable added it to the power domain driver." The driver also supports two power domains which are missing from the binding that also fix an issue with resuming from suspend. Signed-off-by: Adam Ford --- V2: Update commit message to both show error and give a bit more background. Add missing power domains hdcp and hdrv as pointed out by Marek Vasut --- .../soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml | 22 --- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml index 1be4ce2a45e8..bd1cdaa4f54b 100644 --- a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml @@ -27,8 +27,8 @@ properties: const: 1 power-domains: -minItems: 8 -maxItems: 8 +minItems: 10 +maxItems: 10 power-domain-names: items: @@ -40,10 +40,12 @@ properties: - const: trng - const: hdmi-tx - const: hdmi-tx-phy + - const: hdcp + - const: hrv clocks: -minItems: 4 -maxItems: 4 +minItems: 5 +maxItems: 5 clock-names: items: @@ -51,6 +53,7 @@ properties: - const: axi - const: ref_266m - const: ref_24m + - const: fdcc interconnects: maxItems: 3 @@ -82,12 +85,15 @@ examples: clocks = <&clk IMX8MP_CLK_HDMI_APB>, <&clk IMX8MP_CLK_HDMI_ROOT>, <&clk IMX8MP_CLK_HDMI_REF_266M>, - <&clk IMX8MP_CLK_HDMI_24M>; -clock-names = "apb", "axi", "ref_266m", "ref_24m"; + <&clk IMX8MP_CLK_HDMI_24M>, + <&clk IMX8MP_CLK_HDMI_FDCC_TST>; +clock-names = "apb", "axi", "ref_266m", "ref_24m", "fdcc"; power-domains = <&pgc_hdmimix>, <&pgc_hdmimix>, <&pgc_hdmimix>, <&pgc_hdmimix>, <&pgc_hdmimix>, <&pgc_hdmimix>, -<&pgc_hdmimix>, <&pgc_hdmi_phy>; +<&pgc_hdmimix>, <&pgc_hdmi_phy>, +<&pgc_hdmimix>, <&pgc_hdmimix>; power-domain-names = "bus", "irqsteer", "lcdif", "pai", "pvi", "trng", - "hdmi-tx", "hdmi-tx-phy"; + "hdmi-tx", "hdmi-tx-phy", + "hdcp", "hrv"; #power-domain-cells = <1>; }; -- 2.43.0
[PATCH V8 01/12] dt-bindings: phy: add binding for the i.MX8MP HDMI PHY
From: Lucas Stach
Add a DT binding for the HDMI PHY found on the i.MX8MP SoC.
Signed-off-by: Lucas Stach
Signed-off-by: Adam Ford
Reviewed-by: Krzysztof Kozlowski
---
V3: Removed mintems at the request of Krzysztof and add his
reviewed-by
V2: I tried to help move this along, so I took Lucas' patch and
attempted to apply fixes based on feedback. I don't have
all the history, so apologies for that.
Added phy-cells to the required list and fixed an error due
to the word 'binding' being in the title.
---
.../bindings/phy/fsl,imx8mp-hdmi-phy.yaml | 62 +++
1 file changed, 62 insertions(+)
create mode 100644
Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml
diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml
b/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml
new file mode 100644
index ..c43e86a8c2e0
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/fsl,imx8mp-hdmi-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX8MP HDMI PHY
+
+maintainers:
+ - Lucas Stach
+
+properties:
+ compatible:
+enum:
+ - fsl,imx8mp-hdmi-phy
+
+ reg:
+maxItems: 1
+
+ "#clock-cells":
+const: 0
+
+ clocks:
+maxItems: 2
+
+ clock-names:
+items:
+ - const: apb
+ - const: ref
+
+ "#phy-cells":
+const: 0
+
+ power-domains:
+maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - "#clock-cells"
+ - clocks
+ - clock-names
+ - "#phy-cells"
+ - power-domains
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+#include
+
+phy@32fdff00 {
+compatible = "fsl,imx8mp-hdmi-phy";
+reg = <0x32fdff00 0x100>;
+clocks = <&clk IMX8MP_CLK_HDMI_APB>,
+ <&clk IMX8MP_CLK_HDMI_24M>;
+clock-names = "apb", "ref";
+power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX_PHY>;
+#clock-cells = <0>;
+#phy-cells = <0>;
+};
--
2.43.0
[PATCH V8 02/12] phy: freescale: add Samsung HDMI PHY
From: Lucas Stach
This adds the driver for the Samsung HDMI PHY found on the
i.MX8MP SoC.
Signed-off-by: Lucas Stach
Signed-off-by: Adam Ford
Tested-by: Alexander Stein
---
V4: Make lookup table hex values lower case.
V3: Re-order the Makefile to keep it alphabetical
Remove unused defines
V2: Fixed some whitespace found from checkpatch
Change error handling when enabling apbclk to use dev_err_probe
Rebase on Linux-Next
I (Adam) tried to help move this along, so I took Lucas' patch and
attempted to apply fixes based on feedback. I don't have
all the history, so apologies for that.
---
drivers/phy/freescale/Kconfig|6 +
drivers/phy/freescale/Makefile |1 +
drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 1075 ++
3 files changed, 1082 insertions(+)
create mode 100644 drivers/phy/freescale/phy-fsl-samsung-hdmi.c
diff --git a/drivers/phy/freescale/Kconfig b/drivers/phy/freescale/Kconfig
index 853958fb2c06..5c2b73042dfc 100644
--- a/drivers/phy/freescale/Kconfig
+++ b/drivers/phy/freescale/Kconfig
@@ -35,6 +35,12 @@ config PHY_FSL_IMX8M_PCIE
Enable this to add support for the PCIE PHY as found on
i.MX8M family of SOCs.
+config PHY_FSL_SAMSUNG_HDMI_PHY
+ tristate "Samsung HDMI PHY support"
+ depends on OF && HAS_IOMEM
+ help
+ Enable this to add support for the Samsung HDMI PHY in i.MX8MP.
+
endif
config PHY_FSL_LYNX_28G
diff --git a/drivers/phy/freescale/Makefile b/drivers/phy/freescale/Makefile
index cedb328bc4d2..79e5f16d3ce8 100644
--- a/drivers/phy/freescale/Makefile
+++ b/drivers/phy/freescale/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_PHY_MIXEL_LVDS_PHY)+=
phy-fsl-imx8qm-lvds-phy.o
obj-$(CONFIG_PHY_MIXEL_MIPI_DPHY) += phy-fsl-imx8-mipi-dphy.o
obj-$(CONFIG_PHY_FSL_IMX8M_PCIE) += phy-fsl-imx8m-pcie.o
obj-$(CONFIG_PHY_FSL_LYNX_28G) += phy-fsl-lynx-28g.o
+obj-$(CONFIG_PHY_FSL_SAMSUNG_HDMI_PHY) += phy-fsl-samsung-hdmi.o
diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c
b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c
new file mode 100644
index ..bf0e2299d00f
--- /dev/null
+++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c
@@ -0,0 +1,1075 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 NXP
+ * Copyright 2022 Pengutronix, Lucas Stach
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define PHY_REG_33 0x84
+#define REG33_MODE_SET_DONE BIT(7)
+#define REG33_FIX_DA BIT(1)
+
+#define PHY_REG_34 0x88
+#define REG34_PHY_READY BIT(7)
+#define REG34_PLL_LOCKBIT(6)
+#define REG34_PHY_CLK_READY BIT(5)
+
+
+#define PHY_PLL_REGS_NUM 48
+
+struct phy_config {
+ u32 clk_rate;
+ u8 regs[PHY_PLL_REGS_NUM];
+};
+
+const struct phy_config phy_pll_cfg[] = {
+ { 2225, {
+ 0x00, 0xd1, 0x4b, 0xf1, 0x89, 0x88, 0x80, 0x40,
+ 0x4f, 0x30, 0x33, 0x65, 0x00, 0x15, 0x25, 0x80,
+ 0x6c, 0xf2, 0x67, 0x00, 0x10, 0x8f, 0x30, 0x32,
+ 0x60, 0x8f, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0xe0, 0x83, 0x0f, 0x3e, 0xf8, 0x00, 0x00,
+ },
+ }, {
+ 2375, {
+ 0x00, 0xd1, 0x50, 0xf1, 0x86, 0x85, 0x80, 0x40,
+ 0x4f, 0x30, 0x33, 0x65, 0x00, 0x03, 0x25, 0x80,
+ 0x6c, 0xf2, 0x67, 0x00, 0x10, 0x8f, 0x30, 0x32,
+ 0x60, 0x8f, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0xe0, 0x83, 0x0f, 0x3e, 0xf8, 0x00, 0x00,
+ },
+ }, {
+ 2400, {
+ 0x00, 0xd1, 0x50, 0xf0, 0x00, 0x00, 0x80, 0x00,
+ 0x4f, 0x30, 0x33, 0x65, 0x00, 0x01, 0x25, 0x80,
+ 0x6c, 0xf2, 0x67, 0x00, 0x10, 0x8f, 0x30, 0x32,
+ 0x60, 0x8f, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0xe0, 0x83, 0x0f, 0x3e, 0xf8, 0x00, 0x00,
+ },
+ }, {
+ 24024000, {
+ 0x00, 0xd1, 0x50, 0xf1, 0x99, 0x02, 0x80, 0x40,
+ 0x4f, 0x30, 0x33, 0x65, 0x00, 0x00, 0x25, 0x80,
+ 0x6c, 0xf2, 0x67, 0x00, 0x10, 0x8f, 0x30, 0x32,
+ 0x60, 0x8f, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0xe0, 0x83, 0x0f, 0x3e, 0xf8, 0x00, 0x00,
+ },
+ }, {
+ 25175000, {
+ 0x00, 0xd1, 0x54, 0xfc, 0xcc, 0x91,
[PATCH V8 00/12] soc: imx8mp: Add support for HDMI
The i.MX8M Plus has an HDMI controller, but it depends on two other systems, the Parallel Video Interface (PVI) and the HDMI PHY from Samsung. The LCDIF controller generates the display and routes it to the PVI which converts passes the parallel video to the HDMI bridge. The HDMI system has a corresponding power domain controller whose driver was partially written, but the device tree for it was never applied, so some changes to the power domain should be harmless because they've not really been used yet. This series is adapted from multiple series from Lucas Stach with edits and suggestions from feedback from various series, but it since it's difficult to use and test them independently, I merged them into on unified series. The version history is a bit ambiguous since different components were submitted at different times and had different amount of retries. In an effort to merge them I used the highest version attempt. Adam Ford (3): dt-bindings: soc: imx: add missing clock and power-domains to imx8mp-hdmi-blk-ctrl pmdomain: imx8mp-blk-ctrl: imx8mp_blk: Add fdcc clock to hdmimix domain arm64: defconfig: Enable DRM_IMX8MP_DW_HDMI_BRIDGE as module Lucas Stach (9): dt-bindings: phy: add binding for the i.MX8MP HDMI PHY phy: freescale: add Samsung HDMI PHY arm64: dts: imx8mp: add HDMI power-domains arm64: dts: imx8mp: add HDMI irqsteer dt-bindings: display: imx: add binding for i.MX8MP HDMI PVI drm/bridge: imx: add driver for HDMI TX Parallel Video Interface dt-bindings: display: imx: add binding for i.MX8MP HDMI TX drm/bridge: imx: add bridge wrapper driver for i.MX8MP DWC HDMI arm64: dts: imx8mp: add HDMI display pipeline .../display/bridge/fsl,imx8mp-hdmi-tx.yaml| 102 ++ .../display/imx/fsl,imx8mp-hdmi-pvi.yaml | 84 ++ .../bindings/phy/fsl,imx8mp-hdmi-phy.yaml | 62 + .../soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml | 22 +- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 145 +++ arch/arm64/configs/defconfig |1 + drivers/gpu/drm/bridge/imx/Kconfig| 18 + drivers/gpu/drm/bridge/imx/Makefile |2 + drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c | 207 drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c | 154 +++ drivers/phy/freescale/Kconfig |6 + drivers/phy/freescale/Makefile|1 + drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 1075 + drivers/pmdomain/imx/imx8mp-blk-ctrl.c| 10 +- 14 files changed, 1876 insertions(+), 13 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8mp-hdmi-tx.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml create mode 100644 Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml create mode 100644 drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c create mode 100644 drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c create mode 100644 drivers/phy/freescale/phy-fsl-samsung-hdmi.c -- 2.43.0
Re: [PATCH] drm/panel: visionox-r66451: Set prepare_prev_first flag
On 02/02/2024 22:50, Jessica Zhang wrote: The DSI host needs to be enabled for the panel to be initialized in prepare(). Ensure this happens by setting prepare_prev_first. Signed-off-by: Jessica Zhang --- drivers/gpu/drm/panel/panel-visionox-r66451.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/panel/panel-visionox-r66451.c b/drivers/gpu/drm/panel/panel-visionox-r66451.c index fbb73464de332..493f2a6076f8d 100644 --- a/drivers/gpu/drm/panel/panel-visionox-r66451.c +++ b/drivers/gpu/drm/panel/panel-visionox-r66451.c @@ -322,6 +322,7 @@ static int visionox_r66451_probe(struct mipi_dsi_device *dsi) dsi->lanes = 4; dsi->format = MIPI_DSI_FMT_RGB888; dsi->mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_CLOCK_NON_CONTINUOUS; + ctx->panel.prepare_prev_first = true; drm_panel_init(&ctx->panel, dev, &visionox_r66451_funcs, DRM_MODE_CONNECTOR_DSI); ctx->panel.backlight = visionox_r66451_create_backlight(dsi); --- base-commit: 51b70ff55ed88edd19b080a524063446bcc34b62 change-id: 20230717-visionox-r66451-prev-first-67b036160e32 Best regards, Reviewed-by: Neil Armstrong
Re: [PATCH 2/3] drm/bridge: add lvds controller support for sam9x7
Hi Dharma,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-misc/drm-misc-next]
[also build test WARNING on linus/master v6.8-rc2 next-20240202]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/Dharma-Balasubiramani/dt-bindings-display-bridge-add-sam9x7-lvds-compatible/20240122-163209
base: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
patch link:
https://lore.kernel.org/r/20240122082947.21645-3-dharma.b%40microchip.com
patch subject: [PATCH 2/3] drm/bridge: add lvds controller support for sam9x7
config: arm-randconfig-r112-20240203
(https://download.01.org/0day-ci/archive/20240203/202402032248.6puqauzm-...@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 13.2.0
reproduce:
(https://download.01.org/0day-ci/archive/20240203/202402032248.6puqauzm-...@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot
| Closes:
https://lore.kernel.org/oe-kbuild-all/202402032248.6puqauzm-...@intel.com/
sparse warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/bridge/microchip-lvds.c:236:24: sparse: sparse: symbol
>> 'mchp_lvds_driver' was not declared. Should it be static?
vim +/mchp_lvds_driver +236 drivers/gpu/drm/bridge/microchip-lvds.c
235
> 236 struct platform_driver mchp_lvds_driver = {
237 .probe = mchp_lvds_probe,
238 .remove = mchp_lvds_remove,
239 .driver = {
240 .name = "microchip-lvds",
241 .of_match_table = mchp_lvds_dt_ids,
242 },
243 };
244 module_platform_driver(mchp_lvds_driver);
245
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
[PATCH] drm/msm/dp: allow voltage swing / pre emphasis of 3
um dp_link_voltage_level {
- DP_TRAIN_VOLTAGE_SWING_LVL_0= 0,
- DP_TRAIN_VOLTAGE_SWING_LVL_1= 1,
- DP_TRAIN_VOLTAGE_SWING_LVL_2= 2,
- DP_TRAIN_VOLTAGE_SWING_MAX = DP_TRAIN_VOLTAGE_SWING_LVL_2,
-};
-
-enum dp_link_preemaphasis_level {
- DP_TRAIN_PRE_EMPHASIS_LVL_0 = 0,
- DP_TRAIN_PRE_EMPHASIS_LVL_1 = 1,
- DP_TRAIN_PRE_EMPHASIS_LVL_2 = 2,
- DP_TRAIN_PRE_EMPHASIS_MAX = DP_TRAIN_PRE_EMPHASIS_LVL_2,
-};
+#define DP_TRAIN_LEVEL_MAX 3
struct dp_link_test_video {
u32 test_video_pattern;
---
base-commit: 41d66f96d0f15a0a2ad6fa2208f6bac1a66cbd52
change-id: 20240203-dp-swing-3-b64ffce415d9
Best regards,
--
Dmitry Baryshkov
Re: [PATCH RESEND v7 7/7] drm: atmel-hlcdc: add support for DSI output formats
On 29.01.2024 11:23, Manikandan Muralidharan wrote:
> Add support for the following DPI mode if the encoder type
> is DSI as per the XLCDC IP datasheet:
> - 16BPPCFG1
> - 16BPPCFG2
> - 16BPPCFG3
> - 18BPPCFG1
> - 18BPPCFG2
> - 24BPP
>
> Signed-off-by: Manikandan Muralidharan
> [durai.manicka...@microchip.com: update output format using is_xlcdc flag]
> Signed-off-by: Durai Manickam KR
> ---
> .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c| 123 +-
> 1 file changed, 88 insertions(+), 35 deletions(-)
>
> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> index 1899be2eb6a3..6f529769b036 100644
> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> @@ -295,11 +295,18 @@ static void atmel_hlcdc_crtc_atomic_enable(struct
> drm_crtc *c,
>
> }
>
> -#define ATMEL_HLCDC_RGB444_OUTPUTBIT(0)
> -#define ATMEL_HLCDC_RGB565_OUTPUTBIT(1)
> -#define ATMEL_HLCDC_RGB666_OUTPUTBIT(2)
> -#define ATMEL_HLCDC_RGB888_OUTPUTBIT(3)
> -#define ATMEL_HLCDC_OUTPUT_MODE_MASK GENMASK(3, 0)
> +#define ATMEL_HLCDC_RGB444_OUTPUTBIT(0)
> +#define ATMEL_HLCDC_RGB565_OUTPUTBIT(1)
> +#define ATMEL_HLCDC_RGB666_OUTPUTBIT(2)
> +#define ATMEL_HLCDC_RGB888_OUTPUTBIT(3)
> +#define ATMEL_HLCDC_DPI_RGB565C1_OUTPUT BIT(4)
> +#define ATMEL_HLCDC_DPI_RGB565C2_OUTPUT BIT(5)
> +#define ATMEL_HLCDC_DPI_RGB565C3_OUTPUT BIT(6)
> +#define ATMEL_HLCDC_DPI_RGB666C1_OUTPUT BIT(7)
> +#define ATMEL_HLCDC_DPI_RGB666C2_OUTPUT BIT(8)
> +#define ATMEL_HLCDC_DPI_RGB888_OUTPUTBIT(9)
> +#define ATMEL_HLCDC_OUTPUT_MODE_MASK GENMASK(3, 0)
> +#define ATMEL_XLCDC_OUTPUT_MODE_MASK GENMASK(9, 0)
>
> static int atmel_hlcdc_connector_output_mode(struct drm_connector_state
> *state)
> {
> @@ -313,53 +320,99 @@ static int atmel_hlcdc_connector_output_mode(struct
> drm_connector_state *state)
> if (!encoder)
> encoder = connector->encoder;
>
> - switch (atmel_hlcdc_encoder_get_bus_fmt(encoder)) {
> - case 0:
> - break;
> - case MEDIA_BUS_FMT_RGB444_1X12:
> - return ATMEL_HLCDC_RGB444_OUTPUT;
> - case MEDIA_BUS_FMT_RGB565_1X16:
> - return ATMEL_HLCDC_RGB565_OUTPUT;
> - case MEDIA_BUS_FMT_RGB666_1X18:
> - return ATMEL_HLCDC_RGB666_OUTPUT;
> - case MEDIA_BUS_FMT_RGB888_1X24:
> - return ATMEL_HLCDC_RGB888_OUTPUT;
> - default:
> - return -EINVAL;
> - }
> -
> - for (j = 0; j < info->num_bus_formats; j++) {
> - switch (info->bus_formats[j]) {
> - case MEDIA_BUS_FMT_RGB444_1X12:
> - supported_fmts |= ATMEL_HLCDC_RGB444_OUTPUT;
To generate less diff here and have a cleaner code you can move all this
DSI specific code in a different function and have here something like:
if (encoder->encoder_type == DRM_MODE_ENCODER_DSI)
return atmel_hlcdc_connector_output_dsi();
> + if (encoder->encoder_type == DRM_MODE_ENCODER_DSI) {
> + /*
> + * atmel-hlcdc to support DSI formats with DSI video pipeline
> + * when DRM_MODE_ENCODER_DSI type is set by
> + * connector driver component.
> + */
> + switch (atmel_hlcdc_encoder_get_bus_fmt(encoder)) {
> + case 0:
> break;
> case MEDIA_BUS_FMT_RGB565_1X16:
> - supported_fmts |= ATMEL_HLCDC_RGB565_OUTPUT;
> - break;
> + return ATMEL_HLCDC_DPI_RGB565C1_OUTPUT;
> case MEDIA_BUS_FMT_RGB666_1X18:
> - supported_fmts |= ATMEL_HLCDC_RGB666_OUTPUT;
> - break;
> + return ATMEL_HLCDC_DPI_RGB666C1_OUTPUT;
> + case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
> + return ATMEL_HLCDC_DPI_RGB666C2_OUTPUT;
> case MEDIA_BUS_FMT_RGB888_1X24:
> - supported_fmts |= ATMEL_HLCDC_RGB888_OUTPUT;
> - break;
> + return ATMEL_HLCDC_DPI_RGB888_OUTPUT;
> default:
> + return -EINVAL;
> + }
> +
> + for (j = 0; j < info->num_bus_formats; j++) {
> + switch (info->bus_formats[j]) {
> + case MEDIA_BUS_FMT_RGB565_1X16:
> + supported_fmts |=
> + ATMEL_HLCDC_DPI_RGB565C1_OUTPUT;
> + break;
> + case MEDIA_BUS_FMT_RGB666_1X18:
> + supported_fmts |=
> + ATMEL_HLCDC_DPI_RGB666C1_OUTPUT;
> + break;
> + case MEDIA_BUS_FMT_RGB666_1X2
Re: [PATCH RESEND v7 4/7] drm: atmel_hlcdc: Add support for XLCDC in atmel LCD driver
On 29.01.2024 11:23, Manikandan Muralidharan wrote:
> XLCDC in SAM9X7 has different sets of registers and additional
> configuration bits when compared to previous HLCDC IP. Read/write
> operation on the controller registers is now separated using the
> XLCDC status flag and with HLCDC and XLCDC IP specific ops.
> HEO scaling, window resampling, Alpha blending, YUV-to-RGB
> conversion in XLCDC is derived and handled using additional
> configuration bits and registers. Writing one to the Enable fields
> of each layer in LCD_ATTRE is required to reflect the values set
> in Configuration, FBA, Enable registers of each layer.
>
> Signed-off-by: Manikandan Muralidharan
> Co-developed-by: Hari Prasath Gujulan Elango
> Signed-off-by: Hari Prasath Gujulan Elango
> Co-developed-by: Durai Manickam KR
> Signed-off-by: Durai Manickam KR
> ---
> .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c| 33 +-
> drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 6 +
> drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 3 +
> .../gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 349 +++---
> 4 files changed, 329 insertions(+), 62 deletions(-)
>
> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> index cc5cf4c2faf7..1ac31c0c474a 100644
> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
> @@ -79,6 +79,7 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc
> *c)
> unsigned int mask = ATMEL_HLCDC_CLKDIV_MASK | ATMEL_HLCDC_CLKPOL;
> unsigned int cfg = 0;
> int div, ret;
> + bool is_xlcdc = crtc->dc->desc->is_xlcdc;
You may want to keep reverse christmass tree order, with this, though the
mask variable breaks it.
>
> /* get encoder from crtc */
> drm_for_each_encoder(en_iter, ddev) {
> @@ -164,10 +165,10 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct
> drm_crtc *c)
> state = drm_crtc_state_to_atmel_hlcdc_crtc_state(c->state);
> cfg = state->output_mode << 8;
>
> - if (adj->flags & DRM_MODE_FLAG_NVSYNC)
> + if (!is_xlcdc && (adj->flags & DRM_MODE_FLAG_NVSYNC))
> cfg |= ATMEL_HLCDC_VSPOL;
>
> - if (adj->flags & DRM_MODE_FLAG_NHSYNC)
> + if (!is_xlcdc && (adj->flags & DRM_MODE_FLAG_NHSYNC))
> cfg |= ATMEL_HLCDC_HSPOL;
Instead of checking 2 times the !is_xlcdc you can have on check: e.g.:
if (!is_xlcdc) {
if (adj->flags & DRM_MODE_FLAG_NVSYNC)
cfg |= ATMEL_HLCDC_VSPOL;
if (adj->flags & DRM_MODE_FLAG_NHSYNC)
cfg |= ATMEL_HLCDC_HSPOL;
}
>
> regmap_update_bits(regmap, ATMEL_HLCDC_CFG(5),
> @@ -202,6 +203,20 @@ static void atmel_hlcdc_crtc_atomic_disable(struct
> drm_crtc *c,
>
> pm_runtime_get_sync(dev->dev);
>
> + if (crtc->dc->desc->is_xlcdc) {
> + regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_XLCDC_CM);
> + if (regmap_read_poll_timeout(regmap, ATMEL_HLCDC_SR, status,
> + !(status & ATMEL_XLCDC_CM),
> + 10, 1000))
> + dev_warn(dev->dev, "Atmel LCDC status register CMSTS
> timeout\n");
> +
> + regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_XLCDC_SD);
> + if (regmap_read_poll_timeout(regmap, ATMEL_HLCDC_SR, status,
> + status & ATMEL_XLCDC_SD,
> + 10, 1000))
> + dev_warn(dev->dev, "Atmel LCDC status register SDSTS
> timeout\n");
> + }
> +
> regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_DISP);
> while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
Not related to this patch: it may worth implementing the same approach
accross all bits polling instructions in this function.
> (status & ATMEL_HLCDC_DISP))
> @@ -256,6 +271,20 @@ static void atmel_hlcdc_crtc_atomic_enable(struct
> drm_crtc *c,
> !(status & ATMEL_HLCDC_DISP))
> cpu_relax();
>
> + if (crtc->dc->desc->is_xlcdc) {
> + regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_XLCDC_CM);
> + if (regmap_read_poll_timeout(regmap, ATMEL_HLCDC_SR, status,
> + status & ATMEL_XLCDC_CM,
> + 10, 1000))
> + dev_warn(dev->dev, "Atmel LCDC status register CMSTS
> timeout\n");
> +
> + regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_XLCDC_SD);
> + if (regmap_read_poll_timeout(regmap, ATMEL_HLCDC_SR, status,
> + !(status & ATMEL_XLCDC_SD),
> + 10, 1000))
> + dev_warn(dev->dev, "Atmel LCDC status register SDSTS
> timeout\n");
> + }
> +
> pm_runtime_put_sync(dev->dev);
>
> }
> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel
Re: [PATCH RESEND v7 1/7] drm: atmel-hlcdc: add flag and driver ops to differentiate XLCDC and HLCDC IP
Hi, Manikandan,
On 29.01.2024 11:23, Manikandan Muralidharan wrote:
> Add is_xlcdc flag and LCD IP specific ops in driver data to differentiate
> XLCDC and HLCDC code within the atmel-hlcdc driver files.
I would first prepare the current code base for the addition of XLCDC by
first adding the struct atmel_lcdc_dc_ops, update current code to use it
and after that add XLCDC.
>
> Signed-off-by: Manikandan Muralidharan
> ---
> drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 37
> 1 file changed, 37 insertions(+)
>
> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
> index 5b5c774e0edf..d5e01ff8c7f9 100644
> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h
> @@ -177,6 +177,9 @@ struct atmel_hlcdc_layer_cfg_layout {
> int csc;
> };
>
> +struct atmel_hlcdc_plane_state;
You can move this forward declaration close the the structure that needs it
(struct atmel_lcdc_dc_ops).
> +struct atmel_hlcdc_dc;
And you can get rid if this one if you move struct atmel_lcdc_dc_ops after
struct atmel_hlcdc_dc definition.
> +
> /**
> * Atmel HLCDC DMA descriptor structure
> *
> @@ -288,6 +291,36 @@ atmel_hlcdc_layer_to_plane(struct atmel_hlcdc_layer
> *layer)
> return container_of(layer, struct atmel_hlcdc_plane, layer);
> }
>
> +/**
> + * struct atmel_lcdc_dc_ops - describes atmel_lcdc ops group
> + * to differentiate HLCDC and XLCDC IP code support.
> + * @plane_setup_scaler: update the vertical and horizontal scaling factors
> + * @update_lcdc_buffers: update the each LCDC layers DMA registers.
> + * @lcdc_atomic_disable: disable LCDC interrupts and layers
> + * @lcdc_update_general_settings: update each LCDC layers general
> + * confiugration register.
s/confiugration/configuration
> + * @lcdc_atomic_update: enable the LCDC layers and interrupts.
You may want to keep consistency by adding or not '.' at the end of the
documentation statement (I consider '.' is useless)
> + * @lcdc_csc_init: update the color space conversion co-efficient of
> + * High-end overlay register.
> + * @lcdc_irq_dbg: to raise alert incase of interrupt overrun in any LCDC
> layer.
s/incase/in case
> + */
> +struct atmel_lcdc_dc_ops {
> + void (*plane_setup_scaler)(struct atmel_hlcdc_plane *plane,
> +struct atmel_hlcdc_plane_state *state);
> + void (*update_lcdc_buffers)(struct atmel_hlcdc_plane *plane,
> + struct atmel_hlcdc_plane_state *state,
> + u32 sr, int i);
> + void (*lcdc_atomic_disable)(struct atmel_hlcdc_plane *plane);
> + void (*lcdc_update_general_settings)(struct atmel_hlcdc_plane *plane,
> + struct atmel_hlcdc_plane_state
> *state);
> + void (*lcdc_atomic_update)(struct atmel_hlcdc_plane *plane,
> +struct atmel_hlcdc_dc *dc);
> + void (*lcdc_csc_init)(struct atmel_hlcdc_plane *plane,
> + const struct atmel_hlcdc_layer_desc *desc);
> + void (*lcdc_irq_dbg)(struct atmel_hlcdc_plane *plane,
> + const struct atmel_hlcdc_layer_desc *desc);
> +};
> +
> /**
> * Atmel HLCDC Display Controller description structure.
> *
> @@ -304,8 +337,10 @@ atmel_hlcdc_layer_to_plane(struct atmel_hlcdc_layer
> *layer)
> * @conflicting_output_formats: true if RGBXXX output formats conflict with
> * each other.
> * @fixed_clksrc: true if clock source is fixed
> + * @is_xlcdc: true if XLCDC IP is supported
> * @layers: a layer description table describing available layers
> * @nlayers: layer description table size
> + * @ops: atmel lcdc dc ops
> */
> struct atmel_hlcdc_dc_desc {
> int min_width;
> @@ -317,8 +352,10 @@ struct atmel_hlcdc_dc_desc {
> int max_hpw;
> bool conflicting_output_formats;
> bool fixed_clksrc;
> + bool is_xlcdc;
> const struct atmel_hlcdc_layer_desc *layers;
> int nlayers;
> + const struct atmel_lcdc_dc_ops *ops;
> };
>
> /**
Re: [PATCH RESEND v7 2/7] drm: atmel-hlcdc: add LCD controller layer definition for sam9x75
On 29.01.2024 11:23, Manikandan Muralidharan wrote:
> Add the LCD controller layer definition and descriptor structure for
> sam9x75 for the following layers:
> - Base Layer
> - Overlay1 Layer
> - Overlay2 Layer
> - High End Overlay
>
> Signed-off-by: Manikandan Muralidharan
> ---
> drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 97
> 1 file changed, 97 insertions(+)
>
> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
> index fa0f9a93d50d..d30aec174aa2 100644
> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
> @@ -462,6 +462,99 @@ static const struct atmel_hlcdc_dc_desc
> atmel_hlcdc_dc_sam9x60 = {
> .layers = atmel_hlcdc_sam9x60_layers,
> };
>
> +static const struct atmel_hlcdc_layer_desc atmel_xlcdc_sam9x75_layers[] = {
> + {
> + .name = "base",
> + .formats = &atmel_hlcdc_plane_rgb_formats,
> + .regs_offset = 0x60,
> + .id = 0,
> + .type = ATMEL_HLCDC_BASE_LAYER,
> + .cfgs_offset = 0x1c,
> + .layout = {
> + .xstride = { 2 },
> + .default_color = 3,
> + .general_config = 4,
> + .disc_pos = 5,
> + .disc_size = 6,
> + },
> + .clut_offset = 0x700,
> + },
> + {
> + .name = "overlay1",
> + .formats = &atmel_hlcdc_plane_rgb_formats,
> + .regs_offset = 0x160,
> + .id = 1,
> + .type = ATMEL_HLCDC_OVERLAY_LAYER,
> + .cfgs_offset = 0x1c,
> + .layout = {
> + .pos = 2,
> + .size = 3,
> + .xstride = { 4 },
> + .pstride = { 5 },
> + .default_color = 6,
> + .chroma_key = 7,
> + .chroma_key_mask = 8,
> + .general_config = 9,
> + },
> + .clut_offset = 0xb00,
> + },
> + {
> + .name = "overlay2",
> + .formats = &atmel_hlcdc_plane_rgb_formats,
> + .regs_offset = 0x260,
> + .id = 2,
> + .type = ATMEL_HLCDC_OVERLAY_LAYER,
> + .cfgs_offset = 0x1c,
> + .layout = {
> + .pos = 2,
> + .size = 3,
> + .xstride = { 4 },
> + .pstride = { 5 },
> + .default_color = 6,
> + .chroma_key = 7,
> + .chroma_key_mask = 8,
> + .general_config = 9,
> + },
> + .clut_offset = 0xf00,
> + },
> + {
> + .name = "high-end-overlay",
> + .formats = &atmel_hlcdc_plane_rgb_and_yuv_formats,
> + .regs_offset = 0x360,
> + .id = 3,
> + .type = ATMEL_HLCDC_OVERLAY_LAYER,
> + .cfgs_offset = 0x30,
> + .layout = {
> + .pos = 2,
> + .size = 3,
> + .memsize = 4,
> + .xstride = { 5, 7 },
> + .pstride = { 6, 8 },
> + .default_color = 9,
> + .chroma_key = 10,
> + .chroma_key_mask = 11,
> + .general_config = 12,
> + .csc = 16,
> + .scaler_config = 23,
> + },
> + .clut_offset = 0x1300,
> + },
> +};
> +
> +static const struct atmel_hlcdc_dc_desc atmel_xlcdc_dc_sam9x75 = {
> + .min_width = 0,
> + .min_height = 0,
> + .max_width = 2048,
> + .max_height = 2048,
> + .max_spw = 0xff,
> + .max_vpw = 0xff,
> + .max_hpw = 0x3ff,
> + .fixed_clksrc = true,
> + .is_xlcdc = true,
> + .nlayers = ARRAY_SIZE(atmel_xlcdc_sam9x75_layers),
> + .layers = atmel_xlcdc_sam9x75_layers,
> +};
> +
> static const struct of_device_id atmel_hlcdc_of_match[] = {
> {
> .compatible = "atmel,at91sam9n12-hlcdc",
> @@ -487,6 +580,10 @@ static const struct of_device_id atmel_hlcdc_of_match[]
> = {
> .compatible = "microchip,sam9x60-hlcdc",
> .data = &atmel_hlcdc_dc_sam9x60,
> },
> + {
> + .compatible = "microchip,sam9x75-xlcdc",
> + .data = &atmel_xlcdc_dc_sam9x75,
Will SAM9X75 XLCDC work only with this patch and the previous one? If not
then, organize the patches such that the SAM9X75 will work when introduced.
> + },
> { /* sentinel */ },
> };
> MODULE_DEVICE_TABLE(of, atmel_hlcdc_of_match);
Re: [PATCH v3 3/5] drm/amd: Fetch the EDID from _DDC if available for eDP
Hi Mario,
kernel test robot noticed the following build warnings:
[auto build test WARNING on rafael-pm/linux-next]
[also build test WARNING on drm-intel/for-linux-next-fixes drm-xe/drm-xe-next
linus/master v6.8-rc2 next-20240202]
[cannot apply to drm-misc/drm-misc-next drm-intel/for-linux-next
rafael-pm/acpi-bus rafael-pm/devprop]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/Mario-Limonciello/ACPI-video-Handle-fetching-EDID-that-is-longer-than-256-bytes/20240202-061301
base: https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git
linux-next
patch link:
https://lore.kernel.org/r/20240201221119.42564-4-mario.limonciello%40amd.com
patch subject: [PATCH v3 3/5] drm/amd: Fetch the EDID from _DDC if available
for eDP
config: i386-randconfig-004-20240203
(https://download.01.org/0day-ci/archive/20240203/202402032030.ibef5cme-...@intel.com/config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
(https://download.01.org/0day-ci/archive/20240203/202402032030.ibef5cme-...@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot
| Closes:
https://lore.kernel.org/oe-kbuild-all/202402032030.ibef5cme-...@intel.com/
All warnings (new ones prefixed by >>):
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c: In function
'create_eml_sink':
>> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:6599:5: warning:
>> 'edid' is used uninitialized in this function [-Wuninitialized]
6599 | if (!edid)
| ^
vim +/edid +6599 drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c
6582
6583 static void create_eml_sink(struct amdgpu_dm_connector *aconnector)
6584 {
6585 struct drm_connector *connector = &aconnector->base;
6586 struct amdgpu_connector *amdgpu_connector =
to_amdgpu_connector(&aconnector->base);
6587 struct dc_sink_init_data init_params = {
6588 .link = aconnector->dc_link,
6589 .sink_signal = SIGNAL_TYPE_VIRTUAL
6590 };
6591 struct edid *edid;
6592
6593 /*
6594 * Note: drm_get_edid gets edid in the following order:
6595 * 1) override EDID if set via edid_override debugfs,
6596 * 2) firmware EDID if set via edid_firmware module parameter
6597 * 3) regular DDC read.
6598 */
> 6599 if (!edid)
6600 edid = drm_get_edid(connector,
&amdgpu_connector->ddc_bus->aux.ddc);
6601
6602 if (!edid) {
6603 DRM_ERROR("No EDID found on connector: %s.\n",
connector->name);
6604 return;
6605 }
6606
6607 if (drm_detect_hdmi_monitor(edid))
6608 init_params.sink_signal = SIGNAL_TYPE_HDMI_TYPE_A;
6609
6610 aconnector->edid = edid;
6611
6612 aconnector->dc_em_sink = dc_link_add_remote_sink(
6613 aconnector->dc_link,
6614 (uint8_t *)edid,
6615 (edid->extensions + 1) * EDID_LENGTH,
6616 &init_params);
6617
6618 if (aconnector->base.force == DRM_FORCE_ON) {
6619 aconnector->dc_sink = aconnector->dc_link->local_sink ?
6620 aconnector->dc_link->local_sink :
6621 aconnector->dc_em_sink;
6622 dc_sink_retain(aconnector->dc_sink);
6623 }
6624 }
6625
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
Re: [PATCH 1/1] fbdev/hyperv_fb: Fix logic error for Gen2 VMs in hvfb_getmem()
On Wed, Jan 31, 2024 at 10:00:22PM -0800, mhkelle...@gmail.com wrote:
> From: Michael Kelley
>
> A recent commit removing the use of screen_info introduced a logic
> error. The error causes hvfb_getmem() to always return -ENOMEM
> for Generation 2 VMs. As a result, the Hyper-V frame buffer
> device fails to initialize. The error was introduced by removing
> an "else if" clause, leaving Gen2 VMs to always take the -ENOMEM
> error path.
>
> Fix the problem by removing the error path "else" clause. Gen 2
> VMs now always proceed through the MMIO memory allocation code,
> but with "base" and "size" defaulting to 0.
>
> Fixes: 0aa0838c84da ("fbdev/hyperv_fb: Remove firmware framebuffers with
> aperture helpers")
> Signed-off-by: Michael Kelley
> ---
> drivers/video/fbdev/hyperv_fb.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/video/fbdev/hyperv_fb.c b/drivers/video/fbdev/hyperv_fb.c
> index c26ee6fd73c9..8fdccf033b2d 100644
> --- a/drivers/video/fbdev/hyperv_fb.c
> +++ b/drivers/video/fbdev/hyperv_fb.c
> @@ -1010,8 +1010,6 @@ static int hvfb_getmem(struct hv_device *hdev, struct
> fb_info *info)
> goto getmem_done;
> }
> pr_info("Unable to allocate enough contiguous physical memory
> on Gen 1 VM. Using MMIO instead.\n");
> - } else {
> - goto err1;
> }
>
> /*
> --
> 2.25.1
>
Reviewed-by: Saurabh Sengar
