Re: [PSES] Couple of loosely related safety questions
Brian, for a rigorous determination of creepage and of clearance you need to also determine and assign: 1. Over-voltage Category ( affects Clearance ) 2. Pollution Degree ( micro-environment affecting Creepage ) 3. Basic (simple separation) or Reinforced (protective separation) boundaries (if the end-product standard distinguishes) If you can determine that slots are needed to increase a creepage path because of physical constraints, then the minimum allowable width of that slot needs to be determined. The application of std UL840 is permitted as an alternative for the determination of spacings, with some strings attached to the end-product standard ( e.g. UL1741 referencing UL840) Its a long and winding, foggy road to follow when determining minimum spacings for an electronic assembly. Isolation planning, assignment of working voltages (RMS and peak) across isolation boundaries is usually a good first step. Your MOSFET lead spacing doesnt need to follow PCB rules, but the PCB does. You may need to measure distance between PCB pads for the device and if then decide if those pads might need slots between them. Ralph From: Brian Gregory Sent: Friday, April 26, 2024 4:12 PM To: EMC-PSTC@LISTSERV.IEEE.ORG Subject: [PSES] Couple of loosely related safety questions 1. Clearances for US Safety: I'd cite the relevant standards, but they are so alike (identical Clearance tables), and so alike to UL 508, I'll defer. Here's the question: When citing clearance spacing from "uninsulated live components" does one measure from the edge of a PCB to the enclosure well, or only from the live components, like a pad, or the bottom pin of a thru-hole cap? 1a. what sort of passivation or RTV could make those live components not "uninsulated"? 2. Slots to increase creepage for high-voltage components A FET that's rated for say 600V does not have to follow PCB-creepage rules for 600V, is clearly stated places like UL 1741, §26.1.1 exception #8. For other components, like say 1000V caps in 0805 packages or FET driver chips the requirements aren't as clear. Is a slot needed to maintain creepage or not if the component is properly rated? It does appear from a TI support page for dual-bridge converters, that slots are recommended in order to prevent contamination that may compromise the components isolation performance. My gut says: no, slots are not needed between component terminals on a PCB, but could be recommended for sensitive parts, like FET drivers. Thoughts? Colorado Brian _ This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. To post a message to the list, send your e-mail to EMC-PSTC@LISTSERV.IEEE.ORG <mailto:EMC-PSTC@LISTSERV.IEEE.ORG> All emc-pstc postings are archived and searchable on the web at: https://www.mail-archive.com/emc-pstc@listserv.ieee.org/ <https://www.mail-archive.com/emc-pstc@listserv.ieee.org/%20> Website: https://ewh.ieee.org/soc/pses/ <https://ewh.ieee.org/soc/pses/> Instructions: https://ewh.ieee.org/soc/pses/list.html (including how to unsubscribe) <https://ewh.ieee.org/soc/pses/list.html> List rules: https://ewh.ieee.org/soc/pses/listrules.html For help, send mail to the list administrators: Mike Sherman at: msherma...@comcast.net <mailto:msherma...@comcast.net> Rick Linford at: linf...@ieee.org <mailto:linf...@ieee.org> For policy questions, send mail to: Jim Bacher at: j.bac...@ieee.org <mailto:j.bac...@ieee.org> _ To unsubscribe from the EMC-PSTC list, click the following link: https://listserv.ieee.org/cgi-bin/wa?SUBED1=EMC-PSTC <https://listserv.ieee.org/cgi-bin/wa?SUBED1=EMC-PSTC=1> =1 - This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. To post a message to the list, send your e-mail to EMC-PSTC@LISTSERV.IEEE.ORG All emc-pstc postings are archived and searchable on the web at: https://www.mail-archive.com/emc-pstc@listserv.ieee.org/ Website: https://ewh.ieee.org/soc/pses/ Instructions: https://ewh.ieee.org/soc/pses/list.html (including how to unsubscribe) List rules: https://ewh.ieee.org/soc/pses/listrules.html For help, send mail to the list administrators: Mike Sherman at: msherma...@comcast.net Rick Linford at: linf...@ieee.org For policy questions, send mail to: Jim Bacher: _ To unsubscribe from the EMC-PSTC list, click the following link: https://listserv.ieee.org/cgi-bin/wa?SUBED1=EMC-PSTC=1
Re: [PSES] Couple of loosely related safety questions
Hi Brian: This does not answer your questions, but MAY give you an analysis tool: CLEARANCE is standards name for AIR INSULATION. CREEPAGE DISTANCE is standards name for DISTANCE ACROSS THE SURFACE OF SOLID INSULATION. Hope to meet you at the Symposium! Best regards, Rich From: Brian Gregory [mailto:brian_greg...@netzero.net] Sent: Friday, April 26, 2024 4:12 PM To: EMC-PSTC@LISTSERV.IEEE.ORG Subject: [PSES] Couple of loosely related safety questions 1. Clearances for US Safety: I'd cite the relevant standards, but they are so alike (identical Clearance tables), and so alike to UL 508, I'll defer. Here's the question: When citing clearance spacing from "uninsulated live components" does one measure from the edge of a PCB to the enclosure well, or only from the live components, like a pad, or the bottom pin of a thru-hole cap? 1a. what sort of passivation or RTV could make those live components not "uninsulated"? 2. Slots to increase creepage for high-voltage components A FET that's rated for say 600V does not have to follow PCB-creepage rules for 600V, is clearly stated places like UL 1741, §26.1.1 exception #8. For other components, like say 1000V caps in 0805 packages or FET driver chips the requirements aren't as clear. Is a slot needed to maintain creepage or not if the component is properly rated? It does appear from a TI support page for dual-bridge converters, that slots are recommended in order to prevent contamination that may compromise the components isolation performance. My gut says: no, slots are not needed between component terminals on a PCB, but could be recommended for sensitive parts, like FET drivers. Thoughts? Colorado Brian _ This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. To post a message to the list, send your e-mail to EMC-PSTC@LISTSERV.IEEE.ORG <mailto:EMC-PSTC@LISTSERV.IEEE.ORG> All emc-pstc postings are archived and searchable on the web at: https://www.mail-archive.com/emc-pstc@listserv.ieee.org/ <https://www.mail-archive.com/emc-pstc@listserv.ieee.org/%20> Website: https://ewh.ieee.org/soc/pses/ <https://ewh.ieee.org/soc/pses/> Instructions: https://ewh.ieee.org/soc/pses/list.html (including how to unsubscribe) <https://ewh.ieee.org/soc/pses/list.html> List rules: https://ewh.ieee.org/soc/pses/listrules.html For help, send mail to the list administrators: Mike Sherman at: msherma...@comcast.net <mailto:msherma...@comcast.net> Rick Linford at: linf...@ieee.org <mailto:linf...@ieee.org> For policy questions, send mail to: Jim Bacher at: j.bac...@ieee.org <mailto:j.bac...@ieee.org> _ To unsubscribe from the EMC-PSTC list, click the following link: https://listserv.ieee.org/cgi-bin/wa?SUBED1=EMC-PSTC <https://listserv.ieee.org/cgi-bin/wa?SUBED1=EMC-PSTC=1> =1 - This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. To post a message to the list, send your e-mail to EMC-PSTC@LISTSERV.IEEE.ORG All emc-pstc postings are archived and searchable on the web at: https://www.mail-archive.com/emc-pstc@listserv.ieee.org/ Website: https://ewh.ieee.org/soc/pses/ Instructions: https://ewh.ieee.org/soc/pses/list.html (including how to unsubscribe) List rules: https://ewh.ieee.org/soc/pses/listrules.html For help, send mail to the list administrators: Mike Sherman at: msherma...@comcast.net Rick Linford at: linf...@ieee.org For policy questions, send mail to: Jim Bacher: _ To unsubscribe from the EMC-PSTC list, click the following link: https://listserv.ieee.org/cgi-bin/wa?SUBED1=EMC-PSTC=1
Re: [PSES] Couple of loosely related safety questions
Thank you, Rich! Over 240 have already registered for ISPCE 2024! This is the place to be for all Product Safety and Certifications knowledge transfer and networking - https://2024.psessymposium.org/. Best Regards and Be Safe, John John Allen | President & CEO | Product Safety Consulting, Inc. Your Outsourced Compliance Department® 630-238-0188, Cell: 630-330-3145 [cid:image001.jpg@01DA980D.AF7CCF00][social_facebook_box_blue for signature]<http://www.facebook.com/pages/Product-Safety-Consulting-Inc/97306850917>[social_twitter_box_blue for signature]<http://twitter.com/SafetyTesting>[social_linkedin_box_blue for signature]<http://www.linkedin.com/in/productsafetyconsultinginc> https://www.youtube.com/channel/UCVSzENmSoWeNFSBQcOYN7-A www.productsafetyinc.com<http://www.productsafetyinc.com/> IEEE Product Safety Engineering Society President 2024-2025 Compliance 101 Technical Committee Chairman IEEE Senior Member [cid:image005.png@01DA980D.AF7CCF00] Keeping our members informed and educated on Product Safety and Certifications https://ewh.ieee.org/soc/pses/index.html Although PSC maintains the highest level of virus protection, this e-mail and any attachments should be scanned by your virus protection software. It is the responsibility of the recipient to check that it is virus free. PSC does not accept any responsibility for data loss or systems damage arising in any way from its use. This message is confidential and intended only for the individual to whom or entity to which it is addressed. If you are not the intended recipient or addressee, or an employee or agent responsible for delivering this message to the addressee, you are hereby notified that any dissemination, distribution, or copying, in whole or part, of this message is strictly prohibited. If you believe that you have been sent this message in error, please do not read it. Please immediately reply to sender that you have received this message in error. Then permanently delete all copies of the message. Thank you From: Richard Nute Sent: Friday, April 26, 2024 6:54 PM To: EMC-PSTC@LISTSERV.IEEE.ORG Subject: Re: [PSES] Couple of loosely related safety questions [EXTERNAL EMAIL] DO NOT CLICK links or attachments unless you recognize the sender and know the content is safe. Hi Brian: You should attend the IEEE PSES Symposium in Chicago next week to get the answers to these questions from experts. Lots of experts in clearance and creepage will be there and will be happy to provide you with answers! Best regards, Rich From: Brian Gregory [mailto:brian_greg...@netzero.net] Sent: Friday, April 26, 2024 4:12 PM To: EMC-PSTC@LISTSERV.IEEE.ORG<mailto:EMC-PSTC@LISTSERV.IEEE.ORG> Subject: [PSES] Couple of loosely related safety questions 1. Clearances for US Safety: I'd cite the relevant standards, but they are so alike (identical Clearance tables), and so alike to UL 508, I'll defer. Here's the question: When citing clearance spacing from "uninsulated live components" does one measure from the edge of a PCB to the enclosure well, or only from the live components, like a pad, or the bottom pin of a thru-hole cap? 1a. what sort of passivation or RTV could make those live components not "uninsulated"? 2. Slots to increase creepage for high-voltage components A FET that's rated for say 600V does not have to follow PCB-creepage rules for 600V, is clearly stated places like UL 1741, §26.1.1 exception #8. For other components, like say 1000V caps in 0805 packages or FET driver chips the requirements aren't as clear. Is a slot needed to maintain creepage or not if the component is properly rated? It does appear from a TI support page for dual-bridge converters, that slots are recommended in order to prevent contamination that may compromise the components isolation performance. My gut says: no, slots are not needed between component terminals on a PCB, but could be recommended for sensitive parts, like FET drivers. Thoughts? Colorado Brian This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. To post a message to the list, send your e-mail to EMC-PSTC@LISTSERV.IEEE.ORG<mailto:EMC-PSTC@LISTSERV.IEEE.ORG> All emc-pstc postings are archived and searchable on the web at: https://www.mail-archive.com/emc-pstc@listserv.ieee.org/<https://www.mail-archive.com/emc-pstc@listserv.ieee.org/%20> Website: https://ewh.ieee.org/soc/pses/ Instructions: https://ewh.ieee.org/soc/pses/list.html (including how to unsubscribe)<https://ewh.ieee.org/soc/pses/list.html> List rules: https://ewh.ieee.org/soc/pses/listrules.html For help, send mail to the list administrators: Mike Sherman at: msherma...@comcast.net<mailto:msherma...@comcast.net> Rick Linford at: linf...@ieee.org<mailto:linf...@ieee.org> For polic
Re: [PSES] Couple of loosely related safety questions
Hi Brian: You should attend the IEEE PSES Symposium in Chicago next week to get the answers to these questions from experts. Lots of experts in clearance and creepage will be there and will be happy to provide you with answers! Best regards, Rich From: Brian Gregory [mailto:brian_greg...@netzero.net] Sent: Friday, April 26, 2024 4:12 PM To: EMC-PSTC@LISTSERV.IEEE.ORG Subject: [PSES] Couple of loosely related safety questions 1. Clearances for US Safety: I'd cite the relevant standards, but they are so alike (identical Clearance tables), and so alike to UL 508, I'll defer. Here's the question: When citing clearance spacing from "uninsulated live components" does one measure from the edge of a PCB to the enclosure well, or only from the live components, like a pad, or the bottom pin of a thru-hole cap? 1a. what sort of passivation or RTV could make those live components not "uninsulated"? 2. Slots to increase creepage for high-voltage components A FET that's rated for say 600V does not have to follow PCB-creepage rules for 600V, is clearly stated places like UL 1741, §26.1.1 exception #8. For other components, like say 1000V caps in 0805 packages or FET driver chips the requirements aren't as clear. Is a slot needed to maintain creepage or not if the component is properly rated? It does appear from a TI support page for dual-bridge converters, that slots are recommended in order to prevent contamination that may compromise the components isolation performance. My gut says: no, slots are not needed between component terminals on a PCB, but could be recommended for sensitive parts, like FET drivers. Thoughts? Colorado Brian - This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. To post a message to the list, send your e-mail to EMC-PSTC@LISTSERV.IEEE.ORG All emc-pstc postings are archived and searchable on the web at: https://www.mail-archive.com/emc-pstc@listserv.ieee.org/ Website: https://ewh.ieee.org/soc/pses/ Instructions: https://ewh.ieee.org/soc/pses/list.html (including how to unsubscribe) List rules: https://ewh.ieee.org/soc/pses/listrules.html For help, send mail to the list administrators: Mike Sherman at: msherma...@comcast.net Rick Linford at: linf...@ieee.org For policy questions, send mail to: Jim Bacher: _ To unsubscribe from the EMC-PSTC list, click the following link: https://listserv.ieee.org/cgi-bin/wa?SUBED1=EMC-PSTC=1
[PSES] Couple of loosely related safety questions
1. Clearances for US Safety: I'd cite the relevant standards, but they are so alike (identical Clearance tables), and so alike to UL 508, I'll defer. Here's the question: When citing clearance spacing from "uninsulated live components" does one measure from the edge of a PCB to the enclosure well, or only from the live components, like a pad, or the bottom pin of a thru-hole cap?1a. what sort of passivation or RTV could make those live components not "uninsulated"? 2. Slots to increase creepage for high-voltage components A FET that's rated for say 600V does not have to follow PCB-creepage rules for 600V, is clearly stated places like UL 1741, §26.1.1 exception #8. For other components, like say 1000V caps in 0805 packages or FET driver chips the requirements aren't as clear. Is a slot needed to maintain creepage or not if the component is properly rated? It does appear from a TI support page for dual-bridge converters, that slots are recommended in order to prevent contamination that may compromise the components isolation performance. My gut says: no, slots are not needed between component terminals on a PCB, but could be recommended for sensitive parts, like FET drivers. Thoughts? Colorado Brian - This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. To post a message to the list, send your e-mail to EMC-PSTC@LISTSERV.IEEE.ORG All emc-pstc postings are archived and searchable on the web at: https://www.mail-archive.com/emc-pstc@listserv.ieee.org/ Website: https://ewh.ieee.org/soc/pses/ Instructions: https://ewh.ieee.org/soc/pses/list.html (including how to unsubscribe) List rules: https://ewh.ieee.org/soc/pses/listrules.html For help, send mail to the list administrators: Mike Sherman at: msherma...@comcast.net Rick Linford at: linf...@ieee.org For policy questions, send mail to: Jim Bacher: _ To unsubscribe from the EMC-PSTC list, click the following link: https://listserv.ieee.org/cgi-bin/wa?SUBED1=EMC-PSTC=1
