Re: Need Help on Inner PCB plane for RF shielding in isolated circuit
Chris,
Using a PCB layer as an RF shield. Don't forget you probably have that PCB
layer cut into swiss cheese with vias, unless you used blind vias.
Background:
A microstrip trace will radiate off the board a certain amount - makes sense
since part of its field is out in free space.
A stripline should not radiate anything because it is between two ground
layers, right? Wrong. A stripline in a practical PCB layout will only drop
the emission around 14dB, due to all the swiss cheese that got cut into the
PCB.
My point is, knowing the above practical information are you sure that an
"RF shield" made by a swiss cheese PCB layer will give you that much
shielding?
- Robert -
Robert A. Macy, PEm...@california.com
408 286 3985 fx 408 297 9121
AJM International Electronics Consultants
619 North First St, San Jose, CA 95112
-Original Message-
From: Chris Wells
To: EMC-PSTC Discussion Group
Date: Thursday, February 21, 2002 5:45 AM
Subject: Need Help on Inner PCB plane for RF shielding in isolated
circuit
Hi - I'm looking for some practical advise on using an inner Printed
Circuit Board "PCB" plane tied at the corner mounting holes of the chassis
as a shield from RF exposure coming in on an isolated field circuit relative
to another digital logic board.
Questions:
a.. Must my shield layer be the bottom most inner plane to be
effective? Note that the 2 board solder sides face each other. Layout wise
it is very difficult to do without going to a 6 layer board - I am trying to
stay with 4 if possible.
b.. Would I get some capacitive bypass protection if the grounded
shield plane where the top inner layer of the field circuit and the isolated
field circuit common was the bottom inner plane exposed to the adjacent
board? I know the field would not be blocked but the capacitive bypass to
the chassis should reduce the RF intensity.
c.. Would the placing of the grounded plane between the top PCB
components and the Isolated common plane disturb the performance of the
field circuitry? What would this do to the field circuit return path loop
area?
d.. Would a ground pour on the solder side of the adjacent PCB hurt
or help? It would increase the capacitance between the two boards but it
would reduce the loop area of the traces on the solder side of the adjacent
board too.
e.. PCB clearance issues within a PCB - What are the
clearance/voltage rating issues within a PCB? What voltages can I support
from:
a.. Surface trace to inner grounded plane - Can 240VAC be
supported.
b.. Electrically hot via passing through the grounded plane -
What inner pad clearance would one use on a 240VAC circuit?
f.. What do the safety standards say? - I see that UL3111 version of
IEC 61010-1 can treat the PCB as a molded void free material and so the
clearance issues are not addressed. I understand that IPC has a spec on
voltage ratings versus construction - I am looking for it now.
Details:
The circuit worked fine at 10V/M but I am now being asked to take this
to 35V/M and that is somewhat of a challenge.
Testing to ANSI C37.90.2 1995 25-1000 MHz.
My problem area is 400-500 Mhz.
I am trying to keep RF energy on field circuit from coupling over to an
adjacent board and corrupting the bus of some microprocessor based logic.
The two boards are only .200" apart.
I have experimented with an insulated grounded shield plane placed
in-between the two boards and it works great.
I can withstand 50V/M WITH 80% modulation!!!
Unfortunately the shield is very difficult to make for production and
the cost is an issue.
I am trying to put the shield into the 4 layer PCB in the area around
the field circuit.
The solder sides of the two boards face each other.
The field circuitry has lots of through hole PCB type components and so
there are leads and trace pads that are exposed on the bottom of the field
PCB.
I have trimmed the leads and this helps some.
Even with a 6 layer board and the bottom inner layer as a grounded
shield I would have the leads sticking through the shield like holes in
cheese.
The field circuit construction is:
a.. top +5V pour plus a couple traces
b.. top inner layer presently free - this is where I would like to
put the grounded shield plane.
c.. second inner layer (solder side) is the isolated field circuit
common,
d.. Bottom solder side are a number of field circuit traces.
Unfortunately the free plane is not the bottom inner plane but the
second from the top component side.
The two boards have DC:DC and opto signal isolation on the field board
relative to the adjacent logic board.
The two boards and are connected at one edge of the board with a pin
Re: Need Help on Inner PCB plane for RF shielding in isolated circuit
Chris, I had a thought, reading your message, that even a plain metal sheet, if it is close to a half wavelength across, has an RF hot spot in the middle. In that case, you must keep one side of the sheet (plane) cold, while the other is not. This means good grounds (UHF RF returns) at the edges. Are corners alone, enough? Following this reasoning, it seems to me your best chance of success, if you pursue the shielding route, is to put the (shield) plane on the solder side, facing the source, and route no traces (pickup loops!) on it. Put your plane between the source and the victim. However, I'd be inclined to beef up the victim's response, rather than shoehorn in a shield. For one thing, it is a pain in the neck for the board shop when you unbalance the stackup that way. May lower yield, depending on the board, unacceptably. For another, identifying and hardening a few strategic nets on the victim could be much cheaper to do. Maybe even faster; tooling not only costs, it takes time to add. Cortland PS: I haven't seen your board, of course, and it's difficult to do this work by telepathy (grin). Cortland --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Ron Pickard: emc-p...@hypercom.com Dave Heald: davehe...@mediaone.net For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org All emc-pstc postings are archived and searchable on the web at: http://ieeepstc.mindcruiser.com/ Click on "browse" and then "emc-pstc mailing list"
Need Help on Inner PCB plane for RF shielding in isolated circuit
Hi - I'm looking for some practical advise on using an inner Printed Circuit Board "PCB" plane tied at the corner mounting holes of the chassis as a shield from RF exposure coming in on an isolated field circuit relative to another digital logic board. Questions: a.. Must my shield layer be the bottom most inner plane to be effective? Note that the 2 board solder sides face each other. Layout wise it is very difficult to do without going to a 6 layer board - I am trying to stay with 4 if possible. b.. Would I get some capacitive bypass protection if the grounded shield plane where the top inner layer of the field circuit and the isolated field circuit common was the bottom inner plane exposed to the adjacent board? I know the field would not be blocked but the capacitive bypass to the chassis should reduce the RF intensity. c.. Would the placing of the grounded plane between the top PCB components and the Isolated common plane disturb the performance of the field circuitry? What would this do to the field circuit return path loop area? d.. Would a ground pour on the solder side of the adjacent PCB hurt or help? It would increase the capacitance between the two boards but it would reduce the loop area of the traces on the solder side of the adjacent board too. e.. PCB clearance issues within a PCB - What are the clearance/voltage rating issues within a PCB? What voltages can I support from: a.. Surface trace to inner grounded plane - Can 240VAC be supported. b.. Electrically hot via passing through the grounded plane - What inner pad clearance would one use on a 240VAC circuit? f.. What do the safety standards say? - I see that UL3111 version of IEC 61010-1 can treat the PCB as a molded void free material and so the clearance issues are not addressed. I understand that IPC has a spec on voltage ratings versus construction - I am looking for it now. Details: The circuit worked fine at 10V/M but I am now being asked to take this to 35V/M and that is somewhat of a challenge. Testing to ANSI C37.90.2 1995 25-1000 MHz. My problem area is 400-500 Mhz. I am trying to keep RF energy on field circuit from coupling over to an adjacent board and corrupting the bus of some microprocessor based logic. The two boards are only .200" apart. I have experimented with an insulated grounded shield plane placed in-between the two boards and it works great. I can withstand 50V/M WITH 80% modulation!!! Unfortunately the shield is very difficult to make for production and the cost is an issue. I am trying to put the shield into the 4 layer PCB in the area around the field circuit. The solder sides of the two boards face each other. The field circuitry has lots of through hole PCB type components and so there are leads and trace pads that are exposed on the bottom of the field PCB. I have trimmed the leads and this helps some. Even with a 6 layer board and the bottom inner layer as a grounded shield I would have the leads sticking through the shield like holes in cheese. The field circuit construction is: a.. top +5V pour plus a couple traces b.. top inner layer presently free - this is where I would like to put the grounded shield plane. c.. second inner layer (solder side) is the isolated field circuit common, d.. Bottom solder side are a number of field circuit traces. Unfortunately the free plane is not the bottom inner plane but the second from the top component side. The two boards have DC:DC and opto signal isolation on the field board relative to the adjacent logic board. The two boards and are connected at one edge of the board with a pin header. The field circuitry in question must support at least a 2000 VAC/1minute High Pot to ground. Hope all this detail is not too overwhelming - I tried to put it all last for those who don't want to know... Any information you could share would be appreciated!! Thank you in advance. Chris Wells Senior Design Engineer Cutler-Hammer Pittsburgh Pennsylvannia - USA christopherdwe...@eaton.com
