RE: Dithered clocks and EMC - BEWARE

2000-03-20 Thread Lacey,Scott

Paolo,
Thank you for the information. I suspect that you are correct as to
the critical nature of the frequency modulation method. The design engineer
picked the device, probably as the cheapest vendor. The device did not
behave as I expected, based on some Internet research of dithered clock
technology. We were very pressed for time, but I hope someday to spend some
more looking at this technology. Perhaps my experience explains the digital
TV set interference, since all such devices are obviously not the same.

Scott Lacey

-Original Message-
From:   paolo.ronc...@compuprint.it
[SMTP:paolo.ronc...@compuprint.it]
Sent:   Monday, March 20, 2000 5:21 AM
To: emc-p...@ieee.org
Subject:RE: Dithered clocks and EMC - BEWARE


I have a very succesfull experience with SSCG (Spread Spectrum Clock
Generation) that  is  a  patented  technology  used  to  intentionally
spread the energy of oscillators  and  clock signals and any signal derived
from the clock. I am sure Keith Hardin knows it first-hand because he is one
of the developers !  We  have  been  using  an SSCG chip since 1995 on most
of the electronics of our printers  -  most  of  them  class B devices, with
oscillator frequencies in the range  24  -  32  MHz.   We   even managed to
get significant cost reductions by switching from 4-layer to 2-layer boards
and still passing CISPR22 and FCC class B limits for radiated emissions.
One  point  that  seems  not  to  have come up in this discussion is
the kind of dithering we are talking about.
In SSCG the main clock frequency is modulated, but just ANY
frequency modulation is  not  enough  ! Key is the wave-shape of the
modulating function, and that is the  crucial  point  in  the  SSCG  patent
(Keith, correct me if I'm wrong). The trick  is  to  maximize  the  rate
of change of the function representing the frequency  modulation,  so  that
the  oscillator spends the minimum time on any given  frequency  within the
modulating range, thus avoiding additional peaks in the  emission  spectrum.
The modulating function in the SSCG technique does just that.
This is best explained in the first (to my knowledge) publication on
the subject (here, too, Keith knows much more !!) :
K.B.Hardin,  J.T.Fessler,  D.R.Bush  (Lexmark  Intl.):  Spread
Spectrum  Clock Generation  for  the  Reduction  of  Radiated  Emissions
-   1994  IEEE Intl.  Symposium on EMC, August 1994 Chicago (Symposium
Record page 227)
I  suspect  an explanation to Scott's problem may be that he didn't
use the SSCG technique  but  another form of  dithering that was not
controlled in such a way as  to  get  the  flat  frequency distribution that
you get with SSCG.  Also the amount  of  frequency  deviation  can  be
important. The attenuation you get in quasi-peak  (QP)  readings  is
dependent on that. I hope Scott can give us more details.
As  to  the  problems with digital TV, I honestly don't have any
knowledge about that,  but  I  remember  the  same inventors of SSCG did a
study on interference potential of this technique :
K.B.Hardin,   J.T.Fessler,   D.R.Bush   (Lexmark  Intl.): A
Study  of  the Interference  Potential  of  Spread Spectrum Clock Generation
Techniques - 1995 IEEE Intl. Symposium on EMC Atlanta ( Symposium Record
page 624).
Hope this helps.
Paolo Roncone
Compuprint s.p.a. - Italy



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RE: Dithered clocks and EMC - BEWARE

2000-03-20 Thread Paolo . Roncone



I have a very succesfull experience with SSCG (Spread Spectrum Clock Generation)
that  is  a  patented  technology  used  to  intentionally  spread the energy of
oscillators  and  clock signals and any signal derived from the clock. I am sure
Keith Hardin knows it first-hand because he is one of the developers !
We  have  been  using  an SSCG chip since 1995 on most of the electronics of our
printers  -  most  of  them  class B devices, with oscillator frequencies in the
range  24  -  32  MHz.   We   even managed to get significant cost reductions by
switching from 4-layer to 2-layer boards and still passing CISPR22 and FCC class
B limits for radiated emissions.

One  point  that  seems  not  to  have come up in this discussion is the kind of
dithering we are talking about.
In SSCG the main clock frequency is modulated, but just ANY frequency modulation
is  not  enough  ! Key is the wave-shape of the modulating function, and that is
the  crucial  point  in  the  SSCG  patent (Keith, correct me if I'm wrong). The
trick  is  to  maximize  the  rate  of change of the function representing the
frequency  modulation,  so  that  the  oscillator spends the minimum time on any
given  frequency  within the modulating range, thus avoiding additional peaks in
the  emission  spectrum. The modulating function in the SSCG technique does just
that.
This is best explained in the first (to my knowledge) publication on the subject
(here, too, Keith knows much more !!) :

K.B.Hardin,  J.T.Fessler,  D.R.Bush  (Lexmark  Intl.):  Spread  Spectrum  Clock
Generation  for  the  Reduction  of  Radiated  Emissions   -   1994  IEEE Intl.
Symposium on EMC, August 1994 Chicago (Symposium Record page 227)

I  suspect  an explanation to Scott's problem may be that he didn't use the SSCG
technique  but  another form of  dithering that was not controlled in such a way
as  to  get  the  flat  frequency distribution that you get with SSCG.  Also the
amount  of  frequency  deviation  can  be  important. The attenuation you get in
quasi-peak  (QP)  readings  is  dependent on that. I hope Scott can give us more
details.

As  to  the  problems with digital TV, I honestly don't have any knowledge about
that,  but  I  remember  the  same inventors of SSCG did a study on interference
potential of this technique :

K.B.Hardin,   J.T.Fessler,   D.R.Bush   (Lexmark  Intl.): A  Study  of  the
Interference  Potential  of  Spread Spectrum Clock Generation Techniques - 1995
IEEE Intl. Symposium on EMC Atlanta ( Symposium Record page 624).

Hope this helps.

Paolo Roncone
Compuprint s.p.a. - Italy



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Re: Dithered clocks and EMC - BEWARE

2000-03-18 Thread Doug

Keith Hardin wrote:
 
 The output spectrum is a series of stationary harmonics 
 spaced at 30kHz apart

This is very similar to a problem I had with 
PLL in a product once.  Major spike at the 
main frequency coming through with a picket 
fence on either side spaced out by the freq. 
of the PLL.  Poor board layout was the culprit 
if I remember correctly.  

Didn't we have a gentleman from Lexmark who 
started the spread spectrum technique do a 
presentation at the Santa Clara EMC Society? 
I seem to remember there being some constraints 
to do doing it - the dither being less than some 
rather low percent of the freq being dithered?

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RE: Dithered clocks and EMC - BEWARE

2000-03-18 Thread rc

I never used SSCG, but following the thread, my humble opinion is the following:

If the interference just comes from the oscillator, it is feasable that the use
of a SSCG will even increase the interference, as the circuit elements inside
the SSCG that create the clock signal will also have a current consumption that
will contribute to the interference emanating from the clock generator.

You will probably get better results from the use of a SSCG, if the interference
not  just comes from the oscillator itself, but mainly from the circuits driven
by the SSCG.
-
Keith Hardin (in the mail shown below) wrote:
... The output spectrum is a series of stationary harmonics spaced at 30kHz
apart

To my understanding, SSCG produce a FM modulated clock. I dimly remember that FM
does not produce a series of stationary harmonics spaced at the modulation
frequency, but the harmonics change dependent the modulating signal.
-
I think the SSCG does not fool the QP Detektor, it fools the bandwidth of the
test receiver. The effiencency of fooling depends not only on the modulation
frequency, but also on the frequency offset. In the example, where the use of
the SSCG did not help to reduce interference from the second harmonic, the
frequency offset was probably less than 60kHz (peak to peak)
-
For analog TV you will minimize the perception of interference on the screen if
the modulation frequency of the SSCG is 39kHz or 55kHz, as these frequencies
have the maximum offset from the line frequency harmonics.

Furthermore, for analog TV the assessment of the level of acceptable
interference is decided by the eye and the brain of the beholder.
In digital TV it is decided by the software on the chip, and that these days is
still inferior to the brain of a beholder.

Where I live, there is no digital TV available. Maybe digital TV is not suitable
for a terrestial air link.

Dipl.-Ing. Rene Charton
Manager
EMC Services
_
TUV Rheinland Taiwan Ltd.
TAIPEI HEAD OFFICE
Spring Plaza Building
14F, No.6, Min Chuan E. Rd., Sec. 3,
Taipei 104, Taiwan, R. O. C.
Tel. (02) 2516 6040 Ext. [ 086 ]   e-mail:  r...@twn.tuv.com








khar...@lexmark.com on 03/18/2000 03:30:51 AM

Please respond to khar...@lexmark.com

To:   emc-p...@ieee.org
cc:   m...@california.com, sla...@foxboro.com (bcc: Rene Charton/TUV-Twn)
Subject:  RE: Dithered clocks and EMC - BEWARE




Scott,

Sorry to hear about your experience but we have had great success using Spread
Spectrum Clock Generation (SSCG) since 1994 and have shipped many millions of
units.
Most PC's built over the last 2 to 3 years also use this technology.
For back ground information, see http://www.lexmark.com/sscg/ and
http://developer.intel.com/ial/scalableplatforms/sdt.htm.  Included in this
information
is what SSCG is and its effects on some other devices.  I suggest one read these
references as a basis for further discussions.

Experimental data has clearly shown is that the QP and Peak readings are
exactly the same for SSCG signals (No Fooling).  An SSCG output properly
designed will create
a clock that is frequency modulated at ~30kHz.  The output spectrum is a series
of
stationary harmonics spaced at 30kHz apart.

Finally, this method will attenuate the clock and system as compared to the same
system
with the modulation turned off.  All other EMI reduction techniques will also
reduce emissions further.
Our design philosophy is to bring all good low cost techniques to bare on
reducing the emissions
and SSCG is just one of them.

Keith Hardin
Lexmark International

For the last time this came up, please see the append on the emc-pstc archives
at http://www.rcic.com/ with subject Clock Oscillator Re: Spread spectrum
clock oscillator (1) 20-Feb-97 .




slacey%foxboro@interlock.lexmark.com on 03/17/2000 11:18:46 AM

Please respond to slacey%foxboro@interlock.lexmark.com

To:   macy%california@interlock.lexmark.com
cc:   emc-pstc%ieee@interlock.lexmark.com (bcc: Keith Hardin/Lex/Lexmark)
Subject:  RE: Dithered clocks and EMC - BEWARE




Robert, and the group,
Although I have only limited experience (1 instance) with dithered clocks, I
thought that I might share that experience with the group. I had a product
that was failing radiated emissions at one particular frequency with a
vertical antenna orientation. I tracked the problem down to a particular
cable and circuit card. Use of a near field probe identified the oscillator
package as the source of the emissions (the second harmonic).

The device was located near the card edge, insufficient decoupling, etc. All
the textbook layout errors. A check of the oscillator specifications showed
that it was a standard TTL device with a fanout of 10 inputs. I had already
found some fixes that would reduce emissions, clamp-on ferrites, additional
shielding, etc., but thought it made more sense to reduce the emissions at
the source. I suggested to the design engineer that a low

RE: Dithered clocks and EMC - BEWARE

2000-03-18 Thread Cook, Jack

Lacey  others,

Interesting.  But with only the 2nd harmonic being your problem, it's
possible the dithered clock's energy envelope was mostly or all still within
the 120 kHz passband of the EMI receiver, depending upon the amount of
dithering. Was this the case?

I'm curious about the digital TV receiver report.  I understand that the
entire 6 MHz of a digital TV channel's frequency allocation appears to be
filled with content as opposed to the old analog TV systems which basically
had audio  video sub-carriers.  This suggests the digital receiver front
end designs are different (more vulnerable?).  Hopefully, there are others
on this forum that can explain.

Jack Cook,
Xerox Corp


-Original Message-
From: Lacey,Scott [mailto:sla...@foxboro.com]
Sent: Friday, March 17, 2000 8:19 AM
To: 'Robert Macy'
Cc: 'emc-p...@ieee.org'
Subject: RE: Dithered clocks and EMC - BEWARE



Robert, and the group,
Although I have only limited experience (1 instance) with dithered clocks, I
thought that I might share that experience with the group. I had a product
that was failing radiated emissions at one particular frequency with a
vertical antenna orientation. I tracked the problem down to a particular
cable and circuit card. Use of a near field probe identified the oscillator
package as the source of the emissions (the second harmonic).

The device was located near the card edge, insufficient decoupling, etc. All
the textbook layout errors. A check of the oscillator specifications showed
that it was a standard TTL device with a fanout of 10 inputs. I had already
found some fixes that would reduce emissions, clamp-on ferrites, additional
shielding, etc., but thought it made more sense to reduce the emissions at
the source. I suggested to the design engineer that a low-power TTL
oscillator, with a fanout of 2 inputs, would reduce currents through the
offending etches. Someone else suggested a dithered clock device instead.
When we tested the dithered clock, emissions were actually worse. We had
simply spread the problem over a wider spectrum.

I have heard some success stories for these devices, but results in this
case were disappointing. I still think a lot depends on the layout. I
strongly suspect that real-world disruption to nearby devices is generally
going to be worse, since the idea behind these devices is to fool
quasi-peak measurements in order to pass.

Caveat Emptor!

Scott Lacey


-Original Message-
From:   Robert Macy [SMTP:m...@california.com]
Sent:   Friday, March 17, 2000 9:38 AM
To: emc-p...@ieee.org
Subject:Fw: Dithered clocks and EMC - BEWARE


Of interest, so I forward this to the group:

   - Robert -

   Robert A. Macy, PEm...@california.com
   408 286 3985  fx 408 297 9121
   AJM International Electronics Consultants
   619 North First St,   San Jose, CA  95112


-Original Message-
From: John Woodgate j...@jmwa.demon.co.uk
Newsgroups: sci.engr.electrical.compliance,sci.electronics.design
Date: Tuesday, March 14, 2000 11:55 PM
Subject: Dithered clocks and EMC - BEWARE


About a year ago we had a thread on this subject, concluding that
some
research was needed to see whether dithered clocks were better or
worse
in terms of conforming to EMC requirements.

I learned very recently that some reliable but as-yet unpublished
research has found that digital TV receivers are some 40 dB (!!)
more
sensitive to dithered clock emissions than to unmodulated carriers.
This
is likely to lead to changes in EMC limits within maybe as little
as
three years, since the authorities certainly don't want to be
deluged
with complaints of interference from people who have just opted for
digital TV.

So, if you are thinking of using a dithered clock, think again!
-- 
Regards, John Woodgate, OOO - Own Opinions Only. Phone +44 (0)1268
747839
Fax +44 (0)1268 777124. http://www.jmwa.demon.co.uk
I wanted to make a fully-automated nuclear-powered trawler,
but it went into spontaneous fishing.



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 majord...@ieee.org
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 unsubscribe emc-pstc

For help, send mail to the list administrators:
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 Michael Garretson:pstc_ad...@garretson.org

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RE: Dithered clocks and EMC - BEWARE

2000-03-17 Thread khardin

Scott,

Sorry to hear about your experience but we have had great success using Spread
Spectrum Clock Generation (SSCG) since 1994 and have shipped many millions of
units.
Most PC's built over the last 2 to 3 years also use this technology.
For back ground information, see http://www.lexmark.com/sscg/ and
http://developer.intel.com/ial/scalableplatforms/sdt.htm.  Included in this
information
is what SSCG is and its effects on some other devices.  I suggest one read these
references as a basis for further discussions.

Experimental data has clearly shown is that the QP and Peak readings are
exactly the same for SSCG signals (No Fooling).  An SSCG output properly
designed will create
a clock that is frequency modulated at ~30kHz.  The output spectrum is a series
of
stationary harmonics spaced at 30kHz apart.

Finally, this method will attenuate the clock and system as compared to the same
system
with the modulation turned off.  All other EMI reduction techniques will also
reduce emissions further.
Our design philosophy is to bring all good low cost techniques to bare on
reducing the emissions
and SSCG is just one of them.

Keith Hardin
Lexmark International

For the last time this came up, please see the append on the emc-pstc archives
at http://www.rcic.com/ with subject Clock Oscillator Re: Spread spectrum
clock oscillator (1) 20-Feb-97 .




slacey%foxboro@interlock.lexmark.com on 03/17/2000 11:18:46 AM

Please respond to slacey%foxboro@interlock.lexmark.com

To:   macy%california@interlock.lexmark.com
cc:   emc-pstc%ieee@interlock.lexmark.com (bcc: Keith Hardin/Lex/Lexmark)
Subject:  RE: Dithered clocks and EMC - BEWARE




Robert, and the group,
Although I have only limited experience (1 instance) with dithered clocks, I
thought that I might share that experience with the group. I had a product
that was failing radiated emissions at one particular frequency with a
vertical antenna orientation. I tracked the problem down to a particular
cable and circuit card. Use of a near field probe identified the oscillator
package as the source of the emissions (the second harmonic).

The device was located near the card edge, insufficient decoupling, etc. All
the textbook layout errors. A check of the oscillator specifications showed
that it was a standard TTL device with a fanout of 10 inputs. I had already
found some fixes that would reduce emissions, clamp-on ferrites, additional
shielding, etc., but thought it made more sense to reduce the emissions at
the source. I suggested to the design engineer that a low-power TTL
oscillator, with a fanout of 2 inputs, would reduce currents through the
offending etches. Someone else suggested a dithered clock device instead.
When we tested the dithered clock, emissions were actually worse. We had
simply spread the problem over a wider spectrum.

I have heard some success stories for these devices, but results in this
case were disappointing. I still think a lot depends on the layout. I
strongly suspect that real-world disruption to nearby devices is generally
going to be worse, since the idea behind these devices is to fool
quasi-peak measurements in order to pass.

Caveat Emptor!

Scott Lacey


 -Original Message-
 From: Robert Macy [SMTP:m...@california.com]
 Sent: Friday, March 17, 2000 9:38 AM
 To:  emc-p...@ieee.org
 Subject:  Fw: Dithered clocks and EMC - BEWARE


 Of interest, so I forward this to the group:

- Robert -

Robert A. Macy, PEm...@california.com
408 286 3985  fx 408 297 9121
AJM International Electronics Consultants
619 North First St,   San Jose, CA  95112


 -Original Message-
 From: John Woodgate j...@jmwa.demon.co.uk
 Newsgroups: sci.engr.electrical.compliance,sci.electronics.design
 Date: Tuesday, March 14, 2000 11:55 PM
 Subject: Dithered clocks and EMC - BEWARE


 About a year ago we had a thread on this subject, concluding that
some
 research was needed to see whether dithered clocks were better or
worse
 in terms of conforming to EMC requirements.
 
 I learned very recently that some reliable but as-yet unpublished
 research has found that digital TV receivers are some 40 dB (!!)
more
 sensitive to dithered clock emissions than to unmodulated carriers.
This
 is likely to lead to changes in EMC limits within maybe as little
as
 three years, since the authorities certainly don't want to be
deluged
 with complaints of interference from people who have just opted for
 digital TV.
 
 So, if you are thinking of using a dithered clock, think again!
 --
 Regards, John Woodgate, OOO - Own Opinions Only. Phone +44 (0)1268
747839
 Fax +44 (0)1268 777124. http://www.jmwa.demon.co.uk
 I wanted to make a fully-automated nuclear-powered trawler,
 but it went into spontaneous fishing

RE: Dithered clocks and EMC - BEWARE

2000-03-17 Thread Lacey,Scott

Robert, and the group,
Although I have only limited experience (1 instance) with dithered clocks, I
thought that I might share that experience with the group. I had a product
that was failing radiated emissions at one particular frequency with a
vertical antenna orientation. I tracked the problem down to a particular
cable and circuit card. Use of a near field probe identified the oscillator
package as the source of the emissions (the second harmonic).

The device was located near the card edge, insufficient decoupling, etc. All
the textbook layout errors. A check of the oscillator specifications showed
that it was a standard TTL device with a fanout of 10 inputs. I had already
found some fixes that would reduce emissions, clamp-on ferrites, additional
shielding, etc., but thought it made more sense to reduce the emissions at
the source. I suggested to the design engineer that a low-power TTL
oscillator, with a fanout of 2 inputs, would reduce currents through the
offending etches. Someone else suggested a dithered clock device instead.
When we tested the dithered clock, emissions were actually worse. We had
simply spread the problem over a wider spectrum.

I have heard some success stories for these devices, but results in this
case were disappointing. I still think a lot depends on the layout. I
strongly suspect that real-world disruption to nearby devices is generally
going to be worse, since the idea behind these devices is to fool
quasi-peak measurements in order to pass.

Caveat Emptor!

Scott Lacey


-Original Message-
From:   Robert Macy [SMTP:m...@california.com]
Sent:   Friday, March 17, 2000 9:38 AM
To: emc-p...@ieee.org
Subject:Fw: Dithered clocks and EMC - BEWARE


Of interest, so I forward this to the group:

   - Robert -

   Robert A. Macy, PEm...@california.com
   408 286 3985  fx 408 297 9121
   AJM International Electronics Consultants
   619 North First St,   San Jose, CA  95112


-Original Message-
From: John Woodgate j...@jmwa.demon.co.uk
Newsgroups: sci.engr.electrical.compliance,sci.electronics.design
Date: Tuesday, March 14, 2000 11:55 PM
Subject: Dithered clocks and EMC - BEWARE


About a year ago we had a thread on this subject, concluding that
some
research was needed to see whether dithered clocks were better or
worse
in terms of conforming to EMC requirements.

I learned very recently that some reliable but as-yet unpublished
research has found that digital TV receivers are some 40 dB (!!)
more
sensitive to dithered clock emissions than to unmodulated carriers.
This
is likely to lead to changes in EMC limits within maybe as little
as
three years, since the authorities certainly don't want to be
deluged
with complaints of interference from people who have just opted for
digital TV.

So, if you are thinking of using a dithered clock, think again!
-- 
Regards, John Woodgate, OOO - Own Opinions Only. Phone +44 (0)1268
747839
Fax +44 (0)1268 777124. http://www.jmwa.demon.co.uk
I wanted to make a fully-automated nuclear-powered trawler,
but it went into spontaneous fishing.



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