Re: [fonc] My annual hey, look at this post: Ivan Sutherland's FLEET architecture

2009-07-27 Thread Nikolay Suslov
On Mon, Jul 27, 2009 at 2:57 AM, Joshua Gargus sc...@fastmail.us wrote:

  Nikolay Suslov wrote:

 Just to mention, that Thacker's BEE FPGA is not another hardware project,
 but the emulation engine, where Fleet (the novel processor architecture) is
 being researched and emulated.


 A box packed full of FPGAs capable of 4 teraops/second isn't a hardware
 project?  I beg to differ.  :-)


)
Of course it is the hardware project,
I just mean not another, that it is not really comparable BEE 1/2/3 and
Fleet novel processor architecture as projects.
BEE is like a wide platform for researching a new DSPs, microprocessors
architectures (Fleet is here) etc. and as you said doing it using FPGAs.
This is a slides about BEE2 and on 18 page you will find Fleet also:
http://bwrc.eecs.berkeley.edu/php/pubs/pubs.php/493/JohnW-BWRC-RetreatV2-1-08.pdf

Regards,
Nikolay





 One of the target use-cases for the BEE is indeed to simulate new processor
 architectures.  However, that's not all it's for.   Among other things, the
 beecube.com webpage says that it can be used for FPGA based computational
 acceleration in HPC and High performance digital signal processing.

 Cheers,
 Josh


 Regards,
 Nikolay

 On Sun, Jul 26, 2009 at 12:40 AM, Joshua Gargus sc...@fastmail.us wrote:

 I just noticed this: http://fleet.cs.berkeley.edu/

 It seems relevant to this list both because it's an ambitious
 re-imagining of the foundations of processor architecture, and because
 of the intellectual heritage between Ivan and Alan.  I know that VPRI is
 keeping an eye on other hardware projects, like Thacker's BEE FPGA
 boxes, and I wonder how relevant Sutherland's work might be to VPRI in,
 say, 1 or 5 years?

 Cheers,
 Josh



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Re: [fonc] My annual hey, look at this post: Ivan Sutherland's FLEET architecture

2009-07-26 Thread Joshua Gargus
Nikolay Suslov wrote:
 Just to mention, that Thacker's BEE FPGA is not another hardware
 project, but the emulation engine, where Fleet (the novel processor
 architecture) is being researched and emulated.


A box packed full of FPGAs capable of 4 teraops/second isn't a hardware
project?  I beg to differ.  :-)

One of the target use-cases for the BEE is indeed to simulate new
processor architectures.  However, that's not all it's for.   Among
other things, the beecube.com webpage says that it can be used for FPGA
based computational acceleration in HPC and High performance digital
signal processing.

Cheers,
Josh


 Regards,
 Nikolay

 On Sun, Jul 26, 2009 at 12:40 AM, Joshua Gargus sc...@fastmail.us
 mailto:sc...@fastmail.us wrote:

 I just noticed this: http://fleet.cs.berkeley.edu/

 It seems relevant to this list both because it's an ambitious
 re-imagining of the foundations of processor architecture, and because
 of the intellectual heritage between Ivan and Alan.  I know that
 VPRI is
 keeping an eye on other hardware projects, like Thacker's BEE FPGA
 boxes, and I wonder how relevant Sutherland's work might be to
 VPRI in,
 say, 1 or 5 years?

 Cheers,
 Josh



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[fonc] My annual hey, look at this post: Ivan Sutherland's FLEET architecture

2009-07-25 Thread Joshua Gargus
I just noticed this: http://fleet.cs.berkeley.edu/

It seems relevant to this list both because it's an ambitious
re-imagining of the foundations of processor architecture, and because
of the intellectual heritage between Ivan and Alan.  I know that VPRI is
keeping an eye on other hardware projects, like Thacker's BEE FPGA
boxes, and I wonder how relevant Sutherland's work might be to VPRI in,
say, 1 or 5 years?

Cheers,
Josh



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Re: [fonc] My annual hey, look at this post: Ivan Sutherland's FLEET architecture

2009-07-25 Thread Nikolay Suslov
Just to mention, that Thacker's BEE FPGA is not another hardware project,
but the emulation engine, where Fleet (the novel processor architecture) is
being researched and emulated.

Regards,
Nikolay

On Sun, Jul 26, 2009 at 12:40 AM, Joshua Gargus sc...@fastmail.us wrote:

 I just noticed this: http://fleet.cs.berkeley.edu/

 It seems relevant to this list both because it's an ambitious
 re-imagining of the foundations of processor architecture, and because
 of the intellectual heritage between Ivan and Alan.  I know that VPRI is
 keeping an eye on other hardware projects, like Thacker's BEE FPGA
 boxes, and I wonder how relevant Sutherland's work might be to VPRI in,
 say, 1 or 5 years?

 Cheers,
 Josh



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 fonc@vpri.org
 http://vpri.org/mailman/listinfo/fonc

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