[Freedreno] [PATCH v4 4/7] drm/msm/dpu: Remove _dpu_crtc_power_enable

2018-09-26 Thread Bruce Wang
All checks for _dpu_crtc_power_enable are not true, so the function
can never return an error code. This removes the need for the
function as pm_runtime functions can be used instead.

v3: Separated _dpu_crtc_power_enable into _dpu_crtc_power_enable and
_dpu_crtc_power_disable for clarity.

v4: Removed both _dpu_crtc_power_enable and _dpu_crtc_power_disable
and called pm_runtime_get_sync and pm_runtime_put_sync from all
call points

Signed-off-by: Bruce Wang 
Reviewed-by: Jordan Crouse 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 41 ++--
 1 file changed, 2 insertions(+), 39 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index e31e70f5dbac..c5373a6b51e9 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -60,39 +60,6 @@ static inline struct dpu_kms *_dpu_crtc_get_kms(struct 
drm_crtc *crtc)
return to_dpu_kms(priv->kms);
 }
 
-static inline int _dpu_crtc_power_enable(struct dpu_crtc *dpu_crtc, bool 
enable)
-{
-   struct drm_crtc *crtc;
-   struct msm_drm_private *priv;
-   struct dpu_kms *dpu_kms;
-
-   if (!dpu_crtc) {
-   DPU_ERROR("invalid dpu crtc\n");
-   return -EINVAL;
-   }
-
-   crtc = _crtc->base;
-   if (!crtc->dev || !crtc->dev->dev_private) {
-   DPU_ERROR("invalid drm device\n");
-   return -EINVAL;
-   }
-
-   priv = crtc->dev->dev_private;
-   if (!priv->kms) {
-   DPU_ERROR("invalid kms\n");
-   return -EINVAL;
-   }
-
-   dpu_kms = to_dpu_kms(priv->kms);
-
-   if (enable)
-   pm_runtime_get_sync(_kms->pdev->dev);
-   else
-   pm_runtime_put_sync(_kms->pdev->dev);
-
-   return 0;
-}
-
 static void dpu_crtc_destroy(struct drm_crtc *crtc)
 {
struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
@@ -823,14 +790,10 @@ static int _dpu_crtc_vblank_enable_no_lock(
dev = crtc->dev;
 
if (enable) {
-   int ret;
-
/* drop lock since power crtc cb may try to re-acquire lock */
mutex_unlock(_crtc->crtc_lock);
-   ret = _dpu_crtc_power_enable(dpu_crtc, true);
+   pm_runtime_get_sync(dev->dev);
mutex_lock(_crtc->crtc_lock);
-   if (ret)
-   return ret;
 
list_for_each_entry(enc, >mode_config.encoder_list, head) {
if (enc->crtc != crtc)
@@ -857,7 +820,7 @@ static int _dpu_crtc_vblank_enable_no_lock(
 
/* drop lock since power crtc cb may try to re-acquire lock */
mutex_unlock(_crtc->crtc_lock);
-   _dpu_crtc_power_enable(dpu_crtc, false);
+   pm_runtime_put_sync(dev->dev);
mutex_lock(_crtc->crtc_lock);
}
 
-- 
2.19.0.605.g01d371f741-goog

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Re: [Freedreno] [PATCH 2/2] drm/msm: dpu: Make legacy cursor updates asynchronous

2018-09-26 Thread Jeykumar Sankaran

On 2018-09-19 11:56, Sean Paul wrote:

From: Sean Paul 

This patch sprinkles a few async/legacy_cursor_update checks
through commit to ensure that cursor updates aren't blocked on vsync.
There are 2 main components to this, the first is that we don't want to
wait_for_commit_done in msm_atomic  before returning from 
atomic_complete.
The second is that in dpu we don't want to wait for frame_done events 
when

updating the cursor.

Signed-off-by: Sean Paul 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 44 +++--
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h|  3 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 21 ++
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h |  6 ++-
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c |  5 ++-
 drivers/gpu/drm/msm/msm_atomic.c|  3 +-
 6 files changed, 48 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index a8f2dd7a37c7..b23f00a2554b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -816,7 +816,7 @@ static int _dpu_crtc_wait_for_frame_done(struct
drm_crtc *crtc)
return rc;
 }

-void dpu_crtc_commit_kickoff(struct drm_crtc *crtc)
+void dpu_crtc_commit_kickoff(struct drm_crtc *crtc, bool async)
 {
struct drm_encoder *encoder;
struct drm_device *dev;
@@ -862,27 +862,30 @@ void dpu_crtc_commit_kickoff(struct drm_crtc 
*crtc)

 * Encoder will flush/start now, unless it has a tx
pending.
 * If so, it may delay and flush at an irq event (e.g.
ppdone)
 */
-   dpu_encoder_prepare_for_kickoff(encoder, );
+   dpu_encoder_prepare_for_kickoff(encoder, , async);
}

-   /* wait for frame_event_done completion */
-   DPU_ATRACE_BEGIN("wait_for_frame_done_event");
-   ret = _dpu_crtc_wait_for_frame_done(crtc);
-   DPU_ATRACE_END("wait_for_frame_done_event");
-   if (ret) {
-   DPU_ERROR("crtc%d wait for frame done
failed;frame_pending%d\n",
-   crtc->base.id,
-   atomic_read(_crtc->frame_pending));
-   goto end;
-   }

-   if (atomic_inc_return(_crtc->frame_pending) == 1) {
-   /* acquire bandwidth and other resources */
-   DPU_DEBUG("crtc%d first commit\n", crtc->base.id);
-   } else
-   DPU_DEBUG("crtc%d commit\n", crtc->base.id);
+   if (!async) {
+   /* wait for frame_event_done completion */
+   DPU_ATRACE_BEGIN("wait_for_frame_done_event");
+   ret = _dpu_crtc_wait_for_frame_done(crtc);
+   DPU_ATRACE_END("wait_for_frame_done_event");
+   if (ret) {
+   DPU_ERROR("crtc%d wait for frame done
failed;frame_pending%d\n",
+   crtc->base.id,
+
atomic_read(_crtc->frame_pending));
+   goto end;
+   }
+
+   if (atomic_inc_return(_crtc->frame_pending) == 1) {
+   /* acquire bandwidth and other resources */
+   DPU_DEBUG("crtc%d first commit\n", crtc->base.id);
+   } else
+   DPU_DEBUG("crtc%d commit\n", crtc->base.id);

-   dpu_crtc->play_count++;
+   dpu_crtc->play_count++;
+   }

dpu_vbif_clear_errors(dpu_kms);

@@ -890,11 +893,12 @@ void dpu_crtc_commit_kickoff(struct drm_crtc 
*crtc)

if (encoder->crtc != crtc)
continue;

-   dpu_encoder_kickoff(encoder);
+   dpu_encoder_kickoff(encoder, async);
}

 end:
-   reinit_completion(_crtc->frame_done_comp);
+   if (!async)
+   reinit_completion(_crtc->frame_done_comp);
DPU_ATRACE_END("crtc_commit");
 }

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
index 3723b4830335..67c9f59997cf 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
@@ -285,8 +285,9 @@ int dpu_crtc_vblank(struct drm_crtc *crtc, bool 
en);

 /**
  * dpu_crtc_commit_kickoff - trigger kickoff of the commit for this 
crtc

  * @crtc: Pointer to drm crtc object
+ * @async: true if the commit is asynchronous, false otherwise
  */
-void dpu_crtc_commit_kickoff(struct drm_crtc *crtc);
+void dpu_crtc_commit_kickoff(struct drm_crtc *crtc, bool async);

 /**
  * dpu_crtc_complete_commit - callback signalling completion of 
current

commit
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index c2e8985b4c54..fc729fc8dd8c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -1410,7 +1410,7 @@ static void dpu_encoder_off_work(struct 
kthread_work

*work)
  * extra_flush_bits: Additional bit mask to include in flush 

Re: [Freedreno] [PATCH v3 2/3] drm/msm: Replace drm_gem_object_{un/reference} with put, get functions

2018-09-26 Thread Jordan Crouse
On Wed, Sep 26, 2018 at 01:48:58PM +0200, Thomas Zimmermann wrote:
> This patch unifies the naming of DRM functions for reference counting
> of struct drm_gem_object. The resulting code is more aligned with the
> rest of the Linux kernel interfaces.

Reviewed-by: Jordan Crouse 

> Signed-off-by: Thomas Zimmermann 
> ---
>  drivers/gpu/drm/msm/adreno/a5xx_debugfs.c | 4 ++--
>  drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 2 +-
>  drivers/gpu/drm/msm/adreno/a5xx_power.c   | 2 +-
>  drivers/gpu/drm/msm/adreno/a5xx_preempt.c | 2 +-
>  drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
>  drivers/gpu/drm/msm/msm_gem_submit.c  | 4 ++--
>  6 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c 
> b/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c
> index 059ec7d394d0..d2127b1c4ece 100644
> --- a/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c
> +++ b/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c
> @@ -132,14 +132,14 @@ reset_set(void *data, u64 val)
>   if (a5xx_gpu->pm4_bo) {
>   if (a5xx_gpu->pm4_iova)
>   msm_gem_put_iova(a5xx_gpu->pm4_bo, gpu->aspace);
> - drm_gem_object_unreference(a5xx_gpu->pm4_bo);
> + drm_gem_object_put(a5xx_gpu->pm4_bo);
>   a5xx_gpu->pm4_bo = NULL;
>   }
>  
>   if (a5xx_gpu->pfp_bo) {
>   if (a5xx_gpu->pfp_iova)
>   msm_gem_put_iova(a5xx_gpu->pfp_bo, gpu->aspace);
> - drm_gem_object_unreference(a5xx_gpu->pfp_bo);
> + drm_gem_object_put(a5xx_gpu->pfp_bo);
>   a5xx_gpu->pfp_bo = NULL;
>   }
>  
> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c 
> b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> index ab1d9308c311..6a6849309b6a 100644
> --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> @@ -1234,7 +1234,7 @@ static void a5xx_crashdumper_free(struct msm_gpu *gpu,
>   msm_gem_put_iova(dumper->bo, gpu->aspace);
>   msm_gem_put_vaddr(dumper->bo);
>  
> - drm_gem_object_unreference(dumper->bo);
> + drm_gem_object_put(dumper->bo);
>  }
>  
>  static int a5xx_crashdumper_run(struct msm_gpu *gpu,
> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_power.c 
> b/drivers/gpu/drm/msm/adreno/a5xx_power.c
> index e9c0e56dbec0..7a41e1c147e4 100644
> --- a/drivers/gpu/drm/msm/adreno/a5xx_power.c
> +++ b/drivers/gpu/drm/msm/adreno/a5xx_power.c
> @@ -323,7 +323,7 @@ void a5xx_gpmu_ucode_init(struct msm_gpu *gpu)
>   if (a5xx_gpu->gpmu_iova)
>   msm_gem_put_iova(a5xx_gpu->gpmu_bo, gpu->aspace);
>   if (a5xx_gpu->gpmu_bo)
> - drm_gem_object_unreference(a5xx_gpu->gpmu_bo);
> + drm_gem_object_put(a5xx_gpu->gpmu_bo);
>  
>   a5xx_gpu->gpmu_bo = NULL;
>   a5xx_gpu->gpmu_iova = 0;
> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c 
> b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
> index 970c7963ae29..f3c21f827a4d 100644
> --- a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
> +++ b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
> @@ -272,7 +272,7 @@ void a5xx_preempt_fini(struct msm_gpu *gpu)
>   if (a5xx_gpu->preempt_iova[i])
>   msm_gem_put_iova(a5xx_gpu->preempt_bo[i], gpu->aspace);
>  
> - drm_gem_object_unreference(a5xx_gpu->preempt_bo[i]);
> + drm_gem_object_put(a5xx_gpu->preempt_bo[i]);
>   a5xx_gpu->preempt_bo[i] = NULL;
>   }
>  }
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c 
> b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> index c629f742a1d1..1a5d7a53752c 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> @@ -744,7 +744,7 @@ static void a6xx_destroy(struct msm_gpu *gpu)
>   if (a6xx_gpu->sqe_bo) {
>   if (a6xx_gpu->sqe_iova)
>   msm_gem_put_iova(a6xx_gpu->sqe_bo, gpu->aspace);
> - drm_gem_object_unreference_unlocked(a6xx_gpu->sqe_bo);
> + drm_gem_object_put_unlocked(a6xx_gpu->sqe_bo);
>   }
>  
>   a6xx_gmu_remove(a6xx_gpu);
> diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c 
> b/drivers/gpu/drm/msm/msm_gem_submit.c
> index 7bd83e0afa97..7a7923e6220d 100644
> --- a/drivers/gpu/drm/msm/msm_gem_submit.c
> +++ b/drivers/gpu/drm/msm/msm_gem_submit.c
> @@ -144,7 +144,7 @@ static int submit_lookup_objects(struct msm_gem_submit 
> *submit,
>   goto out_unlock;
>   }
>  
> - drm_gem_object_reference(obj);
> + drm_gem_object_get(obj);
>  
>   submit->bos[i].obj = msm_obj;
>  
> @@ -396,7 +396,7 @@ static void submit_cleanup(struct msm_gem_submit *submit)
>   struct msm_gem_object *msm_obj = submit->bos[i].obj;
>   submit_unlock_unpin_bo(submit, i, false);
>   list_del_init(_obj->submit_entry);
> - drm_gem_object_unreference(_obj->base);
> + drm_gem_object_put(_obj->base);
>   }
>  
>   

Re: [Freedreno] [PATCH v16 5/5] iommu/arm-smmu: Add support for qcom, smmu-v2 variant

2018-09-26 Thread Robin Murphy

On 30/08/18 15:45, Vivek Gautam wrote:

qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements.
On msm8996, multiple cores, viz. mdss, video, etc. use this
smmu. On sdm845, this smmu is used with gpu.
Add bindings for the same.

Signed-off-by: Vivek Gautam 
Reviewed-by: Rob Herring 
Reviewed-by: Tomasz Figa 
Tested-by: Srinivas Kandagatla 
---
  drivers/iommu/arm-smmu.c | 13 +
  1 file changed, 13 insertions(+)

diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 166c8c6da24f..411e5ac57c64 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -119,6 +119,7 @@ enum arm_smmu_implementation {
GENERIC_SMMU,
ARM_MMU500,
CAVIUM_SMMUV2,
+   QCOM_SMMUV2,


Hmm, it seems we don't actually need this right now, but maybe that just 
means there's more imp-def registers and/or errata to come ;)


Either way I guess there's no real harm in having it.

Reviewed-by: Robin Murphy 


  };
  
  struct arm_smmu_s2cr {

@@ -1970,6 +1971,17 @@ ARM_SMMU_MATCH_DATA(arm_mmu401, ARM_SMMU_V1_64K, 
GENERIC_SMMU);
  ARM_SMMU_MATCH_DATA(arm_mmu500, ARM_SMMU_V2, ARM_MMU500);
  ARM_SMMU_MATCH_DATA(cavium_smmuv2, ARM_SMMU_V2, CAVIUM_SMMUV2);
  
+static const char * const qcom_smmuv2_clks[] = {

+   "bus", "iface",
+};
+
+static const struct arm_smmu_match_data qcom_smmuv2 = {
+   .version = ARM_SMMU_V2,
+   .model = QCOM_SMMUV2,
+   .clks = qcom_smmuv2_clks,
+   .num_clks = ARRAY_SIZE(qcom_smmuv2_clks),
+};
+
  static const struct of_device_id arm_smmu_of_match[] = {
{ .compatible = "arm,smmu-v1", .data = _generic_v1 },
{ .compatible = "arm,smmu-v2", .data = _generic_v2 },
@@ -1977,6 +1989,7 @@ static const struct of_device_id arm_smmu_of_match[] = {
{ .compatible = "arm,mmu-401", .data = _mmu401 },
{ .compatible = "arm,mmu-500", .data = _mmu500 },
{ .compatible = "cavium,smmu-v2", .data = _smmuv2 },
+   { .compatible = "qcom,smmu-v2", .data = _smmuv2 },
{ },
  };
  MODULE_DEVICE_TABLE(of, arm_smmu_of_match);


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Re: [Freedreno] [PATCH v16 4/5] dt-bindings: arm-smmu: Add bindings for qcom, smmu-v2

2018-09-26 Thread Robin Murphy

On 30/08/18 15:45, Vivek Gautam wrote:

Add bindings doc for Qcom's smmu-v2 implementation.


Reviewed-by: Robin Murphy 


Signed-off-by: Vivek Gautam 
Reviewed-by: Tomasz Figa 
Tested-by: Srinivas Kandagatla 
---
  .../devicetree/bindings/iommu/arm,smmu.txt | 39 ++
  1 file changed, 39 insertions(+)

diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt 
b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
index 8a6ffce12af5..a6504b37cc21 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
@@ -17,10 +17,16 @@ conditions.
  "arm,mmu-401"
  "arm,mmu-500"
  "cavium,smmu-v2"
+"qcom,smmu-v2"
  
depending on the particular implementation and/or the

version of the architecture implemented.
  
+  Qcom SoCs must contain, as below, SoC-specific compatibles

+  along with "qcom,smmu-v2":
+  "qcom,msm8996-smmu-v2", "qcom,smmu-v2",
+  "qcom,sdm845-smmu-v2", "qcom,smmu-v2".
+
  - reg   : Base address and size of the SMMU.
  
  - #global-interrupts : The number of global interrupts exposed by the

@@ -71,6 +77,22 @@ conditions.
or using stream matching with #iommu-cells = <2>, and
may be ignored if present in such cases.
  
+- clock-names:List of the names of clocks input to the device. The

+  required list depends on particular implementation and
+  is as follows:
+  - for "qcom,smmu-v2":
+- "bus": clock required for downstream bus access and
+ for the smmu ptw,
+- "iface": clock required to access smmu's registers
+   through the TCU's programming interface.
+  - unspecified for other implementations.
+
+- clocks: Specifiers for all clocks listed in the clock-names property,
+  as per generic clock bindings.
+
+- power-domains:  Specifiers for power domains required to be powered on for
+  the SMMU to operate, as per generic power domain bindings.
+
  ** Deprecated properties:
  
  - mmu-masters (deprecated in favour of the generic "iommus" binding) :

@@ -137,3 +159,20 @@ conditions.
  iommu-map = <0  0 0x400>;
  ...
  };
+
+   /* Qcom's arm,smmu-v2 implementation */
+   smmu4: iommu@d0 {
+   compatible = "qcom,msm8996-smmu-v2", "qcom,smmu-v2";
+   reg = <0xd0 0x1>;
+
+   #global-interrupts = <1>;
+   interrupts = ,
+,
+;
+   #iommu-cells = <1>;
+   power-domains = < MDSS_GDSC>;
+
+   clocks = < SMMU_MDP_AXI_CLK>,
+< SMMU_MDP_AHB_CLK>;
+   clock-names = "bus", "iface";
+   };


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Re: [Freedreno] [PATCH v16 3/5] iommu/arm-smmu: Add the device_link between masters and smmu

2018-09-26 Thread Robin Murphy

On 30/08/18 15:45, Vivek Gautam wrote:

From: Sricharan R 

Finally add the device link between the master device and
smmu, so that the smmu gets runtime enabled/disabled only when the
master needs it. This is done from add_device callback which gets
called once when the master is added to the smmu.


Reviewed-by: Robin Murphy 


Signed-off-by: Sricharan R 
Signed-off-by: Vivek Gautam 
Reviewed-by: Tomasz Figa 
Tested-by: Srinivas Kandagatla 
---
  drivers/iommu/arm-smmu.c | 3 +++
  1 file changed, 3 insertions(+)

diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 1bf542010be7..166c8c6da24f 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -1461,6 +1461,9 @@ static int arm_smmu_add_device(struct device *dev)
  
  	iommu_device_link(>iommu, dev);
  
+	device_link_add(dev, smmu->dev,

+   DL_FLAG_PM_RUNTIME | DL_FLAG_AUTOREMOVE_SUPPLIER);
+
return 0;
  
  out_cfg_free:



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Re: [Freedreno] [PATCH v16 2/5] iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device

2018-09-26 Thread Robin Murphy

On 30/08/18 15:45, Vivek Gautam wrote:

From: Sricharan R 

The smmu device probe/remove and add/remove master device callbacks
gets called when the smmu is not linked to its master, that is without
the context of the master device. So calling runtime apis in those places
separately.
Global locks are also initialized before enabling runtime pm as the
runtime_resume() calls device_reset() which does tlb_sync_global()
that ultimately requires locks to be initialized.


To the best of my knowledge in this stuff (which is still not quite 
enough to be *truly* confident...),


Reviewed-by: Robin Murphy 


Signed-off-by: Sricharan R 
[vivek: Cleanup pm runtime calls]
Signed-off-by: Vivek Gautam 
Reviewed-by: Tomasz Figa 
Tested-by: Srinivas Kandagatla 
---
  drivers/iommu/arm-smmu.c | 89 +++-
  1 file changed, 81 insertions(+), 8 deletions(-)

diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index d900e007c3c9..1bf542010be7 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -268,6 +268,20 @@ static struct arm_smmu_option_prop arm_smmu_options[] = {
{ 0, NULL},
  };
  
+static inline int arm_smmu_rpm_get(struct arm_smmu_device *smmu)

+{
+   if (pm_runtime_enabled(smmu->dev))
+   return pm_runtime_get_sync(smmu->dev);
+
+   return 0;
+}
+
+static inline void arm_smmu_rpm_put(struct arm_smmu_device *smmu)
+{
+   if (pm_runtime_enabled(smmu->dev))
+   pm_runtime_put(smmu->dev);
+}
+
  static struct arm_smmu_domain *to_smmu_domain(struct iommu_domain *dom)
  {
return container_of(dom, struct arm_smmu_domain, domain);
@@ -913,11 +927,15 @@ static void arm_smmu_destroy_domain_context(struct 
iommu_domain *domain)
struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
struct arm_smmu_device *smmu = smmu_domain->smmu;
struct arm_smmu_cfg *cfg = _domain->cfg;
-   int irq;
+   int ret, irq;
  
  	if (!smmu || domain->type == IOMMU_DOMAIN_IDENTITY)

return;
  
+	ret = arm_smmu_rpm_get(smmu);

+   if (ret < 0)
+   return;
+
/*
 * Disable the context bank and free the page tables before freeing
 * it.
@@ -932,6 +950,8 @@ static void arm_smmu_destroy_domain_context(struct 
iommu_domain *domain)
  
  	free_io_pgtable_ops(smmu_domain->pgtbl_ops);

__arm_smmu_free_bitmap(smmu->context_map, cfg->cbndx);
+
+   arm_smmu_rpm_put(smmu);
  }
  
  static struct iommu_domain *arm_smmu_domain_alloc(unsigned type)

@@ -1213,10 +1233,15 @@ static int arm_smmu_attach_dev(struct iommu_domain 
*domain, struct device *dev)
return -ENODEV;
  
  	smmu = fwspec_smmu(fwspec);

+
+   ret = arm_smmu_rpm_get(smmu);
+   if (ret < 0)
+   return ret;
+
/* Ensure that the domain is finalised */
ret = arm_smmu_init_domain_context(domain, smmu);
if (ret < 0)
-   return ret;
+   goto rpm_put;
  
  	/*

 * Sanity check the domain. We don't support domains across
@@ -1226,33 +1251,50 @@ static int arm_smmu_attach_dev(struct iommu_domain 
*domain, struct device *dev)
dev_err(dev,
"cannot attach to SMMU %s whilst already attached to domain 
on SMMU %s\n",
dev_name(smmu_domain->smmu->dev), dev_name(smmu->dev));
-   return -EINVAL;
+   ret = -EINVAL;
+   goto rpm_put;
}
  
  	/* Looks ok, so add the device to the domain */

-   return arm_smmu_domain_add_master(smmu_domain, fwspec);
+   ret = arm_smmu_domain_add_master(smmu_domain, fwspec);
+
+rpm_put:
+   arm_smmu_rpm_put(smmu);
+   return ret;
  }
  
  static int arm_smmu_map(struct iommu_domain *domain, unsigned long iova,

phys_addr_t paddr, size_t size, int prot)
  {
struct io_pgtable_ops *ops = to_smmu_domain(domain)->pgtbl_ops;
+   struct arm_smmu_device *smmu = to_smmu_domain(domain)->smmu;
+   int ret;
  
  	if (!ops)

return -ENODEV;
  
-	return ops->map(ops, iova, paddr, size, prot);

+   arm_smmu_rpm_get(smmu);
+   ret = ops->map(ops, iova, paddr, size, prot);
+   arm_smmu_rpm_put(smmu);
+
+   return ret;
  }
  
  static size_t arm_smmu_unmap(struct iommu_domain *domain, unsigned long iova,

 size_t size)
  {
struct io_pgtable_ops *ops = to_smmu_domain(domain)->pgtbl_ops;
+   struct arm_smmu_device *smmu = to_smmu_domain(domain)->smmu;
+   size_t ret;
  
  	if (!ops)

return 0;
  
-	return ops->unmap(ops, iova, size);

+   arm_smmu_rpm_get(smmu);
+   ret = ops->unmap(ops, iova, size);
+   arm_smmu_rpm_put(smmu);
+
+   return ret;
  }
  
  static void arm_smmu_iotlb_sync(struct iommu_domain *domain)

@@ -1407,7 +1449,13 @@ static int arm_smmu_add_device(struct device *dev)
while (i--)

Re: [Freedreno] [PATCH v16 1/5] iommu/arm-smmu: Add pm_runtime/sleep ops

2018-09-26 Thread Robin Murphy

On 30/08/18 15:45, Vivek Gautam wrote:

From: Sricharan R 

The smmu needs to be functional only when the respective
master's using it are active. The device_link feature
helps to track such functional dependencies, so that the
iommu gets powered when the master device enables itself
using pm_runtime. So by adapting the smmu driver for
runtime pm, above said dependency can be addressed.

This patch adds the pm runtime/sleep callbacks to the
driver and also the functions to parse the smmu clocks
from DT and enable them in resume/suspend.

Also, while we enable the runtime pm add a pm sleep suspend
callback that pushes devices to low power state by turning
the clocks off in a system sleep.
Also add corresponding clock enable path in resume callback.

Signed-off-by: Sricharan R 
Signed-off-by: Archit Taneja 
[vivek: rework for clock and pm ops]
Signed-off-by: Vivek Gautam 
Reviewed-by: Tomasz Figa 
Tested-by: Srinivas Kandagatla 
---
  drivers/iommu/arm-smmu.c | 77 ++--
  1 file changed, 74 insertions(+), 3 deletions(-)

diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index fd1b80ef9490..d900e007c3c9 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -48,6 +48,7 @@
  #include 
  #include 
  #include 
+#include 
  #include 
  #include 
  
@@ -205,6 +206,8 @@ struct arm_smmu_device {

u32 num_global_irqs;
u32 num_context_irqs;
unsigned int*irqs;
+   struct clk_bulk_data*clks;
+   int num_clks;
  
  	u32cavium_id_base; /* Specific to Cavium */
  
@@ -1896,10 +1899,12 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)

  struct arm_smmu_match_data {
enum arm_smmu_arch_version version;
enum arm_smmu_implementation model;
+   const char * const *clks;
+   int num_clks;
  };
  
  #define ARM_SMMU_MATCH_DATA(name, ver, imp)	\

-static struct arm_smmu_match_data name = { .version = ver, .model = imp }
+static const struct arm_smmu_match_data name = { .version = ver, .model = imp }
  
  ARM_SMMU_MATCH_DATA(smmu_generic_v1, ARM_SMMU_V1, GENERIC_SMMU);

  ARM_SMMU_MATCH_DATA(smmu_generic_v2, ARM_SMMU_V2, GENERIC_SMMU);
@@ -1918,6 +1923,23 @@ static const struct of_device_id arm_smmu_of_match[] = {
  };
  MODULE_DEVICE_TABLE(of, arm_smmu_of_match);
  
+static void arm_smmu_fill_clk_data(struct arm_smmu_device *smmu,

+  const char * const *clks)
+{
+   int i;
+
+   if (smmu->num_clks < 1)
+   return;
+
+   smmu->clks = devm_kcalloc(smmu->dev, smmu->num_clks,
+ sizeof(*smmu->clks), GFP_KERNEL);
+   if (!smmu->clks)
+   return;
+
+   for (i = 0; i < smmu->num_clks; i++)
+   smmu->clks[i].id = clks[i];
+}
+
  #ifdef CONFIG_ACPI
  static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu)
  {
@@ -2000,6 +2022,9 @@ static int arm_smmu_device_dt_probe(struct 
platform_device *pdev,
data = of_device_get_match_data(dev);
smmu->version = data->version;
smmu->model = data->model;
+   smmu->num_clks = data->num_clks;
+
+   arm_smmu_fill_clk_data(smmu, data->clks);
  
  	parse_driver_options(smmu);
  
@@ -2098,6 +2123,14 @@ static int arm_smmu_device_probe(struct platform_device *pdev)

smmu->irqs[i] = irq;
}
  
+	err = devm_clk_bulk_get(smmu->dev, smmu->num_clks, smmu->clks);

+   if (err)
+   return err;
+
+   err = clk_bulk_prepare_enable(smmu->num_clks, smmu->clks);
+   if (err)
+   return err;
+


Hmm, if we error out beyond here it looks like we should strictly 
balance that prepare/enable before devres does the clk_bulk_put(), 
however the probe error path is starting to look like it needs a bit of 
love in general, so I might just spin a cleanup patch on top (and even 
then only for the sake of not being a bad example; SMMU probe failure is 
never a realistic situation for the system to actually recover from).


Otherwise,

Reviewed-by: Robin Murphy 


err = arm_smmu_device_cfg_probe(smmu);
if (err)
return err;
@@ -2184,6 +2217,9 @@ static int arm_smmu_device_remove(struct platform_device 
*pdev)
  
  	/* Turn the thing off */

writel(sCR0_CLIENTPD, ARM_SMMU_GR0_NS(smmu) + ARM_SMMU_GR0_sCR0);
+
+   clk_bulk_disable_unprepare(smmu->num_clks, smmu->clks);
+
return 0;
  }
  
@@ -2192,15 +2228,50 @@ static void arm_smmu_device_shutdown(struct platform_device *pdev)

arm_smmu_device_remove(pdev);
  }
  
-static int __maybe_unused arm_smmu_pm_resume(struct device *dev)

+static int __maybe_unused arm_smmu_runtime_resume(struct device *dev)
  {
struct arm_smmu_device *smmu = dev_get_drvdata(dev);
+   int ret;
+
+   ret = clk_bulk_enable(smmu->num_clks, smmu->clks);

[Freedreno] [PATCH v3 0/3] drm/msm: Replace {un/reference} with {put, get} functions

2018-09-26 Thread Thomas Zimmermann
This patch set replaces functions named {un,reference} by their
{put,get} counterparts. Affected data types are struct struct drm_framebuffer,
struct drm_gem_object, and struct drm_device.

With the reference-counting functions being named {put,get}, the DRM
interface is more aligned to Linux kernel nameing standard. The patch
set does not change driver-internal interfaces.

Changes since v2:
* fixed an instance in a6xx_destroy()

Changes since v1:
* rebased on 4.18
* adapted to changes in msm_drv.c and adreno/a5xx_gpu.c

Thomas Zimmermann (3):
  drm/msm: Replace drm_framebuffer_{un/reference} with put,get functions
  drm/msm: Replace drm_gem_object_{un/reference} with put,get functions
  drm/msm: Replace drm_dev_unref with drm_dev_put

 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c  | 4 ++--
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c  | 2 +-
 drivers/gpu/drm/msm/adreno/a5xx_power.c| 2 +-
 drivers/gpu/drm/msm/adreno/a5xx_preempt.c  | 2 +-
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c  | 2 +-
 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c | 4 ++--
 drivers/gpu/drm/msm/msm_drv.c  | 8 
 drivers/gpu/drm/msm/msm_gem_submit.c   | 4 ++--
 8 files changed, 14 insertions(+), 14 deletions(-)

--
2.19.0

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[Freedreno] [PATCH v3 1/3] drm/msm: Replace drm_framebuffer_{un/reference} with put, get functions

2018-09-26 Thread Thomas Zimmermann
This patch unifies the naming of DRM functions for reference counting
of struct drm_framebuffer. The resulting code is more aligned with the
rest of the Linux kernel interfaces.

Signed-off-by: Thomas Zimmermann 
---
 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c 
b/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c
index 7d306c5acd09..c95dccb24b3c 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c
@@ -185,7 +185,7 @@ static void mdp5_plane_reset(struct drm_plane *plane)
struct mdp5_plane_state *mdp5_state;
 
if (plane->state && plane->state->fb)
-   drm_framebuffer_unreference(plane->state->fb);
+   drm_framebuffer_put(plane->state->fb);
 
kfree(to_mdp5_plane_state(plane->state));
mdp5_state = kzalloc(sizeof(*mdp5_state), GFP_KERNEL);
@@ -228,7 +228,7 @@ static void mdp5_plane_destroy_state(struct drm_plane 
*plane,
struct mdp5_plane_state *pstate = to_mdp5_plane_state(state);
 
if (state->fb)
-   drm_framebuffer_unreference(state->fb);
+   drm_framebuffer_put(state->fb);
 
kfree(pstate);
 }
-- 
2.19.0

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[Freedreno] [PATCH v3 2/3] drm/msm: Replace drm_gem_object_{un/reference} with put, get functions

2018-09-26 Thread Thomas Zimmermann
This patch unifies the naming of DRM functions for reference counting
of struct drm_gem_object. The resulting code is more aligned with the
rest of the Linux kernel interfaces.

Signed-off-by: Thomas Zimmermann 
---
 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c | 4 ++--
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 2 +-
 drivers/gpu/drm/msm/adreno/a5xx_power.c   | 2 +-
 drivers/gpu/drm/msm/adreno/a5xx_preempt.c | 2 +-
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
 drivers/gpu/drm/msm/msm_gem_submit.c  | 4 ++--
 6 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c 
b/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c
index 059ec7d394d0..d2127b1c4ece 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c
@@ -132,14 +132,14 @@ reset_set(void *data, u64 val)
if (a5xx_gpu->pm4_bo) {
if (a5xx_gpu->pm4_iova)
msm_gem_put_iova(a5xx_gpu->pm4_bo, gpu->aspace);
-   drm_gem_object_unreference(a5xx_gpu->pm4_bo);
+   drm_gem_object_put(a5xx_gpu->pm4_bo);
a5xx_gpu->pm4_bo = NULL;
}
 
if (a5xx_gpu->pfp_bo) {
if (a5xx_gpu->pfp_iova)
msm_gem_put_iova(a5xx_gpu->pfp_bo, gpu->aspace);
-   drm_gem_object_unreference(a5xx_gpu->pfp_bo);
+   drm_gem_object_put(a5xx_gpu->pfp_bo);
a5xx_gpu->pfp_bo = NULL;
}
 
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index ab1d9308c311..6a6849309b6a 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -1234,7 +1234,7 @@ static void a5xx_crashdumper_free(struct msm_gpu *gpu,
msm_gem_put_iova(dumper->bo, gpu->aspace);
msm_gem_put_vaddr(dumper->bo);
 
-   drm_gem_object_unreference(dumper->bo);
+   drm_gem_object_put(dumper->bo);
 }
 
 static int a5xx_crashdumper_run(struct msm_gpu *gpu,
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_power.c 
b/drivers/gpu/drm/msm/adreno/a5xx_power.c
index e9c0e56dbec0..7a41e1c147e4 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_power.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_power.c
@@ -323,7 +323,7 @@ void a5xx_gpmu_ucode_init(struct msm_gpu *gpu)
if (a5xx_gpu->gpmu_iova)
msm_gem_put_iova(a5xx_gpu->gpmu_bo, gpu->aspace);
if (a5xx_gpu->gpmu_bo)
-   drm_gem_object_unreference(a5xx_gpu->gpmu_bo);
+   drm_gem_object_put(a5xx_gpu->gpmu_bo);
 
a5xx_gpu->gpmu_bo = NULL;
a5xx_gpu->gpmu_iova = 0;
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c 
b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
index 970c7963ae29..f3c21f827a4d 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
@@ -272,7 +272,7 @@ void a5xx_preempt_fini(struct msm_gpu *gpu)
if (a5xx_gpu->preempt_iova[i])
msm_gem_put_iova(a5xx_gpu->preempt_bo[i], gpu->aspace);
 
-   drm_gem_object_unreference(a5xx_gpu->preempt_bo[i]);
+   drm_gem_object_put(a5xx_gpu->preempt_bo[i]);
a5xx_gpu->preempt_bo[i] = NULL;
}
 }
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index c629f742a1d1..1a5d7a53752c 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -744,7 +744,7 @@ static void a6xx_destroy(struct msm_gpu *gpu)
if (a6xx_gpu->sqe_bo) {
if (a6xx_gpu->sqe_iova)
msm_gem_put_iova(a6xx_gpu->sqe_bo, gpu->aspace);
-   drm_gem_object_unreference_unlocked(a6xx_gpu->sqe_bo);
+   drm_gem_object_put_unlocked(a6xx_gpu->sqe_bo);
}
 
a6xx_gmu_remove(a6xx_gpu);
diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c 
b/drivers/gpu/drm/msm/msm_gem_submit.c
index 7bd83e0afa97..7a7923e6220d 100644
--- a/drivers/gpu/drm/msm/msm_gem_submit.c
+++ b/drivers/gpu/drm/msm/msm_gem_submit.c
@@ -144,7 +144,7 @@ static int submit_lookup_objects(struct msm_gem_submit 
*submit,
goto out_unlock;
}
 
-   drm_gem_object_reference(obj);
+   drm_gem_object_get(obj);
 
submit->bos[i].obj = msm_obj;
 
@@ -396,7 +396,7 @@ static void submit_cleanup(struct msm_gem_submit *submit)
struct msm_gem_object *msm_obj = submit->bos[i].obj;
submit_unlock_unpin_bo(submit, i, false);
list_del_init(_obj->submit_entry);
-   drm_gem_object_unreference(_obj->base);
+   drm_gem_object_put(_obj->base);
}
 
ww_acquire_fini(>ticket);
-- 
2.19.0

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Re: [Freedreno] [PATCH v3 4/7] drm/msm/dpu: Change _dpu_crtc_power_enable to void

2018-09-26 Thread Sean Paul
On Mon, Sep 24, 2018 at 12:22:25PM -0400, Bruce Wang wrote:
> All checks for _dpu_crtc_power_enable are not true, so the function
> can never return an error code. All calls of the function have also
> been changed so that they don't expect a return value.
> 
> v3: Separated _dpu_crtc_power_enable into _dpu_crtc_power_enable and
> _dpu_crtc_power_disable for clarity.
> 
> Signed-off-by: Bruce Wang 
> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 44 ++--
>  1 file changed, 11 insertions(+), 33 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> index e31e70f5dbac..cb71e2a2e02e 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> @@ -60,37 +60,19 @@ static inline struct dpu_kms *_dpu_crtc_get_kms(struct 
> drm_crtc *crtc)
>   return to_dpu_kms(priv->kms);
>  }
>  
> -static inline int _dpu_crtc_power_enable(struct dpu_crtc *dpu_crtc, bool 
> enable)
> -{
> - struct drm_crtc *crtc;
> - struct msm_drm_private *priv;
> - struct dpu_kms *dpu_kms;
> -
> - if (!dpu_crtc) {
> - DPU_ERROR("invalid dpu crtc\n");
> - return -EINVAL;
> - }
> -
> - crtc = _crtc->base;
> - if (!crtc->dev || !crtc->dev->dev_private) {
> - DPU_ERROR("invalid drm device\n");
> - return -EINVAL;
> - }
>  
> - priv = crtc->dev->dev_private;
> - if (!priv->kms) {
> - DPU_ERROR("invalid kms\n");
> - return -EINVAL;
> - }
> +static inline void _dpu_crtc_power_enable(struct dpu_crtc *dpu_crtc)
> +{
> + struct dpu_kms *dpu_kms = _dpu_crtc_get_kms(_crtc->base);
>  
> - dpu_kms = to_dpu_kms(priv->kms);
> + pm_runtime_get_sync(_kms->pdev->dev);
> +}
>  
> - if (enable)
> - pm_runtime_get_sync(_kms->pdev->dev);
> - else
> - pm_runtime_put_sync(_kms->pdev->dev);
> +static inline void _dpu_crtc_power_disable(struct dpu_crtc *dpu_crtc)
> +{
> + struct dpu_kms *dpu_kms = _dpu_crtc_get_kms(_crtc->base);
>  
> - return 0;
> + pm_runtime_put_sync(_kms->pdev->dev);
>  }
>  
>  static void dpu_crtc_destroy(struct drm_crtc *crtc)
> @@ -823,14 +805,10 @@ static int _dpu_crtc_vblank_enable_no_lock(
>   dev = crtc->dev;
>  
>   if (enable) {
> - int ret;
> -
>   /* drop lock since power crtc cb may try to re-acquire lock */
>   mutex_unlock(_crtc->crtc_lock);
> - ret = _dpu_crtc_power_enable(dpu_crtc, true);
> + _dpu_crtc_power_enable(dpu_crtc);

It seems you could just call the runtime func directly? Something like:

pm_runtime_get_sync(>dev);

>   mutex_lock(_crtc->crtc_lock);
> - if (ret)
> - return ret;
>  
>   list_for_each_entry(enc, >mode_config.encoder_list, head) {
>   if (enc->crtc != crtc)
> @@ -857,7 +835,7 @@ static int _dpu_crtc_vblank_enable_no_lock(
>  
>   /* drop lock since power crtc cb may try to re-acquire lock */
>   mutex_unlock(_crtc->crtc_lock);
> - _dpu_crtc_power_enable(dpu_crtc, false);
> + _dpu_crtc_power_disable(dpu_crtc);

pm_runtime_put_sync(>dev);

>   mutex_lock(_crtc->crtc_lock);
>   }
>  
> -- 
> 2.19.0.444.g18242da7ef-goog
> 

-- 
Sean Paul, Software Engineer, Google / Chromium OS
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