Re: [Freedreno] [PATCH 12/21] drm/msm: remove checks for return value of drm_debugfs functions.
Hi Wambui, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on linus/master v5.6-rc3 next-20200227] [cannot apply to tegra/for-next anholt/for-next] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Wambui-Karuga/drm-subsytem-wide-debugfs-functions-refactor/20200228-102633 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: arm64-defconfig (attached as .config) compiler: aarch64-linux-gcc (GCC) 7.5.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree GCC_VERSION=7.5.0 make.cross ARCH=arm64 If you fix the issue, kindly add following tag Reported-by: kbuild test robot All errors (new ones prefixed by >>): >> drivers/gpu/drm/msm/adreno/a5xx_gpu.c:1437:19: error: initialization from >> incompatible pointer type [-Werror=incompatible-pointer-types] .debugfs_init = a5xx_debugfs_init, ^ drivers/gpu/drm/msm/adreno/a5xx_gpu.c:1437:19: note: (near initialization for 'funcs.base.debugfs_init') cc1: some warnings being treated as errors -- >> drivers/gpu/drm/msm/adreno/a5xx_debugfs.c:151:6: error: conflicting types >> for 'a5xx_debugfs_init' void a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor) ^ In file included from drivers/gpu/drm/msm/adreno/a5xx_debugfs.c:12:0: drivers/gpu/drm/msm/adreno/a5xx_gpu.h:44:5: note: previous declaration of 'a5xx_debugfs_init' was here int a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor); ^ vim +/a5xx_debugfs_init +151 drivers/gpu/drm/msm/adreno/a5xx_debugfs.c 149 150 > 151 void a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor) --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org .config.gz Description: application/gzip ___ Freedreno mailing list Freedreno@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/freedreno
Re: [Freedreno] [DPU PATCH v3 3/5] drm/msm/dp: add displayPort driver support
On Thu, Feb 27, 2020 at 01:54:33PM -0800, Matthias Kaehlcke wrote:
> On Mon, Dec 02, 2019 at 01:48:57PM +, Chandan Uddaraju wrote:
> > Add the needed displayPort files to enable DP driver
> > on msm target.
> >
> > "dp_display" module is the main module that calls into
> > other sub-modules. "dp_drm" file represents the interface
> > between DRM framework and DP driver.
> >
> > changes in v2:
> > -- Update copyright markings on all relevant files.
> > -- Change pr_err() to DRM_ERROR()
> > -- Use APIs directly instead of function pointers.
> > -- Use drm_display_mode structure to store link parameters in the driver.
> > -- Use macros for register definitions instead of hardcoded values.
> > -- Replace writel_relaxed/readl_relaxed with writel/readl
> >and remove memory barriers.
> > -- Remove unnecessary NULL checks.
> > -- Use drm helper functions for dpcd read/write.
> > -- Use DRM_DEBUG_DP for debug msgs.
> >
> > changes in V3:
> > -- Removed changes in dpu_io_util.[ch]
> > -- Added locking around "is_connected" flag and removed atomic_set()
> > -- Removed the argument validation checks in all the static functions
> >except initialization functions and few API calls across msm/dp files
> > -- Removed hardcoded values for register reads/writes
> > -- Removed vreg related generic structures.
> > -- Added return values where ever necessary.
> > -- Updated dp_ctrl_on function.
> > -- Calling the ctrl specific catalog functions directly instead of
> >function pointers.
> > -- Added seperate change that adds standard value in drm_dp_helper file.
> > -- Added separate change in this list that is used to initialize
> >displayport in DPU driver.
> > -- Added change to use drm_dp_get_adjust_request_voltage() function.
> >
> > Signed-off-by: Chandan Uddaraju
> > ---
> > +++ b/drivers/gpu/drm/msm/dp/dp_power.c
> >
> > ...
> >
> > +int dp_power_init(struct dp_power *dp_power, bool flip)
> > +{
> > + int rc = 0;
> > + struct dp_power_private *power;
> > +
> > + if (!dp_power) {
> > + DRM_ERROR("invalid power data\n");
> > + rc = -EINVAL;
> > + goto exit;
> > + }
>
> drive-by comment:
>
> this would lead to calling 'pm_runtime_put_sync(>pdev->dev)'
> below with 'power' being NULL, which doesn't seem a good idea.
correction: with 'power' being uninitialized, which isn't a good idea
either.
> It is probably sane to expect that 'dp_power' is not NULL, if that's
> the case the check can be removed. Otherwise the function should just
> return -EINVAL instead of jumping to 'exit'.
>
> > +
> > + power = container_of(dp_power, struct dp_power_private, dp_power);
> > +
> > + pm_runtime_get_sync(>pdev->dev);
> > + rc = dp_power_regulator_enable(power);
> > + if (rc) {
> > + DRM_ERROR("failed to enable regulators, %d\n", rc);
> > + goto exit;
> > + }
> > +
> > + rc = dp_power_pinctrl_set(power, true);
> > + if (rc) {
> > + DRM_ERROR("failed to set pinctrl state, %d\n", rc);
> > + goto err_pinctrl;
> > + }
> > +
> > + rc = dp_power_config_gpios(power, flip);
> > + if (rc) {
> > + DRM_ERROR("failed to enable gpios, %d\n", rc);
> > + goto err_gpio;
> > + }
> > +
> > + rc = dp_power_clk_enable(dp_power, DP_CORE_PM, true);
> > + if (rc) {
> > + DRM_ERROR("failed to enable DP core clocks, %d\n", rc);
> > + goto err_clk;
> > + }
> > +
> > + return 0;
> > +
> > +err_clk:
> > + dp_power_disable_gpios(power);
> > +err_gpio:
> > + dp_power_pinctrl_set(power, false);
> > +err_pinctrl:
> > + dp_power_regulator_disable(power);
> > +exit:
> > + pm_runtime_put_sync(>pdev->dev);
> > + return rc;
> > +}
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Re: [Freedreno] [DPU PATCH v3 4/5] drm/msm/dp: add support for DP PLL driver
On Mon, Dec 02, 2019 at 01:48:27PM +, Chandan Uddaraju wrote:
> Add the needed DP PLL specific files to support
> display port interface on msm targets.
>
> The DP driver calls the DP PLL driver registration.
> The DP driver sets the link and pixel clock sources.
>
> Changes in v2:
> -- Update copyright markings on all relevant files.
> -- Use DRM_DEBUG_DP for debug msgs.
>
> Signed-off-by: Chandan Uddaraju
> ---
> diff --git a/drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.c
> b/drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.c
> new file mode 100644
> index 000..6ef2492
> --- /dev/null
> +++ b/drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.c
>
> ...
>
> +static u8 dp_mux_get_parent_10nm(struct clk_hw *hw)
> +{
> + u32 auxclk_div = 0;
> + struct dp_pll_10nm_pclksel *pclksel = to_pll_10nm_pclksel(hw);
> + struct dp_pll_10nm *dp_res = pclksel->pll;
> + u8 val = 0;
> +
> + DRM_ERROR("clk_hw->init->name = %s\n", hw->init->name);
drive-by comment: DRM_ERROR doesn't seem the right level, DRM_DEBUG_DP
would probably be more adequate.
Also I found this line triggers a NULL pointer dereference on a SC7180
system, where clk_hw->init is NULL.
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Re: [Freedreno] [DPU PATCH v3 3/5] drm/msm/dp: add displayPort driver support
On Mon, Dec 02, 2019 at 01:48:57PM +, Chandan Uddaraju wrote:
> Add the needed displayPort files to enable DP driver
> on msm target.
>
> "dp_display" module is the main module that calls into
> other sub-modules. "dp_drm" file represents the interface
> between DRM framework and DP driver.
>
> changes in v2:
> -- Update copyright markings on all relevant files.
> -- Change pr_err() to DRM_ERROR()
> -- Use APIs directly instead of function pointers.
> -- Use drm_display_mode structure to store link parameters in the driver.
> -- Use macros for register definitions instead of hardcoded values.
> -- Replace writel_relaxed/readl_relaxed with writel/readl
>and remove memory barriers.
> -- Remove unnecessary NULL checks.
> -- Use drm helper functions for dpcd read/write.
> -- Use DRM_DEBUG_DP for debug msgs.
>
> changes in V3:
> -- Removed changes in dpu_io_util.[ch]
> -- Added locking around "is_connected" flag and removed atomic_set()
> -- Removed the argument validation checks in all the static functions
>except initialization functions and few API calls across msm/dp files
> -- Removed hardcoded values for register reads/writes
> -- Removed vreg related generic structures.
> -- Added return values where ever necessary.
> -- Updated dp_ctrl_on function.
> -- Calling the ctrl specific catalog functions directly instead of
>function pointers.
> -- Added seperate change that adds standard value in drm_dp_helper file.
> -- Added separate change in this list that is used to initialize
>displayport in DPU driver.
> -- Added change to use drm_dp_get_adjust_request_voltage() function.
>
> Signed-off-by: Chandan Uddaraju
> ---
> +++ b/drivers/gpu/drm/msm/dp/dp_power.c
>
> ...
>
> +int dp_power_init(struct dp_power *dp_power, bool flip)
> +{
> + int rc = 0;
> + struct dp_power_private *power;
> +
> + if (!dp_power) {
> + DRM_ERROR("invalid power data\n");
> + rc = -EINVAL;
> + goto exit;
> + }
drive-by comment:
this would lead to calling 'pm_runtime_put_sync(>pdev->dev)'
below with 'power' being NULL, which doesn't seem a good idea.
It is probably sane to expect that 'dp_power' is not NULL, if that's
the case the check can be removed. Otherwise the function should just
return -EINVAL instead of jumping to 'exit'.
> +
> + power = container_of(dp_power, struct dp_power_private, dp_power);
> +
> + pm_runtime_get_sync(>pdev->dev);
> + rc = dp_power_regulator_enable(power);
> + if (rc) {
> + DRM_ERROR("failed to enable regulators, %d\n", rc);
> + goto exit;
> + }
> +
> + rc = dp_power_pinctrl_set(power, true);
> + if (rc) {
> + DRM_ERROR("failed to set pinctrl state, %d\n", rc);
> + goto err_pinctrl;
> + }
> +
> + rc = dp_power_config_gpios(power, flip);
> + if (rc) {
> + DRM_ERROR("failed to enable gpios, %d\n", rc);
> + goto err_gpio;
> + }
> +
> + rc = dp_power_clk_enable(dp_power, DP_CORE_PM, true);
> + if (rc) {
> + DRM_ERROR("failed to enable DP core clocks, %d\n", rc);
> + goto err_clk;
> + }
> +
> + return 0;
> +
> +err_clk:
> + dp_power_disable_gpios(power);
> +err_gpio:
> + dp_power_pinctrl_set(power, false);
> +err_pinctrl:
> + dp_power_regulator_disable(power);
> +exit:
> + pm_runtime_put_sync(>pdev->dev);
> + return rc;
> +}
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Re: [Freedreno] [PATCH v5 0/5] iommu/arm-smmu: Split pagetable support for arm-smmu-v2
On Tue, Jan 28, 2020 at 03:00:14PM -0700, Jordan Crouse wrote: > This is another iteration for the split pagetable support based on the > suggestions from Robin and Will [1]. > > Background: In order to support per-context pagetables the GPU needs to enable > split tables so that we can store global buffers in the TTBR1 space leaving > the > GPU free to program the TTBR0 register with the address of a context specific > pagetable. > > If the DOMAIN_ATTR_SPLIT_TABLES attribute is set on the domain before > attaching, > the context bank assigned to the domain will be programmed to allow > translations > in the TTBR1 space. Translations in the TTBR0 region will be disallowed > because, > as Robin pointe out, having a un-programmed TTBR0 register is dangerous. > > The driver can determine if TTBR1 was successfully programmed by querying > DOMAIN_ATTR_SPLIT_TABLES after attaching. The domain geometry will also be > updated to reflect the virtual address space for the TTBR1 range. > > Upcoming changes will allow auxiliary domains to be attached to the device > which > will enable and program TTBR0. > > This patchset is based on top of linux-next-20200127. Quick ping for feedback so I can respin for (maybe?) 5.6. Thanks, Jordan > Change log: > > v4: Only program TTBR1 when split pagetables are requested. TTBR0 will be > enabled later when an auxiliary domain is attached > v3: Remove the implementation specific and make split pagetable support > part of the generic configuration > > [1] https://lists.linuxfoundation.org/pipermail/iommu/2020-January/041373.html > > Jordan Crouse (5): > iommu: Add DOMAIN_ATTR_SPLIT_TABLES > iommu/arm-smmu: Add support for TTBR1 > drm/msm: Attach the IOMMU device during initialization > drm/msm: Refactor address space initialization > drm/msm/a6xx: Support split pagetables > > drivers/gpu/drm/msm/adreno/a2xx_gpu.c| 16 ++ > drivers/gpu/drm/msm/adreno/a3xx_gpu.c| 1 + > drivers/gpu/drm/msm/adreno/a4xx_gpu.c| 1 + > drivers/gpu/drm/msm/adreno/a5xx_gpu.c| 1 + > drivers/gpu/drm/msm/adreno/a6xx_gpu.c| 51 > > drivers/gpu/drm/msm/adreno/adreno_gpu.c | 23 ++ > drivers/gpu/drm/msm/adreno/adreno_gpu.h | 8 + > drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 18 --- > drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 18 +-- > drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c | 4 --- > drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 18 +-- > drivers/gpu/drm/msm/msm_drv.h| 8 ++--- > drivers/gpu/drm/msm/msm_gem_vma.c| 36 -- > drivers/gpu/drm/msm/msm_gpu.c| 49 ++ > drivers/gpu/drm/msm/msm_gpu.h| 4 +-- > drivers/gpu/drm/msm/msm_gpummu.c | 6 > drivers/gpu/drm/msm/msm_iommu.c | 18 ++- > drivers/gpu/drm/msm/msm_mmu.h| 1 - > drivers/iommu/arm-smmu.c | 48 +- > drivers/iommu/arm-smmu.h | 22 ++ > include/linux/iommu.h| 2 ++ > 21 files changed, 198 insertions(+), 155 deletions(-) > > -- > 2.7.4 > ___ > Freedreno mailing list > Freedreno@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/freedreno -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project ___ Freedreno mailing list Freedreno@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/freedreno
[Freedreno] [v2 2/2] drm/msm/dpu: fix reservation cleanup during modeset
Missing return statement will cause the reservations to get released prematurely, thus messing up the allocation for any next successive datapath reservation. Signed-off-by: Krishna Manikandan Changes in v2: - Change in commit message --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 136e4d0..0052212 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -1084,6 +1084,8 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, dpu_enc->mode_set_complete = true; + return; + error: dpu_rm_release(_kms->rm, drm_enc); } -- 1.9.1 ___ Freedreno mailing list Freedreno@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/freedreno
[Freedreno] [v2 1/2] drm/msm/dpu: add DP support for sc7180 target
Add the required changes to support Display Port
for sc7180 target.
Signed-off-by: Krishna Manikandan
Changes in v2:
- Change in commit message
This patch has dependency on the below series
https://patchwork.kernel.org/patch/11269169/
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c| 6 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 3 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 4
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c| 12
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 4
5 files changed, 28 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index f8ac3bf..136e4d0 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -1109,6 +1109,12 @@ static void _dpu_encoder_virt_enable_helper(struct
drm_encoder *drm_enc)
}
if (dpu_enc->cur_master->hw_mdptop &&
+ (dpu_enc->disp_info.intf_type == DRM_MODE_ENCODER_TMDS) &&
+ dpu_enc->cur_master->hw_mdptop->ops.intf_audio_select)
+ dpu_enc->cur_master->hw_mdptop->ops.intf_audio_select(
+ dpu_enc->cur_master->hw_mdptop);
+
+ if (dpu_enc->cur_master->hw_mdptop &&
dpu_enc->cur_master->hw_mdptop->ops.reset_ubwc)
dpu_enc->cur_master->hw_mdptop->ops.reset_ubwc(
dpu_enc->cur_master->hw_mdptop,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index c567917..60f350f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -109,8 +109,9 @@
{
.name = "top_0", .id = MDP_TOP,
.base = 0x0, .len = 0x494,
- .features = 0,
+ .features = BIT(DPU_MDP_DP_PHY_SEL),
.highest_bank_bit = 0x3,
+ .dp_phy_intf_sel = 0x41,
.clk_ctrls[DPU_CLK_CTRL_VIG0] = {
.reg_off = 0x2AC, .bit_off = 0},
.clk_ctrls[DPU_CLK_CTRL_DMA0] = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index 09df7d8..fbcf14b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -77,6 +77,7 @@ enum {
* @DPU_MDP_UBWC_1_0, This chipsets supports Universal Bandwidth
* compression initial revision
* @DPU_MDP_UBWC_1_5, Universal Bandwidth compression version 1.5
+ * @DPU_MDP_DP_PHY_SEL DP PHY interface select for controller
* @DPU_MDP_MAXMaximum value
*/
@@ -86,6 +87,7 @@ enum {
DPU_MDP_BWC,
DPU_MDP_UBWC_1_0,
DPU_MDP_UBWC_1_5,
+ DPU_MDP_DP_PHY_SEL,
DPU_MDP_MAX
};
@@ -421,6 +423,7 @@ struct dpu_clk_ctrl_reg {
* @highest_bank_bit: UBWC parameter
* @ubwc_static: ubwc static configuration
* @ubwc_swizzle: ubwc default swizzle setting
+ * @dp_phy_intf_sel: dp phy interface select for controller
* @clk_ctrls clock control register definition
*/
struct dpu_mdp_cfg {
@@ -428,6 +431,7 @@ struct dpu_mdp_cfg {
u32 highest_bank_bit;
u32 ubwc_static;
u32 ubwc_swizzle;
+ u32 dp_phy_intf_sel;
struct dpu_clk_ctrl_reg clk_ctrls[DPU_CLK_CTRL_MAX];
};
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
index efe9a57..ae96ede 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
@@ -144,10 +144,22 @@ static void dpu_hw_intf_setup_timing_engine(struct
dpu_hw_intf *ctx,
hsync_ctl = (hsync_period << 16) | p->hsync_pulse_width;
display_hctl = (hsync_end_x << 16) | hsync_start_x;
+ if (ctx->cap->type == INTF_DP) {
+ active_h_start = hsync_start_x;
+ active_h_end = active_h_start + p->xres - 1;
+ active_v_start = display_v_start;
+ active_v_end = active_v_start + (p->yres * hsync_period) - 1;
+ active_hctl = (active_h_end << 16) | active_h_start;
+ display_hctl = active_hctl;
+ }
+
den_polarity = 0;
if (ctx->cap->type == INTF_HDMI) {
hsync_polarity = p->yres >= 720 ? 0 : 1;
vsync_polarity = p->yres >= 720 ? 0 : 1;
+ } else if (ctx->cap->type == INTF_DP) {
+ hsync_polarity = p->hsync_polarity;
+ vsync_polarity = p->vsync_polarity;
} else {
hsync_polarity = 0;
vsync_polarity = 0;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
index f9af52a..9591d42 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
@@ -41,6 +41,7 @@
#define MDP_WD_TIMER_4_CTL
[Freedreno] [v1 1/2] msm: disp: dpu1: add DP support for sc7180 target
Add the required changes to support Display Port
for sc7180 target.
Signed-off-by: Krishna Manikandan
This patch has dependency on DP driver changes in
https://patchwork.kernel.org/patch/11269169/
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c| 6 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 3 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 4
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c| 12
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 4
5 files changed, 28 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index f8ac3bf..136e4d0 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -1109,6 +1109,12 @@ static void _dpu_encoder_virt_enable_helper(struct
drm_encoder *drm_enc)
}
if (dpu_enc->cur_master->hw_mdptop &&
+ (dpu_enc->disp_info.intf_type == DRM_MODE_ENCODER_TMDS) &&
+ dpu_enc->cur_master->hw_mdptop->ops.intf_audio_select)
+ dpu_enc->cur_master->hw_mdptop->ops.intf_audio_select(
+ dpu_enc->cur_master->hw_mdptop);
+
+ if (dpu_enc->cur_master->hw_mdptop &&
dpu_enc->cur_master->hw_mdptop->ops.reset_ubwc)
dpu_enc->cur_master->hw_mdptop->ops.reset_ubwc(
dpu_enc->cur_master->hw_mdptop,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index c567917..60f350f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -109,8 +109,9 @@
{
.name = "top_0", .id = MDP_TOP,
.base = 0x0, .len = 0x494,
- .features = 0,
+ .features = BIT(DPU_MDP_DP_PHY_SEL),
.highest_bank_bit = 0x3,
+ .dp_phy_intf_sel = 0x41,
.clk_ctrls[DPU_CLK_CTRL_VIG0] = {
.reg_off = 0x2AC, .bit_off = 0},
.clk_ctrls[DPU_CLK_CTRL_DMA0] = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index 09df7d8..fbcf14b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -77,6 +77,7 @@ enum {
* @DPU_MDP_UBWC_1_0, This chipsets supports Universal Bandwidth
* compression initial revision
* @DPU_MDP_UBWC_1_5, Universal Bandwidth compression version 1.5
+ * @DPU_MDP_DP_PHY_SEL DP PHY interface select for controller
* @DPU_MDP_MAXMaximum value
*/
@@ -86,6 +87,7 @@ enum {
DPU_MDP_BWC,
DPU_MDP_UBWC_1_0,
DPU_MDP_UBWC_1_5,
+ DPU_MDP_DP_PHY_SEL,
DPU_MDP_MAX
};
@@ -421,6 +423,7 @@ struct dpu_clk_ctrl_reg {
* @highest_bank_bit: UBWC parameter
* @ubwc_static: ubwc static configuration
* @ubwc_swizzle: ubwc default swizzle setting
+ * @dp_phy_intf_sel: dp phy interface select for controller
* @clk_ctrls clock control register definition
*/
struct dpu_mdp_cfg {
@@ -428,6 +431,7 @@ struct dpu_mdp_cfg {
u32 highest_bank_bit;
u32 ubwc_static;
u32 ubwc_swizzle;
+ u32 dp_phy_intf_sel;
struct dpu_clk_ctrl_reg clk_ctrls[DPU_CLK_CTRL_MAX];
};
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
index efe9a57..ae96ede 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
@@ -144,10 +144,22 @@ static void dpu_hw_intf_setup_timing_engine(struct
dpu_hw_intf *ctx,
hsync_ctl = (hsync_period << 16) | p->hsync_pulse_width;
display_hctl = (hsync_end_x << 16) | hsync_start_x;
+ if (ctx->cap->type == INTF_DP) {
+ active_h_start = hsync_start_x;
+ active_h_end = active_h_start + p->xres - 1;
+ active_v_start = display_v_start;
+ active_v_end = active_v_start + (p->yres * hsync_period) - 1;
+ active_hctl = (active_h_end << 16) | active_h_start;
+ display_hctl = active_hctl;
+ }
+
den_polarity = 0;
if (ctx->cap->type == INTF_HDMI) {
hsync_polarity = p->yres >= 720 ? 0 : 1;
vsync_polarity = p->yres >= 720 ? 0 : 1;
+ } else if (ctx->cap->type == INTF_DP) {
+ hsync_polarity = p->hsync_polarity;
+ vsync_polarity = p->vsync_polarity;
} else {
hsync_polarity = 0;
vsync_polarity = 0;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
index f9af52a..9591d42 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
@@ -41,6 +41,7 @@
#define MDP_WD_TIMER_4_CTL0x440
#define MDP_WD_TIMER_4_CTL2
[Freedreno] [v1 2/2] msm: disp: dpu1: fix reservations cleanup during modeset
Missing return statement will cause the reservations to get released prematurely, thus messing up the allocation for any next successive datapath reservation. Signed-off-by: Krishna Manikandan --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 136e4d0..0052212 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -1084,6 +1084,8 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, dpu_enc->mode_set_complete = true; + return; + error: dpu_rm_release(_kms->rm, drm_enc); } -- 1.9.1 ___ Freedreno mailing list Freedreno@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/freedreno
Re: [Freedreno] [PATCH 12/21] drm/msm: remove checks for return value of drm_debugfs functions.
On Thu, Feb 27, 2020 at 03:02:23PM +0300, Wambui Karuga wrote:
> Since commit 987d65d01356 (drm: debugfs: make
> drm_debugfs_create_files() never fail), drm_debugfs_create_files() does
> not fail, and should return void. This change therefore removes the
> checks of its return value in drm/msm and subsequent error handling.
>
> These changes also enable the changing of various debugfs_init()
> functions to return void.
>
> Signed-off-by: Wambui Karuga
I think msm_kms_funcs->debugfs_init could also be made to return void. But
that's quite a bit more involved so doesn't make much sense to do that as
part of this patch series.
Also the debug/core_perf/ files look kinda funny, if I'd bet this is used
by the qualcomm hwc somewhere to make it's decisions :-) That's at least
what's been the case everywhere else I spotted something like that.
-Daniel
> ---
> drivers/gpu/drm/msm/adreno/a5xx_debugfs.c | 18 +-
> drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 14 +++---
> drivers/gpu/drm/msm/msm_debugfs.c | 21 ++---
> drivers/gpu/drm/msm/msm_debugfs.h | 2 +-
> drivers/gpu/drm/msm/msm_gpu.h | 2 +-
> 5 files changed, 16 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c
> b/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c
> index 075ecce4b5e0..8cae2ca4af6b 100644
> --- a/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c
> +++ b/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c
> @@ -148,27 +148,19 @@ reset_set(void *data, u64 val)
> DEFINE_SIMPLE_ATTRIBUTE(reset_fops, NULL, reset_set, "%llx\n");
>
>
> -int a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor)
> +void a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor)
> {
> struct drm_device *dev;
> - int ret;
>
> if (!minor)
> - return 0;
> + return;
>
> dev = minor->dev;
>
> - ret = drm_debugfs_create_files(a5xx_debugfs_list,
> - ARRAY_SIZE(a5xx_debugfs_list),
> - minor->debugfs_root, minor);
> -
> - if (ret) {
> - DRM_DEV_ERROR(dev->dev, "could not install
> a5xx_debugfs_list\n");
> - return ret;
> - }
> + drm_debugfs_create_files(a5xx_debugfs_list,
> + ARRAY_SIZE(a5xx_debugfs_list),
> + minor->debugfs_root, minor);
>
> debugfs_create_file("reset", S_IWUGO, minor->debugfs_root, dev,
> _fops);
> -
> - return 0;
> }
> diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
> b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
> index 6650f478b226..41b461128bbc 100644
> --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
> +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
> @@ -259,17 +259,9 @@ static struct drm_info_list mdp5_debugfs_list[] = {
>
> static int mdp5_kms_debugfs_init(struct msm_kms *kms, struct drm_minor
> *minor)
> {
> - struct drm_device *dev = minor->dev;
> - int ret;
> -
> - ret = drm_debugfs_create_files(mdp5_debugfs_list,
> - ARRAY_SIZE(mdp5_debugfs_list),
> - minor->debugfs_root, minor);
> -
> - if (ret) {
> - DRM_DEV_ERROR(dev->dev, "could not install
> mdp5_debugfs_list\n");
> - return ret;
> - }
> + drm_debugfs_create_files(mdp5_debugfs_list,
> + ARRAY_SIZE(mdp5_debugfs_list),
> + minor->debugfs_root, minor);
>
> return 0;
> }
> diff --git a/drivers/gpu/drm/msm/msm_debugfs.c
> b/drivers/gpu/drm/msm/msm_debugfs.c
> index 1c74381a4fc9..3c958f311bbc 100644
> --- a/drivers/gpu/drm/msm/msm_debugfs.c
> +++ b/drivers/gpu/drm/msm/msm_debugfs.c
> @@ -214,31 +214,22 @@ int msm_debugfs_late_init(struct drm_device *dev)
> return ret;
> }
>
> -int msm_debugfs_init(struct drm_minor *minor)
> +void msm_debugfs_init(struct drm_minor *minor)
> {
> struct drm_device *dev = minor->dev;
> struct msm_drm_private *priv = dev->dev_private;
> - int ret;
> + int ret = 0;
>
> - ret = drm_debugfs_create_files(msm_debugfs_list,
> - ARRAY_SIZE(msm_debugfs_list),
> - minor->debugfs_root, minor);
> -
> - if (ret) {
> - DRM_DEV_ERROR(dev->dev, "could not install msm_debugfs_list\n");
> - return ret;
> - }
> + drm_debugfs_create_files(msm_debugfs_list,
> + ARRAY_SIZE(msm_debugfs_list),
> + minor->debugfs_root, minor);
>
> debugfs_create_file("gpu", S_IRUSR, minor->debugfs_root,
> dev, _gpu_fops);
>
> if (priv->kms && priv->kms->funcs->debugfs_init) {
> - ret = priv->kms->funcs->debugfs_init(priv->kms, minor);
> - if (ret)
> - return ret;
> + priv->kms->funcs->debugfs_init(priv->kms, minor);
> }
> -
> - return ret;
> }
>
[Freedreno] [PATCH 12/21] drm/msm: remove checks for return value of drm_debugfs functions.
Since commit 987d65d01356 (drm: debugfs: make
drm_debugfs_create_files() never fail), drm_debugfs_create_files() does
not fail, and should return void. This change therefore removes the
checks of its return value in drm/msm and subsequent error handling.
These changes also enable the changing of various debugfs_init()
functions to return void.
Signed-off-by: Wambui Karuga
---
drivers/gpu/drm/msm/adreno/a5xx_debugfs.c | 18 +-
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 14 +++---
drivers/gpu/drm/msm/msm_debugfs.c | 21 ++---
drivers/gpu/drm/msm/msm_debugfs.h | 2 +-
drivers/gpu/drm/msm/msm_gpu.h | 2 +-
5 files changed, 16 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c
b/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c
index 075ecce4b5e0..8cae2ca4af6b 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_debugfs.c
@@ -148,27 +148,19 @@ reset_set(void *data, u64 val)
DEFINE_SIMPLE_ATTRIBUTE(reset_fops, NULL, reset_set, "%llx\n");
-int a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor)
+void a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor)
{
struct drm_device *dev;
- int ret;
if (!minor)
- return 0;
+ return;
dev = minor->dev;
- ret = drm_debugfs_create_files(a5xx_debugfs_list,
- ARRAY_SIZE(a5xx_debugfs_list),
- minor->debugfs_root, minor);
-
- if (ret) {
- DRM_DEV_ERROR(dev->dev, "could not install
a5xx_debugfs_list\n");
- return ret;
- }
+ drm_debugfs_create_files(a5xx_debugfs_list,
+ARRAY_SIZE(a5xx_debugfs_list),
+minor->debugfs_root, minor);
debugfs_create_file("reset", S_IWUGO, minor->debugfs_root, dev,
_fops);
-
- return 0;
}
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
index 6650f478b226..41b461128bbc 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
@@ -259,17 +259,9 @@ static struct drm_info_list mdp5_debugfs_list[] = {
static int mdp5_kms_debugfs_init(struct msm_kms *kms, struct drm_minor *minor)
{
- struct drm_device *dev = minor->dev;
- int ret;
-
- ret = drm_debugfs_create_files(mdp5_debugfs_list,
- ARRAY_SIZE(mdp5_debugfs_list),
- minor->debugfs_root, minor);
-
- if (ret) {
- DRM_DEV_ERROR(dev->dev, "could not install
mdp5_debugfs_list\n");
- return ret;
- }
+ drm_debugfs_create_files(mdp5_debugfs_list,
+ARRAY_SIZE(mdp5_debugfs_list),
+minor->debugfs_root, minor);
return 0;
}
diff --git a/drivers/gpu/drm/msm/msm_debugfs.c
b/drivers/gpu/drm/msm/msm_debugfs.c
index 1c74381a4fc9..3c958f311bbc 100644
--- a/drivers/gpu/drm/msm/msm_debugfs.c
+++ b/drivers/gpu/drm/msm/msm_debugfs.c
@@ -214,31 +214,22 @@ int msm_debugfs_late_init(struct drm_device *dev)
return ret;
}
-int msm_debugfs_init(struct drm_minor *minor)
+void msm_debugfs_init(struct drm_minor *minor)
{
struct drm_device *dev = minor->dev;
struct msm_drm_private *priv = dev->dev_private;
- int ret;
+ int ret = 0;
- ret = drm_debugfs_create_files(msm_debugfs_list,
- ARRAY_SIZE(msm_debugfs_list),
- minor->debugfs_root, minor);
-
- if (ret) {
- DRM_DEV_ERROR(dev->dev, "could not install msm_debugfs_list\n");
- return ret;
- }
+ drm_debugfs_create_files(msm_debugfs_list,
+ARRAY_SIZE(msm_debugfs_list),
+minor->debugfs_root, minor);
debugfs_create_file("gpu", S_IRUSR, minor->debugfs_root,
dev, _gpu_fops);
if (priv->kms && priv->kms->funcs->debugfs_init) {
- ret = priv->kms->funcs->debugfs_init(priv->kms, minor);
- if (ret)
- return ret;
+ priv->kms->funcs->debugfs_init(priv->kms, minor);
}
-
- return ret;
}
#endif
diff --git a/drivers/gpu/drm/msm/msm_debugfs.h
b/drivers/gpu/drm/msm/msm_debugfs.h
index 2b91f8c178ad..ef58f66abbb3 100644
--- a/drivers/gpu/drm/msm/msm_debugfs.h
+++ b/drivers/gpu/drm/msm/msm_debugfs.h
@@ -8,7 +8,7 @@
#define __MSM_DEBUGFS_H__
#ifdef CONFIG_DEBUG_FS
-int msm_debugfs_init(struct drm_minor *minor);
+void msm_debugfs_init(struct drm_minor *minor);
#endif
#endif /* __MSM_DEBUGFS_H__ */
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
index be5bc2e8425c..6ccae4ba905c 100644
--- a/drivers/gpu/drm/msm/msm_gpu.h
+++ b/drivers/gpu/drm/msm/msm_gpu.h
@@
