[Freedreno] [PATCH v4 18/18] arm64: dts: qcom: sm8250: Add compat qcom, sm8250-dsi-ctrl
Add silicon specific compatible qcom,sm8250-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for sm8250 against the yaml documentation.
Signed-off-by: Bryan O'Donoghue
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi
b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 0d47c5b7148e1..8a73f1b487043 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -3528,7 +3528,8 @@ opp-46000 {
};
dsi0: dsi@ae94000 {
- compatible = "qcom,mdss-dsi-ctrl";
+ compatible = "qcom,sm8250-dsi-ctrl",
+"qcom,mdss-dsi-ctrl";
reg = <0 0x0ae94000 0 0x400>;
reg-names = "dsi_ctrl";
@@ -3619,7 +3620,8 @@ dsi0_phy: dsi-phy@ae94400 {
};
dsi1: dsi@ae96000 {
- compatible = "qcom,mdss-dsi-ctrl";
+ compatible = "qcom,sm8250-dsi-ctrl",
+"qcom,mdss-dsi-ctrl";
reg = <0 0x0ae96000 0 0x400>;
reg-names = "dsi_ctrl";
--
2.38.1
[Freedreno] [PATCH v4 13/18] arm64: dts: qcom: sc7180: Add compat qcom, sc7180-dsi-ctrl
Add silicon specific compatible qcom,sc7180-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for sc7180 against the yaml documentation.
Reviewed-by: Douglas Anderson
Signed-off-by: Bryan O'Donoghue
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi
b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index d2c374e9d8c03..cfe44afc52b4a 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -2985,7 +2985,8 @@ opp-46000 {
};
dsi0: dsi@ae94000 {
- compatible = "qcom,mdss-dsi-ctrl";
+ compatible = "qcom,sc7180-dsi-ctrl",
+"qcom,mdss-dsi-ctrl";
reg = <0 0x0ae94000 0 0x400>;
reg-names = "dsi_ctrl";
--
2.38.1
[Freedreno] [PATCH v4 09/18] ARM: dts: qcom: apq8064: add compat qcom, apq8064-dsi-ctrl
Append silicon specific compatible qcom,apq8064-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for apq8064 against the yaml documentation.
Reviewed-by: David Heidelberg
Signed-off-by: Bryan O'Donoghue
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index d036dff4b14f7..a8b089eb0dad2 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -1287,7 +1287,8 @@ mmss_sfpb: syscon@570 {
};
dsi0: dsi@470 {
- compatible = "qcom,mdss-dsi-ctrl";
+ compatible = "qcom,apq8064-dsi-ctrl"
+"qcom,mdss-dsi-ctrl";
label = "MDSS DSI CTRL->0";
#address-cells = <1>;
#size-cells = <0>;
--
2.38.1
[Freedreno] [PATCH v4 12/18] arm64: dts: qcom: msm8996: Add compat qcom, msm8996-dsi-ctrl
Add silicon specific compatible qcom,msm8996-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for msm8996 against the yaml documentation.
Signed-off-by: Bryan O'Donoghue
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 081e20a63c610..9f6543579dcf0 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -968,7 +968,8 @@ mdp5_intf2_out: endpoint {
};
dsi0: dsi@994000 {
- compatible = "qcom,mdss-dsi-ctrl";
+ compatible = "qcom,msm8996-dsi-ctrl",
+"qcom,mdss-dsi-ctrl";
reg = <0x00994000 0x400>;
reg-names = "dsi_ctrl";
@@ -1035,7 +1036,8 @@ dsi0_phy: dsi-phy@994400 {
};
dsi1: dsi@996000 {
- compatible = "qcom,mdss-dsi-ctrl";
+ compatible = "qcom,msm8996-dsi-ctrl",
+"qcom,mdss-dsi-ctrl";
reg = <0x00996000 0x400>;
reg-names = "dsi_ctrl";
--
2.38.1
[Freedreno] [PATCH v4 11/18] arm64: dts: qcom: msm8916: Add compat qcom, msm8916-dsi-ctrl
Add silicon specific compatible qcom,msm8916-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for msm8916 against the yaml documentation.
Signed-off-by: Bryan O'Donoghue
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index c1d8a1b388d27..20e72038cadfe 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -1021,7 +1021,8 @@ mdp5_intf1_out: endpoint {
};
dsi0: dsi@1a98000 {
- compatible = "qcom,mdss-dsi-ctrl";
+ compatible = "qcom,msm8916-dsi-ctrl",
+"qcom,mdss-dsi-ctrl";
reg = <0x01a98000 0x25c>;
reg-names = "dsi_ctrl";
--
2.38.1
[Freedreno] [PATCH v4 17/18] arm64: dts: qcom: sdm845: Add compat qcom, sdm845-dsi-ctrl
Add silicon specific compatible qcom,sdm845-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for sdm845 against the yaml documentation.
Reviewed-by: Douglas Anderson
Signed-off-by: Bryan O'Donoghue
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 5420205417c81..c14e49c9655c3 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -4522,7 +4522,8 @@ opp-43000 {
};
dsi0: dsi@ae94000 {
- compatible = "qcom,mdss-dsi-ctrl";
+ compatible = "qcom,sdm845-dsi-ctrl",
+"qcom,mdss-dsi-ctrl";
reg = <0 0x0ae94000 0 0x400>;
reg-names = "dsi_ctrl";
@@ -4593,7 +4594,8 @@ dsi0_phy: dsi-phy@ae94400 {
};
dsi1: dsi@ae96000 {
- compatible = "qcom,mdss-dsi-ctrl";
+ compatible = "qcom,sdm845-dsi-ctrl",
+"qcom,mdss-dsi-ctrl";
reg = <0 0x0ae96000 0 0x400>;
reg-names = "dsi_ctrl";
--
2.38.1
[Freedreno] [PATCH v4 16/18] arm64: dts: qcom: sdm660: Add compat qcom, sdm660-dsi-ctrl
Add silicon specific compatible qcom,sdm660-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for sdm660 against the yaml documentation.
Signed-off-by: Bryan O'Donoghue
---
arch/arm64/boot/dts/qcom/sdm660.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi
b/arch/arm64/boot/dts/qcom/sdm660.dtsi
index 10bf1c45cf6ec..f8ec728e67f3d 100644
--- a/arch/arm64/boot/dts/qcom/sdm660.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi
@@ -154,7 +154,8 @@ mdp5_intf2_out: endpoint {
{
dsi1: dsi@c996000 {
- compatible = "qcom,mdss-dsi-ctrl";
+ compatible = "qcom,sdm660-dsi-ctrl",
+"qcom,mdss-dsi-ctrl";
reg = <0x0c996000 0x400>;
reg-names = "dsi_ctrl";
--
2.38.1
[Freedreno] [PATCH v4 15/18] arm64: dts: qcom: sdm630: Add compat qcom, sdm630-dsi-ctrl
Add silicon specific compatible qcom,sdm630-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for sdm630 against the yaml documentation.
Signed-off-by: Bryan O'Donoghue
---
arch/arm64/boot/dts/qcom/sdm630.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi
b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 0e7764f66b104..905ddb57318dd 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1581,7 +1581,8 @@ opp-41250 {
};
dsi0: dsi@c994000 {
- compatible = "qcom,mdss-dsi-ctrl";
+ compatible = "qcom,sdm630-dsi-ctrl",
+"qcom,mdss-dsi-ctrl";
reg = <0x0c994000 0x400>;
reg-names = "dsi_ctrl";
--
2.38.1
[Freedreno] [PATCH v4 10/18] ARM: dts: qcom: msm8974: Add compat qcom, msm8974-dsi-ctrl
Add silicon specific compatible qcom,msm8974-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for msm8974 against the yaml documentation.
Signed-off-by: Bryan O'Donoghue
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 21d943d4b02d7..b4361f4318ece 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -1545,7 +1545,8 @@ mdp5_intf1_out: endpoint {
};
dsi0: dsi@fd922800 {
- compatible = "qcom,mdss-dsi-ctrl";
+ compatible = "qcom,msm8974-dsi-ctrl",
+"qcom,mdss-dsi-ctrl";
reg = <0xfd922800 0x1f8>;
reg-names = "dsi_ctrl";
--
2.38.1
[Freedreno] [PATCH v4 14/18] arm64: dts: qcom: sc7280: Add compat qcom, sc7280-dsi-ctrl
Add silicon specific compatible qcom,sc7280-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for sc7280 against the yaml documentation.
Reviewed-by: Douglas Anderson
Signed-off-by: Bryan O'Donoghue
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index a4d6e866b5999..3368531e004e8 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -3903,7 +3903,8 @@ opp-50667 {
};
mdss_dsi: dsi@ae94000 {
- compatible = "qcom,mdss-dsi-ctrl";
+ compatible = "qcom,sc7280-dsi-ctrl",
+"qcom,mdss-dsi-ctrl";
reg = <0 0x0ae94000 0 0x400>;
reg-names = "dsi_ctrl";
--
2.38.1
[Freedreno] [PATCH v4 06/18] dt-bindings: msm: dsi-controller-main: Fix description of core clock
There's a typo in describing the core clock as an 'escape' clock. The
accurate description is 'core'.
Fixes: 4dbe55c97741 ("dt-bindings: msm: dsi: add yaml schemas for DSI bindings")
Reviewed-by: Dmitry Baryshkov
Acked-by: Krzysztof Kozlowski
Signed-off-by: Bryan O'Donoghue
---
.../devicetree/bindings/display/msm/dsi-controller-main.yaml| 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
index 88aac7d33555c..0c09b9230b7f5 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
@@ -40,7 +40,7 @@ properties:
- description: Display byte clock
- description: Display byte interface clock
- description: Display pixel clock
- - description: Display escape clock
+ - description: Display core clock
- description: Display AHB clock
- description: Display AXI clock
--
2.38.1
[Freedreno] [PATCH v4 07/18] dt-bindings: msm: dsi-controller-main: Fix clock declarations
When converting from .txt to .yaml dt-binding descriptions we appear to
have missed some of the previous detail on the number and names of
permissible clocks.
Fix this by listing the clock descriptions against the clock names at a
high level.
Fixes: 4dbe55c97741 ("dt-bindings: msm: dsi: add yaml schemas for DSI bindings")
Signed-off-by: Bryan O'Donoghue
---
.../display/msm/dsi-controller-main.yaml | 20 ---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
index 0c09b9230b7f5..0fbb0c04f4b06 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
@@ -36,13 +36,19 @@ properties:
maxItems: 1
clocks:
-items:
- - description: Display byte clock
- - description: Display byte interface clock
- - description: Display pixel clock
- - description: Display core clock
- - description: Display AHB clock
- - description: Display AXI clock
+description: |
+ Several clocks are used, depending on the variant. Typical ones are::
+ - bus:: Display AHB clock.
+ - byte:: Display byte clock.
+ - byte_intf:: Display byte interface clock.
+ - core:: Display core clock.
+ - core_mss:: Core MultiMedia SubSystem clock.
+ - iface:: Display AXI clock.
+ - mdp_core:: MDP Core clock.
+ - mnoc:: MNOC clock
+ - pixel:: Display pixel clock.
+minItems: 6
+maxItems: 9
clock-names:
minItems: 6
--
2.38.1
[Freedreno] [PATCH v4 05/18] dt-bindings: msm: dsi-controller-main: Document clocks on a per compatible basis
Each compatible has a different set of clocks which are associated with it. Add in the list of clocks for each compatible. Signed-off-by: Bryan O'Donoghue --- .../display/msm/dsi-controller-main.yaml | 152 -- 1 file changed, 142 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml index 0cd2079137b02..88aac7d33555c 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml @@ -9,9 +9,6 @@ title: Qualcomm Display DSI controller maintainers: - Krishna Manikandan -allOf: - - $ref: "../dsi-controller.yaml#" - properties: compatible: items: @@ -48,13 +45,8 @@ properties: - description: Display AXI clock clock-names: -items: - - const: byte - - const: byte_intf - - const: pixel - - const: core - - const: iface - - const: bus +minItems: 6 +maxItems: 9 phys: maxItems: 1 @@ -147,6 +139,146 @@ required: - assigned-clock-parents - ports +allOf: + - $ref: "../dsi-controller.yaml#" + - if: + properties: +compatible: + contains: +enum: + - qcom,apq8064-dsi-ctrl +then: + properties: +clocks: + maxItems: 7 +clock-names: + items: +- const: iface +- const: bus +- const: core_mmss +- const: src +- const: byte +- const: pixel +- const: core + + - if: + properties: +compatible: + contains: +enum: + - qcom,msm8916-dsi-ctrl +then: + properties: +clocks: + maxItems: 6 +clock-names: + items: +- const: mdp_core +- const: iface +- const: bus +- const: byte +- const: pixel +- const: core + + - if: + properties: +compatible: + contains: +enum: + - qcom,msm8974-dsi-ctrl +then: + properties: +clocks: + maxItems: 3 +clock-names: + items: +- const: iface +- const: bus +- const: vsync + + - if: + properties: +compatible: + contains: +enum: + - qcom,msm8996-dsi-ctrl +then: + properties: +clocks: + maxItems: 7 +clock-names: + items: +- const: mdp_core +- const: byte +- const: iface +- const: bus +- const: core_mmss +- const: pixel +- const: core + + - if: + properties: +compatible: + contains: +enum: + - qcom,sc7180-dsi-ctrl + - qcom,sc7280-dsi-ctrl + - qcom,sm8250-dsi-ctrl +then: + properties: +clocks: + maxItems: 6 +clock-names: + items: +- const: byte +- const: byte_intf +- const: pixel +- const: core +- const: iface +- const: bus + + - if: + properties: +compatible: + contains: +enum: + - qcom,sdm630-dsi-ctrl + - qcom,sdm660-dsi-ctrl +then: + properties: +clocks: + maxItems: 9 +clock-names: + items: +- const: mdp_core +- const: byte +- const: byte_intf +- const: mnoc +- const: iface +- const: bus +- const: core_mmss +- const: pixel +- const: core + + - if: + properties: +compatible: + contains: +enum: + - qcom,sdm845-dsi-ctrl +then: + properties: +clocks: + maxItems: 6 +clock-names: + items: +- const: byte +- const: byte_intf +- const: pixel +- const: core +- const: iface +- const: bus + additionalProperties: false examples: -- 2.38.1
[Freedreno] [PATCH v4 08/18] dt-bindings: msm: dsi-controller-main: Add vdd* descriptions back in
When converting from .txt to .yaml we didn't include descriptions for the
existing regulator supplies.
- vdd
- vdda
- vddio
Add those descriptions into the yaml now as they were prior to the
conversion. In the .txt description we marked these regulators as required,
however, that requirement appears to have been in error.
Taking the example of sc7180-trogdor-wormdingler.dtsi. The avdd and avee
come from GPIO controlled external regulators, not the SoC and in this case
there's no need for vddio to power an I/O bus. Similarly the regulators for
the LCD are controlled by the panel driver not by the dsi-ctrl driver.
It would be possible to connect a different type of panel to the DSI bus
here in which case we may or may not want to make use of vdd, vdda or
vddio.
This is also the case for older chipsets like apq8064, msm8916 etc the vdd*
regulators in the dsi-ctrl block are helpers not dependencies.
Add the description of vdd, vdda and vddio back in for the existing
upstream dts where vdd, vdda or vddio are already declared but, don't
declare those regulators required - they are not SoC requirements.
Fixes: 4dbe55c97741 ("dt-bindings: msm: dsi: add yaml schemas for DSI bindings")
Signed-off-by: Bryan O'Donoghue
---
.../bindings/display/msm/dsi-controller-main.yaml| 12
1 file changed, 12 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
index 0fbb0c04f4b06..bcbcbdca1a78a 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
@@ -133,6 +133,18 @@ properties:
- port@0
- port@1
+ vdd-supply:
+description:
+ vdd regulator device node
+
+ vddio-supply:
+description:
+ vdd-io regulator device node
+
+ vdda-supply:
+description:
+ vdda regulator device node
+
required:
- compatible
- reg
--
2.38.1
[Freedreno] [PATCH v4 04/18] dt-bindings: msm: dsi-controller-main: Add compatible strings for every current SoC
Currently we do not differentiate between the various users of the
qcom,mdss-dsi-ctrl. The driver is flexible enough to operate from one
compatible string but, the hardware does have some significant differences
in the number of clocks.
To facilitate documenting the clocks add the following compatible strings
- qcom,apq8064-dsi-ctrl
- qcom,msm8916-dsi-ctrl
- qcom,msm8974-dsi-ctrl
- qcom,msm8996-dsi-ctrl
- qcom,sc7180-dsi-ctrl
- qcom,sc7280-dsi-ctrl
- qcom,sdm630-dsi-ctrl
- qcom,sdm660-dsi-ctrl
- qcom,sdm845-dsi-ctrl
- qcom,sm8250-dsi-ctrl
Each SoC dtsi should declare "qcom,socname-dsi-ctrl", "qcom,mdss-dsi-ctrl";
Signed-off-by: Bryan O'Donoghue
---
.../display/msm/dsi-controller-main.yaml | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
index 67d08dc338925..0cd2079137b02 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
@@ -14,9 +14,20 @@ allOf:
properties:
compatible:
-enum:
- - qcom,mdss-dsi-ctrl
- - qcom,qcm2290-dsi-ctrl
+items:
+ - enum:
+ - qcom,apq8064-dsi-ctrl
+ - qcom,msm8916-dsi-ctrl
+ - qcom,msm8974-dsi-ctrl
+ - qcom,msm8996-dsi-ctrl
+ - qcom,qcm2290-dsi-ctrl
+ - qcom,sc7180-dsi-ctrl
+ - qcom,sc7280-dsi-ctrl
+ - qcom,sdm630-dsi-ctrl
+ - qcom,sdm660-dsi-ctrl
+ - qcom,sdm845-dsi-ctrl
+ - qcom,sm8250-dsi-ctrl
+ - const: qcom,mdss-dsi-ctrl
reg:
maxItems: 1
@@ -146,7 +157,7 @@ examples:
#include
dsi@ae94000 {
- compatible = "qcom,mdss-dsi-ctrl";
+ compatible = "qcom,sc7180-dsi-ctrl", "qcom,mdss-dsi-ctrl";
reg = <0x0ae94000 0x400>;
reg-names = "dsi_ctrl";
--
2.38.1
[Freedreno] [PATCH v4 02/18] dt-bindings: msm: dsi-controller-main: Fix power-domain constraint
power-domain is required for the sc7180 dispcc GDSC but not every qcom SoC
has a similar dependency for example the aqp8064.
Most Qcom SoC's using mdss-dsi-ctrl seem to have the ability to
power-collapse the MDP without collapsing DSI.
For example the qcom vendor kernel commit for apq8084, msm8226, msm8916,
msm8974.
https://review.carbonrom.org/plugins/gitiles/CarbonROM/android_kernel_oneplus_msm8994/+/7b5c011a770daa2811778937ed646237a28a8694
"ARM: dts: msm: add mdss gdsc supply to dsi controller device
It is possible for the DSI controller to be active when MDP is
power collapsed. DSI controller needs to have it's own vote for
mdss gdsc to ensure that gdsc remains on in such cases."
This however doesn't appear to be the case for the apq8064 so we shouldn't
be marking power-domain as required in yaml checks.
Fixes: 4dbe55c97741 ("dt-bindings: msm: dsi: add yaml schemas for DSI bindings")
Reviewed-by: Dmitry Baryshkov
Acked-by: Krzysztof Kozlowski
Signed-off-by: Bryan O'Donoghue
---
.../devicetree/bindings/display/msm/dsi-controller-main.yaml | 1 -
1 file changed, 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
index 27ebfd5ffb22f..cf782c5f5bdb0 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
@@ -134,7 +134,6 @@ required:
- phys
- assigned-clocks
- assigned-clock-parents
- - power-domains
- ports
additionalProperties: false
--
2.38.1
[Freedreno] [PATCH v4 03/18] dt-bindings: msm: dsi-controller-main: Rename qcom, dsi-ctrl-6g-qcm2290 to qcom, qcm2290-dsi-ctrl
We will add in a number of compat strings to dsi-controller-main.yaml in the format "qcom,socname-dsi-ctrl" convert the currently unused qcom,dsi-ctrl-6g-qcm2290 to qcom,qcm2290-dsi-ctrl. Signed-off-by: Bryan O'Donoghue --- .../devicetree/bindings/display/msm/dsi-controller-main.yaml| 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml index cf782c5f5bdb0..67d08dc338925 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml @@ -16,7 +16,7 @@ properties: compatible: enum: - qcom,mdss-dsi-ctrl - - qcom,dsi-ctrl-6g-qcm2290 + - qcom,qcm2290-dsi-ctrl reg: maxItems: 1 -- 2.38.1
[Freedreno] [PATCH v4 01/18] dt-bindings: msm: dsi-controller-main: Fix operating-points-v2 constraint
The existing msm8916.dtsi does not depend on nor require operating points.
Fixes: 4dbe55c97741 ("dt-bindings: msm: dsi: add yaml schemas for DSI bindings")
Reviewed-by: Dmitry Baryshkov
Acked-by: Krzysztof Kozlowski
Signed-off-by: Bryan O'Donoghue
---
.../devicetree/bindings/display/msm/dsi-controller-main.yaml | 1 -
1 file changed, 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
index 7782bff89afc7..27ebfd5ffb22f 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
@@ -135,7 +135,6 @@ required:
- assigned-clocks
- assigned-clock-parents
- power-domains
- - operating-points-v2
- ports
additionalProperties: false
--
2.38.1
[Freedreno] [PATCH v4 00/18] mdss-dsi-ctrl binding and dts fixes
V4: - Moves the update of the example from patch #5 to patch #4 V3: - Moves declaration of mdss-dsi-ctrl into compat string declaration patch - Krzysztof, Dmitry - Renames qcm-2290 compat string to agreed compat "qcom,socname-dsi-ctrl" Dmirty, Krzysztof - Adds empty line after if clause in yaml control flow section - Dmirty - Adds Rb/Ack - Krzysztof, Dmitry, Doug, David - vdd* Looking into this some more, I don't believe vdd, vdda, vddio ought to be required properties. Its up to the PCB manufacturer and the panel in-use how that panel is powered. Powering the panel is not something that even necessarily needs to be done from the dsi-ctrl driver. Originally marking vdd* as required in the .txt was an error, its not a SoC level dtsi requirement. - clock-names Rather than replicate the clock-name in each if block I listed them with a specific description from a similar reference in usb/qcom,dwc3.yaml. https://lore.kernel.org/linux-arm-msm/eb80681f-2e0b-605f-0444-ec65562f7...@linaro.org/ V2: https://www.spinics.net/lists/linux-arm-msm/msg116326.html - Moves the DSI PHY changes to a different later series. There are enough dsi-controller-main changes to justify its own standalone series. - The original phy-name binding change given discussion with Rob and Krzysztof became its own standalone series that has since been merged. https://www.mail-archive.com/dri-devel@lists.freedesktop.org/msg403214.html - Retains the drop of power-domain from yaml as a required property. I dug into the available dtsi. The apq8064 doesn't appear to have any GDSC which can be attached as a power-domain, which means the power-domain requirement is not universal across the various silicon versions. - Adds Dmitry's RB to power-domain drop - For the clock declarations I've * I noticed that the simple change I had worked for msm8939 but subsquently broke other dtsi which drove a bigger change to document the clocks on a per compatible basis. * Added compat strings in yaml. * Moved the allOf down later in the file to acomodate the if/then. * Number of clocks validated on a per compatible basis * The driver code which doesn't care about the number of clocks can still operate on the mdss-dsi-ctrl compat but the dts checks will validate against the compat string and yaml. - vdd descriptions Took the previous text I missed from the .txt file - Krzysztof, Dmitry Adds vdd, vdda and vddio to the required list. This exposes warnings in existing dtsi but the previous .txt declared these regulators as required. - Krzysztof V1: This series fixes up a number of dtbs checks which are being flagged adding in the msm8939 dtsi. When converting from .txt to .yaml a number of the parameters for the older msm8916 silicon were not transmitted into the yaml. Adding in the msm8939 which is a near 1:1 copy of the msm8916 in terms of dtsi triggers a rake of dtbs checks as a result. https://www.mail-archive.com/dri-devel@lists.freedesktop.org/msg403211.html Bryan O'Donoghue (18): dt-bindings: msm: dsi-controller-main: Fix operating-points-v2 constraint dt-bindings: msm: dsi-controller-main: Fix power-domain constraint dt-bindings: msm: dsi-controller-main: Rename qcom,dsi-ctrl-6g-qcm2290 to qcom,qcm2290-dsi-ctrl dt-bindings: msm: dsi-controller-main: Add compatible strings for every current SoC dt-bindings: msm: dsi-controller-main: Document clocks on a per compatible basis dt-bindings: msm: dsi-controller-main: Fix description of core clock dt-bindings: msm: dsi-controller-main: Fix clock declarations dt-bindings: msm: dsi-controller-main: Add vdd* descriptions back in ARM: dts: qcom: apq8064: add compat qcom,apq8064-dsi-ctrl ARM: dts: qcom: msm8974: Add compat qcom,msm8974-dsi-ctrl arm64: dts: qcom: msm8916: Add compat qcom,msm8916-dsi-ctrl arm64: dts: qcom: msm8996: Add compat qcom,msm8996-dsi-ctrl arm64: dts: qcom: sc7180: Add compat qcom,sc7180-dsi-ctrl arm64: dts: qcom: sc7280: Add compat qcom,sc7280-dsi-ctrl arm64: dts: qcom: sdm630: Add compat qcom,sdm630-dsi-ctrl arm64: dts: qcom: sdm660: Add compat qcom,sdm660-dsi-ctrl arm64: dts: qcom: sdm845: Add compat qcom,sdm845-dsi-ctrl arm64: dts: qcom: sm8250: Add compat qcom,sm8250-dsi-ctrl .../display/msm/dsi-controller-main.yaml | 205 -- arch/arm/boot/dts/qcom-apq8064.dtsi | 3 +- arch/arm/boot/dts/qcom-msm8974.dtsi | 3 +- arch/arm64/boot/dts/qcom/msm8916.dtsi | 3 +- arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 +- arch/arm64/boot/dts/qcom/sc7180.dtsi | 3 +- arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +- arch/arm64/boot/dts/qcom/sdm630.dtsi | 3 +- arch/arm64/boot/dts/qcom/sdm660.dtsi | 3 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 +- arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 +- 11 files changed, 208 insertions(+), 36 deletions(-) --
Re: [Freedreno] [PATCH] drm/msm/mdp5: fix reading hw revision on db410c platform
On 11/25/2022 1:21 AM, Dmitry Baryshkov wrote:
On 25/11/2022 07:45, Abhinav Kumar wrote:
On 11/24/2022 4:02 PM, Dmitry Baryshkov wrote:
Since the commit commit c6122688f265 ("drm/msm/mdp5: stop overriding
drvdata") reading the MDP5 hw revision on db410c will crash the board
as the MDSS_GDSC is not enabled. Revert a part of the offending commit
(moving rpm enablement) and set priv->kms earlier. This make it possible
to use pm_runtime_get_sync() during read_mdp_hw_revision(), which will
power up both the MDP5 and MDSS devices.
This is the exact concern I had even when c6122688f265 was pushed.
https://patchwork.freedesktop.org/patch/508334/#comment_917689
Was the response given that time not correct then?
Not fully correct. I did not notice, that non-rpm-enabled mdp5 node
doesn't force mdss to be in the on state. (Which is strange. Maybe we
are leaking pm_runtime_enable() for it somewhere.)
hmmm, this is a safer change as we are atleast not bypassing pm runtime.
From that perspective,
Reviewed-by: Abhinav Kumar
https://patchwork.freedesktop.org/patch/508334/#comment_917713
Fixes: c6122688f265 ("drm/msm/mdp5: stop overriding drvdata")
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
index b46f983f2b46..29ae5c9613f3 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
@@ -519,10 +519,9 @@ static void read_mdp_hw_revision(struct mdp5_kms
*mdp5_kms,
struct device *dev = _kms->pdev->dev;
u32 version;
- /* Manually enable the MDP5, as pm runtime isn't usable yet. */
- mdp5_enable(mdp5_kms);
+ pm_runtime_get_sync(dev);
version = mdp5_read(mdp5_kms, REG_MDP5_HW_VERSION);
- mdp5_disable(mdp5_kms);
+ pm_runtime_put_sync(dev);
*major = FIELD(version, MDP5_HW_VERSION_MAJOR);
*minor = FIELD(version, MDP5_HW_VERSION_MINOR);
@@ -839,6 +838,12 @@ static int mdp5_init(struct platform_device
*pdev, struct drm_device *dev)
*/
clk_set_rate(mdp5_kms->core_clk, 2);
+ /* set uninit-ed kms */
+ priv->kms = _kms->base.base;
+
+ pm_runtime_enable(>dev);
+ mdp5_kms->rpm_enabled = true;
+
read_mdp_hw_revision(mdp5_kms, , );
mdp5_kms->cfg = mdp5_cfg_init(mdp5_kms, major, minor);
@@ -887,12 +892,6 @@ static int mdp5_init(struct platform_device
*pdev, struct drm_device *dev)
if (ret)
goto fail;
- /* set uninit-ed kms */
- priv->kms = _kms->base.base;
-
- pm_runtime_enable(>dev);
- mdp5_kms->rpm_enabled = true;
-
return 0;
fail:
if (mdp5_kms)
Re: [Freedreno] [PATCH] drm/msm/mdp5: fix reading hw revision on db410c platform
On 25/11/2022 07:45, Abhinav Kumar wrote:
On 11/24/2022 4:02 PM, Dmitry Baryshkov wrote:
Since the commit commit c6122688f265 ("drm/msm/mdp5: stop overriding
drvdata") reading the MDP5 hw revision on db410c will crash the board
as the MDSS_GDSC is not enabled. Revert a part of the offending commit
(moving rpm enablement) and set priv->kms earlier. This make it possible
to use pm_runtime_get_sync() during read_mdp_hw_revision(), which will
power up both the MDP5 and MDSS devices.
This is the exact concern I had even when c6122688f265 was pushed.
https://patchwork.freedesktop.org/patch/508334/#comment_917689
Was the response given that time not correct then?
Not fully correct. I did not notice, that non-rpm-enabled mdp5 node
doesn't force mdss to be in the on state. (Which is strange. Maybe we
are leaking pm_runtime_enable() for it somewhere.)
https://patchwork.freedesktop.org/patch/508334/#comment_917713
Fixes: c6122688f265 ("drm/msm/mdp5: stop overriding drvdata")
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
index b46f983f2b46..29ae5c9613f3 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
@@ -519,10 +519,9 @@ static void read_mdp_hw_revision(struct mdp5_kms
*mdp5_kms,
struct device *dev = _kms->pdev->dev;
u32 version;
- /* Manually enable the MDP5, as pm runtime isn't usable yet. */
- mdp5_enable(mdp5_kms);
+ pm_runtime_get_sync(dev);
version = mdp5_read(mdp5_kms, REG_MDP5_HW_VERSION);
- mdp5_disable(mdp5_kms);
+ pm_runtime_put_sync(dev);
*major = FIELD(version, MDP5_HW_VERSION_MAJOR);
*minor = FIELD(version, MDP5_HW_VERSION_MINOR);
@@ -839,6 +838,12 @@ static int mdp5_init(struct platform_device
*pdev, struct drm_device *dev)
*/
clk_set_rate(mdp5_kms->core_clk, 2);
+ /* set uninit-ed kms */
+ priv->kms = _kms->base.base;
+
+ pm_runtime_enable(>dev);
+ mdp5_kms->rpm_enabled = true;
+
read_mdp_hw_revision(mdp5_kms, , );
mdp5_kms->cfg = mdp5_cfg_init(mdp5_kms, major, minor);
@@ -887,12 +892,6 @@ static int mdp5_init(struct platform_device
*pdev, struct drm_device *dev)
if (ret)
goto fail;
- /* set uninit-ed kms */
- priv->kms = _kms->base.base;
-
- pm_runtime_enable(>dev);
- mdp5_kms->rpm_enabled = true;
-
return 0;
fail:
if (mdp5_kms)
--
With best wishes
Dmitry
Re: [Freedreno] [PATCH v2 1/2] dt-bindings: display/msm: add support for SM6115
On 24/11/2022 01:16, Adam Skladowski wrote: > Add DPU and MDSS schemas to describe MDSS and DPU blocks on the Qualcomm > SM6115 platform. > Configuration for DSI/PHY is shared with QCM2290 so compatibles are reused. > Lack of dsi phy supply in example is intended > due to fact on qcm2290, sm6115 and sm6125 > this phy is supplied via power domain, not regulator. > > Signed-off-by: Adam Skladowski > --- Reviewed-by: Krzysztof Kozlowski Best regards, Krzysztof
