[Freedreno] [PATCH 7/8] arm64: dts: qcom: sm8350: Add mdss_ prefix to DSIn out labels
Add the mdss_ prefix to DSIn labels, so that the hardware blocks can
be organized near each other while retaining the alphabetical order
in device DTs when referencing by label.
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 2 +-
arch/arm64/boot/dts/qcom/sm8350.dtsi| 10 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
index 5a4c4ea4d122..df841230d1b7 100644
--- a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
@@ -309,7 +309,7 @@ port@0 {
reg = <0>;
lt9611_a: endpoint {
- remote-endpoint = <_out>;
+ remote-endpoint = <_dsi0_out>;
};
};
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi
b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index b09eb8880376..0f9427f3319f 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -2952,7 +2952,7 @@ ports {
port@0 {
reg = <0>;
dpu_intf1_out: endpoint {
- remote-endpoint =
<_in>;
+ remote-endpoint =
<_dsi0_in>;
};
};
};
@@ -3024,14 +3024,14 @@ ports {
port@0 {
reg = <0>;
- dsi0_in: endpoint {
+ mdss_dsi0_in: endpoint {
remote-endpoint =
<_intf1_out>;
};
};
port@1 {
reg = <1>;
- dsi0_out: endpoint {
+ mdss_dsi0_out: endpoint {
};
};
};
@@ -3122,13 +3122,13 @@ ports {
port@0 {
reg = <0>;
- dsi1_in: endpoint {
+ mdss_dsi1_in: endpoint {
};
};
port@1 {
reg = <1>;
- dsi1_out: endpoint {
+ mdss_dsi1_out: endpoint {
};
};
};
--
2.39.1
[Freedreno] [PATCH 8/8] arm64: dts: qcom: sm8350: Hook up DSI1 to MDP
Somehow DSI1 was not hooked up to MDP resulting in it not working.
Fix it.
Fixes: d4a4410583ed ("arm64: dts: qcom: sm8350: Add display system nodes")
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi
b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 0f9427f3319f..2531a9a80194 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -2955,6 +2955,13 @@ dpu_intf1_out: endpoint {
remote-endpoint =
<_dsi0_in>;
};
};
+
+ port@1 {
+ reg = <1>;
+ dpu_intf2_out: endpoint {
+ remote-endpoint =
<_dsi1_in>;
+ };
+ };
};
};
@@ -3123,6 +3130,7 @@ ports {
port@0 {
reg = <0>;
mdss_dsi1_in: endpoint {
+ remote-endpoint =
<_intf2_out>;
};
};
--
2.39.1
[Freedreno] [PATCH 6/8] arm64: dts: qcom: sm8350: Fix DSI PLL size
As downstream indicates, DSI PLL is actually 0x27c and not 0x260-
wide. Fix that to reserve the correct registers.
Fixes: d4a4410583ed ("arm64: dts: qcom: sm8350: Add display system nodes")
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi
b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 22bf6239c757..b09eb8880376 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -3041,7 +3041,7 @@ mdss_dsi0_phy: phy@ae94400 {
compatible = "qcom,sm8350-dsi-phy-5nm";
reg = <0 0x0ae94400 0 0x200>,
<0 0x0ae94600 0 0x280>,
- <0 0x0ae94900 0 0x260>;
+ <0 0x0ae94900 0 0x27c>;
reg-names = "dsi_phy",
"dsi_phy_lane",
"dsi_pll";
@@ -3138,7 +3138,7 @@ mdss_dsi1_phy: phy@ae96400 {
compatible = "qcom,sm8350-dsi-phy-5nm";
reg = <0 0x0ae96400 0 0x200>,
<0 0x0ae96600 0 0x280>,
- <0 0x0ae96900 0 0x260>;
+ <0 0x0ae96900 0 0x27c>;
reg-names = "dsi_phy",
"dsi_phy_lane",
"dsi_pll";
--
2.39.1
[Freedreno] [PATCH 4/8] arm64: dts: qcom: sm8350: Feed DSI1 PHY clocks to DISPCC
This was omitted but is necessary for DSI1 to function. Fix it.
Fixes: d4a4410583ed ("arm64: dts: qcom: sm8350: Add display system nodes")
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi
b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index ed0106829cb9..c964d939289b 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -3159,7 +3159,7 @@ dispcc: clock-controller@af0 {
reg = <0 0x0af0 0 0x1>;
clocks = < RPMH_CXO_CLK>,
<_dsi0_phy 0>, <_dsi0_phy 1>,
-<0>, <0>,
+<_dsi1_phy 0>, <_dsi1_phy 1>,
<0>,
<0>;
clock-names = "bi_tcxo",
--
2.39.1
[Freedreno] [PATCH 5/8] arm64: dts: qcom: sm8350: Fix DSI PHY compatibles
The compatibles were wrong, resulting in the driver not probing. Fix
that.
Fixes: d4a4410583ed ("arm64: dts: qcom: sm8350: Add display system nodes")
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi
b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index c964d939289b..22bf6239c757 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -3038,7 +3038,7 @@ dsi0_out: endpoint {
};
mdss_dsi0_phy: phy@ae94400 {
- compatible = "qcom,dsi-phy-5nm-8350";
+ compatible = "qcom,sm8350-dsi-phy-5nm";
reg = <0 0x0ae94400 0 0x200>,
<0 0x0ae94600 0 0x280>,
<0 0x0ae94900 0 0x260>;
@@ -3135,7 +3135,7 @@ dsi1_out: endpoint {
};
mdss_dsi1_phy: phy@ae96400 {
- compatible = "qcom,dsi-phy-5nm-8350";
+ compatible = "qcom,sm8350-dsi-phy-5nm";
reg = <0 0x0ae96400 0 0x200>,
<0 0x0ae96600 0 0x280>,
<0 0x0ae96900 0 0x260>;
--
2.39.1
[Freedreno] [PATCH 3/8] arm64: dts: qcom: sm8350: Fix DSI1 interrupt
The interrupt was wrong, likely copypasted from DSI0. Fix it.
Fixes: d4a4410583ed ("arm64: dts: qcom: sm8350: Add display system nodes")
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi
b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index c0ba67747c24..ed0106829cb9 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -3062,7 +3062,7 @@ mdss_dsi1: dsi@ae96000 {
reg-names = "dsi_ctrl";
interrupt-parent = <>;
- interrupts = <4>;
+ interrupts = <5>;
clocks = < DISP_CC_MDSS_BYTE1_CLK>,
< DISP_CC_MDSS_BYTE1_INTF_CLK>,
--
2.39.1
[Freedreno] [PATCH 2/8] arm64: dts: qcom: sm8350: Add missing #address/size-cells to DSIn
Panels/DRM bridges definitely don't need 64bits of address space and
are usually not 32-bit wide. Set address-cells to 1 and size-cells to
0.
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi
b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index dc84dbed81bb..c0ba67747c24 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -2989,6 +2989,9 @@ mdss_dsi0: dsi@ae94000 {
phys = <_dsi0_phy>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
dsi0_opp_table: opp-table {
@@ -3084,6 +3087,9 @@ mdss_dsi1: dsi@ae96000 {
phys = <_dsi1_phy>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
status = "disabled";
dsi1_opp_table: opp-table {
--
2.39.1
[Freedreno] [PATCH 1/8] drm/msm/dsi: Allow 2 CTRLs on v2.5.0
v2.5.0 support was originally added for SC7280, but this hw is also
present on SM8350, which has one more DSI host. Bump up the dsi count
and fill in the register of the secondary host to allow it to probe.
This should not have any adverse effects on SC7280, as the secondary
CTRL will only be touched if it's defined, anyway.
Fixes: 65c391b31994 ("drm/msm/dsi: Add DSI support for SC7280")
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
index 33884ebd2f86..6d21f0b33411 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
@@ -223,8 +223,8 @@ static const struct msm_dsi_config sc7280_dsi_cfg = {
.num_regulators = ARRAY_SIZE(sc7280_dsi_regulators),
.bus_clk_names = dsi_sc7280_bus_clk_names,
.num_bus_clks = ARRAY_SIZE(dsi_sc7280_bus_clk_names),
- .io_start = { 0xae94000 },
- .num_dsi = 1,
+ .io_start = { 0xae94000, 0xae96000 },
+ .num_dsi = 2,
};
static const char * const dsi_qcm2290_bus_clk_names[] = {
--
2.39.1
Re: [Freedreno] [PATCH v6 01/10] drm/hdcp: Add drm_hdcp_atomic_check()
On 20 January 2023 18:32:47 GMT+03:00, Sean Paul wrote:
>On Thu, Jan 19, 2023 at 11:37:52AM +0100, Krzysztof Kozlowski wrote:
>> On 18/01/2023 20:30, Mark Yacoub wrote:
>> > From: Sean Paul
>> >
>> > This patch moves the hdcp atomic check from i915 to drm_hdcp so other
>> > drivers can use it. No functional changes, just cleaned up some of the
>> > code when moving it over.
>> >
>> > Acked-by: Jani Nikula
>> > Acked-by: Jani Nikula
>> > Reviewed-by: Rodrigo Vivi
>> > Reviewed-by: Abhinav Kumar
>> > Signed-off-by: Sean Paul
>> > Signed-off-by: Mark Yacoub
>> > Link:
>> > https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-2-s...@poorly.run
>> > #v1
>> > Link:
>> > https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-2-s...@poorly.run
>> > #v2
>> > Link:
>> > https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-2-s...@poorly.run
>> > #v3
>> > Link:
>> > https://patchwork.freedesktop.org/patch/msgid/20211105030434.2828845-2-s...@poorly.run
>> > #v4
>> > Link:
>> > https://patchwork.freedesktop.org/patch/msgid/20220411204741.1074308-2-s...@poorly.run
>> > #v5
>>
>> It seems all your previous versions were sent not to correct people and
>> lists. Therefore we see it for the first time even though it is v6!
>
>Hi Krzysztof,
>Thanks for your review comments.
>
>Here are the addresses the last version was sent to, who is missing?
>
>To: dri-de...@lists.freedesktop.org,
>jani.nik...@intel.com,
>intel-...@lists.freedesktop.org,
>freedreno@lists.freedesktop.org,
>rodrigo.v...@intel.com
>Cc: bjorn.anders...@linaro.org,
>swb...@chromium.org,
>abhin...@codeaurora.org,
>markyac...@chromium.org,
>Sean Paul ,
>Maarten Lankhorst ,
>Maxime Ripard ,
>Thomas Zimmermann ,
>David Airlie ,
>Daniel Vetter ,
>Jani Nikula ,
>Joonas Lahtinen ,
>Tvrtko Ursulin
>
>> It's
>> not the first such weird CC list in chromium, so maybe your
>> organisational process could be improved? Not only for you but for
>> colleagues as well, so you all start using get_maintainers.pl on newest
>> kernel (not something ancient)?
>
>I can't really speak for others, but I use MAINTAINERS from drm-tip. The
>previous patch sets were sent before 24df12013853 ("MAINTAINERS: Add
>Dmitry as MSM DRM driver co-maintainer"), which might explain why you think
>there are absences?
Current iteration of the patchset got at least three addresses wrong. They have
been changed for various reasons. Thus I also can suppose that the list is
incomplete and/or incorrect.
>
>Thanks again,
>
>Sean
>
>>
>> Best regards,
>> Krzysztof
>>
>
--
With best wishes
Dmitry
[Freedreno] [PATCH v2 2/5] drm/msm/a6xx: Add support for A650 speed binning
Add support for matching QFPROM fuse values to get the correct speed bin
on A650 (SM8250) GPUs.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 0ee8cb3e490c..c5f5d0bb3fdc 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1894,6 +1894,20 @@ static u32 a640_get_speed_bin(u32 fuse)
return UINT_MAX;
}
+static u32 a650_get_speed_bin(u32 fuse)
+{
+ if (fuse == 0)
+ return 0;
+ else if (fuse == 1)
+ return 1;
+ else if (fuse == 2)
+ return 2;
+ else if (fuse == 3)
+ return 3;
+
+ return UINT_MAX;
+}
+
static u32 adreno_7c3_get_speed_bin(u32 fuse)
{
if (fuse == 0)
@@ -1922,6 +1936,9 @@ static u32 fuse_to_supp_hw(struct device *dev, struct
adreno_rev rev, u32 fuse)
if (adreno_cmp_rev(ADRENO_REV(6, 4, 0, ANY_ID), rev))
val = a640_get_speed_bin(fuse);
+ if (adreno_cmp_rev(ADRENO_REV(6, 5, 0, ANY_ID), rev))
+ val = a650_get_speed_bin(fuse);
+
if (val == UINT_MAX) {
DRM_DEV_ERROR(dev,
"missing support for speed-bin: %u. Some OPPs may not
be supported by hardware\n",
--
2.39.1
[Freedreno] [PATCH v2 1/5] drm/msm/a6xx: Add support for A640 speed binning
Add support for matching QFPROM fuse values to get the correct speed bin
on A640 (SM8150) GPUs.
Reviewed-by: Akhil P Oommen
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index aae60cbd9164..0ee8cb3e490c 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1884,6 +1884,16 @@ static u32 a619_get_speed_bin(u32 fuse)
return UINT_MAX;
}
+static u32 a640_get_speed_bin(u32 fuse)
+{
+ if (fuse == 0)
+ return 0;
+ else if (fuse == 1)
+ return 1;
+
+ return UINT_MAX;
+}
+
static u32 adreno_7c3_get_speed_bin(u32 fuse)
{
if (fuse == 0)
@@ -1909,6 +1919,9 @@ static u32 fuse_to_supp_hw(struct device *dev, struct
adreno_rev rev, u32 fuse)
if (adreno_cmp_rev(ADRENO_REV(6, 3, 5, ANY_ID), rev))
val = adreno_7c3_get_speed_bin(fuse);
+ if (adreno_cmp_rev(ADRENO_REV(6, 4, 0, ANY_ID), rev))
+ val = a640_get_speed_bin(fuse);
+
if (val == UINT_MAX) {
DRM_DEV_ERROR(dev,
"missing support for speed-bin: %u. Some OPPs may not
be supported by hardware\n",
--
2.39.1
Re: [Freedreno] [PATCH v2] drm/probe_helper: sort out poll_running vs poll_enabled
Hi Dmitry,
Thank you for the patch.
On Wed, Jan 18, 2023 at 01:39:05AM +0200, Dmitry Baryshkov wrote:
> There are two flags attemting to guard connector polling:
> poll_enabled and poll_running. While poll_enabled semantics is clearly
> defined and fully adhered (mark that drm_kms_helper_poll_init() was
> called and not finalized by the _fini() call), the poll_running flag
> doesn't have such clearliness.
>
> This flag is used only in drm_helper_probe_single_connector_modes() to
> guard calling of drm_kms_helper_poll_enable, it doesn't guard the
> drm_kms_helper_poll_fini(), etc. Change it to only be set if the polling
> is actually running. Tie HPD enablement to this flag.
>
> This fixes the following warning reported after merging the HPD series:
>
> Hot plug detection already enabled
> WARNING: CPU: 2 PID: 9 at drivers/gpu/drm/drm_bridge.c:1257
> drm_bridge_hpd_enable+0x94/0x9c [drm]
> Modules linked in: videobuf2_memops snd_soc_simple_card
> snd_soc_simple_card_utils fsl_imx8_ddr_perf videobuf2_common
> snd_soc_imx_spdif adv7511 etnaviv imx8m_ddrc imx_dcss mc cec nwl_dsi gov
> CPU: 2 PID: 9 Comm: kworker/u8:0 Not tainted 6.2.0-rc2-15208-g25b283acd578 #6
> Hardware name: NXP i.MX8MQ EVK (DT)
> Workqueue: events_unbound deferred_probe_work_func
> pstate: 6005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
> pc : drm_bridge_hpd_enable+0x94/0x9c [drm]
> lr : drm_bridge_hpd_enable+0x94/0x9c [drm]
> sp : 89ef3740
> x29: 89ef3740 x28: 09331f00 x27: 1000
> x26: 0020 x25: 81148ed8 x24: 0a8fe000
> x23: fffd x22: 05086348 x21: 81133ee0
> x20: 0550d800 x19: 05086288 x18: 0006
> x17: x16: 896ef008 x15: 972891004260
> x14: 2a1403e19400 x13: 972891004260 x12: 2a1403e19400
> x11: 7100385f29400801 x10: 0aa0 x9 : 88112744
> x8 : 00250b00 x7 : 0003 x6 : 0011
> x5 : x4 : bd986a48 x3 : 0001
> x2 : x1 : x0 : 0025
> Call trace:
> drm_bridge_hpd_enable+0x94/0x9c [drm]
> drm_bridge_connector_enable_hpd+0x2c/0x3c [drm_kms_helper]
> drm_kms_helper_poll_enable+0x94/0x10c [drm_kms_helper]
> drm_helper_probe_single_connector_modes+0x1a8/0x510 [drm_kms_helper]
> drm_client_modeset_probe+0x204/0x1190 [drm]
> __drm_fb_helper_initial_config_and_unlock+0x5c/0x4a4 [drm_kms_helper]
> drm_fb_helper_initial_config+0x54/0x6c [drm_kms_helper]
> drm_fbdev_client_hotplug+0xd0/0x140 [drm_kms_helper]
> drm_fbdev_generic_setup+0x90/0x154 [drm_kms_helper]
> dcss_kms_attach+0x1c8/0x254 [imx_dcss]
> dcss_drv_platform_probe+0x90/0xfc [imx_dcss]
> platform_probe+0x70/0xcc
> really_probe+0xc4/0x2e0
> __driver_probe_device+0x80/0xf0
> driver_probe_device+0xe0/0x164
> __device_attach_driver+0xc0/0x13c
> bus_for_each_drv+0x84/0xe0
> __device_attach+0xa4/0x1a0
> device_initial_probe+0x1c/0x30
> bus_probe_device+0xa4/0xb0
> deferred_probe_work_func+0x90/0xd0
> process_one_work+0x200/0x474
> worker_thread+0x74/0x43c
> kthread+0xfc/0x110
> ret_from_fork+0x10/0x20
> ---[ end trace ]---
>
> Reported-by: Laurentiu Palcu
> Fixes: c8268795c9a9 ("drm/probe-helper: enable and disable HPD on connectors")
> Tested-by: Marek Szyprowski
> Tested-by: Chen-Yu Tsai
> Signed-off-by: Dmitry Baryshkov
This fixes the issue on my Renesas boards.
Tested-by: Laurent Pinchart
Please see below for a few comments.
> ---
>
> Changes since v1:
> - Fixed drm_kms_helper_enable_hpd() to call enable_hpd() instead of
> disable_hpd().
>
> ---
> drivers/gpu/drm/drm_probe_helper.c | 110 +
> 1 file changed, 63 insertions(+), 47 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_probe_helper.c
> b/drivers/gpu/drm/drm_probe_helper.c
> index 7973f2589ced..04754bb7b131 100644
> --- a/drivers/gpu/drm/drm_probe_helper.c
> +++ b/drivers/gpu/drm/drm_probe_helper.c
> @@ -222,6 +222,45 @@ drm_connector_mode_valid(struct drm_connector *connector,
> return ret;
> }
>
> +static void drm_kms_helper_disable_hpd(struct drm_device *dev)
> +{
> + struct drm_connector *connector;
> + struct drm_connector_list_iter conn_iter;
> +
> + drm_connector_list_iter_begin(dev, _iter);
> + drm_for_each_connector_iter(connector, _iter) {
> + const struct drm_connector_helper_funcs *funcs =
> + connector->helper_private;
> +
> + if (funcs && funcs->disable_hpd)
> + funcs->disable_hpd(connector);
> + }
> + drm_connector_list_iter_end(_iter);
> +}
> +
> +static bool drm_kms_helper_enable_hpd(struct drm_device *dev)
> +{
> + bool poll = false;
> + struct drm_connector *connector;
> + struct drm_connector_list_iter conn_iter;
> +
> + drm_connector_list_iter_begin(dev, _iter);
> + drm_for_each_connector_iter(connector, _iter) {
Re: [Freedreno] [PATCH v6 09/10] arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller
On Thu, Jan 19, 2023 at 11:35:32AM +0100, Krzysztof Kozlowski wrote: > On 18/01/2023 20:30, Mark Yacoub wrote: > > From: Sean Paul > > > > This patch adds the register ranges required for HDCP key injection and > > Do not use "This commit/patch". > https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95 > > This applies to all your patches. Fix it everywhere. My goodness, this is peak bikeshedding. Surely we have better things to do with our time? > > > HDCP TrustZone interaction as described in the dt-bindings for the > > sc7180 dp controller. Now that these are supported, change the > > compatible string to "dp-hdcp". > > What does it mean? Where do you do it? > > > > > Signed-off-by: Sean Paul > > Signed-off-by: Mark Yacoub > > Link: > > https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-s...@poorly.run > > #v1 > > Link: > > https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-14-s...@poorly.run > > #v2 > > Link: > > https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-14-s...@poorly.run > > #v3 > > Link: > > https://patchwork.freedesktop.org/patch/msgid/20211105030434.2828845-14-s...@poorly.run > > #v4 > > Link: > > https://patchwork.freedesktop.org/patch/msgid/20220411204741.1074308-10-s...@poorly.run > > #v5 > > Drop the links. Why? I've always done this, it seems helpful to me? > > > > > Changes in v3: > > -Split off into a new patch containing just the dts change (Stephen) > > -Add hdcp compatible string (Stephen) > > Changes in v4: > > -Rebase on Bjorn's multi-dp patchset > > Changes in v5: > > -Put the tz register offsets in trogdor dtsi (Rob C) > > Changes in v6: > > -Rebased: Removed modifications in sc7180.dtsi as it's already upstream > > > > --- > > Changelog after --- . It's common practice in drm subsystem to include this in the commit message. Sean > > > arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 8 > > 1 file changed, 8 insertions(+) > > > > Best regards, > Krzysztof > -- Sean Paul, Software Engineer, Google / Chromium OS
Re: [Freedreno] [PATCH v3 3/3] drm: Convert users of drm_of_component_match_add to component_match_add_of
On Thu, Jan 19, 2023 at 02:10:39PM -0500, Sean Anderson wrote:
> Every user of this function either uses component_compare_of or
> something equivalent. Most of them immediately put the device node as
> well. Convert these users to component_match_add_of and remove
> drm_of_component_match_add.
>
> Signed-off-by: Sean Anderson
> Acked-by: Jyri Sarha
> Tested-by: Jyri Sarha
> ---
>
> (no changes since v1)
>
> .../gpu/drm/arm/display/komeda/komeda_drv.c | 6 ++--
> drivers/gpu/drm/arm/hdlcd_drv.c | 9 +-
> drivers/gpu/drm/arm/malidp_drv.c | 11 +--
> drivers/gpu/drm/armada/armada_drv.c | 10 ---
> drivers/gpu/drm/drm_of.c | 29 +++
> drivers/gpu/drm/etnaviv/etnaviv_drv.c | 4 +--
> .../gpu/drm/hisilicon/kirin/kirin_drm_drv.c | 3 +-
> drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 3 +-
> drivers/gpu/drm/mediatek/mtk_drm_drv.c| 4 +--
> drivers/gpu/drm/msm/msm_drv.c | 14 -
> drivers/gpu/drm/sti/sti_drv.c | 3 +-
> drivers/gpu/drm/sun4i/sun4i_drv.c | 3 +-
> drivers/gpu/drm/tilcdc/tilcdc_external.c | 10 ++-
> include/drm/drm_of.h | 12
> 14 files changed, 33 insertions(+), 88 deletions(-)
>
> diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_drv.c
> b/drivers/gpu/drm/arm/display/komeda/komeda_drv.c
> index 3f4e719eebd8..e3bfc72c378f 100644
> --- a/drivers/gpu/drm/arm/display/komeda/komeda_drv.c
> +++ b/drivers/gpu/drm/arm/display/komeda/komeda_drv.c
> @@ -103,10 +103,8 @@ static void komeda_add_slave(struct device *master,
> struct device_node *remote;
>
> remote = of_graph_get_remote_node(np, port, endpoint);
> - if (remote) {
> - drm_of_component_match_add(master, match, component_compare_of,
> remote);
> - of_node_put(remote);
> - }
> + if (remote)
> + component_match_add_of(master, match, remote);
> }
>
> static int komeda_platform_probe(struct platform_device *pdev)
> diff --git a/drivers/gpu/drm/arm/hdlcd_drv.c b/drivers/gpu/drm/arm/hdlcd_drv.c
> index e3507dd6f82a..5f760bb66af4 100644
> --- a/drivers/gpu/drm/arm/hdlcd_drv.c
> +++ b/drivers/gpu/drm/arm/hdlcd_drv.c
> @@ -347,11 +347,6 @@ static const struct component_master_ops
> hdlcd_master_ops = {
> .unbind = hdlcd_drm_unbind,
> };
>
> -static int compare_dev(struct device *dev, void *data)
> -{
> - return dev->of_node == data;
> -}
> -
> static int hdlcd_probe(struct platform_device *pdev)
> {
> struct device_node *port;
> @@ -362,9 +357,7 @@ static int hdlcd_probe(struct platform_device *pdev)
> if (!port)
> return -ENODEV;
>
> - drm_of_component_match_add(>dev, , compare_dev, port);
> - of_node_put(port);
> -
> + component_match_add_of(>dev, , port);
> return component_master_add_with_match(>dev, _master_ops,
> match);
> }
> diff --git a/drivers/gpu/drm/arm/malidp_drv.c
> b/drivers/gpu/drm/arm/malidp_drv.c
> index 589c1c66a6dc..3a49c29ba5b8 100644
> --- a/drivers/gpu/drm/arm/malidp_drv.c
> +++ b/drivers/gpu/drm/arm/malidp_drv.c
> @@ -909,13 +909,6 @@ static const struct component_master_ops
> malidp_master_ops = {
> .unbind = malidp_unbind,
> };
>
> -static int malidp_compare_dev(struct device *dev, void *data)
> -{
> - struct device_node *np = data;
> -
> - return dev->of_node == np;
> -}
> -
> static int malidp_platform_probe(struct platform_device *pdev)
> {
> struct device_node *port;
> @@ -929,9 +922,7 @@ static int malidp_platform_probe(struct platform_device
> *pdev)
> if (!port)
> return -ENODEV;
>
> - drm_of_component_match_add(>dev, , malidp_compare_dev,
> -port);
> - of_node_put(port);
> + component_match_add_of(>dev, , port);
> return component_master_add_with_match(>dev, _master_ops,
> match);
> }
For komeda, mali_dp and hdlcd: Acked-by: Liviu Dudau
Best regards,
Liviu
> diff --git a/drivers/gpu/drm/armada/armada_drv.c
> b/drivers/gpu/drm/armada/armada_drv.c
> index 0643887800b4..c0211ad7a45d 100644
> --- a/drivers/gpu/drm/armada/armada_drv.c
> +++ b/drivers/gpu/drm/armada/armada_drv.c
> @@ -184,10 +184,12 @@ static void armada_add_endpoints(struct device *dev,
>
> for_each_endpoint_of_node(dev_node, ep) {
> remote = of_graph_get_remote_port_parent(ep);
> - if (remote && of_device_is_available(remote))
> - drm_of_component_match_add(dev, match,
> component_compare_of,
> -remote);
> - of_node_put(remote);
> + if (remote) {
> + if (of_device_is_available(remote))
> + component_match_add_of(dev, match, remote);
> +
Re: [Freedreno] [PATCH v6 01/10] drm/hdcp: Add drm_hdcp_atomic_check()
On Thu, Jan 19, 2023 at 11:37:52AM +0100, Krzysztof Kozlowski wrote:
> On 18/01/2023 20:30, Mark Yacoub wrote:
> > From: Sean Paul
> >
> > This patch moves the hdcp atomic check from i915 to drm_hdcp so other
> > drivers can use it. No functional changes, just cleaned up some of the
> > code when moving it over.
> >
> > Acked-by: Jani Nikula
> > Acked-by: Jani Nikula
> > Reviewed-by: Rodrigo Vivi
> > Reviewed-by: Abhinav Kumar
> > Signed-off-by: Sean Paul
> > Signed-off-by: Mark Yacoub
> > Link:
> > https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-2-s...@poorly.run
> > #v1
> > Link:
> > https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-2-s...@poorly.run
> > #v2
> > Link:
> > https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-2-s...@poorly.run
> > #v3
> > Link:
> > https://patchwork.freedesktop.org/patch/msgid/20211105030434.2828845-2-s...@poorly.run
> > #v4
> > Link:
> > https://patchwork.freedesktop.org/patch/msgid/20220411204741.1074308-2-s...@poorly.run
> > #v5
>
> It seems all your previous versions were sent not to correct people and
> lists. Therefore we see it for the first time even though it is v6!
Hi Krzysztof,
Thanks for your review comments.
Here are the addresses the last version was sent to, who is missing?
To: dri-de...@lists.freedesktop.org,
jani.nik...@intel.com,
intel-...@lists.freedesktop.org,
freedreno@lists.freedesktop.org,
rodrigo.v...@intel.com
Cc: bjorn.anders...@linaro.org,
swb...@chromium.org,
abhin...@codeaurora.org,
markyac...@chromium.org,
Sean Paul ,
Maarten Lankhorst ,
Maxime Ripard ,
Thomas Zimmermann ,
David Airlie ,
Daniel Vetter ,
Jani Nikula ,
Joonas Lahtinen ,
Tvrtko Ursulin
> It's
> not the first such weird CC list in chromium, so maybe your
> organisational process could be improved? Not only for you but for
> colleagues as well, so you all start using get_maintainers.pl on newest
> kernel (not something ancient)?
I can't really speak for others, but I use MAINTAINERS from drm-tip. The
previous patch sets were sent before 24df12013853 ("MAINTAINERS: Add
Dmitry as MSM DRM driver co-maintainer"), which might explain why you think
there are absences?
Thanks again,
Sean
>
> Best regards,
> Krzysztof
>
--
Sean Paul, Software Engineer, Google / Chromium OS
Re: [Freedreno] [PATCH v3 3/3] drm: Convert users of drm_of_component_match_add to component_match_add_of
Il 19/01/23 20:10, Sean Anderson ha scritto: Every user of this function either uses component_compare_of or something equivalent. Most of them immediately put the device node as well. Convert these users to component_match_add_of and remove drm_of_component_match_add. Signed-off-by: Sean Anderson Acked-by: Jyri Sarha Tested-by: Jyri Sarha For MediaTek mtk_drm_drv: Tested-by: AngeloGioacchino Del Regno
