Re: [PATCH v4 1/2] drm/msm/dp: Add support for determining the eDP/DP mode from DT
On Sun, 24 Mar 2024 at 20:57, Abel Vesa wrote: > > Instead of relying on different compatibles for eDP and DP, lookup > the panel node in devicetree to figure out the connector type and > then pass on that information to the PHY. External DP doesn't have > a panel described in DT, therefore, assume it's eDP if panel node > is present. > > Signed-off-by: Abel Vesa > --- > drivers/gpu/drm/msm/dp/dp_display.c | 29 - > 1 file changed, 28 insertions(+), 1 deletion(-) Reviewed-by: Dmitry Baryshkov -- With best wishes Dmitry
[PATCH v4 1/2] drm/msm/dp: Add support for determining the eDP/DP mode from DT
Instead of relying on different compatibles for eDP and DP, lookup
the panel node in devicetree to figure out the connector type and
then pass on that information to the PHY. External DP doesn't have
a panel described in DT, therefore, assume it's eDP if panel node
is present.
Signed-off-by: Abel Vesa
---
drivers/gpu/drm/msm/dp/dp_display.c | 29 -
1 file changed, 28 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c
b/drivers/gpu/drm/msm/dp/dp_display.c
index c4cb82af5c2f..9169a739cc54 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -726,6 +726,14 @@ static int dp_init_sub_modules(struct dp_display_private
*dp)
if (IS_ERR(phy))
return PTR_ERR(phy);
+ rc = phy_set_mode_ext(phy, PHY_MODE_DP,
+ dp->dp_display.is_edp ? PHY_SUBMODE_EDP :
PHY_SUBMODE_DP);
+ if (rc) {
+ DRM_ERROR("failed to set phy submode, rc = %d\n", rc);
+ dp->catalog = NULL;
+ goto error;
+ }
+
dp->catalog = dp_catalog_get(dev);
if (IS_ERR(dp->catalog)) {
rc = PTR_ERR(dp->catalog);
@@ -1241,6 +1249,25 @@ static int dp_auxbus_done_probe(struct drm_dp_aux *aux)
return dp_display_probe_tail(aux->dev);
}
+static int dp_display_get_connector_type(struct platform_device *pdev,
+const struct msm_dp_desc *desc)
+{
+ struct device_node *node = pdev->dev.of_node;
+ struct device_node *aux_bus = of_get_child_by_name(node, "aux-bus");
+ struct device_node *panel = of_get_child_by_name(aux_bus, "panel");
+ int connector_type;
+
+ if (panel)
+ connector_type = DRM_MODE_CONNECTOR_eDP;
+ else
+ connector_type = DRM_MODE_SUBCONNECTOR_DisplayPort;
+
+ of_node_put(panel);
+ of_node_put(aux_bus);
+
+ return connector_type;
+}
+
static int dp_display_probe(struct platform_device *pdev)
{
int rc = 0;
@@ -1263,7 +1290,7 @@ static int dp_display_probe(struct platform_device *pdev)
dp->dp_display.pdev = pdev;
dp->name = "drm_dp";
dp->id = desc->id;
- dp->dp_display.connector_type = desc->connector_type;
+ dp->dp_display.connector_type = dp_display_get_connector_type(pdev,
desc);
dp->wide_bus_supported = desc->wide_bus_supported;
dp->dp_display.is_edp =
(dp->dp_display.connector_type == DRM_MODE_CONNECTOR_eDP);
--
2.34.1
[PATCH v4 2/2] drm/msm/dp: Add support for the X1E80100
Add the X1E80100 DP descs and compatible. This platform will be using
a single compatible for both eDP and DP mode. The actual mode will
be set based on the presence of the panel node in DT.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Abel Vesa
---
drivers/gpu/drm/msm/dp/dp_display.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c
b/drivers/gpu/drm/msm/dp/dp_display.c
index 9169a739cc54..521cba76d2a0 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -171,6 +171,14 @@ static const struct msm_dp_desc sm8650_dp_descs[] = {
{}
};
+static const struct msm_dp_desc x1e80100_dp_descs[] = {
+ { .io_start = 0x0ae9, .id = MSM_DP_CONTROLLER_0,
.wide_bus_supported = true },
+ { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1,
.wide_bus_supported = true },
+ { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2,
.wide_bus_supported = true },
+ { .io_start = 0x0aea, .id = MSM_DP_CONTROLLER_3,
.wide_bus_supported = true },
+ {}
+};
+
static const struct of_device_id dp_dt_match[] = {
{ .compatible = "qcom,sc7180-dp", .data = _dp_descs },
{ .compatible = "qcom,sc7280-dp", .data = _dp_descs },
@@ -182,6 +190,7 @@ static const struct of_device_id dp_dt_match[] = {
{ .compatible = "qcom,sdm845-dp", .data = _dp_descs },
{ .compatible = "qcom,sm8350-dp", .data = _dp_descs },
{ .compatible = "qcom,sm8650-dp", .data = _dp_descs },
+ { .compatible = "qcom,x1e80100-dp", .data = _dp_descs },
{}
};
--
2.34.1
[PATCH v4 0/2] drm/msm/dp: Rework the eDP/DP modes and add support for X1E80100
Since this new platform supports both DP and eDP, it's the perfect time to drop the dual compatible (eDP and DP) and figure out a different way to specify the mode. After some off-list discussion, one suggested way was to add a 'is-edp' property to the controller node, but that approach has been dropped due to bindings concerns. So now we lookup the panel node in DT and based on it's presence we can safely say if it is eDP or not. The PHY counterpart patchset is here: https://lore.kernel.org/all/20240324-x1e80100-phy-edp-compatible-refactor-v5-0-a0db5f315...@linaro.org This patchset cannot be applied without the one mentioned above because it relies on PHY_SUBMODE_EDP and PHY_SUBMODE_DP. Signed-off-by: Abel Vesa --- Changes in v4: - Reworked the dp_display_get_connector_type to be more readable, like Bjorn suggested. - Dropped the unrelated change w.r.t. dp_aux_get call, reported by Dmitry. - Re-worded the commit message for the first patch, to align with Dmitry's suggestion. - Added Dmitry's R-b tag to the X1E80100 specific patch - Link to v3: https://lore.kernel.org/r/20240322-x1e80100-display-refactor-connector-v3-0-af14c29af...@linaro.org Changes in v3: - Dropped the bindings patch as this new solution doesn't involve bindings update. - Dropped R-b tags as this has been entirely reworked - Reworked to lookup the panel node in DT and set the is_edp and connector type based on panel node presence - Link to v2: https://lore.kernel.org/r/20240222-x1e80100-display-refactor-connector-v2-0-bd4197dfc...@linaro.org Changes in v2: - Added Dmitry's R-b tag to both driver patches - Dropped the if statement around assigning the is_edp in dp_display_probe, and fixed said assignment by using the connector type from match data instead. - Moved the qcom,x1e80100-dp compatible where it belongs - Re-worded the bindings commit message to follow Bjorn's suggestion - Dropped the RFC tag as the approach doesn't seem to be questioned anymore - Link to v1: https://lore.kernel.org/r/20240221-x1e80100-display-refactor-connector-v1-0-86c0e1ebd...@linaro.org --- Abel Vesa (2): drm/msm/dp: Add support for determining the eDP/DP mode from DT drm/msm/dp: Add support for the X1E80100 drivers/gpu/drm/msm/dp/dp_display.c | 38 - 1 file changed, 37 insertions(+), 1 deletion(-) --- base-commit: 13ee4a7161b6fd938aef6688ff43b163f6d83e37 change-id: 20231219-x1e80100-display-refactor-connector-e1c66548cae3 Best regards, -- Abel Vesa
Re: [PATCH v4 04/16] drm/msm: move msm_gpummu.c to adreno/a2xx_gpummu.c
On Sun, 24 Mar 2024 at 11:55, Akhil P Oommen wrote:
>
> On Sat, Mar 23, 2024 at 12:56:56AM +0200, Dmitry Baryshkov wrote:
> > The msm_gpummu.c implementation is used only on A2xx and it is tied to
> > the A2xx registers. Rename the source file accordingly.
> >
>
> There are very few functions in this file and a2xx_gpu.c is a relatively
> small source file too. Shall we just move them to a2xx_gpu.c instead of
> renaming?
I'd prefer to keep them separate, at least within this series. Let's
leave that to Rob's discretion.
> -Akhil
>
> > Signed-off-by: Dmitry Baryshkov
> > ---
> > drivers/gpu/drm/msm/Makefile | 2 +-
> > drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 4 +-
> > drivers/gpu/drm/msm/adreno/a2xx_gpu.h | 4 ++
> > .../drm/msm/{msm_gpummu.c => adreno/a2xx_gpummu.c} | 45
> > --
> > drivers/gpu/drm/msm/msm_mmu.h | 5 ---
> > 5 files changed, 31 insertions(+), 29 deletions(-)
--
With best wishes
Dmitry
Re: [PATCH v4 10/16] drm/msm: generate headers on the fly
On Sun, 24 Mar 2024 at 12:30, Akhil P Oommen wrote: > > On Sat, Mar 23, 2024 at 12:57:02AM +0200, Dmitry Baryshkov wrote: > > Generate DRM/MSM headers on the fly during kernel build. This removes a > > need to push register changes to Mesa with the following manual > > synchronization step. Existing headers will be removed in the following > > commits (split away to ease reviews). > > Is this approach common in upstream kernel? Isn't it a bit awkward from > legal perspective to rely on a source file outside of kernel during > compilation? As long as the source file for that file is available. For examples of non-trivial generated files see arch/arm64/include/generated/sysreg-defs.h and arch/arm64/include/generated/cpucap-defs.h -- With best wishes Dmitry
Re: [PATCH v4 10/16] drm/msm: generate headers on the fly
On Sat, Mar 23, 2024 at 12:57:02AM +0200, Dmitry Baryshkov wrote: > Generate DRM/MSM headers on the fly during kernel build. This removes a > need to push register changes to Mesa with the following manual > synchronization step. Existing headers will be removed in the following > commits (split away to ease reviews). Is this approach common in upstream kernel? Isn't it a bit awkward from legal perspective to rely on a source file outside of kernel during compilation? -Akhil > > Signed-off-by: Dmitry Baryshkov > --- > drivers/gpu/drm/msm/.gitignore | 1 + > drivers/gpu/drm/msm/Makefile | 97 > +- > drivers/gpu/drm/msm/msm_drv.c | 3 +- > drivers/gpu/drm/msm/msm_gpu.c | 2 +- > 4 files changed, 80 insertions(+), 23 deletions(-) > > diff --git a/drivers/gpu/drm/msm/.gitignore b/drivers/gpu/drm/msm/.gitignore > new file mode 100644 > index ..9ab870da897d > --- /dev/null > +++ b/drivers/gpu/drm/msm/.gitignore > @@ -0,0 +1 @@ > +generated/ > diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile > index 26ed4f443149..c861de58286c 100644 > --- a/drivers/gpu/drm/msm/Makefile > +++ b/drivers/gpu/drm/msm/Makefile > @@ -1,10 +1,11 @@ > # SPDX-License-Identifier: GPL-2.0 > ccflags-y := -I $(srctree)/$(src) > +ccflags-y += -I $(obj)/generated > ccflags-y += -I $(srctree)/$(src)/disp/dpu1 > ccflags-$(CONFIG_DRM_MSM_DSI) += -I $(srctree)/$(src)/dsi > ccflags-$(CONFIG_DRM_MSM_DP) += -I $(srctree)/$(src)/dp > > -msm-y := \ > +adreno-y := \ > adreno/adreno_device.o \ > adreno/adreno_gpu.o \ > adreno/a2xx_gpu.o \ > @@ -18,7 +19,11 @@ msm-y := \ > adreno/a6xx_gmu.o \ > adreno/a6xx_hfi.o \ > > -msm-$(CONFIG_DRM_MSM_HDMI) += \ > +adreno-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \ > + > +adreno-$(CONFIG_DRM_MSM_GPU_STATE) += adreno/a6xx_gpu_state.o > + > +msm-display-$(CONFIG_DRM_MSM_HDMI) += \ > hdmi/hdmi.o \ > hdmi/hdmi_audio.o \ > hdmi/hdmi_bridge.o \ > @@ -31,7 +36,7 @@ msm-$(CONFIG_DRM_MSM_HDMI) += \ > hdmi/hdmi_phy_8x74.o \ > hdmi/hdmi_pll_8960.o \ > > -msm-$(CONFIG_DRM_MSM_MDP4) += \ > +msm-display-$(CONFIG_DRM_MSM_MDP4) += \ > disp/mdp4/mdp4_crtc.o \ > disp/mdp4/mdp4_dsi_encoder.o \ > disp/mdp4/mdp4_dtv_encoder.o \ > @@ -42,7 +47,7 @@ msm-$(CONFIG_DRM_MSM_MDP4) += \ > disp/mdp4/mdp4_kms.o \ > disp/mdp4/mdp4_plane.o \ > > -msm-$(CONFIG_DRM_MSM_MDP5) += \ > +msm-display-$(CONFIG_DRM_MSM_MDP5) += \ > disp/mdp5/mdp5_cfg.o \ > disp/mdp5/mdp5_cmd_encoder.o \ > disp/mdp5/mdp5_ctl.o \ > @@ -55,7 +60,7 @@ msm-$(CONFIG_DRM_MSM_MDP5) += \ > disp/mdp5/mdp5_plane.o \ > disp/mdp5/mdp5_smp.o \ > > -msm-$(CONFIG_DRM_MSM_DPU) += \ > +msm-display-$(CONFIG_DRM_MSM_DPU) += \ > disp/dpu1/dpu_core_perf.o \ > disp/dpu1/dpu_crtc.o \ > disp/dpu1/dpu_encoder.o \ > @@ -85,14 +90,16 @@ msm-$(CONFIG_DRM_MSM_DPU) += \ > disp/dpu1/dpu_vbif.o \ > disp/dpu1/dpu_writeback.o > > -msm-$(CONFIG_DRM_MSM_MDSS) += \ > +msm-display-$(CONFIG_DRM_MSM_MDSS) += \ > msm_mdss.o \ > > -msm-y += \ > +msm-display-y += \ > disp/mdp_format.o \ > disp/mdp_kms.o \ > disp/msm_disp_snapshot.o \ > disp/msm_disp_snapshot_util.o \ > + > +msm-y += \ > msm_atomic.o \ > msm_atomic_tracepoints.o \ > msm_debugfs.o \ > @@ -115,12 +122,12 @@ msm-y += \ > msm_submitqueue.o \ > msm_gpu_tracepoints.o \ > > -msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \ > - dp/dp_debug.o > +msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o > > -msm-$(CONFIG_DRM_MSM_GPU_STATE) += adreno/a6xx_gpu_state.o > +msm-display-$(CONFIG_DEBUG_FS) += \ > + dp/dp_debug.o > > -msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \ > +msm-display-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \ > dp/dp_catalog.o \ > dp/dp_ctrl.o \ > dp/dp_display.o \ > @@ -130,21 +137,69 @@ msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \ > dp/dp_audio.o \ > dp/dp_utils.o > > -msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o > - > -msm-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o > +msm-display-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o > > -msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \ > +msm-display-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \ > dsi/dsi_cfg.o \ > dsi/dsi_host.o \ > dsi/dsi_manager.o \ > dsi/phy/dsi_phy.o > > -msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o > -msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o > -msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o > -msm-$(CONFIG_DRM_MSM_DSI_14NM_PHY) += dsi/phy/dsi_phy_14nm.o > -msm-$(CONFIG_DRM_MSM_DSI_10NM_PHY) += dsi/phy/dsi_phy_10nm.o > -msm-$(CONFIG_DRM_MSM_DSI_7NM_PHY) += dsi/phy/dsi_phy_7nm.o > +msm-display-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o >
Re: [PATCH v4 04/16] drm/msm: move msm_gpummu.c to adreno/a2xx_gpummu.c
On Sat, Mar 23, 2024 at 12:56:56AM +0200, Dmitry Baryshkov wrote:
> The msm_gpummu.c implementation is used only on A2xx and it is tied to
> the A2xx registers. Rename the source file accordingly.
>
There are very few functions in this file and a2xx_gpu.c is a relatively
small source file too. Shall we just move them to a2xx_gpu.c instead of
renaming?
-Akhil
> Signed-off-by: Dmitry Baryshkov
> ---
> drivers/gpu/drm/msm/Makefile | 2 +-
> drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 4 +-
> drivers/gpu/drm/msm/adreno/a2xx_gpu.h | 4 ++
> .../drm/msm/{msm_gpummu.c => adreno/a2xx_gpummu.c} | 45
> --
> drivers/gpu/drm/msm/msm_mmu.h | 5 ---
> 5 files changed, 31 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
> index b21ae2880c71..26ed4f443149 100644
> --- a/drivers/gpu/drm/msm/Makefile
> +++ b/drivers/gpu/drm/msm/Makefile
> @@ -8,6 +8,7 @@ msm-y := \
> adreno/adreno_device.o \
> adreno/adreno_gpu.o \
> adreno/a2xx_gpu.o \
> + adreno/a2xx_gpummu.o \
> adreno/a3xx_gpu.o \
> adreno/a4xx_gpu.o \
> adreno/a5xx_gpu.o \
> @@ -113,7 +114,6 @@ msm-y += \
> msm_ringbuffer.o \
> msm_submitqueue.o \
> msm_gpu_tracepoints.o \
> - msm_gpummu.o
>
> msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \
> dp/dp_debug.o
> diff --git a/drivers/gpu/drm/msm/adreno/a2xx_gpu.c
> b/drivers/gpu/drm/msm/adreno/a2xx_gpu.c
> index 0d8133f3174b..0dc255ddf5ce 100644
> --- a/drivers/gpu/drm/msm/adreno/a2xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a2xx_gpu.c
> @@ -113,7 +113,7 @@ static int a2xx_hw_init(struct msm_gpu *gpu)
> uint32_t *ptr, len;
> int i, ret;
>
> - msm_gpummu_params(gpu->aspace->mmu, _base, _error);
> + a2xx_gpummu_params(gpu->aspace->mmu, _base, _error);
>
> DBG("%s", gpu->name);
>
> @@ -469,7 +469,7 @@ static struct msm_gpu_state *a2xx_gpu_state_get(struct
> msm_gpu *gpu)
> static struct msm_gem_address_space *
> a2xx_create_address_space(struct msm_gpu *gpu, struct platform_device *pdev)
> {
> - struct msm_mmu *mmu = msm_gpummu_new(>dev, gpu);
> + struct msm_mmu *mmu = a2xx_gpummu_new(>dev, gpu);
> struct msm_gem_address_space *aspace;
>
> aspace = msm_gem_address_space_create(mmu, "gpu", SZ_16M,
> diff --git a/drivers/gpu/drm/msm/adreno/a2xx_gpu.h
> b/drivers/gpu/drm/msm/adreno/a2xx_gpu.h
> index 161a075f94af..53702f19990f 100644
> --- a/drivers/gpu/drm/msm/adreno/a2xx_gpu.h
> +++ b/drivers/gpu/drm/msm/adreno/a2xx_gpu.h
> @@ -19,4 +19,8 @@ struct a2xx_gpu {
> };
> #define to_a2xx_gpu(x) container_of(x, struct a2xx_gpu, base)
>
> +struct msm_mmu *a2xx_gpummu_new(struct device *dev, struct msm_gpu *gpu);
> +void a2xx_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base,
> + dma_addr_t *tran_error);
> +
> #endif /* __A2XX_GPU_H__ */
> diff --git a/drivers/gpu/drm/msm/msm_gpummu.c
> b/drivers/gpu/drm/msm/adreno/a2xx_gpummu.c
> similarity index 67%
> rename from drivers/gpu/drm/msm/msm_gpummu.c
> rename to drivers/gpu/drm/msm/adreno/a2xx_gpummu.c
> index f7d1945e0c9f..39641551eeb6 100644
> --- a/drivers/gpu/drm/msm/msm_gpummu.c
> +++ b/drivers/gpu/drm/msm/adreno/a2xx_gpummu.c
> @@ -5,30 +5,33 @@
>
> #include "msm_drv.h"
> #include "msm_mmu.h"
> -#include "adreno/adreno_gpu.h"
> -#include "adreno/a2xx.xml.h"
>
> -struct msm_gpummu {
> +#include "adreno_gpu.h"
> +#include "a2xx_gpu.h"
> +
> +#include "a2xx.xml.h"
> +
> +struct a2xx_gpummu {
> struct msm_mmu base;
> struct msm_gpu *gpu;
> dma_addr_t pt_base;
> uint32_t *table;
> };
> -#define to_msm_gpummu(x) container_of(x, struct msm_gpummu, base)
> +#define to_a2xx_gpummu(x) container_of(x, struct a2xx_gpummu, base)
>
> #define GPUMMU_VA_START SZ_16M
> #define GPUMMU_VA_RANGE (0xfff * SZ_64K)
> #define GPUMMU_PAGE_SIZE SZ_4K
> #define TABLE_SIZE (sizeof(uint32_t) * GPUMMU_VA_RANGE / GPUMMU_PAGE_SIZE)
>
> -static void msm_gpummu_detach(struct msm_mmu *mmu)
> +static void a2xx_gpummu_detach(struct msm_mmu *mmu)
> {
> }
>
> -static int msm_gpummu_map(struct msm_mmu *mmu, uint64_t iova,
> +static int a2xx_gpummu_map(struct msm_mmu *mmu, uint64_t iova,
> struct sg_table *sgt, size_t len, int prot)
> {
> - struct msm_gpummu *gpummu = to_msm_gpummu(mmu);
> + struct a2xx_gpummu *gpummu = to_a2xx_gpummu(mmu);
> unsigned idx = (iova - GPUMMU_VA_START) / GPUMMU_PAGE_SIZE;
> struct sg_dma_page_iter dma_iter;
> unsigned prot_bits = 0;
> @@ -53,9 +56,9 @@ static int msm_gpummu_map(struct msm_mmu *mmu, uint64_t
> iova,
> return 0;
> }
>
> -static int msm_gpummu_unmap(struct msm_mmu *mmu, uint64_t iova, size_t len)
> +static int a2xx_gpummu_unmap(struct msm_mmu *mmu, uint64_t iova, size_t len)
> {
> - struct msm_gpummu *gpummu = to_msm_gpummu(mmu);
> + struct a2xx_gpummu *gpummu =
