Re: fminnm/fmaxnm generation in aarch64
On Mon, 7 May 2018, Indu Bhagat wrote: > Q2. If one wants the compiler to generate fminnm/fmaxnm instructions, while > conforming with IEEE standard, the way to do that will be to use math > builtins fmin()/fmax(). Is this correct understanding? For IEEE 754-2008 minNum / maxNum operations, which those instructions correspond to and fmin and fmax bind to, yes. For IEEE 754-2018 (in progress), there are different minimum / maximum operations, which don't match those AArch64 instructions (but some do match RISC-V instructions), and there are new proposed corresponding C functions such as fmaximum and fminimum_num (I don't know of implementations of those functions). -- Joseph S. Myers jos...@codesourcery.com
Re: fminnm/fmaxnm generation in aarch64
On 07/05/18 18:08, Indu Bhagat wrote: [Trying to get some feedback. I earlier posted on gcc-help a week ago] In tree.def - /* Minimum and maximum values. When used with floating point, if both operands are zeros, or if either operand is NaN, then it is unspecified which of the two operands is returned as the result. */ DEFTREECODE (MIN_EXPR, "min_expr", tcc_binary, 2) DEFTREECODE (MAX_EXPR, "max_expr", tcc_binary, 2) I see that the compiler cannot simplify an expression like ((a EAC8 43EB D3EF DB98 CC77 2FAD A5CD 6035 332F A671
fminnm/fmaxnm generation in aarch64
[Trying to get some feedback. I earlier posted on gcc-help a week ago] In tree.def - /* Minimum and maximum values. When used with floating point, if both operands are zeros, or if either operand is NaN, then it is unspecified which of the two operands is returned as the result. */ DEFTREECODE (MIN_EXPR, "min_expr", tcc_binary, 2) DEFTREECODE (MAX_EXPR, "max_expr", tcc_binary, 2) I see that the compiler cannot simplify an expression like ((a