Hi Maintainers,
The attached patch backports the gcc trunk patch
http://gcc.gnu.org/ml/gcc-patches/2013-01/msg00143.html to
ARM/aarch64-4.7-branch branch.
ChangeLog.aarch64
2013-01-27 Venkataramanan Kumar venkataramanan.ku...@linaro.org
Backport from mainline.
2013-01-04 Andrew Pinski apin...@cavium.com
* config/aarch64/aarch64.c (aarch64_fixed_condition_code_regs):
New function.
(TARGET_FIXED_CONDITION_CODE_REGS): Define
Path is attached. Please let me know if I can change -1 to
INVALID_REGNUM and commit.
Built gcc and tested the gcc testsuites for the aarch64-none-elf
target with ARMv8 Foundation model. No new regressions.
Ok to for the ARM/aarch64-4.7-branch ?
regards,
Venkat.
Index: gcc/config/aarch64/aarch64.c
===
--- gcc/config/aarch64/aarch64.c(revision 195486)
+++ gcc/config/aarch64/aarch64.c(working copy)
@@ -2971,6 +2971,16 @@
return REAL_VALUES_EQUAL (r, dconst0);
}
+/* Return the fixed registers used for condition codes. */
+
+static bool
+aarch64_fixed_condition_code_regs (unsigned int *p1, unsigned int *p2)
+{
+ *p1 = CC_REGNUM;
+ *p2 = -1;
+ return true;
+}
+
enum machine_mode
aarch64_select_cc_mode (RTX_CODE code, rtx x, rtx y)
{
@@ -7809,6 +7819,9 @@
#undef TARGET_EXPAND_BUILTIN_VA_START
#define TARGET_EXPAND_BUILTIN_VA_START aarch64_expand_builtin_va_start
+#undef TARGET_FIXED_CONDITION_CODE_REG
+#define TARGET_FIXED_CONDITION_CODE_REGS aarch64_fixed_condition_code_regs
+
#undef TARGET_FUNCTION_ARG
#define TARGET_FUNCTION_ARG aarch64_function_arg
Index: gcc/testsuite/gcc.target/aarch64/cmp-1.c
===
--- gcc/testsuite/gcc.target/aarch64/cmp-1.c(revision 0)
+++ gcc/testsuite/gcc.target/aarch64/cmp-1.c(working copy)
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options -O2 } */
+
+int f(int a, int b)
+{
+ if(ab)
+return 1;
+ if(ab)
+return -1;
+ return 0;
+}
+
+/* We should optimize away the second cmp. */
+/* { dg-final { scan-assembler-times cmp\tw 1 } } */
+
