Re: [wwwdocs] Add znver5 to GCC 14 changes
Hi Gerald, On Fri, May 03 2024, Gerald Pfeifer wrote: > Hi Martin, > > On Thu, 2 May 2024, Martin Jambor wrote: >> + GCC now supports AMD CPUs based on the znver5 core via >> +-march=znver5. Based on ISA extensions enabled on >> +a znver4 core, the switch further enables the AVXVNNI, MOVDIRI, >> +MOVDIR64B, AVX512VP2INTERSECT, and PREFETCHI ISA extensions. > > just two small suggestions: We usually sort extensions alphabetically, > so AVX512VP2INTERSECT, AVXVNNI, MOVDIR64B, MOVDIRI, and PREFETCHI. If > there is a specific reason to do otherwise, that's okay of course. > > And I might write "In addition to the ISA extensions enabled on a znver4 > core, this switch..." to avoid the repetition of "based on" (and make it a > bit more clear even that it is a full superset, not just 'loosely' based". > Thanks for the suggestions, I'll go ahead and commit the following then. Martin diff --git a/htdocs/gcc-14/changes.html b/htdocs/gcc-14/changes.html index 8dfbf7dc..46a0266d 100644 --- a/htdocs/gcc-14/changes.html +++ b/htdocs/gcc-14/changes.html @@ -954,6 +954,12 @@ __asm (".global __flmap_lock" "\n\t" -fsanitize=hwaddress will enable -mlam=u57 by default. + GCC now supports AMD CPUs based on the znver5 core via +-march=znver5. In addition to the ISA extensions +enabled on a znver4 core, this switch further enables the +AVX512VP2INTERSECT, AVXVNNI, MOVDIR64B, MOVDIRI, and PREFETCHI ISA +extensions. + MCore
Re: [wwwdocs] Add znver5 to GCC 14 changes
Hi Martin, On Thu, 2 May 2024, Martin Jambor wrote: > + GCC now supports AMD CPUs based on the znver5 core via > +-march=znver5. Based on ISA extensions enabled on > +a znver4 core, the switch further enables the AVXVNNI, MOVDIRI, > +MOVDIR64B, AVX512VP2INTERSECT, and PREFETCHI ISA extensions. just two small suggestions: We usually sort extensions alphabetically, so AVX512VP2INTERSECT, AVXVNNI, MOVDIR64B, MOVDIRI, and PREFETCHI. If there is a specific reason to do otherwise, that's okay of course. And I might write "In addition to the ISA extensions enabled on a znver4 core, this switch..." to avoid the repetition of "based on" (and make it a bit more clear even that it is a full superset, not just 'loosely' based". Gerald
[wwwdocs] Add znver5 to GCC 14 changes
Hello, based on input from AMD, I'd like to commit the following to the wwwdocs repo to point out new support for Zen 5 based AMD CPUs in GCC 14? Is it OK? Any suggestions, comments or questions? Thanks, Martin diff --git a/htdocs/gcc-14/changes.html b/htdocs/gcc-14/changes.html index 8dfbf7dc..d250340b 100644 --- a/htdocs/gcc-14/changes.html +++ b/htdocs/gcc-14/changes.html @@ -954,6 +954,11 @@ __asm (".global __flmap_lock" "\n\t" -fsanitize=hwaddress will enable -mlam=u57 by default. + GCC now supports AMD CPUs based on the znver5 core via +-march=znver5. Based on ISA extensions enabled on +a znver4 core, the switch further enables the AVXVNNI, MOVDIRI, +MOVDIR64B, AVX512VP2INTERSECT, and PREFETCHI ISA extensions. + MCore