Re: Aarch64 patch ping^3

[Richard Sandiford via Gcc-patches]

Jakub Jelinek via Gcc-patches  writes:
> On Wed, Apr 07, 2021 at 03:53:26PM +0200, Jakub Jelinek via Gcc-patches wrote:
>> On Mon, Mar 29, 2021 at 11:16:55AM +0200, Jakub Jelinek wrote:
>> > > Looks good to me.  Richard E knows this code better than I do though,
>> > > so I think he should have the final say.  He's currently on holiday
>> > > but will be back next week.
>> > 
>> > I'd like to ping this patch.
>> 
>> Ping.
>
> Ping.

Let's go for it.  I still think the patch looks good, and if a problem
crops up then we still have time to fix it before the release.  Applying
it now seems better than applying it closer to the release.

Thanks,
Richard

>
>> > > > 2021-03-18  Jakub Jelinek  
>> > > >
>> > > >PR target/91710
>> > > >* config/aarch64/aarch64.c (aarch64_function_arg_alignment): 
>> > > > Change
>> > > >abi_break argument from bool * to unsigned *, store there the 
>> > > > pre-GCC 9
>> > > >alignment.
>> > > >(aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Adjust 
>> > > > callers.
>> > > >(aarch64_function_arg_regno_p): Likewise.  Only emit -Wpsabi 
>> > > > note if
>> > > >the old and new alignment after applying MIN/MAX to it is 
>> > > > different.
>> > > >
>> > > >* gcc.target/aarch64/pr91710.c: New test.
>
> Thanks
>
>   Jakub

Aarch64 patch ping^3

[Jakub Jelinek via Gcc-patches]

On Wed, Apr 07, 2021 at 03:53:26PM +0200, Jakub Jelinek via Gcc-patches wrote:
> On Mon, Mar 29, 2021 at 11:16:55AM +0200, Jakub Jelinek wrote:
> > > Looks good to me.  Richard E knows this code better than I do though,
> > > so I think he should have the final say.  He's currently on holiday
> > > but will be back next week.
> > 
> > I'd like to ping this patch.
> 
> Ping.

Ping.

> > > > 2021-03-18  Jakub Jelinek  
> > > >
> > > > PR target/91710
> > > > * config/aarch64/aarch64.c (aarch64_function_arg_alignment): 
> > > > Change
> > > > abi_break argument from bool * to unsigned *, store there the 
> > > > pre-GCC 9
> > > > alignment.
> > > > (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Adjust 
> > > > callers.
> > > > (aarch64_function_arg_regno_p): Likewise.  Only emit -Wpsabi 
> > > > note if
> > > > the old and new alignment after applying MIN/MAX to it is 
> > > > different.
> > > >
> > > > * gcc.target/aarch64/pr91710.c: New test.

Thanks

Jakub

Aarch64 patch ping^2

[Jakub Jelinek via Gcc-patches]

On Mon, Mar 29, 2021 at 11:16:55AM +0200, Jakub Jelinek wrote:
> > Looks good to me.  Richard E knows this code better than I do though,
> > so I think he should have the final say.  He's currently on holiday
> > but will be back next week.
> 
> I'd like to ping this patch.

Ping.

> > > 2021-03-18  Jakub Jelinek  
> > >
> > >   PR target/91710
> > >   * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Change
> > >   abi_break argument from bool * to unsigned *, store there the pre-GCC 9
> > >   alignment.
> > >   (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Adjust callers.
> > >   (aarch64_function_arg_regno_p): Likewise.  Only emit -Wpsabi note if
> > >   the old and new alignment after applying MIN/MAX to it is different.
> > >
> > >   * gcc.target/aarch64/pr91710.c: New test.

Thanks.

Jakub

Another AArch64 patch ping

[Jakub Jelinek]

Hi!

I'd like to ping another patch:

PR84272 - P1 - fix cortex-a57-fma-steering.c
  - http://gcc.gnu.org/ml/gcc-patches/2018-02/msg00539.html

Thanks

Jakub

AArch64 patch ping

[Jakub Jelinek]

Hi!

I'd like to ping this patch from Steve.

On Fri, Jan 05, 2018 at 02:14:26PM -0800, Steve Ellcey wrote:
> This is a fix for PR target/83335.  We are asserting in
> aarch64_print_address_internal because we have a non Pmode
> address coming from an asm instruction.  My fix is to 
> just allow this by checking this_is_asm_operands.  This is
> what it was doing before the assert was added that caused
> the ICE.
> 
> Verified that it fixed gcc.target/aarch64/asm-2.c in ILP32
> mode and that it caused no regressions.
> 
> Steve Ellcey
> sell...@cavium.com
> 
> 
> 2018-01-05  Steve Ellcey  
> 
>   PR target/83335
>   * config/aarch64/aarch64.c (aarch64_print_address_internal):
>   Allow non Pmode address in asm statements.
> 
> 
> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
> index a189605..af74212 100644
> --- a/gcc/config/aarch64/aarch64.c
> +++ b/gcc/config/aarch64/aarch64.c
> @@ -5670,8 +5670,9 @@ aarch64_print_address_internal (FILE *f, machine_mode 
> mode, rtx x,
>  {
>    struct aarch64_address_info addr;
>  
> -  /* Check all addresses are Pmode - including ILP32.  */
> -  gcc_assert (GET_MODE (x) == Pmode);
> +  /* Check all addresses are Pmode - including ILP32,
> + unless this is coming from an asm statement.  */
> +  gcc_assert (GET_MODE (x) == Pmode || this_is_asm_operands);
>  
>    if (aarch64_classify_address (, x, mode, true, type))
>  switch (addr.type)

Jakub