[gem5-dev] changeset in gem5: ruby: fix round robin arbiter in garnet2.0
changeset 3c38d3e74980 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=3c38d3e74980
description:
ruby: fix round robin arbiter in garnet2.0
The rr arbiter pointer in garnet was getting updated on every request,
even if there is no grant. This was leading to a huge variance in wait
time at a router at high injection rates.
This patch corrects it to update upon a grant.
diffstat:
src/mem/ruby/network/garnet2.0/SwitchAllocator.cc | 22 +++---
1 files changed, 11 insertions(+), 11 deletions(-)
diffs (53 lines):
diff -r 79c3f6a60392 -r 3c38d3e74980
src/mem/ruby/network/garnet2.0/SwitchAllocator.cc
--- a/src/mem/ruby/network/garnet2.0/SwitchAllocator.cc Sat Feb 11 11:11:48
2017 -0500
+++ b/src/mem/ruby/network/garnet2.0/SwitchAllocator.cc Sun Feb 12 15:00:03
2017 -0500
@@ -116,13 +116,6 @@
for (int inport = 0; inport < m_num_inports; inport++) {
int invc = m_round_robin_invc[inport];
-// Select next round robin vc candidate within valid vnet
-int next_round_robin_invc = invc;
-next_round_robin_invc++;
-if (next_round_robin_invc >= m_num_vcs)
-next_round_robin_invc = 0;
-m_round_robin_invc[inport] = next_round_robin_invc;
-
for (int invc_iter = 0; invc_iter < m_num_vcs; invc_iter++) {
if (m_input_unit[inport]->need_stage(invc, SA_,
@@ -142,6 +135,12 @@
m_input_arbiter_activity++;
m_port_requests[outport][inport] = true;
m_vc_winners[outport][inport]= invc;
+
+// Update Round Robin pointer
+m_round_robin_invc[inport]++;
+if (m_round_robin_invc[inport] >= m_num_vcs)
+m_round_robin_invc[inport] = 0;
+
break; // got one vc winner for this port
}
}
@@ -175,10 +174,6 @@
// Independent arbiter at each output port
for (int outport = 0; outport < m_num_outports; outport++) {
int inport = m_round_robin_inport[outport];
-m_round_robin_inport[outport]++;
-
-if (m_round_robin_inport[outport] >= m_num_inports)
-m_round_robin_inport[outport] = 0;
for (int inport_iter = 0; inport_iter < m_num_inports;
inport_iter++) {
@@ -256,6 +251,11 @@
// remove this request
m_port_requests[outport][inport] = false;
+// Update Round Robin pointer
+m_round_robin_inport[outport]++;
+if (m_round_robin_inport[outport] >= m_num_inports)
+m_round_robin_inport[outport] = 0;
+
break; // got a input winner for this outport
}
___
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Re: [gem5-dev] Review Request 3781: riscv: Remove ECALL tests from insttest
> On Jan. 25, 2017, 11:28 a.m., Andreas Sandberg wrote: > > Ship It! What was the verdict? Is it just a matter of an updated patch description/summary and then this should be pushed? - Andreas --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3781/#review9316 --- On Jan. 24, 2017, 4:33 p.m., Alec Roelke wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3781/ > --- > > (Updated Jan. 24, 2017, 4:33 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > --- > > Changeset 11796:1c03f7dcaa8c > --- > riscv: Remove ECALL tests from insttest > > The system calls tested in rv64i.cpp in RISC-V's insttest suite have > different behavior depending on the operating system and file system they > are run on. This patch removes those tests from the regression. > > [Change deletion of ECALL test to block comment.] > [Restore ECALL test but remove test output to test only for completion > without error.] > > > Diffs > - > > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/minor-timing/config.ini > 97eebddaae84 > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/minor-timing/config.json > 97eebddaae84 > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/minor-timing/simerr > 97eebddaae84 > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/minor-timing/simout > 97eebddaae84 > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/minor-timing/stats.txt > 97eebddaae84 > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/simple-atomic/config.ini > 97eebddaae84 > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/simple-atomic/config.json > 97eebddaae84 > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/simple-atomic/simerr > 97eebddaae84 > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/simple-atomic/simout > 97eebddaae84 > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/simple-atomic/stats.txt > 97eebddaae84 > > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/simple-timing-ruby/config.ini > 97eebddaae84 > > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/simple-timing-ruby/config.json > 97eebddaae84 > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/simple-timing-ruby/simerr > 97eebddaae84 > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/simple-timing-ruby/simout > 97eebddaae84 > > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/simple-timing-ruby/stats.txt > 97eebddaae84 > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/simple-timing/config.ini > 97eebddaae84 > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/simple-timing/config.json > 97eebddaae84 > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/simple-timing/simerr > 97eebddaae84 > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/simple-timing/simout > 97eebddaae84 > tests/quick/se/02.insttest/ref/riscv/linux-rv64i/simple-timing/stats.txt > 97eebddaae84 > > Diff: http://reviews.gem5.org/r/3781/diff/ > > > Testing > --- > > > Thanks, > > Alec Roelke > > ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
Re: [gem5-dev] Review Request 3777: misc: Clean up and complete the gem5<->SystemC-TLM bridge [6/10]
> On Feb. 11, 2017, 6:09 p.m., Jason Lowe-Power wrote: > > This no longer applies cleanly. I think it's probably something I screwed > > up when pushing all of the patches. I tried to go through and manually fix > > the rejections, but I'm not confident in how to do it. > > > > Could you update this diff on top of the current mainline? I'll commit it > > immediately once you do. > > > > Sorry for the inconvenience. On my machine the patch applied cleanly after pulling from upstream. I updated the diff anyway and hope it works now. - Christian --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3777/#review9417 --- On Feb. 12, 2017, 9:37 a.m., Christian Menard wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3777/ > --- > > (Updated Feb. 12, 2017, 9:37 a.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > --- > > Changeset 11831:d89e145b7665 > --- > misc: Clean up and complete the gem5<->SystemC-TLM bridge [6/10] > > The current TLM bridge only provides a Slave Port that allows the gem5 world > to > send request to the SystemC world. This patch series refractors and cleans up > the existing code, and adds a Master Port that allows the SystemC world to > send > requests to the gem5 world. > > This patch: > * Update the README > > > Diffs > - > > util/tlm/README c10c50cb8ac9 > > Diff: http://reviews.gem5.org/r/3777/diff/ > > > Testing > --- > > > Thanks, > > Christian Menard > > ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
Re: [gem5-dev] Review Request 3777: misc: Clean up and complete the gem5<->SystemC-TLM bridge [6/10]
--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3777/ --- (Updated Feb. 12, 2017, 9:37 a.m.) Review request for Default. Repository: gem5 Description (updated) --- Changeset 11831:d89e145b7665 --- misc: Clean up and complete the gem5<->SystemC-TLM bridge [6/10] The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Update the README Diffs (updated) - util/tlm/README c10c50cb8ac9 Diff: http://reviews.gem5.org/r/3777/diff/ Testing --- Thanks, Christian Menard ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
