[gem5-dev] Change in gem5/gem5[master]: sim-se, arch-arm: Add support for getdents64
Andreas Sandberg has submitted this change and it was merged. (
https://gem5-review.googlesource.com/c/public/gem5/+/15438 )
Change subject: sim-se, arch-arm: Add support for getdents64
..
sim-se, arch-arm: Add support for getdents64
Change-Id: Ib27950144d4c9802ffb842db98aec9e433ccbfc5
Signed-off-by: Andreas Sandberg
Cc: Giacomo Travaglini
Cc: Javier Setoain
Cc: Brandon Potter
Reviewed-on: https://gem5-review.googlesource.com/c/15438
Maintainer: Brandon Potter
Reviewed-by: Jason Lowe-Power
---
M src/arch/arm/linux/process.cc
M src/sim/syscall_emul.cc
M src/sim/syscall_emul.hh
3 files changed, 52 insertions(+), 12 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Andreas Sandberg: Looks good to me, approved
Brandon Potter: Looks good to me, approved
diff --git a/src/arch/arm/linux/process.cc b/src/arch/arm/linux/process.cc
index cb62e6e..61caa45 100644
--- a/src/arch/arm/linux/process.cc
+++ b/src/arch/arm/linux/process.cc
@@ -46,6 +46,8 @@
#include "arch/arm/linux/process.hh"
+#include
+
#include "arch/arm/isa_traits.hh"
#include "arch/arm/linux/linux.hh"
#include "base/trace.hh"
@@ -342,7 +344,11 @@
/* 214 */ SyscallDesc("setgid", unimplementedFunc),
/* 215 */ SyscallDesc("setfsuid", unimplementedFunc),
/* 216 */ SyscallDesc("setfsgid", unimplementedFunc),
+#if defined(SYS_getdents64)
+/* 217 */ SyscallDesc("getdents64", getdents64Func),
+#else
/* 217 */ SyscallDesc("getdents64", unimplementedFunc),
+#endif
/* 218 */ SyscallDesc("pivot_root", unimplementedFunc),
/* 219 */ SyscallDesc("mincore", unimplementedFunc),
/* 220 */ SyscallDesc("madvise", ignoreFunc),
@@ -555,7 +561,11 @@
/* 58 */ SyscallDesc("vhangup", unimplementedFunc),
/* 59 */ SyscallDesc("pipe2", unimplementedFunc),
/* 60 */ SyscallDesc("quotactl", unimplementedFunc),
+#if defined(SYS_getdents64)
+/* 61 */ SyscallDesc("getdents64", getdents64Func),
+#else
/* 61 */ SyscallDesc("getdents64", unimplementedFunc),
+#endif
/* 62 */ SyscallDesc("llseek", lseekFunc),
/* 63 */ SyscallDesc("read", readFunc),
/* 64 */ SyscallDesc("write", writeFunc),
diff --git a/src/sim/syscall_emul.cc b/src/sim/syscall_emul.cc
index 3d17b5d..e79e79c 100644
--- a/src/sim/syscall_emul.cc
+++ b/src/sim/syscall_emul.cc
@@ -1151,9 +1151,10 @@
return (result == -1) ? -errno : result;
}
-#if defined(SYS_getdents)
-SyscallReturn
-getdentsFunc(SyscallDesc *desc, int callnum, Process *p, ThreadContext *tc)
+#if defined(SYS_getdents) || defined(SYS_getdents64)
+template
+static SyscallReturn
+getdentsImpl(SyscallDesc *desc, int callnum, Process *p, ThreadContext *tc)
{
int index = 0;
int tgt_fd = p->getSyscallArg(tc, index);
@@ -1166,21 +1167,14 @@
int sim_fd = hbfdp->getSimFD();
BufferArg buf_arg(buf_ptr, count);
-auto status = syscall(SYS_getdents, sim_fd, buf_arg.bufferPtr(),
count);
+auto status = syscall(SYS_NUM, sim_fd, buf_arg.bufferPtr(), count);
if (status == -1)
return -errno;
-typedef struct linux_dirent {
-unsigned long d_ino;
-unsigned long d_off;
-unsigned short d_reclen;
-char dname[];
-} LinDent;
-
unsigned traversed = 0;
while (traversed < status) {
-LinDent *buffer = (LinDent*)((Addr)buf_arg.bufferPtr() +
traversed);
+DE *buffer = (DE*)((Addr)buf_arg.bufferPtr() + traversed);
auto host_reclen = buffer->d_reclen;
@@ -1200,3 +1194,33 @@
return status;
}
#endif
+
+#if defined(SYS_getdents)
+SyscallReturn
+getdentsFunc(SyscallDesc *desc, int callnum, Process *p, ThreadContext *tc)
+{
+typedef struct linux_dirent {
+unsigned long d_ino;
+unsigned long d_off;
+unsigned short d_reclen;
+char dname[];
+} LinDent;
+
+return getdentsImpl(desc, callnum, p, tc);
+}
+#endif
+
+#if defined(SYS_getdents64)
+SyscallReturn
+getdents64Func(SyscallDesc *desc, int callnum, Process *p, ThreadContext
*tc)
+{
+typedef struct linux_dirent64 {
+ino64_t d_ino;
+off64_t d_off;
+unsigned short d_reclen;
+char dname[];
+} LinDent64;
+
+return getdentsImpl(desc, callnum, p, tc);
+}
+#endif
diff --git a/src/sim/syscall_emul.hh b/src/sim/syscall_emul.hh
index 343fb27..91e115d 100644
--- a/src/sim/syscall_emul.hh
+++ b/src/sim/syscall_emul.hh
@@ -309,6 +309,12 @@
Process *p, ThreadContext *tc);
#endif
+#if defined(SYS_getdents64)
+// Target getdents() handler.
+SyscallReturn getdents64Func(SyscallDesc *desc, int num,
+ Process *p, ThreadContext *tc);
+#endif
+
// Target getuid() handler.
SyscallReturn getuidFunc(SyscallDesc *desc, int num,
Process *p, ThreadContext *tc);
--
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[gem5-dev] Change in gem5/gem5[master]: sim-se: Refactor clone to avoid most ifdefs
Andreas Sandberg has submitted this change and it was merged. (
https://gem5-review.googlesource.com/c/public/gem5/+/15435 )
Change subject: sim-se: Refactor clone to avoid most ifdefs
..
sim-se: Refactor clone to avoid most ifdefs
Some parts of clone are architecture dependent. In some cases, we are
able to use architecture-specific helper functions or register
aliases. However, there is still some architecture-specific that is
protected by ifdefs in the common clone implementation.
Move these architecture-specific bits to the architecture-specific OS
class instead to avoid these ifdefs and make the code a bit more
readable.
Change-Id: Ia0903d738d0ba890863bddfa77e3b717db7f45de
Signed-off-by: Andreas Sandberg
Cc: Giacomo Travaglini
Cc: Javier Setoain
Cc: Brandon Potter
Reviewed-on: https://gem5-review.googlesource.com/c/15435
Reviewed-by: Jason Lowe-Power
Maintainer: Brandon Potter
---
M src/arch/alpha/linux/linux.hh
M src/arch/arm/linux/linux.hh
M src/arch/riscv/linux/linux.hh
M src/arch/sparc/linux/linux.hh
M src/arch/x86/linux/linux.hh
M src/sim/syscall_emul.hh
6 files changed, 93 insertions(+), 33 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Brandon Potter: Looks good to me, approved
diff --git a/src/arch/alpha/linux/linux.hh b/src/arch/alpha/linux/linux.hh
index cacb96b..3fd6567 100644
--- a/src/arch/alpha/linux/linux.hh
+++ b/src/arch/alpha/linux/linux.hh
@@ -31,6 +31,7 @@
#ifndef __ALPHA_ALPHA_LINUX_LINUX_HH__
#define __ALPHA_ALPHA_LINUX_LINUX_HH__
+#include "arch/alpha/utility.hh"
#include "kern/linux/linux.hh"
/* AlphaLinux class contains static constants/definitions/misc.
@@ -196,6 +197,17 @@
// For futex system call
static const unsigned TGT_EAGAIN = 35;
static const unsigned TGT_EWOULDBLOCK = TGT_EAGAIN;
+
+static void
+archClone(uint64_t flags,
+ Process *pp, Process *cp,
+ ThreadContext *ptc, ThreadContext *ctc,
+ uint64_t stack, uint64_t tls)
+{
+AlphaISA::copyMiscRegs(ptc, ctc);
+if (stack)
+ctc->setIntReg(AlphaISA::StackPointerReg, stack);
+}
};
#endif // __ALPHA_ALPHA_LINUX_LINUX_HH__
diff --git a/src/arch/arm/linux/linux.hh b/src/arch/arm/linux/linux.hh
index 73f0fa6..9e9ca1f 100644
--- a/src/arch/arm/linux/linux.hh
+++ b/src/arch/arm/linux/linux.hh
@@ -45,9 +45,26 @@
#ifndef __ARCH_ARM_LINUX_LINUX_HH__
#define __ARCH_ARM_LINUX_LINUX_HH__
+#include "arch/arm/utility.hh"
#include "kern/linux/linux.hh"
-class ArmLinux32 : public Linux
+class ArmLinux : public Linux
+{
+ public:
+static void
+archClone(uint64_t flags,
+ Process *pp, Process *cp,
+ ThreadContext *ptc, ThreadContext *ctc,
+ uint64_t stack, uint64_t tls)
+{
+ArmISA::copyRegs(ptc, ctc);
+
+if (stack)
+ctc->setIntReg(TheISA::StackPointerReg, stack);
+}
+};
+
+class ArmLinux32 : public ArmLinux
{
public:
@@ -256,7 +273,7 @@
};
};
-class ArmLinux64 : public Linux
+class ArmLinux64 : public ArmLinux
{
public:
diff --git a/src/arch/riscv/linux/linux.hh b/src/arch/riscv/linux/linux.hh
index cfc1d4f..2dac1fe 100644
--- a/src/arch/riscv/linux/linux.hh
+++ b/src/arch/riscv/linux/linux.hh
@@ -31,6 +31,7 @@
#ifndef __ARCH_RISCV_LINUX_LINUX_HH__
#define __ARCH_RISCV_LINUX_LINUX_HH__
+#include "arch/riscv/utility.hh"
#include "kern/linux/linux.hh"
class RiscvLinux : public Linux
@@ -187,6 +188,17 @@
uint64_t freehigh;
uint32_t mem_unit;
} tgt_sysinfo;
+
+static void
+archClone(uint64_t flags,
+ Process *pp, Process *cp,
+ ThreadContext *ptc, ThreadContext *ctc,
+ uint64_t stack, uint64_t tls)
+{
+RiscvISA::copyRegs(ptc, ctc);
+if (stack)
+ctc->setIntReg(RiscvISA::StackPointerReg, stack);
+}
};
#endif
diff --git a/src/arch/sparc/linux/linux.hh b/src/arch/sparc/linux/linux.hh
index 69d373b..1de949d 100644
--- a/src/arch/sparc/linux/linux.hh
+++ b/src/arch/sparc/linux/linux.hh
@@ -31,6 +31,7 @@
#ifndef __ARCH_SPARC_LINUX_LINUX_HH__
#define __ARCH_SPARC_LINUX_LINUX_HH__
+#include "arch/sparc/utility.hh"
#include "kern/linux/linux.hh"
class SparcLinux : public Linux
@@ -182,6 +183,28 @@
return false;
}
}
+
+static void
+archClone(uint64_t flags,
+ Process *pp, Process *cp,
+ ThreadContext *ptc, ThreadContext *ctc,
+ uint64_t stack, uint64_t tls)
+{
+SparcISA::copyRegs(ptc, ctc);
+ctc->setIntReg(SparcISA::NumIntArchRegs + 6, 0);
+ctc->setIntReg(SparcISA::NumIntArchRegs + 4, 0);
+ctc->setIntReg(SparcISA::NumIntArchRegs + 3, SparcISA::NWindows -
2);
+ctc->setIntReg(SparcISA::NumIntArchRegs + 5, SparcISA::NWindows);
+ctc->setMiscReg(SparcISA::MISCREG_CWP, 0);
+
[gem5-dev] Change in gem5/gem5[master]: arch-arm, sim-se: Fix incorrect SP handling in clone
Andreas Sandberg has submitted this change and it was merged. (
https://gem5-review.googlesource.com/c/public/gem5/+/15436 )
Change subject: arch-arm, sim-se: Fix incorrect SP handling in clone
..
arch-arm, sim-se: Fix incorrect SP handling in clone
The clone syscall is currently broken on aarch64 since the aarch64
code uses an incorrect SP register. Fix this by storing the new stack
pointer in SP_EL0 instead of R13.
Change-Id: Ie17990b4f359608e3b53e5bf625eca53769a6653
Signed-off-by: Andreas Sandberg
Cc: Giacomo Travaglini
Cc: Javier Setoain
Cc: Brandon Potter
Reviewed-on: https://gem5-review.googlesource.com/c/15436
Reviewed-by: Jason Lowe-Power
Maintainer: Brandon Potter
---
M src/arch/arm/linux/linux.hh
1 file changed, 23 insertions(+), 3 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Brandon Potter: Looks good to me, approved
diff --git a/src/arch/arm/linux/linux.hh b/src/arch/arm/linux/linux.hh
index 9e9ca1f..e1f27a7 100644
--- a/src/arch/arm/linux/linux.hh
+++ b/src/arch/arm/linux/linux.hh
@@ -58,9 +58,6 @@
uint64_t stack, uint64_t tls)
{
ArmISA::copyRegs(ptc, ctc);
-
-if (stack)
-ctc->setIntReg(TheISA::StackPointerReg, stack);
}
};
@@ -271,6 +268,18 @@
int32_t tms_cutime; //!< user time of children
int32_t tms_cstime; //!< system time of children
};
+
+static void
+archClone(uint64_t flags,
+ Process *pp, Process *cp,
+ ThreadContext *ptc, ThreadContext *ctc,
+ uint64_t stack, uint64_t tls)
+{
+ArmLinux::archClone(flags, pp, cp, ptc, ctc, stack, tls);
+
+if (stack)
+ctc->setIntReg(ArmISA::INTREG_SP, stack);
+}
};
class ArmLinux64 : public ArmLinux
@@ -516,6 +525,17 @@
int64_t tms_cutime; //!< user time of children
int64_t tms_cstime; //!< system time of children
};
+
+static void archClone(uint64_t flags,
+ Process *pp, Process *cp,
+ ThreadContext *ptc, ThreadContext *ctc,
+ uint64_t stack, uint64_t tls)
+{
+ArmLinux::archClone(flags, pp, cp, ptc, ctc, stack, tls);
+
+if (stack)
+ctc->setIntReg(ArmISA::INTREG_SP0, stack);
+}
};
#endif
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Ie17990b4f359608e3b53e5bf625eca53769a6653
Gerrit-Change-Number: 15436
Gerrit-PatchSet: 3
Gerrit-Owner: Andreas Sandberg
Gerrit-Reviewer: Andreas Sandberg
Gerrit-Reviewer: Brandon Potter
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-CC: Giacomo Travaglini
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[master]: arch-arm, sim-se: Add support for TLS in clone
Andreas Sandberg has submitted this change and it was merged. (
https://gem5-review.googlesource.com/c/public/gem5/+/15437 )
Change subject: arch-arm, sim-se: Add support for TLS in clone
..
arch-arm, sim-se: Add support for TLS in clone
Change-Id: I1f78dce05a48a2e3adfaf027cd38ab55507b9611
Signed-off-by: Andreas Sandberg
Cc: Giacomo Travaglini
Cc: Javier Setoain
Cc: Brandon Potter
Reviewed-on: https://gem5-review.googlesource.com/c/15437
Reviewed-by: Jason Lowe-Power
Maintainer: Brandon Potter
---
M src/arch/arm/linux/linux.hh
1 file changed, 6 insertions(+), 0 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Brandon Potter: Looks good to me, approved
diff --git a/src/arch/arm/linux/linux.hh b/src/arch/arm/linux/linux.hh
index e1f27a7..cff1e47 100644
--- a/src/arch/arm/linux/linux.hh
+++ b/src/arch/arm/linux/linux.hh
@@ -58,6 +58,12 @@
uint64_t stack, uint64_t tls)
{
ArmISA::copyRegs(ptc, ctc);
+
+if (flags & TGT_CLONE_SETTLS) {
+/* TPIDR_EL0 is architecturally mapped to TPIDRURW, so
+ * this works for both aarch32 and aarch64. */
+ctc->setMiscReg(ArmISA::MISCREG_TPIDR_EL0, tls);
+}
}
};
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I1f78dce05a48a2e3adfaf027cd38ab55507b9611
Gerrit-Change-Number: 15437
Gerrit-PatchSet: 3
Gerrit-Owner: Andreas Sandberg
Gerrit-Reviewer: Andreas Sandberg
Gerrit-Reviewer: Brandon Potter
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-CC: Giacomo Travaglini
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[master]: sim-se: Correctly calculate next PC in clone
Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/15417 ) Change subject: sim-se: Correctly calculate next PC in clone .. sim-se: Correctly calculate next PC in clone The clone syscall doesn't propagate all state in the PCState object when calculating the return PC of a newly created process. Instead of creating a new PCState object from the next PC address, copy the old PC and advance it. Change-Id: Ice53831920bcb5d198865169ed2cca8d06e37cfe Signed-off-by: Andreas Sandberg Cc: Giacomo Travaglini Cc: Javier Setoain Cc: Brandon Potter Reviewed-on: https://gem5-review.googlesource.com/c/15417 Reviewed-by: Jason Lowe-Power Maintainer: Brandon Potter --- M src/sim/syscall_emul.hh 1 file changed, 3 insertions(+), 1 deletion(-) Approvals: Jason Lowe-Power: Looks good to me, approved Brandon Potter: Looks good to me, approved diff --git a/src/sim/syscall_emul.hh b/src/sim/syscall_emul.hh index 1ff0460..8480c7e 100644 --- a/src/sim/syscall_emul.hh +++ b/src/sim/syscall_emul.hh @@ -1402,7 +1402,9 @@ ctc->setIntReg(TheISA::SyscallPseudoReturnReg, 1); #endif -ctc->pcState(tc->nextInstAddr()); +TheISA::PCState cpc = tc->pcState(); +cpc.advance(); +ctc->pcState(cpc); ctc->activate(); return cp->pid(); -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/15417 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ice53831920bcb5d198865169ed2cca8d06e37cfe Gerrit-Change-Number: 15417 Gerrit-PatchSet: 3 Gerrit-Owner: Andreas Sandberg Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Brandon Potter Gerrit-Reviewer: Jason Lowe-Power Gerrit-CC: Giacomo Travaglini Gerrit-MessageType: merged ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: sim-se: Use CONFIG_CLONE_BACKWARDS for Arm
Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/15416 ) Change subject: sim-se: Use CONFIG_CLONE_BACKWARDS for Arm .. sim-se: Use CONFIG_CLONE_BACKWARDS for Arm Linxu on Arm users the CLONE_BACKWARDS argument order for the clone syscall. Change-Id: I48deb4f03140c9d4ef7a89e3e33813e76777f999 Signed-off-by: Andreas Sandberg Cc: Giacomo Travaglini Cc: Javier Setoain Cc: Brandon Potter Reviewed-on: https://gem5-review.googlesource.com/c/15416 Reviewed-by: Brandon Potter Reviewed-by: Jason Lowe-Power Maintainer: Brandon Potter --- M src/sim/syscall_emul.hh 1 file changed, 2 insertions(+), 2 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved Brandon Potter: Looks good to me, but someone else must approve; Looks good to me, approved diff --git a/src/sim/syscall_emul.hh b/src/sim/syscall_emul.hh index ba607c9..1ff0460 100644 --- a/src/sim/syscall_emul.hh +++ b/src/sim/syscall_emul.hh @@ -1273,9 +1273,9 @@ TheISA::IntReg newStack = p->getSyscallArg(tc, index); Addr ptidPtr = p->getSyscallArg(tc, index); -#if THE_ISA == RISCV_ISA +#if THE_ISA == RISCV_ISA or THE_ISA == ARM_ISA /** - * Linux kernel 4.15 sets CLONE_BACKWARDS flag for RISC-V. + * Linux sets CLONE_BACKWARDS flag for RISC-V and Arm. * The flag defines the list of clone() arguments in the following * order: flags -> newStack -> ptidPtr -> tlsPtr -> ctidPtr */ -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/15416 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I48deb4f03140c9d4ef7a89e3e33813e76777f999 Gerrit-Change-Number: 15416 Gerrit-PatchSet: 2 Gerrit-Owner: Andreas Sandberg Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Brandon Potter Gerrit-Reviewer: Jason Lowe-Power Gerrit-CC: Giacomo Travaglini Gerrit-MessageType: merged ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: arch-arm, sim-se: Wire up syscalls needed for pthreads
Andreas Sandberg has submitted this change and it was merged. (
https://gem5-review.googlesource.com/c/public/gem5/+/15415 )
Change subject: arch-arm, sim-se: Wire up syscalls needed for pthreads
..
arch-arm, sim-se: Wire up syscalls needed for pthreads
Change-Id: I8da5e3e0d7dc5d31ac82ed2045109d6d73cbf99d
Signed-off-by: Andreas Sandberg
Cc: Giacomo Travaglini
Cc: Javier Setoain
Cc: Brandon Potter
Reviewed-on: https://gem5-review.googlesource.com/c/15415
Reviewed-by: Brandon Potter
Maintainer: Brandon Potter
---
M src/arch/arm/linux/process.cc
1 file changed, 26 insertions(+), 18 deletions(-)
Approvals:
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
Brandon Potter: Looks good to me, approved; Looks good to me, approved
diff --git a/src/arch/arm/linux/process.cc b/src/arch/arm/linux/process.cc
index 2c64a46..cb62e6e 100644
--- a/src/arch/arm/linux/process.cc
+++ b/src/arch/arm/linux/process.cc
@@ -132,7 +132,7 @@
/* 8 */ SyscallDesc("creat", unimplementedFunc),
/* 9 */ SyscallDesc("link", unimplementedFunc),
/* 10 */ SyscallDesc("unlink", unlinkFunc),
-/* 11 */ SyscallDesc("execve", unimplementedFunc),
+/* 11 */ SyscallDesc("execve", execveFunc),
/* 12 */ SyscallDesc("chdir", unimplementedFunc),
/* 13 */ SyscallDesc("time", timeFunc),
/* 14 */ SyscallDesc("mknod", unimplementedFunc),
@@ -262,7 +262,11 @@
/* 138 */ SyscallDesc("setfsuid", unimplementedFunc),
/* 139 */ SyscallDesc("setfsgid", unimplementedFunc),
/* 140 */ SyscallDesc("llseek", _llseekFunc),
+#if defined(SYS_getdents)
+/* 141 */ SyscallDesc("getdents", getdentsFunc),
+#else
/* 141 */ SyscallDesc("getdents", unimplementedFunc),
+#endif
/* 142 */ SyscallDesc("newselect", unimplementedFunc),
/* 143 */ SyscallDesc("flock", unimplementedFunc),
/* 144 */ SyscallDesc("msync", unimplementedFunc),
@@ -341,11 +345,11 @@
/* 217 */ SyscallDesc("getdents64", unimplementedFunc),
/* 218 */ SyscallDesc("pivot_root", unimplementedFunc),
/* 219 */ SyscallDesc("mincore", unimplementedFunc),
-/* 220 */ SyscallDesc("madvise", unimplementedFunc),
+/* 220 */ SyscallDesc("madvise", ignoreFunc),
/* 221 */ SyscallDesc("fcntl64", fcntl64Func),
/* 222 */ SyscallDesc("unused#222", unimplementedFunc),
/* 223 */ SyscallDesc("unknown#223", unimplementedFunc),
-/* 224 */ SyscallDesc("gettid", unimplementedFunc),
+/* 224 */ SyscallDesc("gettid", gettidFunc),
/* 225 */ SyscallDesc("readahead", unimplementedFunc),
/* 226 */ SyscallDesc("setxattr", unimplementedFunc),
/* 227 */ SyscallDesc("lsetxattr", unimplementedFunc),
@@ -361,9 +365,9 @@
/* 237 */ SyscallDesc("fremovexattr", unimplementedFunc),
/* 238 */ SyscallDesc("tkill", unimplementedFunc),
/* 239 */ SyscallDesc("sendfile64", unimplementedFunc),
-/* 240 */ SyscallDesc("futex", ignoreFunc, SyscallDesc::WarnOnce),
+/* 240 */ SyscallDesc("futex", futexFunc),
/* 241 */ SyscallDesc("sched_setaffinity", unimplementedFunc),
-/* 242 */ SyscallDesc("sched_getaffinity", unimplementedFunc),
+/* 242 */ SyscallDesc("sched_getaffinity", ignoreFunc),
/* 243 */ SyscallDesc("io_setup", unimplementedFunc),
/* 244 */ SyscallDesc("io_destroy", unimplementedFunc),
/* 245 */ SyscallDesc("io_getevents", unimplementedFunc),
@@ -377,7 +381,7 @@
/* 253 */ SyscallDesc("remap_file_pages", unimplementedFunc),
/* 254 */ SyscallDesc("unused#254", unimplementedFunc),
/* 255 */ SyscallDesc("unused#255", unimplementedFunc),
-/* 256 */ SyscallDesc("set_tid_address", unimplementedFunc),
+/* 256 */ SyscallDesc("set_tid_address", setTidAddressFunc),
/* 257 */ SyscallDesc("timer_create", unimplementedFunc),
/* 258 */ SyscallDesc("timer_settime", unimplementedFunc),
/* 259 */ SyscallDesc("timer_gettime", unimplementedFunc),
@@ -389,7 +393,7 @@
/* 265 */ SyscallDesc("clock_nanosleep", unimplementedFunc),
/* 266 */ SyscallDesc("statfs64", unimplementedFunc),
/* 267 */ SyscallDesc("fstatfs64", unimplementedFunc),
-/* 268 */ SyscallDesc("tgkill", unimplementedFunc),
+/* 268 */ SyscallDesc("tgkill", tgkillFunc),
/* 269 */ SyscallDesc("utimes", unimplementedFunc),
/* 270 */ SyscallDesc("arm_fadvise64_64", unimplementedFunc),
/* 271 */ SyscallDesc("pciconfig_iobase", unimplementedFunc),
@@ -459,7 +463,7 @@
/* 335 */ SyscallDesc("pselect6", unimplementedFunc),
/* 336 */ SyscallDesc("ppoll", unimplementedFunc),
/* 337 */ SyscallDesc("unshare", unimplementedFunc),
-/* 338 */ SyscallDesc("set_robust_list", unimplementedFunc),
+/* 338 */ SyscallDesc("set_robust_list", ignoreFunc),
/* 339 */ SyscallDesc("get_robust_list", unimplementedFunc),
/* 340 */ SyscallDesc("splice", unimplementedFunc),
/* 341 */ SyscallDesc("arm_sync_file_range", unimplementedFunc),
@@
[gem5-dev] Change in gem5/gem5[master]: scons: added support of default Python installation on MacOS
Hello Gabe Black, Andrea Mondelli, Jason Lowe-Power, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/15475 to look at the new patch set (#2). Change subject: scons: added support of default Python installation on MacOS .. scons: added support of default Python installation on MacOS Recent MacOS versions are distributed with python 2.7. This version of python is sufficient to compile and run gem5. This patch allows to use the default python instead of the version provided by third-party tools (e.g., brew) The default MacOS LLDB debugger is linked against the default python installation, which conflicts with Python framework provided by third-party package systems. This patch removes the need of gem5 to have multiple python installations on MacOS, if not explicitly installed. Change-Id: I98f24804149cb2e04ca432c66d2f57e0296af7b2 --- M SConstruct 1 file changed, 5 insertions(+), 1 deletion(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/15475 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I98f24804149cb2e04ca432c66d2f57e0296af7b2 Gerrit-Change-Number: 15475 Gerrit-PatchSet: 2 Gerrit-Owner: Andrea Mondelli Gerrit-Reviewer: Andrea Mondelli Gerrit-Reviewer: Andrea Mondelli Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Jason Lowe-Power Gerrit-CC: Andreas Sandberg Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add a VExpress_GEM5_V2 platform with GICv3 support
Giacomo Travaglini has submitted this change and it was merged. (
https://gem5-review.googlesource.com/c/public/gem5/+/14255 )
Change subject: dev-arm: Add a VExpress_GEM5_V2 platform with GICv3 support
..
dev-arm: Add a VExpress_GEM5_V2 platform with GICv3 support
Change-Id: I6fd14138d94654e8e60cde08239ea9a50fc19eb7
Reviewed-on: https://gem5-review.googlesource.com/c/14255
Maintainer: Andreas Sandberg
Reviewed-by: Andreas Sandberg
Reviewed-by: Giacomo Travaglini
---
M configs/common/FSConfig.py
M src/dev/arm/RealView.py
2 files changed, 41 insertions(+), 12 deletions(-)
Approvals:
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
Giacomo Travaglini: Looks good to me, approved
diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py
index 6747616..e4babbc 100644
--- a/configs/common/FSConfig.py
+++ b/configs/common/FSConfig.py
@@ -330,7 +330,10 @@
self.realview.setupBootLoader(None, self, binary)
else:
self.realview.setupBootLoader(self.membus, self, binary)
-self.gic_cpu_addr = self.realview.gic.cpu_addr
+
+if hasattr(self.realview.gic, 'cpu_addr'):
+self.gic_cpu_addr = self.realview.gic.cpu_addr
+
self.flags_addr = self.realview.realview_io.pio_addr + 0x30
# This check is for users who have previously put 'android' in
diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index 0ed7780..60ae5aa 100644
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -853,7 +853,7 @@
cur_sys.atags_addr = 0x800
cur_sys.load_offset = 0x8000
-class VExpress_GEM5_V1_Base(RealView):
+class VExpress_GEM5_Base(RealView):
"""
The VExpress gem5 memory map is loosely based on a modified
Versatile Express RS1 memory map.
@@ -967,14 +967,6 @@
dcc = CoreTile2A15DCC()
### On-chip devices ###
-gic = kvm_gicv2_class(dist_addr=0x2c001000, cpu_addr=0x2c002000,
- it_lines=512)
-vgic = VGic(vcpu_addr=0x2c006000, hv_addr=0x2c004000, ppint=25)
-gicv2m = Gicv2m()
-gicv2m.frames = [
-Gicv2mFrame(spi_base=256, spi_len=64, addr=0x2c1c),
-]
-
generic_timer = GenericTimer(int_phys_s=ArmPPI(num=29),
int_phys_ns=ArmPPI(num=30),
int_virt=ArmPPI(num=27),
@@ -982,7 +974,6 @@
def _on_chip_devices(self):
return [
-self.gic, self.vgic, self.gicv2m,
self.generic_timer,
]
@@ -1049,7 +1040,7 @@
def generateDeviceTree(self, state):
# Generate using standard RealView function
-dt = list(super(VExpress_GEM5_V1_Base,
self).generateDeviceTree(state))
+dt = list(super(VExpress_GEM5_Base,
self).generateDeviceTree(state))
if len(dt) > 1:
raise Exception("System returned too many DT nodes")
node = dt[0]
@@ -1061,6 +1052,19 @@
yield node
+class VExpress_GEM5_V1_Base(VExpress_GEM5_Base):
+gic = kvm_gicv2_class(dist_addr=0x2c001000, cpu_addr=0x2c002000,
+ it_lines=512)
+vgic = VGic(vcpu_addr=0x2c006000, hv_addr=0x2c004000, ppint=25)
+gicv2m = Gicv2m()
+gicv2m.frames = [
+Gicv2mFrame(spi_base=256, spi_len=64, addr=0x2c1c),
+]
+
+def _on_chip_devices(self):
+return super(VExpress_GEM5_V1_Base,self)._on_chip_devices() + [
+self.gic, self.vgic, self.gicv2m,
+]
class VExpress_GEM5_V1(VExpress_GEM5_V1_Base):
hdlcd = HDLcd(pxl_clk=VExpress_GEM5_V1_Base.dcc.osc_pxl,
@@ -1070,3 +1074,25 @@
return super(VExpress_GEM5_V1,self)._on_chip_devices() + [
self.hdlcd,
]
+
+class VExpress_GEM5_V2_Base(VExpress_GEM5_Base):
+gic = Gicv3()
+
+def _on_chip_devices(self):
+return super(VExpress_GEM5_V2_Base,self)._on_chip_devices() + [
+self.gic,
+]
+
+def setupBootLoader(self, mem_bus, cur_sys, loc):
+cur_sys.boot_loader = [ loc('boot_emm_v2.arm64') ]
+super(VExpress_GEM5_V2_Base,self).setupBootLoader(mem_bus,
+cur_sys, loc)
+
+class VExpress_GEM5_V2(VExpress_GEM5_V2_Base):
+hdlcd = HDLcd(pxl_clk=VExpress_GEM5_V2_Base.dcc.osc_pxl,
+ pio_addr=0x2b00, int_num=95)
+
+def _on_chip_devices(self):
+return super(VExpress_GEM5_V2,self)._on_chip_devices() + [
+self.hdlcd,
+]
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/14255
To unsubscribe, or for help writing mail filters, visit
https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I6fd14138d94654e8e60cde08239ea9a50fc19eb7
Gerrit-Change-Number: 14255
Gerrit-PatchSet: 10
Gerrit-Owner: Jairo Balart
Gerrit-Assignee: Giacomo Travaglini
Gerrit-Reviewer: Andreas
[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add a GICv3 model
Hello Giacomo Travaglini, Andreas Sandberg, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/13436 to look at the new patch set (#11). Change subject: dev-arm: Add a GICv3 model .. dev-arm: Add a GICv3 model Change-Id: Ib0067fc743f84ff7be9f12d2fc33ddf63736bdd1 --- M src/arch/arm/isa.cc M src/arch/arm/isa.hh M src/arch/arm/miscregs.cc M src/arch/arm/miscregs.hh M src/arch/arm/system.cc M src/arch/arm/system.hh M src/base/bitfield.hh M src/dev/arm/Gic.py M src/dev/arm/SConscript M src/dev/arm/base_gic.cc M src/dev/arm/base_gic.hh A src/dev/arm/gic_v3.cc A src/dev/arm/gic_v3.hh A src/dev/arm/gic_v3_cpu_interface.cc A src/dev/arm/gic_v3_cpu_interface.hh A src/dev/arm/gic_v3_distributor.cc A src/dev/arm/gic_v3_distributor.hh A src/dev/arm/gic_v3_redistributor.cc A src/dev/arm/gic_v3_redistributor.hh 19 files changed, 6,811 insertions(+), 9 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/13436 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ib0067fc743f84ff7be9f12d2fc33ddf63736bdd1 Gerrit-Change-Number: 13436 Gerrit-PatchSet: 11 Gerrit-Owner: Jairo Balart Gerrit-Assignee: Giacomo Travaglini Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Jairo Balart Gerrit-CC: Matteo Andreozzi Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: scons: added support of default Python installation on MacOS
Hello Andrea Mondelli, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/15475 to review the following change. Change subject: scons: added support of default Python installation on MacOS .. scons: added support of default Python installation on MacOS Recent MacOS versions are distributed with python 2.7. This version of python is sufficient to compile and run gem5. This patch allows to use the default python instead of the version provided by third-party tools (e.g., brew) The default MacOS LLDB debugger is linked against the default python installation, which conflicts with Python framework provided by third-party package systems. This patch removes the need of gem5 to have multiple python installations on MacOS, if not explicitly installed. Change-Id: I98f24804149cb2e04ca432c66d2f57e0296af7b2 --- M SConstruct 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/SConstruct b/SConstruct index 0a8cd0e..279823e 100755 --- a/SConstruct +++ b/SConstruct @@ -712,7 +712,11 @@ exception='').split() # Strip the -I from the include folders before adding them to the # CPPPATH -main.Append(CPPPATH=map(lambda inc: inc[2:], py_includes)) +if len(filter(lambda x: x == '-iwithsysroot', py_includes)) > 0: +# Default MacOS Python +main.Append(CPPPATH=py_includes) +else: +main.Append(CPPPATH=map(lambda inc: inc[2:], py_includes)) # Read the linker flags and split them into libraries and other link # flags. The libraries are added later through the call the CheckLib. -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/15475 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I98f24804149cb2e04ca432c66d2f57e0296af7b2 Gerrit-Change-Number: 15475 Gerrit-PatchSet: 1 Gerrit-Owner: Andrea Mondelli Gerrit-Reviewer: Andrea Mondelli Gerrit-MessageType: newchange ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: misc: updated shabang for python script
Hello Andrea Mondelli, Jason Lowe-Power, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/15375 to look at the new patch set (#2). Change subject: misc: updated shabang for python script .. misc: updated shabang for python script The default python on MacOS doesn’t have an alias to python2. The official python version supported in gem5 is Python2.7. This patch updates the shabang according to the version required in gem5. Change-Id: I9533c0f7858b5b3cab0ef101be1ee5cd718105b0 --- M ext/mcpat/regression/regression.py M ext/mcpat/regression/verify_output.py M ext/ply/example/classcalc/calc.py M ext/ply/example/newclasscalc/calc.py M src/systemc/tests/verify.py M src/unittest/genini.py M tests/main.py M tests/testing/__init__.py M tests/testing/helpers.py M tests/testing/results.py M tests/testing/tests.py M tests/testing/units.py M tests/tests.py M util/batch/job.py M util/batch/send.py M util/checkpoint-tester.py M util/compile M util/cpt_upgrader.py M util/decode_inst_dep_trace.py M util/decode_inst_trace.py M util/decode_packet_trace.py M util/encode_inst_dep_trace.py M util/encode_packet_trace.py M util/find_copyrights.py M util/gen_arm_fs_files.py M util/git-pre-commit.py M util/hgstyle.py M util/maint/list_changes.py M util/maint/show_changes_by_file.py M util/memtest-soak.py M util/minorview.py M util/o3-pipeview.py M util/oprofile-top.py M util/pbs/job.py M util/pbs/send.py M util/plot_dram/dram_lat_mem_rd_plot.py M util/plot_dram/dram_sweep_plot.py M util/protolib.py M util/qdo M util/regress M util/slicc M util/stats/stats.py M util/streamline/m5stats2streamline.py M util/style.py M util/style/__init__.py M util/style/repo.py M util/style/sort_includes.py M util/style/style.py M util/style/verifiers.py 49 files changed, 49 insertions(+), 49 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/15375 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I9533c0f7858b5b3cab0ef101be1ee5cd718105b0 Gerrit-Change-Number: 15375 Gerrit-PatchSet: 2 Gerrit-Owner: Andrea Mondelli Gerrit-Reviewer: Andrea Mondelli Gerrit-Reviewer: Andrea Mondelli Gerrit-Reviewer: Jason Lowe-Power Gerrit-CC: Andreas Sandberg Gerrit-CC: Gabe Black Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: base: Make it possible to convert strings to enums
Giacomo Travaglini has submitted this change and it was merged. (
https://gem5-review.googlesource.com/c/public/gem5/+/15336 )
Change subject: base: Make it possible to convert strings to enums
..
base: Make it possible to convert strings to enums
The __to_number helper function defined in base/str.hh is used by
unserializing code. Its purpose is to convert a string into an
integral/floating point number. Since enums underlying type can only be
an integer type, it makes sense to extend the helper function for enums
as well. In this way it will be possible to unserialize Enums and
containers of Enums without the need of casting.
Change-Id: I74069cc4c04ec8b5eb80939acea7ab18fb366dd4
Signed-off-by: Giacomo Travaglini
Reviewed-by: Ciro Santilli
Reviewed-by: Andreas Sandberg
Reviewed-by: Nikos Nikoleris
Reviewed-on: https://gem5-review.googlesource.com/c/15336
Reviewed-by: Gabe Black
Maintainer: Andreas Sandberg
---
M src/base/str.hh
1 file changed, 8 insertions(+), 3 deletions(-)
Approvals:
Gabe Black: Looks good to me, approved
Andreas Sandberg: Looks good to me, approved
diff --git a/src/base/str.hh b/src/base/str.hh
index 52ab977..61022bd 100644
--- a/src/base/str.hh
+++ b/src/base/str.hh
@@ -1,4 +1,7 @@
/*
+ * Copyright (c) 2018 ARM Limited
+ * All rights reserved
+ *
* Copyright (c) 2001-2005 The Regents of The University of Michigan
* All rights reserved.
*
@@ -102,10 +105,11 @@
* @{
*
* @name String to number helper functions for signed and unsigned
- * integeral type, as well as floating-point types.
+ * integeral type, as well as enums and floating-point types.
*/
template
-typename std::enable_if::value &&
+typename std::enable_if<(std::is_integral::value ||
+std::is_enum::value) &&
std::is_signed::value, T>::type
__to_number(const std::string )
{
@@ -117,7 +121,8 @@
}
template
-typename std::enable_if::value &&
+typename std::enable_if<(std::is_integral::value ||
+std::is_enum::value) &&
!std::is_signed::value, T>::type
__to_number(const std::string )
{
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/15336
To unsubscribe, or for help writing mail filters, visit
https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I74069cc4c04ec8b5eb80939acea7ab18fb366dd4
Gerrit-Change-Number: 15336
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini
Gerrit-Reviewer: Andreas Sandberg
Gerrit-Reviewer: Ciro Santilli
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Nikos Nikoleris
Gerrit-MessageType: merged
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[gem5-dev] Cron /z/m5/regression/do-regression quick
* build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/minor-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing-ruby: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-atomic: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/o3-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64f/o3-timing: FAILED! * build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/minor-timing: CHANGED! * build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing: CHANGED! * build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing-mt: CHANGED! * build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby: CHANGED! * build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-simple: CHANGED! * build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-atomic: CHANGED! * build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-two-level: CHANGED! * build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing: CHANGED! * build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual: CHANGED! * build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing: CHANGED!*** diff[system.terminal]: SKIPPED * build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic: CHANGED! * build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual: CHANGED!*** diff[config.ini]: SKIPPED * build/ALPHA/tests/opt/quick/fs/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic: CHANGED! * build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-simple: CHANGED! * build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-atomic: CHANGED! * build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing: CHANGED! *** diff[config.ini]: SKIPPED* build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-two-level: CHANGED! * build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby: CHANGED!* build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing: CHANGED! * build/NULL/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby: CHANGED! * build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl: CHANGED! *** stat_diff: FAILURE: Statistics mismatch* build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem: CHANGED! * build/NULL/tests/opt/quick/se/80.dram-closepage/null/none/dram-lowp: CHANGED! * build/NULL/tests/opt/quick/se/80.dram-openpage/null/none/dram-lowp: CHANGED! * build/NULL_MOESI_hammer/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_hammer: CHANGED! * build/NULL_MESI_Two_Level/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MESI_Two_Level: CHANGED! * build/NULL_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_CMP_directory: CHANGED! * build/NULL_MOESI_CMP_token/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_CMP_token: CHANGED! *** diff[simout]: SKIPPED* build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing: CHANGED! * build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic: CHANGED! * build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic: CHANGED! * build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby: CHANGED! * build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing: CHANGED! * build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-simple: CHANGED! *** diff[config.ini]: SKIPPED--- quick/se/02.insttest/sparc/linux/simple-atomic ---* build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing: CHANGED! * build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic: CHANGED! * build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing: CHANGED! * build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-two-level: CHANGED! * build/SPARC/tests/opt/quick/se/10.mcf/sparc/linux/simple-atomic: CHANGED! * build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp: CHANGED! * build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp: CHANGED! * build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp: CHANGED! * build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-timing: CHANGED! * build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-atomic: CHANGED! * build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-atomic: CHANGED! * build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing:
