[gem5-dev] Change in gem5/gem5[refs/meta/config]: misc: Updated Gerrit permissions to restrict editing of master

2020-02-12 Thread Bobby R. Bruce (Gerrit) 
Bobby R. Bruce has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/25323 )


Change subject: misc: Updated Gerrit permissions to restrict editing of  
master

..

misc: Updated Gerrit permissions to restrict editing of master

In order to keep the `master` branch stable (and migrate development
work to the `develop` branch), the Gerrit permissions have been updated
so that master is read-only (this will need to be writable to
maintainers during a release).

Jira: https://gem5.atlassian.net/browse/GEM5-269
Change-Id: Id41c5410f841e58f3dced2331bea6a90a40e1b42
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25323
Reviewed-by: Bobby R. Bruce 
Maintainer: Bobby R. Bruce 
Tested-by: Bobby R. Bruce 
---
M groups
M project.config
2 files changed, 21 insertions(+), 0 deletions(-)

Approvals:
  Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved;  
Regressions pass




diff --git a/groups b/groups
index 831dba4..5c3e44b 100644
--- a/groups
+++ b/groups
@@ -2,6 +2,7 @@
 #
 9f2af4ea8cc5420a3b5522f7bb443767552e7124   build-bots
 global:Project-Owners 	Project  
Owners
+global:Registered-Users   	Registered  
Users
 google:AI2Pq9p37HHM5dMXVBUchyYaIdDBMY0sESt44wvYMxS3DKM_l8KyVdo	 
google/cloudci-rob...@google.com
 google:AI2Pq9qSiOlnnqcg5bMFxvrjLybzGAL6daxVAEF20YuIMIMysspMB4Y	 
google/gem5-adm...@googlegroups.com

 mdb:kokoro mdb/kokoro
diff --git a/project.config b/project.config
index 67c34da..5f8a143 100644
--- a/project.config
+++ b/project.config
@@ -14,3 +14,23 @@
 [access "refs/meta/config"]
label-Verified = -1..+1 group Project Owners
label-Verified = -1..+1 group google/gem5-adm...@googlegroups.com
+[access "refs/for/master"]
+   addPatchSet = deny group Project Owners
+   addPatchSet = deny group Registered Users
+   addPatchSet = deny group google/gem5-adm...@googlegroups.com
+   push = deny group Project Owners
+   push = deny group Registered Users
+   push = deny group google/gem5-adm...@googlegroups.com
+   submit = deny group Project Owners
+   submit = deny group Registered Users
+   submit = deny group google/gem5-adm...@googlegroups.com
+[access "refs/heads/master"]
+   addPatchSet = deny group Project Owners
+   addPatchSet = deny group Registered Users
+   addPatchSet = deny group google/gem5-adm...@googlegroups.com
+   push = deny group Project Owners
+   push = deny group Registered Users
+   push = deny group google/gem5-adm...@googlegroups.com
+   submit = deny group Project Owners
+   submit = deny group Registered Users
+   submit = deny group google/gem5-adm...@googlegroups.com

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Gerrit-Project: public/gem5
Gerrit-Branch: refs/meta/config
Gerrit-Change-Id: Id41c5410f841e58f3dced2331bea6a90a40e1b42
Gerrit-Change-Number: 25323
Gerrit-PatchSet: 3
Gerrit-Owner: Bobby R. Bruce 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-MessageType: merged
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[gem5-dev] Master-As-Stable now in effect; gem5 19 to be released

2020-02-12 Thread Bobby Bruce 
Dear all,

The master branch is now set as stable. I.e., the master branch cannot be
directly contributed to (assuming I have setup the permissions correctly).
Instead, development will now occur atop the new develop branch.

Also: we'll soon be releasing gem5 19. This is a special 'baseline" release
of gem5, and not intended to be released with much fanfare. A "draft" of
this release can be found on the branch "release-staging-v19.0.0.0". In a
week's time, this will be merged into the master branch, and the master
branch tagged as the official stable gem5 19 release.

We will be running tests on this draft and encourage members of the gem5
community to evaluate this release. If there is a problem you believe are
pressing then please feel free to bring these problems to our attention, or
submit a changeset to this branch on Gerrit for evaluation (git push origin
HEAD:refs/for/release-staging-v19.0.0.0). It should be noted, that we'll
only consider a "last-minute" change to be incorporated into this release
if there is a good case that  it cannot wait for gem5 20 (which will be
released in a couple of month's time).

Outlined below is a helpful Q style guide to help anyone with questions
about the master-as-stable git/gerrit change, and the gem5 19 release:


What's happening?

Two things! First, the gem5 git repository is moving to a master-as-stable
structure. This means that the master branch HEAD will contain the latest
gem5 release. Code in development will exist on a new "develop" branch.
Secondly, gem5 19 will be launched soon (on the master branch). At present
it exists on the "release-staging-v19.0.0.0" branch.

--
When's this happening?
--
The master-as-stable git setup is already in effect. gem5 19 will be
launched ASAP (hopefully within the next week). A draft version of gem5 19
can be found on the release-staging-v19.0.0.0

branch.

---
How will this affect my development?
---
For most developers? Not very much at. You will not be able to commit
changes to the master branch anymore. Instead, when pushing changes you
should use:

git push origin HEAD:refs/for/develop
(instead of ... HEAD:refs/for/master)

We strongly advise you rebase on top of develop before pushing:

git rebase origin/develop

To avoid problems going forward, we'd suggest you move all development on
your local systems over to the development branch:

git checkout --track origin/develop

If you have a change pending submission within gerrit then you must move
the change. This can be done by navigating to your change (e.g.,
https://gem5-review.googlesource.com/c/public/gem5/+/24804), then selecting
"Move Change" from the options (top right, under the three-dots). From
there, the change may be moved to the develop branch. If your change exists
within a relation chain then all non-submitted changes within the chain
should also be moved.

gem5 releases will occur three times a year. gem5 developers will not need
to do anything special to be considered for a release. Assuming a change is
successfully submitted to the develop branch, it will be included in the
next gem5 release (given our goal of releasing three times a year, this
should mean a change will take no more than four months to be incorporated
into a stable release). For more information on how releases will be
carried out, please consult or contributing guide:
https://gem5.googlesource.com/public/gem5/+/refs/heads/master/CONTRIBUTING.md
.

-
I think there's a change that should be included in gem5 19. What do I do?
-

Over the next week or so we'll accept "last-minute" changed into the gem5
19 release. Though, these changes should have good justification for
needing to be part of this release in that they can't wait a few months for
gem5 20 (e.g., major bug fixes, stability improvements, etc). To submit a
change to the gem5 19 release:

git push origin HEAD:refs/for/release-staging-v19.0.0.0

This will go through the regular gem5 Gerrit review as with any other
change.

--
Anything else?
--
Going forward, we would encourage those using gem5 to obtain the latest
stable release (i.e., pull the latest master branch) and, if publishing
results, note the the version used. One of our primary goals with having
official, stable releases is to ensure results can be more easily
replicated.

-
I'm having problems...
-
It's hoped this transition goes smoothly, but if any issues are encountered
then please feel free to email me directly (b.br...@ucdavis.edu). I'll work
with you to try to resolve any issues :)

Kind regards,
Bobby
--
Dr. Bobby R. Bruce
Room 2235,
Kemper Hall, UC Davis
Davis,
CA, 95616

web: https://www.bobbybruce.net
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[gem5-dev] Change in gem5/gem5[refs/meta/config]: Review access change

2020-02-12 Thread Bobby R. Bruce (Gerrit) 
Bobby R. Bruce has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/25323 )



Change subject: Review access change
..

Review access change

Change-Id: Id41c5410f841e58f3dced2331bea6a90a40e1b42
---
M groups
M project.config
2 files changed, 21 insertions(+), 0 deletions(-)



diff --git a/groups b/groups
index 831dba4..5c3e44b 100644
--- a/groups
+++ b/groups
@@ -2,6 +2,7 @@
 #
 9f2af4ea8cc5420a3b5522f7bb443767552e7124   build-bots
 global:Project-Owners 	Project  
Owners
+global:Registered-Users   	Registered  
Users
 google:AI2Pq9p37HHM5dMXVBUchyYaIdDBMY0sESt44wvYMxS3DKM_l8KyVdo	 
google/cloudci-rob...@google.com
 google:AI2Pq9qSiOlnnqcg5bMFxvrjLybzGAL6daxVAEF20YuIMIMysspMB4Y	 
google/gem5-adm...@googlegroups.com

 mdb:kokoro mdb/kokoro
diff --git a/project.config b/project.config
index 67c34da..5f8a143 100644
--- a/project.config
+++ b/project.config
@@ -14,3 +14,23 @@
 [access "refs/meta/config"]
label-Verified = -1..+1 group Project Owners
label-Verified = -1..+1 group google/gem5-adm...@googlegroups.com
+[access "refs/for/master"]
+   addPatchSet = deny group Project Owners
+   addPatchSet = deny group Registered Users
+   addPatchSet = deny group google/gem5-adm...@googlegroups.com
+   push = deny group Project Owners
+   push = deny group Registered Users
+   push = deny group google/gem5-adm...@googlegroups.com
+   submit = deny group Project Owners
+   submit = deny group Registered Users
+   submit = deny group google/gem5-adm...@googlegroups.com
+[access "refs/heads/master"]
+   addPatchSet = deny group Project Owners
+   addPatchSet = deny group Registered Users
+   addPatchSet = deny group google/gem5-adm...@googlegroups.com
+   push = deny group Project Owners
+   push = deny group Registered Users
+   push = deny group google/gem5-adm...@googlegroups.com
+   submit = deny group Project Owners
+   submit = deny group Registered Users
+   submit = deny group google/gem5-adm...@googlegroups.com

--
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Gerrit-Project: public/gem5
Gerrit-Branch: refs/meta/config
Gerrit-Change-Id: Id41c5410f841e58f3dced2331bea6a90a40e1b42
Gerrit-Change-Number: 25323
Gerrit-PatchSet: 1
Gerrit-Owner: Bobby R. Bruce 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[master]: misc: Removed old contribution guidelines regarding branches

2020-02-12 Thread Bobby R. Bruce (Gerrit) 
Bobby R. Bruce has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/24803 )


Change subject: misc: Removed old contribution guidelines regarding branches
..

misc: Removed old contribution guidelines regarding branches

This is old, outdated information. It has largely been replaced by:
https://gem5-review.googlesource.com/c/public/gem5/+/24263

Change-Id: I2f232cd1b3133f94434f4f12b1206dabaf339899
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24803
Reviewed-by: Daniel Carvalho 
Reviewed-by: Jason Lowe-Power 
Reviewed-by: Matt Sinclair 
Maintainer: Bobby R. Bruce 
Tested-by: kokoro 
---
M CONTRIBUTING.md
1 file changed, 0 insertions(+), 17 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved
  Matt Sinclair: Looks good to me, but someone else must approve
  Daniel Carvalho: Looks good to me, but someone else must approve
  Bobby R. Bruce: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index e7c743e..9e34f60 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -78,19 +78,6 @@
 community. Additionally, the maintainer for that part of the code must  
sign off

 on it.

-Contributing long-lived feature branches
-
-Oftentimes users or institutions add features that are necessarily complex,
-and require many changes on long-lived feature branches. In this case,
-maintaining a perfect history where all changes work individually is  
infeasible.
-When contributing long-lived feature branches back to gem5's public  
repository
-users may merge entire long-lived branches into a single changeset and  
contribute
-their code back as long as 1) the changes have been reviewed by the  
maintainer
-2) the maintainer agrees to allow such a change, and 3) the changes are  
passing

-the public tests. Changes that affect common code (outside of a specific
-maintainer's purview) will still need to follow the standard gem5 protocol.
-
-
 Cloning the gem5 repo to contribute
 ===

@@ -111,10 +98,6 @@
  * public/m5threads: The code for a pthreads implementation that works with
gem5's syscall emulation mode.

-Other gem5 branches

-
-None right now.

 Making changes to gem5
 ==

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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I2f232cd1b3133f94434f4f12b1206dabaf339899
Gerrit-Change-Number: 24803
Gerrit-PatchSet: 2
Gerrit-Owner: Bobby R. Bruce 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Matt Sinclair 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[master]: misc: Updated CONTRIBUTING.md to discuss releases and hotfixes

2020-02-12 Thread Bobby R. Bruce (Gerrit) 
Bobby R. Bruce has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/24843 )


Change subject: misc: Updated CONTRIBUTING.md to discuss releases and  
hotfixes

..

misc: Updated CONTRIBUTING.md to discuss releases and hotfixes

A new section in CONTRIBUTING.md has been added to discuss the
proceedure for how releases are carried out, as well as hotfixes.

Jira: https://gem5.atlassian.net/browse/GEM5-297
Change-Id: I49e7d6e41e8a6d5387c839eb26263e86dd52c294
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24843
Reviewed-by: Daniel Carvalho 
Reviewed-by: Jason Lowe-Power 
Maintainer: Bobby R. Bruce 
Tested-by: kokoro 
---
M CONTRIBUTING.md
1 file changed, 62 insertions(+), 0 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved
  Daniel Carvalho: Looks good to me, but someone else must approve
  Bobby R. Bruce: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index 2a24f05..08619cb 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -481,3 +481,65 @@
intervention by the PMC are undesirable. Attempts should be made to  
resolve
disagreements via respectful and polite discourse before being  
escalated to

this level.
+
+Releases
+
+
+gem5 releases occur 3 times per year. The procedure for releasing gem5 is  
as

+follows:
+
+1. Developers will be notified, via the gem5-dev mailing list, that a new
+release of gem5 will occur. This should be no sooner than 2 weeks prior to  
the
+expected release date. This gives time for developers to ensure their  
changes

+for the next release are submitted to the develop branch.
+2. When a release is ready, a new staging branch shall be created by a  
project

+maintainer, from develop, with the name "release-staging-{VERSION}".
+The gem5-dev mailing list will be notified that, unless justifiable  
objections
+are made, the staging branch will be merged into the master branch within  
the

+next week, thus marking the new release.
+3. The staging branch will have the full suite of gem5 tests run on it to
+ensure all tests pass and the to-be-released code is in a decent state.
+4. If reasonable concerns about the state of the staging branch are made by
+members of the gem5 community, then time shall be given for project
+contributors to rectify these concerns on the develop branch. After these
+changes have been incorporated, the develop branch will be re-merged into  
the
+staging branch. The staging branch will be re-evaluated via the tests, and  
the

+gem5 community informed of the changes with additional time given for more
+feedback on the new release.
+5. Once signed off by members of the PMC the staging branch shall be merged
+into the master branch, and the staging branch deleted.
+6. The master branch shall be tagged with the correct version number for  
that
+release. gem5 conforms to a "v{YY}.{MAJOR}.{MINOR}.{HOTFIX}" versioning  
system.

+E.g., the first major release of 2022 will be "v22.0.0.0", followed by
+"v22.1.0.0". All the releases (with the exemption hotfixes) are considered
+major releases. For the meantime, there are no minor releases though we  
keep

+the minor release numbers in case this policy changes in the future.
+7. The gem5-dev and gem5-user mailing lists shall be notified of the new  
gem5

+release.
+
+Hotfixes
+
+
+There may be circumstances in which a change to gem5 is deemed critical and
+cannot wait for an official release (e.g., a high-priority bug fix). In  
these

+circumstances a hotfix shall be made.
+
+First, if a developer suspects a hotfix may be necessary then the issue
+should be discussed on the gem5-dev mailing list. The community will decide
+whether the issue is worthy of a hotfix, and the final decision should be
+made by members of the PMC if there is no consensus. Assuming the hotfix is
+permitted, the following steps will be taken:
+
+1. A new branch with the prefix "hotfix-" will be created from the master
+branch. Only gem5 maintainers can create branches. If a non-maintainer  
requires

+the creation of a hotfix branch then they should contact a gem5 maintainer.
+2. The change shall be submitted to the hotfix branch via gerrit. Full  
review,

+as with any other change, will be required.
+3. Once fully submitted, the hotfix branch shall be merged into both the
+develop and the master branch by a gem5 maintainer.
+4. The master branch will be tagged with the new version number; the same  
as

+the last but with an incremented hotfix number (e.g., "v20.2.0.0" would
+transition to "v20.2.0.1").
+4. The hotfix branch will then be deleted.
+5. The gem5-dev and the gem5-user mailing lists shall be notified of this
+hotfix.

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[gem5-dev] Change in gem5/gem5[master]: misc: Updated CONTRIBUTING.md to discuss WIP changes

2020-02-12 Thread Bobby R. Bruce (Gerrit) 
Bobby R. Bruce has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/24805 )


Change subject: misc: Updated CONTRIBUTING.md to discuss WIP changes
..

misc: Updated CONTRIBUTING.md to discuss WIP changes

Previously CONTRIBUTING.md discused private changes, but contributors
cannot submit private changes to Gerrit under the current configuration.
This has therefore been removed and replaced with an explanation of how
to submit a WIP (Work In Progress) changes to Gerrit. WIP changes are
permitted.

Change-Id: I9e1acbdaf4a9b5c433c0704ba9faf325a6b48c6a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24805
Reviewed-by: Jason Lowe-Power 
Reviewed-by: Daniel Carvalho 
Maintainer: Bobby R. Bruce 
Tested-by: kokoro 
---
M CONTRIBUTING.md
1 file changed, 24 insertions(+), 9 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved
  Daniel Carvalho: Looks good to me, but someone else must approve
  Bobby R. Bruce: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index 7b3dcfd..2a24f05 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -276,20 +276,35 @@
  git commit --amend
 ```

-Push change to gerrit as a draft/private
-
+Push change to gerrit as a Work In Progress
+---

-See  
https://gerrit-review.googlesource.com/Documentation/intro-user.html#private-changes

-for details on private gerrit changes.
+It is acceptable to push commits as "Work In Progress" (WIP) changes within
+gerrit. WIP changes are publicly visible though no one will be able to  
review
+the changes or be directly notified they have been submitted. WIP changes  
can

+be useful for backing up code currently under-development or for sharing
+incomplete code with the wider community (i.e., the link to the gerrit  
change

+may be shared, and others may download the change, comment on it, and track
+alterations over time).
+
+See  
https://gerrit-review.googlesource.com/Documentation/intro-user.html#wip

+for details on WIP gerrit changes.
+
+To push a change as a WIP:

 ```
- git push origin HEAD:refs/for/develop%private
+ git push origin HEAD:refs/for/develop%wip
 ```

-Once you have pushed your change as "private", you can log onto [gerrit]
-(https://gem5-review.googlesource.com) and once you're happy with the  
commit
-click the "unmark private" which may be hidden in the "more options"  
dropdown

-in the upper right corner.
+Once you have pushed your change as a WIP, you can log onto [gerrit](
+https://gem5-review.googlesource.com) and view it. Once you're happy with  
the

+change you can add reviewers which shall move your change from WIP status
+to be considered for submission by the wider gem5 community. Switching  
from a
+WIP to a regular change does not notify the gem5 community, via the  
gem5-dev
+mailing-list, that a change has been submitted (as would occur if a change  
were
+submitted directly for review). It is therefore important to include  
reviewers

+and CC those who you wish to view the change (they will be notified
+automatically via email).

 Push change bypassing gerrit
 -

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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I9e1acbdaf4a9b5c433c0704ba9faf325a6b48c6a
Gerrit-Change-Number: 24805
Gerrit-PatchSet: 3
Gerrit-Owner: Bobby R. Bruce 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[master]: misc: Updated CONTRIBUTING.md for master-as-stable setup

2020-02-12 Thread Bobby R. Bruce (Gerrit) 
Bobby R. Bruce has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/24804 )


Change subject: misc: Updated CONTRIBUTING.md for master-as-stable setup
..

misc: Updated CONTRIBUTING.md for master-as-stable setup

Jira: https://gem5.atlassian.net/browse/GEM5-284
Change-Id: I28c4d658a2e9c3bf11879a7b73e16d167c97398f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24804
Reviewed-by: Jason Lowe-Power 
Reviewed-by: Daniel Carvalho 
Maintainer: Bobby R. Bruce 
Tested-by: kokoro 
---
M CONTRIBUTING.md
1 file changed, 40 insertions(+), 19 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved
  Daniel Carvalho: Looks good to me, but someone else must approve
  Bobby R. Bruce: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index 9e34f60..7b3dcfd 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -82,14 +82,31 @@
 ===

 If you plan on contributing, it is strongly encouraged for you to clone the
-repository directly from our gerrit instance at
-https://gem5.googlesource.com/.
+repository directly, and checkout the `develop` branch from our gerrit  
instance

+at https://gem5.googlesource.com/.

-To clone the master gem5 repository:
+To clone the gem5 repository:
+
 ```
  git clone https://gem5.googlesource.com/public/gem5
 ```

+By default, the master branch is checked out. The master branch is stable,
+containing the latest released version of gem5. To obtain code still
+under-development (and which contributions can be made):
+
+```
+cd gem5
+git checkout --track origin/develop
+```
+
+Changes should be made to this develop branch. Changes to the master branch
+will be blocked. Once a change on the develop branch is properly  
incorporated

+into the gem5 repo it will be merged into the master Branch upon the next
+release of gem5. New releases of gem5 occur three times a year. Ergo,  
changes
+made to the develop branch should appear on the master branch within three  
to

+four months as part of a stable release.
+
 Other gem5 repositories
 ---

@@ -219,12 +236,12 @@
 

 ```
- git push origin HEAD:refs/for/master
+ git push origin HEAD:refs/for/develop
 ```

 Assuming origin is https://gem5.googlesource.com/public/gem5 and you want  
to
 push the changeset at HEAD, this will create a new review request on top  
of the

-master branch. More generally,
+develop branch. More generally,

 ```
  git push  :refs/for/
@@ -266,7 +283,7 @@
 for details on private gerrit changes.

 ```
- git push origin HEAD:refs/for/master%private
+ git push origin HEAD:refs/for/develop%private
 ```

 Once you have pushed your change as "private", you can log onto [gerrit]
@@ -280,7 +297,7 @@
 Only maintainers can bypass gerrit review. This should very rarely be used.

 ```
- git push origin HEAD:refs/heads/master
+ git push origin HEAD:refs/heads/develop
 ```

 Other gerrit push options
@@ -294,18 +311,21 @@
 Branches
 

-By default, contributions to gem5 should be made on the master branch.  
Branches
-are generally discouraged due to their tendency to bloat git repositories  
with
-abandoned code. However, the creation of branches is permitted for  
development
-of a specific feature or improvement if one or more of the following  
criteria

-are met:
+By default, contributions to gem5 should be made on the develop branch. The
+master branch is maintained as a stable release branch (i.e., it can be  
pulled
+to obtain the latest official release of gem5). Creation of additional  
branches
+is generally discouraged due to their tendency to bloat git repositories  
with

+abandoned code. However, the creation of new branches is permitted for
+development of a specific feature or improvement if one or more of the
+following criteria are met:

 1. The feature/improvement is likely to be of a large size, consisting of  
many

 commits, with little logic in these commits being contributed separately.
 2. The feature/improvement will be developed over a long period of time.
-3. There is sufficient reason that a feature/improvement should not be  
merged
-into the master branch yet (e.g., the feature/improvement is not intended  
for

-the next release but a future release).
+3. There is sufficient reason that a feature/improvement should not be part
+of the next gem5 release (e.g., the change should be held within a feature
+branch until ready for the next release, at which point it will be merged
+into the develop branch).

 If a branch is required it can only be created by a project maintainer.
 Therefore, if a gem5 contributor desires a separate branch for their work,  
they

@@ -316,9 +336,10 @@
 shall create the branch which the contributor may then use.

 Development on a branch within Gerrit functions in exactly the same way as
-contributing to the master

[gem5-dev] Change in gem5/gem5[master]: arch-arm: GenericTimer arch regs, perms/trapping

2020-02-12 Thread Giacomo Travaglini (Gerrit) 
Giacomo Travaglini has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/25307 )



Change subject: arch-arm: GenericTimer arch regs, perms/trapping
..

arch-arm: GenericTimer arch regs, perms/trapping

This patch enhances the Generic Timer architected registers handling:

- Reordering of miscregs for easier switch/case ranges
- Implement _EL12 reg versions for E2H environments
- AArch32/64 EL0/EL1/EL2 arch compliant trapping for all registers
+ Rely on CNTKCTL and CNTHCTL access controls
- UNDEFINED behaviour from EL0(NS)
- EL1(S) timer traps to EL3 when SCR.ST == 0

Change-Id: I4f018e103cf8f7323060516121838f90278b1c3e
---
M src/arch/arm/insts/misc64.cc
M src/arch/arm/isa.cc
M src/arch/arm/isa/insts/misc.isa
M src/arch/arm/miscregs.cc
M src/arch/arm/miscregs.hh
M src/arch/arm/utility.cc
M src/arch/arm/utility.hh
M src/dev/arm/generic_timer_miscregs_types.hh
8 files changed, 833 insertions(+), 194 deletions(-)



diff --git a/src/arch/arm/insts/misc64.cc b/src/arch/arm/insts/misc64.cc
index d42d0a1..cc5f817 100644
--- a/src/arch/arm/insts/misc64.cc
+++ b/src/arch/arm/insts/misc64.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2011-2013,2017-2019 ARM Limited
+ * Copyright (c) 2011-2013,2017-2020 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -128,6 +128,11 @@
 immediate = 0x1E0;
 }
 break;
+  // Generic Timer
+  case MISCREG_CNTFRQ_EL0 ... MISCREG_CNTVOFF_EL2:
+trap_to_sup = el == EL0 &&
+  isGenericTimerSystemAccessTrapEL1(misc_reg, tc);
+break;
   default:
 break;
 }
@@ -295,6 +300,11 @@
 trap_to_hyp = hcr.imo && el == EL1;
 }
 break;
+  // Generic Timer
+  case MISCREG_CNTFRQ_EL0 ... MISCREG_CNTVOFF_EL2:
+trap_to_hyp = el <= EL1 &&
+  isGenericTimerSystemAccessTrapEL2(misc_reg, tc);
+break;
   default:
 break;
 }
@@ -343,6 +353,11 @@
   case MISCREG_APIBKeyLo_EL1:
 trap_to_mon = (el==EL1 || el==EL2) && scr.apk==0 && ELIs64(tc,  
EL3);

 break;
+  // Generic Timer
+  case MISCREG_CNTFRQ_EL0 ... MISCREG_CNTVOFF_EL2:
+trap_to_mon = el == EL1 &&
+  isGenericTimerSystemAccessTrapEL3(misc_reg, tc);
+break;
   default:
 break;
 }
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 472f5ae..562b5e3 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -743,13 +743,8 @@
 return 0; // bits [63:0] RES0 (reserved for future use)

   // Generic Timer registers
-  case MISCREG_CNTHV_CTL_EL2:
-  case MISCREG_CNTHV_CVAL_EL2:
-  case MISCREG_CNTHV_TVAL_EL2:
-  case MISCREG_CNTFRQ ... MISCREG_CNTHP_CTL:
-  case MISCREG_CNTPCT ... MISCREG_CNTHP_CVAL:
-  case MISCREG_CNTKCTL_EL1 ... MISCREG_CNTV_CVAL_EL0:
-  case MISCREG_CNTVOFF_EL2 ... MISCREG_CNTPS_CVAL_EL1:
+  case MISCREG_CNTFRQ ... MISCREG_CNTVOFF:
+  case MISCREG_CNTFRQ_EL0 ... MISCREG_CNTVOFF_EL2:
 return getGenericTimer(tc).readMiscReg(misc_reg);

   case MISCREG_ICC_AP0R0 ... MISCREG_ICH_LRC15:
@@ -2079,13 +2074,8 @@
 break;

   // Generic Timer registers
-  case MISCREG_CNTHV_CTL_EL2:
-  case MISCREG_CNTHV_CVAL_EL2:
-  case MISCREG_CNTHV_TVAL_EL2:
-  case MISCREG_CNTFRQ ... MISCREG_CNTHP_CTL:
-  case MISCREG_CNTPCT ... MISCREG_CNTHP_CVAL:
-  case MISCREG_CNTKCTL_EL1 ... MISCREG_CNTV_CVAL_EL0:
-  case MISCREG_CNTVOFF_EL2 ... MISCREG_CNTPS_CVAL_EL1:
+  case MISCREG_CNTFRQ ... MISCREG_CNTVOFF:
+  case MISCREG_CNTFRQ_EL0 ... MISCREG_CNTVOFF_EL2:
 getGenericTimer(tc).setMiscReg(misc_reg, newVal);
 break;
   case MISCREG_ICC_AP0R0 ... MISCREG_ICH_LRC15:
diff --git a/src/arch/arm/isa/insts/misc.isa  
b/src/arch/arm/isa/insts/misc.isa

index b2dc2f6..4a2573f 100644
--- a/src/arch/arm/isa/insts/misc.isa
+++ b/src/arch/arm/isa/insts/misc.isa
@@ -1,6 +1,6 @@
 // -*- mode:c++ -*-

-// Copyright (c) 2010-2013,2017-2019 ARM Limited
+// Copyright (c) 2010-2013,2017-2020 ARM Limited
 // All rights reserved
 //
 // The license below extends only to copyright in the software and shall
@@ -869,7 +869,8 @@
 MiscRegIndex miscReg = (MiscRegIndex) xc->tcBase()->flattenRegId(
RegId(MiscRegClass, op1)).index();
 bool can_read, undefined;
-std::tie(can_read, undefined) = canReadCoprocReg(miscReg, Scr, Cpsr);
+std::tie(can_read, undefined) = canReadCoprocReg(miscReg, Scr, Cpsr,
+ xc->tcBase());
 if (!can_read || undefined) {
 return std::make_shared(machInst, false,

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Refactor GenericTimer

2020-02-12 Thread Giacomo Travaglini (Gerrit) 
Giacomo Travaglini has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/25306 )



Change subject: dev-arm: Refactor GenericTimer
..

dev-arm: Refactor GenericTimer

The GenericTimer specification includes a global component for
a universal view of time: the System Counter.

If both per-PE architected and memory-mapped timers are instantiated
in a system, they must both share the same counter. SystemCounter is
promoted to be an independent SimObject, which is now shared by
implementations.

The SystemCounter may be controlled/accessed through the memory-mapped
counter module in the system level implementation. This provides
control (CNTControlBase) and status (CNTReadBase) register frames. The
counter module is now implemented as part of GenericTimerMem.

Frequency changes occur through writes to an active CNTFID or to
CNTCR.EN as per the architecture. Low-high and high-low transitions are
delayed until suitable thresholds, where the counter value is a divisor
of the increment given the new frequency.
Due to changes in frequency, timers need to be notifies to be
rescheduled their counter limit events based on CompareValue/TimerValue.
A new SystemCounterListener interface is provided to achieve
correctness.

CNTFRQ is no longer able to modify the global frequency. PEs may
use this to modify their register view of the former, but they should
not affect the global value. These two should be consistent.

With frequency changes, counter value needs to be stored to track
contributions from different frequency epochs. This is now handled
on epoch change, counter disable and register access.

References to all GenericTimer model components are now provided as
part of the documentation.

VExpress_GEM5_Base is updated with the new model configuration.

Change-Id: I9a991836cacd84a5bc09e5d5275191fcae9ed84b
---
M src/arch/arm/utility.cc
M src/arch/arm/utility.hh
A src/dev/arm/GenericTimer.py
M src/dev/arm/RealView.py
M src/dev/arm/SConscript
M src/dev/arm/generic_timer.cc
M src/dev/arm/generic_timer.hh
A src/dev/arm/generic_timer_miscregs_types.hh
8 files changed, 1,642 insertions(+), 479 deletions(-)



diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
index 4d8fcc2..188a8af 100644
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2009-2014, 2016-2019 ARM Limited
+ * Copyright (c) 2009-2014, 2016-2020 ARM Limited
  * All rights reserved.
  *
  * The license below extends only to copyright in the software and shall
diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh
index b73824c..c37fdb8 100644
--- a/src/arch/arm/utility.hh
+++ b/src/arch/arm/utility.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010, 2012-2013, 2016-2019 ARM Limited
+ * Copyright (c) 2010, 2012-2013, 2016-2020 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
diff --git a/src/dev/arm/GenericTimer.py b/src/dev/arm/GenericTimer.py
new file mode 100644
index 000..a6b870d
--- /dev/null
+++ b/src/dev/arm/GenericTimer.py
@@ -0,0 +1,196 @@
+# Copyright (c) 2009-2020 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS

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scons: *** [build/NULL_MOESI_CMP_directory/sim/power/lib.o.partial] Error 1
scons: *** [build/NULL_MOESI_CMP_directory/sim/lib.o.partial] Error 1
scons: *** [build/NULL_MOESI_CMP_directory/learning_gem5/part2/lib.o.partial] 
Error 1
scons: *** 
[build/NULL_MOESI_CMP_directory/cpu/testers/traffic_gen/lib.o.partial] Error 1
scons: *** [build/NULL_MOESI_CMP_directory/dev/pci/lib.o.partial] Error 1
scons: *** [build/NULL_MOESI_CMP_directory/base/vnc/lib.o.partial] Error 1
scons: *** [build/NULL_MOESI_CMP_directory/mem/ruby/network/lib.o.partial] 
Error 1
scons: *** [build/NULL_MOESI_CMP_directory/mem/cache/tags/lib.o.partial] Error 1
scons: *** [build/NULL_MOESI_CMP_directory/cpu/testers/memtest/lib.o.partial] 
Error 1
scons: *** [build/NULL_MOESI_CMP_directory/mem/cache/lib.o.partial] Error 1
scons: *** 
[build/NULL_MOESI_CMP_directory/mem/cache/tags/indexing_policies/lib.o.partial] 
Error 1
scons: *** [build/NULL_MOESI_CMP_directory/mem/qos/lib.o.partial] Error 1
scons: *** [build/NULL_MOESI_CMP_directory/mem/ruby/common/lib.o.partial] Error 
1
scons: *** [build/NULL_MOESI_CMP_directory/python/lib.o.partial] Error 1
scons: *** [build/NULL_MOESI_CMP_directory/mem/protocol/lib.o.partial] Error 1
scons: *** [build/NULL_MOESI_CMP_directory/mem/lib.o.partial] Error 1
scons: *** [build/NULL_MOESI_CMP_directory/mem/ruby/structures/lib.o.partial] 
Error 1
scons: ***

[gem5-dev] Change in gem5/gem5[master]: cpu: Rename numInst and numOp to avoid ambiguity

2020-02-12 Thread Giacomo Travaglini (Gerrit) 
Giacomo Travaglini has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/25304 )



Change subject: cpu: Rename numInst and numOp to avoid ambiguity
..

cpu: Rename numInst and numOp to avoid ambiguity

This patch is renaming numOp and numInst to avoid ambiguity
(there is only a character differentiating them from the Stat version)

Change-Id: I271ac10fef7a99451ac9fe4bac44c277d5a48867
Signed-off-by: Giacomo Travaglini 
---
M src/cpu/minor/execute.cc
M src/cpu/o3/commit_impl.hh
M src/cpu/o3/cpu.cc
M src/cpu/simple/base.cc
M src/cpu/simple/exec_context.hh
M src/cpu/thread_state.cc
M src/cpu/thread_state.hh
7 files changed, 34 insertions(+), 22 deletions(-)



diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc
index 8326099..4da8a8a 100644
--- a/src/cpu/minor/execute.cc
+++ b/src/cpu/minor/execute.cc
@@ -867,15 +867,15 @@
  *  thread and system */
 if (!inst->staticInst->isMicroop() ||  
inst->staticInst->isLastMicroop())

 {
-thread->numInst++;
+thread->numGlobalInsts++;
 thread->numInsts++;
 cpu.stats.numInsts++;
 cpu.system->totalNumInsts++;

 /* Act on events related to instruction counts */
-thread->comInstEventQueue.serviceEvents(thread->numInst);
+thread->comInstEventQueue.serviceEvents(thread->numGlobalInsts);
 }
-thread->numOp++;
+thread->numGlobalOps++;
 thread->numOps++;
 cpu.stats.numOps++;
 cpu.stats.committedInstType[inst->id.threadId]
@@ -883,7 +883,7 @@

 /* Set the CP SeqNum to the numOps commit number */
 if (inst->traceData)
-inst->traceData->setCPSeq(thread->numOp);
+inst->traceData->setCPSeq(thread->numGlobalOps);

 cpu.probeInstCommit(inst->staticInst, inst->pc.instAddr());
 }
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index fa2d724..9369298 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -1267,7 +1267,7 @@
 if (head_inst->traceData) {
 if (DTRACE(ExecFaulting)) {
 head_inst->traceData->setFetchSeq(head_inst->seqNum);
-head_inst->traceData->setCPSeq(thread[tid]->numOp);
+head_inst->traceData->setCPSeq(thread[tid]->numGlobalOps);
 head_inst->traceData->dump();
 }
 delete head_inst->traceData;
@@ -1302,7 +1302,7 @@
 tid, head_inst->seqNum, head_inst->pcState());
 if (head_inst->traceData) {
 head_inst->traceData->setFetchSeq(head_inst->seqNum);
-head_inst->traceData->setCPSeq(thread[tid]->numOp);
+head_inst->traceData->setCPSeq(thread[tid]->numGlobalOps);
 head_inst->traceData->dump();
 delete head_inst->traceData;
 head_inst->traceData = NULL;
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index ad13799..5f64600 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -1508,15 +1508,16 @@
 {
 // Keep an instruction count.
 if (!inst->isMicroop() || inst->isLastMicroop()) {
-thread[tid]->numInst++;
+thread[tid]->numGlobalInsts++;
 thread[tid]->numInsts++;
 committedInsts[tid]++;
 system->totalNumInsts++;

 // Check for instruction-count-based events.
-thread[tid]->comInstEventQueue.serviceEvents(thread[tid]->numInst);
+thread[tid]->comInstEventQueue.serviceEvents(
+thread[tid]->numGlobalInsts);
 }
-thread[tid]->numOp++;
+thread[tid]->numGlobalOps++;
 thread[tid]->numOps++;
 committedOps[tid]++;

diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index f27c115..e3729d4 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -167,13 +167,13 @@
 SimpleExecContext& t_info = *threadInfo[curThread];

 if (!curStaticInst->isMicroop() || curStaticInst->isLastMicroop()) {
-t_info.numInst++;
+t_info.numGlobalInsts++;
 t_info.numInsts++;

 system->totalNumInsts++;
 t_info.thread->funcExeInst++;
 }
-t_info.numOp++;
+t_info.numGlobalOps++;
 t_info.numOps++;
 }

@@ -495,7 +495,7 @@
 t_info.setMemAccPredicate(true);

 // check for instruction-count-based events
-thread->comInstEventQueue.serviceEvents(t_info.numInst);
+thread->comInstEventQueue.serviceEvents(t_info.numGlobalInsts);

 // decode the instruction
 TheISA::PCState pcState = thread->pcState();
diff --git a/src/cpu/simple/exec_context.hh b/src/cpu/simple/exec_context.hh
index 04be1a0..c4526e7 100644
--- a/src/cpu/simple/exec_context.hh
+++ b/src/cpu/simple/exec_context.hh
@@ -78,10 +78,18 @@

 /** PER-THREAD STATS */

+// Number of simulated instructions since the beginning of simulation
+// Won't be affected by stats reset.
+Counter numGlobalInsts;
+
 // Number of simulated instructions
-Counter numInst;
 Stats::Scalar numInsts;
-

[gem5-dev] Change in gem5/gem5[master]: cpu: Counting instructions & ops with stats

2020-02-12 Thread Giacomo Travaglini (Gerrit) 
Giacomo Travaglini has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/25303 )



Change subject: cpu: Counting instructions & ops with stats
..

cpu: Counting instructions & ops with stats

The global sim_ops and sim_insts stats, counting the global number of
executed instruction and ops are relying on the totalInsts, totalOps cpu
methods.
Every cpu model implements them in a fairly similar way: looping over
every thread, accumulating the number of insts/ops, and returning the
final value.
For an unknown reason the underlying thread class is keeping two
versions of the stat: one is the real stat, and the other one is a
counter which gets increased together with the real stat:

/** Number of instructions committed. */
Counter numInst;
/** Stat for number instructions committed. */
Stats::Scalar numInsts;
/** Number of ops (including micro ops) committed. */
Counter numOp;
/** Stat for number ops (including micro ops) committed. */
Stats::Scalar numOps;

One could think this is only a redundancy problem, however the fact that the
totalInsts makes use of the NON-stat (Counter) variable creates a lot of
confusion.

In fact resetting stats during simulation will only affect the real
stat. A following stat dump, by calling totalInst, will produce a
sim_insts/sim_ops from the unreset value; in other words, sim_insts
and sim_ops won't be reset.

This patch is fixing this by making the totalInsts/totalOps use the
Stat version (numInsts and numOps)

Change-Id: I03b1b3452e818c0ee26f015ffb21fdbcf7185a7c
Signed-off-by: Giacomo Travaglini 
---
M src/cpu/minor/cpu.cc
M src/cpu/o3/cpu.cc
M src/cpu/simple/base.cc
3 files changed, 6 insertions(+), 6 deletions(-)



diff --git a/src/cpu/minor/cpu.cc b/src/cpu/minor/cpu.cc
index 5edc570..a1c07e8 100644
--- a/src/cpu/minor/cpu.cc
+++ b/src/cpu/minor/cpu.cc
@@ -328,7 +328,7 @@
 Counter ret = 0;

 for (auto i = threads.begin(); i != threads.end(); i ++)
-ret += (*i)->numInst;
+ret += (*i)->numInsts.value();

 return ret;
 }
@@ -339,7 +339,7 @@
 Counter ret = 0;

 for (auto i = threads.begin(); i != threads.end(); i ++)
-ret += (*i)->numOp;
+ret += (*i)->numOps.value();

 return ret;
 }
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index e4f1c04..ad13799 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -668,7 +668,7 @@

 ThreadID size = thread.size();
 for (ThreadID i = 0; i < size; i++)
-total += thread[i]->numInst;
+total += thread[i]->numInsts.value();

 return total;
 }
@@ -681,7 +681,7 @@

 ThreadID size = thread.size();
 for (ThreadID i = 0; i < size; i++)
-total += thread[i]->numOp;
+total += thread[i]->numOps.value();

 return total;
 }
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 06dd773..f27c115 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -182,7 +182,7 @@
 {
 Counter total_inst = 0;
 for (auto& t_info : threadInfo) {
-total_inst += t_info->numInst;
+total_inst += t_info->numInsts.value();
 }

 return total_inst;
@@ -193,7 +193,7 @@
 {
 Counter total_op = 0;
 for (auto& t_info : threadInfo) {
-total_op += t_info->numOp;
+total_op += t_info->numOps.value();
 }

 return total_op;

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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I03b1b3452e818c0ee26f015ffb21fdbcf7185a7c
Gerrit-Change-Number: 25303
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[master]: cpu, sim: Remove unused System::totalNumInst

2020-02-12 Thread Giacomo Travaglini (Gerrit) 
Giacomo Travaglini has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/25305 )



Change subject: cpu, sim: Remove unused System::totalNumInst
..

cpu, sim: Remove unused System::totalNumInst

This counter gets augmented for every executed instruction but it
is not used. It is also overlapping with the

BaseCPU::numSimulatedInsts

A client willing to know the number of simulated instruction should rely
on the interface above.

Change-Id: Ic5c805ac3b2e87bbacb365108d4060f53e044b4e
Signed-off-by: Giacomo Travaglini 
---
M src/cpu/kvm/base.cc
M src/cpu/minor/execute.cc
M src/cpu/o3/cpu.cc
M src/cpu/simple/base.cc
M src/cpu/simple/timing.cc
M src/sim/system.cc
M src/sim/system.hh
7 files changed, 0 insertions(+), 16 deletions(-)



diff --git a/src/cpu/kvm/base.cc b/src/cpu/kvm/base.cc
index cda98b4..d58f75a 100644
--- a/src/cpu/kvm/base.cc
+++ b/src/cpu/kvm/base.cc
@@ -805,7 +805,6 @@
 numCycles += simCyclesExecuted;;
 numInsts += instsExecuted;
 ctrInsts += instsExecuted;
-system->totalNumInsts += instsExecuted;

 DPRINTF(KvmRun,
 "KVM: Executed %i instructions in %i cycles "
diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc
index 4da8a8a..9047a07 100644
--- a/src/cpu/minor/execute.cc
+++ b/src/cpu/minor/execute.cc
@@ -870,7 +870,6 @@
 thread->numGlobalInsts++;
 thread->numInsts++;
 cpu.stats.numInsts++;
-cpu.system->totalNumInsts++;

 /* Act on events related to instruction counts */
 thread->comInstEventQueue.serviceEvents(thread->numGlobalInsts);
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 5f64600..e22d967 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -1511,7 +1511,6 @@
 thread[tid]->numGlobalInsts++;
 thread[tid]->numInsts++;
 committedInsts[tid]++;
-system->totalNumInsts++;

 // Check for instruction-count-based events.
 thread[tid]->comInstEventQueue.serviceEvents(
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index e3729d4..fcce837 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -170,7 +170,6 @@
 t_info.numGlobalInsts++;
 t_info.numInsts++;

-system->totalNumInsts++;
 t_info.thread->funcExeInst++;
 }
 t_info.numGlobalOps++;
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 6487ffa..5ba7cfa 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -150,8 +150,6 @@

 // Reschedule any power gating event (if any)
 schedulePowerGatingEvent();
-
-system->totalNumInsts = 0;
 }

 bool
diff --git a/src/sim/system.cc b/src/sim/system.cc
index 46fa384..b0daff0 100644
--- a/src/sim/system.cc
+++ b/src/sim/system.cc
@@ -114,7 +114,6 @@
   _m5opRange(p->m5ops_base ?
  RangeSize(p->m5ops_base, 0x1) :
  AddrRange(1, 0)), // Create an empty range if disabled
-  totalNumInsts(0),
   redirectPaths(p->redirect_paths)
 {

@@ -462,12 +461,6 @@
 }

 void
-System::drainResume()
-{
-totalNumInsts = 0;
-}
-
-void
 System::serialize(CheckpointOut ) const
 {
 if (FullSystem)
diff --git a/src/sim/system.hh b/src/sim/system.hh
index 6a8b502..d6bc036 100644
--- a/src/sim/system.hh
+++ b/src/sim/system.hh
@@ -621,10 +621,7 @@
 void serialize(CheckpointOut ) const override;
 void unserialize(CheckpointIn ) override;

-void drainResume() override;
-
   public:
-Counter totalNumInsts;
 std::map, Tick>  lastWorkItemStarted;
 std::map workItemStats;


--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Ic5c805ac3b2e87bbacb365108d4060f53e044b4e
Gerrit-Change-Number: 25305
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini 
Gerrit-MessageType: newchange
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