[gem5-dev] Change in gem5/gem5[develop]: util: Add an abstraction layer for call types in the m5 utility.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/27241 )
Change subject: util: Add an abstraction layer for call types in the m5
utility.
..
util: Add an abstraction layer for call types in the m5 utility.
These make the calling code in m5.c a little bit more generic. Each call
type will have a function to check the arguments and see if that type is
being requested and/or has any additional options set in the arguments.
If so, those are processed, and argc and argv are adjusted.
Then another function returns the appropriate dispatch table to use for
that invocation scheme. This is behind a function instead of, for
instance, a global variable because it gives the call type a little bit
more control over what's happening, for instance if it would use
different implementations in slightly different circumstances.
Change-Id: I661cf202ec657466496767cbdf331fe27995ab26
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27241
Maintainer: Gabe Black
Tested-by: kokoro
Reviewed-by: Bobby R. Bruce
---
A util/m5/src/addr_call_type.c
A util/m5/src/addr_call_type.h
A util/m5/src/call_type.h
A util/m5/src/inst_call_type.c
A util/m5/src/inst_call_type.h
A util/m5/src/semi_call_type.c
A util/m5/src/semi_call_type.h
7 files changed, 317 insertions(+), 0 deletions(-)
Approvals:
Bobby R. Bruce: Looks good to me, approved
Gabe Black: Looks good to me, approved
kokoro: Regressions pass
diff --git a/util/m5/src/addr_call_type.c b/util/m5/src/addr_call_type.c
new file mode 100644
index 000..d91d2ec
--- /dev/null
+++ b/util/m5/src/addr_call_type.c
@@ -0,0 +1,57 @@
+/*
+ * Copyright 2020 Google Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include
+
+#include "addr_call_type.h"
+
+#define M5OP(name, func) __typeof__(name) M5OP_MERGE_TOKENS(name, _addr);
+M5OP_FOREACH
+#undef M5OP
+
+static DispatchTable addr_dispatch = {
+#define M5OP(name, func) .name = _MERGE_TOKENS(name, _addr),
+M5OP_FOREACH
+#undef M5OP
+};
+
+int
+addr_call_type_detect(int *argc, char **argv[])
+{
+if (*argc > 0 && strcmp((*argv)[0], "--addr") == 0) {
+(*argc)--;
+(*argv)++;
+return 1;
+}
+return 0;
+}
+
+DispatchTable *
+addr_call_type_init()
+{
+return _dispatch;
+}
diff --git a/util/m5/src/addr_call_type.h b/util/m5/src/addr_call_type.h
new file mode 100644
index 000..d1fbfa6
--- /dev/null
+++ b/util/m5/src/addr_call_type.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright 2020 Google Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE
[gem5-dev] Change in gem5/gem5[develop]: misc: Add the SE mode m5 ops to m5ops.h.
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/27236 ) Change subject: misc: Add the SE mode m5 ops to m5ops.h. .. misc: Add the SE mode m5 ops to m5ops.h. These shouldn't be called in fs mode through the m5 utility and probably shouldn't be called directly either, but this makes them consistent with the other functions which are mentioned in asm/generic/m5ops.h. Change-Id: I80df8b4d507350bc6d2763e770e38e0370931632 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27236 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- M include/gem5/m5ops.h 1 file changed, 3 insertions(+), 0 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/include/gem5/m5ops.h b/include/gem5/m5ops.h index 1c08017..3edd4e6 100644 --- a/include/gem5/m5ops.h +++ b/include/gem5/m5ops.h @@ -62,6 +62,9 @@ void m5_work_begin(uint64_t workid, uint64_t threadid); void m5_work_end(uint64_t workid, uint64_t threadid); +void m5_se_syscall(); +void m5_se_page_fault(); + #ifdef __cplusplus } #endif -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/27236 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I80df8b4d507350bc6d2763e770e38e0370931632 Gerrit-Change-Number: 27236 Gerrit-PatchSet: 11 Gerrit-Owner: Gabe Black Gerrit-Reviewer: Alexandru Duțu Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Earl Ou Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Yu-hsin Wang Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: util: Improve the usage text of the m5 utility.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/27231 )
Change subject: util: Improve the usage text of the m5 utility.
..
util: Improve the usage text of the m5 utility.
Make sure there *is* help text for every command, alphabetize the
commands, explain all the arguments and what the command as a whole
does.
Change-Id: Icf74f8c638545c8658c99169dce728f7b1127806
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27231
Maintainer: Gabe Black
Tested-by: kokoro
Reviewed-by: Bobby R. Bruce
---
M util/m5/src/m5.c
1 file changed, 40 insertions(+), 14 deletions(-)
Approvals:
Bobby R. Bruce: Looks good to me, approved
Gabe Black: Looks good to me, approved
kokoro: Regressions pass
diff --git a/util/m5/src/m5.c b/util/m5/src/m5.c
index ae9068b..eeaf621 100644
--- a/util/m5/src/m5.c
+++ b/util/m5/src/m5.c
@@ -306,20 +306,46 @@
};
struct MainFunc mainfuncs[] = {
-{ "exit", do_exit, "[delay]" },
-{ "fail", do_fail, " [delay]" },
-{ "resetstats", do_reset_stats, "[delay [period]]" },
-{ "dumpstats", do_dump_stats, "[delay [period]]" },
-{ "dumpresetstats", do_dump_reset_stats, "[delay [period]]" },
-{ "readfile", do_read_file,"" },
-{ "writefile", do_write_file, " [host filename]"
},
-{ "execfile", do_exec_file,"" },
-{ "checkpoint", do_checkpoint, "[delay [period]]" },
-{ "addsymbol", do_addsymbol," " },
-{ "loadsymbol", do_loadsymbol, "" },
-{ "initparam", do_initparam,"[key] // key may be at most"
- " 16 characters long" },
-{ "sw99param", do_sw99param,"" }
+{ "addsymbol", do_addsymbol," // Adds
a "
+ "symbol with address
\"address\" "
+ "to gem5's symbol table" },
+{ "checkpoint", do_checkpoint, "[delay [period]] // After "
+ "delay (default 0) take a "
+ "checkpoint, and then
optionally "
+ "every period after" },
+{ "dumpresetstats", do_dump_reset_stats, "[delay [period]] // After "
+ "delay (default 0) dump and "
+ "reset the stats, and then "
+ "optionally every period
after" },
+{ "dumpstats", do_dump_stats, "[delay [period]] // After "
+ "delay (default 0) dump the "
+ "stats, and then optionally "
+ "every period after" },
+{ "execfile", do_exec_file,"read a preselected file
into "
+ "/tmp/execfile and then
exec() "
+ "it" },
+{ "exit", do_exit, "[delay] // Exit after
delay, "
+ "or immediately" },
+{ "fail", do_fail, " [delay] // Exit with "
+ "failure code code after
delay, "
+ "or immediately" },
+{ "initparam", do_initparam,"[key] // optional key may be
at "
+ "most 16 characters long" },
+{ "loadsymbol", do_loadsymbol, "load a preselected symbol
file "
+ "into gem5's symbol table" },
+{ "readfile", do_read_file,"read a preselected file
from "
+ "the host and write it to "
+ "stdout" },
+{ "resetstats", do_reset_stats, "[delay [period]] // After "
+ "delay (default 0) reset the "
+ "stats, and then optionally "
+ "every period after" },
+{ "sw99param", do_sw99param,"read the default initparam
and "
+ "display it in 12 bit chunks"}
+{ "writefile", do_write_file, " [host filename]
// "
+ "Write a file to the host, "
+ "optionally with a different "
+ "name" },
};
int numfuncs = sizeof(mainfuncs) / sizeof(mainfuncs[0]);
--
To view, visit
[gem5-dev] Change in gem5/gem5[develop]: sim,misc: Rename M5OP_ANNOTATE to M5OP_RESERVED1.
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/27235 ) Change subject: sim,misc: Rename M5OP_ANNOTATE to M5OP_RESERVED1. .. sim,misc: Rename M5OP_ANNOTATE to M5OP_RESERVED1. The M5OP_ANNOTATE constant is unused and treated as a reserved op in gem5. Rename it to make it official and consistent. Change-Id: Id5fe6a3aa402a2e0cd187503abff9b09e81b3724 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27235 Maintainer: Gabe Black Tested-by: kokoro Reviewed-by: Bobby R. Bruce --- M include/gem5/asm/generic/m5ops.h M src/sim/pseudo_inst.hh 2 files changed, 2 insertions(+), 2 deletions(-) Approvals: Bobby R. Bruce: Looks good to me, approved Gabe Black: Looks good to me, approved kokoro: Regressions pass diff --git a/include/gem5/asm/generic/m5ops.h b/include/gem5/asm/generic/m5ops.h index 38eaeb1..4771085 100644 --- a/include/gem5/asm/generic/m5ops.h +++ b/include/gem5/asm/generic/m5ops.h @@ -66,7 +66,7 @@ #define M5OP_ADD_SYMBOL 0x53 #define M5OP_PANIC 0x54 -#define M5OP_ANNOTATE 0x55 // deprecated annotate function +#define M5OP_RESERVED1 0x55 // Reserved for user, used to be annotate #define M5OP_RESERVED2 0x56 // Reserved for user #define M5OP_RESERVED3 0x57 // Reserved for user #define M5OP_RESERVED4 0x58 // Reserved for user diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh index be9e5bb..6a63812 100644 --- a/src/sim/pseudo_inst.hh +++ b/src/sim/pseudo_inst.hh @@ -234,7 +234,7 @@ invokeSimcall(tc, workend); return true; - case M5OP_ANNOTATE: + case M5OP_RESERVED1: case M5OP_RESERVED2: case M5OP_RESERVED3: case M5OP_RESERVED4: -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/27235 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: Id5fe6a3aa402a2e0cd187503abff9b09e81b3724 Gerrit-Change-Number: 27235 Gerrit-PatchSet: 11 Gerrit-Owner: Gabe Black Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Earl Ou Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Yu-hsin Wang Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: util: Further simplify the initParam implementation.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/27230 )
Change subject: util: Further simplify the initParam implementation.
..
util: Further simplify the initParam implementation.
Take advantage of string comparisons when looking up what to do with a
given key.
Convert the key_str[12] registers from little endian to host endian.
This matches a corresponding change in the m5 utility to pack the
registers in little endian order, regardless of what the actual guest
endianness is.
Absorb the initparam_keys.hh header into sim/pseudo_inst.cc, and convert
its constants to c++ strings. The constants defined in it might be
useful to guest code calling into the m5 ops, but not for gem5 itself.
By merging them into the .cc file, we also don't have to do any tricks to
try to avoid them having multiple definitions.
Change-Id: I3a450ad7f9c4dca25f79c7835d7f9c167c02ae98
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27230
Maintainer: Gabe Black
Tested-by: kokoro
Reviewed-by: Bobby R. Bruce
---
D src/sim/initparam_keys.hh
M src/sim/pseudo_inst.cc
2 files changed, 41 insertions(+), 87 deletions(-)
Approvals:
Bobby R. Bruce: Looks good to me, approved
Gabe Black: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/sim/initparam_keys.hh b/src/sim/initparam_keys.hh
deleted file mode 100644
index aace7d2..000
--- a/src/sim/initparam_keys.hh
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * Copyright (c) 2015 ARM Limited
- * All rights reserved
- *
- * The license below extends only to copyright in the software and shall
- * not be construed as granting a license to any other intellectual
- * property including but not limited to intellectual property relating
- * to a hardware implementation of the functionality of the software
- * licensed hereunder. You may use the software subject to the license
- * terms below provided that you ensure that this notice is replicated
- * unmodified and in its entirety in all distributions of the software,
- * modified or unmodified, in source code or in binary form.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/* @file
- * Magic key definitions for the InitParam pseudo inst
- */
-#ifndef ___SIM_INITPARAM_KEYS_HH__
-#define ___SIM_INITPARAM_KEYS_HH__
-
-namespace PseudoInst {
-/**
- * Unique keys to retrieve various params by the initParam pseudo inst.
- *
- * @note Each key must be shorter than 16 characters (because we use
- * two 64-bit registers two pass in the key to the initparam function)
- */
-struct InitParamKey
-{
-/**
- * The default key (empty string)
- */
-static constexpr const char *DEFAULT = "";
-/**
- * Unique key for "rank" param (distributed gem5 runs)
- */
-static constexpr const char *DIST_RANK = "dist-rank";
-/**
- * Unique key for "size" param (distributed gem5 runs)
- */
-static constexpr const char *DIST_SIZE = "dist-size";
-};
-} // namespace PseudoInst
-
-#endif
diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index 534f706..c65fdc0 100644
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -44,6 +44,7 @@
#include
#include
+#include
#include
#include
#include
@@ -62,7 +63,6 @@
#include "kern/kernel_stats.hh"
#include "params/BaseCPU.hh"
#include "sim/full_system.hh"
-#include "sim/initparam_keys.hh"
#include "sim/process.hh"
#include "sim/serialize.hh"
#include
[gem5-dev] Change in gem5/gem5[develop]: util: Use a dispatch table to call ops in the m5 utility.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/27238 )
Change subject: util: Use a dispatch table to call ops in the m5 utility.
..
util: Use a dispatch table to call ops in the m5 utility.
This way different implementations can be substituted in depending on
how the low level ops should actually be triggered (inst, addr,
semihosting, (etc?)).
Change-Id: I7c6eab7d87cc973d0bc9c1889037a0f89ce057e8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27238
Maintainer: Gabe Black
Tested-by: kokoro
Reviewed-by: Bobby R. Bruce
---
A util/m5/src/dispatch_table.h
M util/m5/src/m5.c
2 files changed, 83 insertions(+), 28 deletions(-)
Approvals:
Bobby R. Bruce: Looks good to me, approved
Gabe Black: Looks good to me, approved
kokoro: Regressions pass
diff --git a/util/m5/src/dispatch_table.h b/util/m5/src/dispatch_table.h
new file mode 100644
index 000..c9f1906
--- /dev/null
+++ b/util/m5/src/dispatch_table.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright 2020 Google Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __DISPATCH_TABLE_H__
+#define __DISPATCH_TABLE_H__
+
+#include
+#include
+
+/*
+ * This structure holds function pointers, one for each m5 operation,
which can
+ * be filled with different implementations. Conceptually they're like
virtual
+ * functions. They can then be passed to a consumer which knows which
function
+ * it wants, but not exactly how/where it's implemented.
+ */
+typedef struct DispatchTable
+{
+#define M5OP(name, func) __typeof__() name;
+M5OP_FOREACH
+#undef M5OP
+} DispatchTable;
+
+#endif // __DISPATCH_TABLE_H__
diff --git a/util/m5/src/m5.c b/util/m5/src/m5.c
index 6e3efac..9fe8221 100644
--- a/util/m5/src/m5.c
+++ b/util/m5/src/m5.c
@@ -49,13 +49,21 @@
#include
#include
+#include
#include
+#include "dispatch_table.h"
#include "m5_mmap.h"
char *progname;
char *command = "unspecified";
void usage();
+DispatchTable default_dispatch = {
+#define M5OP(name, func) .name = ,
+M5OP_FOREACH
+#undef M5OP
+};
+
void
parse_int_args(int argc, char *argv[], uint64_t ints[], int len)
{
@@ -98,7 +106,7 @@
}
int
-read_file(int dest_fid)
+read_file(DispatchTable *dt, int dest_fid)
{
uint8_t buf[256*1024];
int offset = 0;
@@ -109,7 +117,7 @@
// Linux does demand paging.
memset(buf, 0, sizeof(buf));
-while ((len = m5_read_file(buf, sizeof(buf), offset)) > 0) {
+while ((len = (*dt->m5_read_file)(buf, sizeof(buf), offset)) > 0) {
uint8_t *base = buf;
offset += len;
do {
@@ -132,7 +140,7 @@
}
void
-write_file(const char *filename, const char *host_filename)
+write_file(DispatchTable *dt, const char *filename, const char
*host_filename)
{
fprintf(stderr, "opening %s\n", filename);
int src_fid = open(filename, O_RDONLY);
@@ -150,7 +158,7 @@
memset(buf, 0, sizeof(buf));
while ((len = read(src_fid, buf, sizeof(buf))) > 0) {
-bytes += m5_write_file(buf, len, offset, host_filename);
+bytes += (*dt->m5_write_file)(buf, len, offset, host_filename);
offset += len;
}
fprintf(stderr, "written %d bytes\n", bytes);
@@ -159,62 +167,62 @@
}
void
-do_exit(int argc, char *argv[])
+do_exit(DispatchTable *dt, int argc, char *argv[])
{
if (argc > 1)
usage();
uint64_t ints[1];
parse_int_args(argc, argv, ints, 1);
-m5_exit(ints[0]);
+
[gem5-dev] Change in gem5/gem5[develop]: util: Add a helpful macro for merging two tokens to m5ops.h.
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/27239 ) Change subject: util: Add a helpful macro for merging two tokens to m5ops.h. .. util: Add a helpful macro for merging two tokens to m5ops.h. I've needed this type of macro often when writing code which uses the M5OP_FOREACH macro, and so rather than re-write it each time, lets just put a version here. This is such a common type of macro to need that you'd think it would be part of a standard header somewhere, but to my knowledge it isn't. Change-Id: I0df0d9d2fd7ce1b9e6c355d6e4db197ccfff7c35 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27239 Maintainer: Gabe Black Tested-by: kokoro Reviewed-by: Bobby R. Bruce --- M include/gem5/asm/generic/m5ops.h 1 file changed, 3 insertions(+), 0 deletions(-) Approvals: Bobby R. Bruce: Looks good to me, approved Gabe Black: Looks good to me, approved kokoro: Regressions pass diff --git a/include/gem5/asm/generic/m5ops.h b/include/gem5/asm/generic/m5ops.h index fc56e59..f175596 100644 --- a/include/gem5/asm/generic/m5ops.h +++ b/include/gem5/asm/generic/m5ops.h @@ -108,4 +108,7 @@ M5OP(m5_se_page_fault, M5OP_SE_PAGE_FAULT) \ M5OP(m5_dist_toggle_sync, M5OP_DIST_TOGGLE_SYNC) +#define M5OP_MERGE_TOKENS_I(a, b) a##b +#define M5OP_MERGE_TOKENS(a, b) M5OP_MERGE_TOKENS_I(a, b) + #endif // __GEM5_ASM_GENERIC_M5OPS_H__ -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/27239 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I0df0d9d2fd7ce1b9e6c355d6e4db197ccfff7c35 Gerrit-Change-Number: 27239 Gerrit-PatchSet: 11 Gerrit-Owner: Gabe Black Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Earl Ou Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Yu-hsin Wang Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: misc: Tidy up M5OP_FOREACH and the constants in m5ops.h.
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/27234 ) Change subject: misc: Tidy up M5OP_FOREACH and the constants in m5ops.h. .. misc: Tidy up M5OP_FOREACH and the constants in m5ops.h. Make sure all the operations that have constants (and aren't deprecated or reserved) and present in M5OP_FOREACH in order of their constants. Also move M5OP_ANNOTATE up so that all the constants are also in order. Change-Id: I8d9f69b020aeb39311a24606a286a76de10a51cc Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27234 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- M include/gem5/asm/generic/m5ops.h 1 file changed, 4 insertions(+), 3 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/include/gem5/asm/generic/m5ops.h b/include/gem5/asm/generic/m5ops.h index ca85e9c..38eaeb1 100644 --- a/include/gem5/asm/generic/m5ops.h +++ b/include/gem5/asm/generic/m5ops.h @@ -66,6 +66,7 @@ #define M5OP_ADD_SYMBOL 0x53 #define M5OP_PANIC 0x54 +#define M5OP_ANNOTATE 0x55 // deprecated annotate function #define M5OP_RESERVED2 0x56 // Reserved for user #define M5OP_RESERVED3 0x57 // Reserved for user #define M5OP_RESERVED4 0x58 // Reserved for user @@ -78,8 +79,6 @@ #define M5OP_SE_PAGE_FAULT 0x61 #define M5OP_DIST_TOGGLE_SYNC 0x62 -// These operations are for critical path annotation -#define M5OP_ANNOTATE 0x55 #define M5OP_FOREACH\ M5OP(m5_arm, M5OP_ARM); \ @@ -97,14 +96,16 @@ M5OP(m5_dump_stats, M5OP_DUMP_STATS); \ M5OP(m5_dump_reset_stats, M5OP_DUMP_RESET_STATS); \ M5OP(m5_checkpoint, M5OP_CHECKPOINT); \ -M5OP(m5_read_file, M5OP_READ_FILE); \ M5OP(m5_write_file, M5OP_WRITE_FILE); \ +M5OP(m5_read_file, M5OP_READ_FILE); \ M5OP(m5_debug_break, M5OP_DEBUG_BREAK); \ M5OP(m5_switch_cpu, M5OP_SWITCH_CPU); \ M5OP(m5_add_symbol, M5OP_ADD_SYMBOL); \ M5OP(m5_panic, M5OP_PANIC); \ M5OP(m5_work_begin, M5OP_WORK_BEGIN); \ M5OP(m5_work_end, M5OP_WORK_END); \ +M5OP(m5_se_syscall, M5OP_SE_SYSCALL); \ +M5OP(m5_se_page_fault, M5OP_SE_PAGE_FAULT); \ M5OP(m5_dist_toggle_sync, M5OP_DIST_TOGGLE_SYNC); #endif // __GEM5_ASM_GENERIC_M5OPS_H__ -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/27234 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I8d9f69b020aeb39311a24606a286a76de10a51cc Gerrit-Change-Number: 27234 Gerrit-PatchSet: 11 Gerrit-Owner: Gabe Black Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Earl Ou Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Yu-hsin Wang Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: util: Eliminate the sw99param m5 utility command.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/27232 )
Change subject: util: Eliminate the sw99param m5 utility command.
..
util: Eliminate the sw99param m5 utility command.
This is a small additional layer on top of the initparam command and
just breaks the returned value into 12 bit chunks. It presumes that
there is some particular meaning to the default initparam value which
may or may not be true. It's not entirely clear what the 12 bit chunks
that this command returns are actually good for, and it's been around
long enough that there isn't really any good documentation about what
it's intended purpose was.
Change-Id: I21af0e0cf7501f47026a6dd31920d46cfccff167
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27232
Maintainer: Gabe Black
Tested-by: kokoro
Reviewed-by: Bobby R. Bruce
---
M util/m5/src/m5.c
1 file changed, 0 insertions(+), 17 deletions(-)
Approvals:
Bobby R. Bruce: Looks good to me, approved
Gabe Black: Looks good to me, approved
kokoro: Regressions pass
diff --git a/util/m5/src/m5.c b/util/m5/src/m5.c
index eeaf621..de382d0 100644
--- a/util/m5/src/m5.c
+++ b/util/m5/src/m5.c
@@ -283,21 +283,6 @@
printf("%"PRIu64, val);
}
-void
-do_sw99param(int argc, char *argv[])
-{
-if (argc != 0)
-usage();
-
-uint64_t param = m5_init_param(0, 0);
-
-// run-time, rampup-time, rampdown-time, warmup-time, connections
-printf("%"PRId64" %"PRId64" %"PRId64" %"PRId64" %"PRId64,
- (param >> 48) & 0xfff,
- (param >> 36) & 0xfff, (param >> 24) & 0xfff,
- (param >> 12) & 0xfff, (param >> 0) & 0xfff);
-}
-
struct MainFunc
{
char *name;
@@ -340,8 +325,6 @@
"delay (default 0) reset the "
"stats, and then optionally "
"every period after" },
-{ "sw99param", do_sw99param,"read the default initparam
and "
- "display it in 12 bit chunks"}
{ "writefile", do_write_file, " [host filename]
// "
"Write a file to the host, "
"optionally with a different "
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I21af0e0cf7501f47026a6dd31920d46cfccff167
Gerrit-Change-Number: 27232
Gerrit-PatchSet: 11
Gerrit-Owner: Gabe Black
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Earl Ou
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Yu-hsin Wang
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: misc,util: Remove explicit ';'s from M5OP_FOREACH.
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/27237 ) Change subject: misc,util: Remove explicit ';'s from M5OP_FOREACH. .. misc,util: Remove explicit ';'s from M5OP_FOREACH. It may be the case that each item M5OP_FOREACH iterates over should end in a ',' and not a ';', for instance when putting each item into an array or initializing a structure. If the caller still wants a ';', they can add it into the definition of the M5OP macro. Change-Id: Idd6538b0aad27df39658c3f749c6ff5e4fe55e6d Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27237 Reviewed-by: Bobby R. Bruce Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- M include/gem5/asm/generic/m5ops.h M util/m5/src/aarch64/m5op.S M util/m5/src/arm/m5op.S M util/m5/src/sparc/m5op.S M util/m5/src/thumb/m5op.S 5 files changed, 30 insertions(+), 30 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, but someone else must approve; Looks good to me, approved Bobby R. Bruce: Looks good to me, approved kokoro: Regressions pass diff --git a/include/gem5/asm/generic/m5ops.h b/include/gem5/asm/generic/m5ops.h index 4771085..fc56e59 100644 --- a/include/gem5/asm/generic/m5ops.h +++ b/include/gem5/asm/generic/m5ops.h @@ -81,31 +81,31 @@ #define M5OP_FOREACH\ -M5OP(m5_arm, M5OP_ARM); \ -M5OP(m5_quiesce, M5OP_QUIESCE); \ -M5OP(m5_quiesce_ns, M5OP_QUIESCE_NS); \ -M5OP(m5_quiesce_cycle, M5OP_QUIESCE_CYCLE); \ -M5OP(m5_quiesce_time, M5OP_QUIESCE_TIME); \ -M5OP(m5_rpns, M5OP_RPNS); \ -M5OP(m5_wake_cpu, M5OP_WAKE_CPU); \ -M5OP(m5_exit, M5OP_EXIT); \ -M5OP(m5_fail, M5OP_FAIL); \ -M5OP(m5_init_param, M5OP_INIT_PARAM); \ -M5OP(m5_load_symbol, M5OP_LOAD_SYMBOL); \ -M5OP(m5_reset_stats, M5OP_RESET_STATS); \ -M5OP(m5_dump_stats, M5OP_DUMP_STATS); \ -M5OP(m5_dump_reset_stats, M5OP_DUMP_RESET_STATS); \ -M5OP(m5_checkpoint, M5OP_CHECKPOINT); \ -M5OP(m5_write_file, M5OP_WRITE_FILE); \ -M5OP(m5_read_file, M5OP_READ_FILE); \ -M5OP(m5_debug_break, M5OP_DEBUG_BREAK); \ -M5OP(m5_switch_cpu, M5OP_SWITCH_CPU); \ -M5OP(m5_add_symbol, M5OP_ADD_SYMBOL); \ -M5OP(m5_panic, M5OP_PANIC); \ -M5OP(m5_work_begin, M5OP_WORK_BEGIN); \ -M5OP(m5_work_end, M5OP_WORK_END); \ -M5OP(m5_se_syscall, M5OP_SE_SYSCALL); \ -M5OP(m5_se_page_fault, M5OP_SE_PAGE_FAULT); \ -M5OP(m5_dist_toggle_sync, M5OP_DIST_TOGGLE_SYNC); +M5OP(m5_arm, M5OP_ARM) \ +M5OP(m5_quiesce, M5OP_QUIESCE) \ +M5OP(m5_quiesce_ns, M5OP_QUIESCE_NS)\ +M5OP(m5_quiesce_cycle, M5OP_QUIESCE_CYCLE) \ +M5OP(m5_quiesce_time, M5OP_QUIESCE_TIME)\ +M5OP(m5_rpns, M5OP_RPNS)\ +M5OP(m5_wake_cpu, M5OP_WAKE_CPU)\ +M5OP(m5_exit, M5OP_EXIT)\ +M5OP(m5_fail, M5OP_FAIL)\ +M5OP(m5_init_param, M5OP_INIT_PARAM)\ +M5OP(m5_load_symbol, M5OP_LOAD_SYMBOL) \ +M5OP(m5_reset_stats, M5OP_RESET_STATS) \ +M5OP(m5_dump_stats, M5OP_DUMP_STATS)\ +M5OP(m5_dump_reset_stats, M5OP_DUMP_RESET_STATS)\ +M5OP(m5_checkpoint, M5OP_CHECKPOINT)\ +M5OP(m5_write_file, M5OP_WRITE_FILE)\ +M5OP(m5_read_file, M5OP_READ_FILE) \ +M5OP(m5_debug_break, M5OP_DEBUG_BREAK) \ +M5OP(m5_switch_cpu, M5OP_SWITCH_CPU)\ +M5OP(m5_add_symbol, M5OP_ADD_SYMBOL)\ +M5OP(m5_panic, M5OP_PANIC) \ +M5OP(m5_work_begin, M5OP_WORK_BEGIN)\ +M5OP(m5_work_end, M5OP_WORK_END)\ +M5OP(m5_se_syscall, M5OP_SE_SYSCALL)\ +M5OP(m5_se_page_fault, M5OP_SE_PAGE_FAULT) \ +M5OP(m5_dist_toggle_sync, M5OP_DIST_TOGGLE_SYNC) #endif // __GEM5_ASM_GENERIC_M5OPS_H__ diff --git
[gem5-dev] Change in gem5/gem5[develop]: util: Delete the execfile m5 utility command.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/27233 )
Change subject: util: Delete the execfile m5 utility command.
..
util: Delete the execfile m5 utility command.
This command was just a thin wrapper around the readfile command, and
can be easily duplicated by piping the output of that command to
/tmp/execfile and then running it.
Change-Id: Ib77166ee9f07571d57e4d21e9615def55e5391a8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27233
Maintainer: Gabe Black
Tested-by: kokoro
Reviewed-by: Bobby R. Bruce
---
M util/m5/src/m5.c
1 file changed, 0 insertions(+), 20 deletions(-)
Approvals:
Bobby R. Bruce: Looks good to me, approved
Gabe Black: Looks good to me, approved
kokoro: Regressions pass
diff --git a/util/m5/src/m5.c b/util/m5/src/m5.c
index de382d0..6e3efac 100644
--- a/util/m5/src/m5.c
+++ b/util/m5/src/m5.c
@@ -226,23 +226,6 @@
}
void
-do_exec_file(int argc, char *argv[])
-{
-if (argc > 0)
-usage();
-
-const char *destname = "/tmp/execfile";
-
-int fid = open(destname, O_WRONLY, 0777);
-int len = read_file(fid);
-close(fid);
-if (len > 0) {
-execl(destname, "execfile", NULL);
-err(1, "execl failed!");
-}
-}
-
-void
do_checkpoint(int argc, char *argv[])
{
uint64_t ints[2];
@@ -306,9 +289,6 @@
"delay (default 0) dump the "
"stats, and then optionally "
"every period after" },
-{ "execfile", do_exec_file,"read a preselected file
into "
- "/tmp/execfile and then
exec() "
- "it" },
{ "exit", do_exit, "[delay] // Exit after
delay, "
"or immediately" },
{ "fail", do_fail, " [delay] // Exit with "
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ib77166ee9f07571d57e4d21e9615def55e5391a8
Gerrit-Change-Number: 27233
Gerrit-PatchSet: 11
Gerrit-Owner: Gabe Black
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Earl Ou
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Yu-hsin Wang
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: misc: Replace a deprecated method in protoio.cc.
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/28185 ) Change subject: misc: Replace a deprecated method in protoio.cc. .. misc: Replace a deprecated method in protoio.cc. A warning says that ByteSize is now deprecated, and should be replaced with ByteSizeLong. This change does that. Change-Id: I0b1aef733c509a73a0af9c39b359d39579d1fd37 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28185 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- M src/proto/protoio.cc 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/src/proto/protoio.cc b/src/proto/protoio.cc index 93c5749..2efcc27 100644 --- a/src/proto/protoio.cc +++ b/src/proto/protoio.cc @@ -87,7 +87,7 @@ io::CodedOutputStream codedStream(zeroCopyStream); // Write the size of the message to the stream -codedStream.WriteVarint32(msg.ByteSize()); +codedStream.WriteVarint32(msg.ByteSizeLong()); // Write the message itself to the stream msg.SerializeWithCachedSizes(); -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/28185 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I0b1aef733c509a73a0af9c39b359d39579d1fd37 Gerrit-Change-Number: 28185 Gerrit-PatchSet: 2 Gerrit-Owner: Gabe Black Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Nikos Nikoleris Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: util: Refactor the string->register packing function in the m5 utility.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/27229 )
Change subject: util: Refactor the string->register packing function in the
m5 utility.
..
util: Refactor the string->register packing function in the m5 utility.
This change removes the responsibility for checking the number of
arguments and handing the default of no string back into init_param and
out of the function which packs strings into registers. It also renames
the function to more closely match its purpose, and rewrites it to be a
bit simpler and (IMHO) easier to follow.
Importantly, rather than doing a hand implemented strcpy which would
follow the endianness of the target/simulated platform, this change
makes this function pack the registers explicitly in little endian byte
order. This way on the consuming end in gem5, the initParam function
doesn't have to care what the guest endianness is, it can just translate
them from little endian to whatever the host endianness is (very likely
also little endian).
Change-Id: Ie9f79ecb8d4584c6e47a2793a31ccaa8c7c15986
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27229
Reviewed-by: Bobby R. Bruce
Maintainer: Gabe Black
Tested-by: kokoro
---
M util/m5/src/m5.c
1 file changed, 15 insertions(+), 14 deletions(-)
Approvals:
Bobby R. Bruce: Looks good to me, approved
Gabe Black: Looks good to me, approved
kokoro: Regressions pass
diff --git a/util/m5/src/m5.c b/util/m5/src/m5.c
index 83174d0..ae9068b 100644
--- a/util/m5/src/m5.c
+++ b/util/m5/src/m5.c
@@ -76,23 +76,24 @@
}
void
-parse_str_args_to_regs(int argc, char *argv[], uint64_t regs[], int len)
+pack_str_into_regs(const char *str, uint64_t regs[], int num_regs)
{
-if (argc > 1 || (argc > 0 && strlen(argv[0]) > len * sizeof(uint64_t)))
+const size_t RegSize = sizeof(regs[0]);
+const size_t MaxLen = num_regs * RegSize;
+
+size_t len = strlen(str);
+
+if (len > MaxLen)
usage();
-int i;
-for (i = 0; i < len; i++)
-regs[i] = 0;
+memset(regs, 0, MaxLen);
-if (argc == 0)
-return;
-
-int n;
-for (n = 0, i = 0; i < len && n < strlen(argv[0]); n++) {
-*((char *)([i]) + (n % 8)) = argv[0][n];
-if ((n % 8) == 7)
-i++;
+while (len) {
+for (int offset = 0; offset < RegSize && len; offset++, len--) {
+int shift = offset * 8;
+*regs |= (uint64_t)(uint8_t)*str++ << shift;
+}
+regs++;
}
}
@@ -277,7 +278,7 @@
usage();
uint64_t key_str[2];
-parse_str_args_to_regs(argc, argv, key_str, 2);
+pack_str_into_regs(argc == 0 ? "" : argv[0], key_str, 2);
uint64_t val = m5_init_param(key_str[0], key_str[1]);
printf("%"PRIu64, val);
}
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ie9f79ecb8d4584c6e47a2793a31ccaa8c7c15986
Gerrit-Change-Number: 27229
Gerrit-PatchSet: 10
Gerrit-Owner: Gabe Black
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Earl Ou
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Yu-hsin Wang
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: sim: Simplify collecting the key value in initParam.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/27228 )
Change subject: sim: Simplify collecting the key value in initParam.
..
sim: Simplify collecting the key value in initParam.
If the first register is all zeroes, it doesn't really matter what the
other register is. If the first register has the entire string, we still
don't care what the other register has in it. There's no reason to
complicate the code with these extra checks.
Change-Id: I22ad521b9ace915ccb75f15934fc6b3d650d5293
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27228
Maintainer: Bobby R. Bruce
Tested-by: kokoro
Reviewed-by: Ciro Santilli
---
M src/sim/pseudo_inst.cc
1 file changed, 2 insertions(+), 11 deletions(-)
Approvals:
Ciro Santilli: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index a450bd8..534f706 100644
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -259,18 +259,9 @@
const int len = 2 * sizeof(uint64_t) + 1;
char key_str[len];
memset(key_str, '\0', len);
-if (key_str1 == 0) {
-assert(key_str2 == 0);
-} else {
-strncpy(key_str, (char *)_str1, sizeof(uint64_t));
-}
-if (strlen(key_str) == sizeof(uint64_t)) {
-strncpy(key_str + sizeof(uint64_t), (char *)_str2,
-sizeof(uint64_t));
-} else {
-assert(key_str2 == 0);
-}
+memcpy(key_str, (char *)_str1, sizeof(key_str1));
+memcpy(key_str + sizeof(uint64_t), (char *)_str2,
sizeof(key_str2));
// Compare the key parameter with the known values to select the return
// value
--
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Gerrit-Change-Id: I22ad521b9ace915ccb75f15934fc6b3d650d5293
Gerrit-Change-Number: 27228
Gerrit-PatchSet: 10
Gerrit-Owner: Gabe Black
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Ciro Santilli
Gerrit-Reviewer: Earl Ou
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Yu-hsin Wang
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: util: Remove the "pin" command from the m5 utility.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/27226 )
Change subject: util: Remove the "pin" command from the m5 utility.
..
util: Remove the "pin" command from the m5 utility.
This command did not use any m5 ops, does the same thing as the
"taskset" command under Linux:
https://linux.die.net/man/1/taskset
and might even have introduced a build error if compiled for any other
OS since that would have left a trailing comma in the mainfuncs array.
While the last problem would be easy to correct, this is not related to
the purpose of this utility (giving access to m5 ops), and is redundant
with an existing standard utility provided with Linux.
Change-Id: Ie72b9310f5e6264f6035013f47ebe74a27464abb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27226
Reviewed-by: Ciro Santilli
Reviewed-by: Jason Lowe-Power
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M util/m5/src/m5.c
1 file changed, 1 insertion(+), 35 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
Ciro Santilli: Looks good to me, but someone else must approve
kokoro: Regressions pass
diff --git a/util/m5/src/m5.c b/util/m5/src/m5.c
index 4d14ed9..d5b27a3 100644
--- a/util/m5/src/m5.c
+++ b/util/m5/src/m5.c
@@ -38,12 +38,6 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#ifdef linux
-#define _GNU_SOURCE
-#include
-
-#endif
-
#include
#include
#include
@@ -303,31 +297,6 @@
(param >> 12) & 0xfff, (param >> 0) & 0xfff);
}
-#ifdef linux
-void
-do_pin(int argc, char *argv[])
-{
-if (argc < 2)
-usage();
-
-cpu_set_t mask;
-CPU_ZERO();
-
-const char *sep = ",";
-char *target = strtok(argv[0], sep);
-while (target) {
-CPU_SET(atoi(target), );
-target = strtok(NULL, sep);
-}
-
-if (sched_setaffinity(0, sizeof(cpu_set_t), ) < 0)
-err(1, "setaffinity");
-
-execvp(argv[1], [1]);
-err(1, "execvp failed!");
-}
-#endif
-
struct MainFunc
{
char *name;
@@ -349,10 +318,7 @@
{ "loadsymbol", do_loadsymbol, "" },
{ "initparam", do_initparam,"[key] // key must be shorter"
" than 16 chars" },
-{ "sw99param", do_sw99param,"" },
-#ifdef linux
-{ "pin",do_pin, " [args ...]" }
-#endif
+{ "sw99param", do_sw99param,"" }
};
int numfuncs = sizeof(mainfuncs) / sizeof(mainfuncs[0]);
--
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Gerrit-Change-Id: Ie72b9310f5e6264f6035013f47ebe74a27464abb
Gerrit-Change-Number: 27226
Gerrit-PatchSet: 10
Gerrit-Owner: Gabe Black
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Ciro Santilli
Gerrit-Reviewer: Earl Ou
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Yu-hsin Wang
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: util: Add missing functions to the java wrapper for m5 ops.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/27225 )
Change subject: util: Add missing functions to the java wrapper for m5 ops.
..
util: Add missing functions to the java wrapper for m5 ops.
Change-Id: I9bdef3cb78cc01b0743ea38eec6f6d28cd2f6765
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27225
Reviewed-by: Bobby R. Bruce
Maintainer: Gabe Black
Tested-by: kokoro
---
M util/m5/src/jni/gem5Op.java
M util/m5/src/jni_gem5Op.c
2 files changed, 56 insertions(+), 0 deletions(-)
Approvals:
Bobby R. Bruce: Looks good to me, approved
Gabe Black: Looks good to me, approved
kokoro: Regressions pass
diff --git a/util/m5/src/jni/gem5Op.java b/util/m5/src/jni/gem5Op.java
index 52c36ff..11403bf 100644
--- a/util/m5/src/jni/gem5Op.java
+++ b/util/m5/src/jni/gem5Op.java
@@ -57,8 +57,14 @@
public native void reset_stats(long ns_delay, long ns_period);
public native void dump_stats(long ns_delay, long ns_period);
public native void dump_reset_stats(long ns_delay, long ns_period);
+public native long read_file(byte[] buffer, long len, long offset);
+public native long write_file(byte[] buffer, long len, long offset,
+ String filename);
public native void debug_break();
public native void switch_cpu();
+public native void dist_toggle_sync();
+public native void add_symbol(long addr, String symbol);
+public native void load_symbol();
public native void panic();
public native void work_begin(long workid, long threadid);
public native void work_end(long workid, long threadid);
diff --git a/util/m5/src/jni_gem5Op.c b/util/m5/src/jni_gem5Op.c
index 6c3f696..83a9512 100644
--- a/util/m5/src/jni_gem5Op.c
+++ b/util/m5/src/jni_gem5Op.c
@@ -142,6 +142,33 @@
m5_dump_reset_stats(j_ns_delay, j_ns_period);
}
+JNIEXPORT jlong JNICALL
+Java_jni_gem5Op_read_1file(JNIEnv *env, jobject obj,
+ jbyteArray j_buffer, jlong j_len, jlong
j_offset)
+{
+jbyte *buffer = (*env)->GetByteArrayElements(env, j_buffer, 0);
+
+uint64_t result = m5_read_file(buffer, j_len, j_offset);
+
+(*env)->ReleaseByteArrayElements(env, j_buffer, buffer, JNI_ABORT);
+return (result & 0x7FFFULL);
+}
+
+JNIEXPORT jlong JNICALL
+Java_jni_gem5Op_write_1file(JNIEnv *env, jobject obj,
+jbyteArray j_buffer, jlong j_len, jlong
j_offset,
+jstring j_filename)
+{
+jbyte *buffer = (*env)->GetByteArrayElements(env, j_buffer, 0);
+const char *filename = (*env)->GetStringUTFChars(env, j_filename,
NULL);
+
+uint64_t result = m5_write_file(buffer, j_len, j_offset, filename);
+
+(*env)->ReleaseStringUTFChars(env, j_filename, filename);
+(*env)->ReleaseByteArrayElements(env, j_buffer, buffer, JNI_ABORT);
+return (result & 0x7FFFULL);
+}
+
JNIEXPORT void JNICALL
Java_jni_gem5Op_debug_1break(JNIEnv *env, jobject obj)
{
@@ -155,6 +182,29 @@
}
JNIEXPORT void JNICALL
+Java_jni_gem5Op_dist_1toggle_1sync(JNIEnv *env, jobject obj)
+{
+m5_dist_toggle_sync();
+}
+
+JNIEXPORT void JNICALL
+Java_jni_gem5Op_add_symbol(JNIEnv *env, jobject obj,
+jlong j_addr, jstring j_symbol)
+{
+const char *symbol = (*env)->GetStringUTFChars(env, j_symbol, NULL);
+
+m5_add_symbol(j_addr, symbol);
+
+(*env)->ReleaseStringUTFChars(env, j_symbol, symbol);
+}
+
+JNIEXPORT void JNICALL
+Java_jni_gem5Op_load_1symbol(JNIEnv *env, jobject obj)
+{
+m5_load_symbol();
+}
+
+JNIEXPORT void JNICALL
Java_jni_gem5Op_panic(JNIEnv *env, jobject obj)
{
m5_panic();
--
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Gerrit-Change-Id: I9bdef3cb78cc01b0743ea38eec6f6d28cd2f6765
Gerrit-Change-Number: 27225
Gerrit-PatchSet: 10
Gerrit-Owner: Gabe Black
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Earl Ou
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Yu-hsin Wang
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: util: Update the java wrapper names for m5 ops.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/27223 )
Change subject: util: Update the java wrapper names for m5 ops.
..
util: Update the java wrapper names for m5 ops.
These were regularized a while ago, but not updated in the java wrapper.
There are also missing ops, but these will be added in another change.
Change-Id: Iaef281249c26d446709ba2b214ee37d574f6b72c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27223
Maintainer: Bobby R. Bruce
Tested-by: kokoro
Reviewed-by: Ciro Santilli
---
M util/m5/src/jni/gem5Op.java
M util/m5/src/jni_gem5Op.c
2 files changed, 18 insertions(+), 18 deletions(-)
Approvals:
Ciro Santilli: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved
kokoro: Regressions pass
diff --git a/util/m5/src/jni/gem5Op.java b/util/m5/src/jni/gem5Op.java
index 579ff34..52c36ff 100644
--- a/util/m5/src/jni/gem5Op.java
+++ b/util/m5/src/jni/gem5Op.java
@@ -44,21 +44,21 @@
public class gem5Op {
public native void arm(long address);
public native void quiesce();
-public native void quiesceNs(long ns);
-public native void quiesceCycle(long cycles);
-public native long quiesceTime();
+public native void quiesce_ns(long ns);
+public native void quiesce_cycle(long cycles);
+public native long quiesce_time();
public native long rpns();
-public native void wakeCPU(long cpuid);
+public native void wake_cpu(long cpuid);
public native void exit(long ns_delay);
public native void fail(long ns_delay, long code);
-public native long initparam(long key_str1, long key_str2);
+public native long init_param(long key_str1, long key_str2);
public native void checkpoint(long ns_delay, long ns_period);
public native void reset_stats(long ns_delay, long ns_period);
public native void dump_stats(long ns_delay, long ns_period);
-public native void dumpreset_stats(long ns_delay, long ns_period);
-public native void debugbreak();
-public native void switchcpu();
+public native void dump_reset_stats(long ns_delay, long ns_period);
+public native void debug_break();
+public native void switch_cpu();
public native void panic();
public native void work_begin(long workid, long threadid);
public native void work_end(long workid, long threadid);
diff --git a/util/m5/src/jni_gem5Op.c b/util/m5/src/jni_gem5Op.c
index ba61fc0..6c3f696 100644
--- a/util/m5/src/jni_gem5Op.c
+++ b/util/m5/src/jni_gem5Op.c
@@ -57,19 +57,19 @@
}
JNIEXPORT void JNICALL
-Java_jni_gem5Op_quiesceNs(JNIEnv *env, jobject obj, jlong j_ns)
+Java_jni_gem5Op_quiesce_1ns(JNIEnv *env, jobject obj, jlong j_ns)
{
m5_quiesce_ns(j_ns);
}
JNIEXPORT void JNICALL
-Java_jni_gem5Op_quiesceCycle(JNIEnv *env, jobject obj, jlong j_cycles)
+Java_jni_gem5Op_quiesce_1cycle(JNIEnv *env, jobject obj, jlong j_cycles)
{
m5_quiesce_cycle(j_cycles);
}
JNIEXPORT jlong JNICALL
-Java_jni_gem5Op_quiesceTime(JNIEnv *env, jobject obj)
+Java_jni_gem5Op_quiesce_1time(JNIEnv *env, jobject obj)
{
uint64_t time = m5_quiesce_time();
if (time & 0x8000ULL)
@@ -87,7 +87,7 @@
}
JNIEXPORT void JNICALL
-Java_jni_gem5Op_wakeCPU(JNIEnv *env, jobject obj, jlong j_cpuid)
+Java_jni_gem5Op_wake_1cpu(JNIEnv *env, jobject obj, jlong j_cpuid)
{
m5_wake_cpu(j_cpuid);
}
@@ -105,8 +105,8 @@
}
JNIEXPORT jlong JNICALL
-Java_jni_gem5Op_initparam(JNIEnv *env, jobject obj, jlong j_key_str1,
- jlong j_key_str2)
+Java_jni_gem5Op_init_1param(JNIEnv *env, jobject obj, jlong j_key_str1,
+ jlong j_key_str2)
{
uint64_t param = m5_init_param(j_key_str1, j_key_str2);
if (param & 0x8000ULL)
@@ -136,20 +136,20 @@
}
JNIEXPORT void JNICALL
-Java_jni_gem5Op_dumpreset_1stats(JNIEnv *env, jobject obj,
- jlong j_ns_delay, jlong j_ns_period)
+Java_jni_gem5Op_dump_1reset_1stats(JNIEnv *env, jobject obj,
+ jlong j_ns_delay, jlong j_ns_period)
{
m5_dump_reset_stats(j_ns_delay, j_ns_period);
}
JNIEXPORT void JNICALL
-Java_jni_gem5Op_debugbreak(JNIEnv *env, jobject obj)
+Java_jni_gem5Op_debug_1break(JNIEnv *env, jobject obj)
{
m5_debug_break();
}
JNIEXPORT void JNICALL
-Java_jni_gem5Op_switchcpu (JNIEnv *env, jobject obj)
+Java_jni_gem5Op_switch_1cpu (JNIEnv *env, jobject obj)
{
m5_switch_cpu();
}
--
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Gerrit-Change-Number: 27223
Gerrit-PatchSet: 10
Gerrit-Owner: Gabe Black
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Ciro Santilli
[gem5-dev] Change in gem5/gem5[develop]: misc: Get rid of the m5op_flags.h header.
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/27221 ) Change subject: misc: Get rid of the m5op_flags.h header. .. misc: Get rid of the m5op_flags.h header. This held flags for use with the critical path annotation instructions which are no longer accessible through the m5 utility and so not used. Change-Id: Ifee85ce78bb33c4a3e8c0db845974f17d8867199 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27221 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- D include/gem5/asm/generic/m5op_flags.h M include/gem5/asm/generic/m5ops.h M include/gem5/m5ops.h 3 files changed, 0 insertions(+), 54 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/include/gem5/asm/generic/m5op_flags.h b/include/gem5/asm/generic/m5op_flags.h deleted file mode 100644 index 0304b88..000 --- a/include/gem5/asm/generic/m5op_flags.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (c) 2017 ARM Limited - * All rights reserved - * - * The license below extends only to copyright in the software and shall - * not be construed as granting a license to any other intellectual - * property including but not limited to intellectual property relating - * to a hardware implementation of the functionality of the software - * licensed hereunder. You may use the software subject to the license - * terms below provided that you ensure that this notice is replicated - * unmodified and in its entirety in all distributions of the software, - * modified or unmodified, in source code or in binary form. - * - * Copyright (c) 2003-2006 The Regents of The University of Michigan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __GEM5_ASM_GENERIC_M5OP_FLAGS_H__ -#define __GEM5_ASM_GENERIC_M5OP_FLAGS_H__ - -/* Flags for annotation calls */ -#define M5_AN_FL_NONE 0x0 -#define M5_AN_FL_BAD0x2 -#define M5_AN_FL_LINK 0x10 -#define M5_AN_FL_RESET 0x20 - -#endif // __GEM5_ASM_GENERIC_M5OP_FLAGS_H__ diff --git a/include/gem5/asm/generic/m5ops.h b/include/gem5/asm/generic/m5ops.h index e887b72..f1e8298 100644 --- a/include/gem5/asm/generic/m5ops.h +++ b/include/gem5/asm/generic/m5ops.h @@ -41,8 +41,6 @@ #ifndef __GEM5_ASM_GENERIC_M5OPS_H__ #define __GEM5_ASM_GENERIC_M5OPS_H__ -#include - #define M5OP_ARM0x00 #define M5OP_QUIESCE0x01 #define M5OP_QUIESCE_NS 0x02 diff --git a/include/gem5/m5ops.h b/include/gem5/m5ops.h index b118f4a..440ea2d 100644 --- a/include/gem5/m5ops.h +++ b/include/gem5/m5ops.h @@ -35,8 +35,6 @@ #include -#include - void m5_arm(uint64_t address); void m5_quiesce(void); void m5_quiesce_ns(uint64_t ns); -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/27221 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: Ifee85ce78bb33c4a3e8c0db845974f17d8867199 Gerrit-Change-Number: 27221 Gerrit-PatchSet: 10 Gerrit-Owner: Gabe Black Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Earl Ou Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Yu-hsin Wang Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___
[gem5-dev] Change in gem5/gem5[develop]: misc: Remove m5a_ (critical path annotation) prototypes from m5ops.h.
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/27220 ) Change subject: misc: Remove m5a_ (critical path annotation) prototypes from m5ops.h. .. misc: Remove m5a_ (critical path annotation) prototypes from m5ops.h. This mechanism is still available within gem5 as far as I can tell, but it's not accessible through the pseudo instruction interface. Change-Id: I69bd3c92239721a6d1049cee66eb7a0c1bdbc272 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27220 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- M include/gem5/m5ops.h 1 file changed, 0 insertions(+), 17 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/include/gem5/m5ops.h b/include/gem5/m5ops.h index 8a35666..b118f4a 100644 --- a/include/gem5/m5ops.h +++ b/include/gem5/m5ops.h @@ -64,23 +64,6 @@ void m5_work_begin(uint64_t workid, uint64_t threadid); void m5_work_end(uint64_t workid, uint64_t threadid); -// These operations are for critical path annotation -void m5a_bsm(char *sm, const void *id, int flags); -void m5a_esm(char *sm); -void m5a_begin(int flags, char *st); -void m5a_end(void); -void m5a_q(const void *id, char *q, int count); -void m5a_dq(const void *id, char *q, int count); -void m5a_wf(const void *id, char *q, char *sm, int count); -void m5a_we(const void *id, char *q, char *sm, int count); -void m5a_ws(const void *id, char *q, char *sm); -void m5a_sq(const void *id, char *q, int count, int flags); -void m5a_aq(const void *id, char *q, int count); -void m5a_pq(const void *id, char *q, int count); -void m5a_l(char *lsm, const void *id, char *sm); -void m5a_identify(uint64_t id); -uint64_t m5a_getid(void); - #ifdef __cplusplus } #endif -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/27220 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I69bd3c92239721a6d1049cee66eb7a0c1bdbc272 Gerrit-Change-Number: 27220 Gerrit-PatchSet: 10 Gerrit-Owner: Gabe Black Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Earl Ou Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Yu-hsin Wang Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: util: Correct some help text for the initparam m5 utility command.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/27227 )
Change subject: util: Correct some help text for the initparam m5 utility
command.
..
util: Correct some help text for the initparam m5 utility command.
The "key" value passed to the initparam command can be at most 16
characters long, but the text said it had to be shorter than 16
characters.
Change-Id: Ic98dc87feb868b44c4210ae16cb5b0dad2a67d88
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27227
Reviewed-by: Jason Lowe-Power
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M util/m5/src/m5.c
1 file changed, 2 insertions(+), 2 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/util/m5/src/m5.c b/util/m5/src/m5.c
index d5b27a3..83174d0 100644
--- a/util/m5/src/m5.c
+++ b/util/m5/src/m5.c
@@ -316,8 +316,8 @@
{ "checkpoint", do_checkpoint, "[delay [period]]" },
{ "addsymbol", do_addsymbol," " },
{ "loadsymbol", do_loadsymbol, "" },
-{ "initparam", do_initparam,"[key] // key must be shorter"
- " than 16 chars" },
+{ "initparam", do_initparam,"[key] // key may be at most"
+ " 16 characters long" },
{ "sw99param", do_sw99param,"" }
};
int numfuncs = sizeof(mainfuncs) / sizeof(mainfuncs[0]);
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ic98dc87feb868b44c4210ae16cb5b0dad2a67d88
Gerrit-Change-Number: 27227
Gerrit-PatchSet: 10
Gerrit-Owner: Gabe Black
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Earl Ou
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Yu-hsin Wang
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: util: Convert the other architecture's m5 utility builds to scons.
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/27219 ) Change subject: util: Convert the other architecture's m5 utility builds to scons. .. util: Convert the other architecture's m5 utility builds to scons. Because I don't have a canonical toolchain to set SPARC's defaults to, it will by default build for Linux instead of Solaris like it used to. This will make it hard to test, but without a compiler there's not much I can do. This also coincidentally brings the SPARC version more in line with the other variants which all target Linux. Change-Id: Ie19217e988782da124306160920f40ef168840e4 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27219 Maintainer: Bobby R. Bruce Tested-by: kokoro Reviewed-by: Daniel Carvalho --- D util/m5/src/Makefile.arm D util/m5/src/Makefile.thumb D util/m5/src/Makefile.x86 C util/m5/src/arm/SConsopts R util/m5/src/arm/m5op.S C util/m5/src/sparc/SConsopts R util/m5/src/sparc/m5op.S R util/m5/src/thumb/SConsopts C util/m5/src/thumb/m5op.S C util/m5/src/x86/SConsopts R util/m5/src/x86/m5op.S 11 files changed, 21 insertions(+), 343 deletions(-) Approvals: Daniel Carvalho: Looks good to me, approved Bobby R. Bruce: Looks good to me, approved kokoro: Regressions pass diff --git a/util/m5/src/Makefile.arm b/util/m5/src/Makefile.arm deleted file mode 100644 index 2588f09..000 --- a/util/m5/src/Makefile.arm +++ /dev/null @@ -1,95 +0,0 @@ -# Copyright (c) 2010 ARM Limited -# All rights reserved. -# -# The license below extends only to copyright in the software and shall -# not be construed as granting a license to any other intellectual -# property including but not limited to intellectual property relating -# to a hardware implementation of the functionality of the software -# licensed hereunder. You may use the software subject to the license -# terms below provided that you ensure that this notice is replicated -# unmodified and in its entirety in all distributions of the software, -# modified or unmodified, in source code or in binary form. -# -# Copyright (c) 2005-2006 The Regents of The University of Michigan -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are -# met: redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer; -# redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution; -# neither the name of the copyright holders nor the names of its -# contributors may be used to endorse or promote products derived from -# this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -### If we are not compiling on an arm, we must use cross tools ### -ifneq ($(shell uname -m), armv7l) -CROSS_COMPILE?=arm-linux-gnueabi- -endif -CC=$(CROSS_COMPILE)gcc -AS=$(CROSS_COMPILE)as -LD=$(CROSS_COMPILE)ld -AR=$(CROSS_COMPILE)ar - -JC=javac -JR=jar -### JDK_PATH must be set to build gem5OpJni -#JDK_PATH=/path/to/jdk/version_number - -CFLAGS=-O2 -I $(JDK_PATH)/include/ -I $(JDK_PATH)/include/linux \ - -I../../../include -march=armv7-a -LDFLAGS=-L. -lm5 -static - -LIB_OBJS=m5op_arm.o m5_mmap.o -OBJS=m5.o -JNI_OBJS=m5op_arm.o jni_gem5Op.o -LUA_OBJS=lua_gem5Op.o m5op_arm.o m5_mmap.o - -### Need to install lua5.1 library to compile gem5OpLua.so -LUA_HEADER_INCLUDE=$(shell pkg-config --cflags lua51) \ - -I/usr/include/x86_64-linux-gnu - -all: libm5.a m5 - -%.o: %.S - $(CC) $(CFLAGS) -o $@ -c $< - -%.o: %.c - $(CC) $(CFLAGS) -o $@ -c $< - -m5: $(OBJS) libm5.a - $(CC) -o $@ $^ $(LDFLAGS) - -libm5.a: $(LIB_OBJS) - $(AR) rcs $@ $^ - -gem5OpJni: gem5OpJni.jar $(JNI_OBJS) - $(CC) --shared -o lib$@.so $(JNI_OBJS) - -gem5OpJni.jar: - $(JC) jni/gem5Op.java -h .; \ - $(JR) cvf $@ jni/*.class - -lua_gem5Op.o: lua_gem5Op.c - $(CC) $(CFLAGS) $(LUA_HEADER_INCLUDE) -o $@ -c $< -fPIC -
[gem5-dev] Change in gem5/gem5[develop]: misc: Use a const char * in the m5op m5_add_symbol.
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/27224 ) Change subject: misc: Use a const char * in the m5op m5_add_symbol. .. misc: Use a const char * in the m5op m5_add_symbol. The symbol name is not modified by the m5 op, so a const char * is more accurate and gives the caller more flexibility as far as what they can pass in. Change-Id: Iee567bceef501643175dd5c65551a4c8554a6e3b Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27224 Maintainer: Bobby R. Bruce Tested-by: kokoro Reviewed-by: Ciro Santilli --- M include/gem5/m5ops.h 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Ciro Santilli: Looks good to me, approved Bobby R. Bruce: Looks good to me, approved kokoro: Regressions pass diff --git a/include/gem5/m5ops.h b/include/gem5/m5ops.h index 440ea2d..1c08017 100644 --- a/include/gem5/m5ops.h +++ b/include/gem5/m5ops.h @@ -56,7 +56,7 @@ void m5_debug_break(void); void m5_switch_cpu(void); void m5_dist_toggle_sync(void); -void m5_add_symbol(uint64_t addr, char *symbol); +void m5_add_symbol(uint64_t addr, const char *symbol); void m5_load_symbol(); void m5_panic(void); void m5_work_begin(uint64_t workid, uint64_t threadid); -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/27224 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: Iee567bceef501643175dd5c65551a4c8554a6e3b Gerrit-Change-Number: 27224 Gerrit-PatchSet: 10 Gerrit-Owner: Gabe Black Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Ciro Santilli Gerrit-Reviewer: Earl Ou Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Yu-hsin Wang Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: misc: Get rid of constants used for critical path annotation.
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/27222 ) Change subject: misc: Get rid of constants used for critical path annotation. .. misc: Get rid of constants used for critical path annotation. The constant for the critical path annotation function itself is still used in gem5 along with the M5OP_RESERVED opcodes to signal unimplemented functions. Change-Id: I71c7a56d0346f8aafe23e733a1eea703dda1af92 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27222 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- M include/gem5/asm/generic/m5ops.h 1 file changed, 0 insertions(+), 17 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/include/gem5/asm/generic/m5ops.h b/include/gem5/asm/generic/m5ops.h index f1e8298..ca85e9c 100644 --- a/include/gem5/asm/generic/m5ops.h +++ b/include/gem5/asm/generic/m5ops.h @@ -80,23 +80,6 @@ // These operations are for critical path annotation #define M5OP_ANNOTATE 0x55 -#define M5OP_AN_BSM 0x1 -#define M5OP_AN_ESM 0x2 -#define M5OP_AN_BEGIN 0x3 -#define M5OP_AN_END 0x4 -#define M5OP_AN_Q 0x6 -#define M5OP_AN_DQ 0x7 -#define M5OP_AN_WF 0x8 -#define M5OP_AN_WE 0x9 -#define M5OP_AN_RQ 0xA -#define M5OP_AN_WS 0xB -#define M5OP_AN_SQ 0xC -#define M5OP_AN_AQ 0xD -#define M5OP_AN_PQ 0xE -#define M5OP_AN_L 0xF -#define M5OP_AN_IDENTIFY0x10 -#define M5OP_AN_GETID 0x11 - #define M5OP_FOREACH\ M5OP(m5_arm, M5OP_ARM); \ -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/27222 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I71c7a56d0346f8aafe23e733a1eea703dda1af92 Gerrit-Change-Number: 27222 Gerrit-PatchSet: 10 Gerrit-Owner: Gabe Black Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Earl Ou Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Yu-hsin Wang Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: arm: Fix some bugs in the aapcs64 implementation.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/28267 )
Change subject: arm: Fix some bugs in the aapcs64 implementation.
..
arm: Fix some bugs in the aapcs64 implementation.
The templates which checked for short vectors, and our approximation of
HFA, HVA and HXA types were not correct. This change actually simplifies
them along with getting them to produce correct results. In the case of
HXA, there was a logic bug where an && was used where an || was
intended.
There may still be bugs in the actual collection of arguments and
setting of return values since those aspects are harder to test.
Change-Id: Ice3177205a98c678ecb43ba600813b3909c44e6b
---
M src/arch/arm/aapcs64.hh
1 file changed, 16 insertions(+), 30 deletions(-)
diff --git a/src/arch/arm/aapcs64.hh b/src/arch/arm/aapcs64.hh
index 203846d..30597f5 100644
--- a/src/arch/arm/aapcs64.hh
+++ b/src/arch/arm/aapcs64.hh
@@ -70,24 +70,17 @@
// A short vector is a machine type that is composed of repeated instances
of
// one fundamental integral or floating- point type. It may be 8 or 16
bytes
-// in total size. We represent it here as an opaque blob of data with an
-// appropriate alignment requirement.
+// in total size.
-template
-using Aapcs64ShortVectorCandidate =
-alignas(sizeof(T) * count) uint8_t [sizeof(T) * count];
-
-template
-using Aapcs64ShortVector = Aapcs64ShortVectorCandidate::value || std::is_floating_point::value) &&
-(sizeof(T) * count == 8 || sizeof(T) * count == 16)>::type>;
-
-template
+template
struct IsAapcs64ShortVector : public std::false_type {};
template
-struct IsAapcs64ShortVector> : public
std::true_type
+struct IsAapcs64ShortVector::value || std::is_floating_point::value) &&
+(sizeof(E) * N == 8 || sizeof(E) * N == 16)>::type> :
+public std::true_type
{};
/*
@@ -114,38 +107,31 @@
// we can't actually detect that or manipulate that with templates.
Instead,
// we approximate that by detecting only arrays with that property.
-template
-using Aapcs64HomogeneousAggregate = T[count];
-
// An Homogeneous Floating-Point Aggregate (HFA) is an Homogeneous
Aggregate
// with a Fundemental Data Type that is a Floating-Point type and at most
four
// uniquely addressable members.
-template
-using Aapcs64Hfa = Aapcs64HomogeneousAggregate::value &&
- count <= 4>::type>;
-
template
struct IsAapcs64Hfa : public std::false_type {};
template
-struct IsAapcs64Hfa> : public std::true_type {};
+struct IsAapcs64Hfa::value &&
+N <= 4>::type> : public std::true_type
+{};
// An Homogeneous Short-Vector Aggregate (HVA) is an Homogeneous Aggregate
with
// a Fundamental Data Type that is a Short-Vector type and at most four
// uniquely addressable members.
-template
-using Aapcs64Hva = Aapcs64HomogeneousAggregate::value &&
- count <= 4>::type>;
-
template
struct IsAapcs64Hva : public std::false_type {};
template
-struct IsAapcs64Hva> : public std::true_type {};
+struct IsAapcs64Hva::value &&
+N <= 4>::type> : public std::true_type
+{};
// A shorthand to test if a type is an HVA or an HFA.
template
@@ -153,7 +139,7 @@
template
struct IsAapcs64Hxa::value && IsAapcs64Hva::value>::type> :
+IsAapcs64Hfa::value || IsAapcs64Hva::value>::type> :
public std::true_type
{};
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/28267
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ice3177205a98c678ecb43ba600813b3909c44e6b
Gerrit-Change-Number: 28267
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: arm: Add a unit test for some aspects of the aapcs64 ABI.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/28268 )
Change subject: arm: Add a unit test for some aspects of the aapcs64 ABI.
..
arm: Add a unit test for some aspects of the aapcs64 ABI.
This test covers the templates which attempt to classify types, but not the
actual gathering of arguments of distribution of return values. As before,
we
can't really use standard C++ to accurately test for HFAs and HVAs, so we
stick
with approximating them by detecting arrays of the right types.
For example, I think technically we should also accept a struct with only 4
float members, but c++ templates aren't able to match against types in that
way
as far as I know.
Change-Id: I1d7756a964a86c0c5ea13e068a5fc74603e14e30
---
M src/arch/arm/SConscript
A src/arch/arm/aapcs64.test.cc
2 files changed, 121 insertions(+), 0 deletions(-)
diff --git a/src/arch/arm/SConscript b/src/arch/arm/SConscript
index e51437e..73ebcac 100644
--- a/src/arch/arm/SConscript
+++ b/src/arch/arm/SConscript
@@ -44,6 +44,8 @@
# Workaround for bug in SCons version > 0.97d20071212
# Scons bug id: 2006 M5 Bug id: 308
Dir('isa/formats')
+
+GTest('aapcs64.test', 'aapcs64.test.cc')
Source('decoder.cc')
Source('faults.cc')
Source('insts/branch.cc')
diff --git a/src/arch/arm/aapcs64.test.cc b/src/arch/arm/aapcs64.test.cc
new file mode 100644
index 000..362906a
--- /dev/null
+++ b/src/arch/arm/aapcs64.test.cc
@@ -0,0 +1,119 @@
+/*
+ * Copyright (c) 2012 Google
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include
+
+#include "arch/arm/aapcs64.hh"
+
+TEST(Aapcs64, IsAapcs64ShortVector)
+{
+using Scalar = uint64_t;
+using TooShort = uint8_t[2];
+using TooLong = uint16_t[32];
+using TooLongFloat = double[4];
+using EightLong = uint32_t[2];
+using SixteenLong = uint64_t[2];
+using EightLongFloat = float[2];
+using SixteenLongFloat = double[2];
+
+EXPECT_FALSE(GuestABI::IsAapcs64ShortVector::value);
+EXPECT_FALSE(GuestABI::IsAapcs64ShortVector::value);
+EXPECT_FALSE(GuestABI::IsAapcs64ShortVector::value);
+EXPECT_FALSE(GuestABI::IsAapcs64ShortVector::value);
+EXPECT_FALSE(GuestABI::IsAapcs64ShortVector::value);
+
+EXPECT_TRUE(GuestABI::IsAapcs64ShortVector::value);
+EXPECT_TRUE(GuestABI::IsAapcs64ShortVector::value);
+EXPECT_TRUE(GuestABI::IsAapcs64ShortVector::value);
+EXPECT_TRUE(GuestABI::IsAapcs64ShortVector::value);
+}
+
+TEST(Aapcs64, IsAapcs64Hfa)
+{
+// Accept floating point arrays with up to 4 members.
+EXPECT_TRUE(GuestABI::IsAapcs64Hfa::value);
+EXPECT_TRUE(GuestABI::IsAapcs64Hfa::value);
+EXPECT_TRUE(GuestABI::IsAapcs64Hfa::value);
+EXPECT_TRUE(GuestABI::IsAapcs64Hfa::value);
+
+EXPECT_TRUE(GuestABI::IsAapcs64Hfa::value);
+EXPECT_TRUE(GuestABI::IsAapcs64Hfa::value);
+EXPECT_TRUE(GuestABI::IsAapcs64Hfa::value);
+EXPECT_TRUE(GuestABI::IsAapcs64Hfa::value);
+
+// Too many members.
+EXPECT_FALSE(GuestABI::IsAapcs64Hfa::value);
+EXPECT_FALSE(GuestABI::IsAapcs64Hfa::value);
+
+// Wrong type of members, or not arrays.
+EXPECT_FALSE(GuestABI::IsAapcs64Hfa::value);
+EXPECT_FALSE(GuestABI::IsAapcs64Hfa::value);
+struct Struct {};
+EXPECT_FALSE(GuestABI::IsAapcs64Hfa::value);
+EXPECT_FALSE(GuestABI::IsAapcs64Hfa::value);
+}
+
+TEST(Aapcs64, IsAapcs64Hva)
+{
+using SvaInt =
[gem5-dev] review flurry
Hey everybody, lets slow down here a little so that I have a chance to actually see a review before the change gets checked in. I think we have at least one bug checked in already. If a change hangs around for months that's too long, but at least a day so everyone has a chance to see what's going is a reasonable minimum. Gabe ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: sim: Inheritance fixes in varargs
Nikos Nikoleris has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/28250 )
Change subject: sim: Inheritance fixes in varargs
..
sim: Inheritance fixes in varargs
Change-Id: I3c6027223893363df098d1990a4ad3d07c2ff5ff
Signed-off-by: Nikos Nikoleris
---
M src/sim/guest_abi/varargs.hh
1 file changed, 4 insertions(+), 0 deletions(-)
diff --git a/src/sim/guest_abi/varargs.hh b/src/sim/guest_abi/varargs.hh
index 6a19db8..07ed2a1 100644
--- a/src/sim/guest_abi/varargs.hh
+++ b/src/sim/guest_abi/varargs.hh
@@ -70,6 +70,8 @@
class VarArgsBase : public VarArgsBase
{
public:
+virtual ~VarArgsBase() = default;
+
// The virtual function takes a reference parameter so that the
different
// _getImpl methods can co-exist through overloading.
virtual void _getImpl(First &) = 0;
@@ -126,6 +128,8 @@
// Declare state to pass to the Argument<>::get methods.
ThreadContext *tc;
typename ABI::State state;
+// Make sure base class _getImpl-es don't get hidden by ours.
+using Base::_getImpl;
// Give the "using" statement in our subclass something to refer to.
void _getImpl();
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I3c6027223893363df098d1990a4ad3d07c2ff5ff
Gerrit-Change-Number: 28250
Gerrit-PatchSet: 1
Gerrit-Owner: Nikos Nikoleris
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Avoid const from member due to ::operator=(...)
Nikos Nikoleris has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/28249 )
Change subject: mem-ruby: Avoid const from member due to
::operator=(...)
..
mem-ruby: Avoid const from member due to ::operator=(...)
Change-Id: I172f48ce8ee4a3870165309342dadc2ac39ded9a
Signed-off-by: Nikos Nikoleris
---
M src/mem/ruby/slicc_interface/Message.hh
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mem/ruby/slicc_interface/Message.hh
b/src/mem/ruby/slicc_interface/Message.hh
index 0c2e0aa..1044fe0 100644
--- a/src/mem/ruby/slicc_interface/Message.hh
+++ b/src/mem/ruby/slicc_interface/Message.hh
@@ -104,7 +104,7 @@
void setVnet(int net) { vnet = net; }
private:
-const Tick m_time;
+Tick m_time;
Tick m_LastEnqueueTime; // my last enqueue time
Tick m_DelayedTicks; // my delayed cycles
uint64_t m_msg_counter; // FIXME, should this be a 64-bit value?
--
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[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Remove unused SFINAE causing compilation errors
Nikos Nikoleris has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/28251 )
Change subject: arch-arm: Remove unused SFINAE causing compilation errors
..
arch-arm: Remove unused SFINAE causing compilation errors
clang on MacOS is unable to deduce the template parameters with the
following warning which is turned to an error due to -Werror
build/ARM/arch/arm/aapcs64.hh:90:8: error:
class template partial specialization contains template parameters
that cannot be deduced; this partial specialization will never be used
[-Wunusable-partial-specialization]
Change-Id: Id3cf820c636a5479e2ccd761817cc29a530fe5cc
Signed-off-by: Nikos Nikoleris
---
M src/arch/arm/aapcs64.hh
1 file changed, 0 insertions(+), 4 deletions(-)
diff --git a/src/arch/arm/aapcs64.hh b/src/arch/arm/aapcs64.hh
index 203846d..4dff86a 100644
--- a/src/arch/arm/aapcs64.hh
+++ b/src/arch/arm/aapcs64.hh
@@ -86,10 +86,6 @@
template
struct IsAapcs64ShortVector : public std::false_type {};
-template
-struct IsAapcs64ShortVector> : public
std::true_type
-{};
-
/*
* Composite Types
*/
--
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[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix access modifier in Arm*ProcessBits class
Hello Giacomo Travaglini,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/28248
to review the following change.
Change subject: arch-arm: Fix access modifier in Arm*ProcessBits class
..
arch-arm: Fix access modifier in Arm*ProcessBits class
Change-Id: Ie983abc94dd9e62bbec3f584b70b0d04d6e8305d
Reviewed-by: Giacomo Travaglini
Signed-off-by: Nikos Nikoleris
---
M src/arch/arm/freebsd/process.hh
M src/arch/arm/linux/process.hh
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/arch/arm/freebsd/process.hh
b/src/arch/arm/freebsd/process.hh
index ac0092e..d52512a 100644
--- a/src/arch/arm/freebsd/process.hh
+++ b/src/arch/arm/freebsd/process.hh
@@ -39,7 +39,7 @@
class ArmFreebsdProcessBits
{
- protected:
+ public:
struct SyscallABI {};
};
diff --git a/src/arch/arm/linux/process.hh b/src/arch/arm/linux/process.hh
index 0662d9f..0c15c28 100644
--- a/src/arch/arm/linux/process.hh
+++ b/src/arch/arm/linux/process.hh
@@ -1,5 +1,5 @@
/*
-* Copyright (c) 2011-2012 ARM Limited
+ * Copyright (c) 2011-2012 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -47,7 +47,7 @@
class ArmLinuxProcessBits
{
- protected:
+ public:
struct SyscallABI {};
};
--
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Gerrit-Change-Number: 28248
Gerrit-PatchSet: 1
Gerrit-Owner: Nikos Nikoleris
Gerrit-Reviewer: Giacomo Travaglini
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[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Remove alignment specified from alias declararions
Nikos Nikoleris has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/28252 ) Change subject: arch-arm: Remove alignment specified from alias declararions .. arch-arm: Remove alignment specified from alias declararions This causes a compilation error on MacOS and it's unclear whether it should be allowed in the first place. In addition, it doesn't seem to be used at the moment. https://stackoverflow.com/questions/15788947/where-can-i-use-alignas-in-c11 Change-Id: Icae4b21de62d69efe4937bdf9a51a473a5323acb Signed-off-by: Nikos Nikoleris --- M src/arch/arm/aapcs64.hh 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/arch/arm/aapcs64.hh b/src/arch/arm/aapcs64.hh index 4dff86a..d2e45a9 100644 --- a/src/arch/arm/aapcs64.hh +++ b/src/arch/arm/aapcs64.hh @@ -74,8 +74,7 @@ // appropriate alignment requirement. template -using Aapcs64ShortVectorCandidate = -alignas(sizeof(T) * count) uint8_t [sizeof(T) * count]; +using Aapcs64ShortVectorCandidate = uint8_t [sizeof(T) * count]; template using Aapcs64ShortVector = Aapcs64ShortVectorCandidatehttps://gem5-review.googlesource.com/c/public/gem5/+/28252 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: Icae4b21de62d69efe4937bdf9a51a473a5323acb Gerrit-Change-Number: 28252 Gerrit-PatchSet: 1 Gerrit-Owner: Nikos Nikoleris Gerrit-MessageType: newchange ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix clasta/b and lasta/b simd instructions
Jordi Vaquero has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/28247 )
Change subject: arch-arm: Fix clasta/b and lasta/b simd instructions
..
arch-arm: Fix clasta/b and lasta/b simd instructions
The simd version of this instructions required zeroing the result
vector except for the first element, that contains the result.
Change-Id: I231ad3c44d89f34acae26d299ab676e2ed09acdc
---
M src/arch/arm/isa/insts/sve.isa
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/src/arch/arm/isa/insts/sve.isa b/src/arch/arm/isa/insts/sve.isa
index 612e3c7..2d4d60a 100644
--- a/src/arch/arm/isa/insts/sve.isa
+++ b/src/arch/arm/isa/insts/sve.isa
@@ -2434,7 +2434,16 @@
elif destType == DstRegType.SimdFpScalar:
code += ''' else {
AA64FpDest_x[0] = AA64FpDestMerge_x[0];
-}'''
+}
+'''
+if destType == DstRegType.SimdFpScalar:
+# This section will extend zeros to the simdFP scalar
+# intructions for lasta/b and Clasta/b
+code += '''
+for (int i = 1; i < eCount; ++i) {
+AA64FpDest_x[i] = (Element)0x0;
+}
+'''
iop = InstObjParams(name, 'Sve' + Name, 'SveSelectOp',
{'code': code, 'op_class': opClass,
'isCond': 'true' if isCond else 'false',
--
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Gerrit-Change-Id: I231ad3c44d89f34acae26d299ab676e2ed09acdc
Gerrit-Change-Number: 28247
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Gerrit-Owner: Jordi Vaquero
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix Sve Fcmla indexed instruction
Jordi Vaquero has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/28227 )
Change subject: arch-arm: Fix Sve Fcmla indexed instruction
..
arch-arm: Fix Sve Fcmla indexed instruction
Sve implementation of FCMLA indexed instruction was
incorrectly typed. This instruction is design to be used for
half-precision and single precision.
Change-Id: Ie529e21140ce5b26a8e72ac869a5422d32eba864
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28227
Reviewed-by: Giacomo Travaglini
Maintainer: Giacomo Travaglini
Tested-by: kokoro
---
M src/arch/arm/isa/formats/sve_2nd_level.isa
M src/arch/arm/isa/insts/sve.isa
2 files changed, 3 insertions(+), 3 deletions(-)
Approvals:
Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/arm/isa/formats/sve_2nd_level.isa
b/src/arch/arm/isa/formats/sve_2nd_level.isa
index b6f8340..53fd80d 100644
--- a/src/arch/arm/isa/formats/sve_2nd_level.isa
+++ b/src/arch/arm/isa/formats/sve_2nd_level.isa
@@ -2799,12 +2799,12 @@
case 2:
zm = (IntRegIndex) (uint8_t) bits(machInst, 18, 16);
imm = bits(machInst, 20, 19);
-return new SveFcmlai(machInst,
+return new SveFcmlai(machInst,
zda, zn, zm, rot, imm);
case 3:
zm = (IntRegIndex) (uint8_t) bits(machInst, 19, 16);
imm = bits(machInst, 20);
-return new SveFcmlai(machInst,
+return new SveFcmlai(machInst,
zda, zn, zm, rot, imm);
}
return new Unknown64(machInst);
diff --git a/src/arch/arm/isa/insts/sve.isa b/src/arch/arm/isa/insts/sve.isa
index deb12bc..06ff728 100644
--- a/src/arch/arm/isa/insts/sve.isa
+++ b/src/arch/arm/isa/insts/sve.isa
@@ -3558,7 +3558,7 @@
sveCmpInst('fcmuo', 'Fcmuo', 'SimdFloatCmpOp', fpTypes, fcmuoCode)
# FCMLA (indexed)
sveComplexMulAddInst('fcmla', 'Fcmlai', 'SimdFloatMultAccOp',
-fpTypes[1:], predType = PredType.NONE)
+fpTypes[:2], predType = PredType.NONE)
# FCMLA (vectors)
sveComplexMulAddInst('fcmla', 'Fcmlav', 'SimdFloatMultAccOp',
fpTypes, predType = PredType.MERGE)
--
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Gerrit-Change-Id: Ie529e21140ce5b26a8e72ac869a5422d32eba864
Gerrit-Change-Number: 28227
Gerrit-PatchSet: 2
Gerrit-Owner: Jordi Vaquero
Gerrit-Reviewer: Ciro Santilli
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Jordi Vaquero
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: arch-arm: SVE instructions do not use AHP format
Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/28108 )
Change subject: arch-arm: SVE instructions do not use AHP format
..
arch-arm: SVE instructions do not use AHP format
SVE half-precision floating-point instructions support only IEEE
754-2008 half-precision format and ignore the value of the FPCR.AHP bit,
behaving as if it has an Effective value of 0.
This patch is addressing this by masking the FPSCR.AHB bit before
passing it to fplib.
Change-Id: I1432fc3f7fefb81445fe042ae7d681f5cec40e64
Signed-off-by: Giacomo Travaglini
Reviewed-by: Nikos Nikoleris
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28108
Tested-by: kokoro
---
M src/arch/arm/isa/insts/sve.isa
M src/arch/arm/miscregs.hh
2 files changed, 11 insertions(+), 9 deletions(-)
Approvals:
Nikos Nikoleris: Looks good to me, approved
Giacomo Travaglini: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/arm/isa/insts/sve.isa b/src/arch/arm/isa/insts/sve.isa
index b4c7fe5..deb12bc 100644
--- a/src/arch/arm/isa/insts/sve.isa
+++ b/src/arch/arm/isa/insts/sve.isa
@@ -2949,7 +2949,7 @@
if (sub_i) {
elt2_i = fplibNeg(elt2_i);
}
-fpscr = (FPSCR) FpscrExc;
+fpscr = FpscrExc & ~FpscrAhpMask;
acc_r = fplibAdd(acc_r, elt2_i, fpscr);
FpscrExc = fpscr;
}
@@ -2957,7 +2957,7 @@
if (sub_r) {
elt2_r = fplibNeg(elt2_r);
}
-fpscr = (FPSCR) FpscrExc;
+fpscr = FpscrExc & ~FpscrAhpMask;
acc_i = fplibAdd(acc_i, elt2_r, fpscr);
FpscrExc = fpscr;
}
@@ -3015,7 +3015,7 @@
if (neg_r) {
elt2_a = fplibNeg(elt2_a);
}
-fpscr = (FPSCR) FpscrExc;
+fpscr = FpscrExc & ~FpscrAhpMask;
addend_r = fplibMulAdd(addend_r, elt1_a, elt2_a,
fpscr);
FpscrExc = fpscr;'''
if predType != PredType.NONE:
@@ -3028,7 +3028,7 @@
if (neg_i) {
elt2_b = fplibNeg(elt2_b);
}
-fpscr = (FPSCR) FpscrExc;
+fpscr = FpscrExc & ~FpscrAhpMask;
addend_i = fplibMulAdd(addend_i, elt1_a, elt2_b,
fpscr);
FpscrExc = fpscr;'''
if predType != PredType.NONE:
@@ -3466,7 +3466,7 @@
sveExtInst('ext', 'Ext', 'SimdAluOp')
# FABD
fpOp = '''
-FPSCR fpscr = (FPSCR) FpscrExc;
+FPSCR fpscr = FpscrExc & ~FpscrAhpMask;
destElem = %s;
FpscrExc = fpscr;
'''
@@ -3497,7 +3497,7 @@
sveBinInst('fadd', 'FaddUnpred', 'SimdFloatAddOp', floatTypes,
faddCode)
# FADDA
fpAddaOp = '''
-FPSCR fpscr = (FPSCR) FpscrExc;
+FPSCR fpscr = FpscrExc & ~FpscrAhpMask;
destElem = fplibAdd(destElem, srcElem1, fpscr);
FpscrExc = FpscrExc | fpscr;
'''
@@ -3505,7 +3505,7 @@
fpAddaOp)
# FADDV
fpReduceOp = '''
-FPSCR fpscr = (FPSCR) FpscrExc;
+FPSCR fpscr = FpscrExc & ~FpscrAhpMask;
destElem = fplib%s(srcElem1, srcElem2, fpscr);
FpscrExc = FpscrExc | fpscr;
'''
diff --git a/src/arch/arm/miscregs.hh b/src/arch/arm/miscregs.hh
index 3900a4c..550b51c 100644
--- a/src/arch/arm/miscregs.hh
+++ b/src/arch/arm/miscregs.hh
@@ -1936,10 +1936,12 @@
// This mask selects bits of the FPSCR that actually go in the
FpCondCodes
// integer register to allow renaming.
static const uint32_t FpCondCodesMask = 0xF000;
-// This mask selects the cumulative FP exception flags of the FPSCR.
-static const uint32_t FpscrExcMask = 0x009F;
// This mask selects the cumulative saturation flag of the FPSCR.
static const uint32_t FpscrQcMask = 0x0800;
+// This mask selects the AHP bit of the FPSCR.
+static const uint32_t FpscrAhpMask = 0x0400;
+// This mask selects the cumulative FP exception flags of the FPSCR.
+static const uint32_t FpscrExcMask = 0x009F;
/**
* Check for permission to read coprocessor registers.
--
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Gerrit-Change-Id: I1432fc3f7fefb81445fe042ae7d681f5cec40e64
Gerrit-Change-Number: 28108
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Jordi Vaquero
Gerrit-Reviewer: Nikos Nikoleris
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Do not increment exponent if FPSCR.FZ in fplib
Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/28107 )
Change subject: arch-arm: Do not increment exponent if FPSCR.FZ in fplib
..
arch-arm: Do not increment exponent if FPSCR.FZ in fplib
If flushing to zero, the exponent shouldn't be incremented since
we are supposed to produce a 0 value and not a denormal number
Change-Id: Ib6dd594a6555b2fd9a20a52b59cbf1f5f94c2eb5
Signed-off-by: Giacomo Travaglini
Reviewed-by: Nikos Nikoleris
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28107
Reviewed-by: Jordi Vaquero
Tested-by: kokoro
---
M src/arch/arm/insts/fplib.cc
1 file changed, 25 insertions(+), 15 deletions(-)
Approvals:
Jordi Vaquero: Looks good to me, approved
Giacomo Travaglini: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/arm/insts/fplib.cc b/src/arch/arm/insts/fplib.cc
index 84ebe6d..a97943f 100644
--- a/src/arch/arm/insts/fplib.cc
+++ b/src/arch/arm/insts/fplib.cc
@@ -1,5 +1,5 @@
/*
-* Copyright (c) 2012-2013, 2017-2018 ARM Limited
+* Copyright (c) 2012-2013, 2017-2018, 2020 ARM Limited
* Copyright (c) 2020 Metempsy Technology Consulting
* All rights reserved
*
@@ -393,14 +393,18 @@
*exp = FP16_EXP(x);
*mnt = FP16_MANT(x);
-// Handle subnormals:
if (*exp) {
*mnt |= 1ULL << FP16_MANT_BITS;
} else {
-++*exp;
+// Handle subnormals:
// IDC (Input Denormal) is not set in this case.
-if (mode & FPLIB_FZ16)
-*mnt = 0;
+if (*mnt) {
+if (mode & FPLIB_FZ16) {
+*mnt = 0;
+} else {
+++*exp;
+}
+}
}
}
@@ -412,14 +416,17 @@
*exp = FP32_EXP(x);
*mnt = FP32_MANT(x);
-// Handle subnormals:
if (*exp) {
*mnt |= 1ULL << FP32_MANT_BITS;
} else {
-++*exp;
-if ((mode & FPLIB_FZ) && *mnt) {
-*flags |= FPLIB_IDC;
-*mnt = 0;
+// Handle subnormals:
+if (*mnt) {
+if (mode & FPLIB_FZ) {
+*flags |= FPLIB_IDC;
+*mnt = 0;
+} else {
+++*exp;
+}
}
}
}
@@ -434,14 +441,17 @@
*exp = FP64_EXP(x);
*mnt = FP64_MANT(x);
-// Handle subnormals:
if (*exp) {
*mnt |= 1ULL << FP64_MANT_BITS;
} else {
-++*exp;
-if ((mode & FPLIB_FZ) && *mnt) {
-*flags |= FPLIB_IDC;
-*mnt = 0;
+// Handle subnormals:
+if (*mnt) {
+if (mode & FPLIB_FZ) {
+*flags |= FPLIB_IDC;
+*mnt = 0;
+} else {
+++*exp;
+}
}
}
}
--
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Gerrit-Change-Id: Ib6dd594a6555b2fd9a20a52b59cbf1f5f94c2eb5
Gerrit-Change-Number: 28107
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Jordi Vaquero
Gerrit-Reviewer: Nikos Nikoleris
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: arch-arm: FCVTZS instruction returns sign extension
Jordi Vaquero has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/28229 )
Change subject: arch-arm: FCVTZS instruction returns sign extension
..
arch-arm: FCVTZS instruction returns sign extension
This patch fix Fcvtzs instruction adding sign extension instead of
zero extension
Change-Id: I28cdca432fa6baa8a524de4c431f492f23f0e9a6
---
M src/arch/arm/isa/insts/sve.isa
1 file changed, 28 insertions(+), 6 deletions(-)
diff --git a/src/arch/arm/isa/insts/sve.isa b/src/arch/arm/isa/insts/sve.isa
index 612e3c7..01abe49 100644
--- a/src/arch/arm/isa/insts/sve.isa
+++ b/src/arch/arm/isa/insts/sve.isa
@@ -1518,27 +1518,48 @@
# Generates definitions for SVE floating-point conversions (always
# unary, constructive, merging
def sveCvtInst(name, Name, opClass, types, op, direction=CvtDir.Narrow,
- decoder='Generic'):
+ decoder='Generic', signed=False):
global header_output, exec_output, decoders
code = sveEnabledCheckCode + '''
unsigned eCount = ArmStaticInst::getCurSveVecLen<%(bigElemType)s>(
xc->tcBase());
+''' % {'bigElemType': 'SElement' if direction == CvtDir.Narrow
+ else 'DElement'}
+if signed:
+code += '''
+SElement msk = mask(sizeof(DElement)*8);
+ '''
+assign_code = '''
+int sign_bit = bits(destElem, sizeof(DElement)*8 -1);
+AA64FpDest_x%(bigElemSuffix)s[i] =
+sign_bit? (destElem|~msk): destElem;
+ ''' % {
+ 'bigElemSuffix': 's' if direction == CvtDir.Narrow else 'd'
+ }
+else:
+assign_code = '''
+AA64FpDest_x%(bigElemSuffix)s[i] = destElem;
+''' % {
+ 'bigElemSuffix': 's' if direction == CvtDir.Narrow else 'd'
+ }
+
+code += '''
for (unsigned i = 0; i < eCount; i++) {
SElement srcElem1 = AA64FpOp1_x%(bigElemSuffix)s[i] &
mask(sizeof(SElement) * 8);
DElement destElem = 0;
if (GpOp_x%(bigElemSuffix)s[i]) {
%(op)s
-AA64FpDest_x%(bigElemSuffix)s[i] = destElem;
+%(assign)s;
} else {
AA64FpDest_x%(bigElemSuffix)s[i] =
AA64FpDestMerge_x%(bigElemSuffix)s[i];
}
}
''' % {'op': op,
- 'bigElemType': 'SElement' if direction == CvtDir.Narrow
- else 'DElement',
- 'bigElemSuffix': 's' if direction == CvtDir.Narrow else 'd'}
+ 'bigElemSuffix': 's' if direction == CvtDir.Narrow else 'd',
+ 'assign': assign_code
+ }
iop = InstObjParams(name, 'Sve' + Name, 'SveUnaryPredOp',
{'code': code, 'op_class': opClass}, [])
header_output += SveWideningUnaryPredOpDeclare.subst(iop)
@@ -2736,6 +2757,7 @@
code = sveEnabledCheckCode + '''
unsigned eCount = ArmStaticInst::getCurSveVecLen(
xc->tcBase());
+
ArmISA::VecRegContainer tmpVecC;
auto auxDest = tmpVecC.as();
int firstelem = -1, lastelem = -2;
@@ -3589,7 +3611,7 @@
'uint32_t, uint32_t',
'uint64_t, uint32_t',
'uint64_t, uint64_t'),
- fcvtzsCode, CvtDir.Narrow)
+ fcvtzsCode, CvtDir.Narrow, signed=True)
sveCvtInst('fcvtzs', 'FcvtzsWiden', 'SimdCvtOp',
('uint16_t, uint32_t',
'uint16_t, uint64_t',
--
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Gerrit-Branch: develop
Gerrit-Change-Id: I28cdca432fa6baa8a524de4c431f492f23f0e9a6
Gerrit-Change-Number: 28229
Gerrit-PatchSet: 1
Gerrit-Owner: Jordi Vaquero
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix SVE indx inst by sizeof error and dest overwrite
Jordi Vaquero has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/28228 )
Change subject: arch-arm: Fix SVE indx inst by sizeof error and dest
overwrite
..
arch-arm: Fix SVE indx inst by sizeof error and dest overwrite
This patch includes two fixes for SVE FMUL; FMLA FMLS AND FCMLA instructions
+ Fixes indexed functions like FMUL, FMLA, FMLS, FCMLA due to its
destination register overwrite with temporary values, wince the imm
can make changes in vector positions that will be read in the future.
+ sizeof return bytes not bits so division of 128 shouild be of 16 instead
Change-Id: I304d1b254a299069c85bbc3319e5a6d4119436d0
---
M src/arch/arm/isa/formats/sve_2nd_level.isa
M src/arch/arm/isa/insts/sve.isa
2 files changed, 30 insertions(+), 12 deletions(-)
diff --git a/src/arch/arm/isa/formats/sve_2nd_level.isa
b/src/arch/arm/isa/formats/sve_2nd_level.isa
index b6f8340..53fd80d 100644
--- a/src/arch/arm/isa/formats/sve_2nd_level.isa
+++ b/src/arch/arm/isa/formats/sve_2nd_level.isa
@@ -2799,12 +2799,12 @@
case 2:
zm = (IntRegIndex) (uint8_t) bits(machInst, 18, 16);
imm = bits(machInst, 20, 19);
-return new SveFcmlai(machInst,
+return new SveFcmlai(machInst,
zda, zn, zm, rot, imm);
case 3:
zm = (IntRegIndex) (uint8_t) bits(machInst, 19, 16);
imm = bits(machInst, 20);
-return new SveFcmlai(machInst,
+return new SveFcmlai(machInst,
zda, zn, zm, rot, imm);
}
return new Unknown64(machInst);
diff --git a/src/arch/arm/isa/insts/sve.isa b/src/arch/arm/isa/insts/sve.isa
index b4c7fe5..870ecfd 100644
--- a/src/arch/arm/isa/insts/sve.isa
+++ b/src/arch/arm/isa/insts/sve.isa
@@ -1813,11 +1813,13 @@
xc->tcBase());
// Number of elements in a 128 bit segment
-constexpr unsigned ePerSegment = 128 / sizeof(Element);
+constexpr unsigned ePerSegment = 16 / sizeof(Element);
'''
code += '''
+ArmISA::VecRegContainer tmpC;
+auto auxDest = tmpC.as();
for (unsigned i = 0; i < eCount; i++) {
const auto segmentBase = i - i % ePerSegment;
const auto segmentIdx = segmentBase + index;
@@ -1830,9 +1832,12 @@
code += '''
%(op)s
-AA64FpDest_x[i] = destElem;
+auxDest[i] = destElem;
}
-''' % {'op': op}
+
+for (unsigned i = 0; i < eCount; i++) {
+AA64FpDest_x[i] = auxDest[i];
+}''' % {'op': op}
baseClass = 'SveBinIdxUnpredOp'
@@ -2045,8 +2050,10 @@
xc->tcBase());
// Number of elements in a 128 bit segment
-constexpr unsigned ePerSegment = 128 / sizeof(Element);
+constexpr unsigned ePerSegment = 16 / sizeof(Element);
+ArmISA::VecRegContainer tmpC;
+auto auxDest = tmpC.as();
for (unsigned i = 0; i < eCount; i++) {
const auto segmentBase = i - i % ePerSegment;
const auto segmentIdx = segmentBase + index;
@@ -2055,10 +2062,13 @@
const Element& srcElem2 = AA64FpOp2_x[segmentIdx];
Element destElem = AA64FpDestMerge_x[i];
'''
-
code += '''
%(op)s
-AA64FpDest_x[i] = destElem;
+auxDest[i] = destElem;
+}
+
+for (unsigned i = 0; i < eCount; i++) {
+AA64FpDest_x[i] = auxDest[i];
}''' % {'op': op}
iop = InstObjParams(name, 'Sve' + Name, 'SveBinIdxUnpredOp',
@@ -2992,6 +3002,9 @@
code += '''
uint32_t eltspersegment = 16 / (2 * sizeof(Element));'''
code += '''
+ArmISA::VecRegContainer tmpC;
+auto auxDest = tmpC.as();
+
for (int i = 0; i < eCount / 2; ++i) {'''
if predType == PredType.NONE:
code += '''
@@ -3035,9 +3048,14 @@
code += '''
}'''
code += '''
-AA64FpDest_x[2 * i] = addend_r;
-AA64FpDest_x[2 * i + 1] = addend_i;
-}'''
+auxDest[2 * i] = addend_r;
+auxDest[2 * i + 1] = addend_i;
+}
+
+for (unsigned i = 0; i < eCount; i++) {
+AA64FpDest_x[i] = auxDest[i];
+}
+'''
iop = InstObjParams(name, 'Sve' + Name,
'SveComplexIdxOp' if predType == PredType.NONE
else 'SveComplexOp',
@@ -3558,7 +3576,7 @@
sveCmpInst('fcmuo', 'Fcmuo', 'SimdFloatCmpOp', fpTypes, fcmuoCode)
# FCMLA (indexed)
sveComplexMulAddInst('fcmla', 'Fcmlai', 'SimdFloatMultAccOp',
-fpTypes[1:], predType = PredType.NONE)
+fpTypes[:2], predType = PredType.NONE)
# FCMLA (vectors)
sveComplexMulAddInst('fcmla',
[gem5-dev] Change in gem5/gem5[develop]: arch-arm: Fix Sve Fcmla indexed instruction
Jordi Vaquero has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/28227 )
Change subject: arch-arm: Fix Sve Fcmla indexed instruction
..
arch-arm: Fix Sve Fcmla indexed instruction
Sve implementation of FCMLA indexed instruction was
incorrectly typed. This instruction is design to be used for
half-precision and single precision.
Change-Id: Ie529e21140ce5b26a8e72ac869a5422d32eba864
---
M src/arch/arm/isa/formats/sve_2nd_level.isa
M src/arch/arm/isa/insts/sve.isa
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/arch/arm/isa/formats/sve_2nd_level.isa
b/src/arch/arm/isa/formats/sve_2nd_level.isa
index b6f8340..53fd80d 100644
--- a/src/arch/arm/isa/formats/sve_2nd_level.isa
+++ b/src/arch/arm/isa/formats/sve_2nd_level.isa
@@ -2799,12 +2799,12 @@
case 2:
zm = (IntRegIndex) (uint8_t) bits(machInst, 18, 16);
imm = bits(machInst, 20, 19);
-return new SveFcmlai(machInst,
+return new SveFcmlai(machInst,
zda, zn, zm, rot, imm);
case 3:
zm = (IntRegIndex) (uint8_t) bits(machInst, 19, 16);
imm = bits(machInst, 20);
-return new SveFcmlai(machInst,
+return new SveFcmlai(machInst,
zda, zn, zm, rot, imm);
}
return new Unknown64(machInst);
diff --git a/src/arch/arm/isa/insts/sve.isa b/src/arch/arm/isa/insts/sve.isa
index b4c7fe5..19c3a0f 100644
--- a/src/arch/arm/isa/insts/sve.isa
+++ b/src/arch/arm/isa/insts/sve.isa
@@ -3558,7 +3558,7 @@
sveCmpInst('fcmuo', 'Fcmuo', 'SimdFloatCmpOp', fpTypes, fcmuoCode)
# FCMLA (indexed)
sveComplexMulAddInst('fcmla', 'Fcmlai', 'SimdFloatMultAccOp',
-fpTypes[1:], predType = PredType.NONE)
+fpTypes[:2], predType = PredType.NONE)
# FCMLA (vectors)
sveComplexMulAddInst('fcmla', 'Fcmlav', 'SimdFloatMultAccOp',
fpTypes, predType = PredType.MERGE)
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ie529e21140ce5b26a8e72ac869a5422d32eba864
Gerrit-Change-Number: 28227
Gerrit-PatchSet: 1
Gerrit-Owner: Jordi Vaquero
Gerrit-MessageType: newchange
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