[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Check number of vnets when creating links
Srikant Bharadwaj has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/32603 )
Change subject: mem-ruby: Check number of vnets when creating links
..
mem-ruby: Check number of vnets when creating links
Added error checking to ensure that the system has sufficient virtual
networks when setting latency and weight values.
Change-Id: I1b28144bbe9fefab0c0a6227f1fdf4ea10403061
---
M src/mem/ruby/network/Topology.cc
1 file changed, 2 insertions(+), 0 deletions(-)
diff --git a/src/mem/ruby/network/Topology.cc
b/src/mem/ruby/network/Topology.cc
index b267db1..c45dd9d 100644
--- a/src/mem/ruby/network/Topology.cc
+++ b/src/mem/ruby/network/Topology.cc
@@ -165,6 +165,8 @@
} else {
for (int v = 0; v < link->mVnets.size(); v++) {
int vnet = link->mVnets[v];
+fatal_if(vnet >= m_vnets, "Not enough virtual
networks "
+ "(setting latency and weight for vnet %d)",
vnet);
// Two links connecting same src and destination
// cannot carry same vnets.
fatal_if(vnet_done[vnet], "Two links connecting same
src"
--
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Gerrit-Change-Id: I1b28144bbe9fefab0c0a6227f1fdf4ea10403061
Gerrit-Change-Number: 32603
Gerrit-PatchSet: 1
Gerrit-Owner: Srikant Bharadwaj
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: mem-garnet: Flexible VCs per Vnet for each router
Srikant Bharadwaj has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/32599 )
Change subject: mem-garnet: Flexible VCs per Vnet for each router
..
mem-garnet: Flexible VCs per Vnet for each router
This change allows configuring each router with a certain number
of VCs for each VNET. This is beneficial when dealing with
heterogenous link widths in a system. Configuring VCs
for each router allows one to ensure equal throuput
within the network while avoiding head-of-line blocking.
Changing a router's VCs number can be done in topology files
using the vcs_per_vnet value argument of router.
Change-Id: Icf4f510248128429a1a11f19f9802ee96f340611
---
M src/mem/ruby/network/garnet2.0/GarnetNetwork.cc
M src/mem/ruby/network/garnet2.0/GarnetNetwork.hh
M src/mem/ruby/network/garnet2.0/NetworkBridge.cc
M src/mem/ruby/network/garnet2.0/NetworkBridge.hh
M src/mem/ruby/network/garnet2.0/NetworkInterface.cc
M src/mem/ruby/network/garnet2.0/NetworkInterface.hh
M src/mem/ruby/network/garnet2.0/NetworkLink.cc
M src/mem/ruby/network/garnet2.0/NetworkLink.hh
M src/mem/ruby/network/garnet2.0/OutVcState.cc
M src/mem/ruby/network/garnet2.0/OutVcState.hh
M src/mem/ruby/network/garnet2.0/OutputUnit.cc
M src/mem/ruby/network/garnet2.0/OutputUnit.hh
M src/mem/ruby/network/garnet2.0/Router.cc
M src/mem/ruby/network/garnet2.0/Router.hh
14 files changed, 126 insertions(+), 54 deletions(-)
diff --git a/src/mem/ruby/network/garnet2.0/GarnetNetwork.cc
b/src/mem/ruby/network/garnet2.0/GarnetNetwork.cc
index ca9e26f..3e3852a 100644
--- a/src/mem/ruby/network/garnet2.0/GarnetNetwork.cc
+++ b/src/mem/ruby/network/garnet2.0/GarnetNetwork.cc
@@ -58,7 +58,7 @@
{
m_num_rows = p->num_rows;
m_ni_flit_size = p->ni_flit_size;
-m_vcs_per_vnet = p->vcs_per_vnet;
+m_max_vcs_per_vnet = 0;
m_buffers_per_data_vc = p->buffers_per_data_vc;
m_buffers_per_ctrl_vc = p->buffers_per_ctrl_vc;
m_routing_algorithm = p->routing_algorithm;
@@ -166,15 +166,19 @@
PortDirection dst_inport_dirn = "Local";
+m_max_vcs_per_vnet = std::max(m_max_vcs_per_vnet,
+ (uint32_t) m_routers[dest]->get_vc_per_vnet());
+
if (garnet_link->extBridgeEn) {
DPRINTF(RubyNetwork, "Enable external bridge for %s\n",
garnet_link->name());
m_nis[local_src]->
addOutPort(garnet_link->extNetBridge[LinkDirection_In],
garnet_link->extCredBridge[LinkDirection_In],
- dest);
+ dest, m_routers[dest]->get_vc_per_vnet());
} else {
-m_nis[local_src]->addOutPort(net_link, credit_link, dest);
+m_nis[local_src]->addOutPort(net_link, credit_link, dest,
+m_routers[dest]->get_vc_per_vnet());
}
if (garnet_link->intBridgeEn) {
@@ -218,6 +222,9 @@
PortDirection src_outport_dirn = "Local";
+m_max_vcs_per_vnet = std::max(m_max_vcs_per_vnet,
+ (uint32_t) m_routers[src]->get_vc_per_vnet());
+
if (garnet_link->extBridgeEn) {
DPRINTF(RubyNetwork, "Enable external bridge for %s\n",
garnet_link->name());
@@ -235,12 +242,14 @@
addOutPort(src_outport_dirn,
garnet_link->intNetBridge[LinkDirection_Out],
routing_table_entry, link->m_weight,
- garnet_link->intCredBridge[LinkDirection_Out]);
+ garnet_link->intCredBridge[LinkDirection_Out],
+ m_routers[src]->get_vc_per_vnet());
} else {
m_routers[src]->
addOutPort(src_outport_dirn, net_link,
routing_table_entry,
- link->m_weight, credit_link);
+ link->m_weight, credit_link,
+ m_routers[src]->get_vc_per_vnet());
}
}
@@ -265,6 +274,10 @@
m_networklinks.push_back(net_link);
m_creditlinks.push_back(credit_link);
+m_max_vcs_per_vnet = std::max(m_max_vcs_per_vnet,
+std::max((uint32_t) m_routers[dest]->get_vc_per_vnet(),
+(uint32_t) m_routers[src]->get_vc_per_vnet()));
+
if (garnet_link->dstBridgeEn) {
DPRINTF(RubyNetwork, "Enable destination bridge for %s\n",
garnet_link->name());
@@ -280,11 +293,13 @@
m_routers[src]->
addOutPort(src_outport_dirn, garnet_link->srcNetBridge,
routing_table_entry,
- link->m_weight, garnet_link->srcCredBridge);
+ link->m_weight, garnet_link->srcCredBridge,
+ m_routers[dest]->get_vc_per_vnet());
} else {
m_routers[src]->addOutPort(src_outport_dirn, net_link,
routing_table_entry,
-link->m_weight, credit_link);
+link->m_weight, credit_link,
+
[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: make simplenetwork compatible with garnet3.0 topologies
Hello John Alsop,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/32602
to review the following change.
Change subject: mem-ruby: make simplenetwork compatible with garnet3.0
topologies
..
mem-ruby: make simplenetwork compatible with garnet3.0 topologies
1) To support controllers with multiple outgoing links (added
in garnet 3.0), only connect a message buffer to a controller
if the vnet in that message buffer matches the
vnets assigned to the link. This is needed to support controllers
with multiple outgoing links (added in garnet 3.0).
Similarly, a separate routing table must be managed for each vnet
at each simple network router.
2) Dummy parameters must be added for garnet-specific members
in network base classes to prevent errors.
Change-Id: I78cfce99edf73cd647c05ef7a3a619218493d9de
---
M src/mem/ruby/network/BasicLink.py
M src/mem/ruby/network/garnet2.0/GarnetLink.py
M src/mem/ruby/network/simple/PerfectSwitch.cc
M src/mem/ruby/network/simple/PerfectSwitch.hh
M src/mem/ruby/network/simple/SimpleNetwork.cc
M src/mem/ruby/network/simple/SimpleNetwork.py
M src/mem/ruby/network/simple/Switch.cc
M src/mem/ruby/network/simple/Switch.hh
8 files changed, 63 insertions(+), 30 deletions(-)
diff --git a/src/mem/ruby/network/BasicLink.py
b/src/mem/ruby/network/BasicLink.py
index 2718aa6..b9ded1f 100644
--- a/src/mem/ruby/network/BasicLink.py
+++ b/src/mem/ruby/network/BasicLink.py
@@ -39,6 +39,16 @@
weight = Param.Int(1, "used to restrict routing in shortest path
analysis")
supported_vnets = VectorParam.Int([-1], "Vnets supported
Default:All(-1)")
+# dummy variables for compatibility with garnet topology
+ext_cdc = Param.Bool(False, "Dummy")
+int_cdc = Param.Bool(False, "Dummy")
+ext_serdes = Param.Bool(False, "Dummy")
+int_serdes = Param.Bool(False, "Dummy")
+src_serdes = Param.Bool(False, "Dummy")
+dst_serdes = Param.Bool(False, "Dummy")
+width = Param.UInt32(0, "Dummy")
+vcs_per_vnet = Param.Int(0, "Dummy")
+
class BasicExtLink(BasicLink):
type = 'BasicExtLink'
cxx_header = "mem/ruby/network/BasicLink.hh"
@@ -46,6 +56,12 @@
int_node = Param.BasicRouter("ID of internal node")
bandwidth_factor = 16 # only used by simple network
+# only used by Garnet.
+ext_cdc = Param.Bool(False, "Enable CDC")
+int_cdc = Param.Bool(False, "Enable CDC")
+ext_serdes = Param.Bool(False, "Enable CDC")
+int_serdes = Param.Bool(False, "Enable CDC")
+
class BasicIntLink(BasicLink):
type = 'BasicIntLink'
cxx_header = "mem/ruby/network/BasicLink.hh"
@@ -55,6 +71,10 @@
# only used by Garnet.
src_outport = Param.String("", "Outport direction at src router")
dst_inport = Param.String("", "Inport direction at dst router")
+src_cdc = Param.Bool(False, "Enable CDC")
+dst_cdc = Param.Bool(False, "Enable CDC")
+src_serdes = Param.Bool(False, "Enable CDC")
+dst_serdes = Param.Bool(False, "Enable CDC")
# only used by simple network
bandwidth_factor = 16
diff --git a/src/mem/ruby/network/garnet2.0/GarnetLink.py
b/src/mem/ruby/network/garnet2.0/GarnetLink.py
index 769680c..f356d97 100644
--- a/src/mem/ruby/network/garnet2.0/GarnetLink.py
+++ b/src/mem/ruby/network/garnet2.0/GarnetLink.py
@@ -64,17 +64,11 @@
network_link = Param.NetworkLink(NetworkLink(), "forward link")
credit_link = Param.CreditLink(CreditLink(), "backward flow-control
link")
-src_cdc = Param.Bool(False, "Enable CDC")
-dst_cdc = Param.Bool(False, "Enable CDC")
-
src_net_bridge = Param.NetworkBridge("Network CDC at source")
dst_net_bridge = Param.NetworkBridge("Network CDC at dest")
src_cred_bridge = Param.NetworkBridge("Credit CDC at source")
dst_cred_bridge = Param.NetworkBridge("Credit CDC at dest")
-src_serdes = Param.Bool(False, "Enable CDC")
-dst_serdes = Param.Bool(False, "Enable CDC")
-
width = Param.UInt32(Parent.ni_flit_size,
"bit width supported by the router")
@@ -100,16 +94,10 @@
_cls.append(CreditLink());
credit_links = VectorParam.CreditLink(_cls, "backward flow-control
links")
-ext_cdc = Param.Bool(False, "Enable CDC")
-int_cdc = Param.Bool(False, "Enable CDC")
-
ext_net_bridge = VectorParam.NetworkBridge("CDC to reach the
consumers")
ext_cred_bridge = VectorParam.NetworkBridge("CDC to reach the
consumers")
int_net_bridge = VectorParam.NetworkBridge("CDC to reach the
consumers")
int_cred_bridge = VectorParam.NetworkBridge("CDC to reach the
consumers")
-ext_serdes = Param.Bool(False, "Enable CDC")
-int_serdes = Param.Bool(False, "Enable CDC")
-
width = Param.UInt32(Parent.ni_flit_size,
"bit width supported by the router")
diff --git a/src/mem/ruby/network/simple/PerfectSwitch.cc
[gem5-dev] Change in gem5/gem5[develop]: mem-garnet: Separable allocator in Garnet not fair enough.
Srikant Bharadwaj has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/32601 ) Change subject: mem-garnet: Separable allocator in Garnet not fair enough. .. mem-garnet: Separable allocator in Garnet not fair enough. Currently there are independent round robin arbiter at each input port and output port. Every time a VC is selected for output allocation round robin is incremented irrespective of if it is selected by its output port or not. This leads to unfair arbitration at input port and is well known[1]. This patch fixes it to increment only if the output port also selects it. [1] D. U. Becker and W. J. Dally, "Allocator implementations for network-on-chip routers," Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis, Portland, OR, 2009, pp. 1-12 Change-Id: I65963fb8082c51c0e3c6e031a8b87b4f5c3626e1 --- M src/mem/ruby/network/garnet2.0/SwitchAllocator.cc 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/src/mem/ruby/network/garnet2.0/SwitchAllocator.cc b/src/mem/ruby/network/garnet2.0/SwitchAllocator.cc index 3241343..1ed6de1 100644 --- a/src/mem/ruby/network/garnet2.0/SwitchAllocator.cc +++ b/src/mem/ruby/network/garnet2.0/SwitchAllocator.cc @@ -130,11 +130,6 @@ m_port_requests[outport][inport] = true; m_vc_winners[outport][inport]= invc; -// Update Round Robin pointer to the next VC -m_round_robin_invc[inport] = invc + 1; -if (m_round_robin_invc[inport] >= m_num_vcs) -m_round_robin_invc[inport] = 0; - break; // got one vc winner for this port } } @@ -248,6 +243,15 @@ if (m_round_robin_inport[outport] >= m_num_inports) m_round_robin_inport[outport] = 0; +// Update Round Robin pointer to the next VC +// We do it here to keep it fair. +// Only the VC which got switch traversal +// is updated. +m_round_robin_invc[inport] = invc + 1; +if (m_round_robin_invc[inport] >= m_num_vcs) +m_round_robin_invc[inport] = 0; + + break; // got a input winner for this outport } -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32601 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I65963fb8082c51c0e3c6e031a8b87b4f5c3626e1 Gerrit-Change-Number: 32601 Gerrit-PatchSet: 1 Gerrit-Owner: Srikant Bharadwaj Gerrit-MessageType: newchange ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: mem-garnet: Add a check to see if router is already scheduled
Srikant Bharadwaj has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/32600 )
Change subject: mem-garnet: Add a check to see if router is already
scheduled
..
mem-garnet: Add a check to see if router is already scheduled
Currently the Switch Allocator takes up most of the simulation
wall clock time. This function checks for all VCs to see if it
should wakeup next. The input units which are simulated before
the switch allocator could have scheduled it already. This patch
adds a check for it.
Change-Id: I8609d4e7f925aa5e97198f6cd07466530f6fcf4c
---
M src/mem/ruby/network/garnet2.0/SwitchAllocator.cc
1 file changed, 4 insertions(+), 0 deletions(-)
diff --git a/src/mem/ruby/network/garnet2.0/SwitchAllocator.cc
b/src/mem/ruby/network/garnet2.0/SwitchAllocator.cc
index 144f208..3241343 100644
--- a/src/mem/ruby/network/garnet2.0/SwitchAllocator.cc
+++ b/src/mem/ruby/network/garnet2.0/SwitchAllocator.cc
@@ -350,6 +350,10 @@
{
Tick nextCycle = m_router->clockEdge(Cycles(1));
+if (m_router->alreadyScheduled(nextCycle)) {
+return;
+}
+
for (int i = 0; i < m_num_inports; i++) {
for (int j = 0; j < m_num_vcs; j++) {
if (m_router->getInputUnit(i)->need_stage(j, SA_, nextCycle)) {
--
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Gerrit-Branch: develop
Gerrit-Change-Id: I8609d4e7f925aa5e97198f6cd07466530f6fcf4c
Gerrit-Change-Number: 32600
Gerrit-PatchSet: 1
Gerrit-Owner: Srikant Bharadwaj
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: mem-garnet: Initialize unused Credit members
Hello Michael LeBeane,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/32598
to review the following change.
Change subject: mem-garnet: Initialize unused Credit members
..
mem-garnet: Initialize unused Credit members
The Credit class doesn't initialize a number of its unused base class
fields. This leads to non-determanistic traces when printing flits that
are Credits. This patch initializes all unused fields to 0.
Change-Id: Ib73c652c71a10be57b24c0d6e1ac22eafa421e11
---
M src/mem/ruby/network/garnet2.0/CommonTypes.hh
M src/mem/ruby/network/garnet2.0/Credit.cc
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/src/mem/ruby/network/garnet2.0/CommonTypes.hh
b/src/mem/ruby/network/garnet2.0/CommonTypes.hh
index 72febed..bc80131 100644
--- a/src/mem/ruby/network/garnet2.0/CommonTypes.hh
+++ b/src/mem/ruby/network/garnet2.0/CommonTypes.hh
@@ -47,6 +47,11 @@
struct RouteInfo
{
+RouteInfo()
+: vnet(0), src_ni(0), src_router(0), dest_ni(0), dest_router(0),
+ hops_traversed(0)
+{}
+
// destination format for table-based routing
int vnet;
NetDest net_dest;
diff --git a/src/mem/ruby/network/garnet2.0/Credit.cc
b/src/mem/ruby/network/garnet2.0/Credit.cc
index acb8b32..7619079 100644
--- a/src/mem/ruby/network/garnet2.0/Credit.cc
+++ b/src/mem/ruby/network/garnet2.0/Credit.cc
@@ -35,11 +35,9 @@
// and m_is_free_signal (whether VC is free or not)
Credit::Credit(int vc, bool is_free_signal, Tick curTime)
+: flit(0, vc, 0, RouteInfo(), 0, nullptr, 0, 0, curTime)
{
-m_id = 0;
-m_vc = vc;
m_is_free_signal = is_free_signal;
-m_time = curTime;
m_type = CREDIT_;
}
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32598
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Gerrit-Change-Number: 32598
Gerrit-PatchSet: 1
Gerrit-Owner: Srikant Bharadwaj
Gerrit-Reviewer: Michael LeBeane
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: gpu-compute: Fixing HSA's barrier bit implementation
Matt Sinclair has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/30354 )
Change subject: gpu-compute: Fixing HSA's barrier bit implementation
..
gpu-compute: Fixing HSA's barrier bit implementation
This changeset fixes several bugs in the HSA barrier bit implementation.
1. Forces AQL packet launch to wait for completion of all previous packets
2. Enforces barrier bit blocking only if there are packets pending
completion
3. Barrier bit unblocking is correclty done by the last pending packet
4. Implementing barrier bit for all packets to conform to HSA spec
Change-Id: I62ce589dff57dcde4d64054a1b6ffd962acd5eb8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30354
Reviewed-by: Sooraj Puthoor
Maintainer: Anthony Gutierrez
Tested-by: kokoro
---
M src/dev/hsa/hsa_packet_processor.cc
M src/dev/hsa/hsa_packet_processor.hh
2 files changed, 100 insertions(+), 34 deletions(-)
Approvals:
Sooraj Puthoor: Looks good to me, approved
Anthony Gutierrez: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/dev/hsa/hsa_packet_processor.cc
b/src/dev/hsa/hsa_packet_processor.cc
index 4143019..68cdcf4 100644
--- a/src/dev/hsa/hsa_packet_processor.cc
+++ b/src/dev/hsa/hsa_packet_processor.cc
@@ -282,11 +282,11 @@
}
void
-HSAPacketProcessor::schedAQLProcessing(uint32_t rl_idx)
+HSAPacketProcessor::schedAQLProcessing(uint32_t rl_idx, Tick delay)
{
RQLEntry *queue = regdQList[rl_idx];
-if (!queue->aqlProcessEvent.scheduled() && !queue->getBarrierBit()) {
-Tick processingTick = curTick() + pktProcessDelay;
+if (!queue->aqlProcessEvent.scheduled()) {
+Tick processingTick = curTick() + delay;
schedule(queue->aqlProcessEvent, processingTick);
DPRINTF(HSAPacketProcessor, "AQL processing scheduled at
tick: %d\n",
processingTick);
@@ -295,42 +295,48 @@
}
}
-bool
+void
+HSAPacketProcessor::schedAQLProcessing(uint32_t rl_idx)
+{
+schedAQLProcessing(rl_idx, pktProcessDelay);
+}
+
+Q_STATE
HSAPacketProcessor::processPkt(void* pkt, uint32_t rl_idx, Addr
host_pkt_addr)
{
-bool is_submitted = false;
+Q_STATE is_submitted = BLOCKED_BPKT;
SignalState *dep_sgnl_rd_st = &(regdQList[rl_idx]->depSignalRdState);
// Dependency signals are not read yet. And this can only be a retry.
// The retry logic will schedule the packet processor wakeup
if (dep_sgnl_rd_st->pendingReads != 0) {
-return false;
+return BLOCKED_BPKT;
}
// `pkt` can be typecasted to any type of AQL packet since they all
// have header information at offset zero
auto disp_pkt = (_hsa_dispatch_packet_t *)pkt;
hsa_packet_type_t pkt_type = PKT_TYPE(disp_pkt);
+if (IS_BARRIER(disp_pkt) &&
+regdQList[rl_idx]->compltnPending() > 0) {
+// If this packet is using the "barrier bit" to enforce ordering
with
+// previous packets, and if there are outstanding packets, set the
+// barrier bit for this queue and block the queue.
+DPRINTF(HSAPacketProcessor, "%s: setting barrier bit for active" \
+" list ID = %d\n", __FUNCTION__, rl_idx);
+regdQList[rl_idx]->setBarrierBit(true);
+return BLOCKED_BBIT;
+}
if (pkt_type == HSA_PACKET_TYPE_VENDOR_SPECIFIC) {
DPRINTF(HSAPacketProcessor, "%s: submitting vendor specific pkt" \
" active list ID = %d\n", __FUNCTION__, rl_idx);
// Submit packet to HSA device (dispatcher)
hsa_device->submitVendorPkt((void *)disp_pkt, rl_idx,
host_pkt_addr);
-is_submitted = true;
+is_submitted = UNBLOCKED;
} else if (pkt_type == HSA_PACKET_TYPE_KERNEL_DISPATCH) {
DPRINTF(HSAPacketProcessor, "%s: submitting kernel dispatch pkt" \
" active list ID = %d\n", __FUNCTION__, rl_idx);
// Submit packet to HSA device (dispatcher)
hsa_device->submitDispatchPkt((void *)disp_pkt, rl_idx,
host_pkt_addr);
-is_submitted = true;
-/*
- If this packet is using the "barrier bit" to enforce ordering
with
- subsequent kernels, set the bit for this queue now, after
- dispatching.
-*/
-if (IS_BARRIER(disp_pkt)) {
-DPRINTF(HSAPacketProcessor, "%s: setting barrier bit for
active" \
-" list ID = %d\n", __FUNCTION__, rl_idx);
-regdQList[rl_idx]->setBarrierBit(true);
-}
+is_submitted = UNBLOCKED;
} else if (pkt_type == HSA_PACKET_TYPE_BARRIER_AND) {
DPRINTF(HSAPacketProcessor, "%s: Processing barrier packet" \
" active list ID = %d\n", __FUNCTION__, rl_idx);
@@ -387,7 +393,7 @@
// TODO: Completion signal of barrier packet to be
// atomically decremented here
finishPkt((void*)bar_and_pkt, rl_idx);
-
[gem5-dev] Change in gem5/gem5[develop]: tests: Dropped the i386 host tag in tests
Bobby R. Bruce has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/32596 )
Change subject: tests: Dropped the i386 host tag in tests
..
tests: Dropped the i386 host tag in tests
Issue-on: https://gem5.atlassian.net/browse/GEM5-532
Change-Id: Ifee50d59c65f8b460248508688232d9253c040b6
---
M ext/testlib/configuration.py
M tests/gem5/.testignore
2 files changed, 5 insertions(+), 64 deletions(-)
diff --git a/ext/testlib/configuration.py b/ext/testlib/configuration.py
index cebb98f..4e2b695 100644
--- a/ext/testlib/configuration.py
+++ b/ext/testlib/configuration.py
@@ -247,7 +247,6 @@
constants.host_isa_tag_type = 'host'
constants.host_x86_64_tag = 'x86_64'
-constants.host_i386_tag = 'i386'
constants.host_arm_tag = 'aarch64'
constants.supported_tags = {
@@ -271,7 +270,6 @@
),
constants.host_isa_tag_type: (
constants.host_x86_64_tag,
-constants.host_i386_tag,
constants.host_arm_tag,
),
}
@@ -280,11 +278,11 @@
# case where host ISA and target ISA need to coincide
constants.target_host = {
constants.arm_tag : (constants.host_arm_tag,),
-constants.x86_tag : (constants.host_x86_64_tag,
constants.host_i386_tag),
-constants.sparc_tag : (constants.host_x86_64_tag,
constants.host_i386_tag),
-constants.riscv_tag : (constants.host_x86_64_tag,
constants.host_i386_tag),
-constants.mips_tag : (constants.host_x86_64_tag,
constants.host_i386_tag),
-constants.power_tag : (constants.host_x86_64_tag,
constants.host_i386_tag),
+constants.x86_tag : (constants.host_x86_64_tag,),
+constants.sparc_tag : (constants.host_x86_64_tag,),
+constants.riscv_tag : (constants.host_x86_64_tag,),
+constants.mips_tag : (constants.host_x86_64_tag,),
+constants.power_tag : (constants.host_x86_64_tag,),
constants.null_tag : (None,)
}
diff --git a/tests/gem5/.testignore b/tests/gem5/.testignore
index 405f005..dfca4e9 100644
--- a/tests/gem5/.testignore
+++ b/tests/gem5/.testignore
@@ -59,39 +59,6 @@
test-insttest-rv64i-linux-DerivO3CPU-RISCV-aarch64-fast
test-insttest-linux-AtomicSimpleCPU-SPARC-aarch64-fast
test-insttest-linux-TimingSimpleCPU-SPARC-aarch64-fast
-test-insttest-rv64a-linux-MinorCPU-RISCV-i386-opt
-test-insttest-rv64c-linux-MinorCPU-RISCV-i386-opt
-test-insttest-rv64d-linux-MinorCPU-RISCV-i386-opt
-test-insttest-rv64f-linux-MinorCPU-RISCV-i386-opt
-test-insttest-rv64i-linux-MinorCPU-RISCV-i386-opt
-test-insttest-rv64m-linux-MinorCPU-RISCV-i386-opt
-test-insttest-rv64i-linux-AtomicSimpleCPU-RISCV-i386-opt
-test-insttest-rv64i-linux-TimingSimpleCPU-RISCV-i386-opt
-test-insttest-rv64i-linux-DerivO3CPU-RISCV-i386-opt
-test-insttest-linux-AtomicSimpleCPU-SPARC-i386-opt
-test-insttest-linux-TimingSimpleCPU-SPARC-i386-opt
-test-insttest-rv64a-linux-MinorCPU-RISCV-i386-debug
-test-insttest-rv64c-linux-MinorCPU-RISCV-i386-debug
-test-insttest-rv64d-linux-MinorCPU-RISCV-i386-debug
-test-insttest-rv64f-linux-MinorCPU-RISCV-i386-debug
-test-insttest-rv64i-linux-MinorCPU-RISCV-i386-debug
-test-insttest-rv64m-linux-MinorCPU-RISCV-i386-debug
-test-insttest-rv64i-linux-AtomicSimpleCPU-RISCV-i386-debug
-test-insttest-rv64i-linux-TimingSimpleCPU-RISCV-i386-debug
-test-insttest-rv64i-linux-DerivO3CPU-RISCV-i386-debug
-test-insttest-linux-AtomicSimpleCPU-SPARC-i386-debug
-test-insttest-linux-TimingSimpleCPU-SPARC-i386-debug
-test-insttest-rv64a-linux-MinorCPU-RISCV-i386-fast
-test-insttest-rv64c-linux-MinorCPU-RISCV-i386-fast
-test-insttest-rv64d-linux-MinorCPU-RISCV-i386-fast
-test-insttest-rv64f-linux-MinorCPU-RISCV-i386-fast
-test-insttest-rv64i-linux-MinorCPU-RISCV-i386-fast
-test-insttest-rv64m-linux-MinorCPU-RISCV-i386-fast
-test-insttest-rv64i-linux-AtomicSimpleCPU-RISCV-i386-fast
-test-insttest-rv64i-linux-TimingSimpleCPU-RISCV-i386-fast
-test-insttest-rv64i-linux-DerivO3CPU-RISCV-i386-fast
-test-insttest-linux-AtomicSimpleCPU-SPARC-i386-fast
-test-insttest-linux-TimingSimpleCPU-SPARC-i386-fast
test-hello-linux-MinorCPU-RISCV-x86_64-debug
test-hello-linux-TimingSimpleCPU-SPARC-x86_64-debug
test-hello-linux-AtomicSimpleCPU-SPARC-x86_64-debug
@@ -128,24 +95,6 @@
test-hello-linux-TimingSimpleCPU-MIPS-aarch64-opt
test-hello-linux-AtomicSimpleCPU-MIPS-aarch64-opt
test-hello-linux-DerivO3CPU-MIPS-aarch64-opt
-test-hello-linux-MinorCPU-RISCV-i386-debug
-test-hello-linux-TimingSimpleCPU-SPARC-i386-debug
-test-hello-linux-AtomicSimpleCPU-SPARC-i386-debug
-test-hello-linux-TimingSimpleCPU-MIPS-i386-debug
-test-hello-linux-AtomicSimpleCPU-MIPS-i386-debug
-test-hello-linux-DerivO3CPU-MIPS-i386-debug
-test-hello-linux-MinorCPU-RISCV-i386-fast
-test-hello-linux-TimingSimpleCPU-SPARC-i386-fast
-test-hello-linux-AtomicSimpleCPU-SPARC-i386-fast
-test-hello-linux-TimingSimpleCPU-MIPS-i386-fast
[gem5-dev] Change in gem5/gem5[develop]: arch-gcn3: Update LmReqsInPipe in atomic flats when execMask=0
Kyle Roarty has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/32614 )
Change subject: arch-gcn3: Update LmReqsInPipe in atomic flats when
execMask=0
..
arch-gcn3: Update LmReqsInPipe in atomic flats when execMask=0
In flat instructions, wrLmReqsInPipe/rdLmReqsInPipe are decremented
in the calcAddr() function. However, the calcAddr() function is only
called when execMask != 0.
This patch adds in statements to decrement wrLmReqsInPipe and
rdLmReqsInPipe in all implemented atomic flats when execMask is 0.
This fixes a scenario where vector local memory and flat instructions
are unable to execute due to LocalMemPipeline::isLMReqFIFOWrRdy
always returning false in ScheduleStage::dispatchReady after too many
atomic flats execute with execMask = 0
Change-Id: I081cfd3faf74bbfcf0728445e7160fa2a76a6a7e
---
M src/arch/gcn3/insts/instructions.cc
1 file changed, 22 insertions(+), 0 deletions(-)
diff --git a/src/arch/gcn3/insts/instructions.cc
b/src/arch/gcn3/insts/instructions.cc
index 002621e..fdea636 100644
--- a/src/arch/gcn3/insts/instructions.cc
+++ b/src/arch/gcn3/insts/instructions.cc
@@ -40374,6 +40374,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+wf->wrLmReqsInPipe--;
+wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -40481,6 +40483,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+wf->wrLmReqsInPipe--;
+wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -40589,6 +40593,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+wf->wrLmReqsInPipe--;
+wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -40684,6 +40690,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+wf->wrLmReqsInPipe--;
+wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -40953,6 +40961,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+wf->wrLmReqsInPipe--;
+wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -41048,6 +41058,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+wf->wrLmReqsInPipe--;
+wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -41172,6 +41184,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+wf->wrLmReqsInPipe--;
+wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -41281,6 +41295,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+wf->wrLmReqsInPipe--;
+wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -41378,6 +41394,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+wf->wrLmReqsInPipe--;
+wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -41657,6 +41675,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+wf->wrLmReqsInPipe--;
+wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
wf->computeUnit->vrf[wf->simdId]->
@@ -41755,6 +41775,8 @@
wf->decLGKMInstsIssued();
wf->wrGmReqsInPipe--;
wf->rdGmReqsInPipe--;
+wf->wrLmReqsInPipe--;
+wf->rdLmReqsInPipe--;
if (instData.GLC) {
gpuDynInst->exec_mask = wf->execMask();
[gem5-dev] Change in gem5/gem5[develop]: util: Install python six module in gcn dockerfile
Kyle Roarty has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32235 ) Change subject: util: Install python six module in gcn dockerfile .. util: Install python six module in gcn dockerfile six is used in develop, but wasn't used in the GCN staging branch. Change-Id: Ic1ca42df871d1e683c288282497267d00421609f Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32235 Reviewed-by: Matt Sinclair Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- M util/dockerfiles/gcn-gpu/Dockerfile 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved Matt Sinclair: Looks good to me, approved kokoro: Regressions pass diff --git a/util/dockerfiles/gcn-gpu/Dockerfile b/util/dockerfiles/gcn-gpu/Dockerfile index 475918f..7787339 100644 --- a/util/dockerfiles/gcn-gpu/Dockerfile +++ b/util/dockerfiles/gcn-gpu/Dockerfile @@ -23,6 +23,7 @@ python-dev \ python \ python-yaml \ +python-six \ wget \ libpci3 \ libelf1 \ -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32235 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: Ic1ca42df871d1e683c288282497267d00421609f Gerrit-Change-Number: 32235 Gerrit-PatchSet: 4 Gerrit-Owner: Kyle Roarty Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Kyle Roarty Gerrit-Reviewer: Matt Sinclair Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: util: Allow the short -j option in gen_arm_fs_files.py
Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/32555 )
Change subject: util: Allow the short -j option in gen_arm_fs_files.py
..
util: Allow the short -j option in gen_arm_fs_files.py
Change-Id: I15c3bad13882cd38683b7c733311191e1f51d13f
Signed-off-by: Giacomo Travaglini
---
M util/gen_arm_fs_files.py
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/util/gen_arm_fs_files.py b/util/gen_arm_fs_files.py
index 76fa21b..2f339a2 100755
--- a/util/gen_arm_fs_files.py
+++ b/util/gen_arm_fs_files.py
@@ -254,7 +254,7 @@
"repositories. Generated files will be copied to "
"DEST_DIR/binaries (which must not exist). The default "
"value is %default")
-parser.add_option("--make-jobs", type = "int", default = 1,
+parser.add_option("-j", "--make-jobs", type = "int", default = 1,
metavar = "MAKE_JOBS",
help = "Number of jobs to use with the 'make' commands. Default
value: "
"%default")
--
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https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I15c3bad13882cd38683b7c733311191e1f51d13f
Gerrit-Change-Number: 32555
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: util: Add Xen compilation to gen_arm_fs_files.py
Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/32557 )
Change subject: util: Add Xen compilation to gen_arm_fs_files.py
..
util: Add Xen compilation to gen_arm_fs_files.py
Change-Id: I61014d9686f0362ebb83dca5d4d33ac08d66d0a7
Signed-off-by: Giacomo Travaglini
---
M util/gen_arm_fs_files.py
1 file changed, 80 insertions(+), 0 deletions(-)
diff --git a/util/gen_arm_fs_files.py b/util/gen_arm_fs_files.py
index 986dda4..ea05fe1 100755
--- a/util/gen_arm_fs_files.py
+++ b/util/gen_arm_fs_files.py
@@ -1,5 +1,17 @@
#!/usr/bin/env python2.7
+# Copyright (c) 2020 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder. You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
# Copyright (c) 2017-2018 Metempsy Technology Consulting
# All rights reserved.
#
@@ -230,6 +242,73 @@
m5_dir,
["cp", "m5", binaries_dir + "/m5.aarch32"])
+def xen():
+"""
+Build Xen for aarch64
+"""
+xen_dir = os.path.join(options.dest_dir, "xen")
+bootwrapper_dir = os.path.join(options.dest_dir, "bootwrapper")
+linux_cmdline = "console=hvc0 root=/dev/vda rw mem=1G"
+xen_cmdline = "dtuart=/uart@1c09 console=dtuart no-bootscrub " + \
+ "dom0_mem=1G loglvl=all guest_loglvl=all"
+
+run_cmd("clone Xen",
+options.dest_dir,
+["git", "clone", "git://xenbits.xen.org/xen.git",
+ xen_dir])
+
+run_cmd("clone boot-wrapper-aarch64",
+options.dest_dir,
+["git", "clone", "git://git.kernel.org/pub/" +
+"scm/linux/kernel/git/mark/boot-wrapper-aarch64.git",
+ bootwrapper_dir])
+
+# Need to compile arm64 Linux
+linux_dir =
os.path.join(options.dest_dir, "linux-kernel-vexpress_gem5")
+linux_bin = os.path.join(linux_dir,
+"arch", "arm64", "boot", "Image")
+if not os.path.exists(linux_bin):
+linux_clone()
+linux64()
+
+# Need to compile DTBs
+dtb_bin = os.path.join(binaries_dir, "armv8_gem5_v2_1cpu.dtb")
+if not os.path.exists(dtb_bin):
+dtbs()
+
+# Building Xen
+run_cmd("building xen for aarch64",
+xen_dir,
+["make", "dist-xen", "XEN_TARGET_ARCH=arm64",
+ "CROSS_COMPILE=aarch64-linux-gnu-",
+ "CONFIG_EARLY_PRINTK=vexpress", make_jobs_str])
+
+# Building boot-wrapper-aarch64
+run_cmd("autoreconf boot-wrapper-aarch64",
+bootwrapper_dir, ["autoreconf", "-i"])
+run_cmd("configure boot-wrapper-aarch64",
+bootwrapper_dir, ["./configure",
+"--host=aarch64-linux-gnu",
+"--with-kernel-dir={}".format(linux_dir),
+"--with-dtb={}".format(dtb_bin),
+"--with-cmdline='{}'".format(linux_cmdline),
+"--with-xen-cmdline='{}'".format(xen_cmdline),
+"--with-xen={}".format(os.path.join(xen_dir, "xen", "xen")),
+"--enable-psci",
+"--enable-gicv3"])
+run_cmd("build boot-wrapper-aarch64",
+bootwrapper_dir, ["make"])
+
+# Copying the final binary
+run_cmd("copy xen binary",
+bootwrapper_dir, ["cp", "xen-system.axf", binaries_dir])
+
+with open(os.path.join(revisions_dir, "xen"), "w+") as rev_file:
+run_cmd("write revision of xen repo",
+xen_dir,
+["git", "rev-parse", "--short", "HEAD"],
+rev_file)
+
script_dir = os.path.dirname(os.path.abspath(sys.argv[0]))
gem5_dir = os.path.dirname(script_dir)
@@ -239,6 +318,7 @@
"dtbs" : dtbs,
"bootloaders" : bootloaders,
"m5" : m5,
+"xen" : xen,
}
parser = OptionParser()
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I61014d9686f0362ebb83dca5d4d33ac08d66d0a7
Gerrit-Change-Number: 32557
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: util: Change gen_arm_fs_files.py to allow selective compilation
Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/32554 )
Change subject: util: Change gen_arm_fs_files.py to allow selective
compilation
..
util: Change gen_arm_fs_files.py to allow selective compilation
With the --fs-binaries option it is possible to specify a comma
separated list of fs binaries to be fetched/compiled.
Change-Id: I12a642f65b74e8606c82cdddcbc3a8172bad2381
Signed-off-by: Giacomo Travaglini
---
M util/gen_arm_fs_files.py
1 file changed, 192 insertions(+), 139 deletions(-)
diff --git a/util/gen_arm_fs_files.py b/util/gen_arm_fs_files.py
index 40d7aee..76fa21b 100755
--- a/util/gen_arm_fs_files.py
+++ b/util/gen_arm_fs_files.py
@@ -52,9 +52,195 @@
print "Error running phase %s. Returncode: %d" % (explanation,
return_code)
sys.exit(1)
+def linux_clone():
+kernel_vexpress_gem5_dir = os.path.join(
+options.dest_dir, "linux-kernel-vexpress_gem5")
+
+run_cmd("clone linux kernel for VExpress_GEM5_V1 platform",
+options.dest_dir,
+["git", "clone", "https://gem5.googlesource.com/arm/linux;,
+ kernel_vexpress_gem5_dir])
+
+def linux64():
+kernel_vexpress_gem5_dir = os.path.join(
+options.dest_dir, "linux-kernel-vexpress_gem5")
+
+linux_bin = os.path.join(
+binaries_dir, "vmlinux.vexpress_gem5_v1_64")
+
+with open(revisions_dir + "/linux", "w+") as rev_file:
+run_cmd("write revision of linux-kernel-vexpress_gem5 repo",
+kernel_vexpress_gem5_dir,
+["git", "rev-parse", "--short", "HEAD"],
+rev_file)
+
+run_cmd("configure kernel for arm64",
+kernel_vexpress_gem5_dir,
+["make", "ARCH=arm64", "CROSS_COMPILE=aarch64-linux-gnu-",
+ "gem5_defconfig", make_jobs_str])
+run_cmd("compile kernel for arm64",
+kernel_vexpress_gem5_dir,
+["make", "ARCH=arm64", "CROSS_COMPILE=aarch64-linux-gnu-",
+make_jobs_str])
+run_cmd("copy arm64 vmlinux",
+kernel_vexpress_gem5_dir,
+["cp", "vmlinux", linux_bin])
+run_cmd("cleanup arm64 kernel compilation",
+kernel_vexpress_gem5_dir,
+["make", "distclean"])
+
+def linux32():
+kernel_vexpress_gem5_dir = os.path.join(
+options.dest_dir, "linux-kernel-vexpress_gem5")
+
+linux_bin = os.path.join(
+binaries_dir, "vmlinux.vexpress_gem5_v1")
+
+run_cmd("configure kernel for arm",
+kernel_vexpress_gem5_dir,
+["make", "ARCH=arm", "CROSS_COMPILE=arm-linux-gnueabihf-",
+ "gem5_defconfig"])
+run_cmd("compile kernel for arm",
+kernel_vexpress_gem5_dir,
+["make", "ARCH=arm", "CROSS_COMPILE=arm-linux-gnueabihf-",
+make_jobs_str])
+run_cmd("copy arm vmlinux",
+kernel_vexpress_gem5_dir,
+["cp", "vmlinux", linux_bin])
+
+def linux():
+"""
+Checkout and build linux kernel for VExpress_GEM5_V1 (arm and arm64)
+"""
+linux_clone()
+linux64()
+linux32()
+
+def linux_legacy():
+"""
+Checkout and build linux kernel and DTB for VExpress_EMM64/EMM
+"""
+kernel_vexpress_emm64_dir = os.path.join(options.dest_dir,
+"linux-kernel-vexpress_emm64")
+run_cmd("clone linux kernel for VExpress_EMM64 platform",
+options.dest_dir,
+
["git", "clone", "https://gem5.googlesource.com/arm/linux-arm64-legacy;,
+ kernel_vexpress_emm64_dir])
+with open(revisions_dir + "/linux-arm64-legacy", "w+") as rev_file:
+run_cmd("write revision of linux-kernel-vexpress_emm64 repo",
+kernel_vexpress_emm64_dir,
+["git", "rev-parse", "--short", "HEAD"],
+rev_file)
+run_cmd("configure kernel",
+kernel_vexpress_emm64_dir,
+["make", "ARCH=arm64", "CROSS_COMPILE=aarch64-linux-gnu-",
+ "CC=aarch64-linux-gnu-gcc-4.8", "gem5_defconfig"])
+run_cmd("compile kernel",
+kernel_vexpress_emm64_dir,
+["make", "ARCH=arm64", "CROSS_COMPILE=aarch64-linux-gnu-",
+ "CC=aarch64-linux-gnu-gcc-4.8", make_jobs_str])
+run_cmd("copy vmlinux",
+kernel_vexpress_emm64_dir,
+["cp", "vmlinux", binaries_dir + "/vmlinux.vexpress_emm64"])
+run_cmd("copy DTB",
+kernel_vexpress_emm64_dir,
+["cp", "arch/arm64/boot/dts/aarch64_gem5_server.dtb",
binaries_dir])
+
+kernel_vexpress_emm_dir = options.dest_dir
+ "/linux-kernel-vexpress_emm"
+run_cmd("clone linux kernel for VExpress_EMM platform",
+options.dest_dir,
+
["git", "clone", "https://gem5.googlesource.com/arm/linux-arm-legacy;,
+ kernel_vexpress_emm_dir])
+with open(revisions_dir + "/linux-arm-legacy", "w+") as rev_file:
+run_cmd("write revision of linux-kernel-vexpress_emm64 repo",
+kernel_vexpress_emm_dir,
+["git", "rev-parse", "--short", "HEAD"],
+rev_file)
+
[gem5-dev] Change in gem5/gem5[develop]: util: Remove dependency check
Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/32556 )
Change subject: util: Remove dependency check
..
util: Remove dependency check
The list is rather old and it contains some entries which are likely
unneeded. Since we are also now able to select specific FS binaries
to be compiled individually, there is not point of requiring all
components to be installed.
Instead, if is better to rely on the error message of building process
and let the users figure out which packages they need to install
Change-Id: I16c74861cb1f2b09c3e91e408ace01a9bd7a234d
Signed-off-by: Giacomo Travaglini
---
M util/gen_arm_fs_files.py
1 file changed, 0 insertions(+), 24 deletions(-)
diff --git a/util/gen_arm_fs_files.py b/util/gen_arm_fs_files.py
index 2f339a2..986dda4 100755
--- a/util/gen_arm_fs_files.py
+++ b/util/gen_arm_fs_files.py
@@ -292,30 +292,6 @@
print "Error: %s already exists." %revisions_dir
sys.exit(1)
-# Some basic dependency checking
-needed_programs = [
-"make",
-"aarch64-linux-gnu-gcc",
-"arm-linux-gnueabihf-gcc",
-"aarch64-linux-gnu-gcc-4.8",
-"arm-linux-gnueabihf-gcc-4.8",
-"gcc",
-"bc",
-"dtc",
-"arm-linux-gnueabi-gcc"
-]
-
-for program in needed_programs:
-if not spawn.find_executable(program):
-print "Error: command %s not found in $PATH" % program
-print ("If running on an Debian-based linux, please try the
following "
- "cmd to get all the necessary packages: ")
-print ("sudo apt-get install -y make gcc bc gcc-aarch64-linux-gnu "
- "gcc-4.8-aarch64-linux-gnu gcc-4.8-arm-linux-gnueabihf "
- "gcc-arm-linux-gnueabihf device-tree-compiler "
- "gcc-arm-linux-gnueabi")
-sys.exit(1)
-
os.mkdir(binaries_dir);
os.mkdir(revisions_dir);
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32556
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I16c74861cb1f2b09c3e91e408ace01a9bd7a234d
Gerrit-Change-Number: 32556
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Fix debug prints for regular Stores
Pouya Fotouhi has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/32514 )
Change subject: mem-ruby: Fix debug prints for regular Stores
..
mem-ruby: Fix debug prints for regular Stores
In the updated implementation of LL/SC (27103) the default value
of success was changed, which results in printing "SC_Failed" for
any regular stores.
Change-Id: I4f2e0b26233ce0cbdf948aadd19c9d81bf18bec0
---
M src/mem/ruby/system/Sequencer.cc
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mem/ruby/system/Sequencer.cc
b/src/mem/ruby/system/Sequencer.cc
index aa134f4..42398e2 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -368,7 +368,7 @@
(seq_req.m_type != RubyRequestType_Load_Linked) &&
(seq_req.m_type != RubyRequestType_IFETCH)) {
// LL/SC support (tested with ARMv8)
-bool success = false;
+bool success = true;
if (seq_req.m_type != RubyRequestType_Store_Conditional) {
// Regular stores to addresses being monitored
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32514
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I4f2e0b26233ce0cbdf948aadd19c9d81bf18bec0
Gerrit-Change-Number: 32514
Gerrit-PatchSet: 1
Gerrit-Owner: Pouya Fotouhi
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: arch: Remove the stacktrace.hh switching header file.
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32215 ) Change subject: arch: Remove the stacktrace.hh switching header file. .. arch: Remove the stacktrace.hh switching header file. This is no longer used. Change-Id: I1419b28d51ff603beb7d8ab89632ad7038c3057e Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32215 Reviewed-by: Bobby R. Bruce Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- M src/arch/SConscript 1 file changed, 0 insertions(+), 1 deletion(-) Approvals: Jason Lowe-Power: Looks good to me, but someone else must approve; Looks good to me, approved Bobby R. Bruce: Looks good to me, approved kokoro: Regressions pass diff --git a/src/arch/SConscript b/src/arch/SConscript index 978f72a..89c89c1 100644 --- a/src/arch/SConscript +++ b/src/arch/SConscript @@ -65,7 +65,6 @@ pseudo_inst.hh registers.hh remote_gdb.hh -stacktrace.hh types.hh utility.hh '''), -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32215 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I1419b28d51ff603beb7d8ab89632ad7038c3057e Gerrit-Change-Number: 32215 Gerrit-PatchSet: 3 Gerrit-Owner: Gabe Black Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
