Re: [gem5-dev] Review Request 3800: x86: fix Mul1u instructions
--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3800/ --- (Updated Feb. 2, 2017, 3:13 p.m.) Review request for Default. Summary (updated) - x86: fix Mul1u instructions Repository: gem5 Description (updated) --- Changeset 11970:d550f3b851a8 --- x86: fix Mul1u instructions the Mul1uFlags and Mul1u instructions perform the 64b multiplication using only 64b registers, however the method used causes the high 64b to be corrupted for certain inputs. here we fix the computation. Diffs (updated) - src/arch/x86/isa/microops/regop.isa ed89cb178ecd7586296d2a2e83595174474db554 Diff: http://reviews.gem5.org/r/3800/diff/ Testing --- Thanks, Tony Gutierrez ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
Re: [gem5-dev] Review Request 3800: x86 fix Mul1u instructions
> On Feb. 2, 2017, 1:40 a.m., Andreas Hansson wrote: > > Would this not spell the end of gem5 support on 32-bit platforms/kernels? > > Is it not possible to avoid using the non-standard type? I am not entirely clear on that. This macro seems to be supported since GCC 4, and in older versions of clang as well, however some resources I've seen online indicate it is not supported on 32b targets. So I will update fix the 64b multiplication algorithm instead of using 128b types, I think the issue is just with the way the shifting is handled in the computation of the high 64b. - Tony --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3800/#review9366 --- On Feb. 1, 2017, 4:32 p.m., Tony Gutierrez wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3800/ > --- > > (Updated Feb. 1, 2017, 4:32 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > --- > > Changeset 11970:a7fb935f1418 > --- > x86 fix Mul1u instructions > > the Mul1uFlags and Mul1u instructions perform the 64b multiplication using > only 64b registers, however this method causes the high 64b to be corrupted > for certain inputs. to avoid this complexity, we use the compiler builtin > __uint128_t, which is supported by gcc and clang to simplify the code and > get correct results. > > > Diffs > - > > src/arch/x86/isa/microops/regop.isa > ed89cb178ecd7586296d2a2e83595174474db554 > > Diff: http://reviews.gem5.org/r/3800/diff/ > > > Testing > --- > > > Thanks, > > Tony Gutierrez > > ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
Re: [gem5-dev] Review Request 3800: x86 fix Mul1u instructions
--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3800/#review9366 --- Would this not spell the end of gem5 support on 32-bit platforms/kernels? Is it not possible to avoid using the non-standard type? - Andreas Hansson On Feb. 2, 2017, 12:32 a.m., Tony Gutierrez wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3800/ > --- > > (Updated Feb. 2, 2017, 12:32 a.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > --- > > Changeset 11970:a7fb935f1418 > --- > x86 fix Mul1u instructions > > the Mul1uFlags and Mul1u instructions perform the 64b multiplication using > only 64b registers, however this method causes the high 64b to be corrupted > for certain inputs. to avoid this complexity, we use the compiler builtin > __uint128_t, which is supported by gcc and clang to simplify the code and > get correct results. > > > Diffs > - > > src/arch/x86/isa/microops/regop.isa > ed89cb178ecd7586296d2a2e83595174474db554 > > Diff: http://reviews.gem5.org/r/3800/diff/ > > > Testing > --- > > > Thanks, > > Tony Gutierrez > > ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Review Request 3800: x86 fix Mul1u instructions
--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3800/ --- Review request for Default. Repository: gem5 Description --- Changeset 11970:a7fb935f1418 --- x86 fix Mul1u instructions the Mul1uFlags and Mul1u instructions perform the 64b multiplication using only 64b registers, however this method causes the high 64b to be corrupted for certain inputs. to avoid this complexity, we use the compiler builtin __uint128_t, which is supported by gcc and clang to simplify the code and get correct results. Diffs - src/arch/x86/isa/microops/regop.isa ed89cb178ecd7586296d2a2e83595174474db554 Diff: http://reviews.gem5.org/r/3800/diff/ Testing --- Thanks, Tony Gutierrez ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
