Re: [gem5-users] gem5 stable release proposal [PLEASE VOTE!]

[Georgios S. Bousdras]

Hi folks, 

- I think master should be stable.
- I think gem5 should be released three times per year.

Kind Regards,
George Bousdras
PhD Researcher — Embedded Systems

BEAMS - Bio Electro and Mechanical Systems
www.ulb.ac.be
beams.ulb.ac.be

On 16/12/2019, 20:50, "gem5-users on behalf of Jason Lowe-Power" 
 wrote:

Hi all,

As many of you have seen on gem5-dev, we are going to be adding a
"stable" version of gem5. Below is the current proposal. There are a
couple of points below where there has not been general consensus
reached. We would appreciate feedback *from everyone in the community*
on the points where a decision hasn't been made below. gem5 is a
community-driven project, and we need feedback to make sure we're
making community-focused decisions.

We will be introducing a new "stable" branch type to gem5. We are
doing this for the following reasons:
- Provide a way for developers to communicate major changes to the
code. We will be providing detailed release notes for each stable
release.
- Increase our test coverage. At each stable release, we will test a
large number of "common" benchmarks and configurations and publicize
the current state of gem5.
- Provide a way for researchers to communicate to the rest of the
community information about their simulation infrastructure (e.g., in
a paper you can say which version of gem5 you used).

On the stable version of gem5, we will provide bugfixes  until the
next release, but we will not make any API changes or add new
features.

We would like your feedback on the following two questions:

**Which branch should be default?**

We can either have the master branch in git be the "stable" or the
"development" branch. If master is the stable branch, then it's easier
for users to get the most recent stable branch. If master is the
development branch, it's more familiar and easier for most developers.
Either way, we will be updating all of the documentation to make it
clear.

Please let us know which you prefer by replying "I think master should
be stable" or "I think master should be development".

**How often should we create a new gem5 release?**

We can have a gem5 release once per year (likely in April) or three
times per year (April, August, and December). Once per year means that
if you use the stable branch you will get updates less frequently.
Three times per year will mean there are more releases to choose from
(but a newer release should always be better). On the development
side, I don't think one will be more work than the other. Once per
year means more backporting, and three times per year means more
testing and time spent on releases.

Please let us know which you prefer by replying "I think gem5 should
be released once per year" or "I think gem5 should be released three
times per year."




A couple of notes to everyone who's been following the discussion on
the gem5-dev mailing list:
- We have dropped the proposal for major vs minor releases. Note that
there was some pushback on having only major releases when this was
proposed on the gem5 roadmap, but it sounded like the consensus was to
drop minor releases for now.
- We will still allow feature branches *in rare circumstances*. This
will be by request only (send mail to gem5-dev if you would like to
discuss adding a new branch), and the goal will be integration within
a few months. All code review will still happen in the open on gerrit.
The benefits will be
1) rebases won't be required as you can just make changes to the head
of the branch
2) many features take more than a few months to implement, so if it's
not ready by a release it can be pushed to the next
3) large changes won't be hidden in AMD or Arm-specific repositories
and *anyone* will be able to request a branch.

Thanks everyone for the discussions so far! It would be most useful to
hear back by the end of the week. However, I don't expect any concrete
actions will be taken until after the holidays.

Cheers,
Jason
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Re: [gem5-users] Any recommendation of ARM HPI configuration

[Georgios S. Bousdras]

Hi,

You need to know what are you going to test (perfomance/power). 
Take in to account that different architectures support different applications.
Define the demands of the system and then do what Ciro said, find an existed 
SoC which match your requirements and create your processor similar to it.

Best Regards,
Georgios Bousdras
PhD Researchers - Embedded Systems
BEAMS - ULB

> On 3 Dec 2018, at 13:36, 杜东  wrote:
> 
> Hi guys,
> 
>I am using GEM5 ARM with the Minor CPU (specifically, HPI mode).
>The default configuration is :
>Core: 4GHz 
>TLB:  256 entries I/D TLB
>L1 I/D cache:  1 cycle (data/tag/response) 
>L2 I/D cache:  13 cycles for data and tag access
>memory type:   DDR3_1600_8x8.
> 
>This default configuration seems too great? 
>I am not sure whether real devices can achieve the performance, especially 
> 1 cycle L1 cache access.
> 
>So do you have any recommendation on the configurations?
>Any comments are welcomed!
> 
> Dong 
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Re: [gem5-users] Gem5 and McPAT error

[Georgios S. Bousdras]

Hi,

The template seems good.
Possibly the problem is after the parser.
The best way is to create your own parser. 
Share the output file in order to check what it is wrong.

Best Regards,
Georgios Bousdras
PhD Researcher — Embedded Systems


> On 17 Oct 2018, at 00:16, Weizheng Xu  
> wrote:
> 
> Dear all,
> 
> I have add the template I used for McPAT as the attachment. But I still have 
> the same problem here. I have check the repository of the person who help me 
> before https://github.com/H2020-COSSIM/cMcPAT 
> , but I did not find the template in 
> his files. I am not sure how can I change the template because when I change 
> the value of number of cores and others, they have the same problem. 
> 
> Any help appreciate.
> 
> Best wishes,
> weizheng
> 
> 
> 
> 
> 
>> 在 Sep 25, 2018，7:10 AM，Andreas Brokalakis > > 写道：
>> 
>> Dear Weizheng,
>> 
>> you are using a quite old version of McPAT. Current version is 1.3. It would 
>> be better if you used that one.
>> 
>> Now concerning your issues. You need to make sure that the system that you 
>> are trying to simulate in gem5 matches with the template that you are trying 
>> to use in McPAT. It is assumed that you need to make changes in the template 
>> xml file to match it with the gem5 system. Check the proper instructions on 
>> how to do that.
>> 
>> You can also check the modified McPAT and conversion scripts in my 
>> repository here: https://github.com/H2020-COSSIM/cMcPAT 
>> 
>> 
>> Best regards,
>> Andreas
>> 
>> On Mon, Sep 24, 2018 at 11:10 PM Weizheng Xu 
>> > > wrote:
>> Dear all,
>> 
>> I use gem5 get the full system simulation results and want to use McPAT to 
>> get the power model.  I use the Gem5ToMcpat.py and template_xeon.xml  gotten 
>> from website to translate the stats.txt to the output.xml, which can be read 
>> as input by McPAT. But when I use this output.xml as a input for McPAT  (I 
>> use command ./mcpat -infile /home//Desktop/test/gem5/ext/mcpat/out.xml in 
>> the terminal to run the McPAT), I got the error shown as following:
>> "McPAT (version 0.8 of Aug, 2010) is computing the target processor...
>> 
>> some value(s) of number_of_cores/number_of_L2s/number_of_L3s/number_of_NoCs 
>> is/are not correct!”
>> 
>> I tried to change these values in the template_xeon.xml but still failed 
>> with this problem.
>> 
>> I really don’t know how to solve this problem. 
>> 
>> PS: I use ubuntu16.04 LTS and gem5. I use the McPAT provided in the gem5/ext 
>> file and with version of 0.8
>> 
>> Any help appreciated,
>> thanks
>> 
>> Weizheng
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Re: [gem5-users] Reducing main memory size in full-system simulation

[Georgios S. Bousdras]

Hi, 

I had the same issue (on fs_bigLITTLE.fs)… 
What I did to avoid this problem was to run the simulation using the 
hack_back_ckpt.rcS and after the first booting I run my app using restore point.
If you figure out a better solution let me know..

Regards,
George

> On 28 Jun 2018, at 19:14, Choe, Jiwon  wrote:
> 
> I am running a Linux ARM full-system simulation, and I have been having 
> problems after reducing the main memory size from 512 MB to 256 MB. 
> 
> After reducing the memory size, the simulation works fine up to booting the 
> OS. However, when I try to run my application on the simulated system (via a 
> .rcs file) the simulation shuts down. 
> 
> When I change the main memory size, is there something else that I should be 
> changing other than the parameters to gem5 itself? For instance, should I be 
> changing something in the Linux dts file? 
> 
> Thanks,
> Jiwon
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[gem5-users] Gem5 - McPAT, fs_big.little.py Stats.txt to XML

[Georgios S. Bousdras]

Hi,

I want to measure the power of a fs_bigLITTLE system using McPAT.
Is there any method to convert the stats.txt to the proper xml file?
I tried this script https://github.com/Ayymoose/gem5-mcpat-parser but It gives 
me error at the template.xml.
Is it possible to convert it manually ?
If you know a different program expect McPAT let me know.

Best Regards,
George
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[gem5-users] Uncompleted benchmark execution

[Georgios S. Bousdras]

Hi,

While I was running the benchmarks, the benchmark stop. 

For example in the terminal which running the gem5 I take this message:

warn: Tried to read RealView I/O at offset 0x48 that doesn't exist
warn: Unsupported IO request: 8
warn: Unsupported IO request: 8
m5_exit instruction encountered  @  763162015

But at the system.terminal the out is:

INIT: no more processes left in this runlevel
/home/root/parsec-3.0
[PARSEC] Benchmarks to run:  parsec.ferret

[PARSEC] [== Running benchmark parsec.ferret [1] ==]
[PARSEC] Deleting old run directory.
[PARSEC] Setting up run directory.
[PARSEC] Unpacking benchmark input 'simsmall'.

I have test it many times and sometimes the system.terminal maybe include more 
information but I have never been taken the message "[PARSEC] Done.”

What do you think is the error? 
Everything seems correct to me ...

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Re: [gem5-users] fs_bigLITTLE.py CPU: failed to come online

[Georgios S. Bousdras]

Thank you very much for your reply.

At my command at the end a put the parameter  - -little-cpus=4.
I can’t understand why it doesn’t load the little cpus..
Also, I test  - -big-cpus=4 - -little-cpus=4 and it works fine. 

Only for the architecture of 4 little cpus I have this problem. 

Regards,
George


> On 8 Jun 2018, at 18:07, Ciro Santilli  wrote:
> 
> armv8_gem5_v1_big_little_4_4 means 4 big and 4 little.
> 
> If you run it without anything other than --little-cpus=4 --big-cpus=4
> is likely to blow up.
> 
> Failed to come online means the kernel could not properly find the CPU
> and won't use it at all.
> 
> On Fri, Jun 8, 2018 at 3:57 PM, Georgios S. Bousdras
>  wrote:
>> Hi,
>> 
>> I have a question regarding fs_bigLITTLE.py
>> I run the simulation using this command:
>> 
>> ./build/ARM/gem5.opt -d m5out/little_4/blackscholes_dtb_2_2
>> configs/example/arm/fs_bigLITTLE.py
>> --dtb=$M5_PATH/aarch-system-20180409/binaries/armv8_gem5_v1_big_little_4_4.dtb
>> --disk=$M5_PATH/aarch-system-20180409/disks/expanded-linaro-minimal-aarch64.img
>> —kernel=$M5_PATH/aarch-system-20180409/binaries/vmlinux.vexpress_gem5_v1_64
>> —bootscript=$M5_PATH/arm-gem5-rsk/parsec_rcs/test_simsmall_4.rcS
>> --cpu-type=timing
>> --caches --little-cpus=4
>> 
>> While I was checking the system.terminal observed the forward:
>> 
>> [0.024013] Hierarchical SRCU implementation.
>> [0.040031] smp: Bringing up secondary CPUs ...
>> [1.088662] CPU1: failed to come online
>> [1.088666] CPU1: failed in unknown state : 0x0
>> [2.145284] CPU2: failed to come online
>> [2.145288] CPU2: failed in unknown state : 0x0
>> [3.201904] CPU3: failed to come online
>> [3.201908] CPU3: failed in unknown state : 0x0
>> [3.229964] Detected PIPT I-cache on CPU4
>> [3.230018] CPU4: Booted secondary processor [410fc0f0]
>> [4.290585] CPU5: failed to come online
>> [4.290591] CPU5: failed in unknown state : 0x0
>> [5.347232] CPU6: failed to come online
>> [5.347236] CPU6: failed in unknown state : 0x0
>> [6.403877] CPU7: failed to come online
>> [6.403880] CPU7: failed in unknown state : 0x0
>> [6.403909] smp: Brought up 1 node, 2 CPUs
>> [6.403912] SMP: Total of 2 processors activated.
>> 
>> Is that normal ?
>> Are going this message to create problem to the simulation ?
>> What does exactly means CPU: failed to come online ?
>> Instead, for  - -big-cpus=4 I don’t have this issue, it works fine.
>> 
>> smp: Bringing up secondary CPUs ...
>> [0.068078] Detected PIPT I-cache on CPU1
>> [0.068097] CPU1: Booted secondary processor [410fc0f0]
>> [0.096140] Detected PIPT I-cache on CPU2
>> [0.096160] CPU2: Booted secondary processor [410fc0f0]
>> [0.124205] Detected PIPT I-cache on CPU3
>> [0.124225] CPU3: Booted secondary processor [410fc0f0]
>> [0.152284] Detected PIPT I-cache on CPU4
>> [0.152339] CPU4: Booted secondary processor [410fc0f0]
>> 
>> To generate the .dtb I modified the script inside the
>> system/arm/dt/armv8_big_liitle.dts and then I run make.
>> I added this code:
>> 
>> #elif CONF_CPUS == _4_4
>> CPU(0,0x0)
>> CPU(1,0x1)
>>CPU(2,0x2)
>>CPU(3,0x3)
>> CPU(4,0x104)
>> CPU(5,0x105)
>> CPU(6,0x106)
>> CPU(7,0x107)
>> cpu-map {
>> cluster0 {
>> core0 { cpu = <>; };
>> core1 { cpu = <>; };
>>core2 { cpu = <>; };
>> core3 { cpu = <>; };
>> };
>> cluster1 {
>> core0 { cpu = <>; };
>> core1 { cpu = <>; };
>> core2 { cpu = <>; };
>> core3 { cpu = <>; };
>> };
>> };
>> 
>> If is not the problem to the .dtb where should I search the problem?
>> I will appreciate your help.
>> 
>> Best Regards,
>> George
>> 
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[gem5-users] fs_bigLITTLE.py CPU: failed to come online

[Georgios S. Bousdras]

Hi,

I have a question regarding fs_bigLITTLE.py 
I run the simulation using this command: 

./build/ARM/gem5.opt -d m5out/little_4/blackscholes_dtb_2_2 
configs/example/arm/fs_bigLITTLE.py 
--dtb=$M5_PATH/aarch-system-20180409/binaries/armv8_gem5_v1_big_little_4_4.dtb 
--disk=$M5_PATH/aarch-system-20180409/disks/expanded-linaro-minimal-aarch64.img 
—kernel=$M5_PATH/aarch-system-20180409/binaries/vmlinux.vexpress_gem5_v1_64 
—bootscript=$M5_PATH/arm-gem5-rsk/parsec_rcs/test_simsmall_4.rcS 
--cpu-type=timing 
--caches --little-cpus=4

While I was checking the system.terminal observed the forward:

[0.024013] Hierarchical SRCU implementation.
[0.040031] smp: Bringing up secondary CPUs ...
[1.088662] CPU1: failed to come online
[1.088666] CPU1: failed in unknown state : 0x0
[2.145284] CPU2: failed to come online
[2.145288] CPU2: failed in unknown state : 0x0
[3.201904] CPU3: failed to come online
[3.201908] CPU3: failed in unknown state : 0x0
[3.229964] Detected PIPT I-cache on CPU4
[3.230018] CPU4: Booted secondary processor [410fc0f0]
[4.290585] CPU5: failed to come online
[4.290591] CPU5: failed in unknown state : 0x0
[5.347232] CPU6: failed to come online
[5.347236] CPU6: failed in unknown state : 0x0
[6.403877] CPU7: failed to come online
[6.403880] CPU7: failed in unknown state : 0x0
[6.403909] smp: Brought up 1 node, 2 CPUs
[6.403912] SMP: Total of 2 processors activated.

Is that normal ?
Are going this message to create problem to the simulation ?
What does exactly means CPU: failed to come online ?
Instead, for  - -big-cpus=4 I don’t have this issue, it works fine.

smp: Bringing up secondary CPUs ...
[0.068078] Detected PIPT I-cache on CPU1
[0.068097] CPU1: Booted secondary processor [410fc0f0]
[0.096140] Detected PIPT I-cache on CPU2
[0.096160] CPU2: Booted secondary processor [410fc0f0]
[0.124205] Detected PIPT I-cache on CPU3
[0.124225] CPU3: Booted secondary processor [410fc0f0]
[0.152284] Detected PIPT I-cache on CPU4
[0.152339] CPU4: Booted secondary processor [410fc0f0]

To generate the .dtb I modified the script inside the 
system/arm/dt/armv8_big_liitle.dts and then I run make.
I added this code:

#elif CONF_CPUS == _4_4
CPU(0,0x0)
CPU(1,0x1)
CPU(2,0x2)
CPU(3,0x3)
CPU(4,0x104)
CPU(5,0x105)
CPU(6,0x106)
CPU(7,0x107)
cpu-map {
cluster0 {
core0 { cpu = <>; };
core1 { cpu = <>; };
core2 { cpu = <>; };
core3 { cpu = <>; };
};
cluster1 {
core0 { cpu = <>; };
core1 { cpu = <>; };
core2 { cpu = <>; };
core3 { cpu = <>; };
};
};

If is not the problem to the .dtb where should I search the problem?
I will appreciate your help.

Best Regards,
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[gem5-users] Multi-core execution - gem5 & big.LITTLE total cores

[Georgios S. Bousdras]

Dear all, 

I wonder if It is possible to run the gem5 on a multi-core mode(like the scons 
build/ARM/gem5.opt -j “n”) in order to reduce the simulation time. 

In addition, what is the difference between armv8_gem5_v1_big_little_2_2.dtb 
and armv8_gem5_v1_big_little_2_4.dtb?
I ask because I want to simulate a 8 core big.LITTLE system of 4 big cores and 
4 little cores and I don’t know which is a suitable .dtb file. 

Best Regards,
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