Re: [Intel-gfx] [PATCH i-g-t 1/2] tests/debugfs_test: Try to light all outputs to increase chances of finding fails.

[Pandiyan, Dhinakaran]

On Wed, 2017-10-11 at 12:28 +0200, Maarten Lankhorst wrote:
> Op 10-10-17 om 22:12 schreef Chris Wilson:
> > Quoting Maarten Lankhorst (2017-10-10 17:04:27)
> >> Make sure read_all_entries has all outputs possible enabled, but also
> >> add a test that runs with all outputs disabled.
> >>
> >> This will maximize coverage of debugfs reading, and allows the test not
> >> to be dependent on fbcon for setup.
> >>
> >> Signed-off-by: Maarten Lankhorst 
> > My only argument, but this is just one special case out of many, isn't
> > really an argument but an endorsement.
> >
> > Reviewed-by: Chris Wilson 
> > -Chris
> 
> This test seems to cause a failure in igt..
> 
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_315/fi-glk-1/igt@debugfs_test@read_all_entries.html
> 
> Dhinakaran, any idea about the DP crc failure?
> 
> ~Maarten
> 

I accidentally reproduced this by reading the CRC debugfs when eDP was
off (pipe was active as per i915_display_info). Wonder if this is an
indication that the panel did not really light up in your case. It'd be
good to see what's happening on the screen if you have physical access
to the machine.
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dp: Clean up intel_dp_check_mst_status

[Patchwork]

== Series Details ==

Series: drm/i915/dp: Clean up intel_dp_check_mst_status
URL   : https://patchwork.freedesktop.org/series/32584/
State : failure

== Summary ==

Series 32584v1 drm/i915/dp: Clean up intel_dp_check_mst_status
https://patchwork.freedesktop.org/api/1.0/series/32584/revisions/1/mbox/

Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
dmesg-warn -> PASS   (fi-byt-n2820) fdo#101705
Test kms_psr_sink_crc:
Subgroup psr_basic:
pass   -> INCOMPLETE (fi-cnl-y)

fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:440s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:449s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:377s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:524s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:261s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:499s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:501s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:491s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:478s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:537s
fi-cnl-y total:248  pass:223  dwarn:0   dfail:0   fail:0   skip:24 
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:249s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:576s
fi-glk-dsi   total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  
time:484s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:427s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:428s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:438s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:497s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:460s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:495s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:576s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:474s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:584s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:544s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:456s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:642s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:525s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:495s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:456s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:555s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:421s
fi-elk-e7500 failed to connect after reboot

63e85ec6f910933a46b5a50a2a077b6860ed4815 drm-tip: 2017y-10m-24d-20h-52m-45s UTC 
integration manifest
a5d7eacb0926 drm/i915/dp: Clean up intel_dp_check_mst_status

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6175/
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[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/selftests: Don't try to queue a request with zero delay

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/selftests: Don't try to queue a 
request with zero delay
URL   : https://patchwork.freedesktop.org/series/32582/
State : failure

== Summary ==

Series 32582v1 series starting with [1/2] drm/i915/selftests: Don't try to 
queue a request with zero delay
https://patchwork.freedesktop.org/api/1.0/series/32582/revisions/1/mbox/

Test chamelium:
Subgroup dp-crc-fast:
pass   -> FAIL   (fi-kbl-7500u) fdo#102514
Test kms_force_connector_basic:
Subgroup prune-stale-modes:
pass   -> SKIP   (fi-ivb-3520m)
Test kms_psr_sink_crc:
Subgroup psr_basic:
pass   -> INCOMPLETE (fi-cnl-y)

fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:450s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:454s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:371s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:541s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:262s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:498s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:500s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:497s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:476s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:548s
fi-cnl-y total:289  pass:223  dwarn:0   dfail:0   fail:0   skip:24 
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:421s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:250s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:583s
fi-glk-dsi   total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  
time:488s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:434s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:433s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:436s
fi-ivb-3520m total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:483s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:462s
fi-kbl-7500u total:289  pass:263  dwarn:1   dfail:0   fail:1   skip:24  
time:486s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:573s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:474s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:582s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:540s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:450s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:646s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:520s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:496s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:452s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:570s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:419s

4971297c57bdd02d8f64cddc9d44c9db6b3478b3 drm-tip: 2017y-10m-24d-17h-29m-57s UTC 
integration manifest
69d70508cdb9 drm/i915: Use same test for eviction and submitting kernel context
440877a4618e drm/i915/selftests: Don't try to queue a request with zero delay

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6174/
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Re: [Intel-gfx] [PATCH 2/2] drm/i915: Calculate ironlake intermediate watermarks correctly, v2.

[Matt Roper]

On Thu, Oct 19, 2017 at 05:13:41PM +0200, Maarten Lankhorst wrote:
> The watermarks it should calculate against are the old optimal watermarks.
> The currently active crtc watermarks are pure fiction, and are invalid in
> case of a nonblocking modeset, page flip enabling/disabling planes or any
> other reason.
> 
> When the crtc is disabled or during a modeset the intermediate watermarks
> don't need to be programmed separately, and could be directly assigned
> to the optimal watermarks.
> 
> Changes since v1:
> - Use intel_atomic_get_old_crtc_state. (ville)
> 
> Signed-off-by: Maarten Lankhorst 
> Reviewed-by: Ville Syrjälä 

Reviewed-by: Matt Roper 

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 9 -
>  1 file changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index ea70c720f492..e181dfc36200 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3124,7 +3124,11 @@ static int ilk_compute_intermediate_wm(struct 
> drm_device *dev,
>  struct intel_crtc_state *newstate)
>  {
>   struct intel_pipe_wm *a = >wm.ilk.intermediate;
> - struct intel_pipe_wm *b = _crtc->wm.active.ilk;
> + struct intel_atomic_state *intel_state =
> + to_intel_atomic_state(newstate->base.state);
> + const struct intel_crtc_state *oldstate =
> + intel_atomic_get_old_crtc_state(intel_state, intel_crtc);
> + const struct intel_pipe_wm *b = >wm.ilk.optimal;
>   int level, max_level = ilk_wm_max_level(to_i915(dev));
>  
>   /*
> @@ -3133,6 +3137,9 @@ static int ilk_compute_intermediate_wm(struct 
> drm_device *dev,
>* and after the vblank.
>*/
>   *a = newstate->wm.ilk.optimal;
> + if (!newstate->base.active || 
> drm_atomic_crtc_needs_modeset(>base))
> + return 0;
> +
>   a->pipe_enabled |= b->pipe_enabled;
>   a->sprites_enabled |= b->sprites_enabled;
>   a->sprites_scaled |= b->sprites_scaled;
> -- 
> 2.14.1
> 
> ___
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-- 
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
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Re: [Intel-gfx] [PATCH 1/2] drm/i915: Do not rely on wm preservation for ILK watermarks

[Matt Roper]

On Thu, Oct 19, 2017 at 05:13:40PM +0200, Maarten Lankhorst wrote:
> The original intent was to preserve watermarks as much as possible
> in intel_pipe_wm.raw_wm, and put the validated ones in intel_pipe_wm.wm.
> 
> It seems this approach is insufficient and we don't always preserve
> the raw watermarks, so just use the atomic iterator we're already using
> to get a const pointer to all bound planes on the crtc.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102373
> Signed-off-by: Maarten Lankhorst 
> Cc: sta...@vger.kernel.org #v4.8+

It's been a while since I looked at this code, so I'm not sure I'm
following all the context/history here.  Before this patch, we had
calculated watermarks for all levels (even those above the maximum
usable watermark level as determined by sprite usage) into raw_wm.  But
as far as I can tell, we never actually used those values for anything
so that was no different than just throwing the values away?

Is my understanding correct that this is mostly a revert of 71f0a62614
("drm/i915: Only use sanitized values for ILK watermarks) except that it
also modifies the level validation loop so that we're only calling
ilk_compute_wm_level() on the levels up to usable_level whereas before
that patch we were calling it on all levels, but then
setting wm->enable = false for the unusable levels?

By my understanding, this looks like a safe simplification of the
current logic, but I don't see where the functional change is here.
Was the Buzilla: reference supposed to be tied to patch #2 of this
series or am I missing something important?


Matt

> ---
>  drivers/gpu/drm/i915/intel_drv.h |  1 -
>  drivers/gpu/drm/i915/intel_pm.c  | 51 
> +---
>  2 files changed, 21 insertions(+), 31 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_drv.h 
> b/drivers/gpu/drm/i915/intel_drv.h
> index 47d022d48718..7bc60c848940 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -499,7 +499,6 @@ struct intel_crtc_scaler_state {
>  
>  struct intel_pipe_wm {
>   struct intel_wm_level wm[5];
> - struct intel_wm_level raw_wm[5];
>   uint32_t linetime;
>   bool fbc_wm_enabled;
>   bool pipe_enabled;
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index c42a65a93b3a..ea70c720f492 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -2721,9 +2721,9 @@ static void ilk_compute_wm_level(const struct 
> drm_i915_private *dev_priv,
>const struct intel_crtc *intel_crtc,
>int level,
>struct intel_crtc_state *cstate,
> -  struct intel_plane_state *pristate,
> -  struct intel_plane_state *sprstate,
> -  struct intel_plane_state *curstate,
> +  const struct intel_plane_state *pristate,
> +  const struct intel_plane_state *sprstate,
> +  const struct intel_plane_state *curstate,
>struct intel_wm_level *result)
>  {
>   uint16_t pri_latency = dev_priv->wm.pri_latency[level];
> @@ -3043,28 +3043,24 @@ static int ilk_compute_pipe_wm(struct 
> intel_crtc_state *cstate)
>   struct intel_pipe_wm *pipe_wm;
>   struct drm_device *dev = state->dev;
>   const struct drm_i915_private *dev_priv = to_i915(dev);
> - struct intel_plane *intel_plane;
> - struct intel_plane_state *pristate = NULL;
> - struct intel_plane_state *sprstate = NULL;
> - struct intel_plane_state *curstate = NULL;
> + struct drm_plane *plane;
> + const struct drm_plane_state *plane_state;
> + const struct intel_plane_state *pristate = NULL;
> + const struct intel_plane_state *sprstate = NULL;
> + const struct intel_plane_state *curstate = NULL;
>   int level, max_level = ilk_wm_max_level(dev_priv), usable_level;
>   struct ilk_wm_maximums max;
>  
>   pipe_wm = >wm.ilk.optimal;
>  
> - for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
> - struct intel_plane_state *ps;
> -
> - ps = intel_atomic_get_existing_plane_state(state,
> -intel_plane);
> - if (!ps)
> - continue;
> + drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, 
> >base) {
> + const struct intel_plane_state *ps = 
> to_intel_plane_state(plane_state);
>  
> - if (intel_plane->base.type == DRM_PLANE_TYPE_PRIMARY)
> + if (plane->type == DRM_PLANE_TYPE_PRIMARY)
>   pristate = ps;
> - else if (intel_plane->base.type == DRM_PLANE_TYPE_OVERLAY)
> + else if (plane->type == DRM_PLANE_TYPE_OVERLAY)
>   

[Intel-gfx] [PATCH v3] drm/i915/dp: Clean up intel_dp_check_mst_status

[Dhinakaran Pandiyan]

Rewriting this code without the goto, I believe, makes it more readable.
One functional change that has been included is the handling of failed ESI
register reads. Instead of disabling MST only for the first failed read, we
now disable MST on subsequent failed reads too. A failed ESI read is
problematic irrespective of whether it is the first or not.

v2: Don't ignore return from _mst_hpd_irq() (James)
v3: Rebased.

Cc: James Ausmus 
Cc: Jani Nikula 
Cc: Ville Syrjälä 
Signed-off-by: Dhinakaran Pandiyan 
Reviewed-by: James Ausmus 
---
 drivers/gpu/drm/i915/intel_dp.c | 78 ++---
 1 file changed, 34 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index aa75f55eeb61..1701ee57ea4f 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4196,57 +4196,47 @@ static void intel_dp_handle_test_request(struct 
intel_dp *intel_dp)
 static int
 intel_dp_check_mst_status(struct intel_dp *intel_dp)
 {
-   bool bret;
+   u8 esi[DP_DPRX_ESI_LEN] = { 0 };
+   struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
 
-   if (intel_dp->is_mst) {
-   u8 esi[DP_DPRX_ESI_LEN] = { 0 };
-   int ret = 0;
-   int retry;
+   if (!intel_dp->is_mst)
+   return -EINVAL;
+
+   while (intel_dp_get_sink_irq_esi(intel_dp, esi)) {
+   int ret, retry;
bool handled;
-   bret = intel_dp_get_sink_irq_esi(intel_dp, esi);
-go_again:
-   if (bret == true) {
-
-   /* check link status - esi[10] = 0x200c */
-   if (intel_dp->active_mst_links &&
-   !drm_dp_channel_eq_ok([10], 
intel_dp->lane_count)) {
-   DRM_DEBUG_KMS("channel EQ not ok, 
retraining\n");
-   intel_dp_start_link_train(intel_dp);
-   intel_dp_stop_link_train(intel_dp);
-   }
 
-   DRM_DEBUG_KMS("got esi %3ph\n", esi);
-   ret = drm_dp_mst_hpd_irq(_dp->mst_mgr, esi, 
);
-
-   if (handled) {
-   for (retry = 0; retry < 3; retry++) {
-   int wret;
-   wret = drm_dp_dpcd_write(_dp->aux,
-
DP_SINK_COUNT_ESI+1,
-[1], 3);
-   if (wret == 3) {
-   break;
-   }
-   }
+   DRM_DEBUG_KMS("ESI %3ph\n", esi);
 
-   bret = intel_dp_get_sink_irq_esi(intel_dp, esi);
-   if (bret == true) {
-   DRM_DEBUG_KMS("got esi2 %3ph\n", esi);
-   goto go_again;
-   }
-   } else
-   ret = 0;
+   /* check link status - esi[10] = 0x200c */
+   if (intel_dp->active_mst_links &&
+   !drm_dp_channel_eq_ok([10], intel_dp->lane_count)) {
+   intel_dp_start_link_train(intel_dp);
+   intel_dp_stop_link_train(intel_dp);
+   }
 
-   return ret;
-   } else {
-   struct intel_digital_port *intel_dig_port = 
dp_to_dig_port(intel_dp);
-   DRM_DEBUG_KMS("failed to get ESI - device may have 
failed\n");
-   intel_dp->is_mst = false;
-   drm_dp_mst_topology_mgr_set_mst(_dp->mst_mgr, 
intel_dp->is_mst);
-   /* send a hotplug event */
-   
drm_kms_helper_hotplug_event(intel_dig_port->base.base.dev);
+   ret = drm_dp_mst_hpd_irq(_dp->mst_mgr, esi, );
+   if (!handled)
+   return 0;
+
+   if (ret)
+   DRM_DEBUG_KMS("error handling MST IRQ_HPD %d\n", ret);
+
+   for (retry = 0; retry < 3; retry++) {
+   int wret;
+
+   wret = drm_dp_dpcd_write(_dp->aux,
+DP_SINK_COUNT_ESI + 1, [1],
+3);
+   if (wret == 3)
+   break;
}
}
+
+   DRM_DEBUG_KMS("failed to get ESI - device may have failed\n");
+   intel_dp->is_mst = false;
+   drm_dp_mst_topology_mgr_set_mst(_dp->mst_mgr, intel_dp->is_mst);
+   

[Intel-gfx] ✗ Fi.CI.BAT: warning for i915/CNL/DMC: Update the DMC version on CNL

[Patchwork]

== Series Details ==

Series: i915/CNL/DMC: Update the DMC version on CNL
URL   : https://patchwork.freedesktop.org/series/31344/
State : warning

== Summary ==

Series 31344v1 i915/CNL/DMC: Update the DMC version on CNL
https://patchwork.freedesktop.org/api/1.0/series/31344/revisions/1/mbox/

Test chamelium:
Subgroup dp-crc-fast:
pass   -> FAIL   (fi-kbl-7500u) fdo#102514
Test drv_module_reload:
Subgroup basic-reload:
pass   -> DMESG-WARN (fi-bsw-n3050)

fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:446s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:447s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:370s
fi-bsw-n3050 total:289  pass:242  dwarn:1   dfail:0   fail:0   skip:46  
time:515s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:261s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:500s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:492s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:491s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:481s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:551s
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:611s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:416s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:248s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:576s
fi-glk-dsi   total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  
time:483s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:434s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:430s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:429s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:479s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:456s
fi-kbl-7500u total:289  pass:263  dwarn:1   dfail:0   fail:1   skip:24  
time:475s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:574s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:477s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:581s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:540s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:453s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:646s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:515s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:499s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:457s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:567s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:418s

4971297c57bdd02d8f64cddc9d44c9db6b3478b3 drm-tip: 2017y-10m-24d-17h-29m-57s UTC 
integration manifest
12fd3efa8478 i915/CNL/DMC: Update the DMC version on CNL

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6173/
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[Intel-gfx] [PATCH 1/2] drm/i915/selftests: Don't try to queue a request with zero delay

[Chris Wilson]

Instead of trying to create a timer with zero delay (i.e. with expires
set to the current jiffies and not the future, an already expired
timer), execute that request immediately.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/selftests/mock_engine.c | 22 +++---
 1 file changed, 15 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/selftests/mock_engine.c 
b/drivers/gpu/drm/i915/selftests/mock_engine.c
index 331c2b09869e..24ea1ef7efec 100644
--- a/drivers/gpu/drm/i915/selftests/mock_engine.c
+++ b/drivers/gpu/drm/i915/selftests/mock_engine.c
@@ -39,15 +39,16 @@ static void hw_delay_complete(struct timer_list *t)
 
spin_lock(>hw_lock);
 
-   request = first_request(engine);
-   if (request) {
+   while ((request = first_request(engine))) {
list_del_init(>link);
mock_seqno_advance(>base, request->base.global_seqno);
+   if (request->delay)
+   break;
}
-
-   request = first_request(engine);
-   if (request)
+   if (request) {
+   GEM_BUG_ON(!request->delay);
mod_timer(>hw_delay, jiffies + request->delay);
+   }
 
spin_unlock(>hw_lock);
 }
@@ -98,8 +99,15 @@ static void mock_submit_request(struct drm_i915_gem_request 
*request)
 
spin_lock_irq(>hw_lock);
list_add_tail(>link, >hw_queue);
-   if (mock->link.prev == >hw_queue)
-   mod_timer(>hw_delay, jiffies + mock->delay);
+   if (mock->link.prev == >hw_queue) {
+   if (mock->delay) {
+   mod_timer(>hw_delay, jiffies + mock->delay);
+   } else {
+   list_del_init(>link);
+   mock_seqno_advance(>base,
+  mock->base.global_seqno);
+   }
+   }
spin_unlock_irq(>hw_lock);
 }
 
-- 
2.15.0.rc2

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[Intel-gfx] [PATCH 2/2] drm/i915: Use same test for eviction and submitting kernel context

[Chris Wilson]

During evict, we wish to idle the GPU if we see that the GGTT is full.
However, our test for idle in i915_gem_evict_something() and in
i915_gem_switch_to_kernel_context() do not match leading to
disappointment - we never believe that we are idle and keep trying to
flush the GGTT ad infinitum.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103438
Signed-off-by: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Tvrtko Ursulin 
Cc: Mika Kuoppala 
---
 drivers/gpu/drm/i915/i915_gem_context.c | 7 +++
 drivers/gpu/drm/i915/i915_gem_evict.c   | 3 ++-
 drivers/gpu/drm/i915/intel_engine_cs.c  | 6 ++
 drivers/gpu/drm/i915/intel_ringbuffer.h | 2 ++
 4 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c 
b/drivers/gpu/drm/i915/i915_gem_context.c
index 5bf96a258509..4f26f80b1b3e 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -897,7 +897,7 @@ int i915_switch_context(struct drm_i915_gem_request *req)
return do_rcs_switch(req);
 }
 
-static bool engine_has_kernel_context(struct intel_engine_cs *engine)
+static bool engine_has_idle_kernel_context(struct intel_engine_cs *engine)
 {
struct i915_gem_timeline *timeline;
 
@@ -913,8 +913,7 @@ static bool engine_has_kernel_context(struct 
intel_engine_cs *engine)
return false;
}
 
-   return (!engine->last_retired_context ||
-   i915_gem_context_is_kernel(engine->last_retired_context));
+   return intel_engine_has_kernel_context(engine);
 }
 
 int i915_gem_switch_to_kernel_context(struct drm_i915_private *dev_priv)
@@ -931,7 +930,7 @@ int i915_gem_switch_to_kernel_context(struct 
drm_i915_private *dev_priv)
struct drm_i915_gem_request *req;
int ret;
 
-   if (engine_has_kernel_context(engine))
+   if (engine_has_idle_kernel_context(engine))
continue;
 
req = i915_gem_request_alloc(engine, dev_priv->kernel_context);
diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c 
b/drivers/gpu/drm/i915/i915_gem_evict.c
index a6b769994d8d..60ca4f05ae94 100644
--- a/drivers/gpu/drm/i915/i915_gem_evict.c
+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
@@ -46,7 +46,7 @@ static bool ggtt_is_idle(struct drm_i915_private *i915)
   return false;
 
for_each_engine(engine, i915, id) {
-  if (engine->last_retired_context != i915->kernel_context)
+  if (!intel_engine_has_kernel_context(engine))
   return false;
}
 
@@ -73,6 +73,7 @@ static int ggtt_flush(struct drm_i915_private *i915)
if (err)
return err;
 
+   GEM_BUG_ON(!ggtt_is_idle(i915));
return 0;
 }
 
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c 
b/drivers/gpu/drm/i915/intel_engine_cs.c
index ab5bf4e2e28e..f6cdc50d4237 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -1585,6 +1585,12 @@ bool intel_engines_are_idle(struct drm_i915_private 
*dev_priv)
return true;
 }
 
+bool intel_engine_has_kernel_context(const struct intel_engine_cs *engine)
+{
+   return (!engine->last_retired_context ||
+   i915_gem_context_is_kernel(engine->last_retired_context));
+}
+
 void intel_engines_reset_default_submission(struct drm_i915_private *i915)
 {
struct intel_engine_cs *engine;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h 
b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 6a42ed618a28..a2589aa89163 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -866,6 +866,8 @@ static inline u32 *gen8_emit_pipe_control(u32 *batch, u32 
flags, u32 offset)
 bool intel_engine_is_idle(struct intel_engine_cs *engine);
 bool intel_engines_are_idle(struct drm_i915_private *dev_priv);
 
+bool intel_engine_has_kernel_context(const struct intel_engine_cs *engine);
+
 void intel_engines_mark_idle(struct drm_i915_private *i915);
 void intel_engines_reset_default_submission(struct drm_i915_private *i915);
 
-- 
2.15.0.rc2

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[Intel-gfx] ✓ Fi.CI.IGT: success for igt/gem_exec_nop: Headless requires DRM_MASTER for modesetting (rev2)

[Patchwork]

== Series Details ==

Series: igt/gem_exec_nop: Headless requires DRM_MASTER for modesetting (rev2)
URL   : https://patchwork.freedesktop.org/series/29390/
State : success

== Summary ==

Test kms_busy:
Subgroup extended-modeset-hang-newfb-with-reset-render-C:
pass   -> DMESG-WARN (shard-hsw) fdo#102249 +1
Subgroup extended-modeset-hang-newfb-with-reset-render-B:
dmesg-warn -> PASS   (shard-hsw) fdo#103038
Test kms_flip:
Subgroup dpms-vs-vblank-race:
fail   -> PASS   (shard-hsw) fdo#103060

fdo#102249 https://bugs.freedesktop.org/show_bug.cgi?id=102249
fdo#103038 https://bugs.freedesktop.org/show_bug.cgi?id=103038
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060

shard-hswtotal:2540 pass:1434 dwarn:1   dfail:0   fail:8   skip:1097 
time:9197s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_412/shards.html
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Re: [Intel-gfx] [PATCH 10/10] drm/i915: Perform a central cdclk state sanity check

[Rodrigo Vivi]

On Tue, Oct 24, 2017 at 09:52:16AM +, Ville Syrjala wrote:
> From: Ville Syrjälä 
> 
> WARN if the cdclk state doesn't match what we expect after programming.
> And let's remove the WARN from bdw_set_cdclk() that's trying to achieve
> the same thing in a more limite fashion.
> 
> Also take the opportunity to refactor the code to use a common function
> for dumping out a cdclk state.
> 
> Cc: Mika Kahola 
> Cc: Manasi Navare 
> Cc: Rodrigo Vivi 
> Signed-off-by: Ville Syrjälä 

better code, better logs and right checks.

Reviewed-by: Rodrigo Vivi 

> ---
>  drivers/gpu/drm/i915/intel_cdclk.c   | 30 +++---
>  drivers/gpu/drm/i915/intel_display.c |  3 +++
>  drivers/gpu/drm/i915/intel_drv.h |  2 ++
>  3 files changed, 24 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c 
> b/drivers/gpu/drm/i915/intel_cdclk.c
> index fedfe3c720b6..51cd23dd8676 100644
> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> @@ -768,10 +768,6 @@ static void bdw_set_cdclk(struct drm_i915_private 
> *dev_priv,
>   I915_WRITE(CDCLK_FREQ, DIV_ROUND_CLOSEST(cdclk, 1000) - 1);
>  
>   intel_update_cdclk(dev_priv);
> -
> - WARN(cdclk != dev_priv->cdclk.hw.cdclk,
> -  "cdclk requested %d kHz but got %d kHz\n",
> -  cdclk, dev_priv->cdclk.hw.cdclk);
>  }
>  
>  static int skl_calc_cdclk(int min_cdclk, int vco)
> @@ -1068,6 +1064,8 @@ static void skl_sanitize_cdclk(struct drm_i915_private 
> *dev_priv)
>   goto sanitize;
>  
>   intel_update_cdclk(dev_priv);
> + intel_dump_cdclk_state(_priv->cdclk.hw, "Current CDCLK");
> +
>   /* Is PLL enabled and locked ? */
>   if (dev_priv->cdclk.hw.vco == 0 ||
>   dev_priv->cdclk.hw.cdclk == dev_priv->cdclk.hw.ref)
> @@ -1407,6 +1405,7 @@ static void bxt_sanitize_cdclk(struct drm_i915_private 
> *dev_priv)
>   u32 cdctl, expected;
>  
>   intel_update_cdclk(dev_priv);
> + intel_dump_cdclk_state(_priv->cdclk.hw, "Current CDCLK");
>  
>   if (dev_priv->cdclk.hw.vco == 0 ||
>   dev_priv->cdclk.hw.cdclk == dev_priv->cdclk.hw.ref)
> @@ -1713,6 +1712,7 @@ static void cnl_sanitize_cdclk(struct drm_i915_private 
> *dev_priv)
>   u32 cdctl, expected;
>  
>   intel_update_cdclk(dev_priv);
> + intel_dump_cdclk_state(_priv->cdclk.hw, "Current CDCLK");
>  
>   if (dev_priv->cdclk.hw.vco == 0 ||
>   dev_priv->cdclk.hw.cdclk == dev_priv->cdclk.hw.ref)
> @@ -1826,6 +1826,14 @@ bool intel_cdclk_changed(const struct 
> intel_cdclk_state *a,
>   a->voltage_level != b->voltage_level;
>  }
>  
> +void intel_dump_cdclk_state(const struct intel_cdclk_state *cdclk_state,
> + const char *context)
> +{
> + DRM_DEBUG_DRIVER("%s %d kHz, VCO %d kHz, ref %d kHz, voltage level 
> %d\n",
> +  context, cdclk_state->cdclk, cdclk_state->vco,
> +  cdclk_state->ref, cdclk_state->voltage_level);
> +}
> +
>  /**
>   * intel_set_cdclk - Push the CDCLK state to the hardware
>   * @dev_priv: i915 device
> @@ -1843,11 +1851,15 @@ void intel_set_cdclk(struct drm_i915_private 
> *dev_priv,
>   if (WARN_ON_ONCE(!dev_priv->display.set_cdclk))
>   return;
>  
> - DRM_DEBUG_DRIVER("Changing CDCLK to %d kHz, VCO %d kHz, ref %d kHz, 
> voltage_level %d\n",
> -  cdclk_state->cdclk, cdclk_state->vco,
> -  cdclk_state->ref, cdclk_state->voltage_level);
> + intel_dump_cdclk_state(cdclk_state, "Changing CDCLK to");
>  
>   dev_priv->display.set_cdclk(dev_priv, cdclk_state);
> +
> + if (WARN(intel_cdclk_changed(_priv->cdclk.hw, cdclk_state),
> +  "cdclk state doesn't match!\n")) {
> + intel_dump_cdclk_state(_priv->cdclk.hw, "[hw state]");
> + intel_dump_cdclk_state(cdclk_state, "[sw state]");
> + }
>  }
>  
>  static int intel_pixel_rate_to_cdclk(struct drm_i915_private *dev_priv,
> @@ -2280,10 +2292,6 @@ void intel_update_cdclk(struct drm_i915_private 
> *dev_priv)
>  {
>   dev_priv->display.get_cdclk(dev_priv, _priv->cdclk.hw);
>  
> - DRM_DEBUG_DRIVER("Current CD clock rate: %d kHz, VCO: %d kHz, ref: %d 
> kHz\n",
> -  dev_priv->cdclk.hw.cdclk, dev_priv->cdclk.hw.vco,
> -  dev_priv->cdclk.hw.ref);
> -
>   /*
>* 9:0 CMBUS [sic] CDCLK frequency (cdfreq):
>* Programmng [sic] note: bit[9:2] should be programmed to the number
> diff --git a/drivers/gpu/drm/i915/intel_display.c 
> b/drivers/gpu/drm/i915/intel_display.c
> index b5fa643e1812..7d7952b78a3b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -8857,7 +8857,9 @@ static void hsw_restore_lcpll(struct drm_i915_private 
> *dev_priv)
> 

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: CNL DVFS thing (rev7)

[Patchwork]

== Series Details ==

Series: drm/i915: CNL DVFS thing (rev7)
URL   : https://patchwork.freedesktop.org/series/32247/
State : success

== Summary ==

Test kms_busy:
Subgroup extended-modeset-hang-newfb-with-reset-render-A:
dmesg-warn -> PASS   (shard-hsw) fdo#102249 +2
Subgroup extended-modeset-hang-newfb-with-reset-render-B:
dmesg-warn -> PASS   (shard-hsw) fdo#103038
Test kms_setmode:
Subgroup basic:
pass   -> FAIL   (shard-hsw) fdo#99912
Test kms_flip:
Subgroup dpms-vs-vblank-race:
fail   -> PASS   (shard-hsw) fdo#103060
Subgroup flip-vs-expired-vblank-interruptible:
pass   -> FAIL   (shard-hsw) fdo#102887
Test drv_module_reload:
Subgroup basic-no-display:
pass   -> DMESG-WARN (shard-hsw) fdo#102707

fdo#102249 https://bugs.freedesktop.org/show_bug.cgi?id=102249
fdo#103038 https://bugs.freedesktop.org/show_bug.cgi?id=103038
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707

shard-hswtotal:2540 pass:1430 dwarn:3   dfail:0   fail:10  skip:1097 
time:9212s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6171/shards.html
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[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Call cond_resched() before repeating i915_gem_evict_something()

[Patchwork]

== Series Details ==

Series: drm/i915: Call cond_resched() before repeating 
i915_gem_evict_something()
URL   : https://patchwork.freedesktop.org/series/32576/
State : warning

== Summary ==

Series 32576v1 drm/i915: Call cond_resched() before repeating 
i915_gem_evict_something()
https://patchwork.freedesktop.org/api/1.0/series/32576/revisions/1/mbox/

Test kms_pipe_crc_basic:
Subgroup read-crc-pipe-a:
pass   -> SKIP   (fi-hsw-4770r)

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:438s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:460s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:370s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:514s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:263s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:498s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:495s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:489s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:477s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:544s
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:595s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:420s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:257s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:570s
fi-glk-dsi   total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  
time:494s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:427s
fi-hsw-4770r total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:430s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:438s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:480s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:462s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:498s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:575s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:474s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:587s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:549s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:448s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:654s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:515s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:503s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:460s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:571s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:415s

4971297c57bdd02d8f64cddc9d44c9db6b3478b3 drm-tip: 2017y-10m-24d-17h-29m-57s UTC 
integration manifest
9c838fb5b99a drm/i915: Call cond_resched() before repeating 
i915_gem_evict_something()

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6172/
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Re: [Intel-gfx] [PATCH] drm/i915/cnl: Update the DMC version on CNL

[Rodrigo Vivi]

On Tue, Oct 03, 2017 at 06:17:50PM +, Rodrigo Vivi wrote:
> On Tue, Oct 03, 2017 at 05:59:48PM +, Anusha Srivatsa wrote:
> > The latest version of DMC on CNL is 1.06.
> > Update the version so as to load the
> > latest firmware.
> > 
> > Release Notes:
> > Version: 1.06
> > 1. DDI and AUX IO related fix.
> > 
> > v2: Improve the prefixes in commit message.
> > Add Release Notes directly. (Rodrigo)
> > 
> > Cc: Rodrigo Vivi 
> > Signed-off-by: Anusha Srivatsa 
> 
> Reviewed-by: Rodrigo Vivi 

Since it got released and propagated to linux-firmware.git
I merged this patch on dinq.

Once this and glk's one land to linux-firmware.git we
need to add MODULE_FIRMWARE() for both.

> 
> > ---
> >  drivers/gpu/drm/i915/intel_csr.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_csr.c 
> > b/drivers/gpu/drm/i915/intel_csr.c
> > index cdfb624..f417101 100644
> > --- a/drivers/gpu/drm/i915/intel_csr.c
> > +++ b/drivers/gpu/drm/i915/intel_csr.c
> > @@ -37,8 +37,8 @@
> >  #define I915_CSR_GLK "i915/glk_dmc_ver1_04.bin"
> >  #define GLK_CSR_VERSION_REQUIRED   CSR_VERSION(1, 4)
> >  
> > -#define I915_CSR_CNL "i915/cnl_dmc_ver1_04.bin"
> > -#define CNL_CSR_VERSION_REQUIRED   CSR_VERSION(1, 4)
> > +#define I915_CSR_CNL "i915/cnl_dmc_ver1_06.bin"
> > +#define CNL_CSR_VERSION_REQUIRED   CSR_VERSION(1, 6)
> >  
> >  #define I915_CSR_KBL "i915/kbl_dmc_ver1_01.bin"
> >  MODULE_FIRMWARE(I915_CSR_KBL);
> > -- 
> > 2.7.4
> > 
> ___
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[Intel-gfx] [PATCH] drm/i915: Call cond_resched() before repeating i915_gem_evict_something()

[Chris Wilson]

Insert a breakpoint, a chance to escape back to the scheduler and run
something else for a bit, if we find that the GGTT is full and needs to
be idled in order to make some room. In practice, this should only be an
issue in stress tests as the wait itself will normally give the chance
for the scheduler to intervene and make progress.

References: https://bugs.freedesktop.org/show_bug.cgi?id=103438
Signed-off-by: Chris Wilson 
Cc: Joonas Lahtinen 
---
 drivers/gpu/drm/i915/i915_gem_evict.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c 
b/drivers/gpu/drm/i915/i915_gem_evict.c
index 8daa8a78cdc0..a6b769994d8d 100644
--- a/drivers/gpu/drm/i915/i915_gem_evict.c
+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
@@ -216,6 +216,7 @@ i915_gem_evict_something(struct i915_address_space *vm,
if (ret)
return ret;
 
+   cond_resched();
goto search_again;
}
 
-- 
2.15.0.rc2

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[Intel-gfx] ✗ Fi.CI.BAT: failure for igt/gem_ctx_isolation: Check isolation of registers between contexts (rev4)

[Patchwork]

== Series Details ==

Series: igt/gem_ctx_isolation: Check isolation of registers between contexts 
(rev4)
URL   : https://patchwork.freedesktop.org/series/32531/
State : failure

== Summary ==

IGT patchset build failed on latest successful build
45a253e34b063426d18cdf02319eb6f6bc238e6b igt/prime_mmap_coherency: Remove 
manual gem_sync() calls

The Meson build system
Version: 0.40.1
Source dir: /home/cidrm/intel-gpu-tools
Build dir: /home/cidrm/intel-gpu-tools/build
Build type: native build
Project name: IGT gpu tests
Native c compiler: ccache cc (gcc 6.3.0)
Build machine cpu family: x86_64
Build machine cpu: x86_64
Compiler for c supports argument -Wno-unused-parameter: YES
Compiler for c supports argument -Wno-sign-compare: YES
Compiler for c supports argument -Wno-missing-field-initializers: YES
Compiler for c supports argument -Wno-clobbered: YES
Compiler for c supports argument -Wno-type-limits: YES
Compiler for c supports argument -Wimplicit-fallthrough=0: NO
Found pkg-config: /usr/bin/pkg-config (0.29.1)
Native dependency libdrm found: YES 2.4.85
Native dependency libdrm_intel found: YES 2.4.85
Dependency libdrm_vc4 found: NO
Dependency libdrm_nouveau found: NO
Dependency libdrm_amdgpu found: NO
Native dependency pciaccess found: YES 0.13.4
Native dependency libkmod found: YES 22
Native dependency libprocps found: YES 3.3.12
Native dependency cairo found: YES 1.14.8
Native dependency libudev found: YES 232
Native dependency glib-2.0 found: YES 2.52.0
Native dependency libunwind found: YES 1.1
Native dependency gsl found: YES 2.3
Dependency alsa found: NO
Native dependency pixman-1 found: YES 0.34.0
Dependency xmlrpc found: NO
Dependency xmlrpc_util found: NO
Dependency xmlrpc_client found: NO
Program xmlrpc-c-config found: YES (/usr/bin/xmlrpc-c-config)
Dependency threads found: YES
Library m found: YES
Library rt found: YES
Library dl found: YES
Library z found: YES
Has header "linux/kd.h": YES
Has header "sys/kd.h": YES
Has header "libgen.h": YES
Has header "sys/io.h": YES
Has header "cpuid.h": YES
Checking whether type "struct sysinfo" has member "totalram": YES
Configuring config.h using configuration
Program generate_testlist.sh found: YES 
(/home/cidrm/intel-gpu-tools/tests/generate_testlist.sh)
Program igt_command_line.sh found: YES 
(/home/cidrm/intel-gpu-tools/tests/igt_command_line.sh)
Configuring intel_aubdump using configuration
Program flex found: YES (/usr/bin/flex)
Program bison found: YES (/usr/bin/bison)
Configuring intel-gen4asm.pc using configuration
Program test/run-test.sh found: YES (/bin/sh 
/home/cidrm/intel-gpu-tools/assembler/test/run-test.sh)
Native dependency xv found: YES 1.0.11
Native dependency x11 found: YES 1.6.4
Native dependency xext found: YES 1.3.3
Native dependency dri2proto found: YES 2.8
Native dependency cairo-xlib found: YES 1.14.8
Dependency xrandr found: NO
Configuring defs.rst using configuration
Program rst2man found: YES (/usr/bin/rst2man)
Program rst2man.sh found: YES (/home/cidrm/intel-gpu-tools/man/rst2man.sh)
Build targets in project: 369
ninja: Entering directory `build'
[1/743] Compiling c object 
'lib/tests/igt_simple_test_subtests@exe/igt_simple_test_subtests.c.o'
[2/743] Compiling c object 'tests/core_auth@exe/core_auth.c.o'
[3/743] Compiling c object 'lib/igt@sha/dummy.c.o'
[4/743] Compiling c object 'lib/tests/igt_simulation@exe/igt_simulation.c.o'
[5/743] Compiling c object 'lib/tests/igt_list_only@exe/igt_list_only.c.o'
[6/743] Compiling c object 'lib/tests/igt_fork_helper@exe/igt_fork_helper.c.o'
[7/743] Compiling c object 'lib/tests/igt_hdmi_inject@exe/igt_hdmi_inject.c.o'
[8/743] Compiling c object 'lib/tests/igt_exit_handler@exe/igt_exit_handler.c.o'
[9/743] Compiling c object 'lib/tests/igt_stats@exe/igt_stats.c.o'
[10/743] Compiling c object 'lib/tests/igt_segfault@exe/igt_segfault.c.o'
[11/743] Compiling c object 
'lib/tests/igt_subtest_group@exe/igt_subtest_group.c.o'
[12/743] Compiling c object 'lib/tests/igt_assert@exe/igt_assert.c.o'
[13/743] Compiling c object 'lib/tests/igt_can_fail@exe/igt_can_fail.c.o'
[14/743] Compiling c object 
'lib/tests/igt_can_fail_simple@exe/igt_can_fail_simple.c.o'
[15/743] Compiling c object 'lib/tests/igt_no_exit@exe/igt_no_exit.c.o'
[16/743] Compiling c object 
'lib/tests/igt_no_exit_list_only@exe/igt_no_exit_list_only.c.o'
[17/743] Compiling c object 'lib/tests/igt_no_subtest@exe/igt_no_subtest.c.o'
[18/743] Compiling c object 
'lib/tests/igt_invalid_subtest_name@exe/igt_invalid_subtest_name.c.o'
[19/743] Compiling c object 'lib/tests/igt_timeout@exe/igt_timeout.c.o'
[20/743] Compiling c object 
'tests/core_get_client_auth@exe/core_get_client_auth.c.o'
[21/743] Compiling c object 
'tests/gem_fenced_exec_thrash@exe/gem_fenced_exec_thrash.c.o'
[22/743] Compiling c object 'tests/gem_fence_upload@exe/gem_fence_upload.c.o'
[23/743] Compiling c object 'tests/core_getversion@exe/core_getversion.c.o'
[24/743] Compiling c object 'tests/core_getstats@exe/core_getstats.c.o'
[25/743] Compiling c object 

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] lib/i915: Add a query for when the guc is enabled.

[Patchwork]

== Series Details ==

Series: series starting with [1/2] lib/i915: Add a query for when the guc is 
enabled.
URL   : https://patchwork.freedesktop.org/series/32554/
State : failure

== Summary ==

Series 32554 revision 1 was fully merged or fully failed: no git log

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_409/
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Re: [Intel-gfx] [PATCH v2 1/1] drm/i915: Save PM interrupt register offsets in device info

[Tvrtko Ursulin]

On 24/10/17 18:48, Jani Nikula wrote:

On Tue, 24 Oct 2017, Chris Wilson  wrote:

Quoting Sagar Arun Kamble (2017-10-24 11:41:13)

diff --git a/drivers/gpu/drm/i915/intel_device_info.c 
b/drivers/gpu/drm/i915/intel_device_info.c
index 875d428..d1a4911 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -462,4 +462,15 @@ void intel_device_info_runtime_init(struct 
drm_i915_private *dev_priv)
  info->sseu.has_subslice_pg ? "y" : "n");
 DRM_DEBUG_DRIVER("has EU power gating: %s\n",
  info->sseu.has_eu_pg ? "y" : "n");
+
+   /* Initialize PM interrupt register offsets */
+   if (INTEL_GEN(dev_priv) >= 8) {
+   info->pm_iir_offset = GEN8_GT_IIR(2);
+   info->pm_imr_offset = GEN8_GT_IMR(2);
+   info->pm_ier_offset = GEN8_GT_IER(2);
+   } else {
+   info->pm_iir_offset = GEN6_PMIIR;
+   info->pm_imr_offset = GEN6_PMIMR;
+   info->pm_ier_offset = GEN6_PMIER;
+   }


If you are going to take another pass at this, move these into the
static tables in i915_pci.c

Updating GEN6_FEATURES and GEN8_FEATURES will then percolate into
individual platform defines.


Like I wrote in reply to v1, I'm not convinced we should do this at all.

What makes *these* registers so important they must be in device info?
What makes most of i915_reg.h so unimportant they don't deserve the same
treatment? Where do you draw the line?

I'd draw the line at, no registers at device info.


I suggested to Sagar this change during review so feel responsible to 
chime in.


So in general I just find the amount of times our driver asks itself 
what it's running on a bit tasteless. :(


I did quick and dirty check by bumping a counter in all the 
IS_this|or|that checks, all which can be known at driver probe time, and 
wired it up to the PMU so I can check their frequency. The annotated 
perf stat output:


root@e31:~# perf stat -a -e i915/whoami/ -I 1000
#   time counts unit events

# idle system no X running

 1.000298100 10  i915/whoami/ 

 2.000750955  8  i915/whoami/ 

 3.001104193 10  i915/whoami/ 

 4.001333433 10  i915/whoami/ 

 5.001703162 10  i915/whoami/ 

 6.002122721 10  i915/whoami/ 



# starting X now..

 7.002266228  2,203  i915/whoami/ 

 8.002392598  4,682  i915/whoami/ 

 9.002764398  0  i915/whoami/ 

10.003027119  0  i915/whoami/ 

11.003486048 42  i915/whoami/ 



# X idling..

12.003854660  0  i915/whoami/ 

13.004221680  0  i915/whoami/ 

14.004622571  0  i915/whoami/ 

15.004968110  0  i915/whoami/ 

16.005372363  0  i915/whoami/ 

17.005778034  0  i915/whoami/ 

18.005941970  0  i915/whoami/ 

19.006313427  0  i915/whoami/ 

20.006676048  0  i915/whoami/ 

21.007059927  0  i915/whoami/ 

22.007507818  0  i915/whoami/ 

23.007887628  0  i915/whoami/ 

24.008207035  0  i915/whoami/ 

25.008580496  0  i915/whoami/ 


#   time counts unit events
26.008949236  0  i915/whoami/ 

27.009433473  0  i915/whoami/ 



# gfxbench trex starting up

28.009677600  2,605  i915/whoami/ 

29.009941972716  i915/whoami/ 

30.010127588  2,190  i915/whoami/ 

31.010249535 46  i915/whoami/ 

32.010383565 36  i915/whoami/ 

33.010527674  0  i915/whoami/ 



# trex running

34.010760584  4,709  i915/whoami/ 

35.011079891  5,381  i915/whoami/ 

36.011280234  5,306  i915/whoami/ 

37.011719986  5,505  i915/whoami/ 

38.012017531  5,386  i915/whoami/ 

39.012529241  5,687  i915/whoami/ 

40.012922986  6,009  i915/whoami/ 

41.013120143  5,791  i915/whoami/ 

42.013399982  5,296  i915/whoami/ 

43.013712979  5,349  i915/whoami/ 

44.014107375  5,127  i915/whoami/ 

45.014553950  5,387  i915/whoami/ 

46.014953020  5,364  i915/whoami/ 

47.015243748  4,738  i915/whoami/ 

48.015560460  4,788  i915/whoami/ 

49.015867395

[Intel-gfx] ✓ Fi.CI.BAT: success for igt/gem_exec_nop: Headless requires DRM_MASTER for modesetting (rev2)

[Patchwork]

== Series Details ==

Series: igt/gem_exec_nop: Headless requires DRM_MASTER for modesetting (rev2)
URL   : https://patchwork.freedesktop.org/series/29390/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
3a52d8c244053cac74839e1cdbea58ebaa5fe470 igt/drv_misssed_irq: Skip on guc

with latest DRM-Tip kernel build CI_DRM_3278
4971297c57bd drm-tip: 2017y-10m-24d-17h-29m-57s UTC integration manifest

No testlist changes.

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:441s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:458s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:373s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:538s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:266s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:503s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:503s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:498s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:479s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:562s
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:615s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:417s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:247s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:582s
fi-glk-dsi   total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  
time:487s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:431s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:430s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:436s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:494s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:483s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:492s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:583s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:475s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:579s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:548s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:449s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:646s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:525s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:498s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:454s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:562s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:418s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_412/
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[Intel-gfx] [PATCH igt v2] igt/gem_ctx_isolation: Check isolation of registers between contexts

[Chris Wilson]

A new context assumes that all of its registers are in the default state
when it is created. What may happen is that a register written by one
context may leak into the second, causing mass confusion.

Signed-off-by: Chris Wilson 
---
 tests/Makefile.sources|   1 +
 tests/gem_ctx_isolation.c | 631 ++
 2 files changed, 632 insertions(+)
 create mode 100644 tests/gem_ctx_isolation.c

diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 2313c12b..9a25a8b5 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -56,6 +56,7 @@ TESTS_progs = \
gem_ctx_basic \
gem_ctx_create \
gem_ctx_exec \
+   gem_ctx_isolation \
gem_ctx_param \
gem_ctx_switch \
gem_ctx_thrash \
diff --git a/tests/gem_ctx_isolation.c b/tests/gem_ctx_isolation.c
new file mode 100644
index ..3c13f1b8
--- /dev/null
+++ b/tests/gem_ctx_isolation.c
@@ -0,0 +1,631 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "igt.h"
+#include "igt_dummyload.h"
+
+#define MAX_REG 0x4
+#define NUM_REGS (MAX_REG / sizeof(uint32_t))
+
+#define PAGE_ALIGN(x) ALIGN(x, 4096)
+
+#define DIRTY 0x1
+#define UNSAFE 0x2
+
+enum {
+   RCS_MASK = 0x1,
+   BCS_MASK = 0x2,
+   VCS_MASK = 0x4,
+   VECS_MASK = 0x8,
+};
+
+#define ALL ~0u
+#define GEN_RANGE(x, y) ((ALL >> (32 - (y - x + 1))) << x)
+
+#define LAST_KNOWN_GEN 10
+
+static const struct named_register {
+   const char *name;
+   unsigned int gen_mask;
+   unsigned int engine_mask;
+   uint32_t offset;
+   uint32_t count;
+} safe_registers[] = {
+   { "NOPID", ALL, RCS_MASK, 0x2094 },
+   { "MI_PREDICATE_RESULT_2", ALL, RCS_MASK, 0x23bc },
+   { "INSTPM", ALL, RCS_MASK, 0x20c0 },
+   { "IA_VERTICES_COUNT", ALL, RCS_MASK, 0x2310, 2 },
+   { "IA_PRIMITIVES_COUNT", ALL, RCS_MASK, 0x2318, 2 },
+   { "VS_INVOCATION_COUNT", ALL, RCS_MASK, 0x2320, 2 },
+   { "HS_INVOCATION_COUNT", ALL, RCS_MASK, 0x2300, 2 },
+   { "DS_INVOCATION_COUNT", ALL, RCS_MASK, 0x2308, 2 },
+   { "GS_INVOCATION_COUNT", ALL, RCS_MASK, 0x2328, 2 },
+   { "GS_PRIMITIVES_COUNT", ALL, RCS_MASK, 0x2330, 2 },
+   { "CL_INVOCATION_COUNT", ALL, RCS_MASK, 0x2338, 2 },
+   { "CL_PRIMITIVES_COUNT", ALL, RCS_MASK, 0x2340, 2 },
+   { "PS_INVOCATION_COUNT_0", ALL, RCS_MASK, 0x22c8, 2 },
+   { "PS_DEPTH_COUNT_0", ALL, RCS_MASK, 0x22d8, 2 },
+   { "GPUGPU_DISPATCHDIMX", ALL, RCS_MASK, 0x2500 },
+   { "GPUGPU_DISPATCHDIMY", ALL, RCS_MASK, 0x2504 },
+   { "GPUGPU_DISPATCHDIMZ", ALL, RCS_MASK, 0x2508 },
+   { "MI_PREDICATE_SRC0", ALL, RCS_MASK, 0x2400, 2 },
+   { "MI_PREDICATE_SRC1", ALL, RCS_MASK, 0x2408, 2 },
+   { "MI_PREDICATE_DATA", ALL, RCS_MASK, 0x2410, 2 },
+   { "MI_PRED_RESULT", ALL, RCS_MASK, 0x2418 },
+   { "3DPRIM_END_OFFSET", ALL, RCS_MASK, 0x2420 },
+   { "3DPRIM_START_VERTEX", ALL, RCS_MASK, 0x2430 },
+   { "3DPRIM_VERTEX_COUNT", ALL, RCS_MASK, 0x2434 },
+   { "3DPRIM_INSTANCE_COUNT", ALL, RCS_MASK, 0x2438 },
+   { "3DPRIM_START_INSTANCE", ALL, RCS_MASK, 0x243c },
+   { "3DPRIM_BASE_VERTEX", ALL, RCS_MASK, 0x2440 },
+   { "GPGPU_THREADS_DISPATCHED", ALL, RCS_MASK, 0x2290, 2 },
+   { "PS_INVOCATION_COUNT_1", ALL, RCS_MASK, 0x22f0, 2 },
+   { "PS_DEPTH_COUNT_1", ALL, RCS_MASK, 0x22f8, 2 },
+   { "BB_OFFSET", ALL, RCS_MASK, 0x2158 },
+   { "MI_PREDICATE_RESULT_1", ALL, RCS_MASK, 0x241c },
+   { "CS_GPR", ALL, RCS_MASK, 0x2600, 32 },
+   { "OA_CTX_CONTROL", ALL, RCS_MASK, 0x2360 },
+   { "OACTXID", ALL, RCS_MASK, 0x2364 },
+   { "PS_INVOCATION_COUNT_2", ALL, RCS_MASK, 0x2448, 2 },
+   { "PS_DEPTH_COUNT_2", ALL, RCS_MASK, 0x2450, 2 },
+   { "Cache_Mode_0", ALL, RCS_MASK, 0x7000 },
+   { 

[Intel-gfx] ✓ Fi.CI.IGT: success for igt/prime_mmap_coherency: Remove manual gem_sync() calls (rev3)

[Patchwork]

== Series Details ==

Series: igt/prime_mmap_coherency: Remove manual gem_sync() calls (rev3)
URL   : https://patchwork.freedesktop.org/series/32272/
State : success

== Summary ==

Test kms_flip:
Subgroup plain-flip-fb-recreate-interruptible:
fail   -> PASS   (shard-hsw) fdo#100368
Subgroup modeset-vs-vblank-race-interruptible:
fail   -> PASS   (shard-hsw) fdo#103060
Test drv_module_reload:
Subgroup basic-no-display:
dmesg-warn -> PASS   (shard-hsw) fdo#102707
Test kms_cursor_legacy:
Subgroup flip-vs-cursor-legacy:
fail   -> PASS   (shard-hsw) fdo#102670
Test kms_setmode:
Subgroup basic:
fail   -> PASS   (shard-hsw) fdo#99912

fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#102670 https://bugs.freedesktop.org/show_bug.cgi?id=102670
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912

shard-hswtotal:2540 pass:1434 dwarn:1   dfail:0   fail:8   skip:1097 
time:9276s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_411/shards.html
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: CNL DVFS thing (rev7)

[Patchwork]

== Series Details ==

Series: drm/i915: CNL DVFS thing (rev7)
URL   : https://patchwork.freedesktop.org/series/32247/
State : success

== Summary ==

Series 32247v7 drm/i915: CNL DVFS thing
https://patchwork.freedesktop.org/api/1.0/series/32247/revisions/7/mbox/

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:441s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:371s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:525s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:262s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:496s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:497s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:492s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:473s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:545s
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:595s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:406s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:247s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:578s
fi-glk-dsi   total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  
time:489s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:429s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:426s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:428s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:492s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:456s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:492s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:572s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:468s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:582s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:557s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:450s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:643s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:519s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:494s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:453s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:558s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:423s
fi-bdw-gvtdvm failed to connect after reboot

4971297c57bdd02d8f64cddc9d44c9db6b3478b3 drm-tip: 2017y-10m-24d-17h-29m-57s UTC 
integration manifest
6a8a266dec20 drm/i915: Perform a central cdclk state sanity check
4454cb468b48 drm/i915: Sanity check cdclk in vlv_set_cdclk()
47ba882711ee drm/i915: Adjust system agent voltage on CNL if required by DDI 
ports
6c2a7a6e4a9b drm/i915: Use cdclk_state->voltage on CNL
6c21d2efb5e2 drm/i915: Use cdclk_state->voltage on BXT/GLK
c7372e650ad6 drm/i915: Use cdclk_state->voltage on SKL/KBL/CFL
6013e43d0158 drm/i915: Use cdclk_state->voltage on BDW
ff7c375d3eb6 drm/i915: Use cdclk_state->voltage on VLV/CHV
59694b6d8bbc drm/i915: Start tracking voltage level in the cdclk state
27a1c98e8261 drm/i915: Clean up some cdclk switch statements

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6171/
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[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Add -Wall -Wextra to our build, set warnings to full (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915: Add -Wall -Wextra to our build, set warnings to full (rev3)
URL   : https://patchwork.freedesktop.org/series/32033/
State : warning

== Summary ==

Test kms_draw_crc:
Subgroup draw-method-xrgb-mmap-cpu-untiled:
pass   -> SKIP   (shard-hsw)
Test kms_cursor_crc:
Subgroup cursor-256x85-onscreen:
pass   -> SKIP   (shard-hsw)
Test kms_chv_cursor_fail:
Subgroup pipe-B-64x64-bottom-edge:
pass   -> SKIP   (shard-hsw)
Subgroup pipe-C-64x64-left-edge:
pass   -> SKIP   (shard-hsw)
Test pm_rpm:
Subgroup modeset-non-lpsp:
pass   -> SKIP   (shard-hsw)
Test kms_busy:
Subgroup extended-modeset-hang-newfb-with-reset-render-B:
pass   -> DMESG-WARN (shard-hsw) fdo#103038
Test kms_flip:
Subgroup modeset-vs-vblank-race-interruptible:
fail   -> PASS   (shard-hsw) fdo#103060
Test kms_cursor_legacy:
Subgroup flip-vs-cursor-legacy:
fail   -> PASS   (shard-hsw) fdo#102670

fdo#103038 https://bugs.freedesktop.org/show_bug.cgi?id=103038
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#102670 https://bugs.freedesktop.org/show_bug.cgi?id=102670

shard-hswtotal:2540 pass:1425 dwarn:3   dfail:0   fail:10  skip:1102 
time:9224s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6170/shards.html
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[Intel-gfx] ✓ Fi.CI.BAT: success for igt/prime_mmap_coherency: Remove manual gem_sync() calls (rev3)

[Patchwork]

== Series Details ==

Series: igt/prime_mmap_coherency: Remove manual gem_sync() calls (rev3)
URL   : https://patchwork.freedesktop.org/series/32272/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
cf6b5a4221e3e8d14dd39011a746e5be909e5928 lib/igt_kms: Only print changed mode 
objects during atomic commit.

with latest DRM-Tip kernel build CI_DRM_3277
bcee836068d9 drm-tip: 2017y-10m-24d-15h-00m-14s UTC integration manifest

No testlist changes.

Test chamelium:
Subgroup dp-crc-fast:
pass   -> FAIL   (fi-kbl-7500u) fdo#102514
Test gem_exec_reloc:
Subgroup basic-gtt-active:
dmesg-warn -> PASS   (fi-gdg-551) fdo#102582 +5
Subgroup basic-write-cpu-active:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-write-gtt-active:
skip   -> PASS   (fi-gdg-551) fdo#102582
Subgroup basic-softpin:
skip   -> PASS   (fi-gdg-551)
Test gem_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_sync:
Subgroup basic-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-many-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-store-each:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_fence_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_wait:
Subgroup basic-busy-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-wait-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-await-all:
skip   -> PASS   (fi-gdg-551)
Test kms_busy:
Subgroup basic-flip-a:
skip   -> PASS   (fi-gdg-551) fdo#102654 +1
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
skip   -> PASS   (fi-gdg-551) fdo#102618

fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514
fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:440s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:450s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:374s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:527s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:264s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:498s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:498s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:501s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:482s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:557s
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:600s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:420s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:252s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:583s
fi-glk-dsi   total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  
time:488s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:429s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:431s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:434s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:493s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:465s
fi-kbl-7500u total:289  pass:263  dwarn:1   dfail:0   fail:1   skip:24  
time:479s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:578s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:474s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:584s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:547s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  

Re: [Intel-gfx] [PATCH] drm/i915/gvt: Use common error handling code in shadow_workload_ring_buffer()

[Wang, Zhi A]

Thanks for the patch! Actually I would prefer that we can have different error 
messages here. E.g. like copy_gma_to_hva fail in which part of ring buffer. Or 
we can directly remove the error message since usually if it fails it means a 
bug of MPT module when GVT-g is accessing the guest memory by Xen/KVM functions 
and it shouldn’t happen unless MPT modules has a bug, :( so I wish the error 
message can be reported in MPT module. :)

Thanks for the patch.  :)

Thanks,
Zhi.

-Original Message-
From: SF Markus Elfring [mailto:elfr...@users.sourceforge.net] 
Sent: Tuesday, October 24, 2017 3:26 PM
To: dri-de...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; 
intel-gvt-...@lists.freedesktop.org; David Airlie ; Jani 
Nikula ; Joonas Lahtinen 
; Vivi, Rodrigo ; 
Zhenyu Wang ; Wang, Zhi A 
Cc: LKML ; kernel-janit...@vger.kernel.org
Subject: [PATCH] drm/i915/gvt: Use common error handling code in 
shadow_workload_ring_buffer()

From: Markus Elfring 
Date: Tue, 24 Oct 2017 14:20:06 +0200

Add a jump target so that a call of the function "gvt_vgpu_err" is stored only 
once at the end of this function implementation.
Replace two calls by goto statements.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring 
---
 drivers/gpu/drm/i915/gvt/cmd_parser.c | 18 ++
 1 file changed, 10 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c 
b/drivers/gpu/drm/i915/gvt/cmd_parser.c
index 2c0ccbb817dc..caa181380958 100644
--- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
+++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
@@ -2640,10 +2640,9 @@ static int shadow_workload_ring_buffer(struct 
intel_vgpu_workload *workload)
if (gma_head > gma_tail) {
ret = copy_gma_to_hva(vgpu, vgpu->gtt.ggtt_mm,
  gma_head, gma_top, shadow_ring_buffer_va);
-   if (ret < 0) {
-   gvt_vgpu_err("fail to copy guest ring buffer\n");
-   return ret;
-   }
+   if (ret < 0)
+   goto report_failure;
+
shadow_ring_buffer_va += ret;
gma_head = workload->rb_start;
}
@@ -2651,11 +2650,14 @@ static int shadow_workload_ring_buffer(struct 
intel_vgpu_workload *workload)
/* copy head or start <-> tail */
ret = copy_gma_to_hva(vgpu, vgpu->gtt.ggtt_mm, gma_head, gma_tail,
shadow_ring_buffer_va);
-   if (ret < 0) {
-   gvt_vgpu_err("fail to copy guest ring buffer\n");
-   return ret;
-   }
+   if (ret < 0)
+   goto report_failure;
+
return 0;
+
+report_failure:
+   gvt_vgpu_err("fail to copy guest ring buffer\n");
+   return ret;
 }
 
 int intel_gvt_scan_and_shadow_ringbuffer(struct intel_vgpu_workload *workload)
--
2.14.3

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Re: [Intel-gfx] [PATCH igt 1/2] lib/i915: Add a query for when the guc is enabled.

[Chris Wilson]

Quoting Chris Wilson (2017-10-24 16:29:02)
> Signed-off-by: Chris Wilson 
> Cc: Michał Winiarski 

A knr imposter gave his irc r-b for these two.
-Chris
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add -Wall -Wextra to our build, set warnings to full (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915: Add -Wall -Wextra to our build, set warnings to full (rev3)
URL   : https://patchwork.freedesktop.org/series/32033/
State : success

== Summary ==

Series 32033v3 drm/i915: Add -Wall -Wextra to our build, set warnings to full
https://patchwork.freedesktop.org/api/1.0/series/32033/revisions/3/mbox/

Test chamelium:
Subgroup dp-crc-fast:
pass   -> FAIL   (fi-kbl-7500u) fdo#102514
Test gem_exec_reloc:
Subgroup basic-gtt-active:
dmesg-warn -> PASS   (fi-gdg-551) fdo#102582 +5
Subgroup basic-write-cpu-active:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-write-gtt-active:
skip   -> PASS   (fi-gdg-551) fdo#102582
Subgroup basic-softpin:
skip   -> PASS   (fi-gdg-551)
Test gem_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_sync:
Subgroup basic-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-many-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-store-each:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_fence_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_wait:
Subgroup basic-busy-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-wait-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-await-all:
skip   -> PASS   (fi-gdg-551)
Test kms_busy:
Subgroup basic-flip-a:
skip   -> PASS   (fi-gdg-551) fdo#102654 +1
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
skip   -> PASS   (fi-gdg-551) fdo#102618

fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514
fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:441s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:456s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:368s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:521s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:263s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:499s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:492s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:493s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:474s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:549s
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:601s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:417s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:250s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:580s
fi-glk-dsi   total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  
time:482s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:424s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:423s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:430s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:494s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:460s
fi-kbl-7500u total:289  pass:263  dwarn:1   dfail:0   fail:1   skip:24  
time:483s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:571s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:473s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:586s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:554s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:449s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:647s
fi-skl-6700k total:289  pass:265  dwarn:0   

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: CNL DVFS thing (rev7)

[Patchwork]

== Series Details ==

Series: drm/i915: CNL DVFS thing (rev7)
URL   : https://patchwork.freedesktop.org/series/32247/
State : failure

== Summary ==

Series 32247v7 drm/i915: CNL DVFS thing
https://patchwork.freedesktop.org/api/1.0/series/32247/revisions/7/mbox/

Test gem_exec_reloc:
Subgroup basic-gtt-active:
dmesg-warn -> PASS   (fi-gdg-551) fdo#102582 +5
Subgroup basic-write-cpu-active:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-write-gtt-active:
skip   -> PASS   (fi-gdg-551) fdo#102582
Subgroup basic-softpin:
skip   -> PASS   (fi-gdg-551)
Test gem_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_sync:
Subgroup basic-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-many-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-store-each:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_fence_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_wait:
Subgroup basic-busy-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-wait-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-await-all:
skip   -> PASS   (fi-gdg-551)
Test kms_busy:
Subgroup basic-flip-a:
skip   -> PASS   (fi-gdg-551) fdo#102654 +1
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
skip   -> PASS   (fi-gdg-551) fdo#102618
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-a:
pass   -> INCOMPLETE (fi-cnl-y)

fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:440s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:446s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:371s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:530s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:265s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:497s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:507s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:493s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:479s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:556s
fi-cnl-y total:245  pass:220  dwarn:0   dfail:0   fail:0   skip:24 
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:414s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:249s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:587s
fi-glk-dsi   total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  
time:486s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:432s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:433s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:436s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:491s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:456s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:487s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:569s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:475s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:577s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:541s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:452s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:642s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:516s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:497s
fi-skl-gvtdvm

[Intel-gfx] [PATCH igt] igt/gem_exec_nop: Headless requires DRM_MASTER for modesetting

[Chris Wilson]

Since the headless subtest wants to compare execution latency of a
headless mode vs a single head, it needs to be able to do a modeset and
ergo it requires DRM_MASTER.

Signed-off-by: Chris Wilson 
---
 tests/gem_exec_nop.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/tests/gem_exec_nop.c b/tests/gem_exec_nop.c
index ce3a8ef7..c9280795 100644
--- a/tests/gem_exec_nop.c
+++ b/tests/gem_exec_nop.c
@@ -711,8 +711,11 @@ igt_main
}
 
 #if !defined(ANDROID) || ANDROID_HAS_CAIRO
-   igt_subtest("headless")
+   igt_subtest("headless") {
+   /* Requires master for changing display modes */
+   igt_require(drmSetMaster(device) == 0);
headless(device, handle);
+   }
 #endif
 
igt_fixture {
-- 
2.15.0.rc2

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[Intel-gfx] [PATCH igt] igt/prime_mmap_coherency: Remove manual gem_sync() calls

[Chris Wilson]

Emphasize that we want to test synchronisation using the dmabuf API
(prime_sync_start, prime_sync_end) and so drop the manual
synchronisation using the GEM API (gem_sync).

Signed-off-by: Chris Wilson 
Reviewed-by: Daniel Vetter 
---
 tests/prime_mmap_coherency.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/tests/prime_mmap_coherency.c b/tests/prime_mmap_coherency.c
index ffd2d751..192b4348 100644
--- a/tests/prime_mmap_coherency.c
+++ b/tests/prime_mmap_coherency.c
@@ -62,7 +62,6 @@ static int test_read_flush(void)
 * the GTT domain. */
bo_2 = drm_intel_bo_alloc(bufmgr, "BO 2", width * height * 4, 4096);
intel_copy_bo(batch, bo_1, bo_2, width * height);
-   gem_sync(fd, bo_1->handle);
drm_intel_bo_unreference(bo_2);
 
/* STEP #2: read BO 1 using the dma-buf CPU mmap. This dirties the CPU 
caches. */
@@ -86,7 +85,6 @@ static int test_read_flush(void)
prime_sync_end(dma_buf_fd, false);
 
intel_copy_bo(batch, bo_1, bo_2, width * height);
-   gem_sync(fd, bo_1->handle);
drm_intel_bo_unreference(bo_2);
 
/* STEP #4: read again using the CPU mmap. Doing #1 before #3 makes 
sure we
@@ -129,7 +127,6 @@ static int test_write_flush(void)
 * the GTT domain. */
bo_2 = drm_intel_bo_alloc(bufmgr, "BO 2", width * height * 4, 4096);
intel_copy_bo(batch, bo_1, bo_2, width * height);
-   gem_sync(fd, bo_1->handle);
drm_intel_bo_unreference(bo_2);
 
/* STEP #2: Write '1's into BO 1 using the dma-buf CPU mmap. */
@@ -149,7 +146,6 @@ static int test_write_flush(void)
/* STEP #3: Copy BO 1 into BO 2, using blitter. */
bo_2 = drm_intel_bo_alloc(bufmgr, "BO 2", width * height * 4, 4096);
intel_copy_bo(batch, bo_2, bo_1, width * height);
-   gem_sync(fd, bo_2->handle);
 
/* STEP #4: compare BO 2 against written BO 1. In !llc hardware, there
 * should be some cache lines that didn't get flushed out and are still 
0,
-- 
2.15.0.rc2

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[Intel-gfx] [PATCH] drm/i915: Add -Wall -Wextra to our build, set warnings to full

[Chris Wilson]

Recently W=1 on gcc-7.2 (-Wunused-const-variable) caught a regression
that had been lurking for 6 months, so lets try enabling the full set of
warnings for CI builds. This means more patches will be rejected early
that contain trivial and sometimes not so trivial bugs. However, our
code does not yet compile cleanly with W=1, so we have to apply a filter
to the set of warnings until we can eliminate the mistakes. It also
means that developers will have to be running the full gamut of gcc to
ensure that as warnings come and go with gcc updates, we have the CI
build prepared.

v2: Use fine-grained -Wno overrides. Inside the makefile, we can
specify CFLAGS on a per-object level, which allows us to limit the scope
of any particular warning override.
v3: Place per-file overrides after the main enabling block.

Signed-off-by: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Jani Nikula 
Cc: Daniel Vetter 
Cc: Tomi Sarvela 
Cc: Michal Wajdeczko 
Cc: Ville Syrjälä 
Acked-by: Tomi Sarvela 
Reviewed-by: Joonas Lahtinen 
---
Seeking more acks for making our lives harder by giving gcc free reign
in its warnings.
-Chris
---
 drivers/gpu/drm/i915/Makefile | 21 -
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 6c3b0481ef82..7750be8e27a6 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -2,7 +2,26 @@
 # Makefile for the drm device driver.  This driver provides support for the
 # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
 
-subdir-ccflags-$(CONFIG_DRM_I915_WERROR) := -Werror
+# Add a set of useful warning flags and enable -Werror for CI to prevent
+# trivial mistakes from creeping in. We have to do this piecemeal as we reject
+# any patch that isn't warning clean, so turning on -Wall -Wextra (or W=1) we
+# need to filter out dubious warnings.  Still it is our interest
+# to keep running locally with W=1 C=1 until we are completely clean.
+#
+# Note the danger in using -Wall -Wextra is that when CI updates gcc we
+# will most likely get a sudden build breakage... Hopefully we will fix
+# new warnings before CI updates!
+subdir-ccflags-y := -Wall -Wextra
+subdir-ccflags-y += $(call cc-option,-Wno-unused-parameter,)
+subdir-ccflags-y += $(call cc-option,-Wno-type-limits,)
+subdir-ccflags-y += $(call cc-option,-Wno-missing-field-initializers,)
+subdir-ccflags-y += $(call cc-option,-Wno-implicit-fallthrough,)
+subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror
+
+# Fine grained warnings disable
+CFLAGS_i915_pci.o = $(call cc-option,-Wno-override-init,)
+CFLAGS_intel_fbdev.o = $(call cc-option,-Wno-override-init,)
+
 subdir-ccflags-y += \
$(call as-instr,movntdqa (%eax)$(comma)%xmm0,-DCONFIG_AS_MOVNTDQA)
 
-- 
2.15.0.rc2

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Re: [Intel-gfx] [PATCH 1/1] drm/i915: Save PM interrupt register offsets in device info

[Ville Syrjälä]

On Tue, Oct 24, 2017 at 08:42:41PM +0300, Jani Nikula wrote:
> On Tue, 24 Oct 2017, Sagar Arun Kamble  wrote:
> > PM interrupt register offsets are constant per platforms and saving those
> > in device info is more appropriate than getting those through functions.
> > This patch removes functions gen6_pm_iir/imr/ier and saves those offsets
> > in device info.
> 
> Do we *really* want to start on this path? We have the *_offsets in
> device info for some groups of registers, but this is a whole another
> ballgame. You could make the same argument for half the registers in
> i915_reg.h!
> 
> If you don't want to use a function to get the correct
> register... almost all of the rest of the driver uses if-else in code
> for this...
> 
> The issue is not this single patch per se. The issue is the precedence
> it sets, and the apparent lack of thought on where we'll end up with
> this.

I definitely think we shouldn't do this for individual registers. I even
removed some _offsets[] arrays in the past because they were effectively
covering just one or two registers, and thus didn't seem justified.

In this case we could actually make do with a single offset that would
cover the four interrupt registers. So it's maybe on the edge of what
seems sensible to me.

> 
> 
> BR,
> Jani.
> 
> >
> > Suggested-by: Tvrtko Ursulin 
> > Signed-off-by: Sagar Arun Kamble 
> > Cc: Chris Wilson 
> > Cc: Tvrtko Ursulin 
> > Cc: Joonas Lahtinen 
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h  |  5 +
> >  drivers/gpu/drm/i915/i915_irq.c  | 30 
> > --
> >  drivers/gpu/drm/i915/intel_device_info.c | 11 +++
> >  3 files changed, 24 insertions(+), 22 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h 
> > b/drivers/gpu/drm/i915/i915_drv.h
> > index 54b5d4c..2f77d26 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -888,6 +888,11 @@ struct intel_device_info {
> > u16 degamma_lut_size;
> > u16 gamma_lut_size;
> > } color;
> > +
> > +   /* PM interrupt register offsets */
> > +   i915_reg_t pm_iir_offset;
> > +   i915_reg_t pm_imr_offset;
> > +   i915_reg_t pm_ier_offset;
> >  };
> >  
> >  struct intel_display_error_state;
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c 
> > b/drivers/gpu/drm/i915/i915_irq.c
> > index b1296a5..68c6f44 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -306,21 +306,6 @@ void gen5_disable_gt_irq(struct drm_i915_private 
> > *dev_priv, uint32_t mask)
> > ilk_update_gt_irq(dev_priv, mask, 0);
> >  }
> >  
> > -static i915_reg_t gen6_pm_iir(struct drm_i915_private *dev_priv)
> > -{
> > -   return INTEL_GEN(dev_priv) >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR;
> > -}
> > -
> > -static i915_reg_t gen6_pm_imr(struct drm_i915_private *dev_priv)
> > -{
> > -   return INTEL_GEN(dev_priv) >= 8 ? GEN8_GT_IMR(2) : GEN6_PMIMR;
> > -}
> > -
> > -static i915_reg_t gen6_pm_ier(struct drm_i915_private *dev_priv)
> > -{
> > -   return INTEL_GEN(dev_priv) >= 8 ? GEN8_GT_IER(2) : GEN6_PMIER;
> > -}
> > -
> >  /**
> >   * snb_update_pm_irq - update GEN6_PMIMR
> >   * @dev_priv: driver private
> > @@ -343,8 +328,8 @@ static void snb_update_pm_irq(struct drm_i915_private 
> > *dev_priv,
> >  
> > if (new_val != dev_priv->pm_imr) {
> > dev_priv->pm_imr = new_val;
> > -   I915_WRITE(gen6_pm_imr(dev_priv), dev_priv->pm_imr);
> > -   POSTING_READ(gen6_pm_imr(dev_priv));
> > +   I915_WRITE(dev_priv->info.pm_imr_offset, dev_priv->pm_imr);
> > +   POSTING_READ(dev_priv->info.pm_imr_offset);
> > }
> >  }
> >  
> > @@ -371,7 +356,7 @@ void gen6_mask_pm_irq(struct drm_i915_private 
> > *dev_priv, u32 mask)
> >  
> >  static void gen6_reset_pm_iir(struct drm_i915_private *dev_priv, u32 
> > reset_mask)
> >  {
> > -   i915_reg_t reg = gen6_pm_iir(dev_priv);
> > +   i915_reg_t reg = dev_priv->info.pm_iir_offset;
> >  
> > lockdep_assert_held(_priv->irq_lock);
> >  
> > @@ -385,7 +370,7 @@ static void gen6_enable_pm_irq(struct drm_i915_private 
> > *dev_priv, u32 enable_mas
> > lockdep_assert_held(_priv->irq_lock);
> >  
> > dev_priv->pm_ier |= enable_mask;
> > -   I915_WRITE(gen6_pm_ier(dev_priv), dev_priv->pm_ier);
> > +   I915_WRITE(dev_priv->info.pm_ier_offset, dev_priv->pm_ier);
> > gen6_unmask_pm_irq(dev_priv, enable_mask);
> > /* unmask_pm_irq provides an implicit barrier (POSTING_READ) */
> >  }
> > @@ -396,7 +381,7 @@ static void gen6_disable_pm_irq(struct drm_i915_private 
> > *dev_priv, u32 disable_m
> >  
> > dev_priv->pm_ier &= ~disable_mask;
> > __gen6_mask_pm_irq(dev_priv, disable_mask);
> > -   I915_WRITE(gen6_pm_ier(dev_priv), dev_priv->pm_ier);
> > +   I915_WRITE(dev_priv->info.pm_ier_offset, 

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/guc : Removing enable_guc_loading module and Decoupling logs and ADS from submission (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/guc : Removing enable_guc_loading module and Decoupling logs 
and ADS from submission (rev3)
URL   : https://patchwork.freedesktop.org/series/31677/
State : warning

== Summary ==

Series 31677v3 drm/i915/guc : Removing enable_guc_loading module and Decoupling 
logs and ADS from submission
https://patchwork.freedesktop.org/api/1.0/series/31677/revisions/3/mbox/

Test gem_exec_reloc:
Subgroup basic-gtt-active:
dmesg-warn -> PASS   (fi-gdg-551) fdo#102582 +5
Subgroup basic-write-cpu-active:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-write-gtt-active:
skip   -> PASS   (fi-gdg-551) fdo#102582
Subgroup basic-softpin:
skip   -> PASS   (fi-gdg-551)
Test gem_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_sync:
Subgroup basic-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-many-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-store-each:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_fence_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_wait:
Subgroup basic-busy-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-wait-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-await-all:
skip   -> PASS   (fi-gdg-551)
Test kms_busy:
Subgroup basic-flip-a:
skip   -> PASS   (fi-gdg-551) fdo#102654 +1
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
skip   -> PASS   (fi-gdg-551) fdo#102618
Test pm_rpm:
Subgroup basic-rte:
pass   -> DMESG-WARN (fi-bsw-n3050)

fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:448s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:452s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:370s
fi-bsw-n3050 total:289  pass:242  dwarn:1   dfail:0   fail:0   skip:46  
time:533s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:267s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:505s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:499s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:500s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:487s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:547s
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:592s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:420s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:252s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:585s
fi-glk-dsi   total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  
time:490s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:429s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:429s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:432s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:489s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:457s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:493s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:570s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:476s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:583s
fi-pnv-d510  total:289  pass:223  dwarn:0   dfail:0   fail:0   skip:66  
time:540s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:450s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:647s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   

Re: [Intel-gfx] [PATCH v2 1/1] drm/i915: Save PM interrupt register offsets in device info

[Jani Nikula]

On Tue, 24 Oct 2017, Chris Wilson  wrote:
> Quoting Sagar Arun Kamble (2017-10-24 11:41:13)
>> diff --git a/drivers/gpu/drm/i915/intel_device_info.c 
>> b/drivers/gpu/drm/i915/intel_device_info.c
>> index 875d428..d1a4911 100644
>> --- a/drivers/gpu/drm/i915/intel_device_info.c
>> +++ b/drivers/gpu/drm/i915/intel_device_info.c
>> @@ -462,4 +462,15 @@ void intel_device_info_runtime_init(struct 
>> drm_i915_private *dev_priv)
>>  info->sseu.has_subslice_pg ? "y" : "n");
>> DRM_DEBUG_DRIVER("has EU power gating: %s\n",
>>  info->sseu.has_eu_pg ? "y" : "n");
>> +
>> +   /* Initialize PM interrupt register offsets */
>> +   if (INTEL_GEN(dev_priv) >= 8) {
>> +   info->pm_iir_offset = GEN8_GT_IIR(2);
>> +   info->pm_imr_offset = GEN8_GT_IMR(2);
>> +   info->pm_ier_offset = GEN8_GT_IER(2);
>> +   } else {
>> +   info->pm_iir_offset = GEN6_PMIIR;
>> +   info->pm_imr_offset = GEN6_PMIMR;
>> +   info->pm_ier_offset = GEN6_PMIER;
>> +   }
>
> If you are going to take another pass at this, move these into the
> static tables in i915_pci.c
>
> Updating GEN6_FEATURES and GEN8_FEATURES will then percolate into
> individual platform defines.

Like I wrote in reply to v1, I'm not convinced we should do this at all.

What makes *these* registers so important they must be in device info?
What makes most of i915_reg.h so unimportant they don't deserve the same
treatment? Where do you draw the line?

I'd draw the line at, no registers at device info.

BR,
Jani.

-- 
Jani Nikula, Intel Open Source Technology Center
___
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Re: [Intel-gfx] [PATCH 09/10] drm/i915: Sanity check cdclk in vlv_set_cdclk()

[Rodrigo Vivi]

On Tue, Oct 24, 2017 at 09:52:15AM +, Ville Syrjala wrote:
> From: Ville Syrjälä 
> 
> chv_set_cdclk() sanity checks that the cdclk frequency is one of the
> legal values. Do the same in the VLV function.

thanks for spliting in separated patch.

> 
> Cc: Mika Kahola 
> Cc: Manasi Navare 
> Cc: Rodrigo Vivi 
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/intel_cdclk.c | 12 
>  1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c 
> b/drivers/gpu/drm/i915/intel_cdclk.c
> index 4ca4a34b7bfa..fedfe3c720b6 100644
> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> @@ -520,6 +520,18 @@ static void vlv_set_cdclk(struct drm_i915_private 
> *dev_priv,
>   int cdclk = cdclk_state->cdclk;
>   u32 val, cmd = cdclk_state->voltage_level;
>  
> + switch (cdclk) {
> + case 40:
> + case 33:
> + case 32:
> + case 27:
> + case 20:

values match vlv_calc_cdclk

Reviewed-by: Rodrigo Vivi 


> + break;
> + default:
> + MISSING_CASE(cdclk);
> + return;
> + }
> +
>   /* There are cases where we can end up here with power domains
>* off and a CDCLK frequency other than the minimum, like when
>* issuing a modeset without actually changing any display after
> -- 
> 2.13.6
> 
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Re: [Intel-gfx] [PATCH 1/1] drm/i915: Save PM interrupt register offsets in device info

[Jani Nikula]

On Tue, 24 Oct 2017, Sagar Arun Kamble  wrote:
> PM interrupt register offsets are constant per platforms and saving those
> in device info is more appropriate than getting those through functions.
> This patch removes functions gen6_pm_iir/imr/ier and saves those offsets
> in device info.

Do we *really* want to start on this path? We have the *_offsets in
device info for some groups of registers, but this is a whole another
ballgame. You could make the same argument for half the registers in
i915_reg.h!

If you don't want to use a function to get the correct
register... almost all of the rest of the driver uses if-else in code
for this...

The issue is not this single patch per se. The issue is the precedence
it sets, and the apparent lack of thought on where we'll end up with
this.


BR,
Jani.

>
> Suggested-by: Tvrtko Ursulin 
> Signed-off-by: Sagar Arun Kamble 
> Cc: Chris Wilson 
> Cc: Tvrtko Ursulin 
> Cc: Joonas Lahtinen 
> ---
>  drivers/gpu/drm/i915/i915_drv.h  |  5 +
>  drivers/gpu/drm/i915/i915_irq.c  | 30 --
>  drivers/gpu/drm/i915/intel_device_info.c | 11 +++
>  3 files changed, 24 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 54b5d4c..2f77d26 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -888,6 +888,11 @@ struct intel_device_info {
>   u16 degamma_lut_size;
>   u16 gamma_lut_size;
>   } color;
> +
> + /* PM interrupt register offsets */
> + i915_reg_t pm_iir_offset;
> + i915_reg_t pm_imr_offset;
> + i915_reg_t pm_ier_offset;
>  };
>  
>  struct intel_display_error_state;
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index b1296a5..68c6f44 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -306,21 +306,6 @@ void gen5_disable_gt_irq(struct drm_i915_private 
> *dev_priv, uint32_t mask)
>   ilk_update_gt_irq(dev_priv, mask, 0);
>  }
>  
> -static i915_reg_t gen6_pm_iir(struct drm_i915_private *dev_priv)
> -{
> - return INTEL_GEN(dev_priv) >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR;
> -}
> -
> -static i915_reg_t gen6_pm_imr(struct drm_i915_private *dev_priv)
> -{
> - return INTEL_GEN(dev_priv) >= 8 ? GEN8_GT_IMR(2) : GEN6_PMIMR;
> -}
> -
> -static i915_reg_t gen6_pm_ier(struct drm_i915_private *dev_priv)
> -{
> - return INTEL_GEN(dev_priv) >= 8 ? GEN8_GT_IER(2) : GEN6_PMIER;
> -}
> -
>  /**
>   * snb_update_pm_irq - update GEN6_PMIMR
>   * @dev_priv: driver private
> @@ -343,8 +328,8 @@ static void snb_update_pm_irq(struct drm_i915_private 
> *dev_priv,
>  
>   if (new_val != dev_priv->pm_imr) {
>   dev_priv->pm_imr = new_val;
> - I915_WRITE(gen6_pm_imr(dev_priv), dev_priv->pm_imr);
> - POSTING_READ(gen6_pm_imr(dev_priv));
> + I915_WRITE(dev_priv->info.pm_imr_offset, dev_priv->pm_imr);
> + POSTING_READ(dev_priv->info.pm_imr_offset);
>   }
>  }
>  
> @@ -371,7 +356,7 @@ void gen6_mask_pm_irq(struct drm_i915_private *dev_priv, 
> u32 mask)
>  
>  static void gen6_reset_pm_iir(struct drm_i915_private *dev_priv, u32 
> reset_mask)
>  {
> - i915_reg_t reg = gen6_pm_iir(dev_priv);
> + i915_reg_t reg = dev_priv->info.pm_iir_offset;
>  
>   lockdep_assert_held(_priv->irq_lock);
>  
> @@ -385,7 +370,7 @@ static void gen6_enable_pm_irq(struct drm_i915_private 
> *dev_priv, u32 enable_mas
>   lockdep_assert_held(_priv->irq_lock);
>  
>   dev_priv->pm_ier |= enable_mask;
> - I915_WRITE(gen6_pm_ier(dev_priv), dev_priv->pm_ier);
> + I915_WRITE(dev_priv->info.pm_ier_offset, dev_priv->pm_ier);
>   gen6_unmask_pm_irq(dev_priv, enable_mask);
>   /* unmask_pm_irq provides an implicit barrier (POSTING_READ) */
>  }
> @@ -396,7 +381,7 @@ static void gen6_disable_pm_irq(struct drm_i915_private 
> *dev_priv, u32 disable_m
>  
>   dev_priv->pm_ier &= ~disable_mask;
>   __gen6_mask_pm_irq(dev_priv, disable_mask);
> - I915_WRITE(gen6_pm_ier(dev_priv), dev_priv->pm_ier);
> + I915_WRITE(dev_priv->info.pm_ier_offset, dev_priv->pm_ier);
>   /* though a barrier is missing here, but don't really need a one */
>  }
>  
> @@ -417,7 +402,8 @@ void gen6_enable_rps_interrupts(struct drm_i915_private 
> *dev_priv)
>  
>   spin_lock_irq(_priv->irq_lock);
>   WARN_ON_ONCE(rps->pm_iir);
> - WARN_ON_ONCE(I915_READ(gen6_pm_iir(dev_priv)) & 
> dev_priv->pm_rps_events);
> + WARN_ON_ONCE(I915_READ(dev_priv->info.pm_iir_offset) &
> +dev_priv->pm_rps_events);
>   rps->interrupts_enabled = true;
>   gen6_enable_pm_irq(dev_priv, dev_priv->pm_rps_events);
>  
> @@ -461,7 +447,7 @@ void 

[Intel-gfx] ✗ Fi.CI.BAT: failure for HAX: Find CRC failures more reliably

[Patchwork]

== Series Details ==

Series: HAX: Find CRC failures more reliably
URL   : https://patchwork.freedesktop.org/series/32555/
State : failure

== Summary ==

IGT patchset tested on top of latest successful build
cf6b5a4221e3e8d14dd39011a746e5be909e5928 lib/igt_kms: Only print changed mode 
objects during atomic commit.

with latest DRM-Tip kernel build CI_DRM_3277
bcee836068d9 drm-tip: 2017y-10m-24d-15h-00m-14s UTC integration manifest

No testlist changes.

Test gem_exec_reloc:
Subgroup basic-gtt-active:
dmesg-warn -> PASS   (fi-gdg-551) fdo#102582 +5
Subgroup basic-write-cpu-active:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-write-gtt-active:
skip   -> PASS   (fi-gdg-551) fdo#102582
Subgroup basic-softpin:
skip   -> PASS   (fi-gdg-551)
Test gem_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_sync:
Subgroup basic-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-many-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-store-each:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_fence_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_wait:
Subgroup basic-busy-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-wait-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-await-all:
skip   -> PASS   (fi-gdg-551)
Test kms_busy:
Subgroup basic-flip-a:
skip   -> PASS   (fi-gdg-551) fdo#102654 +1
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
skip   -> PASS   (fi-gdg-551) fdo#102618
Test kms_pipe_crc_basic:
Subgroup hang-read-crc-pipe-a:
pass   -> FAIL   (fi-gdg-551)
pass   -> FAIL   (fi-blb-e6850)
pass   -> FAIL   (fi-bwr-2160)
pass   -> FAIL   (fi-elk-e7500)
pass   -> FAIL   (fi-ilk-650)
pass   -> FAIL   (fi-snb-2520m)
pass   -> FAIL   (fi-snb-2600)
pass   -> FAIL   (fi-ivb-3520m)
pass   -> FAIL   (fi-ivb-3770)
pass   -> FAIL   (fi-byt-j1900)
pass   -> FAIL   (fi-byt-n2820)
pass   -> FAIL   (fi-hsw-4770)
pass   -> FAIL   (fi-hsw-4770r)
pass   -> FAIL   (fi-bdw-5557u)
pass   -> FAIL   (fi-bdw-gvtdvm)
pass   -> FAIL   (fi-skl-6260u)
pass   -> FAIL   (fi-skl-6700hq)
pass   -> FAIL   (fi-skl-6700k)
pass   -> FAIL   (fi-skl-6770hq)
pass   -> FAIL   (fi-skl-gvtdvm)
pass   -> FAIL   (fi-bxt-dsi)
pass   -> FAIL   (fi-bxt-j4205)
pass   -> FAIL   (fi-kbl-7500u)
pass   -> FAIL   (fi-kbl-7560u)
pass   -> FAIL   (fi-kbl-7567u)
pass   -> FAIL   (fi-kbl-r)
pass   -> FAIL   (fi-glk-1)
pass   -> FAIL   (fi-glk-dsi)
pass   -> FAIL   (fi-cfl-s)
pass   -> FAIL   (fi-cnl-y)
Subgroup hang-read-crc-pipe-b:
pass   -> FAIL   (fi-gdg-551)
pass   -> FAIL   (fi-blb-e6850)
pass   -> FAIL   (fi-bwr-2160)
pass   -> FAIL   (fi-elk-e7500)
pass   -> FAIL   (fi-ilk-650)
pass   -> FAIL   (fi-snb-2520m)
pass   -> FAIL   (fi-snb-2600)
pass   -> FAIL   (fi-ivb-3520m)
pass   -> FAIL   (fi-ivb-3770)
pass   -> FAIL   (fi-byt-j1900)
pass   -> FAIL   (fi-byt-n2820)
pass   -> FAIL   (fi-hsw-4770)
pass   -> FAIL   (fi-hsw-4770r)
pass   -> FAIL   (fi-bdw-5557u)
pass   -> FAIL   (fi-bdw-gvtdvm)
pass   -> FAIL   (fi-skl-6260u)
pass   -> FAIL   (fi-skl-6700hq) 

[Intel-gfx] [PATCH v8 2/6] drm/i915/guc : Removing i915_modparams.enable_guc_loading module parameter

[Sujaritha Sundaresan]

We currently have two module parameters that control GuC:
"enable_guc_loading" and "enable_guc_submission". Whenever
we need submission=1, we also need loading=1.We also need
loading=1 when we want to want to verify the HuC, which
is every time we have a HuC (but all platforms with HuC
have a GuC and viceversa).

Also if we have HuC have firmware to be loaded, we need to
have GuC to actually load it. So if the user wants to avoid
the GuC from getting loaded, they must not have a HuC
firmware to be loaded, in addition to not using submission.

v2: Clarifying the commit message (Anusha)

v3: Unify seq_puts messages, Re-factoring code as per review (Michal)

v4: Rebase

v5: Separating message unification into a separate patch

v6: Re-factoring code (Sagar, Michal)
Rebase

v7: Applying review comments (Sagar)
Rebase

v8: Change to NEEDS_GUC_FW (Chris)
Applying review comments (Michal)
Clarifying commit message (Joonas)

Suggested by: Oscar Mateo 
Signed-off-by: Sujaritha Sundaresan 
Cc: Anusha Srivatsa 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Michal Wajdeczko 
Cc: Oscar Mateo 
Cc: Sagar Arun Kamble 
---
 drivers/gpu/drm/i915/i915_debugfs.c |  2 +-
 drivers/gpu/drm/i915/i915_drv.h |  9 +++--
 drivers/gpu/drm/i915/i915_gem_context.c |  2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c |  2 +-
 drivers/gpu/drm/i915/i915_irq.c |  2 +-
 drivers/gpu/drm/i915/i915_params.c  |  4 ---
 drivers/gpu/drm/i915/i915_params.h  |  1 -
 drivers/gpu/drm/i915/intel_uc.c | 57 +++--
 8 files changed, 34 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 8edd029..25c47a0 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2465,7 +2465,7 @@ static bool check_guc_submission(struct seq_file *m)
 
if (!guc->execbuf_client) {
seq_printf(m, "GuC submission %s\n",
-  HAS_GUC_SCHED(dev_priv) ?
+  HAS_GUC(dev_priv) ?
   "disabled" :
   "not supported");
return false;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f01c800..ede5004 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3205,9 +3205,11 @@ static inline unsigned int i915_sg_segment_size(void)
  */
 #define HAS_GUC(dev_priv)  ((dev_priv)->info.has_guc)
 #define HAS_GUC_CT(dev_priv)   ((dev_priv)->info.has_guc_ct)
-#define HAS_GUC_UCODE(dev_priv)(HAS_GUC(dev_priv))
-#define HAS_GUC_SCHED(dev_priv)(HAS_GUC(dev_priv))
-#define HAS_HUC_UCODE(dev_priv)(HAS_GUC(dev_priv))
+#define HAS_GUC_UCODE(dev_priv) ((dev_priv)->guc.fw.path != NULL)
+#define HAS_HUC_UCODE(dev_priv) ((dev_priv)->huc.fw.path != NULL)
+
+#define NEEDS_GUC_FW(dev_priv) \
+   (HAS_GUC(dev_priv) && \
+   (i915_modparams.enable_guc_submission || 
HAS_HUC_UCODE(dev_priv)))
 
 #define HAS_RESOURCE_STREAMER(dev_priv) 
((dev_priv)->info.has_resource_streamer)
 
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c 
b/drivers/gpu/drm/i915/i915_gem_context.c
index 5bf96a2..4f0692e 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -314,7 +314,7 @@ static u32 default_desc_template(const struct 
drm_i915_private *i915,
 * present or not in use we still need a small bias as ring wraparound
 * at offset 0 sometimes hangs. No idea why.
 */
-   if (HAS_GUC(dev_priv) && i915_modparams.enable_guc_loading)
+   if (NEEDS_GUC_FW(dev_priv))
ctx->ggtt_offset_bias = GUC_WOPCM_TOP;
else
ctx->ggtt_offset_bias = I915_GTT_PAGE_SIZE;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 527a2d2..9d78233 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -3481,7 +3481,7 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
 * currently don't have any bits spare to pass in this upper
 * restriction!
 */
-   if (HAS_GUC(dev_priv) && i915_modparams.enable_guc_loading) {
+   if (NEEDS_GUC_FW(dev_priv)) {
ggtt->base.total = min_t(u64, ggtt->base.total, GUC_GGTT_TOP);
ggtt->mappable_end = min(ggtt->mappable_end, ggtt->base.total);
}
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index b1296a5..ec76aac 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -4026,7 +4026,7 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
for (i = 0; i 

[Intel-gfx] [PATCH v8 0/6] drm/i915/guc : Removing enable_guc_loading module and Decoupling logs and ADS from submission

[Sujaritha Sundaresan]

The first patch simply unifies different seq_puts messages found in debugfs.
Patch 2,3 and 4 involve replacing te enable_guc_loading module. Patches 5
and 6 deal with decoupling GuC logs and ADS from submission.

Cc: Anusha Srivatsa 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Michal Wajdeczko 
Cc: Oscar Mateo 
Cc: Sagar Arun Kamble 

Sujaritha Sundaresan (6):
  drm/i915 : Unifying seq_puts messages for feature support
  drm/i915/guc : Removing i915_modparams.enable_guc_loading module parameter
  drm/i915/guc : GEM_BUG_ON for GuC reset function
  drm/i915/guc : Updating GuC and HuC firmware select function
  drm/i915/guc : Updating GuC logs to remove enable_guc_submission parameter
  drm/i915/guc : Decouple logs and ADS from submission

 drivers/gpu/drm/i915/Makefile  |   1 +
 drivers/gpu/drm/i915/i915_debugfs.c|  17 ++--
 drivers/gpu/drm/i915/i915_drv.h|   8 +-
 drivers/gpu/drm/i915/i915_gem_context.c|   2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c|   2 +-
 drivers/gpu/drm/i915/i915_guc_submission.c | 139 +--
 drivers/gpu/drm/i915/i915_irq.c|   2 +-
 drivers/gpu/drm/i915/i915_params.c |   4 -
 drivers/gpu/drm/i915/i915_params.h |   1 -
 drivers/gpu/drm/i915/intel_guc_ads.c   | 149 +
 drivers/gpu/drm/i915/intel_guc_ads.h   |  33 +++
 drivers/gpu/drm/i915/intel_guc_fw.c|  10 +-
 drivers/gpu/drm/i915/intel_guc_fw.h|   2 +-
 drivers/gpu/drm/i915/intel_guc_log.c   |   8 +-
 drivers/gpu/drm/i915/intel_huc.c   |   3 +-
 drivers/gpu/drm/i915/intel_uc.c| 101 ---
 drivers/gpu/drm/i915/intel_uncore.c|   3 +-
 17 files changed, 279 insertions(+), 205 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_guc_ads.c
 create mode 100644 drivers/gpu/drm/i915/intel_guc_ads.h

-- 
1.9.1

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[Intel-gfx] [PATCH v8 3/6] drm/i915/guc : GEM_BUG_ON for GuC reset function

[Sujaritha Sundaresan]

Including GEM_BUG_ON for GuC reset function in intel_uncore.

Signed-off-by: Sujaritha Sundaresan 
Cc: Anusha Srivatsa 
Cc: Michal Wajdeczko 
Cc: Oscar Mateo 
Cc: Sagar Arun Kamble 
---
 drivers/gpu/drm/i915/intel_uncore.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c 
b/drivers/gpu/drm/i915/intel_uncore.c
index 20e3c65c..c631b0e 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1803,8 +1803,7 @@ int intel_guc_reset(struct drm_i915_private *dev_priv)
 {
int ret;
 
-   if (!HAS_GUC(dev_priv))
-   return -EINVAL;
+   GEM_BUG_ON(!HAS_GUC(dev_priv));
 
intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
ret = gen6_hw_domain_reset(dev_priv, GEN9_GRDOM_GUC);
-- 
1.9.1

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[Intel-gfx] [PATCH v8 6/6] drm/i915/guc : Decouple logs and ADS from submission

[Sujaritha Sundaresan]

The Additional Data Struct (ADS) contains objects that are required by
guc post FW load and are not necessarily submission-only (although that's
our current only use-case). If in the future we load GuC with submission
disabled to use some other GuC feature we might still end up requiring
something inside the ADS, so it makes more sense for them to be always
created if GuC is loaded.

Similarly, we still want to access GuC logs even if GuC submission is
disable to debug issues with GuC loading or with wathever we're using
GuC for.

To make a concrete example, the pages used by GuC to save state during
suspend are allocated as part of the ADS.

v3: Group initialization of GuC objects

v2: Decoupling ADS together with logs

v3: Re-factoring code as per review (Michal)

v4: Rebase

v5: Separating group object initialization into next patch
Clarifying commit message

v6: Reverting to goto err format (Michal)
Moved guc_ads functions to dedicated file
Rebase

v7: Rebase

v8: Applying review comments (Michal)

Signed-off-by: Sujaritha Sundaresan 
Cc: Anusha Srivatsa 
Cc: Michal Wajdeczko 
Cc: Oscar Mateo 
Cc: Sagar Arun Kamble 
---
 drivers/gpu/drm/i915/Makefile  |   1 +
 drivers/gpu/drm/i915/i915_guc_submission.c | 139 +--
 drivers/gpu/drm/i915/intel_guc_ads.c   | 149 +
 drivers/gpu/drm/i915/intel_guc_ads.h   |  33 +++
 drivers/gpu/drm/i915/intel_uc.c|  38 +++-
 5 files changed, 220 insertions(+), 140 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_guc_ads.c
 create mode 100644 drivers/gpu/drm/i915/intel_guc_ads.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 6c3b048..d7ce07e 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -62,6 +62,7 @@ i915-y += i915_cmd_parser.o \
 i915-y += intel_uc.o \
  intel_uc_fw.o \
  intel_guc.o \
+ intel_guc_ads.o \
  intel_guc_ct.o \
  intel_guc_log.o \
  intel_guc_fw.o \
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c 
b/drivers/gpu/drm/i915/i915_guc_submission.c
index a2e8114..3a56429 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -72,13 +72,6 @@
  * ELSP context descriptor dword into Work Item.
  * See guc_wq_item_append()
  *
- * ADS:
- * The Additional Data Struct (ADS) has pointers for different buffers used by
- * the GuC. One single gem object contains the ADS struct itself (guc_ads), the
- * scheduling policies (guc_policies), a structure describing a collection of
- * register sets (guc_mmio_reg_state) and some extra pages for the GuC to save
- * its internal state for sleep.
- *
  */
 
 static inline bool is_high_priority(struct i915_guc_client* client)
@@ -855,115 +848,6 @@ static void guc_client_free(struct i915_guc_client 
*client)
kfree(client);
 }
 
-static void guc_policy_init(struct guc_policy *policy)
-{
-   policy->execution_quantum = POLICY_DEFAULT_EXECUTION_QUANTUM_US;
-   policy->preemption_time = POLICY_DEFAULT_PREEMPTION_TIME_US;
-   policy->fault_time = POLICY_DEFAULT_FAULT_TIME_US;
-   policy->policy_flags = 0;
-}
-
-static void guc_policies_init(struct guc_policies *policies)
-{
-   struct guc_policy *policy;
-   u32 p, i;
-
-   policies->dpc_promote_time = POLICY_DEFAULT_DPC_PROMOTE_TIME_US;
-   policies->max_num_work_items = POLICY_MAX_NUM_WI;
-
-   for (p = 0; p < GUC_CLIENT_PRIORITY_NUM; p++) {
-   for (i = GUC_RENDER_ENGINE; i < GUC_MAX_ENGINES_NUM; i++) {
-   policy = >policy[p][i];
-
-   guc_policy_init(policy);
-   }
-   }
-
-   policies->is_valid = 1;
-}
-
-/*
- * The first 80 dwords of the register state context, containing the
- * execlists and ppgtt registers.
- */
-#define LR_HW_CONTEXT_SIZE (80 * sizeof(u32))
-
-static int guc_ads_create(struct intel_guc *guc)
-{
-   struct drm_i915_private *dev_priv = guc_to_i915(guc);
-   struct i915_vma *vma;
-   struct page *page;
-   /* The ads obj includes the struct itself and buffers passed to GuC */
-   struct {
-   struct guc_ads ads;
-   struct guc_policies policies;
-   struct guc_mmio_reg_state reg_state;
-   u8 reg_state_buffer[GUC_S3_SAVE_SPACE_PAGES * PAGE_SIZE];
-   } __packed *blob;
-   struct intel_engine_cs *engine;
-   enum intel_engine_id id;
-   const u32 skipped_offset = LRC_HEADER_PAGES * PAGE_SIZE;
-   const u32 skipped_size = LRC_PPHWSP_SZ * PAGE_SIZE + LR_HW_CONTEXT_SIZE;
-   u32 base;
-
-   GEM_BUG_ON(guc->ads_vma);
-
-   vma = intel_guc_allocate_vma(guc, PAGE_ALIGN(sizeof(*blob)));
-   if (IS_ERR(vma))
-   return 

[Intel-gfx] [PATCH v8 5/6] drm/i915/guc : Updating GuC logs to remove enable_guc_submission parameter

[Sujaritha Sundaresan]

Replacing conditions to remove dependance on enable_guc_submission

Signed-off-by: Sujaritha Sundaresan 
Cc: Anusha Srivatsa 
Cc: Michal Wajdeczko 
Cc: Oscar Mateo 
Cc: Sagar Arun Kamble 
---
 drivers/gpu/drm/i915/intel_guc_log.c | 8 +++-
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_guc_log.c 
b/drivers/gpu/drm/i915/intel_guc_log.c
index 76d3eb1..c9f0167 100644
--- a/drivers/gpu/drm/i915/intel_guc_log.c
+++ b/drivers/gpu/drm/i915/intel_guc_log.c
@@ -505,8 +505,7 @@ static void guc_flush_logs(struct intel_guc *guc)
 {
struct drm_i915_private *dev_priv = guc_to_i915(guc);
 
-   if (!i915_modparams.enable_guc_submission ||
-   (i915_modparams.guc_log_level < 0))
+   if (!NEEDS_GUC_FW(dev_priv))
return;
 
/* First disable the interrupts, will be renabled afterwards */
@@ -646,8 +645,7 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, 
u64 control_val)
 
 void i915_guc_log_register(struct drm_i915_private *dev_priv)
 {
-   if (!i915_modparams.enable_guc_submission ||
-   (i915_modparams.guc_log_level < 0))
+   if (!NEEDS_GUC_FW(dev_priv))
return;
 
mutex_lock(_priv->drm.struct_mutex);
@@ -657,7 +655,7 @@ void i915_guc_log_register(struct drm_i915_private 
*dev_priv)
 
 void i915_guc_log_unregister(struct drm_i915_private *dev_priv)
 {
-   if (!i915_modparams.enable_guc_submission)
+   if (!NEEDS_GUC_FW(dev_priv))
return;
 
mutex_lock(_priv->drm.struct_mutex);
-- 
1.9.1

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Re: [Intel-gfx] [PATCH] drm/i915/cnl: Force DDI_A_4_LANES when needed.

[Rodrigo Vivi]

On Tue, Oct 24, 2017 at 09:21:38AM +, Ville Syrjälä wrote:
> On Mon, Oct 23, 2017 at 10:39:20AM -0700, Rodrigo Vivi wrote:
> > As we faced in BXT, on CNL DDI_A_4_LANES is not
> > set as expected when system is boot with multiple
> > monitors connected. This result in wrong lane
> > setup impacting the max data rate available and
> > consequently blocking modeset on eDP, resulting
> > in a blank screen.
> > 
> > Most of CNL SKUs don't support DDI-E.
> > The only SKU that supports DDI-E is the same
> > that supports the full A/E split called DDI-F.
> > 
> > Also when DDI-F is used DDI-E cannot be used because
> > they share Interrupts. So DDI-E is almost useless.
> > Anyways let's consider this is possible and rely on
> > VBT for that.
> > 
> > This patch was initialy start by Clint, but required
> > many changes including full commit message. So
> > Credits entirely to Clint for finding this.
> > 
> > v2: Extract all messy conditions into a helper function
> > as suggested by Ville.
> > Along with simplification I removed the debug
> > message on the working case since now all conditions
> > are grouped.
> > v3: Split the conditions even more as suggested by Ville.
> > Get's cleaner and easier to add new cases in the
> > future.
> > 
> > Suggested-by: Clint Taylor 
> > Cc: Clint Taylor 
> > Cc: Mika Kahola 
> > Cc: Jani Nikula 
> > Cc: Ville Syrjälä 
> > Signed-off-by: Rodrigo Vivi 
> 
> Reviewed-by: Ville Syrjälä 

Thanks for review and all great suggestions.
Merged to dinq.

> 
> > ---
> >  drivers/gpu/drm/i915/intel_ddi.c | 46 
> > ++--
> >  1 file changed, 35 insertions(+), 11 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c 
> > b/drivers/gpu/drm/i915/intel_ddi.c
> > index adf51b328844..38a7088bd39c 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -2694,6 +2694,34 @@ intel_ddi_init_hdmi_connector(struct 
> > intel_digital_port *intel_dig_port)
> > return connector;
> >  }
> >  
> > +static bool intel_ddi_a_force_4_lanes(struct intel_digital_port *dport)
> > +{
> > +   struct drm_i915_private *dev_priv = to_i915(dport->base.base.dev);
> > +
> > +   if (dport->port != PORT_A)
> > +   return false;
> > +
> > +   if (dport->saved_port_bits & DDI_A_4_LANES)
> > +   return false;
> > +
> > +   /* Broxton/Geminilake: Bspec says that DDI_A_4_LANES is the only
> > +* supported configuration
> > +*/
> > +   if (IS_GEN9_LP(dev_priv))
> > +   return true;
> > +
> > +   /* Cannonlake: Most of SKUs don't support DDI_E, and the only
> > +* one who does also have a full A/E split called
> > +* DDI_F what makes DDI_E useless. However for this
> > +* case let's trust VBT info.
> > +*/
> > +   if (IS_CANNONLAKE(dev_priv) &&
> > +   !intel_bios_is_port_present(dev_priv, PORT_E))
> > +   return true;
> > +
> > +   return false;
> > +}
> > +
> >  void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> >  {
> > struct intel_digital_port *intel_dig_port;
> > @@ -2803,18 +2831,14 @@ void intel_ddi_init(struct drm_i915_private 
> > *dev_priv, enum port port)
> > }
> >  
> > /*
> > -* Bspec says that DDI_A_4_LANES is the only supported configuration
> > -* for Broxton.  Yet some BIOS fail to set this bit on port A if eDP
> > -* wasn't lit up at boot.  Force this bit on in our internal
> > -* configuration so that we use the proper lane count for our
> > -* calculations.
> > +* Some BIOS might fail to set this bit on port A if eDP
> > +* wasn't lit up at boot.  Force this bit set when needed
> > +* so we use the proper lane count for our calculations.
> >  */
> > -   if (IS_GEN9_LP(dev_priv) && port == PORT_A) {
> > -   if (!(intel_dig_port->saved_port_bits & DDI_A_4_LANES)) {
> > -   DRM_DEBUG_KMS("BXT BIOS forgot to set DDI_A_4_LANES for 
> > port A; fixing\n");
> > -   intel_dig_port->saved_port_bits |= DDI_A_4_LANES;
> > -   max_lanes = 4;
> > -   }
> > +   if (intel_ddi_a_force_4_lanes(intel_dig_port)) {
> > +   DRM_DEBUG_KMS("Forcing DDI_A_4_LANES for port A\n");
> > +   intel_dig_port->saved_port_bits |= DDI_A_4_LANES;
> > +   max_lanes = 4;
> > }
> >  
> > intel_dig_port->max_lanes = max_lanes;
> > -- 
> > 2.13.5
> 
> -- 
> Ville Syrjälä
> Intel OTC
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[Intel-gfx] [PATCH v8 4/6] drm/i915/guc : Updating GuC and HuC firmware select function

[Sujaritha Sundaresan]

Updating GuC and HuC firmware select function to support removing
i915_modparams.enable_guc_loading module parameter.

v2: Clarifying the commit message (Anusha)

v3: Unify seq_puts messages, Re-factoring code as per review (Michal)

v4: Rebase

v5: Separating message unification into a separate patch

v6: Re-factoring code (Sagar, Michal)
Rebase

v7: Separating from previuos patch (Sagar)
Rebase

v8: Including change to intel_uc.c
Applying review comments (Michal)

Signed-off-by: Sujaritha Sundaresan 
Cc: Anusha Srivatsa 
Cc: Michal Wajdeczko 
Cc: Oscar Mateo 
Cc: Sagar Arun Kamble 
---
 drivers/gpu/drm/i915/intel_guc_fw.c | 10 +++---
 drivers/gpu/drm/i915/intel_guc_fw.h |  2 +-
 drivers/gpu/drm/i915/intel_huc.c|  3 ++-
 drivers/gpu/drm/i915/intel_uc.c |  6 ++
 4 files changed, 12 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c 
b/drivers/gpu/drm/i915/intel_guc_fw.c
index ef67a36..b9f834f 100644
--- a/drivers/gpu/drm/i915/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
@@ -60,10 +60,8 @@
  * intel_guc_fw_select() - selects GuC firmware for uploading
  *
  * @guc:   intel_guc struct
- *
- * Return: zero when we know firmware, non-zero in other case
  */
-int intel_guc_fw_select(struct intel_guc *guc)
+void intel_guc_fw_select(struct intel_guc *guc)
 {
struct drm_i915_private *dev_priv = guc_to_i915(guc);
 
@@ -90,11 +88,9 @@ int intel_guc_fw_select(struct intel_guc *guc)
guc->fw.major_ver_wanted = GLK_FW_MAJOR;
guc->fw.minor_ver_wanted = GLK_FW_MINOR;
} else {
-   DRM_ERROR("No GuC firmware known for platform with GuC!\n");
-   return -ENOENT;
+   DRM_ERROR("No GuC FW known for platform with GuC!\n");
+   return;
}
-
-   return 0;
 }
 
 /*
diff --git a/drivers/gpu/drm/i915/intel_guc_fw.h 
b/drivers/gpu/drm/i915/intel_guc_fw.h
index 023f5ba..7f6ccaf 100644
--- a/drivers/gpu/drm/i915/intel_guc_fw.h
+++ b/drivers/gpu/drm/i915/intel_guc_fw.h
@@ -27,7 +27,7 @@
 
 struct intel_guc;
 
-int intel_guc_fw_select(struct intel_guc *guc);
+void intel_guc_fw_select(struct intel_guc *guc);
 int intel_guc_fw_upload(struct intel_guc *guc);
 
 #endif
diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
index c8a48cb..4e700ab 100644
--- a/drivers/gpu/drm/i915/intel_huc.c
+++ b/drivers/gpu/drm/i915/intel_huc.c
@@ -108,7 +108,8 @@ void intel_huc_select_fw(struct intel_huc *huc)
huc->fw.major_ver_wanted = GLK_HUC_FW_MAJOR;
huc->fw.minor_ver_wanted = GLK_HUC_FW_MINOR;
} else {
-   DRM_ERROR("No HuC firmware known for platform with HuC!\n");
+   if (HAS_GUC(dev_priv))
+   DRM_ERROR("No HuC FW known for platform with HuC!\n");
return;
}
 }
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 9369ade..dc978a0 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -82,11 +82,17 @@ void intel_uc_sanitize_options(struct drm_i915_private 
*dev_priv)
 
 void intel_uc_init_early(struct drm_i915_private *dev_priv)
 {
+   struct intel_guc *guc = _priv->guc;
+   struct intel_huc *huc = _priv->huc;
intel_guc_init_early(_priv->guc);
+   intel_guc_fw_select(guc);
+   intel_huc_select_fw(huc);
 }
 
 void intel_uc_init_fw(struct drm_i915_private *dev_priv)
 {
+   if (!HAS_GUC(dev_priv))
+   return;
intel_uc_fw_fetch(dev_priv, _priv->huc.fw);
intel_uc_fw_fetch(dev_priv, _priv->guc.fw);
 }
-- 
1.9.1

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[Intel-gfx] [PATCH v8 1/6] drm/i915 : Unifying seq_puts messages for feature support

[Sujaritha Sundaresan]

Unifying the various seq_puts messages in debugfs to the simplest one for
feature support.

v2: Clarifying the commit message (Anusha)

v3: Re-factoring code as per review (Michal)

v4: Rebase

v5: Split from following patch

v6: Re-factoring code (Michal, Sagar)
Clarifying commit message (Sagar)

v7: Generalizing subject to drm/i915 (Sagar)

v8: Omitting DRRS seq_puts unification (Michal)

Suggested by: Michal Wajdeczko 
Signed-off-by: Sujaritha Sundaresan 
Cc: Anusha Srivatsa 
Cc: Michal Wajdeczko 
Cc: Oscar Mateo 
Cc: Sagar Arun Kamble 
---
 drivers/gpu/drm/i915/i915_debugfs.c | 14 +-
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index c65e381..8edd029 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1641,7 +1641,7 @@ static int i915_fbc_status(struct seq_file *m, void 
*unused)
struct drm_i915_private *dev_priv = node_to_i915(m->private);
 
if (!HAS_FBC(dev_priv)) {
-   seq_puts(m, "FBC unsupported on this chipset\n");
+   seq_puts(m, "not supported\n");
return 0;
}
 
@@ -1809,7 +1809,7 @@ static int i915_ring_freq_table(struct seq_file *m, void 
*unused)
unsigned int max_gpu_freq, min_gpu_freq;
 
if (!HAS_LLC(dev_priv)) {
-   seq_puts(m, "unsupported on this chipset\n");
+   seq_puts(m, "not supported\n");
return 0;
}
 
@@ -2361,8 +2361,10 @@ static int i915_huc_load_status_info(struct seq_file *m, 
void *data)
struct drm_i915_private *dev_priv = node_to_i915(m->private);
struct drm_printer p;
 
-   if (!HAS_HUC_UCODE(dev_priv))
+   if (!HAS_GUC(dev_priv)) {
+   seq_puts(m, "not supported\n");
return 0;
+   }
 
p = drm_seq_file_printer(m);
intel_uc_fw_dump(_priv->huc.fw, );
@@ -2380,8 +2382,10 @@ static int i915_guc_load_status_info(struct seq_file *m, 
void *data)
struct drm_printer p;
u32 tmp, i;
 
-   if (!HAS_GUC_UCODE(dev_priv))
+   if (!HAS_GUC(dev_priv)) {
+   seq_puts(m, "not supported\n");
return 0;
+   }
 
p = drm_seq_file_printer(m);
intel_uc_fw_dump(_priv->guc.fw, );
@@ -2650,7 +2654,7 @@ static int i915_edp_psr_status(struct seq_file *m, void 
*data)
bool enabled = false;
 
if (!HAS_PSR(dev_priv)) {
-   seq_puts(m, "PSR not supported\n");
+   seq_puts(m, "not supported\n");
return 0;
}
 
-- 
1.9.1

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Re: [Intel-gfx] [PATCH] drm/i915/cnl: Get RC6 working.

[Rodrigo Vivi]

On Tue, Oct 24, 2017 at 12:50:13PM +, David Weinehall wrote:
> On Mon, Oct 23, 2017 at 03:46:12PM -0700, Rodrigo Vivi wrote:
> > On CNL, individual wake rate limit was added to each engine.
> > 
> > GT can only go to RC6 if both Render and Media engines are
> > individually qualified. So we need to set their individual
> > wake rate limit.
> > 
> > +-+---+--+--+
> > | |GT RC6 |  Render C6   |   Media C6   |
> > +-+---+--+--+
> > | Wake rate limit | 0xA09C[31:16] | 0xA09C[15:0] | 0xA0A0[15:0] |
> > +-+---+--+--+
> > 
> > v2: - Tune Render and Media wake rate values according to some extra
> >   info I got from HW engineers. Value can be tuned, but for now
> >   these are the recommended values.
> > - Fix typos pointed by James.
> > 
> > Cc: Nathan Ciobanu 
> > Cc: Wayne Boyer 
> > Cc: Joe Konno 
> > Cc: David Weinehall 
> > Signed-off-by: Rodrigo Vivi 
> > Reviewed-by: James Ausmus 
> 
> I've verified that RC6 works with your patch applied.
> Minor comments below, but nothing major. Great work!
> 
> 
> Reviewed-by: David Weinehall 

thanks. merged to dinq.

> 
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h |  1 +
> >  drivers/gpu/drm/i915/intel_pm.c | 15 +++
> >  2 files changed, 12 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h 
> > b/drivers/gpu/drm/i915/i915_reg.h
> > index 68a58cce6ab1..f138eae82bf0 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -7905,6 +7905,7 @@ enum {
> >  #define GEN6_RC1_WAKE_RATE_LIMIT   _MMIO(0xA098)
> >  #define GEN6_RC6_WAKE_RATE_LIMIT   _MMIO(0xA09C)
> >  #define GEN6_RC6pp_WAKE_RATE_LIMIT _MMIO(0xA0A0)
> > +#define GEN10_MEDIA_WAKE_RATE_LIMIT_MMIO(0xA0A0)
> >  #define GEN6_RC_EVALUATION_INTERVAL_MMIO(0xA0A8)
> >  #define GEN6_RC_IDLE_HYSTERSIS _MMIO(0xA0AC)
> >  #define GEN6_RC_SLEEP  _MMIO(0xA0B0)
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c 
> > b/drivers/gpu/drm/i915/intel_pm.c
> > index 5fdae39b1969..742d5455b201 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -6605,12 +6605,19 @@ static void gen9_enable_rc6(struct drm_i915_private 
> > *dev_priv)
> > I915_WRITE(GEN6_RC_CONTROL, 0);
> >  
> > /* 2b: Program RC6 thresholds.*/
> > -
> > -   /* WaRsDoubleRc6WrlWithCoarsePowerGating: Doubling WRL only when CPG is 
> > enabled */
> > -   if (IS_SKYLAKE(dev_priv))
> > +   if (INTEL_GEN(dev_priv) >= 10) {
> > +   I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16 | 85);
> > +   I915_WRITE(GEN10_MEDIA_WAKE_RATE_LIMIT, 150);
> > +   } else if (IS_SKYLAKE(dev_priv)) {
> 
> How about:
> 
> } else if (NEEDS_WaRsDisableCoarsePowerGating(dev_priv)) {

I believe if IS_SKYLAKE(dev_priv) && *!* NEEDS_WaRsDisableCoarsePowerGating
since by name it seems WaRsDoubleRc6WrlWithCoarsePowerGating
is only needed with coarsepowergating on and the other one is disable
course power gating. right?

> 
> I realise that this isn't code you're introducing, but fixing it at the
> same time might make sense. We have a few other cases elsewhere with
> where we apply Coarse PG even though (at least according to that
> WA-test) we only need it on some Skylakes.

Since this would change the behaviour of the wa on few SKL skus
I believe it deserves a different patch.

Also on that patch we would need to check if we need to extend this
Wa to other gen9 platforms. I'd say we probably need this on kbl and cfl :/

Thanks,
Rodrigo.

> 
> > +   /*
> > +* WaRsDoubleRc6WrlWithCoarsePowerGating:skl Doubling WRL only
> > +* when CPG is enabled
> > +*/
> > I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 108 << 16);
> > -   else
> > +   } else {
> > I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16);
> > +   }
> > +
> > I915_WRITE(GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */
> > I915_WRITE(GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */
> > for_each_engine(engine, dev_priv, id)
> > -- 
> > 2.13.5
> > 
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[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [v2,1/2] drm: drm_vblank_cleanup: WARN when refcount > 0

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/2] drm: drm_vblank_cleanup: WARN when 
refcount > 0
URL   : https://patchwork.freedesktop.org/series/32561/
State : warning

== Summary ==

Series 32561v1 series starting with [v2,1/2] drm: drm_vblank_cleanup: WARN when 
refcount > 0
https://patchwork.freedesktop.org/api/1.0/series/32561/revisions/1/mbox/

Test gem_exec_reloc:
Subgroup basic-gtt-active:
dmesg-warn -> PASS   (fi-gdg-551) fdo#102582 +5
Subgroup basic-write-cpu-active:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-write-gtt-active:
skip   -> PASS   (fi-gdg-551) fdo#102582
Subgroup basic-softpin:
skip   -> PASS   (fi-gdg-551)
Test gem_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_sync:
Subgroup basic-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-many-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-store-each:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_fence_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_wait:
Subgroup basic-busy-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-wait-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-await-all:
skip   -> PASS   (fi-gdg-551)
Test kms_busy:
Subgroup basic-flip-a:
skip   -> PASS   (fi-gdg-551) fdo#102654 +1
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
skip   -> PASS   (fi-gdg-551) fdo#102618
Test drv_module_reload:
Subgroup basic-reload:
pass   -> DMESG-WARN (fi-blb-e6850)
pass   -> DMESG-WARN (fi-bwr-2160)
pass   -> DMESG-WARN (fi-elk-e7500)
pass   -> DMESG-WARN (fi-ilk-650)
pass   -> DMESG-WARN (fi-snb-2520m)
pass   -> DMESG-WARN (fi-snb-2600)
pass   -> DMESG-WARN (fi-ivb-3520m)
pass   -> DMESG-WARN (fi-ivb-3770)
pass   -> DMESG-WARN (fi-byt-j1900)
pass   -> DMESG-WARN (fi-byt-n2820)
pass   -> DMESG-WARN (fi-hsw-4770)
pass   -> DMESG-WARN (fi-hsw-4770r)
pass   -> DMESG-WARN (fi-bdw-5557u)
pass   -> DMESG-WARN (fi-bdw-gvtdvm)
pass   -> DMESG-WARN (fi-bsw-n3050)
pass   -> DMESG-WARN (fi-skl-6260u)
pass   -> DMESG-WARN (fi-skl-6700hq)
pass   -> DMESG-WARN (fi-skl-6700k)
pass   -> DMESG-WARN (fi-skl-6770hq)
pass   -> DMESG-WARN (fi-skl-gvtdvm)
pass   -> DMESG-WARN (fi-bxt-dsi)
pass   -> DMESG-WARN (fi-bxt-j4205)
pass   -> DMESG-WARN (fi-kbl-7500u)
pass   -> DMESG-WARN (fi-kbl-7560u)
pass   -> DMESG-WARN (fi-kbl-7567u)
pass   -> DMESG-WARN (fi-kbl-r)
pass   -> DMESG-WARN (fi-glk-1)
pass   -> DMESG-WARN (fi-glk-dsi)
pass   -> DMESG-WARN (fi-cnl-y)
Subgroup basic-no-display:
pass   -> DMESG-WARN (fi-gdg-551) fdo#102707 +1
pass   -> DMESG-WARN (fi-blb-e6850)
pass   -> DMESG-WARN (fi-bwr-2160)
pass   -> DMESG-WARN (fi-elk-e7500)
pass   -> DMESG-WARN (fi-ilk-650)
pass   -> DMESG-WARN (fi-snb-2520m)
pass   -> DMESG-WARN (fi-snb-2600)
pass   -> DMESG-WARN (fi-ivb-3520m)
pass   -> DMESG-WARN (fi-ivb-3770)
pass   -> DMESG-WARN (fi-byt-j1900)
pass   -> DMESG-WARN (fi-byt-n2820)
pass   -> DMESG-WARN (fi-hsw-4770)
pass   -> DMESG-WARN (fi-hsw-4770r)
pass   -> DMESG-WARN (fi-bdw-5557u)
pass   -> DMESG-WARN (fi-bdw-gvtdvm)
pass   -> DMESG-WARN (fi-bsw-n3050)
pass   -> DMESG-WARN (fi-skl-6260u)
pass   -> DMESG-WARN (fi-skl-6700hq)
pass   -> DMESG-WARN (fi-skl-6700k)
WARNING: Long output truncated

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: CNL DVFS thing (rev7)

[Patchwork]

== Series Details ==

Series: drm/i915: CNL DVFS thing (rev7)
URL   : https://patchwork.freedesktop.org/series/32247/
State : warning

== Summary ==

Series 32247v7 drm/i915: CNL DVFS thing
https://patchwork.freedesktop.org/api/1.0/series/32247/revisions/7/mbox/

Test gem_exec_reloc:
Subgroup basic-gtt-active:
dmesg-warn -> PASS   (fi-gdg-551) fdo#102582 +5
Subgroup basic-write-cpu-active:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-write-gtt-active:
skip   -> PASS   (fi-gdg-551) fdo#102582
Subgroup basic-softpin:
skip   -> PASS   (fi-gdg-551)
Test gem_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_sync:
Subgroup basic-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-many-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-store-each:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_fence_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_wait:
Subgroup basic-busy-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-wait-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-await-all:
skip   -> PASS   (fi-gdg-551)
Test kms_busy:
Subgroup basic-flip-a:
skip   -> PASS   (fi-gdg-551) fdo#102654 +1
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
skip   -> FAIL   (fi-gdg-551) fdo#102618
Test kms_pipe_crc_basic:
Subgroup nonblocking-crc-pipe-b:
pass   -> SKIP   (fi-hsw-4770r)
Test drv_module_reload:
Subgroup basic-reload:
pass   -> DMESG-WARN (fi-bsw-n3050)

fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:451s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:460s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:373s
fi-bsw-n3050 total:289  pass:242  dwarn:1   dfail:0   fail:0   skip:46  
time:510s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:262s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:501s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:492s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:491s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:475s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:554s
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:622s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:419s
fi-gdg-551   total:289  pass:177  dwarn:1   dfail:0   fail:2   skip:109 
time:256s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:575s
fi-glk-dsi   total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  
time:490s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:427s
fi-hsw-4770r total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:431s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:431s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:489s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:459s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:487s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:574s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:474s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:586s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:549s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:449s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:647s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   

[Intel-gfx] [PATCH v2 2/2] Test case for drm_vblank_cleanup refcount validation patch

[PrasannaKumar Muralidharan]

In i915 driver unload drm_vblank_get is added to test whether
drm_vblank_cleanup refcount validation patch is working.

Signed-off-by: PrasannaKumar Muralidharan 
---
Changes in v2:
Use drm_crtc_vblank_get instead of _put. In previous patch _put was wrongly
used.

 drivers/gpu/drm/i915/i915_drv.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 9f45cfe..4aee1c0 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1373,6 +1373,13 @@ void i915_driver_unload(struct drm_device *dev)
struct drm_i915_private *dev_priv = to_i915(dev);
struct pci_dev *pdev = dev_priv->drm.pdev;
 
+   enum pipe pipe;
+   for_each_pipe(dev_priv, pipe) {
+   struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv,
+ pipe);
+   drm_crtc_vblank_get(>base);
+   }
+
i915_driver_unregister(dev_priv);
 
if (i915_gem_suspend(dev_priv))
-- 
2.10.0

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[Intel-gfx] [PATCH v2 1/2] drm: drm_vblank_cleanup: WARN when refcount > 0

[PrasannaKumar Muralidharan]

Warn when refcount > 0 in drm_vblank_cleanup.

Signed-off-by: PrasannaKumar Muralidharan 
---
No change in v2.

 drivers/gpu/drm/drm_vblank.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/drm_vblank.c b/drivers/gpu/drm/drm_vblank.c
index 70f2b95..3e61aeb 100644
--- a/drivers/gpu/drm/drm_vblank.c
+++ b/drivers/gpu/drm/drm_vblank.c
@@ -405,6 +405,8 @@ void drm_vblank_cleanup(struct drm_device *dev)
for (pipe = 0; pipe < dev->num_crtcs; pipe++) {
struct drm_vblank_crtc *vblank = >vblank[pipe];
 
+   WARN_ON(atomic_read(>refcount) > 0);
+
WARN_ON(READ_ONCE(vblank->enabled) &&
drm_core_check_feature(dev, DRIVER_MODESET));
 
-- 
2.10.0

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Re: [Intel-gfx] [PATCH v2 1/1] drm/i915: Save PM interrupt register offsets in device info

[Chris Wilson]

Quoting Sagar Arun Kamble (2017-10-24 11:41:13)
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c 
> b/drivers/gpu/drm/i915/intel_device_info.c
> index 875d428..d1a4911 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -462,4 +462,15 @@ void intel_device_info_runtime_init(struct 
> drm_i915_private *dev_priv)
>  info->sseu.has_subslice_pg ? "y" : "n");
> DRM_DEBUG_DRIVER("has EU power gating: %s\n",
>  info->sseu.has_eu_pg ? "y" : "n");
> +
> +   /* Initialize PM interrupt register offsets */
> +   if (INTEL_GEN(dev_priv) >= 8) {
> +   info->pm_iir_offset = GEN8_GT_IIR(2);
> +   info->pm_imr_offset = GEN8_GT_IMR(2);
> +   info->pm_ier_offset = GEN8_GT_IER(2);
> +   } else {
> +   info->pm_iir_offset = GEN6_PMIIR;
> +   info->pm_imr_offset = GEN6_PMIMR;
> +   info->pm_ier_offset = GEN6_PMIER;
> +   }

If you are going to take another pass at this, move these into the
static tables in i915_pci.c

Updating GEN6_FEATURES and GEN8_FEATURES will then percolate into
individual platform defines.
-Chris
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[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915/perf: fix perf enable/disable ioctls with 32bits userspace

[Patchwork]

== Series Details ==

Series: drm/i915/perf: fix perf enable/disable ioctls with 32bits userspace
URL   : https://patchwork.freedesktop.org/series/32553/
State : warning

== Summary ==

Series 32553v1 drm/i915/perf: fix perf enable/disable ioctls with 32bits 
userspace
https://patchwork.freedesktop.org/api/1.0/series/32553/revisions/1/mbox/

Test gem_exec_reloc:
Subgroup basic-gtt-active:
dmesg-warn -> PASS   (fi-gdg-551) fdo#102582 +5
Subgroup basic-write-cpu-active:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-write-gtt-active:
skip   -> PASS   (fi-gdg-551) fdo#102582
Subgroup basic-softpin:
skip   -> PASS   (fi-gdg-551)
Test gem_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_sync:
Subgroup basic-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-many-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-store-each:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_fence_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_wait:
Subgroup basic-busy-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-wait-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-await-all:
skip   -> PASS   (fi-gdg-551)
Test kms_busy:
Subgroup basic-flip-a:
skip   -> PASS   (fi-gdg-551) fdo#102654 +1
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
skip   -> PASS   (fi-gdg-551) fdo#102618
Test kms_pipe_crc_basic:
Subgroup nonblocking-crc-pipe-c-frame-sequence:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup read-crc-pipe-a:
pass   -> SKIP   (fi-hsw-4770r)

fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:448s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:447s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:374s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:526s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:266s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:495s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:494s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:498s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:477s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:556s
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:596s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:418s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:252s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:583s
fi-glk-dsi   total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  
time:493s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:428s
fi-hsw-4770r total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:430s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:431s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:499s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:459s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:493s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:573s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:476s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:587s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:545s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:448s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:652s

Re: [Intel-gfx] [PATCH v2 1/1] drm/i915: Save PM interrupt register offsets in device info

[Sagar Arun Kamble]

On 10/24/2017 4:16 PM, Michal Wajdeczko wrote:
On Tue, 24 Oct 2017 12:41:13 +0200, Sagar Arun Kamble 
 wrote:


PM interrupt register offsets are constant per platforms and saving 
those

in device info is more appropriate than getting those through functions.
This patch removes functions gen6_pm_iir/imr/ier and saves those offsets
in device info.

v2: Use INTEL_INFO() to access device info. (Chris)

Suggested-by: Tvrtko Ursulin 
Signed-off-by: Sagar Arun Kamble 
Cc: Chris Wilson 
Cc: Tvrtko Ursulin 
Cc: Joonas Lahtinen 
---
 drivers/gpu/drm/i915/i915_drv.h  |  5 +
 drivers/gpu/drm/i915/i915_irq.c  | 31 
+--

 drivers/gpu/drm/i915/intel_device_info.c | 11 +++
 3 files changed, 25 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h 
b/drivers/gpu/drm/i915/i915_drv.h

index 54b5d4c..2f77d26 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -888,6 +888,11 @@ struct intel_device_info {
 u16 degamma_lut_size;
 u16 gamma_lut_size;
 } color;
+
+    /* PM interrupt register offsets */
+    i915_reg_t pm_iir_offset;
+    i915_reg_t pm_imr_offset;
+    i915_reg_t pm_ier_offset;
 };
struct intel_display_error_state;
diff --git a/drivers/gpu/drm/i915/i915_irq.c 
b/drivers/gpu/drm/i915/i915_irq.c

index b1296a5..5d448af 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -306,21 +306,6 @@ void gen5_disable_gt_irq(struct drm_i915_private 
*dev_priv, uint32_t mask)

 ilk_update_gt_irq(dev_priv, mask, 0);
 }
-static i915_reg_t gen6_pm_iir(struct drm_i915_private *dev_priv)
-{
-    return INTEL_GEN(dev_priv) >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR;
-}
-
-static i915_reg_t gen6_pm_imr(struct drm_i915_private *dev_priv)
-{
-    return INTEL_GEN(dev_priv) >= 8 ? GEN8_GT_IMR(2) : GEN6_PMIMR;
-}
-
-static i915_reg_t gen6_pm_ier(struct drm_i915_private *dev_priv)
-{
-    return INTEL_GEN(dev_priv) >= 8 ? GEN8_GT_IER(2) : GEN6_PMIER;
-}
-


btw, if you keep these functions but modify them into:

return INTEL_INFO(dev_priv)->pm_xxx_offset;

then most of below changes will not be needed

Yes. Will keep these functions.



 /**
  * snb_update_pm_irq - update GEN6_PMIMR
  * @dev_priv: driver private
@@ -332,6 +317,7 @@ static void snb_update_pm_irq(struct 
drm_i915_private *dev_priv,

   uint32_t enabled_irq_mask)
 {
 uint32_t new_val;
+    i915_reg_t reg = INTEL_INFO(dev_priv)->pm_imr_offset;


s/reg/imr ?

will remove this change since we are keeping gen6_pm* functions.



WARN_ON(enabled_irq_mask & ~interrupt_mask);
@@ -343,8 +329,8 @@ static void snb_update_pm_irq(struct 
drm_i915_private *dev_priv,

if (new_val != dev_priv->pm_imr) {
 dev_priv->pm_imr = new_val;
-    I915_WRITE(gen6_pm_imr(dev_priv), dev_priv->pm_imr);
-    POSTING_READ(gen6_pm_imr(dev_priv));
+    I915_WRITE(reg, dev_priv->pm_imr);
+    POSTING_READ(reg);
 }
 }
@@ -371,7 +357,7 @@ void gen6_mask_pm_irq(struct drm_i915_private 
*dev_priv, u32 mask)
static void gen6_reset_pm_iir(struct drm_i915_private *dev_priv, u32 
reset_mask)

 {
-    i915_reg_t reg = gen6_pm_iir(dev_priv);
+    i915_reg_t reg = INTEL_INFO(dev_priv)->pm_iir_offset;


s/reg/iir ?

will remove this as well.



lockdep_assert_held(_priv->irq_lock);
@@ -385,7 +371,7 @@ static void gen6_enable_pm_irq(struct 
drm_i915_private *dev_priv, u32 enable_mas

 lockdep_assert_held(_priv->irq_lock);
dev_priv->pm_ier |= enable_mask;
-    I915_WRITE(gen6_pm_ier(dev_priv), dev_priv->pm_ier);
+    I915_WRITE(INTEL_INFO(dev_priv)->pm_ier_offset, dev_priv->pm_ier);
 gen6_unmask_pm_irq(dev_priv, enable_mask);
 /* unmask_pm_irq provides an implicit barrier (POSTING_READ) */
 }
@@ -396,7 +382,7 @@ static void gen6_disable_pm_irq(struct 
drm_i915_private *dev_priv, u32 disable_m

dev_priv->pm_ier &= ~disable_mask;
 __gen6_mask_pm_irq(dev_priv, disable_mask);
-    I915_WRITE(gen6_pm_ier(dev_priv), dev_priv->pm_ier);
+    I915_WRITE(INTEL_INFO(dev_priv)->pm_ier_offset, dev_priv->pm_ier);
 /* though a barrier is missing here, but don't really need a one */
 }
@@ -417,7 +403,8 @@ void gen6_enable_rps_interrupts(struct 
drm_i915_private *dev_priv)

spin_lock_irq(_priv->irq_lock);
 WARN_ON_ONCE(rps->pm_iir);
-    WARN_ON_ONCE(I915_READ(gen6_pm_iir(dev_priv)) & 
dev_priv->pm_rps_events);

+ WARN_ON_ONCE(I915_READ(INTEL_INFO(dev_priv)->pm_iir_offset) &
+   dev_priv->pm_rps_events);


Can you define separate iir_reg variable as in above functions to 
simplify

this nested statement ?

and this as well.



 rps->interrupts_enabled = true;
 gen6_enable_pm_irq(dev_priv, dev_priv->pm_rps_events);
@@ -461,7 +448,7 @@ void gen9_enable_guc_interrupts(struct 
drm_i915_private 

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] lib/i915: Add a query for when the guc is enabled.

[Patchwork]

== Series Details ==

Series: series starting with [1/2] lib/i915: Add a query for when the guc is 
enabled.
URL   : https://patchwork.freedesktop.org/series/32554/
State : failure

== Summary ==

IGT patchset tested on top of latest successful build
cf6b5a4221e3e8d14dd39011a746e5be909e5928 lib/igt_kms: Only print changed mode 
objects during atomic commit.

with latest DRM-Tip kernel build CI_DRM_3277
bcee836068d9 drm-tip: 2017y-10m-24d-15h-00m-14s UTC integration manifest

No testlist changes.

Test gem_exec_reloc:
Subgroup basic-gtt-active:
dmesg-warn -> PASS   (fi-gdg-551) fdo#102582 +5
Subgroup basic-write-cpu-active:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-write-gtt-active:
skip   -> PASS   (fi-gdg-551) fdo#102582
Subgroup basic-softpin:
skip   -> PASS   (fi-gdg-551)
Test gem_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_sync:
Subgroup basic-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-many-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-store-each:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_fence_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_wait:
Subgroup basic-busy-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-wait-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-await-all:
skip   -> PASS   (fi-gdg-551)
Test kms_busy:
Subgroup basic-flip-a:
skip   -> PASS   (fi-gdg-551) fdo#102654 +1
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
skip   -> FAIL   (fi-gdg-551) fdo#102618
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
pass   -> INCOMPLETE (fi-cnl-y)

fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:443s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:455s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:373s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:529s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:265s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:503s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:497s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:495s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:487s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:551s
fi-cnl-y total:289  pass:221  dwarn:0   dfail:0   fail:0   skip:24 
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:418s
fi-gdg-551   total:289  pass:176  dwarn:1   dfail:0   fail:3   skip:109 
time:260s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:587s
fi-glk-dsi   total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  
time:492s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:435s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:428s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:434s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:496s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:459s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:485s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:571s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:475s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:584s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:546s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:451s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Convert timers to use timer_setup()

[Chris Wilson]

Quoting Kees Cook (2017-10-24 16:13:44)
> In preparation for unconditionally passing the struct timer_list pointer to
> all timer callbacks, switch to using the new timer_setup() and from_timer()
> to pass the timer pointer explicitly.
> 
> Cc: Jani Nikula 
> Cc: Joonas Lahtinen 
> Cc: Rodrigo Vivi 
> Cc: David Airlie 
> Cc: Tvrtko Ursulin 
> Cc: Chris Wilson 
> Cc: intel-gfx@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org
> Signed-off-by: Kees Cook 

Thank you for saving me from having to do this myself,
Reviewed-by: Chris Wilson 
-Chris
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Re: [Intel-gfx] [PATCH 2/2] drm/i915/dp: Use common error handling code in intel_dp_sink_crc_stop()

[Jani Nikula]

On Tue, 24 Oct 2017, SF Markus Elfring  wrote:
> From: Markus Elfring 
> Date: Tue, 24 Oct 2017 15:40:47 +0200
>
> Adjust jump targets so that a specific error code assignment
> will be in the implementation only at the end of this function.

This is not an issue that needs to be "fixed".

>
> This issue was detected by using the Coccinelle software.
>
> Signed-off-by: Markus Elfring 
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 30 ++
>  1 file changed, 14 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 342f1a1fa085..3dd514a77008 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3894,27 +3894,19 @@ static int intel_dp_sink_crc_stop(struct intel_dp 
> *intel_dp)
>   int count = 0;
>   int attempts = 10;
>  
> - if (drm_dp_dpcd_readb(_dp->aux, DP_TEST_SINK, ) < 0) {
> - DRM_DEBUG_KMS("Sink CRC couldn't be stopped properly\n");
> - ret = -EIO;
> - goto out;
> - }
> + if (drm_dp_dpcd_readb(_dp->aux, DP_TEST_SINK, ) < 0)
> + goto report_failure;
>  
>   if (drm_dp_dpcd_writeb(_dp->aux, DP_TEST_SINK,
> -buf & ~DP_TEST_SINK_START) < 0) {
> - DRM_DEBUG_KMS("Sink CRC couldn't be stopped properly\n");
> - ret = -EIO;
> - goto out;

I'd rather change the debug messages to distinguish the cases. I also
want to keep ret = -EIO in each individual branch, to distinguish from
the cases where it's set to something other than -EIO.

> - }
> +buf & ~DP_TEST_SINK_START) < 0)
> + goto report_failure;
>  
>   do {
>   intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
> + if (drm_dp_dpcd_readb(_dp->aux, DP_TEST_SINK_MISC, )
> + < 0)
> + goto e_io;
>  
> - if (drm_dp_dpcd_readb(_dp->aux,
> -   DP_TEST_SINK_MISC, ) < 0) {
> - ret = -EIO;
> - goto out;
> - }

This is good as it is. The change makes it worse.

>   count = buf & DP_TEST_COUNT_MASK;
>   } while (--attempts && count);
>  
> @@ -3923,9 +3915,15 @@ static int intel_dp_sink_crc_stop(struct intel_dp 
> *intel_dp)
>   ret = -ETIMEDOUT;
>   }
>  
> - out:
> +enable_ips:
>   hsw_enable_ips(intel_crtc);
>   return ret;
> +
> +report_failure:
> + DRM_DEBUG_KMS("Sink CRC couldn't be stopped properly\n");
> +e_io:
> + ret = -EIO;
> + goto enable_ips;

*shudder* Please no.

BR,
Jani.

>  }
>  
>  static int intel_dp_sink_crc_start(struct intel_dp *intel_dp)

-- 
Jani Nikula, Intel Open Source Technology Center
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[Intel-gfx] ✗ Fi.CI.BAT: failure for lib/igt_kms: Only print changed mode objects during atomic commit.

[Patchwork]

== Series Details ==

Series: lib/igt_kms: Only print changed mode objects during atomic commit.
URL   : https://patchwork.freedesktop.org/series/32360/
State : failure

== Summary ==

Series 32360 revision 1 was fully merged or fully failed: no git log

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_394/
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Re: [Intel-gfx] [PATCH v7 2/4] drm/i915/guc : Removing i915_modparams.enable_guc_loading module parameter

[Sujaritha]

On 10/18/2017 04:53 AM, Michal Wajdeczko wrote:
On Wed, 18 Oct 2017 00:50:47 +0200, Sujaritha Sundaresan 
 wrote:



We currently have two module parameters that control GuC:
"enable_guc_loading" and "enable_guc_submission". Whenever
we need i915_modparams.enable_guc_submission=1, we also need
enable_guc_loading=1. We also need enable_guc_loading=1 when
we want to verify the HuC, which is every time we have a HuC
(but all platforms with HuC have a GuC and viceversa).

v2: Clarifying the commit message (Anusha)

v3: Unify seq_puts messages, Re-factoring code as per review (Michal)

v4: Rebase

v5: Separating message unification into a separate patch

v6: Re-factoring code (Sagar, Michal)
    Rebase

v7: Applying review comments (Sagar)
    Rebase

Suggested by: Oscar Mateo 
Signed-off-by: Sujaritha Sundaresan 
Cc: Michal Wajdeczko 
Cc: Sagar Arun Kamble 
Cc: Anusha Srivatsa 
Cc: Oscar Mateo 
---
 drivers/gpu/drm/i915/i915_debugfs.c |  6 +--
 drivers/gpu/drm/i915/i915_drv.h |  9 +++--
 drivers/gpu/drm/i915/i915_gem_context.c |  2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c |  2 +-
 drivers/gpu/drm/i915/i915_irq.c |  2 +-
 drivers/gpu/drm/i915/i915_params.c  |  4 --
 drivers/gpu/drm/i915/i915_params.h  |  1 -
 drivers/gpu/drm/i915/intel_uc.c | 69 
++---

 drivers/gpu/drm/i915/intel_uncore.c |  3 +-
 9 files changed, 50 insertions(+), 48 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c

index ac25d63..bc31769 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2361,7 +2361,7 @@ static int i915_huc_load_status_info(struct 
seq_file *m, void *data)

 struct drm_i915_private *dev_priv = node_to_i915(m->private);
 struct intel_uc_fw *huc_fw = _priv->huc.fw;
-    if (!HAS_HUC_UCODE(dev_priv)) {
+    if (!HAS_GUC(dev_priv)) {
 seq_puts(m, "not supported\n");
 return 0;
 }
@@ -2397,7 +2397,7 @@ static int i915_guc_load_status_info(struct 
seq_file *m, void *data)

 struct intel_uc_fw *guc_fw = _priv->guc.fw;
 u32 tmp, i;
-    if (!HAS_GUC_UCODE(dev_priv)) {
+    if (!HAS_GUC(dev_priv)) {
 seq_puts(m, "not supported\n");
 return 0;
 }
@@ -2496,7 +2496,7 @@ static bool check_guc_submission(struct 
seq_file *m)

if (!guc->execbuf_client) {
 seq_printf(m, "GuC submission %s\n",
-   HAS_GUC_SCHED(dev_priv) ?
+   HAS_GUC(dev_priv) ?
    "disabled" :
    "not supported");


Btw, there is also 3rd case: "failed" when we have Guc, but something 
went

wrong with fw loading or enabling...


 return false;
diff --git a/drivers/gpu/drm/i915/i915_drv.h 
b/drivers/gpu/drm/i915/i915_drv.h

index dd141b2..5b9bdd0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3201,9 +3201,12 @@ static inline unsigned int 
i915_sg_segment_size(void)

  */
 #define HAS_GUC(dev_priv)    ((dev_priv)->info.has_guc)
 #define HAS_GUC_CT(dev_priv) ((dev_priv)->info.has_guc_ct)
-#define HAS_GUC_UCODE(dev_priv)    (HAS_GUC(dev_priv))
-#define HAS_GUC_SCHED(dev_priv)    (HAS_GUC(dev_priv))
-#define HAS_HUC_UCODE(dev_priv)    (HAS_GUC(dev_priv))
+#define HAS_GUC_UCODE(dev_priv) ((dev_priv)->guc.fw.path != NULL)
+#define HAS_HUC_UCODE(dev_priv) ((dev_priv)->huc.fw.path != NULL)
+
+#define NEEDS_GUC_LOADING(dev_priv) \
+    (HAS_GUC(dev_priv) && \
+    (i915_modparams.enable_guc_submission || HAS_HUC_UCODE(dev_priv)))


Hmm, so by the moment we add huc fw definition to the driver we will
enable guc loading, and as huc is always present with guc, this will
silently enable guc loading for all platforms with guc(huc) and there
will be no option to turn this off ...

What if we don't care about Huc functionality ?

If there will be Huc fw, both guc and huc will be loaded.
If there will be no Huc fw on the system (but it will be defined in 
driver)
then we will generate errors from Huc firware loading, and likely try 
to load

Guc firmware for no purpose ...



Yes that is true. So if the user wants to avoid the GuC firmware from 
getting loaded,
they must not have a HuC firmware to be loaded; in addition to not using 
submission.
I think if this is included in the commit message, it will make things 
clearer.
#define HAS_RESOURCE_STREAMER(dev_priv) 
((dev_priv)->info.has_resource_streamer)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c 
b/drivers/gpu/drm/i915/i915_gem_context.c

index 5bf96a2..692d609 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -314,7 +314,7 @@ static u32 default_desc_template(const struct 
drm_i915_private *i915,
  * present or not in use we still need a small bias as 

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/perf: fix perf enable/disable ioctls with 32bits userspace

[Patchwork]

== Series Details ==

Series: drm/i915/perf: fix perf enable/disable ioctls with 32bits userspace
URL   : https://patchwork.freedesktop.org/series/32553/
State : failure

== Summary ==

Series 32553v1 drm/i915/perf: fix perf enable/disable ioctls with 32bits 
userspace
https://patchwork.freedesktop.org/api/1.0/series/32553/revisions/1/mbox/

Test gem_exec_reloc:
Subgroup basic-cpu-active:
pass   -> FAIL   (fi-gdg-551) fdo#102582 +6
Subgroup basic-write-cpu-active:
skip   -> FAIL   (fi-gdg-551)
Subgroup basic-write-gtt-active:
skip   -> FAIL   (fi-gdg-551) fdo#102582
Subgroup basic-softpin:
skip   -> PASS   (fi-gdg-551)
Test gem_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_linear_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_render_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_sync:
Subgroup basic-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-many-each:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-store-each:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_tiled_fence_blits:
Subgroup basic:
skip   -> PASS   (fi-gdg-551)
Test gem_wait:
Subgroup basic-busy-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-wait-all:
skip   -> PASS   (fi-gdg-551)
Subgroup basic-await-all:
skip   -> PASS   (fi-gdg-551)
Test kms_busy:
Subgroup basic-flip-a:
skip   -> PASS   (fi-gdg-551) fdo#102654 +1
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
skip   -> PASS   (fi-gdg-551) fdo#102618
Test pm_rpm:
Subgroup basic-pci-d3-state:
pass   -> DMESG-WARN (fi-kbl-7567u)

fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:444s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:446s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:371s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:538s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:263s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:495s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:499s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:496s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:481s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:551s
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:613s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:420s
fi-gdg-551   total:289  pass:171  dwarn:1   dfail:0   fail:8   skip:109 
time:248s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:578s
fi-glk-dsi   total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  
time:488s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:429s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:434s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:441s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:492s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:458s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:491s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:575s
fi-kbl-7567u total:289  pass:268  dwarn:1   dfail:0   fail:0   skip:20  
time:477s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:583s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:544s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:452s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:645s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:516s
fi-skl-6770hqtotal:289  

[Intel-gfx] ✓ Fi.CI.IGT: success for igt/kms_rotation_crc: Add horizontal flip subtest. (rev2)

[Patchwork]

== Series Details ==

Series: igt/kms_rotation_crc: Add horizontal flip subtest. (rev2)
URL   : https://patchwork.freedesktop.org/series/31407/
State : success

== Summary ==

Test kms_busy:
Subgroup extended-modeset-hang-oldfb-with-reset-render-B:
dmesg-warn -> PASS   (shard-hsw) fdo#102249 +3
Subgroup extended-modeset-hang-newfb-with-reset-render-B:
pass   -> DMESG-WARN (shard-hsw) fdo#103038
Test drv_module_reload:
Subgroup basic-no-display:
pass   -> DMESG-WARN (shard-hsw) fdo#102707 +1
Test kms_flip:
Subgroup wf_vblank-ts-check-interruptible:
pass   -> FAIL   (shard-hsw) fdo#100368
Test perf:
Subgroup polling:
fail   -> PASS   (shard-hsw) fdo#102252

fdo#102249 https://bugs.freedesktop.org/show_bug.cgi?id=102249
fdo#103038 https://bugs.freedesktop.org/show_bug.cgi?id=103038
fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252

shard-hswtotal:2560 pass:1430 dwarn:4   dfail:0   fail:9   skip:1117 
time:9104s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_403/shards.html
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/execlists: Remove the priority "optimisation"

[Patchwork]

== Series Details ==

Series: drm/i915/execlists: Remove the priority "optimisation"
URL   : https://patchwork.freedesktop.org/series/32533/
State : failure

== Summary ==

Series 32533 revision 1 was fully merged or fully failed: no git log

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6159/
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Bump wait-times for the final CS interrupt before parking

[Patchwork]

== Series Details ==

Series: drm/i915: Bump wait-times for the final CS interrupt before parking
URL   : https://patchwork.freedesktop.org/series/32468/
State : failure

== Summary ==

Series 32468 revision 1 was fully merged or fully failed: no git log

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6141/
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[Intel-gfx] [PATCH i-g-t] HAX: Find CRC failures more reliably

[Maarten Lankhorst]

Signed-off-by: Maarten Lankhorst 
---
 lib/igt_debugfs.c | 39 ++-
 1 file changed, 10 insertions(+), 29 deletions(-)

diff --git a/lib/igt_debugfs.c b/lib/igt_debugfs.c
index 8b33b478a9a9..92788b18b19f 100644
--- a/lib/igt_debugfs.c
+++ b/lib/igt_debugfs.c
@@ -582,20 +582,14 @@ static void pipe_crc_exit_handler(int sig)
  */
 void igt_require_pipe_crc(int fd)
 {
-   const char *cmd = "pipe A none";
-   int ctl, written;
-
-   ctl = igt_debugfs_open(fd, "crtc-0/crc/control", O_RDONLY);
-   if (ctl < 0) {
-   ctl = igt_debugfs_open(fd, "i915_display_crc_ctl", O_WRONLY);
-   igt_require_f(ctl,
- "No display_crc_ctl found, kernel too old\n");
-
-   written = write(ctl, cmd, strlen(cmd));
-   igt_require_f(written < 0,
- "CRCs not supported on this platform\n");
-   }
-   close(ctl);
+   int dir;
+   struct stat stat;
+
+   dir = igt_debugfs_dir(fd);
+   igt_assert(dir >= 0);
+   igt_assert_eq(fstatat(dir, "crtc-0/crc/control", , 0), 0);
+
+   close(dir);
 }
 
 static void igt_hpd_storm_exit_handler(int sig)
@@ -735,22 +729,9 @@ pipe_crc_new(int fd, enum pipe pipe, enum 
intel_pipe_crc_source source, int flag
 
sprintf(buf, "crtc-%d/crc/control", pipe);
pipe_crc->ctl_fd = openat(debugfs, buf, O_WRONLY);
-   if (pipe_crc->ctl_fd == -1) {
-   pipe_crc->ctl_fd = openat(debugfs,
- "i915_display_crc_ctl", O_WRONLY);
-   igt_assert(pipe_crc->ctl_fd != -1);
-   pipe_crc->is_legacy = true;
-   }
+   igt_assert(pipe_crc->ctl_fd != -1);
 
-   if (pipe_crc->is_legacy) {
-   sprintf(buf, "i915_pipe_%s_crc", kmstest_pipe_name(pipe));
-   pipe_crc->crc_fd = openat(debugfs, buf, flags);
-   igt_assert(pipe_crc->crc_fd != -1);
-   igt_debug("Using legacy frame CRC ABI\n");
-   } else {
-   pipe_crc->crc_fd = -1;
-   igt_debug("Using generic frame CRC ABI\n");
-   }
+   igt_debug("Using generic frame CRC ABI\n");
 
pipe_crc->fd = fd;
pipe_crc->dir = debugfs;
-- 
2.14.1

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Re: [Intel-gfx] [PATCH] drm/i915/perf: fix perf enable/disable ioctls with 32bits userspace

[Chris Wilson]

Quoting Lionel Landwerlin (2017-10-24 16:27:28)
> The compat callback was missing and triggered failures in 32bits
> userspace when enabling/disable the perf stream. We don't require any
> particular processing here as these ioctls don't take any argument.
> 
> Signed-off-by: Lionel Landwerlin 
> Fixes: eec688e1420 ("drm/i915: Add i915 perf infrastructure")
> Cc: linux-stable 
Reviewed-by: Chris Wilson 
-Chris
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[Intel-gfx] [PATCH] drm/i915/perf: fix perf enable/disable ioctls with 32bits userspace

[Lionel Landwerlin]

The compat callback was missing and triggered failures in 32bits
userspace when enabling/disable the perf stream. We don't require any
particular processing here as these ioctls don't take any argument.

Signed-off-by: Lionel Landwerlin 
Fixes: eec688e1420 ("drm/i915: Add i915 perf infrastructure")
Cc: linux-stable 
---
 drivers/gpu/drm/i915/i915_perf.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 1383a2995a69..59ee808f8fd9 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -2537,6 +2537,10 @@ static const struct file_operations fops = {
.poll   = i915_perf_poll,
.read   = i915_perf_read,
.unlocked_ioctl = i915_perf_ioctl,
+   /* Our ioctl have no arguments, so it's safe to use the same function
+* to handle 32bits compatibility.
+*/
+   .compat_ioctl   = i915_perf_ioctl,
 };
 
 
-- 
2.15.0.rc2

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[Intel-gfx] [PATCH igt 1/2] lib/i915: Add a query for when the guc is enabled.

[Chris Wilson]

Signed-off-by: Chris Wilson 
Cc: Michał Winiarski 
---
 lib/i915/gem_submission.c | 12 
 lib/i915/gem_submission.h |  1 +
 2 files changed, 13 insertions(+)

diff --git a/lib/i915/gem_submission.c b/lib/i915/gem_submission.c
index efc3151f..2a57e7ab 100644
--- a/lib/i915/gem_submission.c
+++ b/lib/i915/gem_submission.c
@@ -126,3 +126,15 @@ bool gem_has_execlists(int fd)
 {
return gem_submission_method(fd) & GEM_SUBMISSION_EXECLISTS;
 }
+
+/**
+ * gem_has_guc_submission:
+ * @fd: open i915 drm file descriptor
+ *
+ * Feature test macro to query whether the driver is using the GuC as a
+ * hardware submission method.
+ */
+bool gem_has_guc_submission(int fd)
+{
+   return gem_submission_method(fd) & GEM_SUBMISSION_GUC;
+}
diff --git a/lib/i915/gem_submission.h b/lib/i915/gem_submission.h
index 783ed7a0..4f588aec 100644
--- a/lib/i915/gem_submission.h
+++ b/lib/i915/gem_submission.h
@@ -31,5 +31,6 @@ unsigned gem_submission_method(int fd);
 void gem_submission_print_method(int fd);
 bool gem_has_semaphores(int fd);
 bool gem_has_execlists(int fd);
+bool gem_has_guc_submission(int fd);
 
 #endif /* GEM_SUBMISSION_H */
-- 
2.15.0.rc1

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[Intel-gfx] [PATCH igt 2/2] igt/drv_misssed_irq: Skip on guc

[Chris Wilson]

Since the driver's guc submission method requires the breadcrumbs irq
for feeding requests to the guc, we cannot simply simulate a missing irq
by disabling the interrupts.

Signed-off-by: Chris Wilson 
Cc: Michał Winiarski 
---
 tests/drv_missed_irq.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/drv_missed_irq.c b/tests/drv_missed_irq.c
index 10328b2b..68356a24 100644
--- a/tests/drv_missed_irq.c
+++ b/tests/drv_missed_irq.c
@@ -97,6 +97,7 @@ igt_simple_main
 
device = drm_open_driver(DRIVER_INTEL);
igt_require_gem(device);
+   igt_require(!gem_has_guc_submission(device)); /* irq forced for guc */
gem_require_mmap_wc(device);
igt_fork_hang_detector(device);
 
-- 
2.15.0.rc1

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[Intel-gfx] ✗ Fi.CI.IGT: warning for igt/lib: Ignoring subtest name case

[Patchwork]

== Series Details ==

Series: igt/lib: Ignoring subtest name case
URL   : https://patchwork.freedesktop.org/series/32529/
State : warning

== Summary ==

Test drv_module_reload:
Subgroup basic-reload-inject:
dmesg-warn -> PASS   (shard-hsw) fdo#102707
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-render:
pass   -> SKIP   (shard-hsw)
Subgroup fbc-1p-primscrn-pri-shrfb-draw-render:
pass   -> SKIP   (shard-hsw)
Test perf:
Subgroup polling:
fail   -> PASS   (shard-hsw) fdo#102252
Test kms_busy:
Subgroup extended-modeset-hang-newfb-with-reset-render-B:
pass   -> DMESG-WARN (shard-hsw) fdo#103038
Subgroup extended-modeset-hang-oldfb-with-reset-render-B:
dmesg-warn -> PASS   (shard-hsw) fdo#102249 +1

fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#103038 https://bugs.freedesktop.org/show_bug.cgi?id=103038
fdo#102249 https://bugs.freedesktop.org/show_bug.cgi?id=102249

shard-hswtotal:2540 pass:1432 dwarn:1   dfail:0   fail:8   skip:1099 
time:9238s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_402/shards.html
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[Intel-gfx] [PATCH] drm/i915/selftests: Convert timers to use timer_setup()

[Kees Cook]

In preparation for unconditionally passing the struct timer_list pointer to
all timer callbacks, switch to using the new timer_setup() and from_timer()
to pass the timer pointer explicitly.

Cc: Jani Nikula 
Cc: Joonas Lahtinen 
Cc: Rodrigo Vivi 
Cc: David Airlie 
Cc: Tvrtko Ursulin 
Cc: Chris Wilson 
Cc: intel-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Kees Cook 
---
 drivers/gpu/drm/i915/selftests/lib_sw_fence.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/selftests/lib_sw_fence.c 
b/drivers/gpu/drm/i915/selftests/lib_sw_fence.c
index 3790fdf44a1a..b26f07b55d86 100644
--- a/drivers/gpu/drm/i915/selftests/lib_sw_fence.c
+++ b/drivers/gpu/drm/i915/selftests/lib_sw_fence.c
@@ -49,9 +49,9 @@ void onstack_fence_fini(struct i915_sw_fence *fence)
i915_sw_fence_fini(fence);
 }
 
-static void timed_fence_wake(unsigned long data)
+static void timed_fence_wake(struct timer_list *t)
 {
-   struct timed_fence *tf = (struct timed_fence *)data;
+   struct timed_fence *tf = from_timer(tf, t, timer);
 
i915_sw_fence_commit(>fence);
 }
@@ -60,7 +60,7 @@ void timed_fence_init(struct timed_fence *tf, unsigned long 
expires)
 {
onstack_fence_init(>fence);
 
-   setup_timer_on_stack(>timer, timed_fence_wake, (unsigned long)tf);
+   timer_setup_on_stack(>timer, timed_fence_wake, 0);
 
if (time_after(expires, jiffies))
mod_timer(>timer, expires);
-- 
2.7.4


-- 
Kees Cook
Pixel Security
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Re: [Intel-gfx] [PATCH i-g-t] lib/igt_kms: Only print changed mode objects during atomic commit.

[Maarten Lankhorst]

Op 24-10-17 om 14:34 schreef Petri Latvala:
> On Fri, Oct 20, 2017 at 03:23:57PM +0200, Maarten Lankhorst wrote:
>> When we only print mode objects that have changed properties, we
>> reduce a lot of the spam. Fortuantely we have a single bitfield
>> now that gets printed when something is changed. Use that to decrease
>> the amount of spam.
>
> s/Fortuantely/Fortunately/
Fixed, thanks for catching it!
>
>> Signed-off-by: Maarten Lankhorst 
> Reviewed-by: Petri Latvala 

Thanks, pushed. :)

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Re: [Intel-gfx] [PATCH i-g-t] tests/kms_atomic_transition: Make tests pass

[Maarten Lankhorst]

Op 24-10-17 om 14:10 schreef Petri Latvala:
> On Mon, Oct 23, 2017 at 12:15:34PM +0200, Maarten Lankhorst wrote:
>> Op 23-10-17 om 11:35 schreef Petri Latvala:
>>>
>>> On Fri, Oct 20, 2017 at 03:24:15PM +0200, Maarten Lankhorst wrote:
>>>
>>> Subject: [Intel-gfx] [PATCH i-g-t] tests/kms_atomic_transition: Make tests 
>>> pass
>>>
>>>
>>> You have an excellent explanation of what this patch does in the long
>>> description, and yet this short description says nothing of value.
>>>
>>>
>>>
>> Is this patch good with subject: 'tests/kms_atomic_transition: Do not update 
>> unbound planes'?
>>
> LGTM.
>
> Explain the change of making fd_completed() call conditional too in
> the commit message and
>
> Reviewed-by: Petri Latvala 

Thanks, pushed. :)

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Re: [Intel-gfx] [PATCH] drm/i915/execlists: Remove the priority "optimisation"

[Chris Wilson]

Quoting Michał Winiarski (2017-10-24 13:26:59)
> On Tue, Oct 24, 2017 at 12:55:01PM +0100, Chris Wilson wrote:
> > Originally we set the priority to max upon inserting the request into
> > the execlists queue (and removing it from the scheduler lists). We could
> > then use the prio==INT_MAX as a shortcut within execlists_schedule() to
> > detect the end of the dependency chain. Since commit 1f181225f8ec
> > ("drm/i915/execlists: Keep request->priority for its lifetime") this is
> > no longer true as we use the request completion as an indicator the
> > schedule dependency chain is complete instead. (This allows us to then
> > reschedule requests even when its context is in flight.) However, this
> > makes the GEM_BUG_ON() inside execlists_schedule() racy as we may change
> > the rq->prio at the same time. As the assertion is useful, let's keep
> > the assertion and remove the micro-optimisation.
> > 
> > Fixes: 1f181225f8ec ("drm/i915/execlists: Keep request->priority for its 
> > lifetime")
> > Signed-off-by: Chris Wilson 
> > Cc: Michał Winiarski 
> > Cc: Joonas Lahtinen 
> 
> Reviewed-by: Michał Winiarski 

And pushed, thanks for the poke.
-Chris
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Re: [Intel-gfx] drm/i915/gvt: Use common error handling code in shadow_workload_ring_buffer()

[SF Markus Elfring]

>> Do you prefer to delegate the proposed software refactoring
>> only to a corresponding optimiser?
> 
> yes.

Will any applications around the semantic patch language
(Coccinelle software) fit also in the preferred tool category?

Regards,
Markus
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Re: [Intel-gfx] [PATCH 4/4] warn

[Chris Wilson]

Quoting Mika Kuoppala (2017-10-24 15:46:27)
> Chris Wilson  writes:
> 
> > ---
> >  drivers/gpu/drm/i915/i915_irq.c | 3 +++
> >  1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c 
> > b/drivers/gpu/drm/i915/i915_irq.c
> > index f8205841868b..e4bd20ce031d 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -1391,6 +1391,9 @@ gen8_cs_irq_handler(struct intel_engine_cs *engine, 
> > u32 iir, int test_shift)
> >   if (READ_ONCE(engine->execlists.active)) {
> >   __set_bit(ENGINE_IRQ_EXECLIST, >irq_posted);
> >   tasklet = true;
> > + } else if (WARN_ON(!engine->i915->gt.awake)) {
> 
> READ_ONCE

Sure. Too bad this patch is just a figment of your imagination.

Pushed the rest, hopefully ending the plague of random deaths.
Thanks for the review,
-Chris
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[Intel-gfx] ✗ Fi.CI.BAT: failure for igt/gem_ctx_isolation: Check isolation of registers between contexts (rev3)

[Patchwork]

== Series Details ==

Series: igt/gem_ctx_isolation: Check isolation of registers between contexts 
(rev3)
URL   : https://patchwork.freedesktop.org/series/32531/
State : failure

== Summary ==

IGT patchset build failed on latest successful build
e5f7fac9f120b0dcbf370c681b8872b8c29bf890 meson: intel_dp_compliance depends on 
libudev

The Meson build system
Version: 0.40.1
Source dir: /home/cidrm/intel-gpu-tools
Build dir: /home/cidrm/intel-gpu-tools/build
Build type: native build
Project name: IGT gpu tests
Native c compiler: ccache cc (gcc 6.3.0)
Build machine cpu family: x86_64
Build machine cpu: x86_64
Compiler for c supports argument -Wno-unused-parameter: YES
Compiler for c supports argument -Wno-sign-compare: YES
Compiler for c supports argument -Wno-missing-field-initializers: YES
Compiler for c supports argument -Wno-clobbered: YES
Compiler for c supports argument -Wno-type-limits: YES
Compiler for c supports argument -Wimplicit-fallthrough=0: NO
Found pkg-config: /usr/bin/pkg-config (0.29.1)
Native dependency libdrm found: YES 2.4.85
Native dependency libdrm_intel found: YES 2.4.85
Dependency libdrm_vc4 found: NO
Dependency libdrm_nouveau found: NO
Dependency libdrm_amdgpu found: NO
Native dependency pciaccess found: YES 0.13.4
Native dependency libkmod found: YES 22
Native dependency libprocps found: YES 3.3.12
Native dependency cairo found: YES 1.14.8
Native dependency libudev found: YES 232
Native dependency glib-2.0 found: YES 2.52.0
Native dependency libunwind found: YES 1.1
Native dependency gsl found: YES 2.3
Dependency alsa found: NO
Native dependency pixman-1 found: YES 0.34.0
Dependency xmlrpc found: NO
Dependency xmlrpc_util found: NO
Dependency xmlrpc_client found: NO
Program xmlrpc-c-config found: YES (/usr/bin/xmlrpc-c-config)
Dependency threads found: YES
Library m found: YES
Library rt found: YES
Library dl found: YES
Library z found: YES
Has header "linux/kd.h": YES
Has header "sys/kd.h": YES
Has header "libgen.h": YES
Has header "sys/io.h": YES
Has header "cpuid.h": YES
Checking whether type "struct sysinfo" has member "totalram": YES
Configuring config.h using configuration
Program generate_testlist.sh found: YES 
(/home/cidrm/intel-gpu-tools/tests/generate_testlist.sh)
Program igt_command_line.sh found: YES 
(/home/cidrm/intel-gpu-tools/tests/igt_command_line.sh)
Configuring intel_aubdump using configuration
Program flex found: YES (/usr/bin/flex)
Program bison found: YES (/usr/bin/bison)
Configuring intel-gen4asm.pc using configuration
Program test/run-test.sh found: YES (/bin/sh 
/home/cidrm/intel-gpu-tools/assembler/test/run-test.sh)
Native dependency xv found: YES 1.0.11
Native dependency x11 found: YES 1.6.4
Native dependency xext found: YES 1.3.3
Native dependency dri2proto found: YES 2.8
Native dependency cairo-xlib found: YES 1.14.8
Dependency xrandr found: NO
Configuring defs.rst using configuration
Program rst2man found: YES (/usr/bin/rst2man)
Program rst2man.sh found: YES (/home/cidrm/intel-gpu-tools/man/rst2man.sh)
Build targets in project: 369
ninja: Entering directory `build'
[1/743] Compiling c object 
'lib/tests/igt_simple_test_subtests@exe/igt_simple_test_subtests.c.o'
[2/743] Compiling c object 'tests/core_auth@exe/core_auth.c.o'
[3/743] Compiling c object 'lib/igt@sha/dummy.c.o'
[4/743] Compiling c object 'lib/tests/igt_simulation@exe/igt_simulation.c.o'
[5/743] Compiling c object 'lib/tests/igt_list_only@exe/igt_list_only.c.o'
[6/743] Compiling c object 'lib/tests/igt_fork_helper@exe/igt_fork_helper.c.o'
[7/743] Compiling c object 'lib/tests/igt_hdmi_inject@exe/igt_hdmi_inject.c.o'
[8/743] Compiling c object 'lib/tests/igt_exit_handler@exe/igt_exit_handler.c.o'
[9/743] Compiling c object 'lib/tests/igt_stats@exe/igt_stats.c.o'
[10/743] Compiling c object 'lib/tests/igt_segfault@exe/igt_segfault.c.o'
[11/743] Compiling c object 
'lib/tests/igt_subtest_group@exe/igt_subtest_group.c.o'
[12/743] Compiling c object 'lib/tests/igt_assert@exe/igt_assert.c.o'
[13/743] Compiling c object 'lib/tests/igt_can_fail@exe/igt_can_fail.c.o'
[14/743] Compiling c object 
'lib/tests/igt_can_fail_simple@exe/igt_can_fail_simple.c.o'
[15/743] Compiling c object 'lib/tests/igt_no_exit@exe/igt_no_exit.c.o'
[16/743] Compiling c object 
'lib/tests/igt_no_exit_list_only@exe/igt_no_exit_list_only.c.o'
[17/743] Compiling c object 'lib/tests/igt_no_subtest@exe/igt_no_subtest.c.o'
[18/743] Compiling c object 
'lib/tests/igt_invalid_subtest_name@exe/igt_invalid_subtest_name.c.o'
[19/743] Compiling c object 'lib/tests/igt_timeout@exe/igt_timeout.c.o'
[20/743] Compiling c object 
'tests/core_get_client_auth@exe/core_get_client_auth.c.o'
[21/743] Compiling c object 
'tests/gem_fenced_exec_thrash@exe/gem_fenced_exec_thrash.c.o'
[22/743] Compiling c object 'tests/core_getclient@exe/core_getclient.c.o'
[23/743] Compiling c object 'tests/core_getversion@exe/core_getversion.c.o'
[24/743] Compiling c object 'tests/core_getstats@exe/core_getstats.c.o'
[25/743] Compiling c object 

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] meson: don't assume xmlrpc-c-config is there

[Patchwork]

== Series Details ==

Series: series starting with [1/2] meson: don't assume xmlrpc-c-config is there
URL   : https://patchwork.freedesktop.org/series/32511/
State : failure

== Summary ==

Series 32511 revision 1 was fully merged or fully failed: no git log

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_399/
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Re: [Intel-gfx] drm/i915/gvt: Use common error handling code in shadow_workload_ring_buffer()

[Joe Perches]

On Tue, 2017-10-24 at 16:51 +0200, SF Markus Elfring wrote:
> Do you prefer to delegate the proposed software refactoring
> only to a corresponding optimiser?

yes.
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[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] meson: don't assume xmlrpc-c-config is there

[Patchwork]

== Series Details ==

Series: series starting with [1/2] meson: don't assume xmlrpc-c-config is there
URL   : https://patchwork.freedesktop.org/series/32511/
State : failure

== Summary ==

Series 32511 revision 1 was fully merged or fully failed: no git log

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_399/
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[Intel-gfx] ✗ Fi.CI.BAT: failure for tests/kms_atomic_transition: Make tests pass

[Patchwork]

== Series Details ==

Series: tests/kms_atomic_transition: Make tests pass
URL   : https://patchwork.freedesktop.org/series/32361/
State : failure

== Summary ==

Series 32361 revision 1 was fully merged or fully failed: no git log

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_395/
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[Intel-gfx] ✓ Fi.CI.BAT: success for igt/kms_rotation_crc: Add horizontal flip subtest. (rev2)

[Patchwork]

== Series Details ==

Series: igt/kms_rotation_crc: Add horizontal flip subtest. (rev2)
URL   : https://patchwork.freedesktop.org/series/31407/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
e5f7fac9f120b0dcbf370c681b8872b8c29bf890 meson: intel_dp_compliance depends on 
libudev

with latest DRM-Tip kernel build CI_DRM_3276
5c82a37eff83 drm-tip: 2017y-10m-23d-18h-06m-28s UTC integration manifest

Testlist changes:
+igt@kms_rotation_crc@primary-x-tiled-reflect-x-0
+igt@kms_rotation_crc@primary-x-tiled-reflect-x-0-flip
+igt@kms_rotation_crc@primary-x-tiled-reflect-x-180
+igt@kms_rotation_crc@primary-x-tiled-reflect-x-180-flip
+igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0
+igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0-flip
+igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90
+igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90-flip
+igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180
+igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180-flip
+igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270
+igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270-flip
+igt@kms_rotation_crc@primary-y-tiled-reflect-x-0
+igt@kms_rotation_crc@primary-y-tiled-reflect-x-0-flip
+igt@kms_rotation_crc@primary-y-tiled-reflect-x-90
+igt@kms_rotation_crc@primary-y-tiled-reflect-x-90-flip
+igt@kms_rotation_crc@primary-y-tiled-reflect-x-180
+igt@kms_rotation_crc@primary-y-tiled-reflect-x-180-flip
+igt@kms_rotation_crc@primary-y-tiled-reflect-x-270
+igt@kms_rotation_crc@primary-y-tiled-reflect-x-270-flip

Test chamelium:
Subgroup dp-crc-fast:
pass   -> FAIL   (fi-kbl-7500u) fdo#102514

fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:442s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:452s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:376s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:527s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:264s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:501s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:496s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:499s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:488s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:561s
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:632s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:422s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:247s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:591s
fi-glk-dsi   total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  
time:483s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:427s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:430s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:437s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:484s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:464s
fi-kbl-7500u total:289  pass:263  dwarn:1   dfail:0   fail:1   skip:24  
time:480s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:571s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:476s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:583s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:548s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:455s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:648s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:523s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:505s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:462s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:565s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:418s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_403/
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Re: [Intel-gfx] drm/i915/gvt: Use common error handling code in shadow_workload_ring_buffer()

[SF Markus Elfring]

>> …  It's just that two out of three error
>> messages happened to be the same and Markus wants to save a bit of
>> memory by using the same string.  The memory savings is not so big that
>> it's worth making the code less readable.
> 
> I agree with Dan.
> 
> It doesn't save any real memory either as the compiler/linker
> reuses the repeated string.

It might depend on passing appropriate parameters.


> It might, depending on the compiler, save a few bytes of
> object code as the compiler may not optimize the repeated
> call away though.

I am trying to show corresponding change possibilities.


> But a good compiler could do that too.

Do you prefer to delegate the proposed software refactoring
only to a corresponding optimiser?

Regards,
Markus
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Re: [Intel-gfx] [PATCH 4/4] warn

[Mika Kuoppala]

Chris Wilson  writes:

> ---
>  drivers/gpu/drm/i915/i915_irq.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index f8205841868b..e4bd20ce031d 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1391,6 +1391,9 @@ gen8_cs_irq_handler(struct intel_engine_cs *engine, u32 
> iir, int test_shift)
>   if (READ_ONCE(engine->execlists.active)) {
>   __set_bit(ENGINE_IRQ_EXECLIST, >irq_posted);
>   tasklet = true;
> + } else if (WARN_ON(!engine->i915->gt.awake)) {

READ_ONCE

I'll get my coat.
-Mika

> + struct drm_printer p = 
> drm_info_printer(engine->i915->drm.dev);
> + intel_engine_dump(engine, );
>   }
>   }
>  
> -- 
> 2.15.0.rc1
>
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Re: [Intel-gfx] drm/i915/gvt: Use common error handling code in shadow_workload_ring_buffer()

[Joe Perches]

On Tue, 2017-10-24 at 17:26 +0300, Dan Carpenter wrote:
> The point of unwind code is to undo what was done earlier.  If a
> function allocates a list of things, using standard unwind style makes
> it simpler, safer and more readable.
> 
> This isn't the case here.  Instead of making the code more readable,
> we're making it more convoluted.  It's just that two out of three error
> messages happened to be the same and Markus wants to save a bit of
> memory by using the same string.  The memory savings is not so big that
> it's worth making the code less readable.

I agree with Dan.

It doesn't save any real memory either as the compiler/linker
reuses the repeated string.

It might, depending on the compiler, save a few bytes of
object code as the compiler may not optimize the repeated
call away though.  But a good compiler could do that too.
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Re: [Intel-gfx] drm/i915/gvt: Use common error handling code in shadow_workload_ring_buffer()

[SF Markus Elfring]

> This isn't the case here.

I find your view interesting for further clarification somehow.


> Instead of making the code more readable, we're making it more convoluted.

Can the shown software refactoring usually help here?


> It's just that two out of three error messages happened to be the same

This is true.


> and Markus wants to save a bit of memory by using the same string.

And also the same executable code (besides an identical error message).


> The memory savings is not so big that it's worth making the code less 
> readable.

How does such a feedback fit to information for the deletion of questionable
messages at other source code places?

Regards,
Markus
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Re: [Intel-gfx] [PATCH 3/4] drm/i915: Filter out spurious execlists context-switch interrupts

[Mika Kuoppala]

Chris Wilson  writes:

> Back in commit a4b2b01523a8 ("drm/i915: Don't mark an execlists
> context-switch when idle") we noticed the presence of late
> context-switch interrupts. We were able to filter those out by looking
> at whether the ELSP remained active, but in commit beecec901790
> ("drm/i915/execlists: Preemption!") that became problematic as we now
> anticipate receiving a context-switch event for preemption while ELSP
> may be empty. To restore the spurious interrupt suppression, add a
> counter for the expected number of pending context-switches and skip if
> we do not need to handle this interrupt to make forward progress.
>
> v2: Don't forget to switch on for preempt.
> v3: Reduce the counter to a on/off boolean tracker. Declare the HW as
> active when we first submit, and idle after the final completion event
> (with which we confirm the HW says it is idle), and track each source
> of activity separately. With a finite number of sources, it should us
> debug which gets stuck.
>
> Fixes: beecec901790 ("drm/i915/execlists: Preemption!")
> Signed-off-by: Chris Wilson 
> Cc: Michal Winiarski 
> Cc: Tvrtko Ursulin 
> Cc: Arkadiusz Hiler 
> Cc: Mika Kuoppala 
> Cc: Joonas Lahtinen 
> ---
>  drivers/gpu/drm/i915/i915_guc_submission.c |  3 +++
>  drivers/gpu/drm/i915/i915_irq.c|  6 --
>  drivers/gpu/drm/i915/intel_engine_cs.c |  5 +++--
>  drivers/gpu/drm/i915/intel_lrc.c   | 27 ++--
>  drivers/gpu/drm/i915/intel_ringbuffer.h| 34 
> --
>  5 files changed, 62 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c 
> b/drivers/gpu/drm/i915/i915_guc_submission.c
> index a2e8114b739d..f84c267728fd 100644
> --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> @@ -610,6 +610,7 @@ static void i915_guc_dequeue(struct intel_engine_cs 
> *engine)
>   execlists->first = rb;
>   if (submit) {
>   port_assign(port, last);
> + execlists_set_active(execlists, EXECLISTS_ACTIVE_USER);
>   i915_guc_submit(engine);
>   }
>   spin_unlock_irq(>timeline->lock);
> @@ -633,6 +634,8 @@ static void i915_guc_irq_handler(unsigned long data)
>  
>   rq = port_request([0]);
>   }
> + if (!rq)
> + execlists_clear_active(execlists, EXECLISTS_ACTIVE_USER);
>  
>   if (!port_isset(last_port))
>   i915_guc_dequeue(engine);
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index b1296a55c1e4..f8205841868b 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1388,8 +1388,10 @@ gen8_cs_irq_handler(struct intel_engine_cs *engine, 
> u32 iir, int test_shift)
>   bool tasklet = false;
>  
>   if (iir & (GT_CONTEXT_SWITCH_INTERRUPT << test_shift)) {
> - __set_bit(ENGINE_IRQ_EXECLIST, >irq_posted);
> - tasklet = true;
> + if (READ_ONCE(engine->execlists.active)) {
> + __set_bit(ENGINE_IRQ_EXECLIST, >irq_posted);
> + tasklet = true;

These two in here feel naturally attracted to eachothers. Perhaps
a future patch will meld them together.

Reviewed-by: Mika Kuoppala 

> + }
>   }
>  
>   if (iir & (GT_RENDER_USER_INTERRUPT << test_shift)) {
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c 
> b/drivers/gpu/drm/i915/intel_engine_cs.c
> index a47a9c6bea52..ab5bf4e2e28e 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -1548,8 +1548,8 @@ bool intel_engine_is_idle(struct intel_engine_cs 
> *engine)
>   if (test_bit(ENGINE_IRQ_EXECLIST, >irq_posted))
>   return false;
>  
> - /* Both ports drained, no more ELSP submission? */
> - if (port_request(>execlists.port[0]))
> + /* Waiting to drain ELSP? */
> + if (READ_ONCE(engine->execlists.active))
>   return false;
>  
>   /* ELSP is empty, but there are ready requests? */
> @@ -1749,6 +1749,7 @@ void intel_engine_dump(struct intel_engine_cs *engine, 
> struct drm_printer *m)
>  idx);
>   }
>   }
> + drm_printf(m, "\t\tHW active? 0x%x\n", execlists->active);
>   rcu_read_unlock();
>   } else if (INTEL_GEN(dev_priv) > 6) {
>   drm_printf(m, "\tPP_DIR_BASE: 0x%08x\n",
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c 
> b/drivers/gpu/drm/i915/intel_lrc.c
> index 7f45dd7dc3e5..233c992a886b 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -575,7 +575,8 @@ static void execlists_dequeue(struct 

[Intel-gfx] ✓ Fi.CI.BAT: success for igt/lib: Ignoring subtest name case

[Patchwork]

== Series Details ==

Series: igt/lib: Ignoring subtest name case
URL   : https://patchwork.freedesktop.org/series/32529/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
e5f7fac9f120b0dcbf370c681b8872b8c29bf890 meson: intel_dp_compliance depends on 
libudev

with latest DRM-Tip kernel build CI_DRM_3276
5c82a37eff83 drm-tip: 2017y-10m-23d-18h-06m-28s UTC integration manifest

No testlist changes.

Test chamelium:
Subgroup dp-crc-fast:
pass   -> FAIL   (fi-kbl-7500u) fdo#102514

fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:445s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:461s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:373s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:529s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:266s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:500s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:501s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:495s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:476s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:560s
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:595s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:416s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:252s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:580s
fi-glk-dsi   total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  
time:490s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:430s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:430s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:431s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:484s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:459s
fi-kbl-7500u total:289  pass:263  dwarn:1   dfail:0   fail:1   skip:24  
time:483s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:577s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:476s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:584s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:547s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:467s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:644s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:522s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:496s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:459s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:569s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:423s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_402/
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Remove the priority "optimisation"

[Patchwork]

== Series Details ==

Series: drm/i915/execlists: Remove the priority "optimisation"
URL   : https://patchwork.freedesktop.org/series/32533/
State : success

== Summary ==

Test perf:
Subgroup polling:
fail   -> PASS   (shard-hsw) fdo#102252
Test kms_busy:
Subgroup extended-modeset-hang-oldfb-with-reset-render-A:
dmesg-warn -> PASS   (shard-hsw) fdo#102249 +1
Test drv_module_reload:
Subgroup basic-reload-inject:
dmesg-warn -> PASS   (shard-hsw) fdo#102707
Test kms_setmode:
Subgroup basic:
pass   -> FAIL   (shard-hsw) fdo#99912

fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#102249 https://bugs.freedesktop.org/show_bug.cgi?id=102249
fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912

shard-hswtotal:2540 pass:1432 dwarn:2   dfail:0   fail:9   skip:1097 
time:9163s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6159/shards.html
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Re: [Intel-gfx] [PATCH 2/4] drm/i915: Synchronize irq before parking each engine

[Mika Kuoppala]

Chris Wilson  writes:

> Quoting Chris Wilson (2017-10-23 22:32:35)
>> When we park the engine (upon idling), we kill the irq tasklet. However,
>> to be sure that it is not restarted by a final interrupt after doing so,
>> flush the interrupt handler before parking. As we only park the engines
>> when we believe the system is idle, there should not be any spurious
>> interrupts later to distrub us; so flushing the final in-flight
>> interrupt should be sufficient.
>> 
>> Signed-off-by: Chris Wilson 
>> Cc: Joonas Lahtinen 
>> Cc: Mika Kuoppala 
>> Cc: Imre Deak 
>> ---
>>  drivers/gpu/drm/i915/i915_gem.c | 6 ++
>>  1 file changed, 6 insertions(+)
>> 
>> diff --git a/drivers/gpu/drm/i915/i915_gem.c 
>> b/drivers/gpu/drm/i915/i915_gem.c
>> index bb0e85043e01..b547a6327d34 100644
>> --- a/drivers/gpu/drm/i915/i915_gem.c
>> +++ b/drivers/gpu/drm/i915/i915_gem.c
>> @@ -3327,6 +3327,12 @@ i915_gem_idle_work_handler(struct work_struct *work)
>> if (new_requests_since_last_retire(dev_priv))
>> goto out_unlock;
>>  
>> +   /*
>> +* Be paranoid and flush a concurrent interrupt to make sure
>> +* we don't reactivate any irq tasklets after parking.
>
> * FIXME: Note that even though we have waited for execlists to be idle,
> * there may still be an in-flight interrupt even though the CSB
> * is now empty. synchronize_irq() makes sure that the residual
> * interrupt is completed before we continue, but it doesn't prevent
> * the HW from raising that residual interrupt later. To complete
> * the shield we should coordinate disabling the CS irq with
> * flushing the residual interrupt.

I would call it spurious instead of residual as there is no real
reason for it.

Reviewed-by: Mika Kuoppala 

>
>> +*/
>> +   synchronize_irq(dev_priv->drm.irq);
>> +
>> /*
>>  * We are committed now to parking the engines, make sure there
>>  * will be no more interrupts arriving later.
>> -- 
>> 2.15.0.rc1
>> 
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Re: [Intel-gfx] drm/i915/gvt: Use common error handling code in shadow_workload_ring_buffer()

[Dan Carpenter]

The point of unwind code is to undo what was done earlier.  If a
function allocates a list of things, using standard unwind style makes
it simpler, safer and more readable.

This isn't the case here.  Instead of making the code more readable,
we're making it more convoluted.  It's just that two out of three error
messages happened to be the same and Markus wants to save a bit of
memory by using the same string.  The memory savings is not so big that
it's worth making the code less readable.

regards,
dan carpenter
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Re: [Intel-gfx] [PATCH] drm/i915/huc: Use helper function while waiting for DMA completion

[Michal Wajdeczko]

On Tue, 24 Oct 2017 13:23:45 +0200, Chris Wilson  
 wrote:



Quoting Michal Wajdeczko (2017-10-24 11:50:56)

Waiting for DMA status register can be done with dedicated function.
Lets use it as additional bonus will be smaller driver footprint.

Signed-off-by: Michal Wajdeczko 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
---
 drivers/gpu/drm/i915/intel_huc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_huc.c  
b/drivers/gpu/drm/i915/intel_huc.c

index c8a48cb..98d1725 100644
--- a/drivers/gpu/drm/i915/intel_huc.c
+++ b/drivers/gpu/drm/i915/intel_huc.c
@@ -151,7 +151,7 @@ static int huc_ucode_xfer(struct intel_uc_fw  
*huc_fw, struct i915_vma *vma)
I915_WRITE(DMA_CTRL, _MASKED_BIT_ENABLE(HUC_UKERNEL |  
START_DMA));


/* Wait for DMA to finish */
-   ret = wait_for((I915_READ(DMA_CTRL) & START_DMA) == 0, 100);
+   ret = intel_wait_for_register_fw(dev_priv, DMA_CTRL, START_DMA,  
0, 100);


DRM_DEBUG_DRIVER("HuC DMA transfer wait over with ret %d\n",  
ret);


Reviewed-by: Chris Wilson 

Aside, what's the serialisation so that we only try to load one fw at a
time?


It looks that we just wait right after starting DMA. And if we attempt to
next DMA while previous is still running then it will be likely silently
ignored by HW as control bit START_DMA would be still on.

If we want to be bullet-proof then maybe before we start programming new
DMA xfer we should verify that DMA hw is idle (and then wait little more
or just abort immediately)

Michal
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Re: [Intel-gfx] [PATCH xf86-video-intel v3] hmm

[Chris Wilson]

I am really not paying attention to the directory hopping between
machines! Sorry.
-Chris
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[Intel-gfx] [PATCH igt v3] igt/gem_ctx_isolation: Check isolation of registers between contexts

[Chris Wilson]

A new context assumes that all of its registers are in the default state
when it is created. What may happen is that a register written by one
context may leak into the second, causing mass confusion.

Signed-off-by: Chris Wilson 
---
 tests/Makefile.sources|   1 +
 tests/gem_ctx_isolation.c | 790 ++
 2 files changed, 791 insertions(+)
 create mode 100644 tests/gem_ctx_isolation.c

diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index ac9f90bc..d18b7461 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -57,6 +57,7 @@ TESTS_progs = \
gem_ctx_basic \
gem_ctx_create \
gem_ctx_exec \
+   gem_ctx_isolation \
gem_ctx_param \
gem_ctx_switch \
gem_ctx_thrash \
diff --git a/tests/gem_ctx_isolation.c b/tests/gem_ctx_isolation.c
new file mode 100644
index ..3a0ee19a
--- /dev/null
+++ b/tests/gem_ctx_isolation.c
@@ -0,0 +1,790 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "igt.h"
+#include "igt_dummyload.h"
+
+#define MAX_REG 0x4
+#define NUM_REGS (MAX_REG / sizeof(uint32_t))
+
+#define PAGE_ALIGN(x) ALIGN(x, 4096)
+
+#define DIRTY 0x1
+#define UNSAFE 0x2
+
+enum {
+   RCS_MASK = 0x1,
+   BCS_MASK = 0x2,
+   VCS_MASK = 0x4,
+   VECS_MASK = 0x8,
+};
+
+#define ALL ~0u
+#define GEN_RANGE(x, y) ((ALL >> (32 - (y - x + 1))) << x)
+
+#define LAST_KNOWN_GEN 10
+
+static const struct named_register {
+   const char *name;
+   unsigned int gen_mask;
+   unsigned int engine_mask;
+   uint32_t offset;
+} safe_registers[] = {
+   { "NOPID", ALL, RCS_MASK, 0x2094 },
+   { "MI_PREDICATE_RESULT_2", ALL, RCS_MASK, 0x23bc },
+   { "INSTPM", ALL, RCS_MASK, 0x20c0 },
+   { "IA_VERTICES_COUNT (low)", ALL, RCS_MASK, 0x2310 },
+   { "IA_VERTICES_COUNT (high)", ALL, RCS_MASK, 0x2314 },
+   { "IA_PRIMITIVES_COUNT (low)", ALL, RCS_MASK, 0x2318 },
+   { "IA_PRIMITIVES_COUNT (high)", ALL, RCS_MASK, 0x231c },
+   { "VS_INVOCATION_COUNT (low)", ALL, RCS_MASK, 0x2320 },
+   { "VS_INVOCATION_COUNT (high)", ALL, RCS_MASK, 0x2324 },
+   { "HS_INVOCATION_COUNT (low)", ALL, RCS_MASK, 0x2300 },
+   { "HS_INVOCATION_COUNT (high)", ALL, RCS_MASK, 0x2304 },
+   { "DS_INVOCATION_COUNT (low)", ALL, RCS_MASK, 0x2308 },
+   { "DS_INVOCATION_COUNT (high)", ALL, RCS_MASK, 0x230c },
+   { "GS_INVOCATION_COUNT (low)", ALL, RCS_MASK, 0x2328 },
+   { "GS_INVOCATION_COUNT (high)", ALL, RCS_MASK, 0x232c },
+   { "GS_PRIMITIVES_COUNT (low)", ALL, RCS_MASK, 0x2330 },
+   { "GS_PRIMITIVES_COUNT (high)", ALL, RCS_MASK, 0x2334 },
+   { "CL_INVOCATION_COUNT (low)", ALL, RCS_MASK, 0x2338 },
+   { "CL_INVOCATION_COUNT (high)", ALL, RCS_MASK, 0x233c },
+   { "CL_PRIMITIVES_COUNT (low)", ALL, RCS_MASK, 0x2340 },
+   { "CL_PRIMITIVES_COUNT (high)", ALL, RCS_MASK, 0x2344 },
+   { "PS_INVOCATION_COUNT_0 (low)", ALL, RCS_MASK, 0x22c8 },
+   { "PS_INVOCATION_COUNT_0 (high)", ALL, RCS_MASK, 0x22cc },
+   { "PS_DEPTH_COUNT_0 (low)", ALL, RCS_MASK, 0x22d8 },
+   { "PS_DEPTH_COUNT_0 (high)", ALL, RCS_MASK, 0x22dc },
+   { "GPUGPU_DISPATCHDIMX", ALL, RCS_MASK, 0x2500 },
+   { "GPUGPU_DISPATCHDIMY", ALL, RCS_MASK, 0x2504 },
+   { "GPUGPU_DISPATCHDIMZ", ALL, RCS_MASK, 0x2508 },
+   { "MI_PREDICATE_SRC0 (low)", ALL, RCS_MASK, 0x2400 },
+   { "MI_PREDICATE_SRC0 (high)", ALL, RCS_MASK, 0x2404 },
+   { "MI_PREDICATE_SRC1 (low)", ALL, RCS_MASK, 0x2408 },
+   { "MI_PREDICATE_SRC1 (high)", ALL, RCS_MASK, 0x240c },
+   { "MI_PREDICATE_DATA (low)", ALL, RCS_MASK, 0x2410 },
+   { "MI_PREDICATE_DATA (high)", ALL, RCS_MASK, 0x2414 },
+   { "MI_PRED_RESULT", ALL, RCS_MASK, 0x2418 },
+   { "3DPRIM_END_OFFSET", ALL, RCS_MASK, 0x2420 },
+

[Intel-gfx] [PATCH xf86-video-intel v3] hmm

[Chris Wilson]

---
 src/sna/gen6_common.h | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/sna/gen6_common.h b/src/sna/gen6_common.h
index b53ec0c9..05f76f83 100644
--- a/src/sna/gen6_common.h
+++ b/src/sna/gen6_common.h
@@ -87,7 +87,7 @@ static int prefer_blt_bo(struct sna *sna,
if (PREFER_RENDER)
return PREFER_RENDER < 0;
 
-   if (dst->rq)
+   if (__kgem_bo_is_busy(>kgem, dst))
return RQ_IS_BLT(dst->rq);
 
if (sna->flags & SNA_POWERSAVE)
@@ -97,7 +97,7 @@ static int prefer_blt_bo(struct sna *sna,
if (sna->render_state.gt > 1)
return false;
 
-   if (src->rq)
+   if (__kgem_bo_is_busy(>kgem, src))
return RQ_IS_BLT(src->rq);
 
if (src->tiling == I915_TILING_Y)
@@ -157,8 +157,8 @@ prefer_render_ring(struct sna *sna, struct kgem_bo *bo)
if (sna->kgem.ring != KGEM_NONE && NO_RING_SWITCH(sna))
 return false;
 
-   if (kgem_bo_is_render(bo))
-   return true;
+   if (__kgem_bo_is_busy(>kgem, bo))
+   return !RQ_IS_BLT(bo);
 
if (sna->flags & SNA_POWERSAVE)
return false;
-- 
2.15.0.rc1

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[Intel-gfx] ✗ Fi.CI.BAT: warning for meson: makefile integration cleanup

[Patchwork]

== Series Details ==

Series: meson: makefile integration cleanup
URL   : https://patchwork.freedesktop.org/series/32519/
State : warning

== Summary ==

IGT patchset tested on top of latest successful build
e5f7fac9f120b0dcbf370c681b8872b8c29bf890 meson: intel_dp_compliance depends on 
libudev

with latest DRM-Tip kernel build CI_DRM_3276
5c82a37eff83 drm-tip: 2017y-10m-23d-18h-06m-28s UTC integration manifest

No testlist changes.

Test chamelium:
Subgroup dp-crc-fast:
pass   -> FAIL   (fi-kbl-7500u) fdo#102514
Test kms_frontbuffer_tracking:
Subgroup basic:
fail   -> PASS   (fi-glk-dsi)
Test drv_module_reload:
Subgroup basic-reload:
pass   -> DMESG-WARN (fi-bsw-n3050)

fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:444s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:461s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:374s
fi-bsw-n3050 total:289  pass:242  dwarn:1   dfail:0   fail:0   skip:46  
time:531s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:264s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:499s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:497s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:494s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:561s
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:602s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:419s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:251s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:579s
fi-glk-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:489s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:432s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:434s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:438s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:484s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:461s
fi-kbl-7500u total:289  pass:263  dwarn:1   dfail:0   fail:1   skip:24  
time:480s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:582s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:476s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:582s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:551s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:458s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:648s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:524s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:501s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:461s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:565s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:418s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_400/
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Dump watermark info in i915_display_info. (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Dump watermark info in i915_display_info. (rev2)
URL   : https://patchwork.freedesktop.org/series/32532/
State : failure

== Summary ==

Series 32532v2 drm/i915: Dump watermark info in i915_display_info.
https://patchwork.freedesktop.org/api/1.0/series/32532/revisions/2/mbox/

Test gem_exec_flush:
Subgroup basic-wb-rw-default:
pass   -> INCOMPLETE (fi-cnl-y)
Test pm_backlight:
Subgroup basic-brightness:
pass   -> INCOMPLETE (fi-skl-6700hq)

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:444s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:449s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:372s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:526s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:263s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:497s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:496s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:494s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:476s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:553s
fi-cnl-y total:73   pass:56   dwarn:0   dfail:0   fail:0   skip:16 
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:415s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:250s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:580s
fi-glk-dsi   total:289  pass:258  dwarn:0   dfail:0   fail:1   skip:30  
time:486s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:437s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:427s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:440s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:493s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:454s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:497s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:571s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:477s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:582s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:545s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:456s
fi-skl-6700hqtotal:251  pass:226  dwarn:0   dfail:0   fail:0   skip:24 
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:521s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:496s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:454s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:561s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:422s

5c82a37eff83ab4e60e760fbaf03db5ba0563497 drm-tip: 2017y-10m-23d-18h-06m-28s UTC 
integration manifest
a6fc83ce39c5 drm/i915: Dump watermark info in i915_display_info, v2.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6161/
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[Intel-gfx] [PATCH 2/2] drm/i915/dp: Use common error handling code in intel_dp_sink_crc_stop()

[SF Markus Elfring]

From: Markus Elfring 
Date: Tue, 24 Oct 2017 15:40:47 +0200

Adjust jump targets so that a specific error code assignment
will be in the implementation only at the end of this function.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring 
---
 drivers/gpu/drm/i915/intel_dp.c | 30 ++
 1 file changed, 14 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 342f1a1fa085..3dd514a77008 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3894,27 +3894,19 @@ static int intel_dp_sink_crc_stop(struct intel_dp 
*intel_dp)
int count = 0;
int attempts = 10;
 
-   if (drm_dp_dpcd_readb(_dp->aux, DP_TEST_SINK, ) < 0) {
-   DRM_DEBUG_KMS("Sink CRC couldn't be stopped properly\n");
-   ret = -EIO;
-   goto out;
-   }
+   if (drm_dp_dpcd_readb(_dp->aux, DP_TEST_SINK, ) < 0)
+   goto report_failure;
 
if (drm_dp_dpcd_writeb(_dp->aux, DP_TEST_SINK,
-  buf & ~DP_TEST_SINK_START) < 0) {
-   DRM_DEBUG_KMS("Sink CRC couldn't be stopped properly\n");
-   ret = -EIO;
-   goto out;
-   }
+  buf & ~DP_TEST_SINK_START) < 0)
+   goto report_failure;
 
do {
intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
+   if (drm_dp_dpcd_readb(_dp->aux, DP_TEST_SINK_MISC, )
+   < 0)
+   goto e_io;
 
-   if (drm_dp_dpcd_readb(_dp->aux,
- DP_TEST_SINK_MISC, ) < 0) {
-   ret = -EIO;
-   goto out;
-   }
count = buf & DP_TEST_COUNT_MASK;
} while (--attempts && count);
 
@@ -3923,9 +3915,15 @@ static int intel_dp_sink_crc_stop(struct intel_dp 
*intel_dp)
ret = -ETIMEDOUT;
}
 
- out:
+enable_ips:
hsw_enable_ips(intel_crtc);
return ret;
+
+report_failure:
+   DRM_DEBUG_KMS("Sink CRC couldn't be stopped properly\n");
+e_io:
+   ret = -EIO;
+   goto enable_ips;
 }
 
 static int intel_dp_sink_crc_start(struct intel_dp *intel_dp)
-- 
2.14.3

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[Intel-gfx] [PATCH 1/2] drm/i915/dp: Delete an unnecessary goto statement in intel_dp_sink_crc()

[SF Markus Elfring]

From: Markus Elfring 
Date: Tue, 24 Oct 2017 15:15:20 +0200

A jump was specified for a location which was directly behind.
Thus remove such an unnecessary goto statement.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring 
---
 drivers/gpu/drm/i915/intel_dp.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index ca48bce23a6f..342f1a1fa085 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3994,10 +3994,8 @@ int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
goto stop;
}
 
-   if (drm_dp_dpcd_read(_dp->aux, DP_TEST_CRC_R_CR, crc, 6) < 0) {
+   if (drm_dp_dpcd_read(_dp->aux, DP_TEST_CRC_R_CR, crc, 6) < 0)
ret = -EIO;
-   goto stop;
-   }
 
 stop:
intel_dp_sink_crc_stop(intel_dp);
-- 
2.14.3

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[Intel-gfx] [PATCH 0/2] GPU-DRM-i915-DP: Fine-tuning for two function implementations

[SF Markus Elfring]

From: Markus Elfring 
Date: Tue, 24 Oct 2017 15:54:32 +0200

Two update suggestions were taken into account
from static source code analysis.

Markus Elfring (2):
  Delete an unnecessary goto statement in intel_dp_sink_crc()
  Use common error handling code in intel_dp_sink_crc_stop()

 drivers/gpu/drm/i915/intel_dp.c | 34 +++---
 1 file changed, 15 insertions(+), 19 deletions(-)

-- 
2.14.3

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Re: [Intel-gfx] drm/i915/gvt: Use common error handling code in shadow_workload_ring_buffer()

[Garry Hurley]

Markus, 

I normally keep quiet on threads like this. I half agree with you. Yes, perhaps 
a reportError function would be a good idea, but it seems that what you are 
suggesting is trading an inline subroutine call for a spaghetti-code vondition. 
The goto is used only if you do not have any code that follows, and what you 
are taking out is a function call that DOES return execution flow to the 
calling block. You are replacing it with a goto call which does not return 
execution flow. The risks of process termination during a goto call make it a 
bad idea. In this case, the subroutine call is the right move. If the reuse of 
the error message bothers you, perhaps it is a good candidate for a static 
string definition, so that if it is changed it can be changed in one location 
in the code. The tradeoff there is that the static string definition will eat a 
few bytes of memory from the variable storage. Just my perspective. I could be 
wrong. 

Sent from my iPhone

On Oct 24, 2017, at 9:17 AM, SF Markus Elfring  
wrote:

>>> Add a jump target so that a call of the function "gvt_vgpu_err" is stored
>>> only once at the end of this function implementation.
>>> Replace two calls by goto statements.
>>> 
>>> This issue was detected by using the Coccinelle software.
>> 
>> I don't think this is an issue or an improvement.
> 
> Do you care for the detail how often an error message is stored in the code?
> 
> Regards,
> Markus
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm-auth

[Patchwork]

== Series Details ==

Series: drm-auth
URL   : https://patchwork.freedesktop.org/series/32538/
State : failure

== Summary ==

Series 32538 revision 1 was fully merged or fully failed: no git log

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