Re: [Intel-gfx] [PATCH] drm/i915/icp: Add Interrupt Support
On Tue, Jun 26, 2018 at 1:56 PM Anusha Srivatsa
wrote:
>
> This patch addresses Interrupts from south display engine (SDE).
>
> ICP has two registers - SHOTPLUG_CTL_DDI and SHOTPLUG_CTL_TC.
> Introduce these registers and their intended values.
>
> Introduce icp_irq_handler().
>
> The icp_irq_postinstall() takes care of
> enabling all PCH interrupt sources, to unmask
> them as needed with SDEIMR, as is done
> done by ibx_irq_pre_postinstall() for earlier platforms.
> We do not need to explicitly call the ibx_irq_pre_postinstall().
>
> Also, while changing these,
> s/CPT/PPT/CPT-CNP comment.
>
> v2:
> - remove redundant register defines.(Lucas)
> - Change register names to be more consistent with
> previous platforms (Lucas)
>
> v3:
> -Reorder bit defines to a more appropriate location.
> Change the comments. Confirm in the commit message that
> icp_irq_postinstall() need not go to
> ibx_irq_pre_postinstall() and ibx_irq_postinstall()
> as in earlier platforms. (Paulo)
>
> Cc: Lucas De Marchi
Better now.
Reviewed-by: Lucas De Marchi
Lucas De Marchi
> Cc: Paulo Zanoni
> Cc: Dhinakaran Pandiyan
> Cc: Ville Syrjala
> Signed-off-by: Anusha Srivatsa
> [Paulo: coding style bikesheds and rebases].
> Signed-off-by: Paulo Zanoni
> ---
> drivers/gpu/drm/i915/i915_irq.c | 134
> +++-
> drivers/gpu/drm/i915/i915_reg.h | 42 -
> 2 files changed, 173 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 46aaef5..7a7c4a2 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -122,6 +122,15 @@ static const u32 hpd_gen11[HPD_NUM_PINS] = {
> [HPD_PORT_F] = GEN11_TC4_HOTPLUG | GEN11_TBT4_HOTPLUG
> };
>
> +static const u32 hpd_icp[HPD_NUM_PINS] = {
> + [HPD_PORT_A] = SDE_DDIA_HOTPLUG_ICP,
> + [HPD_PORT_B] = SDE_DDIB_HOTPLUG_ICP,
> + [HPD_PORT_C] = SDE_TC1_HOTPLUG_ICP,
> + [HPD_PORT_D] = SDE_TC2_HOTPLUG_ICP,
> + [HPD_PORT_E] = SDE_TC3_HOTPLUG_ICP,
> + [HPD_PORT_F] = SDE_TC4_HOTPLUG_ICP
> +};
> +
> /* IIR can theoretically queue up two events. Be paranoid. */
> #define GEN8_IRQ_RESET_NDX(type, which) do { \
> I915_WRITE(GEN8_##type##_IMR(which), 0x); \
> @@ -1586,6 +1595,34 @@ static bool bxt_port_hotplug_long_detect(enum port
> port, u32 val)
> }
> }
>
> +static bool icp_ddi_port_hotplug_long_detect(enum port port, u32 val)
> +{
> + switch (port) {
> + case PORT_A:
> + return val & ICP_DDIA_HPD_LONG_DETECT;
> + case PORT_B:
> + return val & ICP_DDIB_HPD_LONG_DETECT;
> + default:
> + return false;
> + }
> +}
> +
> +static bool icp_tc_port_hotplug_long_detect(enum port port, u32 val)
> +{
> + switch (port) {
> + case PORT_C:
> + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC1);
> + case PORT_D:
> + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC2);
> + case PORT_E:
> + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC3);
> + case PORT_F:
> + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC4);
> + default:
> + return false;
> + }
> +}
> +
> static bool spt_port_hotplug2_long_detect(enum port port, u32 val)
> {
> switch (port) {
> @@ -2385,6 +2422,43 @@ static void cpt_irq_handler(struct drm_i915_private
> *dev_priv, u32 pch_iir)
> cpt_serr_int_handler(dev_priv);
> }
>
> +static void icp_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
> +{
> + u32 ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP;
> + u32 tc_hotplug_trigger = pch_iir & SDE_TC_MASK_ICP;
> + u32 pin_mask = 0, long_mask = 0;
> +
> + if (ddi_hotplug_trigger) {
> + u32 dig_hotplug_reg;
> +
> + dig_hotplug_reg = I915_READ(SHOTPLUG_CTL_DDI);
> + I915_WRITE(SHOTPLUG_CTL_DDI, dig_hotplug_reg);
> +
> + intel_get_hpd_pins(dev_priv, _mask, _mask,
> + ddi_hotplug_trigger,
> + dig_hotplug_reg, hpd_icp,
> + icp_ddi_port_hotplug_long_detect);
> + }
> +
> + if (tc_hotplug_trigger) {
> + u32 dig_hotplug_reg;
> +
> + dig_hotplug_reg = I915_READ(SHOTPLUG_CTL_TC);
> + I915_WRITE(SHOTPLUG_CTL_TC, dig_hotplug_reg);
> +
> + intel_get_hpd_pins(dev_priv, _mask, _mask,
> + tc_hotplug_trigger,
> + dig_hotplug_reg, hpd_icp,
> + icp_tc_port_hotplug_long_detect);
> + }
> +
> + if (pin_mask)
> + intel_hpd_irq_handler(dev_priv, pin_mask, long_mask);
> +
> + if (pch_iir & SDE_GMBUS_ICP)
> + gmbus_irq_handler(dev_priv);
> +}
> +
> static void spt_irq_handler(struct
Re: [Intel-gfx] [PATCH v7 1/5] drm/i915/psr: Remove intel_crtc_state parameter from disable_source()
On Tue, 2018-06-26 at 13:16 -0700, José Roberto de Souza wrote:
> It was only used in VLV/CHV so after the removal of the PSR support
> for those platforms it is not necessary any more.
>
> v7: Rebased
>
Pushed this to -dinq, thanks for your patience.
> Reviewed-by: Dhinakaran Pandiyan
> Cc: Rodrigo Vivi
> Signed-off-by: José Roberto de Souza
> ---
> drivers/gpu/drm/i915/intel_psr.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_psr.c
> b/drivers/gpu/drm/i915/intel_psr.c
> index 1b439629cb66..f6d384a11b79 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -625,8 +625,7 @@ void intel_psr_enable(struct intel_dp *intel_dp,
> }
>
> static void
> -intel_psr_disable_source(struct intel_dp *intel_dp,
> - const struct intel_crtc_state
> *old_crtc_state)
> +intel_psr_disable_source(struct intel_dp *intel_dp)
> {
> struct intel_digital_port *intel_dig_port =
> dp_to_dig_port(intel_dp);
> struct drm_device *dev = intel_dig_port->base.base.dev;
> @@ -693,7 +692,7 @@ void intel_psr_disable(struct intel_dp *intel_dp,
> return;
> }
>
> - intel_psr_disable_source(intel_dp, old_crtc_state);
> + intel_psr_disable_source(intel_dp);
>
> /* Disable PSR on Sink */
> drm_dp_dpcd_writeb(_dp->aux, DP_PSR_EN_CFG, 0);
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/icp: Add Interrupt Support
== Series Details == Series: drm/i915/icp: Add Interrupt Support URL : https://patchwork.freedesktop.org/series/45443/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4382_full -> Patchwork_9432_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_9432_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_9432_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_9432_full: === IGT changes === Warnings igt@gem_exec_schedule@deep-blt: shard-kbl: PASS -> SKIP igt@gem_exec_schedule@deep-vebox: shard-kbl: SKIP -> PASS igt@gem_linear_blits@interruptible: shard-apl: PASS -> SKIP igt@kms_plane_multiple@atomic-pipe-b-tiling-x: shard-snb: SKIP -> PASS +1 == Known issues == Here are the changes found in Patchwork_9432_full that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_hangcheck: shard-kbl: PASS -> DMESG-FAIL (fdo#106947, fdo#106560) igt@gem_exec_schedule@pi-ringfull-bsd2: shard-kbl: NOTRUN -> FAIL (fdo#103158) igt@gem_softpin@noreloc-s3: shard-kbl: PASS -> INCOMPLETE (fdo#103665) igt@kms_flip@flip-vs-expired-vblank: shard-hsw: PASS -> FAIL (fdo#102887, fdo#105363) shard-kbl: NOTRUN -> FAIL (fdo#102887, fdo#105363) igt@kms_flip_tiling@flip-to-y-tiled: shard-glk: PASS -> FAIL (fdo#104724) igt@kms_flip_tiling@flip-x-tiled: shard-glk: PASS -> FAIL (fdo#103822, fdo#104724) Possible fixes igt@gem_ctx_isolation@rcs0-s3: shard-kbl: INCOMPLETE (fdo#103665) -> PASS igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size: shard-hsw: FAIL (fdo#103355) -> PASS igt@kms_flip@plain-flip-fb-recreate: shard-glk: FAIL (fdo#100368) -> PASS +2 fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103355 https://bugs.freedesktop.org/show_bug.cgi?id=103355 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822 fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560 fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4382 -> Patchwork_9432 CI_DRM_4382: ffc2d866e9b04af3cc2244bb7448d7f7eb438a89 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9432: 1af6e834bbe4230961a720f60ff8c55d2e84f024 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9432/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Fix assert_plane() warning on bootup with external display (rev4)
== Series Details ==
Series: drm/i915: Fix assert_plane() warning on bootup with external display
(rev4)
URL : https://patchwork.freedesktop.org/series/44909/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M] drivers/gpu/drm/i915/intel_display.o
drivers/gpu/drm/i915/intel_display.c: In function ‘intel_modeset_init’:
drivers/gpu/drm/i915/intel_display.c:15295:5: error: ‘num_active_crtcs’ may be
used uninitialized in this function [-Werror=maybe-uninitialized]
if (num_active_crtcs > 1) {
^
cc1: all warnings being treated as errors
scripts/Makefile.build:317: recipe for target
'drivers/gpu/drm/i915/intel_display.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_display.o] Error 1
scripts/Makefile.build:558: recipe for target 'drivers/gpu/drm/i915' failed
make[3]: *** [drivers/gpu/drm/i915] Error 2
scripts/Makefile.build:558: recipe for target 'drivers/gpu/drm' failed
make[2]: *** [drivers/gpu/drm] Error 2
scripts/Makefile.build:558: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
Makefile:1034: recipe for target 'drivers' failed
make: *** [drivers] Error 2
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: mark expected switch fall-through (rev2)
== Series Details == Series: drm/i915: mark expected switch fall-through (rev2) URL : https://patchwork.freedesktop.org/series/45088/ State : failure == Summary == Applying: drm/i915: mark expected switch fall-through error: patch failed: drivers/gpu/drm/i915/i915_utils.h:40 error: drivers/gpu/drm/i915/i915_utils.h: patch does not apply error: Did you hand edit your patch? It does not apply to blobs recorded in its index. Using index info to reconstruct a base tree... Patch failed at 0001 drm/i915: mark expected switch fall-through Use 'git am --show-current-patch' to see the failed patch When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v4] drm/i915: Fix assert_plane() warning on bootup with external display
On KBL, WHL RVPs, booting up with an external display connected, triggers
below warning, when the BiOS brings up the external display too.
This warning is not seen during hotplug.
[3.615226] [ cut here ]
[3.619829] plane 1A assertion failure (expected on, current off)
[3.632039] WARNING: CPU: 2 PID: 354 at
drivers/gpu/drm/i915/intel_display.c:1294 assert_plane+0x71/0xbb
[3.633920] iwlwifi :00:14.3: loaded firmware version 38.c0e03d94.0
op_mode iwlmvm
[3.647157] Modules linked in: iwlwifi cfg80211 btusb btrtl btbcm btintel
bluetooth ecdh_generic
[3.647163] CPU: 2 PID: 354 Comm: frecon Not tainted
4.17.0-rc7-50176-g655af12d39c2 #3
[3.647165] Hardware name: Intel Corporation CoffeeLake Client
Platform/WhiskeyLake U DDR4 ERB, BIOS CNLSFWR1.R00.X140.B00.1804040304
04/04/2018
[3.684509] RIP: 0010:assert_plane+0x71/0xbb
[3.764451] Call Trace:
[3.766888] intel_atomic_commit_tail+0xa97/0xb77
[3.771569] intel_atomic_commit+0x26a/0x279
[3.771572] drm_atomic_helper_set_config+0x5c/0x76
[3.780670] __drm_mode_set_config_internal+0x66/0x109
[3.780672] drm_mode_setcrtc+0x4c9/0x5cc
[3.780674] ? drm_mode_getcrtc+0x162/0x162
[3.789774] ? drm_mode_getcrtc+0x162/0x162
[3.798108] drm_ioctl_kernel+0x8d/0xe4
[3.801926] drm_ioctl+0x27d/0x368
[3.805311] ? drm_mode_getcrtc+0x162/0x162
[3.805314] ? selinux_file_ioctl+0x14e/0x199
[3.805317] vfs_ioctl+0x21/0x2f
[3.813812] do_vfs_ioctl+0x491/0x4b4
[3.813813] ? security_file_ioctl+0x37/0x4b
[3.813816] ksys_ioctl+0x55/0x75
[3.820672] __x64_sys_ioctl+0x1a/0x1e
[3.820674] do_syscall_64+0x51/0x5f
[3.820678] entry_SYSCALL_64_after_hwframe+0x44/0xa9
[3.828221] RIP: 0033:0x7b5e04953967
[3.835504] RSP: 002b:7fff2eafb6f8 EFLAGS: 0246 ORIG_RAX:
0010
[3.835505] RAX: ffda RBX: 0002 RCX: 7b5e04953967
[3.835505] RDX: 7fff2eafb730 RSI: c06864a2 RDI: 000f
[3.835506] RBP: 7fff2eafb720 R08: R09:
[3.835507] R10: 0070 R11: 0246 R12: 000f
[3.879988] R13: 56bc9dd7d210 R14: 7fff2eafb730 R15: c06864a2
[3.887081] Code: 48 c7 c7 06 71 a5 be 84 c0 48 c7 c2 06 fd a3 be 48 89 f9
48 0f 44 ca 84 db 48 0f 45 d7 48 c7 c7 df d3 a4 be 31 c0 e8 af a0 c0 ff <0f> 0b
eb 2b 48 c7 c7 06 fd a3 be 84 c0 48 c7 c2 06 71 a5 be 48
[3.905845] WARNING: CPU: 2 PID: 354 at
drivers/gpu/drm/i915/intel_display.c:1294 assert_plane+0x71/0xbb
[3.920964] ---[ end trace dac692f4ac46391a ]---
The warning is seen when mode_setcrtc() is called for pipeB
during bootup and before we get a mode_setcrtc() for pipeA,
while doing update_crtcs() in intel_atomic_commit_tail().
Now since, plane1A is still active after commit, update_crtcs()
is done for pipeA and eventually update_plane() for plane1A.
intel_plane_state->ctl for plane1A is not updated since set_modecrtc() is
called for pipeB. So intel_plane_state->ctl for plane 1A will be 0x0.
So doing an update_plane() for plane1A, will result in clearing
PLANE_CTL_ENABLE bit, and hence the warning.
To fix this warning, force all active planes to recompute their states
in probe.
Signed-off-by: Azhar Shaikh
---
Changes in v4:
- Handle locking in intel_initial_commit()
- Move the for loop inside intel_initial_commit() so that
drm_atomic_commit() is called only once
- Call intel_initial_commit() only for more than one active crtc on boot.
- Save the return value of intel_initial_commit() and print a message in
case of an error
Changes in v3:
- Add comments
Changes in v2:
- Force all planes to recompute their states.(Ville Syrjälä)
- Update the commit message
drivers/gpu/drm/i915/intel_display.c | 81 +++-
1 file changed, 79 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 3709fa1b6318..40bdb28aa2a5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15092,12 +15092,76 @@ static void intel_update_fdi_pll_freq(struct
drm_i915_private *dev_priv)
DRM_DEBUG_DRIVER("FDI PLL freq=%d\n", dev_priv->fdi_pll_freq);
}
+static int intel_initial_commit(struct drm_device *dev)
+{
+ struct drm_atomic_state *state = NULL;
+ struct drm_modeset_acquire_ctx ctx;
+ struct drm_crtc_state *crtc_state;
+ struct intel_crtc *intel_crtc;
+ int ret = 0;
+
+ drm_modeset_acquire_init(, 0);
+
+retry:
+ state = drm_atomic_state_alloc(dev);
+ if (!state)
+ goto unlock;
+
+ state->acquire_ctx =
+
+ ret = drm_modeset_lock_all_ctx(dev, );
+ if (ret == -EDEADLK) {
+ drm_atomic_state_clear(state);
+ drm_modeset_backoff();
+ goto retry;
+ } else if (WARN_ON(ret)) {
+ goto
Re: [Intel-gfx] [PATCH] drm/i915: mark expected switch fall-through
Hi Jani,
On 06/21/2018 03:03 AM, Jani Nikula wrote:
> On Wed, 20 Jun 2018, "Gustavo A. R. Silva" wrote:
>> On 06/20/2018 02:06 PM, Rodrigo Vivi wrote:
>>> On Wed, Jun 20, 2018 at 08:31:00AM -0500, Gustavo A. R. Silva wrote:
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
Addresses-Coverity-ID: 1470102 ("Missing break in switch")
>>>
>>> Any other advantage besides coverity?
>>> Can't we address it by marking as "Intentional" on the tool?
>>>
>>
>> Yes. The advantage of this is that it will eventually allows to enable
>> -Wimplicit-fallthrough, hence, enabling the compiler to trigger a
>> warning, which will force us to double check if we are actually missing
>> a break before committing the code.
>
> I applaud the efforts. Since you're doing the comment changes, do you
> have an idea what -Wimplicit-fallthrough=N level is being considered for
> kernel?
>
Currently, we are trying level 2.
>>> I'm afraid there will be so many more places to add fallthrough
>>> marks
>>>
>>
>> Oh yeah, there are around 1000 similar places in the whole codebase.
>> There is an ongoing effort to review each case. Months ago, it used to
>> be around 1500 of these cases.
>
> We use our own MISSING_CASE() to indicate stuff that's not supposed to
> happen, or to be implemented, etc. and in many cases the fallthrough is
> normal. I wonder if we could embed __attribute__ ((fallthrough)) in
> there to tackle all of these without a comment.
>
I've tried this:
diff --git a/drivers/gpu/drm/i915/i915_utils.h
b/drivers/gpu/drm/i915/i915_utils.h
index 00165ad..829572c 100644
--- a/drivers/gpu/drm/i915/i915_utils.h
+++ b/drivers/gpu/drm/i915/i915_utils.h
@@ -40,8 +40,10 @@
#undef WARN_ON_ONCE
#define WARN_ON_ONCE(x) WARN_ONCE((x), "%s", "WARN_ON_ONCE(" __stringify(x)
")")
-#define MISSING_CASE(x) WARN(1, "Missing case (%s == %ld)\n", \
-__stringify(x), (long)(x))
+#define MISSING_CASE(x) ({ \
+ WARN(1, "Missing case (%s == %ld)\n", __stringify(x), (long)(x)); \
+ __attribute__ ((fallthrough)); \
+})
#if GCC_VERSION >= 7
#define add_overflows(A, B) \
and I get the following warnings as a consequence:
drivers/gpu/drm/i915/intel_pm.c: In function ‘intel_init_clock_gating_hooks’:
drivers/gpu/drm/i915/i915_utils.h:48:2: error: invalid use of attribute
‘fallthrough’
__attribute__ ((fallthrough)); \
^
drivers/gpu/drm/i915/intel_pm.c:9240:3: note: in expansion of macro
‘MISSING_CASE’
MISSING_CASE(INTEL_DEVID(dev_priv));
^~~~
drivers/gpu/drm/i915/intel_pm.c: In function ‘intel_read_wm_latency’:
drivers/gpu/drm/i915/i915_utils.h:48:2: error: invalid use of attribute
‘fallthrough’
__attribute__ ((fallthrough)); \
^
drivers/gpu/drm/i915/intel_pm.c:2902:3: note: in expansion of macro
‘MISSING_CASE’
MISSING_CASE(INTEL_DEVID(dev_priv));
^~~~
Thanks
--
Gustavo
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/atomic-helper: Use old/new state in drm_atomic_helper_commit_planes_on_crtc()
== Series Details == Series: drm/atomic-helper: Use old/new state in drm_atomic_helper_commit_planes_on_crtc() URL : https://patchwork.freedesktop.org/series/45440/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4382_full -> Patchwork_9431_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_9431_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_9431_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_9431_full: === IGT changes === Warnings igt@gem_exec_schedule@deep-bsd2: shard-kbl: PASS -> SKIP igt@gem_exec_schedule@deep-vebox: shard-kbl: SKIP -> PASS igt@kms_plane_multiple@atomic-pipe-b-tiling-x: shard-snb: SKIP -> PASS +1 == Known issues == Here are the changes found in Patchwork_9431_full that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_gtt: shard-glk: PASS -> FAIL (fdo#105347) igt@drv_selftest@live_hangcheck: shard-apl: PASS -> DMESG-FAIL (fdo#106947, fdo#106560) igt@gem_exec_big: shard-hsw: PASS -> INCOMPLETE (fdo#103540) igt@gem_exec_schedule@pi-ringfull-bsd1: shard-kbl: NOTRUN -> FAIL (fdo#103158) +1 igt@kms_flip@flip-vs-panning-vs-hang: shard-snb: PASS -> DMESG-WARN (fdo#103821) igt@kms_flip_tiling@flip-x-tiled: shard-glk: PASS -> FAIL (fdo#104724, fdo#103822) +2 Possible fixes igt@gem_ctx_isolation@rcs0-s3: shard-kbl: INCOMPLETE (fdo#103665) -> PASS igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size: shard-hsw: FAIL (fdo#103355) -> PASS igt@kms_flip@flip-vs-expired-vblank: shard-glk: FAIL (fdo#102887, fdo#105363) -> PASS igt@kms_flip@plain-flip-fb-recreate: shard-glk: FAIL (fdo#100368) -> PASS +1 igt@kms_setmode@basic: shard-kbl: FAIL (fdo#99912) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103355 https://bugs.freedesktop.org/show_bug.cgi?id=103355 fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103821 https://bugs.freedesktop.org/show_bug.cgi?id=103821 fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822 fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724 fdo#105347 https://bugs.freedesktop.org/show_bug.cgi?id=105347 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560 fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4382 -> Patchwork_9431 CI_DRM_4382: ffc2d866e9b04af3cc2244bb7448d7f7eb438a89 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9431: 463bac186209c5a76063048fa8ff8ab18b7d17ce @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9431/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/icl: Add power well support
Em Ter, 2018-06-26 às 17:22 +0300, Imre Deak escreveu:
> Add the definition for ICL power wells and their mapping to power
> domains. On ICL there are 3 power well control registers, we'll
> select
> the correct one based on higher bits of the power well ID. The offset
> for the control and status flags within this register is based on the
> lower bits of the ID as on older platforms.
>
> As the DC state programming is also the same as on old platforms we
> can
> reuse the corresponding helpers. For this we mark here the DC-off
> power
> well as shared among multiple platforms.
>
> Other than the above the delta between old platforms and ICL:
> - Pipe C has its own power well, so we can save some additional power
> in the
> pipe A+B and (non-eDP) pipe A configurations.
> - Power wells for port E/F DDI/AUX IO and Thunderbolt 1-4 AUX IO
>
> v2:
> - Rebase on drm-tip after prep patch for this was merged there as
> requested by Paulo.
> - Actually add the new AUX and DDI power well control regs (Rakshmi)
>
> v3:
> - Fix power well register names in code comments
> - Add TBT AUX->power well 3 dependency
>
> v4:
> - Rebase
>
> v5:
> - Detach AUX power wells from the INIT power domain. These power
> wells
> can only be enabled in a TC/TBT connected state and otherwise not
> needed during driver initialization.
>
> Cc: Animesh Manna
> Cc: Rakshmi Bhatia
> Cc: Paulo Zanoni
> Signed-off-by: Imre Deak
> Reviewed-by: Animesh Manna (v1)
> ---
> drivers/gpu/drm/i915/i915_reg.h | 78 +++-
> drivers/gpu/drm/i915/intel_display.h| 4 +
> drivers/gpu/drm/i915/intel_runtime_pm.c | 329
> +++-
> 3 files changed, 395 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h
> index caad19f5f557..865b05ce8d76 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1045,13 +1045,13 @@ enum i915_power_well_id {
>
> /*
>* HSW/BDW
> - * - HSW_PWR_WELL_CTL_DRIVER(0) (status bit: id*2, req bit:
> id*2+1)
> + * - _HSW_PWR_WELL_CTL1-4 (status bit: id*2, req bit:
> id*2+1)
>*/
> HSW_DISP_PW_GLOBAL = 15,
>
> /*
>* GEN9+
> - * - HSW_PWR_WELL_CTL_DRIVER(0) (status bit: id*2, req bit:
> id*2+1)
> + * - _HSW_PWR_WELL_CTL1-4 (status bit: id*2, req bit:
> id*2+1)
>*/
> SKL_DISP_PW_MISC_IO = 0,
> SKL_DISP_PW_DDI_A_E,
> @@ -1075,17 +1075,54 @@ enum i915_power_well_id {
> SKL_DISP_PW_2,
>
> /* - custom power wells */
> - SKL_DISP_PW_DC_OFF,
> BXT_DPIO_CMN_A,
> BXT_DPIO_CMN_BC,
> - GLK_DPIO_CMN_C, /* 19 */
> + GLK_DPIO_CMN_C, /* 18 */
> +
> + /*
> + * GEN11+
> + * - _HSW_PWR_WELL_CTL1-4
> + *(status bit: (id&15)*2, req bit:(id&15)*2+1)
> + */
> + ICL_DISP_PW_1 = 0,
> + ICL_DISP_PW_2,
> + ICL_DISP_PW_3,
> + ICL_DISP_PW_4,
> +
> + /*
> + * - _HSW_PWR_WELL_CTL_AUX1/2/4
> + *(status bit: (id&15)*2, req bit:(id&15)*2+1)
> + */
> + ICL_DISP_PW_AUX_A = 16,
> + ICL_DISP_PW_AUX_B,
> + ICL_DISP_PW_AUX_C,
> + ICL_DISP_PW_AUX_D,
> + ICL_DISP_PW_AUX_E,
> + ICL_DISP_PW_AUX_F,
> +
> + ICL_DISP_PW_AUX_TBT1 = 24,
> + ICL_DISP_PW_AUX_TBT2,
> + ICL_DISP_PW_AUX_TBT3,
> + ICL_DISP_PW_AUX_TBT4,
> +
> + /*
> + * - _HSW_PWR_WELL_CTL_DDI1/2/4
> + *(status bit: (id&15)*2, req bit:(id&15)*2+1)
> + */
> + ICL_DISP_PW_DDI_A = 32,
> + ICL_DISP_PW_DDI_B,
> + ICL_DISP_PW_DDI_C,
> + ICL_DISP_PW_DDI_D,
> + ICL_DISP_PW_DDI_E,
> + ICL_DISP_PW_DDI_F, /* 37 */
>
> /*
>* Multiple platforms.
>* Must start following the highest ID of any platform.
>* - custom power wells
>*/
> - I915_DISP_PW_ALWAYS_ON = 20,
> + SKL_DISP_PW_DC_OFF = 38,
> + I915_DISP_PW_ALWAYS_ON,
> };
>
> #define PUNIT_REG_PWRGT_CTRL 0x60
> @@ -1679,6 +1716,13 @@ enum i915_power_well_id {
> #define IREF1RC_OFFSET_MASK(0xFF <<
> IREF1RC_OFFSET_SHIFT)
> #define BXT_PORT_CL1CM_DW10(phy) _BXT_PHY((phy),
> _PORT_CL1CM_DW10_BC)
>
> +#define _ICL_PORT_CL_DW12_A 0x162030
> +#define _ICL_PORT_CL_DW12_B 0x6C030
> +#define ICL_LANE_ENABLE_AUX(1 << 0)
> +#define ICL_PORT_CL_DW12(port) _MMIO(_PICK((port),
You can get away with _PIPE instead of _PICK here, which is supposed to
be a little more efficient.
Otherwise, looks correct (minus checkpatch problems).
Reviewed-by: Paulo Zanoni
But I would say the PW code is getting very hard to read. The whole
magic behind the i915_power_well_id enum values is hard to read, and a
lot of other magic macros build on top of that. I would really love if
our code were a little more straightforward, less reliant on the magic,
even if it were a little bigger.
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v7,1/5] drm/i915/psr: Remove intel_crtc_state parameter from disable_source()
== Series Details == Series: series starting with [v7,1/5] drm/i915/psr: Remove intel_crtc_state parameter from disable_source() URL : https://patchwork.freedesktop.org/series/45436/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4382_full -> Patchwork_9430_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_9430_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_9430_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_9430_full: === IGT changes === Warnings igt@gem_exec_schedule@deep-vebox: shard-kbl: SKIP -> PASS igt@gem_linear_blits@interruptible: shard-apl: PASS -> SKIP igt@kms_plane_multiple@atomic-pipe-b-tiling-x: shard-snb: SKIP -> PASS +2 == Known issues == Here are the changes found in Patchwork_9430_full that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_gtt: shard-glk: PASS -> FAIL (fdo#105347) igt@drv_selftest@live_hangcheck: shard-apl: PASS -> DMESG-FAIL (fdo#106947, fdo#106560) igt@drv_suspend@shrink: shard-kbl: PASS -> FAIL (fdo#106886) igt@gem_exec_schedule@pi-ringfull-bsd1: shard-kbl: NOTRUN -> FAIL (fdo#103158) +1 igt@gem_softpin@noreloc-s3: shard-kbl: PASS -> INCOMPLETE (fdo#103665) igt@kms_atomic_transition@1x-modeset-transitions-nonblocking: shard-glk: PASS -> FAIL (fdo#105703) igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic: shard-hsw: PASS -> FAIL (fdo#105767) igt@kms_flip_tiling@flip-to-x-tiled: shard-glk: PASS -> FAIL (fdo#103822, fdo#104724) igt@kms_flip_tiling@flip-x-tiled: shard-glk: PASS -> FAIL (fdo#104724) +2 igt@kms_setmode@basic: shard-apl: PASS -> FAIL (fdo#99912) Possible fixes igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size: shard-hsw: FAIL (fdo#103355) -> PASS igt@kms_flip@plain-flip-fb-recreate: shard-glk: FAIL (fdo#100368) -> PASS +2 fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103355 https://bugs.freedesktop.org/show_bug.cgi?id=103355 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822 fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724 fdo#105347 https://bugs.freedesktop.org/show_bug.cgi?id=105347 fdo#105703 https://bugs.freedesktop.org/show_bug.cgi?id=105703 fdo#105767 https://bugs.freedesktop.org/show_bug.cgi?id=105767 fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560 fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886 fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4382 -> Patchwork_9430 CI_DRM_4382: ffc2d866e9b04af3cc2244bb7448d7f7eb438a89 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9430: e8a93b1c4cec19c8565909bc0744a96068009163 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9430/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/icp: Add Interrupt Support
Em Ter, 2018-06-26 às 13:52 -0700, Anusha Srivatsa escreveu:
> This patch addresses Interrupts from south display engine (SDE).
>
> ICP has two registers - SHOTPLUG_CTL_DDI and SHOTPLUG_CTL_TC.
> Introduce these registers and their intended values.
>
> Introduce icp_irq_handler().
>
> The icp_irq_postinstall() takes care of
> enabling all PCH interrupt sources, to unmask
> them as needed with SDEIMR, as is done
> done by ibx_irq_pre_postinstall() for earlier platforms.
> We do not need to explicitly call the ibx_irq_pre_postinstall().
>
> Also, while changing these,
> s/CPT/PPT/CPT-CNP comment.
>
> v2:
> - remove redundant register defines.(Lucas)
> - Change register names to be more consistent with
> previous platforms (Lucas)
>
> v3:
> -Reorder bit defines to a more appropriate location.
> Change the comments. Confirm in the commit message that
> icp_irq_postinstall() need not go to
> ibx_irq_pre_postinstall() and ibx_irq_postinstall()
> as in earlier platforms. (Paulo)
>
> Cc: Lucas De Marchi
> Cc: Paulo Zanoni
> Cc: Dhinakaran Pandiyan
> Cc: Ville Syrjala
> Signed-off-by: Anusha Srivatsa
> [Paulo: coding style bikesheds and rebases].
> Signed-off-by: Paulo Zanoni
> ---
> drivers/gpu/drm/i915/i915_irq.c | 134
> +++-
> drivers/gpu/drm/i915/i915_reg.h | 42 -
> 2 files changed, 173 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c
> b/drivers/gpu/drm/i915/i915_irq.c
> index 46aaef5..7a7c4a2 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -122,6 +122,15 @@ static const u32 hpd_gen11[HPD_NUM_PINS] = {
> [HPD_PORT_F] = GEN11_TC4_HOTPLUG | GEN11_TBT4_HOTPLUG
> };
>
> +static const u32 hpd_icp[HPD_NUM_PINS] = {
> + [HPD_PORT_A] = SDE_DDIA_HOTPLUG_ICP,
> + [HPD_PORT_B] = SDE_DDIB_HOTPLUG_ICP,
> + [HPD_PORT_C] = SDE_TC1_HOTPLUG_ICP,
> + [HPD_PORT_D] = SDE_TC2_HOTPLUG_ICP,
> + [HPD_PORT_E] = SDE_TC3_HOTPLUG_ICP,
> + [HPD_PORT_F] = SDE_TC4_HOTPLUG_ICP
> +};
> +
> /* IIR can theoretically queue up two events. Be paranoid. */
> #define GEN8_IRQ_RESET_NDX(type, which) do { \
> I915_WRITE(GEN8_##type##_IMR(which), 0x); \
> @@ -1586,6 +1595,34 @@ static bool bxt_port_hotplug_long_detect(enum
> port port, u32 val)
> }
> }
>
> +static bool icp_ddi_port_hotplug_long_detect(enum port port, u32
> val)
> +{
> + switch (port) {
> + case PORT_A:
> + return val & ICP_DDIA_HPD_LONG_DETECT;
> + case PORT_B:
> + return val & ICP_DDIB_HPD_LONG_DETECT;
> + default:
> + return false;
> + }
> +}
> +
> +static bool icp_tc_port_hotplug_long_detect(enum port port, u32 val)
> +{
> + switch (port) {
> + case PORT_C:
> + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC1);
> + case PORT_D:
> + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC2);
> + case PORT_E:
> + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC3);
> + case PORT_F:
> + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC4);
> + default:
> + return false;
> + }
> +}
> +
> static bool spt_port_hotplug2_long_detect(enum port port, u32 val)
> {
> switch (port) {
> @@ -2385,6 +2422,43 @@ static void cpt_irq_handler(struct
> drm_i915_private *dev_priv, u32 pch_iir)
> cpt_serr_int_handler(dev_priv);
> }
>
> +static void icp_irq_handler(struct drm_i915_private *dev_priv, u32
> pch_iir)
> +{
> + u32 ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP;
> + u32 tc_hotplug_trigger = pch_iir & SDE_TC_MASK_ICP;
> + u32 pin_mask = 0, long_mask = 0;
> +
> + if (ddi_hotplug_trigger) {
> + u32 dig_hotplug_reg;
> +
> + dig_hotplug_reg = I915_READ(SHOTPLUG_CTL_DDI);
> + I915_WRITE(SHOTPLUG_CTL_DDI, dig_hotplug_reg);
> +
> + intel_get_hpd_pins(dev_priv, _mask, _mask,
> +ddi_hotplug_trigger,
> +dig_hotplug_reg, hpd_icp,
> +icp_ddi_port_hotplug_long_detect)
> ;
> + }
> +
> + if (tc_hotplug_trigger) {
> + u32 dig_hotplug_reg;
> +
> + dig_hotplug_reg = I915_READ(SHOTPLUG_CTL_TC);
> + I915_WRITE(SHOTPLUG_CTL_TC, dig_hotplug_reg);
> +
> + intel_get_hpd_pins(dev_priv, _mask, _mask,
> +tc_hotplug_trigger,
> +dig_hotplug_reg, hpd_icp,
> +icp_tc_port_hotplug_long_detect);
> + }
> +
> + if (pin_mask)
> + intel_hpd_irq_handler(dev_priv, pin_mask,
> long_mask);
> +
> + if (pch_iir & SDE_GMBUS_ICP)
> + gmbus_irq_handler(dev_priv);
> +}
> +
> static void spt_irq_handler(struct drm_i915_private *dev_priv, u32
> pch_iir)
> {
> u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_SPT &
> @@ -2804,8 +2878,11 @@
Re: [Intel-gfx] [PATCH 09/10] drm/vc4: Use drm_crtc_mask()
Ville Syrjala writes: > From: Ville Syrjälä > > Use drm_crtc_mask() where appropriate. Reviewed-by: Eric Anholt signature.asc Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [01/10] drm: Add drm_plane_mask()
== Series Details == Series: series starting with [01/10] drm: Add drm_plane_mask() URL : https://patchwork.freedesktop.org/series/45433/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4382_full -> Patchwork_9429_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_9429_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_9429_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_9429_full: === IGT changes === Warnings igt@gem_exec_schedule@deep-blt: shard-kbl: PASS -> SKIP igt@gem_exec_schedule@deep-vebox: shard-kbl: SKIP -> PASS +2 igt@gem_linear_blits@interruptible: shard-apl: PASS -> SKIP igt@kms_cursor_crc@cursor-128x128-offscreen: shard-snb: PASS -> SKIP igt@kms_plane_multiple@atomic-pipe-b-tiling-x: shard-snb: SKIP -> PASS +1 == Known issues == Here are the changes found in Patchwork_9429_full that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_hangcheck: shard-glk: PASS -> DMESG-FAIL (fdo#106560, fdo#106947) igt@gem_exec_schedule@pi-ringfull-bsd2: shard-kbl: NOTRUN -> FAIL (fdo#103158) igt@gem_exec_schedule@preemptive-hang-render: shard-snb: SKIP -> INCOMPLETE (fdo#105411) igt@kms_flip@dpms-vs-vblank-race: shard-glk: PASS -> FAIL (fdo#103060) igt@kms_flip_tiling@flip-to-x-tiled: shard-glk: PASS -> FAIL (fdo#103822, fdo#104724) igt@kms_flip_tiling@flip-x-tiled: shard-glk: PASS -> FAIL (fdo#104724) igt@kms_setmode@basic: shard-apl: PASS -> FAIL (fdo#99912) Possible fixes igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size: shard-hsw: FAIL (fdo#103355) -> PASS igt@kms_flip@flip-vs-expired-vblank: shard-glk: FAIL (fdo#105363, fdo#102887) -> PASS igt@kms_flip@plain-flip-fb-recreate: shard-glk: FAIL (fdo#100368) -> PASS +1 igt@kms_setmode@basic: shard-kbl: FAIL (fdo#99912) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060 fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103355 https://bugs.freedesktop.org/show_bug.cgi?id=103355 fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822 fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411 fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560 fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4382 -> Patchwork_9429 CI_DRM_4382: ffc2d866e9b04af3cc2244bb7448d7f7eb438a89 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9429: 52ee5878407ba7463503f72e878c899f51721d09 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9429/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RFC][PATCH] Makefile: globally enable VLA warning
On Tue, Jun 26, 2018 at 1:21 PM, Joe Perches wrote: > On Tue, 2018-06-26 at 10:40 -0700, Kees Cook wrote: >> This is the patch I've got prepared now that fixes for all VLAs have been >> sent to maintainers (some are still under review/adjustment, but there >> aren't any unexplored cases left). My intention would be to have this land >> at the end of the next merge window after all the pending VLA patches >> have landed. I just wanted to get any feedback here, since it touches >> a couple areas in the process and I didn't want anyone to be surprised. :) > [] >> diff --git a/Makefile b/Makefile > [] >> @@ -778,6 +778,9 @@ NOSTDINC_FLAGS += -nostdinc -isystem $(shell $(CC) >> -print-file-name=include) >> # warn about C99 declaration after statement >> KBUILD_CFLAGS += $(call cc-option,-Wdeclaration-after-statement,) >> >> +# VLAs should not be used anywhere in the kernel >> +KBUILD_CFLAGS += $(call cc-option,-Wvla) > > I'd probably spell out what a VLA is here. > # VLAs (Variable Length Arrays) should not be used anywhere in the kernel > > Beyond that, seems sensible, thanks. Ah yes, good idea. I've made that change locally now. Thanks! -Kees -- Kees Cook Pixel Security ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icp: Add Interrupt Support
== Series Details == Series: drm/i915/icp: Add Interrupt Support URL : https://patchwork.freedesktop.org/series/45443/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4382 -> Patchwork_9432 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/45443/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_9432 that come from known issues: === IGT changes === Issues hit igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-snb-2520m: PASS -> INCOMPLETE (fdo#103713) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: fi-skl-6700k2: PASS -> FAIL (fdo#103191, fdo#104724) fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724 == Participating hosts (44 -> 39) == Missing(5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u == Build changes == * Linux: CI_DRM_4382 -> Patchwork_9432 CI_DRM_4382: ffc2d866e9b04af3cc2244bb7448d7f7eb438a89 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9432: 1af6e834bbe4230961a720f60ff8c55d2e84f024 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 1af6e834bbe4 drm/i915/icp: Add Interrupt Support == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9432/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/atomic-helper: Use old/new state in drm_atomic_helper_commit_planes_on_crtc()
== Series Details == Series: drm/atomic-helper: Use old/new state in drm_atomic_helper_commit_planes_on_crtc() URL : https://patchwork.freedesktop.org/series/45440/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4382 -> Patchwork_9431 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/45440/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_9431 that come from known issues: === IGT changes === Issues hit igt@debugfs_test@read_all_entries: fi-snb-2520m: PASS -> INCOMPLETE (fdo#103713) igt@gem_exec_suspend@basic-s4-devices: fi-kbl-7500u: PASS -> DMESG-WARN (fdo#105128) fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fdo#105128 https://bugs.freedesktop.org/show_bug.cgi?id=105128 == Participating hosts (44 -> 39) == Missing(5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u == Build changes == * Linux: CI_DRM_4382 -> Patchwork_9431 CI_DRM_4382: ffc2d866e9b04af3cc2244bb7448d7f7eb438a89 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9431: 463bac186209c5a76063048fa8ff8ab18b7d17ce @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 463bac186209 drm/atomic-helper: Use old/new state in drm_atomic_helper_commit_planes_on_crtc() == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9431/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/icp: Add Interrupt Support
This patch addresses Interrupts from south display engine (SDE).
ICP has two registers - SHOTPLUG_CTL_DDI and SHOTPLUG_CTL_TC.
Introduce these registers and their intended values.
Introduce icp_irq_handler().
The icp_irq_postinstall() takes care of
enabling all PCH interrupt sources, to unmask
them as needed with SDEIMR, as is done
done by ibx_irq_pre_postinstall() for earlier platforms.
We do not need to explicitly call the ibx_irq_pre_postinstall().
Also, while changing these,
s/CPT/PPT/CPT-CNP comment.
v2:
- remove redundant register defines.(Lucas)
- Change register names to be more consistent with
previous platforms (Lucas)
v3:
-Reorder bit defines to a more appropriate location.
Change the comments. Confirm in the commit message that
icp_irq_postinstall() need not go to
ibx_irq_pre_postinstall() and ibx_irq_postinstall()
as in earlier platforms. (Paulo)
Cc: Lucas De Marchi
Cc: Paulo Zanoni
Cc: Dhinakaran Pandiyan
Cc: Ville Syrjala
Signed-off-by: Anusha Srivatsa
[Paulo: coding style bikesheds and rebases].
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_irq.c | 134 +++-
drivers/gpu/drm/i915/i915_reg.h | 42 -
2 files changed, 173 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 46aaef5..7a7c4a2 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -122,6 +122,15 @@ static const u32 hpd_gen11[HPD_NUM_PINS] = {
[HPD_PORT_F] = GEN11_TC4_HOTPLUG | GEN11_TBT4_HOTPLUG
};
+static const u32 hpd_icp[HPD_NUM_PINS] = {
+ [HPD_PORT_A] = SDE_DDIA_HOTPLUG_ICP,
+ [HPD_PORT_B] = SDE_DDIB_HOTPLUG_ICP,
+ [HPD_PORT_C] = SDE_TC1_HOTPLUG_ICP,
+ [HPD_PORT_D] = SDE_TC2_HOTPLUG_ICP,
+ [HPD_PORT_E] = SDE_TC3_HOTPLUG_ICP,
+ [HPD_PORT_F] = SDE_TC4_HOTPLUG_ICP
+};
+
/* IIR can theoretically queue up two events. Be paranoid. */
#define GEN8_IRQ_RESET_NDX(type, which) do { \
I915_WRITE(GEN8_##type##_IMR(which), 0x); \
@@ -1586,6 +1595,34 @@ static bool bxt_port_hotplug_long_detect(enum port port,
u32 val)
}
}
+static bool icp_ddi_port_hotplug_long_detect(enum port port, u32 val)
+{
+ switch (port) {
+ case PORT_A:
+ return val & ICP_DDIA_HPD_LONG_DETECT;
+ case PORT_B:
+ return val & ICP_DDIB_HPD_LONG_DETECT;
+ default:
+ return false;
+ }
+}
+
+static bool icp_tc_port_hotplug_long_detect(enum port port, u32 val)
+{
+ switch (port) {
+ case PORT_C:
+ return val & ICP_TC_HPD_LONG_DETECT(PORT_TC1);
+ case PORT_D:
+ return val & ICP_TC_HPD_LONG_DETECT(PORT_TC2);
+ case PORT_E:
+ return val & ICP_TC_HPD_LONG_DETECT(PORT_TC3);
+ case PORT_F:
+ return val & ICP_TC_HPD_LONG_DETECT(PORT_TC4);
+ default:
+ return false;
+ }
+}
+
static bool spt_port_hotplug2_long_detect(enum port port, u32 val)
{
switch (port) {
@@ -2385,6 +2422,43 @@ static void cpt_irq_handler(struct drm_i915_private
*dev_priv, u32 pch_iir)
cpt_serr_int_handler(dev_priv);
}
+static void icp_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
+{
+ u32 ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP;
+ u32 tc_hotplug_trigger = pch_iir & SDE_TC_MASK_ICP;
+ u32 pin_mask = 0, long_mask = 0;
+
+ if (ddi_hotplug_trigger) {
+ u32 dig_hotplug_reg;
+
+ dig_hotplug_reg = I915_READ(SHOTPLUG_CTL_DDI);
+ I915_WRITE(SHOTPLUG_CTL_DDI, dig_hotplug_reg);
+
+ intel_get_hpd_pins(dev_priv, _mask, _mask,
+ ddi_hotplug_trigger,
+ dig_hotplug_reg, hpd_icp,
+ icp_ddi_port_hotplug_long_detect);
+ }
+
+ if (tc_hotplug_trigger) {
+ u32 dig_hotplug_reg;
+
+ dig_hotplug_reg = I915_READ(SHOTPLUG_CTL_TC);
+ I915_WRITE(SHOTPLUG_CTL_TC, dig_hotplug_reg);
+
+ intel_get_hpd_pins(dev_priv, _mask, _mask,
+ tc_hotplug_trigger,
+ dig_hotplug_reg, hpd_icp,
+ icp_tc_port_hotplug_long_detect);
+ }
+
+ if (pin_mask)
+ intel_hpd_irq_handler(dev_priv, pin_mask, long_mask);
+
+ if (pch_iir & SDE_GMBUS_ICP)
+ gmbus_irq_handler(dev_priv);
+}
+
static void spt_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
{
u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_SPT &
@@ -2804,8 +2878,11 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv,
u32 master_ctl)
I915_WRITE(SDEIIR, iir);
ret = IRQ_HANDLED;
- if (HAS_PCH_SPT(dev_priv) || HAS_PCH_KBP(dev_priv) ||
-
Re: [Intel-gfx] [PATCH 6/8] drm/nouveau: Use drm_for_each_connector_encoder_ids()
Hi Ville,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm/drm-next]
[also build test WARNING on v4.18-rc2 next-20180626]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Ville-Syrjala/drm-Second-attempt-at-fixing-the-fb-helper-best_encoder-mess/20180627-024018
base: git://people.freedesktop.org/~airlied/linux.git drm-next
config: x86_64-randconfig-x012-201825 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-16) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
Note: it may well be a FALSE warning. FWIW you are at least aware of it now.
http://gcc.gnu.org/wiki/Better_Uninitialized_Warnings
All warnings (new ones prefixed by >>):
drivers/gpu//drm/nouveau/nouveau_connector.c: In function
'nouveau_connector_detect':
>> drivers/gpu//drm/nouveau/nouveau_connector.c:606:33: warning: 'nv_encoder'
>> may be used uninitialized in this function [-Wmaybe-uninitialized]
if (nv_partner && ((nv_encoder->dcb->type == DCB_OUTPUT_ANALOG &&
~~^
vim +/nv_encoder +606 drivers/gpu//drm/nouveau/nouveau_connector.c
6ee73861 Ben Skeggs2009-12-11 546
6ee73861 Ben Skeggs2009-12-11 547 static enum drm_connector_status
930a9e28 Chris Wilson 2010-09-14 548 nouveau_connector_detect(struct
drm_connector *connector, bool force)
6ee73861 Ben Skeggs2009-12-11 549 {
6ee73861 Ben Skeggs2009-12-11 550 struct drm_device *dev =
connector->dev;
77145f1c Ben Skeggs2012-07-31 551 struct nouveau_drm *drm =
nouveau_drm(dev);
6ee73861 Ben Skeggs2009-12-11 552 struct nouveau_connector
*nv_connector = nouveau_connector(connector);
6ee73861 Ben Skeggs2009-12-11 553 struct nouveau_encoder
*nv_encoder = NULL;
e19b20bb Ben Skeggs2011-07-12 554 struct nouveau_encoder
*nv_partner;
2aa5eac5 Ben Skeggs2015-08-20 555 struct i2c_adapter *i2c;
03cd06ca Francisco Jerez 2010-07-20 556 int type;
5addcf0a Dave Airlie 2012-09-10 557 int ret;
5addcf0a Dave Airlie 2012-09-10 558 enum drm_connector_status
conn_status = connector_status_disconnected;
6ee73861 Ben Skeggs2009-12-11 559
b8780e2a Francisco Jerez 2010-01-14 560 /* Cleanup the previous EDID
block. */
b8780e2a Francisco Jerez 2010-01-14 561 if (nv_connector->edid) {
b8780e2a Francisco Jerez 2010-01-14 562
drm_mode_connector_update_edid_property(connector, NULL);
c8ebe275 Xavier Chantry2010-01-11 563
kfree(nv_connector->edid);
c8ebe275 Xavier Chantry2010-01-11 564 nv_connector->edid =
NULL;
b8780e2a Francisco Jerez 2010-01-14 565 }
c8ebe275 Xavier Chantry2010-01-11 566
d61a5c10 Lukas Wunner 2018-02-11 567 /* Outputs are only polled
while runtime active, so acquiring a
d61a5c10 Lukas Wunner 2018-02-11 568 * runtime PM ref here is
unnecessary (and would deadlock upon
d61a5c10 Lukas Wunner 2018-02-11 569 * runtime suspend because it
waits for polling to finish).
d61a5c10 Lukas Wunner 2018-02-11 570 */
d61a5c10 Lukas Wunner 2018-02-11 571 if
(!drm_kms_helper_is_poll_worker()) {
5addcf0a Dave Airlie 2012-09-10 572 ret =
pm_runtime_get_sync(connector->dev->dev);
b6c4285a Alexandre Courbot 2014-02-12 573 if (ret < 0 && ret !=
-EACCES)
5addcf0a Dave Airlie 2012-09-10 574 return
conn_status;
d61a5c10 Lukas Wunner 2018-02-11 575 }
5addcf0a Dave Airlie 2012-09-10 576
8777c5c1 Ben Skeggs2014-06-06 577 nv_encoder =
nouveau_connector_ddc_detect(connector);
8777c5c1 Ben Skeggs2014-06-06 578 if (nv_encoder && (i2c =
nv_encoder->i2c) != NULL) {
39c1c901 Lukas Wunner 2016-01-11 579 if
((vga_switcheroo_handler_flags() &
39c1c901 Lukas Wunner 2016-01-11 580
VGA_SWITCHEROO_CAN_SWITCH_DDC) &&
39c1c901 Lukas Wunner 2016-01-11 581 nv_connector->type
== DCB_CONNECTOR_LVDS)
39c1c901 Lukas Wunner 2016-01-11 582
nv_connector->edid = drm_get_edid_switcheroo(connector,
39c1c901 Lukas Wunner 2016-01-11 583
i2c);
39c1c901 Lukas Wunner 2016-01-11 584 else
2aa5eac5 Ben Skeggs2015-08-20 585
nv_connector->edid = drm_get_edid(connector, i2c);
39c1c901 Lukas Wunner 2016-01-11 586
6ee73861 Ben Skeggs2009-12-11 587
drm_mode_connector_update_edid_property(connector,
6ee73861 Ben Skeggs2009-12-11 588
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v7,1/5] drm/i915/psr: Remove intel_crtc_state parameter from disable_source()
== Series Details == Series: series starting with [v7,1/5] drm/i915/psr: Remove intel_crtc_state parameter from disable_source() URL : https://patchwork.freedesktop.org/series/45436/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4382 -> Patchwork_9430 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/45436/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_9430 that come from known issues: === IGT changes === Issues hit igt@gem_exec_suspend@basic-s4-devices: fi-kbl-7500u: PASS -> DMESG-WARN (fdo#105128) Possible fixes igt@gem_exec_gttfill@basic: fi-byt-n2820: FAIL (fdo#106744) -> PASS fdo#105128 https://bugs.freedesktop.org/show_bug.cgi?id=105128 fdo#106744 https://bugs.freedesktop.org/show_bug.cgi?id=106744 == Participating hosts (44 -> 39) == Missing(5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u == Build changes == * Linux: CI_DRM_4382 -> Patchwork_9430 CI_DRM_4382: ffc2d866e9b04af3cc2244bb7448d7f7eb438a89 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9430: e8a93b1c4cec19c8565909bc0744a96068009163 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == e8a93b1c4cec drm/i915/psr: Enable CRC check in the static frame on the sink side af0ebd24c4c2 drm/i915/psr: Avoid PSR exit max time timeout ceb6f782b6a5 drm/i915/psr: Handle PSR errors 0098a2d2d5f5 drm/i915/psr: Begin to handle PSR/PSR2 errors set by sink f7fd8f3ecaaf drm/i915/psr: Remove intel_crtc_state parameter from disable_source() == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9430/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm: Second attempt at fixing the fb-helper .best_encoder() mess
== Series Details == Series: drm: Second attempt at fixing the fb-helper .best_encoder() mess URL : https://patchwork.freedesktop.org/series/45422/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4381_full -> Patchwork_9428_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_9428_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_9428_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_9428_full: === IGT changes === Warnings igt@gem_exec_schedule@deep-vebox: shard-kbl: SKIP -> PASS +2 igt@gem_linear_blits@interruptible: shard-apl: SKIP -> PASS igt@gem_mocs_settings@mocs-rc6-bsd2: shard-kbl: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_9428_full that come from known issues: === IGT changes === Issues hit igt@kms_flip@2x-flip-vs-expired-vblank: shard-glk: PASS -> FAIL (fdo#105363) igt@kms_flip@flip-vs-expired-vblank: shard-glk: PASS -> FAIL (fdo#105189) igt@kms_flip@plain-flip-fb-recreate: shard-glk: PASS -> FAIL (fdo#100368) igt@perf@blocking: shard-hsw: PASS -> FAIL (fdo#102252) Possible fixes igt@gem_exec_await@wide-contexts: shard-glk: FAIL (fdo#105900) -> PASS igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic: shard-hsw: FAIL (fdo#105767) -> PASS igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size: shard-hsw: FAIL (fdo#103355) -> PASS igt@kms_flip_tiling@flip-x-tiled: shard-glk: FAIL (fdo#104724, fdo#103822) -> PASS +2 igt@kms_setmode@basic: shard-apl: FAIL (fdo#99912) -> PASS shard-kbl: FAIL (fdo#99912) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 fdo#103355 https://bugs.freedesktop.org/show_bug.cgi?id=103355 fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822 fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724 fdo#105189 https://bugs.freedesktop.org/show_bug.cgi?id=105189 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#105767 https://bugs.freedesktop.org/show_bug.cgi?id=105767 fdo#105900 https://bugs.freedesktop.org/show_bug.cgi?id=105900 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4381 -> Patchwork_9428 CI_DRM_4381: ed0d219201c3fd3eb430b712d6ceb51b423daefc @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9428: 03e3457fbf755417391ae680b5ad5e2f7fced9b3 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9428/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2] drm/i915: Fix assert_plane() warning on bootup with external display
>-Original Message-
>From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
>Sent: Tuesday, June 26, 2018 6:01 AM
>To: Shaikh, Azhar
>Cc: intel-gfx@lists.freedesktop.org; Navare, Manasi D
>
>Subject: Re: [PATCH v2] drm/i915: Fix assert_plane() warning on bootup with
>external display
>
>On Mon, Jun 25, 2018 at 05:33:05PM -0700, Azhar Shaikh wrote:
>> On KBL, WHL RVPs, booting up with an external display connected,
>> triggers below warning, when the BiOS brings up the external display too.
>> This warning is not seen during hotplug.
>>
>> [3.615226] [ cut here ]
>> [3.619829] plane 1A assertion failure (expected on, current off)
>> [3.632039] WARNING: CPU: 2 PID: 354 at
>drivers/gpu/drm/i915/intel_display.c:1294 assert_plane+0x71/0xbb
>> [3.633920] iwlwifi :00:14.3: loaded firmware version 38.c0e03d94.0
>op_mode iwlmvm
>> [3.647157] Modules linked in: iwlwifi cfg80211 btusb btrtl btbcm btintel
>bluetooth ecdh_generic
>> [3.647163] CPU: 2 PID: 354 Comm: frecon Not tainted 4.17.0-rc7-50176-
>g655af12d39c2 #3
>> [3.647165] Hardware name: Intel Corporation CoffeeLake Client
>Platform/WhiskeyLake U DDR4 ERB, BIOS
>CNLSFWR1.R00.X140.B00.1804040304 04/04/2018
>> [3.684509] RIP: 0010:assert_plane+0x71/0xbb
>> [3.764451] Call Trace:
>> [3.766888] intel_atomic_commit_tail+0xa97/0xb77
>> [3.771569] intel_atomic_commit+0x26a/0x279
>> [3.771572] drm_atomic_helper_set_config+0x5c/0x76
>> [3.780670] __drm_mode_set_config_internal+0x66/0x109
>> [3.780672] drm_mode_setcrtc+0x4c9/0x5cc
>> [3.780674] ? drm_mode_getcrtc+0x162/0x162
>> [3.789774] ? drm_mode_getcrtc+0x162/0x162
>> [3.798108] drm_ioctl_kernel+0x8d/0xe4
>> [3.801926] drm_ioctl+0x27d/0x368
>> [3.805311] ? drm_mode_getcrtc+0x162/0x162
>> [3.805314] ? selinux_file_ioctl+0x14e/0x199
>> [3.805317] vfs_ioctl+0x21/0x2f
>> [3.813812] do_vfs_ioctl+0x491/0x4b4
>> [3.813813] ? security_file_ioctl+0x37/0x4b
>> [3.813816] ksys_ioctl+0x55/0x75
>> [3.820672] __x64_sys_ioctl+0x1a/0x1e
>> [3.820674] do_syscall_64+0x51/0x5f
>> [3.820678] entry_SYSCALL_64_after_hwframe+0x44/0xa9
>> [3.828221] RIP: 0033:0x7b5e04953967
>> [3.835504] RSP: 002b:7fff2eafb6f8 EFLAGS: 0246 ORIG_RAX:
>0010
>> [3.835505] RAX: ffda RBX: 0002 RCX:
>7b5e04953967
>> [3.835505] RDX: 7fff2eafb730 RSI: c06864a2 RDI:
>000f
>> [3.835506] RBP: 7fff2eafb720 R08: R09:
>
>> [3.835507] R10: 0070 R11: 0246 R12:
>000f
>> [3.879988] R13: 56bc9dd7d210 R14: 7fff2eafb730 R15:
>c06864a2
>> [3.887081] Code: 48 c7 c7 06 71 a5 be 84 c0 48 c7 c2 06 fd a3 be 48 89
>> f9 48 0f
>44 ca 84 db 48 0f 45 d7 48 c7 c7 df d3 a4 be 31 c0 e8 af a0 c0 ff <0f> 0b eb
>2b 48
>c7 c7 06 fd a3 be 84 c0 48 c7 c2 06 71 a5 be 48
>> [3.905845] WARNING: CPU: 2 PID: 354 at
>drivers/gpu/drm/i915/intel_display.c:1294 assert_plane+0x71/0xbb
>> [3.920964] ---[ end trace dac692f4ac46391a ]---
>>
>> The warning is seen when mode_setcrtc() is called for pipeB during
>> bootup and before we get a mode_setcrtc() for pipeA, while doing
>> update_crtcs() in intel_atomic_commit_tail().
>> Now since, plane1A is still active after commit, update_crtcs() is
>> done for pipeA and eventually update_plane() for plane1A.
>>
>> intel_plane_state->ctl for plane1A is not updated since set_modecrtc()
>> is called for pipeB. So intel_plane_state->ctl for plane 1A will be 0x0.
>> So doing an update_plane() for plane1A, will result in clearing
>> PLANE_CTL_ENABLE bit, and hence the warning.
>>
>> To fix this warning, force all active planes to recompute their states
>> in probe.
>>
>> Signed-off-by: Azhar Shaikh
>> ---
>> Changes in v2:
>> - Force all planes to recompute their states.(Ville Syrjälä)
>> - Update the commit message
>>
>> drivers/gpu/drm/i915/intel_display.c | 49
>>
>> 1 file changed, 49 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_display.c
>> b/drivers/gpu/drm/i915/intel_display.c
>> index 3709fa1b6318..1511d58991cc 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -15092,6 +15092,51 @@ static void intel_update_fdi_pll_freq(struct
>drm_i915_private *dev_priv)
>> DRM_DEBUG_DRIVER("FDI PLL freq=%d\n", dev_priv->fdi_pll_freq);
>}
>>
>> +static void intel_initial_commit(struct drm_device *dev,
>> + struct intel_crtc *intel_crtc)
>> +{
>> +struct drm_atomic_state *state = NULL;
>> +struct drm_crtc *crtc = _crtc->base;
>> +struct drm_modeset_acquire_ctx ctx;
>> +struct drm_crtc_state *crtc_state;
>> +int ret;
>> +
>> +drm_modeset_acquire_init(, 0);
>> +
>> +state = drm_atomic_state_alloc(dev);
>> +if (!state)
>> +goto
[Intel-gfx] [PATCH] drm/atomic-helper: Use old/new state in drm_atomic_helper_commit_planes_on_crtc()
From: Ville Syrjälä
Update drm_atomic_helper_commit_planes_on_crtc() to use explicit old/new
states instead of relying on obj->state.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_atomic_helper.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index e022cacdae34..8008a7de2e10 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -2342,11 +2342,13 @@ drm_atomic_helper_commit_planes_on_crtc(struct
drm_crtc_state *old_crtc_state)
const struct drm_crtc_helper_funcs *crtc_funcs;
struct drm_crtc *crtc = old_crtc_state->crtc;
struct drm_atomic_state *old_state = old_crtc_state->state;
+ struct drm_crtc_state *new_crtc_state =
+ drm_atomic_get_new_crtc_state(old_state, crtc);
struct drm_plane *plane;
unsigned plane_mask;
plane_mask = old_crtc_state->plane_mask;
- plane_mask |= crtc->state->plane_mask;
+ plane_mask |= new_crtc_state->plane_mask;
crtc_funcs = crtc->helper_private;
if (crtc_funcs && crtc_funcs->atomic_begin)
@@ -2355,6 +2357,8 @@ drm_atomic_helper_commit_planes_on_crtc(struct
drm_crtc_state *old_crtc_state)
drm_for_each_plane_mask(plane, crtc->dev, plane_mask) {
struct drm_plane_state *old_plane_state =
drm_atomic_get_old_plane_state(old_state, plane);
+ struct drm_plane_state *new_plane_state =
+ drm_atomic_get_new_plane_state(old_state, plane);
const struct drm_plane_helper_funcs *plane_funcs;
plane_funcs = plane->helper_private;
@@ -2362,13 +2366,14 @@ drm_atomic_helper_commit_planes_on_crtc(struct
drm_crtc_state *old_crtc_state)
if (!old_plane_state || !plane_funcs)
continue;
- WARN_ON(plane->state->crtc && plane->state->crtc != crtc);
+ WARN_ON(new_plane_state->crtc &&
+ new_plane_state->crtc != crtc);
- if (drm_atomic_plane_disabling(old_plane_state, plane->state) &&
+ if (drm_atomic_plane_disabling(old_plane_state,
new_plane_state) &&
plane_funcs->atomic_disable)
plane_funcs->atomic_disable(plane, old_plane_state);
- else if (plane->state->crtc ||
-drm_atomic_plane_disabling(old_plane_state,
plane->state))
+ else if (new_plane_state->crtc ||
+drm_atomic_plane_disabling(old_plane_state,
new_plane_state))
plane_funcs->atomic_update(plane, old_plane_state);
}
--
2.16.4
___
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Re: [Intel-gfx] [PATCH v6 1/2] drm/i915/psr: Lockless version of psr_wait_for_idle
On Tue, Jun 26, 2018 at 09:42:11AM +0100, Chris Wilson wrote:
> Quoting Daniel Vetter (2018-06-26 09:26:57)
> > On Mon, Jun 25, 2018 at 10:57:23PM -0700, Tarun Vyas wrote:
> > > This is a lockless version of the exisiting psr_wait_for_idle().
> > > We want to wait for PSR to idle out inside intel_pipe_update_start.
> > > At the time of a pipe update, we should never race with any psr
> > > enable or disable code, which is a part of crtc enable/disable. So,
> > > we can live w/o taking any psr locks at all.
> > > The follow up patch will use this lockless wait inside pipe_update_
> > > start to wait for PSR to idle out before checking for vblank evasion.
> >
> > What's the upside of the lockless wait? The patch seems to be entirely
> > missing the motivation for the change. "Make it lockless" isn't a good
> > justification on itself, there needs to be data about overhead or stalls
> > included if that's the reason for doing this change.
> >
> > > Even if psr is never enabled, psr2_enabled will be false and this
> > > function will wait for PSR1 to idle out, which should just return
> > > immediately, so a very short (~1-2 usec) wait for cases where PSR
> > > is disabled.
> > >
> > > v2: Add comment to explain the 25msec timeout (DK)
> > >
> > > v3: Rename psr_wait_for_idle to __psr_wait_for_idle_locked to avoid
> > > naming conflicts and propagate err (if any) to the caller (Chris)
> > >
> > > v5: Form a series with the next patch
> > >
> > > Signed-off-by: Tarun Vyas
> > > ---
> > > drivers/gpu/drm/i915/intel_drv.h | 1 +
> > > drivers/gpu/drm/i915/intel_psr.c | 25 +++--
> > > 2 files changed, 24 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > > b/drivers/gpu/drm/i915/intel_drv.h
> > > index 578346b8d7e2..9cb2b8afdd3e 100644
> > > --- a/drivers/gpu/drm/i915/intel_drv.h
> > > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > > @@ -1920,6 +1920,7 @@ void intel_psr_compute_config(struct intel_dp
> > > *intel_dp,
> > > struct intel_crtc_state *crtc_state);
> > > void intel_psr_irq_control(struct drm_i915_private *dev_priv, bool
> > > debug);
> > > void intel_psr_irq_handler(struct drm_i915_private *dev_priv, u32
> > > psr_iir);
> > > +int intel_psr_wait_for_idle(struct drm_i915_private *dev_priv);
> > >
> > > /* intel_runtime_pm.c */
> > > int intel_power_domains_init(struct drm_i915_private *);
> > > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > > b/drivers/gpu/drm/i915/intel_psr.c
> > > index aea81ace854b..41e6962923ae 100644
> > > --- a/drivers/gpu/drm/i915/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > > @@ -757,7 +757,28 @@ void intel_psr_disable(struct intel_dp *intel_dp,
> > > cancel_work_sync(_priv->psr.work);
> > > }
> > >
> > > -static bool psr_wait_for_idle(struct drm_i915_private *dev_priv)
> > > +int intel_psr_wait_for_idle(struct drm_i915_private *dev_priv)
> > > +{
> > > + i915_reg_t reg;
> > > + u32 mask;
> > > +
> >
> > I think a comment here explaining why the lockless access is correct is
> > justified here.
> >
> > > + if (dev_priv->psr.psr2_enabled) {
>
> In particular, it is this 'psr2_enabled' and which register we need that
> is serialised in the locked version. The important question to answer is
> why can we lift that here and not there.
>
> In this case (and even in the other case), you could simply say "do both".
> -Chris
With the locked case, the concern was that intel_psr_work can race with
psr_enable/disable paths but we have no such concern here, as we are already
too far in the commit path. psr2_enabled should be stable by the time we do
pipe_update(s), so we can do a fast check in pipe_update w/o grabbing and
subsequently dropping locks.
Also, another difference here is that, "intel_dp = dev_priv->psr.enabled;" has
been dropped in the lockless version as we don't really care if psr is enabled
or disabled. If it is disabled, then the intel_wait_for_register should be
close to a noop, ~1usec hit as per the preliminary measurements.
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/10] drm: Add drm_plane_mask()
== Series Details == Series: series starting with [01/10] drm: Add drm_plane_mask() URL : https://patchwork.freedesktop.org/series/45433/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4382 -> Patchwork_9429 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/45433/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_9429 that come from known issues: === IGT changes === Issues hit igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-skl-guc: PASS -> FAIL (fdo#104724, fdo#103191) Possible fixes igt@gem_exec_gttfill@basic: fi-byt-n2820: FAIL (fdo#106744) -> PASS fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724 fdo#106744 https://bugs.freedesktop.org/show_bug.cgi?id=106744 == Participating hosts (44 -> 39) == Missing(5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u == Build changes == * Linux: CI_DRM_4382 -> Patchwork_9429 CI_DRM_4382: ffc2d866e9b04af3cc2244bb7448d7f7eb438a89 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9429: 52ee5878407ba7463503f72e878c899f51721d09 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 52ee5878407b drm/vmwgfx: Use drm_plane_mask() & co. 7a6de11658cb drm/vc4: Use drm_crtc_mask() 92c17c0bd2c6 drm/sun4i: Use drm_crtc_mask() 44af7ec81e12 drm/rockchip: Use drm_crtc_mask() fb3e128362f7 drm/imx: Use drm_plane_mask() b7bf6a12e811 drm/i915: Use drm_plane_mask() & co. f167f7ef2509 drm: Add drm_connector_mask() 2e0aefe1e96d drm: Add drm_encoder_mask() 4233ab431143 drm: Use drm_crtc_mask() cf6d660dc7b3 drm: Add drm_plane_mask() == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9429/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RFC][PATCH] Makefile: globally enable VLA warning
On Tue, 2018-06-26 at 10:40 -0700, Kees Cook wrote: > This is the patch I've got prepared now that fixes for all VLAs have been > sent to maintainers (some are still under review/adjustment, but there > aren't any unexplored cases left). My intention would be to have this land > at the end of the next merge window after all the pending VLA patches > have landed. I just wanted to get any feedback here, since it touches > a couple areas in the process and I didn't want anyone to be surprised. :) [] > diff --git a/Makefile b/Makefile [] > @@ -778,6 +778,9 @@ NOSTDINC_FLAGS += -nostdinc -isystem $(shell $(CC) > -print-file-name=include) > # warn about C99 declaration after statement > KBUILD_CFLAGS += $(call cc-option,-Wdeclaration-after-statement,) > > +# VLAs should not be used anywhere in the kernel > +KBUILD_CFLAGS += $(call cc-option,-Wvla) I'd probably spell out what a VLA is here. # VLAs (Variable Length Arrays) should not be used anywhere in the kernel Beyond that, seems sensible, thanks. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v6 1/2] drm/i915/psr: Lockless version of psr_wait_for_idle
On Tue, Jun 26, 2018 at 12:43:42PM -0700, Dhinakaran Pandiyan wrote:
> On Tue, 2018-06-26 at 10:26 +0200, Daniel Vetter wrote:
> > On Mon, Jun 25, 2018 at 10:57:23PM -0700, Tarun Vyas wrote:
> > >
> > > This is a lockless version of the exisiting psr_wait_for_idle().
> > > We want to wait for PSR to idle out inside intel_pipe_update_start.
> > > At the time of a pipe update, we should never race with any psr
> > > enable or disable code, which is a part of crtc enable/disable. So,
> > > we can live w/o taking any psr locks at all.
> > > The follow up patch will use this lockless wait inside pipe_update_
> > > start to wait for PSR to idle out before checking for vblank
> > > evasion.
> > What's the upside of the lockless wait? The patch seems to be
> > entirely
> > missing the motivation for the change. "Make it lockless" isn't a
> > good
> > justification on itself, there needs to be data about overhead or
> > stalls
> > included if that's the reason for doing this change.
> >
> Acquiring the PSR mutex means potential stalls due to PSR work having
> already acquired it. The idea was to keep PSR changes in
> pipe_update_start() less invasive latency wise.
>
> But yeah, the commit has to add the explanation.
>
>
>
Yea, will explain it better in the commit message.
> > >
> > > Even if psr is never enabled, psr2_enabled will be false and this
> > > function will wait for PSR1 to idle out, which should just return
> > > immediately, so a very short (~1-2 usec) wait for cases where PSR
> > > is disabled.
> > >
> > > v2: Add comment to explain the 25msec timeout (DK)
> > >
> > > v3: Rename psr_wait_for_idle to __psr_wait_for_idle_locked to avoid
> > > naming conflicts and propagate err (if any) to the caller
> > > (Chris)
> > >
> > > v5: Form a series with the next patch
> > >
> > > Signed-off-by: Tarun Vyas
> > > ---
> > > drivers/gpu/drm/i915/intel_drv.h | 1 +
> > > drivers/gpu/drm/i915/intel_psr.c | 25 +++--
> > > 2 files changed, 24 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > > b/drivers/gpu/drm/i915/intel_drv.h
> > > index 578346b8d7e2..9cb2b8afdd3e 100644
> > > --- a/drivers/gpu/drm/i915/intel_drv.h
> > > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > > @@ -1920,6 +1920,7 @@ void intel_psr_compute_config(struct intel_dp
> > > *intel_dp,
> > > struct intel_crtc_state
> > > *crtc_state);
> > > void intel_psr_irq_control(struct drm_i915_private *dev_priv, bool
> > > debug);
> > > void intel_psr_irq_handler(struct drm_i915_private *dev_priv, u32
> > > psr_iir);
> > > +int intel_psr_wait_for_idle(struct drm_i915_private *dev_priv);
> > >
> > > /* intel_runtime_pm.c */
> > > int intel_power_domains_init(struct drm_i915_private *);
> > > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > > b/drivers/gpu/drm/i915/intel_psr.c
> > > index aea81ace854b..41e6962923ae 100644
> > > --- a/drivers/gpu/drm/i915/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > > @@ -757,7 +757,28 @@ void intel_psr_disable(struct intel_dp
> > > *intel_dp,
> > > cancel_work_sync(_priv->psr.work);
> > > }
> > >
> > > -static bool psr_wait_for_idle(struct drm_i915_private *dev_priv)
> > > +int intel_psr_wait_for_idle(struct drm_i915_private *dev_priv)
> > > +{
> > > + i915_reg_t reg;
> > > + u32 mask;
> > > +
> > I think a comment here explaining why the lockless access is correct
> > is
> > justified here.
> >
> > >
> > > + if (dev_priv->psr.psr2_enabled) {
> > > + reg = EDP_PSR2_STATUS;
> > > + mask = EDP_PSR2_STATUS_STATE_MASK;
> > > + } else {
> > > + reg = EDP_PSR_STATUS;
> > > + mask = EDP_PSR_STATUS_STATE_MASK;
> > > + }
> > > +
> > > + /*
> > > + * The 25 msec timeout accounts for a frame @ 60Hz
> > > refresh rate,
> > > + * exit training an aux handshake time.
> > > + */
> > So this goes boom if the panel is running at e.g. 50Hz? Please either
> > calculate this from the current mode (but that's a bit tricky, due to
> > DRRS), or go with a more defensive timeout. Also small typo,
> > s/an/and/.
> >
> > Would also be good to have numbers for the exit training/aux
> > handshake
> > time.
>
> bspec says exit should be compelete in "one full frame time (1/refresh
> rate), plus SRD exit training time (max of 6ms), plus SRD aux channel
> handshake (max of 1.5ms)."
>
>
>
So should we use 50 Hz as the lower limit for the refresh rate to calc our max
timeout here. Can eDP go down to 30 Hz ?
> > -Daniel
> >
> > >
> > > + return intel_wait_for_register(dev_priv, reg, mask,
> > > + EDP_PSR_STATUS_STATE_IDLE,
> > > 25);
> > > +}
> > > +
> > > +static bool __psr_wait_for_idle_locked(struct drm_i915_private
> > > *dev_priv)
> > > {
> > > struct intel_dp *intel_dp;
> > > i915_reg_t reg;
> > > @@ -803,7 +824,7 @@ static void intel_psr_work(struct work_struct
> > > *work)
> > > * PSR might take some time to get fully disabled
> > > *
[Intel-gfx] [PATCH v7 2/5] drm/i915/psr: Begin to handle PSR/PSR2 errors set by sink
eDP spec states that sink device will do a short pulse in HPD
line when there is a PSR/PSR2 error that needs to be handled by
source, this is handling the first and most simples error:
DP_PSR_SINK_INTERNAL_ERROR.
Here taking the safest approach and disabling PSR(at least until
the next modeset), to avoid multiple rendering issues due to
bad pannels.
v5:
added lockdep_assert in psr_disable and renamed psr_disable()
to intel_psr_disable_locked()
v4:
Using CAN_PSR instead of HAS_PSR in intel_psr_short_pulse
v3:
disabling PSR instead of exiting on error
Reviewed-by: Dhinakaran Pandiyan
Cc: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_dp.c | 2 ++
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_psr.c | 62 ++--
3 files changed, 54 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index c1b2f00f324b..5be07e1d816d 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4491,6 +4491,8 @@ intel_dp_short_pulse(struct intel_dp *intel_dp)
if (intel_dp_needs_link_retrain(intel_dp))
return false;
+ intel_psr_short_pulse(intel_dp);
+
if (intel_dp->compliance.test_type == DP_TEST_LINK_TRAINING) {
DRM_DEBUG_KMS("Link Training Compliance Test requested\n");
/* Send a Hotplug Uevent to userspace to start modeset */
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 84296bdaa7d8..a6ff2600a3a0 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1921,6 +1921,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
struct intel_crtc_state *crtc_state);
void intel_psr_irq_control(struct drm_i915_private *dev_priv, bool debug);
void intel_psr_irq_handler(struct drm_i915_private *dev_priv, u32 psr_iir);
+void intel_psr_short_pulse(struct intel_dp *intel_dp);
/* intel_runtime_pm.c */
int intel_power_domains_init(struct drm_i915_private *);
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index f6d384a11b79..445e97dc791d 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -666,6 +666,25 @@ intel_psr_disable_source(struct intel_dp *intel_dp)
}
}
+static void intel_psr_disable_locked(struct intel_dp *intel_dp)
+{
+ struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
+ struct drm_device *dev = intel_dig_port->base.base.dev;
+ struct drm_i915_private *dev_priv = to_i915(dev);
+
+ lockdep_assert_held(_priv->psr.lock);
+
+ if (!dev_priv->psr.enabled)
+ return;
+
+ intel_psr_disable_source(intel_dp);
+
+ /* Disable PSR on Sink */
+ drm_dp_dpcd_writeb(_dp->aux, DP_PSR_EN_CFG, 0);
+
+ dev_priv->psr.enabled = NULL;
+}
+
/**
* intel_psr_disable - Disable PSR
* @intel_dp: Intel DP
@@ -687,17 +706,7 @@ void intel_psr_disable(struct intel_dp *intel_dp,
return;
mutex_lock(_priv->psr.lock);
- if (!dev_priv->psr.enabled) {
- mutex_unlock(_priv->psr.lock);
- return;
- }
-
- intel_psr_disable_source(intel_dp);
-
- /* Disable PSR on Sink */
- drm_dp_dpcd_writeb(_dp->aux, DP_PSR_EN_CFG, 0);
-
- dev_priv->psr.enabled = NULL;
+ intel_psr_disable_locked(intel_dp);
mutex_unlock(_priv->psr.lock);
cancel_work_sync(_priv->psr.work);
}
@@ -932,3 +941,34 @@ void intel_psr_init(struct drm_i915_private *dev_priv)
INIT_WORK(_priv->psr.work, intel_psr_work);
mutex_init(_priv->psr.lock);
}
+
+void intel_psr_short_pulse(struct intel_dp *intel_dp)
+{
+ struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
+ struct drm_device *dev = intel_dig_port->base.base.dev;
+ struct drm_i915_private *dev_priv = to_i915(dev);
+ struct i915_psr *psr = _priv->psr;
+ u8 val;
+
+ if (!CAN_PSR(dev_priv) || !intel_dp_is_edp(intel_dp))
+ return;
+
+ mutex_lock(>lock);
+
+ if (psr->enabled != intel_dp)
+ goto exit;
+
+ if (drm_dp_dpcd_readb(_dp->aux, DP_PSR_STATUS, ) != 1) {
+ DRM_ERROR("PSR_STATUS dpcd read failed\n");
+ goto exit;
+ }
+
+ if ((val & DP_PSR_SINK_STATE_MASK) == DP_PSR_SINK_INTERNAL_ERROR) {
+ DRM_DEBUG_KMS("PSR sink internal error, disabling PSR\n");
+ intel_psr_disable_locked(intel_dp);
+ }
+
+ /* TODO: handle other PSR/PSR2 errors */
+exit:
+ mutex_unlock(>lock);
+}
--
2.18.0
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[Intel-gfx] [PATCH v7 5/5] drm/i915/psr: Enable CRC check in the static frame on the sink side
Sink can be configured to calculate the CRC over the static frame and
compare with the CRC calculated and transmited in the VSC SDP by
source, if there is a mismatch sink will do a short pulse in HPD
and set DP_PSR_LINK_CRC_ERROR in DP_PSR_ERROR_STATUS.
Spec: 7723
v6:
andling DP_PSR_LINK_CRC_ERROR here and remove "bdw+" from commit
message
v4:
patch moved to after 'drm/i915/psr: Avoid PSR exit max time timeout'
to avoid touch in 2 patches EDP_PSR_DEBUG.
v3:
disabling PSR instead of exiting on error
Reviewed-by: Dhinakaran Pandiyan
Cc: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_psr.c | 10 +-
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index caad19f5f557..43db91c19f52 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4044,6 +4044,7 @@ enum {
#define EDP_PSR_SKIP_AUX_EXIT(1 << 12)
#define EDP_PSR_TP1_TP2_SEL (0 << 11)
#define EDP_PSR_TP1_TP3_SEL (1 << 11)
+#define EDP_PSR_CRC_ENABLE (1 << 10) /* BDW+ */
#define EDP_PSR_TP2_TP3_TIME_500us (0 << 8)
#define EDP_PSR_TP2_TP3_TIME_100us (1 << 8)
#define EDP_PSR_TP2_TP3_TIME_2500us (2 << 8)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index aa98b62910b4..45f1cb7d6c04 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -323,6 +323,8 @@ static void intel_psr_enable_sink(struct intel_dp *intel_dp)
if (dev_priv->psr.link_standby)
dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
+ if (!dev_priv->psr.psr2_enabled && INTEL_GEN(dev_priv) >= 8)
+ dpcd_val |= DP_PSR_CRC_VERIFICATION;
drm_dp_dpcd_writeb(_dp->aux, DP_PSR_EN_CFG, dpcd_val);
drm_dp_dpcd_writeb(_dp->aux, DP_SET_POWER, DP_SET_POWER_D0);
@@ -378,6 +380,9 @@ static void hsw_activate_psr1(struct intel_dp *intel_dp)
else
val |= EDP_PSR_TP1_TP2_SEL;
+ if (INTEL_GEN(dev_priv) >= 8)
+ val |= EDP_PSR_CRC_ENABLE;
+
val |= I915_READ(EDP_PSR_CTL) & EDP_PSR_RESTORE_PSR_ACTIVE_CTX_MASK;
I915_WRITE(EDP_PSR_CTL, val);
}
@@ -951,7 +956,8 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)
struct i915_psr *psr = _priv->psr;
u8 val;
const u8 errors = DP_PSR_RFB_STORAGE_ERROR |
- DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR;
+ DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
+ DP_PSR_LINK_CRC_ERROR;
if (!CAN_PSR(dev_priv) || !intel_dp_is_edp(intel_dp))
return;
@@ -980,6 +986,8 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)
DRM_DEBUG_KMS("PSR RFB storage error, disabling PSR\n");
if (val & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
DRM_DEBUG_KMS("PSR VSC SDP uncorrectable error, disabling
PSR\n");
+ if (val & DP_PSR_LINK_CRC_ERROR)
+ DRM_ERROR("PSR Link CRC error, disabling PSR\n");
if (val & ~errors)
DRM_ERROR("PSR_ERROR_STATUS unhandled errors %x\n",
--
2.18.0
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[Intel-gfx] [PATCH v7 3/5] drm/i915/psr: Handle PSR errors
Sink will interrupt source when it have any PSR error.
DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR is a PSR2 but already
handling it here.
The only missing error to be handled is DP_PSR_LINK_CRC_ERROR that
will be taken in care in a futher patch.
v6:
not handling DP_PSR_LINK_CRC_ERROR here
v5:
handling all PSR errors here, so the commit message and
comment have changed
v3:
disabling PSR instead of exiting on error
Cc: Rodrigo Vivi
Reviewed-by: Dhinakaran Pandiyan
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_psr.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 445e97dc791d..860b46b72403 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -949,6 +949,8 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)
struct drm_i915_private *dev_priv = to_i915(dev);
struct i915_psr *psr = _priv->psr;
u8 val;
+ const u8 errors = DP_PSR_RFB_STORAGE_ERROR |
+ DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR;
if (!CAN_PSR(dev_priv) || !intel_dp_is_edp(intel_dp))
return;
@@ -968,7 +970,25 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp)
intel_psr_disable_locked(intel_dp);
}
- /* TODO: handle other PSR/PSR2 errors */
+ if (drm_dp_dpcd_readb(_dp->aux, DP_PSR_ERROR_STATUS, ) != 1) {
+ DRM_ERROR("PSR_ERROR_STATUS dpcd read failed\n");
+ goto exit;
+ }
+
+ if (val & DP_PSR_RFB_STORAGE_ERROR)
+ DRM_DEBUG_KMS("PSR RFB storage error, disabling PSR\n");
+ if (val & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
+ DRM_DEBUG_KMS("PSR VSC SDP uncorrectable error, disabling
PSR\n");
+
+ if (val & ~errors)
+ DRM_ERROR("PSR_ERROR_STATUS unhandled errors %x\n",
+ val & ~errors);
+ if (val & errors)
+ intel_psr_disable_locked(intel_dp);
+ /* clear status register */
+ drm_dp_dpcd_writeb(_dp->aux, DP_PSR_ERROR_STATUS, val);
+
+ /* TODO: handle PSR2 errors */
exit:
mutex_unlock(>lock);
}
--
2.18.0
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[Intel-gfx] [PATCH v7 4/5] drm/i915/psr: Avoid PSR exit max time timeout
Specification requires that max time should be masked from bdw and forward but it can be also safely enabled to hsw. This will make PSR exits more deterministic and only when really needed. If this was used to fix a issue in some panel than can only self-refresh for a few seconds, that panel will interrupt and assert one of the PSR errors handled in: 'drm/i915/psr: Handle PSR RFB storage error' and 'drm/i915/psr: Begin to handle PSR/PSR2 errors set by sink' Spec: 21664 v4: patch moved to before 'drm/i915/psr/bdw+: Enable CRC check in the static frame on the sink side' to avoid touch in 2 patches EDP_PSR_DEBUG. Cc: Rodrigo Vivi Reviewed-by: Dhinakaran Pandiyan Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_psr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index 860b46b72403..aa98b62910b4 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -579,7 +579,8 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp, EDP_PSR_DEBUG_MASK_MEMUP | EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP | - EDP_PSR_DEBUG_MASK_DISP_REG_WRITE); + EDP_PSR_DEBUG_MASK_DISP_REG_WRITE | + EDP_PSR_DEBUG_MASK_MAX_SLEEP); } } -- 2.18.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v7 1/5] drm/i915/psr: Remove intel_crtc_state parameter from disable_source()
It was only used in VLV/CHV so after the removal of the PSR support
for those platforms it is not necessary any more.
v7: Rebased
Reviewed-by: Dhinakaran Pandiyan
Cc: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_psr.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 1b439629cb66..f6d384a11b79 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -625,8 +625,7 @@ void intel_psr_enable(struct intel_dp *intel_dp,
}
static void
-intel_psr_disable_source(struct intel_dp *intel_dp,
-const struct intel_crtc_state *old_crtc_state)
+intel_psr_disable_source(struct intel_dp *intel_dp)
{
struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
struct drm_device *dev = intel_dig_port->base.base.dev;
@@ -693,7 +692,7 @@ void intel_psr_disable(struct intel_dp *intel_dp,
return;
}
- intel_psr_disable_source(intel_dp, old_crtc_state);
+ intel_psr_disable_source(intel_dp);
/* Disable PSR on Sink */
drm_dp_dpcd_writeb(_dp->aux, DP_PSR_EN_CFG, 0);
--
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Re: [Intel-gfx] [PATCH 10/10] drm/vmwgfx: Use drm_plane_mask() & co.
On Tue, Jun 26, 2018 at 10:47:16PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Use drm_{plane,connector}_mask() where appropriate.
>
> Cc: VMware Graphics
> Cc: Sinclair Yeh
> Cc: Thomas Hellstrom
> Signed-off-by: Ville Syrjälä
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
> b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
> index ef96ba7432ad..17e01423ead1 100644
> --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
> +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
> @@ -535,9 +535,9 @@ int vmw_du_crtc_atomic_check(struct drm_crtc *crtc,
>struct drm_crtc_state *new_state)
> {
> struct vmw_display_unit *du = vmw_crtc_to_du(new_state->crtc);
> - int connector_mask = 1 << drm_connector_index(>connector);
> + int connector_mask = drm_connector_mask(>connector);
> bool has_primary = new_state->plane_mask &
> -BIT(drm_plane_index(crtc->primary));
> +drm_plane_mask(crtc->primary);
>
> /* We always want to have an active plane with an active CRTC */
> if (has_primary != new_state->enable)
> --
> 2.16.4
>
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Re: [Intel-gfx] [PATCH 09/10] drm/vc4: Use drm_crtc_mask()
On Tue, Jun 26, 2018 at 10:47:15PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Use drm_crtc_mask() where appropriate.
>
> Cc: Eric Anholt
> Signed-off-by: Ville Syrjälä
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/vc4/vc4_crtc.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
> index dcadf793ee80..d222358fa8a7 100644
> --- a/drivers/gpu/drm/vc4/vc4_crtc.c
> +++ b/drivers/gpu/drm/vc4/vc4_crtc.c
> @@ -1081,7 +1081,7 @@ static int vc4_crtc_bind(struct device *dev, struct
> device *master, void *data)
> if (IS_ERR(plane))
> continue;
>
> - plane->possible_crtcs = 1 << drm_crtc_index(crtc);
> + plane->possible_crtcs = drm_crtc_mask(crtc);
> }
>
> /* Set up the legacy cursor after overlay initialization,
> @@ -1090,7 +1090,7 @@ static int vc4_crtc_bind(struct device *dev, struct
> device *master, void *data)
>*/
> cursor_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_CURSOR);
> if (!IS_ERR(cursor_plane)) {
> - cursor_plane->possible_crtcs = 1 << drm_crtc_index(crtc);
> + cursor_plane->possible_crtcs = drm_crtc_mask(crtc);
> crtc->cursor = cursor_plane;
> }
>
> @@ -1118,7 +1118,7 @@ static int vc4_crtc_bind(struct device *dev, struct
> device *master, void *data)
> err_destroy_planes:
> list_for_each_entry_safe(destroy_plane, temp,
>>mode_config.plane_list, head) {
> - if (destroy_plane->possible_crtcs == 1 << drm_crtc_index(crtc))
> + if (destroy_plane->possible_crtcs == drm_crtc_mask(crtc))
> destroy_plane->funcs->destroy(destroy_plane);
> }
> err:
> --
> 2.16.4
>
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Re: [Intel-gfx] [PATCH 08/10] drm/sun4i: Use drm_crtc_mask()
On Tue, Jun 26, 2018 at 10:47:14PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Use drm_crtc_mask() where appropriate.
>
> Cc: Maxime Ripard
> Signed-off-by: Ville Syrjälä
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/sun4i/sun4i_crtc.c | 2 +-
> drivers/gpu/drm/sun4i/sun4i_lvds.c | 2 +-
> drivers/gpu/drm/sun4i/sun4i_rgb.c | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/sun4i/sun4i_crtc.c
> b/drivers/gpu/drm/sun4i/sun4i_crtc.c
> index 2d7c57406715..3eedf335a935 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_crtc.c
> +++ b/drivers/gpu/drm/sun4i/sun4i_crtc.c
> @@ -242,7 +242,7 @@ struct sun4i_crtc *sun4i_crtc_init(struct drm_device *drm,
>
> /* Set possible_crtcs to this crtc for overlay planes */
> for (i = 0; planes[i]; i++) {
> - uint32_t possible_crtcs = BIT(drm_crtc_index(>crtc));
> + uint32_t possible_crtcs = drm_crtc_mask(>crtc);
> struct drm_plane *plane = planes[i];
>
> if (plane->type == DRM_PLANE_TYPE_OVERLAY)
> diff --git a/drivers/gpu/drm/sun4i/sun4i_lvds.c
> b/drivers/gpu/drm/sun4i/sun4i_lvds.c
> index be3f14d7746d..a69fe2e1f9d1 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_lvds.c
> +++ b/drivers/gpu/drm/sun4i/sun4i_lvds.c
> @@ -136,7 +136,7 @@ int sun4i_lvds_init(struct drm_device *drm, struct
> sun4i_tcon *tcon)
> }
>
> /* The LVDS encoder can only work with the TCON channel 0 */
> - lvds->encoder.possible_crtcs = BIT(drm_crtc_index(>crtc->crtc));
> + lvds->encoder.possible_crtcs = drm_crtc_mask(>crtc->crtc);
>
> if (tcon->panel) {
> drm_connector_helper_add(>connector,
> diff --git a/drivers/gpu/drm/sun4i/sun4i_rgb.c
> b/drivers/gpu/drm/sun4i/sun4i_rgb.c
> index f2fa1f210509..96d21b07f8fc 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_rgb.c
> +++ b/drivers/gpu/drm/sun4i/sun4i_rgb.c
> @@ -202,7 +202,7 @@ int sun4i_rgb_init(struct drm_device *drm, struct
> sun4i_tcon *tcon)
> }
>
> /* The RGB encoder can only work with the TCON channel 0 */
> - rgb->encoder.possible_crtcs = BIT(drm_crtc_index(>crtc->crtc));
> + rgb->encoder.possible_crtcs = drm_crtc_mask(>crtc->crtc);
>
> if (tcon->panel) {
> drm_connector_helper_add(>connector,
> --
> 2.16.4
>
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Re: [Intel-gfx] [PATCH 07/10] drm/rockchip: Use drm_crtc_mask()
On Tue, Jun 26, 2018 at 10:47:13PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Use drm_crtc_mask() where appropriate.
>
> Cc: Sandy Huang
> Cc: "Heiko Stübner"
> Signed-off-by: Ville Syrjälä
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> index c9222119767d..effecbed2d11 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> @@ -1308,7 +1308,7 @@ static int vop_create_crtc(struct vop *vop)
> for (i = 0; i < vop_data->win_size; i++) {
> struct vop_win *vop_win = >win[i];
> const struct vop_win_data *win_data = vop_win->data;
> - unsigned long possible_crtcs = 1 << drm_crtc_index(crtc);
> + unsigned long possible_crtcs = drm_crtc_mask(crtc);
>
> if (win_data->type != DRM_PLANE_TYPE_OVERLAY)
> continue;
> --
> 2.16.4
>
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Re: [Intel-gfx] [PATCH 06/10] drm/imx: Use drm_plane_mask()
On Tue, Jun 26, 2018 at 10:47:12PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Use drm_plane_mask() where appropriate.
>
> Cc: Philipp Zabel
> Signed-off-by: Ville Syrjälä
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/imx/ipuv3-crtc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/imx/ipuv3-crtc.c
> b/drivers/gpu/drm/imx/ipuv3-crtc.c
> index e83af0f2be86..21d002859ae0 100644
> --- a/drivers/gpu/drm/imx/ipuv3-crtc.c
> +++ b/drivers/gpu/drm/imx/ipuv3-crtc.c
> @@ -213,7 +213,7 @@ static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
> static int ipu_crtc_atomic_check(struct drm_crtc *crtc,
>struct drm_crtc_state *state)
> {
> - u32 primary_plane_mask = 1 << drm_plane_index(crtc->primary);
> + u32 primary_plane_mask = drm_plane_mask(crtc->primary);
>
> if (state->active && (primary_plane_mask & state->plane_mask) == 0)
> return -EINVAL;
> --
> 2.16.4
>
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Re: [Intel-gfx] [PATCH 05/10] drm/i915: Use drm_plane_mask() & co.
On Tue, Jun 26, 2018 at 10:47:11PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Use drm_{plane,crtc,encoder,connector}_mask() where appropriate.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/intel_display.c | 14 +++---
> drivers/gpu/drm/i915/intel_display.h | 4 ++--
> drivers/gpu/drm/i915/intel_dpll_mgr.c | 6 +++---
> 3 files changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index eaa0663963a5..7cc70e751c82 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2756,10 +2756,10 @@ intel_set_plane_visible(struct intel_crtc_state
> *crtc_state,
>
> /* FIXME pre-g4x don't work like this */
> if (visible) {
> - crtc_state->base.plane_mask |=
> BIT(drm_plane_index(>base));
> + crtc_state->base.plane_mask |= drm_plane_mask(>base);
> crtc_state->active_planes |= BIT(plane->id);
> } else {
> - crtc_state->base.plane_mask &=
> ~BIT(drm_plane_index(>base));
> + crtc_state->base.plane_mask &= ~drm_plane_mask(>base);
> crtc_state->active_planes &= ~BIT(plane->id);
> }
>
> @@ -11896,7 +11896,7 @@ verify_single_dpll_state(struct drm_i915_private
> *dev_priv,
>struct drm_crtc_state *new_state)
> {
> struct intel_dpll_hw_state dpll_hw_state;
> - unsigned crtc_mask;
> + unsigned int crtc_mask;
> bool active;
>
> memset(_hw_state, 0, sizeof(dpll_hw_state));
> @@ -11923,7 +11923,7 @@ verify_single_dpll_state(struct drm_i915_private
> *dev_priv,
> return;
> }
>
> - crtc_mask = 1 << drm_crtc_index(crtc);
> + crtc_mask = drm_crtc_mask(crtc);
>
> if (new_state->active)
> I915_STATE_WARN(!(pll->active_mask & crtc_mask),
> @@ -11958,7 +11958,7 @@ verify_shared_dpll_state(struct drm_device *dev,
> struct drm_crtc *crtc,
>
> if (old_state->shared_dpll &&
> old_state->shared_dpll != new_state->shared_dpll) {
> - unsigned crtc_mask = 1 << drm_crtc_index(crtc);
> + unsigned int crtc_mask = drm_crtc_mask(crtc);
> struct intel_shared_dpll *pll = old_state->shared_dpll;
>
> I915_STATE_WARN(pll->active_mask & crtc_mask,
> @@ -15636,9 +15636,9 @@ static void intel_modeset_readout_hw_state(struct
> drm_device *dev)
>* rely on the connector_mask being accurate.
>*/
> encoder->base.crtc->state->connector_mask |=
> - 1 <<
> drm_connector_index(>base);
> + drm_connector_mask(>base);
> encoder->base.crtc->state->encoder_mask |=
> - 1 << drm_encoder_index(>base);
> + drm_encoder_mask(>base);
> }
>
> } else {
> diff --git a/drivers/gpu/drm/i915/intel_display.h
> b/drivers/gpu/drm/i915/intel_display.h
> index dfb02da73ac8..dd30cae5eb00 100644
> --- a/drivers/gpu/drm/i915/intel_display.h
> +++ b/drivers/gpu/drm/i915/intel_display.h
> @@ -261,7 +261,7 @@ struct intel_link_m_n {
> &(dev)->mode_config.plane_list, \
> base.head) \
> for_each_if((plane_mask) & \
> - BIT(drm_plane_index(_plane->base)))
> + drm_plane_mask(_plane->base)))
>
> #define for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) \
> list_for_each_entry(intel_plane,\
> @@ -278,7 +278,7 @@ struct intel_link_m_n {
> list_for_each_entry(intel_crtc, \
> &(dev)->mode_config.crtc_list, \
> base.head) \
> - for_each_if((crtc_mask) &
> BIT(drm_crtc_index(_crtc->base)))
> + for_each_if((crtc_mask) & drm_crtc_mask(_crtc->base))
>
> #define for_each_intel_encoder(dev, intel_encoder) \
> list_for_each_entry(intel_encoder, \
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> index 57342364fd30..e4ac7f980c9e 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> @@ -163,8 +163,8 @@ void intel_enable_shared_dpll(struct intel_crtc *crtc)
> struct drm_device *dev = crtc->base.dev;
> struct drm_i915_private *dev_priv = to_i915(dev);
> struct intel_shared_dpll *pll = crtc->config->shared_dpll;
> - unsigned crtc_mask = 1 << drm_crtc_index(>base);
> - unsigned
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/10] drm: Add drm_plane_mask()
== Series Details ==
Series: series starting with [01/10] drm: Add drm_plane_mask()
URL : https://patchwork.freedesktop.org/series/45433/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
cf6d660dc7b3 drm: Add drm_plane_mask()
-:115: WARNING:SPACING: space prohibited between function name and open
parenthesis '('
#115: FILE: include/drm/drm_plane.h:691:
+ for_each_if ((plane_mask) & drm_plane_mask(plane))
total: 0 errors, 1 warnings, 0 checks, 61 lines checked
4233ab431143 drm: Use drm_crtc_mask()
2e0aefe1e96d drm: Add drm_encoder_mask()
-:118: WARNING:SPACING: space prohibited between function name and open
parenthesis '('
#118: FILE: include/drm/drm_encoder.h:256:
+ for_each_if ((encoder_mask) & drm_encoder_mask(encoder))
total: 0 errors, 1 warnings, 0 checks, 72 lines checked
f167f7ef2509 drm: Add drm_connector_mask()
b7bf6a12e811 drm/i915: Use drm_plane_mask() & co.
fb3e128362f7 drm/imx: Use drm_plane_mask()
44af7ec81e12 drm/rockchip: Use drm_crtc_mask()
92c17c0bd2c6 drm/sun4i: Use drm_crtc_mask()
7a6de11658cb drm/vc4: Use drm_crtc_mask()
-:41: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional
statements (16, 20)
#41: FILE: drivers/gpu/drm/vc4/vc4_crtc.c:1121:
+ if (destroy_plane->possible_crtcs == drm_crtc_mask(crtc))
destroy_plane->funcs->destroy(destroy_plane);
total: 0 errors, 1 warnings, 0 checks, 24 lines checked
52ee5878407b drm/vmwgfx: Use drm_plane_mask() & co.
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Re: [Intel-gfx] [PATCH 04/10] drm: Add drm_connector_mask()
On Tue, Jun 26, 2018 at 10:47:10PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Add drm_connector_mask() which returns the 1< We already have an identical drm_crtc_mask() for crtcs.
>
> Mostly performed with coccinelle:
> @@
> @@
> - (1< + drm_connector_mask(
> ...)
> - )
>
> @@
> @@
> - 1< + drm_connector_mask(
> ...)
>
> @@
> @@
> - BIT(drm_connector_index(
> + drm_connector_mask(
> ...)
> - )
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/drm_atomic.c | 6 +++---
> include/drm/drm_connector.h | 8 +++-
> 2 files changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 684c9d3a1d6c..d5cefb1cb2a2 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -1700,7 +1700,7 @@ drm_atomic_set_crtc_for_connector(struct
> drm_connector_state *conn_state,
> conn_state->crtc);
>
> crtc_state->connector_mask &=
> - ~(1 << drm_connector_index(conn_state->connector));
> + ~drm_connector_mask(conn_state->connector);
>
> drm_connector_put(conn_state->connector);
> conn_state->crtc = NULL;
> @@ -1712,7 +1712,7 @@ drm_atomic_set_crtc_for_connector(struct
> drm_connector_state *conn_state,
> return PTR_ERR(crtc_state);
>
> crtc_state->connector_mask |=
> - 1 << drm_connector_index(conn_state->connector);
> + drm_connector_mask(conn_state->connector);
>
> drm_connector_get(conn_state->connector);
> conn_state->crtc = crtc;
> @@ -1839,7 +1839,7 @@ drm_atomic_add_affected_connectors(struct
> drm_atomic_state *state,
>*/
> drm_connector_list_iter_begin(state->dev, _iter);
> drm_for_each_connector_iter(connector, _iter) {
> - if (!(crtc_state->connector_mask & (1 <<
> drm_connector_index(connector
> + if (!(crtc_state->connector_mask &
> drm_connector_mask(connector)))
> continue;
>
> conn_state = drm_atomic_get_connector_state(state, connector);
> diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
> index 14ab58ade87f..bf0f0f0786d3 100644
> --- a/include/drm/drm_connector.h
> +++ b/include/drm/drm_connector.h
> @@ -1030,11 +1030,17 @@ int drm_mode_connector_attach_encoder(struct
> drm_connector *connector,
> struct drm_encoder *encoder);
>
> void drm_connector_cleanup(struct drm_connector *connector);
> -static inline unsigned drm_connector_index(struct drm_connector *connector)
> +
> +static inline unsigned int drm_connector_index(const struct drm_connector
> *connector)
> {
> return connector->index;
> }
>
> +static inline u32 drm_connector_mask(const struct drm_connector *connector)
> +{
> + return 1 << connector->index;
> +}
> +
> /**
> * drm_connector_lookup - lookup connector object
> * @dev: DRM device
> --
> 2.16.4
>
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Re: [Intel-gfx] [PATCH 03/10] drm: Add drm_encoder_mask()
On Tue, Jun 26, 2018 at 10:47:09PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Add drm_encoder_mask() which returns the 1< We already have an identical drm_crtc_mask() for crtcs.
>
> Mostly performed with coccinelle:
> @@
> @@
> - (1< + drm_encoder_mask(
> ...)
> - )
>
> @@
> @@
> - 1< + drm_encoder_mask(
> ...)
>
> @@
> @@
> - BIT(drm_encoder_index(
> + drm_encoder_mask(
> ...)
> - )
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/drm_atomic_helper.c | 10 +-
> include/drm/drm_encoder.h | 16 ++--
> 2 files changed, 19 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_atomic_helper.c
> b/drivers/gpu/drm/drm_atomic_helper.c
> index 17baf5057132..e022cacdae34 100644
> --- a/drivers/gpu/drm/drm_atomic_helper.c
> +++ b/drivers/gpu/drm/drm_atomic_helper.c
> @@ -121,7 +121,7 @@ static int handle_conflicting_encoders(struct
> drm_atomic_state *state,
> new_encoder = drm_atomic_helper_best_encoder(connector);
>
> if (new_encoder) {
> - if (encoder_mask & (1 <<
> drm_encoder_index(new_encoder))) {
> + if (encoder_mask & drm_encoder_mask(new_encoder)) {
> DRM_DEBUG_ATOMIC("[ENCODER:%d:%s] on
> [CONNECTOR:%d:%s] already assigned\n",
> new_encoder->base.id, new_encoder->name,
> connector->base.id, connector->name);
> @@ -129,7 +129,7 @@ static int handle_conflicting_encoders(struct
> drm_atomic_state *state,
> return -EINVAL;
> }
>
> - encoder_mask |= 1 << drm_encoder_index(new_encoder);
> + encoder_mask |= drm_encoder_mask(new_encoder);
> }
> }
>
> @@ -155,7 +155,7 @@ static int handle_conflicting_encoders(struct
> drm_atomic_state *state,
> continue;
>
> encoder = connector->state->best_encoder;
> - if (!encoder || !(encoder_mask & (1 <<
> drm_encoder_index(encoder
> + if (!encoder || !(encoder_mask & drm_encoder_mask(encoder)))
> continue;
>
> if (!disable_conflicting_encoders) {
> @@ -223,7 +223,7 @@ set_best_encoder(struct drm_atomic_state *state,
> crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
>
> crtc_state->encoder_mask &=
> - ~(1 <<
> drm_encoder_index(conn_state->best_encoder));
> + ~drm_encoder_mask(conn_state->best_encoder);
> }
> }
>
> @@ -234,7 +234,7 @@ set_best_encoder(struct drm_atomic_state *state,
> crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
>
> crtc_state->encoder_mask |=
> - 1 << drm_encoder_index(encoder);
> + drm_encoder_mask(encoder);
> }
> }
>
> diff --git a/include/drm/drm_encoder.h b/include/drm/drm_encoder.h
> index fb299696c7c4..4f597c0730b4 100644
> --- a/include/drm/drm_encoder.h
> +++ b/include/drm/drm_encoder.h
> @@ -191,11 +191,23 @@ int drm_encoder_init(struct drm_device *dev,
> * Given a registered encoder, return the index of that encoder within a DRM
> * device's list of encoders.
> */
> -static inline unsigned int drm_encoder_index(struct drm_encoder *encoder)
> +static inline unsigned int drm_encoder_index(const struct drm_encoder
> *encoder)
> {
> return encoder->index;
> }
>
> +/**
> + * drm_encoder_mask - find the mask of a registered ENCODER
> + * @encoder: encoder to find mask for
> + *
> + * Given a registered encoder, return the mask bit of that encoder for an
> + * encoder's possible_clones field.
> + */
> +static inline u32 drm_encoder_mask(const struct drm_encoder *encoder)
> +{
> + return 1 << drm_encoder_index(encoder);
> +}
> +
> /**
> * drm_encoder_crtc_ok - can a given crtc drive a given encoder?
> * @encoder: encoder to test
> @@ -241,7 +253,7 @@ void drm_encoder_cleanup(struct drm_encoder *encoder);
> */
> #define drm_for_each_encoder_mask(encoder, dev, encoder_mask) \
> list_for_each_entry((encoder), &(dev)->mode_config.encoder_list, head) \
> - for_each_if ((encoder_mask) & (1 << drm_encoder_index(encoder)))
> + for_each_if ((encoder_mask) & drm_encoder_mask(encoder))
>
> /**
> * drm_for_each_encoder - iterate over all encoders
> --
> 2.16.4
>
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Re: [Intel-gfx] [PATCH 02/10] drm: Use drm_crtc_mask()
On Tue, Jun 26, 2018 at 10:47:08PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Use drm_crtc_mask() where appropriate.
>
> Mostly performed with coccinelle:
> @@
> @@
> - (1< + drm_crtc_mask(
> ...)
> - )
>
> @@
> @@
> - 1< + drm_crtc_mask(
> ...)
>
> @@
> @@
> - BIT(drm_crtc_index(
> + drm_crtc_mask(
> ...)
> - )
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/drm_crtc.c | 4 ++--
> drivers/gpu/drm/drm_simple_kms_helper.c | 2 +-
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> index f45e7a8d4acd..c762e75a2d94 100644
> --- a/drivers/gpu/drm/drm_crtc.c
> +++ b/drivers/gpu/drm/drm_crtc.c
> @@ -329,9 +329,9 @@ int drm_crtc_init_with_planes(struct drm_device *dev,
> struct drm_crtc *crtc,
> crtc->primary = primary;
> crtc->cursor = cursor;
> if (primary && !primary->possible_crtcs)
> - primary->possible_crtcs = 1 << drm_crtc_index(crtc);
> + primary->possible_crtcs = drm_crtc_mask(crtc);
> if (cursor && !cursor->possible_crtcs)
> - cursor->possible_crtcs = 1 << drm_crtc_index(crtc);
> + cursor->possible_crtcs = drm_crtc_mask(crtc);
>
> ret = drm_crtc_crc_init(crtc);
> if (ret) {
> diff --git a/drivers/gpu/drm/drm_simple_kms_helper.c
> b/drivers/gpu/drm/drm_simple_kms_helper.c
> index 9d87961da1db..b72fcf1e9605 100644
> --- a/drivers/gpu/drm/drm_simple_kms_helper.c
> +++ b/drivers/gpu/drm/drm_simple_kms_helper.c
> @@ -281,7 +281,7 @@ int drm_simple_display_pipe_init(struct drm_device *dev,
> if (ret)
> return ret;
>
> - encoder->possible_crtcs = 1 << drm_crtc_index(crtc);
> + encoder->possible_crtcs = drm_crtc_mask(crtc);
> ret = drm_encoder_init(dev, encoder, _simple_kms_encoder_funcs,
> DRM_MODE_ENCODER_NONE, NULL);
> if (ret || !connector)
> --
> 2.16.4
>
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Re: [Intel-gfx] [PATCH 01/10] drm: Add drm_plane_mask()
On Tue, Jun 26, 2018 at 10:47:07PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Add drm_plane_mask() which returns the 1< We already have an identical drm_crtc_mask() for crtcs.
>
> Mostly performed with coccinelle:
> @@
> @@
> - (1< + drm_plane_mask(
> ...)
> - )
>
> @@
> @@
> - 1< + drm_plane_mask(
> ...)
>
> @@
> @@
> - BIT(drm_plane_index(
> + drm_plane_mask(
> ...)
> - )
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/drm_atomic.c| 4 ++--
> drivers/gpu/drm/drm_framebuffer.c | 2 +-
> drivers/gpu/drm/drm_simple_kms_helper.c | 2 +-
> include/drm/drm_plane.h | 14 --
> 4 files changed, 16 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 178842380f75..684c9d3a1d6c 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -1581,7 +1581,7 @@ drm_atomic_set_crtc_for_plane(struct drm_plane_state
> *plane_state,
> if (WARN_ON(IS_ERR(crtc_state)))
> return PTR_ERR(crtc_state);
>
> - crtc_state->plane_mask &= ~(1 << drm_plane_index(plane));
> + crtc_state->plane_mask &= ~drm_plane_mask(plane);
> }
>
> plane_state->crtc = crtc;
> @@ -1591,7 +1591,7 @@ drm_atomic_set_crtc_for_plane(struct drm_plane_state
> *plane_state,
> crtc);
> if (IS_ERR(crtc_state))
> return PTR_ERR(crtc_state);
> - crtc_state->plane_mask |= (1 << drm_plane_index(plane));
> + crtc_state->plane_mask |= drm_plane_mask(plane);
> }
>
> if (crtc)
> diff --git a/drivers/gpu/drm/drm_framebuffer.c
> b/drivers/gpu/drm/drm_framebuffer.c
> index ed90974a452a..781af1d42d76 100644
> --- a/drivers/gpu/drm/drm_framebuffer.c
> +++ b/drivers/gpu/drm/drm_framebuffer.c
> @@ -847,7 +847,7 @@ static int atomic_remove_fb(struct drm_framebuffer *fb)
> if (ret)
> goto unlock;
>
> - plane_mask |= BIT(drm_plane_index(plane));
> + plane_mask |= drm_plane_mask(plane);
> }
>
> /* This list is only filled when disable_crtcs is set. */
> diff --git a/drivers/gpu/drm/drm_simple_kms_helper.c
> b/drivers/gpu/drm/drm_simple_kms_helper.c
> index 7a00455ca568..9d87961da1db 100644
> --- a/drivers/gpu/drm/drm_simple_kms_helper.c
> +++ b/drivers/gpu/drm/drm_simple_kms_helper.c
> @@ -52,7 +52,7 @@ static int drm_simple_kms_crtc_check(struct drm_crtc *crtc,
>struct drm_crtc_state *state)
> {
> bool has_primary = state->plane_mask &
> -BIT(drm_plane_index(crtc->primary));
> +drm_plane_mask(crtc->primary);
>
> /* We always want to have an active plane with an active CRTC */
> if (has_primary != state->enable)
> diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
> index 7d4d6c7f0afd..cee9dfaaa740 100644
> --- a/include/drm/drm_plane.h
> +++ b/include/drm/drm_plane.h
> @@ -639,10 +639,20 @@ void drm_plane_cleanup(struct drm_plane *plane);
> * Given a registered plane, return the index of that plane within a DRM
> * device's list of planes.
> */
> -static inline unsigned int drm_plane_index(struct drm_plane *plane)
> +static inline unsigned int drm_plane_index(const struct drm_plane *plane)
> {
> return plane->index;
> }
> +
> +/**
> + * drm_plane_mask - find the mask of a registered plane
> + * @plane: plane to find mask for
> + */
> +static inline u32 drm_plane_mask(const struct drm_plane *plane)
> +{
> + return 1 << drm_plane_index(plane);
> +}
> +
> struct drm_plane * drm_plane_from_index(struct drm_device *dev, int idx);
> void drm_plane_force_disable(struct drm_plane *plane);
>
> @@ -678,7 +688,7 @@ static inline struct drm_plane *drm_plane_find(struct
> drm_device *dev,
> */
> #define drm_for_each_plane_mask(plane, dev, plane_mask) \
> list_for_each_entry((plane), &(dev)->mode_config.plane_list, head) \
> - for_each_if ((plane_mask) & (1 << drm_plane_index(plane)))
> + for_each_if ((plane_mask) & drm_plane_mask(plane))
>
> /**
> * drm_for_each_legacy_plane - iterate over all planes for legacy userspace
> --
> 2.16.4
>
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Re: [Intel-gfx] [PATCH 1/2] drm/i915/icp: Add Interrupt Support
Em Ter, 2018-06-26 às 11:32 -0700, Srivatsa, Anusha escreveu:
>
> From: Zanoni, Paulo R
> Sent: Monday, June 25, 2018 4:17 PM
> To: Srivatsa, Anusha; intel-gfx@lists.freedesktop.org
> Cc: Pandiyan, Dhinakaran
> Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915/icp: Add Interrupt
> Support
>
> Em Qua, 2018-06-20 às 14:36 -0700, Anusha Srivatsa escreveu:
> > This patch addresses Interrupts from south display engine (SDE).
> >
> > ICP has two registers - SHOTPLUG_CTL_DDI and SHOTPLUG_CTL_TC.
> > Introduce these registers and their intended values.
> >
> > Introduce icp_irq_handler().
> >
> > v2:
> > - remove redundant register defines.(Lucas)
> > - Change register names to be more consistent with
> > previous platforms (Lucas)
> >
> > Cc: Lucas De Marchi
> > Cc: Paulo Zanoni
> > Cc: Dhinakaran Pandiyan
> > Cc: Ville Syrjala
> > Signed-off-by: Anusha Srivatsa
> > [Paulo: coding style bikesheds and rebases].
> > Signed-off-by: Paulo Zanoni
> > ---
> > drivers/gpu/drm/i915/i915_irq.c | 134
> > +++-
> > drivers/gpu/drm/i915/i915_reg.h | 40
> > 2 files changed, 172 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c
> > b/drivers/gpu/drm/i915/i915_irq.c
> > index 46aaef5..7a7c4a2 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -122,6 +122,15 @@ static const u32 hpd_gen11[HPD_NUM_PINS] = {
> > [HPD_PORT_F] = GEN11_TC4_HOTPLUG | GEN11_TBT4_HOTPLUG
> > };
> >
> > +static const u32 hpd_icp[HPD_NUM_PINS] = {
> > + [HPD_PORT_A] = SDE_DDIA_HOTPLUG_ICP,
> > + [HPD_PORT_B] = SDE_DDIB_HOTPLUG_ICP,
> > + [HPD_PORT_C] = SDE_TC1_HOTPLUG_ICP,
> > + [HPD_PORT_D] = SDE_TC2_HOTPLUG_ICP,
> > + [HPD_PORT_E] = SDE_TC3_HOTPLUG_ICP,
> > + [HPD_PORT_F] = SDE_TC4_HOTPLUG_ICP
> > +};
> > +
> > /* IIR can theoretically queue up two events. Be paranoid. */
> > #define GEN8_IRQ_RESET_NDX(type, which) do { \
> > I915_WRITE(GEN8_##type##_IMR(which), 0x); \
> > @@ -1586,6 +1595,34 @@ static bool
> > bxt_port_hotplug_long_detect(enum
> > port port, u32 val)
> > }
> > }
> >
> > +static bool icp_ddi_port_hotplug_long_detect(enum port port, u32
> > val)
> > +{
> > + switch (port) {
> > + case PORT_A:
> > + return val & ICP_DDIA_HPD_LONG_DETECT;
> > + case PORT_B:
> > + return val & ICP_DDIB_HPD_LONG_DETECT;
> > + default:
> > + return false;
> > + }
> > +}
> > +
> > +static bool icp_tc_port_hotplug_long_detect(enum port port, u32
> > val)
> > +{
> > + switch (port) {
> > + case PORT_C:
> > + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC1);
> > + case PORT_D:
> > + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC2);
> > + case PORT_E:
> > + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC3);
> > + case PORT_F:
> > + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC4);
> > + default:
> > + return false;
> > + }
> > +}
> > +
> > static bool spt_port_hotplug2_long_detect(enum port port, u32 val)
> > {
> > switch (port) {
> > @@ -2385,6 +2422,43 @@ static void cpt_irq_handler(struct
> > drm_i915_private *dev_priv, u32 pch_iir)
> > cpt_serr_int_handler(dev_priv);
> > }
> >
> > +static void icp_irq_handler(struct drm_i915_private *dev_priv, u32
> > pch_iir)
> > +{
> > + u32 ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP;
> > + u32 tc_hotplug_trigger = pch_iir & SDE_TC_MASK_ICP;
> > + u32 pin_mask = 0, long_mask = 0;
> > +
> > + if (ddi_hotplug_trigger) {
> > + u32 dig_hotplug_reg;
> > +
> > + dig_hotplug_reg = I915_READ(SHOTPLUG_CTL_DDI);
> > + I915_WRITE(SHOTPLUG_CTL_DDI, dig_hotplug_reg);
> > +
> > + intel_get_hpd_pins(dev_priv, _mask, _mask,
> > +ddi_hotplug_trigger,
> > +dig_hotplug_reg, hpd_icp,
> > +icp_ddi_port_hotplug_long_detect)
> > ;
> > + }
> > +
> > + if (tc_hotplug_trigger) {
> > + u32 dig_hotplug_reg;
> > +
> > + dig_hotplug_reg = I915_READ(SHOTPLUG_CTL_TC);
> > + I915_WRITE(SHOTPLUG_CTL_TC, dig_hotplug_reg);
> > +
> > + intel_get_hpd_pins(dev_priv, _mask, _mask,
> > +tc_hotplug_trigger,
> > +dig_hotplug_reg, hpd_icp,
> > +icp_tc_port_hotplug_long_detect);
> > + }
> > +
> > + if (pin_mask)
> > + intel_hpd_irq_handler(dev_priv, pin_mask,
> > long_mask);
> > +
> > + if (pch_iir & SDE_GMBUS_ICP)
> > + gmbus_irq_handler(dev_priv);
> > +}
> > +
> > static void spt_irq_handler(struct drm_i915_private *dev_priv, u32
> > pch_iir)
> > {
> > u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_SPT &
> > @@ -2804,8
[Intel-gfx] ✗ Fi.CI.IGT: failure for Makefile: globally enable VLA warning
== Series Details == Series: Makefile: globally enable VLA warning URL : https://patchwork.freedesktop.org/series/45421/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4381_full -> Patchwork_9427_full = == Summary - FAILURE == Serious unknown changes coming with Patchwork_9427_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_9427_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_9427_full: === IGT changes === Possible regressions igt@drv_selftest@live_execlists: shard-glk: PASS -> DMESG-FAIL igt@drv_selftest@live_guc: shard-glk: PASS -> DMESG-WARN Warnings igt@gem_exec_schedule@deep-bsd2: shard-kbl: PASS -> SKIP igt@gem_exec_schedule@deep-vebox: shard-kbl: SKIP -> PASS +3 igt@gem_linear_blits@interruptible: shard-apl: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_9427_full that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_gtt: shard-kbl: PASS -> INCOMPLETE (fdo#103665) +1 shard-glk: PASS -> FAIL (fdo#105347) shard-apl: PASS -> INCOMPLETE (fdo#103927) igt@drv_selftest@live_hangcheck: shard-glk: PASS -> DMESG-FAIL (fdo#106560, fdo#106947) igt@kms_flip@2x-flip-vs-expired-vblank: shard-glk: PASS -> FAIL (fdo#105363) igt@kms_flip@plain-flip-fb-recreate: shard-glk: PASS -> FAIL (fdo#100368) igt@kms_flip_tiling@flip-to-y-tiled: shard-glk: PASS -> FAIL (fdo#104724) igt@kms_rotation_crc@cursor-rotation-180: shard-hsw: PASS -> FAIL (fdo#104724, fdo#103925) Possible fixes igt@gem_exec_await@wide-contexts: shard-glk: FAIL (fdo#105900) -> PASS igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic: shard-hsw: FAIL (fdo#105767) -> PASS igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic: shard-glk: FAIL (fdo#105454, fdo#106509) -> PASS igt@kms_flip@2x-plain-flip-fb-recreate: shard-glk: FAIL (fdo#100368) -> PASS igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-glk: FAIL (fdo#102887, fdo#105363) -> PASS igt@kms_setmode@basic: shard-apl: FAIL (fdo#99912) -> PASS shard-kbl: FAIL (fdo#99912) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724 fdo#105347 https://bugs.freedesktop.org/show_bug.cgi?id=105347 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#105454 https://bugs.freedesktop.org/show_bug.cgi?id=105454 fdo#105767 https://bugs.freedesktop.org/show_bug.cgi?id=105767 fdo#105900 https://bugs.freedesktop.org/show_bug.cgi?id=105900 fdo#106509 https://bugs.freedesktop.org/show_bug.cgi?id=106509 fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560 fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4381 -> Patchwork_9427 CI_DRM_4381: ed0d219201c3fd3eb430b712d6ceb51b423daefc @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9427: e40c09ebdd8985f81970f02ada37dc18072c44ee @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9427/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 07/10] drm/rockchip: Use drm_crtc_mask()
From: Ville Syrjälä
Use drm_crtc_mask() where appropriate.
Cc: Sandy Huang
Cc: "Heiko Stübner"
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index c9222119767d..effecbed2d11 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -1308,7 +1308,7 @@ static int vop_create_crtc(struct vop *vop)
for (i = 0; i < vop_data->win_size; i++) {
struct vop_win *vop_win = >win[i];
const struct vop_win_data *win_data = vop_win->data;
- unsigned long possible_crtcs = 1 << drm_crtc_index(crtc);
+ unsigned long possible_crtcs = drm_crtc_mask(crtc);
if (win_data->type != DRM_PLANE_TYPE_OVERLAY)
continue;
--
2.16.4
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[Intel-gfx] [PATCH 04/10] drm: Add drm_connector_mask()
From: Ville Syrjälä
Add drm_connector_mask() which returns the 1<
---
drivers/gpu/drm/drm_atomic.c | 6 +++---
include/drm/drm_connector.h | 8 +++-
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 684c9d3a1d6c..d5cefb1cb2a2 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -1700,7 +1700,7 @@ drm_atomic_set_crtc_for_connector(struct
drm_connector_state *conn_state,
conn_state->crtc);
crtc_state->connector_mask &=
- ~(1 << drm_connector_index(conn_state->connector));
+ ~drm_connector_mask(conn_state->connector);
drm_connector_put(conn_state->connector);
conn_state->crtc = NULL;
@@ -1712,7 +1712,7 @@ drm_atomic_set_crtc_for_connector(struct
drm_connector_state *conn_state,
return PTR_ERR(crtc_state);
crtc_state->connector_mask |=
- 1 << drm_connector_index(conn_state->connector);
+ drm_connector_mask(conn_state->connector);
drm_connector_get(conn_state->connector);
conn_state->crtc = crtc;
@@ -1839,7 +1839,7 @@ drm_atomic_add_affected_connectors(struct
drm_atomic_state *state,
*/
drm_connector_list_iter_begin(state->dev, _iter);
drm_for_each_connector_iter(connector, _iter) {
- if (!(crtc_state->connector_mask & (1 <<
drm_connector_index(connector
+ if (!(crtc_state->connector_mask &
drm_connector_mask(connector)))
continue;
conn_state = drm_atomic_get_connector_state(state, connector);
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 14ab58ade87f..bf0f0f0786d3 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -1030,11 +1030,17 @@ int drm_mode_connector_attach_encoder(struct
drm_connector *connector,
struct drm_encoder *encoder);
void drm_connector_cleanup(struct drm_connector *connector);
-static inline unsigned drm_connector_index(struct drm_connector *connector)
+
+static inline unsigned int drm_connector_index(const struct drm_connector
*connector)
{
return connector->index;
}
+static inline u32 drm_connector_mask(const struct drm_connector *connector)
+{
+ return 1 << connector->index;
+}
+
/**
* drm_connector_lookup - lookup connector object
* @dev: DRM device
--
2.16.4
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[Intel-gfx] [PATCH 10/10] drm/vmwgfx: Use drm_plane_mask() & co.
From: Ville Syrjälä
Use drm_{plane,connector}_mask() where appropriate.
Cc: VMware Graphics
Cc: Sinclair Yeh
Cc: Thomas Hellstrom
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index ef96ba7432ad..17e01423ead1 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -535,9 +535,9 @@ int vmw_du_crtc_atomic_check(struct drm_crtc *crtc,
struct drm_crtc_state *new_state)
{
struct vmw_display_unit *du = vmw_crtc_to_du(new_state->crtc);
- int connector_mask = 1 << drm_connector_index(>connector);
+ int connector_mask = drm_connector_mask(>connector);
bool has_primary = new_state->plane_mask &
- BIT(drm_plane_index(crtc->primary));
+ drm_plane_mask(crtc->primary);
/* We always want to have an active plane with an active CRTC */
if (has_primary != new_state->enable)
--
2.16.4
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[Intel-gfx] [PATCH 08/10] drm/sun4i: Use drm_crtc_mask()
From: Ville Syrjälä
Use drm_crtc_mask() where appropriate.
Cc: Maxime Ripard
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/sun4i/sun4i_crtc.c | 2 +-
drivers/gpu/drm/sun4i/sun4i_lvds.c | 2 +-
drivers/gpu/drm/sun4i/sun4i_rgb.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_crtc.c
b/drivers/gpu/drm/sun4i/sun4i_crtc.c
index 2d7c57406715..3eedf335a935 100644
--- a/drivers/gpu/drm/sun4i/sun4i_crtc.c
+++ b/drivers/gpu/drm/sun4i/sun4i_crtc.c
@@ -242,7 +242,7 @@ struct sun4i_crtc *sun4i_crtc_init(struct drm_device *drm,
/* Set possible_crtcs to this crtc for overlay planes */
for (i = 0; planes[i]; i++) {
- uint32_t possible_crtcs = BIT(drm_crtc_index(>crtc));
+ uint32_t possible_crtcs = drm_crtc_mask(>crtc);
struct drm_plane *plane = planes[i];
if (plane->type == DRM_PLANE_TYPE_OVERLAY)
diff --git a/drivers/gpu/drm/sun4i/sun4i_lvds.c
b/drivers/gpu/drm/sun4i/sun4i_lvds.c
index be3f14d7746d..a69fe2e1f9d1 100644
--- a/drivers/gpu/drm/sun4i/sun4i_lvds.c
+++ b/drivers/gpu/drm/sun4i/sun4i_lvds.c
@@ -136,7 +136,7 @@ int sun4i_lvds_init(struct drm_device *drm, struct
sun4i_tcon *tcon)
}
/* The LVDS encoder can only work with the TCON channel 0 */
- lvds->encoder.possible_crtcs = BIT(drm_crtc_index(>crtc->crtc));
+ lvds->encoder.possible_crtcs = drm_crtc_mask(>crtc->crtc);
if (tcon->panel) {
drm_connector_helper_add(>connector,
diff --git a/drivers/gpu/drm/sun4i/sun4i_rgb.c
b/drivers/gpu/drm/sun4i/sun4i_rgb.c
index f2fa1f210509..96d21b07f8fc 100644
--- a/drivers/gpu/drm/sun4i/sun4i_rgb.c
+++ b/drivers/gpu/drm/sun4i/sun4i_rgb.c
@@ -202,7 +202,7 @@ int sun4i_rgb_init(struct drm_device *drm, struct
sun4i_tcon *tcon)
}
/* The RGB encoder can only work with the TCON channel 0 */
- rgb->encoder.possible_crtcs = BIT(drm_crtc_index(>crtc->crtc));
+ rgb->encoder.possible_crtcs = drm_crtc_mask(>crtc->crtc);
if (tcon->panel) {
drm_connector_helper_add(>connector,
--
2.16.4
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[Intel-gfx] [PATCH 09/10] drm/vc4: Use drm_crtc_mask()
From: Ville Syrjälä
Use drm_crtc_mask() where appropriate.
Cc: Eric Anholt
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/vc4/vc4_crtc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index dcadf793ee80..d222358fa8a7 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -1081,7 +1081,7 @@ static int vc4_crtc_bind(struct device *dev, struct
device *master, void *data)
if (IS_ERR(plane))
continue;
- plane->possible_crtcs = 1 << drm_crtc_index(crtc);
+ plane->possible_crtcs = drm_crtc_mask(crtc);
}
/* Set up the legacy cursor after overlay initialization,
@@ -1090,7 +1090,7 @@ static int vc4_crtc_bind(struct device *dev, struct
device *master, void *data)
*/
cursor_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_CURSOR);
if (!IS_ERR(cursor_plane)) {
- cursor_plane->possible_crtcs = 1 << drm_crtc_index(crtc);
+ cursor_plane->possible_crtcs = drm_crtc_mask(crtc);
crtc->cursor = cursor_plane;
}
@@ -1118,7 +1118,7 @@ static int vc4_crtc_bind(struct device *dev, struct
device *master, void *data)
err_destroy_planes:
list_for_each_entry_safe(destroy_plane, temp,
>mode_config.plane_list, head) {
- if (destroy_plane->possible_crtcs == 1 << drm_crtc_index(crtc))
+ if (destroy_plane->possible_crtcs == drm_crtc_mask(crtc))
destroy_plane->funcs->destroy(destroy_plane);
}
err:
--
2.16.4
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[Intel-gfx] [PATCH 02/10] drm: Use drm_crtc_mask()
From: Ville Syrjälä
Use drm_crtc_mask() where appropriate.
Mostly performed with coccinelle:
@@
@@
- (1<
---
drivers/gpu/drm/drm_crtc.c | 4 ++--
drivers/gpu/drm/drm_simple_kms_helper.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index f45e7a8d4acd..c762e75a2d94 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -329,9 +329,9 @@ int drm_crtc_init_with_planes(struct drm_device *dev,
struct drm_crtc *crtc,
crtc->primary = primary;
crtc->cursor = cursor;
if (primary && !primary->possible_crtcs)
- primary->possible_crtcs = 1 << drm_crtc_index(crtc);
+ primary->possible_crtcs = drm_crtc_mask(crtc);
if (cursor && !cursor->possible_crtcs)
- cursor->possible_crtcs = 1 << drm_crtc_index(crtc);
+ cursor->possible_crtcs = drm_crtc_mask(crtc);
ret = drm_crtc_crc_init(crtc);
if (ret) {
diff --git a/drivers/gpu/drm/drm_simple_kms_helper.c
b/drivers/gpu/drm/drm_simple_kms_helper.c
index 9d87961da1db..b72fcf1e9605 100644
--- a/drivers/gpu/drm/drm_simple_kms_helper.c
+++ b/drivers/gpu/drm/drm_simple_kms_helper.c
@@ -281,7 +281,7 @@ int drm_simple_display_pipe_init(struct drm_device *dev,
if (ret)
return ret;
- encoder->possible_crtcs = 1 << drm_crtc_index(crtc);
+ encoder->possible_crtcs = drm_crtc_mask(crtc);
ret = drm_encoder_init(dev, encoder, _simple_kms_encoder_funcs,
DRM_MODE_ENCODER_NONE, NULL);
if (ret || !connector)
--
2.16.4
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[Intel-gfx] [PATCH 05/10] drm/i915: Use drm_plane_mask() & co.
From: Ville Syrjälä
Use drm_{plane,crtc,encoder,connector}_mask() where appropriate.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 14 +++---
drivers/gpu/drm/i915/intel_display.h | 4 ++--
drivers/gpu/drm/i915/intel_dpll_mgr.c | 6 +++---
3 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index eaa0663963a5..7cc70e751c82 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2756,10 +2756,10 @@ intel_set_plane_visible(struct intel_crtc_state
*crtc_state,
/* FIXME pre-g4x don't work like this */
if (visible) {
- crtc_state->base.plane_mask |=
BIT(drm_plane_index(>base));
+ crtc_state->base.plane_mask |= drm_plane_mask(>base);
crtc_state->active_planes |= BIT(plane->id);
} else {
- crtc_state->base.plane_mask &=
~BIT(drm_plane_index(>base));
+ crtc_state->base.plane_mask &= ~drm_plane_mask(>base);
crtc_state->active_planes &= ~BIT(plane->id);
}
@@ -11896,7 +11896,7 @@ verify_single_dpll_state(struct drm_i915_private
*dev_priv,
struct drm_crtc_state *new_state)
{
struct intel_dpll_hw_state dpll_hw_state;
- unsigned crtc_mask;
+ unsigned int crtc_mask;
bool active;
memset(_hw_state, 0, sizeof(dpll_hw_state));
@@ -11923,7 +11923,7 @@ verify_single_dpll_state(struct drm_i915_private
*dev_priv,
return;
}
- crtc_mask = 1 << drm_crtc_index(crtc);
+ crtc_mask = drm_crtc_mask(crtc);
if (new_state->active)
I915_STATE_WARN(!(pll->active_mask & crtc_mask),
@@ -11958,7 +11958,7 @@ verify_shared_dpll_state(struct drm_device *dev, struct
drm_crtc *crtc,
if (old_state->shared_dpll &&
old_state->shared_dpll != new_state->shared_dpll) {
- unsigned crtc_mask = 1 << drm_crtc_index(crtc);
+ unsigned int crtc_mask = drm_crtc_mask(crtc);
struct intel_shared_dpll *pll = old_state->shared_dpll;
I915_STATE_WARN(pll->active_mask & crtc_mask,
@@ -15636,9 +15636,9 @@ static void intel_modeset_readout_hw_state(struct
drm_device *dev)
* rely on the connector_mask being accurate.
*/
encoder->base.crtc->state->connector_mask |=
- 1 <<
drm_connector_index(>base);
+ drm_connector_mask(>base);
encoder->base.crtc->state->encoder_mask |=
- 1 << drm_encoder_index(>base);
+ drm_encoder_mask(>base);
}
} else {
diff --git a/drivers/gpu/drm/i915/intel_display.h
b/drivers/gpu/drm/i915/intel_display.h
index dfb02da73ac8..dd30cae5eb00 100644
--- a/drivers/gpu/drm/i915/intel_display.h
+++ b/drivers/gpu/drm/i915/intel_display.h
@@ -261,7 +261,7 @@ struct intel_link_m_n {
&(dev)->mode_config.plane_list, \
base.head) \
for_each_if((plane_mask) & \
- BIT(drm_plane_index(_plane->base)))
+ drm_plane_mask(_plane->base)))
#define for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) \
list_for_each_entry(intel_plane,\
@@ -278,7 +278,7 @@ struct intel_link_m_n {
list_for_each_entry(intel_crtc, \
&(dev)->mode_config.crtc_list, \
base.head) \
- for_each_if((crtc_mask) &
BIT(drm_crtc_index(_crtc->base)))
+ for_each_if((crtc_mask) & drm_crtc_mask(_crtc->base))
#define for_each_intel_encoder(dev, intel_encoder) \
list_for_each_entry(intel_encoder, \
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index 57342364fd30..e4ac7f980c9e 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -163,8 +163,8 @@ void intel_enable_shared_dpll(struct intel_crtc *crtc)
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_shared_dpll *pll = crtc->config->shared_dpll;
- unsigned crtc_mask = 1 << drm_crtc_index(>base);
- unsigned old_mask;
+ unsigned int crtc_mask = drm_crtc_mask(>base);
+ unsigned int old_mask;
if (WARN_ON(pll == NULL))
return;
@@ -207,7 +207,7 @@ void
[Intel-gfx] [PATCH 06/10] drm/imx: Use drm_plane_mask()
From: Ville Syrjälä
Use drm_plane_mask() where appropriate.
Cc: Philipp Zabel
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/imx/ipuv3-crtc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/imx/ipuv3-crtc.c b/drivers/gpu/drm/imx/ipuv3-crtc.c
index e83af0f2be86..21d002859ae0 100644
--- a/drivers/gpu/drm/imx/ipuv3-crtc.c
+++ b/drivers/gpu/drm/imx/ipuv3-crtc.c
@@ -213,7 +213,7 @@ static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
static int ipu_crtc_atomic_check(struct drm_crtc *crtc,
struct drm_crtc_state *state)
{
- u32 primary_plane_mask = 1 << drm_plane_index(crtc->primary);
+ u32 primary_plane_mask = drm_plane_mask(crtc->primary);
if (state->active && (primary_plane_mask & state->plane_mask) == 0)
return -EINVAL;
--
2.16.4
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[Intel-gfx] [PATCH 03/10] drm: Add drm_encoder_mask()
From: Ville Syrjälä
Add drm_encoder_mask() which returns the 1<
---
drivers/gpu/drm/drm_atomic_helper.c | 10 +-
include/drm/drm_encoder.h | 16 ++--
2 files changed, 19 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index 17baf5057132..e022cacdae34 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -121,7 +121,7 @@ static int handle_conflicting_encoders(struct
drm_atomic_state *state,
new_encoder = drm_atomic_helper_best_encoder(connector);
if (new_encoder) {
- if (encoder_mask & (1 <<
drm_encoder_index(new_encoder))) {
+ if (encoder_mask & drm_encoder_mask(new_encoder)) {
DRM_DEBUG_ATOMIC("[ENCODER:%d:%s] on
[CONNECTOR:%d:%s] already assigned\n",
new_encoder->base.id, new_encoder->name,
connector->base.id, connector->name);
@@ -129,7 +129,7 @@ static int handle_conflicting_encoders(struct
drm_atomic_state *state,
return -EINVAL;
}
- encoder_mask |= 1 << drm_encoder_index(new_encoder);
+ encoder_mask |= drm_encoder_mask(new_encoder);
}
}
@@ -155,7 +155,7 @@ static int handle_conflicting_encoders(struct
drm_atomic_state *state,
continue;
encoder = connector->state->best_encoder;
- if (!encoder || !(encoder_mask & (1 <<
drm_encoder_index(encoder
+ if (!encoder || !(encoder_mask & drm_encoder_mask(encoder)))
continue;
if (!disable_conflicting_encoders) {
@@ -223,7 +223,7 @@ set_best_encoder(struct drm_atomic_state *state,
crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
crtc_state->encoder_mask &=
- ~(1 <<
drm_encoder_index(conn_state->best_encoder));
+ ~drm_encoder_mask(conn_state->best_encoder);
}
}
@@ -234,7 +234,7 @@ set_best_encoder(struct drm_atomic_state *state,
crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
crtc_state->encoder_mask |=
- 1 << drm_encoder_index(encoder);
+ drm_encoder_mask(encoder);
}
}
diff --git a/include/drm/drm_encoder.h b/include/drm/drm_encoder.h
index fb299696c7c4..4f597c0730b4 100644
--- a/include/drm/drm_encoder.h
+++ b/include/drm/drm_encoder.h
@@ -191,11 +191,23 @@ int drm_encoder_init(struct drm_device *dev,
* Given a registered encoder, return the index of that encoder within a DRM
* device's list of encoders.
*/
-static inline unsigned int drm_encoder_index(struct drm_encoder *encoder)
+static inline unsigned int drm_encoder_index(const struct drm_encoder *encoder)
{
return encoder->index;
}
+/**
+ * drm_encoder_mask - find the mask of a registered ENCODER
+ * @encoder: encoder to find mask for
+ *
+ * Given a registered encoder, return the mask bit of that encoder for an
+ * encoder's possible_clones field.
+ */
+static inline u32 drm_encoder_mask(const struct drm_encoder *encoder)
+{
+ return 1 << drm_encoder_index(encoder);
+}
+
/**
* drm_encoder_crtc_ok - can a given crtc drive a given encoder?
* @encoder: encoder to test
@@ -241,7 +253,7 @@ void drm_encoder_cleanup(struct drm_encoder *encoder);
*/
#define drm_for_each_encoder_mask(encoder, dev, encoder_mask) \
list_for_each_entry((encoder), &(dev)->mode_config.encoder_list, head) \
- for_each_if ((encoder_mask) & (1 << drm_encoder_index(encoder)))
+ for_each_if ((encoder_mask) & drm_encoder_mask(encoder))
/**
* drm_for_each_encoder - iterate over all encoders
--
2.16.4
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[Intel-gfx] [PATCH 01/10] drm: Add drm_plane_mask()
From: Ville Syrjälä
Add drm_plane_mask() which returns the 1<
---
drivers/gpu/drm/drm_atomic.c| 4 ++--
drivers/gpu/drm/drm_framebuffer.c | 2 +-
drivers/gpu/drm/drm_simple_kms_helper.c | 2 +-
include/drm/drm_plane.h | 14 --
4 files changed, 16 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 178842380f75..684c9d3a1d6c 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -1581,7 +1581,7 @@ drm_atomic_set_crtc_for_plane(struct drm_plane_state
*plane_state,
if (WARN_ON(IS_ERR(crtc_state)))
return PTR_ERR(crtc_state);
- crtc_state->plane_mask &= ~(1 << drm_plane_index(plane));
+ crtc_state->plane_mask &= ~drm_plane_mask(plane);
}
plane_state->crtc = crtc;
@@ -1591,7 +1591,7 @@ drm_atomic_set_crtc_for_plane(struct drm_plane_state
*plane_state,
crtc);
if (IS_ERR(crtc_state))
return PTR_ERR(crtc_state);
- crtc_state->plane_mask |= (1 << drm_plane_index(plane));
+ crtc_state->plane_mask |= drm_plane_mask(plane);
}
if (crtc)
diff --git a/drivers/gpu/drm/drm_framebuffer.c
b/drivers/gpu/drm/drm_framebuffer.c
index ed90974a452a..781af1d42d76 100644
--- a/drivers/gpu/drm/drm_framebuffer.c
+++ b/drivers/gpu/drm/drm_framebuffer.c
@@ -847,7 +847,7 @@ static int atomic_remove_fb(struct drm_framebuffer *fb)
if (ret)
goto unlock;
- plane_mask |= BIT(drm_plane_index(plane));
+ plane_mask |= drm_plane_mask(plane);
}
/* This list is only filled when disable_crtcs is set. */
diff --git a/drivers/gpu/drm/drm_simple_kms_helper.c
b/drivers/gpu/drm/drm_simple_kms_helper.c
index 7a00455ca568..9d87961da1db 100644
--- a/drivers/gpu/drm/drm_simple_kms_helper.c
+++ b/drivers/gpu/drm/drm_simple_kms_helper.c
@@ -52,7 +52,7 @@ static int drm_simple_kms_crtc_check(struct drm_crtc *crtc,
struct drm_crtc_state *state)
{
bool has_primary = state->plane_mask &
- BIT(drm_plane_index(crtc->primary));
+ drm_plane_mask(crtc->primary);
/* We always want to have an active plane with an active CRTC */
if (has_primary != state->enable)
diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
index 7d4d6c7f0afd..cee9dfaaa740 100644
--- a/include/drm/drm_plane.h
+++ b/include/drm/drm_plane.h
@@ -639,10 +639,20 @@ void drm_plane_cleanup(struct drm_plane *plane);
* Given a registered plane, return the index of that plane within a DRM
* device's list of planes.
*/
-static inline unsigned int drm_plane_index(struct drm_plane *plane)
+static inline unsigned int drm_plane_index(const struct drm_plane *plane)
{
return plane->index;
}
+
+/**
+ * drm_plane_mask - find the mask of a registered plane
+ * @plane: plane to find mask for
+ */
+static inline u32 drm_plane_mask(const struct drm_plane *plane)
+{
+ return 1 << drm_plane_index(plane);
+}
+
struct drm_plane * drm_plane_from_index(struct drm_device *dev, int idx);
void drm_plane_force_disable(struct drm_plane *plane);
@@ -678,7 +688,7 @@ static inline struct drm_plane *drm_plane_find(struct
drm_device *dev,
*/
#define drm_for_each_plane_mask(plane, dev, plane_mask) \
list_for_each_entry((plane), &(dev)->mode_config.plane_list, head) \
- for_each_if ((plane_mask) & (1 << drm_plane_index(plane)))
+ for_each_if ((plane_mask) & drm_plane_mask(plane))
/**
* drm_for_each_legacy_plane - iterate over all planes for legacy userspace
--
2.16.4
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Re: [Intel-gfx] [PATCH v2 2/2] drm/i915/psr: Warn for erroneous enabling of both PSR1 and PSR2.
On Tue, 2018-06-26 at 08:50 -0700, Rodrigo Vivi wrote: > On Tue, Jun 26, 2018 at 02:05:22AM -0700, Dhinakaran Pandiyan wrote: > > > > Depending whether PSR1 or PSR2 was configured, we print a warning > > if the > > corresponding control mmio indicated PSR was erroneously enabled. > > As > > Chris pointed out, it makes more sense to check for both the mmio's > > since we expect neither PSR1 nor PSR2 to be enabled when > > psr_activate() is > > called. > > > > v2: Read PSR2 control register only on supported platforms > > (Rodrigo) > > > > Cc: Rodrigo Vivi > > Cc: Chris Wilson > > Signed-off-by: Dhinakaran Pandiyan > Reviewed-by: Rodrigo Vivi I have pushed this series, thanks for the reviews. -DK > > > > > --- > > drivers/gpu/drm/i915/intel_psr.c | 5 ++--- > > 1 file changed, 2 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_psr.c > > b/drivers/gpu/drm/i915/intel_psr.c > > index 7aa324f0d1f7..f27193310480 100644 > > --- a/drivers/gpu/drm/i915/intel_psr.c > > +++ b/drivers/gpu/drm/i915/intel_psr.c > > @@ -576,10 +576,9 @@ static void intel_psr_activate(struct intel_dp > > *intel_dp) > > struct drm_device *dev = intel_dig_port->base.base.dev; > > struct drm_i915_private *dev_priv = to_i915(dev); > > > > - if (dev_priv->psr.psr2_enabled) > > + if (INTEL_GEN(dev_priv) >= 9) > > WARN_ON(I915_READ(EDP_PSR2_CTL) & > > EDP_PSR2_ENABLE); > > - else > > - WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE); > > + WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE); > > WARN_ON(dev_priv->psr.active); > > lockdep_assert_held(_priv->psr.lock); > > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3] drm/i915/ddi: Get AUX power domain for DP main link too
On Tue, Jun 26, 2018 at 09:03:48PM +0300, Imre Deak wrote:
> On Tue, Jun 26, 2018 at 10:40:26AM -0700, Paulo Zanoni wrote:
> > Em Seg, 2018-06-25 às 16:55 -0700, Souza, Jose escreveu:
> > > On Thu, 2018-06-21 at 21:44 +0300, Imre Deak wrote:
> > > > So far we got an AUX power domain reference only for the duration
> > > > of
> > > > DP
> > > > AUX transfers. However, the following suggests that we also need
> > > > these
> > > > for main link functionality:
> > > > - The specification doesn't state whether it's needed or not for
> > > > main
> > > > link functionality, but suggests that these power wells need to
> > > > be
> > > > enabled already during display core initialization (Sequences to
> > > > Initialize Display).
> >
> > No, the specification states it's needed. Page "Sequences for
> > DisplayPort" (the ICL version, of course), step 1.b:
> >
> > "TC: Note that AUX power is required for running main link."
> >
> > Same for the HDMI page.
>
> Yes, for ICL MG PHY ports (in all modes) it's clearly stated as I also
> wrote it below. The above is about the ICL combo PHY ports and the other
> platforms. For those the only hint is that enabling the AUX power wells
> is listed as a step in the 'Sequences to Initialize Display".
>
I tested this patch with the latest stepping with DP on Combo PHY port.
Without this patch it was giving me AUX timeouts and could never succeed with
link
training. I needed this patch to successfully train the link and get display out
on Combo PHy Port B DP.
So,
Tested-by: Manasi Navare
Manasi
> >
> > > > - For PSR we need to keep the AUX power well enabled.
> > > > - On ICL combo PHY ports (non-TC) the AUX power well is needed for
> > > > link training too: while the port is enabled with a DP link
> > > > training
> > > > test pattern trying to toggle the AUX power well will time out.
> > > > - On ICL MG PHY ports (TC) the AUX power well is needed also for
> > > > main
> > > > link functionality (both in DP and HDMI modes).
> > > > - Windows enables these power wells both for main and AUX lane
> > > > functionality.
> > > >
> > > > Based on the above take an AUX power reference for main link
> > > > functionality too. This makes a difference only on GEN10+ (GLK+)
> > > > platforms, where we have separate port specific AUX power wells.
> > > >
> > > > For PSR we still need to distinguish between port A and the other
> > > > ports, since on port A DC states must stay enabled for main link
> > > > functionality, but DC states must be disabled for driver initiated
> > > > AUX transfers. So re-use the corresponding helper from intel_psr.c.
> > > >
> > > > Since we take now a reference for main link functionality on all DP
> > > > ports we can forgo taking the separate power ref for PSR
> > > > functionality.
> > > >
> > > > v2:
> > > > - Make sure DC states stay enabled when taking the ref on port A.
> > > > (Ville)
> > > >
> > > > v3: (Ville)
> > > > - Fix comment about logic for encoders without a crtc state and
> > > > add FIXME note for a simplification to avoid calling
> > > > get_power_domains
> > > > in such cases.
> > > > - Use intel_crtc_has_dp_encoder() instead
> > > > !intel_crtc_has_type(HDMI).
> > > >
> > > > Cc: Ville Syrjälä
> > > > Cc: Dhinakaran Pandiyan
> > > > Cc: Paulo Zanoni
> > > > Signed-off-by: Imre Deak
> > >
> > > The spec is not clear but this fix the "aux power well" enable
> > > timeouts
> > > that I was getting in aux B so looks like your interpretation is
> > > right.
> > >
> > > Reviewed-by: José Roberto de Souza
> > >
> > > > ---
> > > > drivers/gpu/drm/i915/intel_ddi.c| 54
> > > > ++---
> > > > drivers/gpu/drm/i915/intel_display.c| 12 +++-
> > > > drivers/gpu/drm/i915/intel_drv.h| 3 +-
> > > > drivers/gpu/drm/i915/intel_psr.c| 41 -
> > > >
> > > > drivers/gpu/drm/i915/intel_runtime_pm.c | 1 +
> > > > 5 files changed, 64 insertions(+), 47 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > > > b/drivers/gpu/drm/i915/intel_ddi.c
> > > > index 044fe1fb9872..0319825b725b 100644
> > > > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > > > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > > > @@ -1983,15 +1983,55 @@ bool intel_ddi_get_hw_state(struct
> > > > intel_encoder *encoder,
> > > > return ret;
> > > > }
> > > >
> > > > -static u64 intel_ddi_get_power_domains(struct intel_encoder
> > > > *encoder)
> > > > +static inline enum intel_display_power_domain
> > > > +intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
> > > > +{
> > > > + /* CNL HW requires corresponding AUX IOs to be powered up
> > > > for PSR with
> > > > +* DC states enabled at the same time, while for driver
> > > > initiated AUX
> > > > +* transfers we need the same AUX IOs to be powered but
> > > > with
> > > > DC states
> > > > +* disabled. Accordingly use the AUX power domain here
>
Re: [Intel-gfx] [PATCH v6 1/2] drm/i915/psr: Lockless version of psr_wait_for_idle
On Tue, 2018-06-26 at 10:26 +0200, Daniel Vetter wrote:
> On Mon, Jun 25, 2018 at 10:57:23PM -0700, Tarun Vyas wrote:
> >
> > This is a lockless version of the exisiting psr_wait_for_idle().
> > We want to wait for PSR to idle out inside intel_pipe_update_start.
> > At the time of a pipe update, we should never race with any psr
> > enable or disable code, which is a part of crtc enable/disable. So,
> > we can live w/o taking any psr locks at all.
> > The follow up patch will use this lockless wait inside pipe_update_
> > start to wait for PSR to idle out before checking for vblank
> > evasion.
> What's the upside of the lockless wait? The patch seems to be
> entirely
> missing the motivation for the change. "Make it lockless" isn't a
> good
> justification on itself, there needs to be data about overhead or
> stalls
> included if that's the reason for doing this change.
>
Acquiring the PSR mutex means potential stalls due to PSR work having
already acquired it. The idea was to keep PSR changes in
pipe_update_start() less invasive latency wise.
But yeah, the commit has to add the explanation.
> >
> > Even if psr is never enabled, psr2_enabled will be false and this
> > function will wait for PSR1 to idle out, which should just return
> > immediately, so a very short (~1-2 usec) wait for cases where PSR
> > is disabled.
> >
> > v2: Add comment to explain the 25msec timeout (DK)
> >
> > v3: Rename psr_wait_for_idle to __psr_wait_for_idle_locked to avoid
> > naming conflicts and propagate err (if any) to the caller
> > (Chris)
> >
> > v5: Form a series with the next patch
> >
> > Signed-off-by: Tarun Vyas
> > ---
> > drivers/gpu/drm/i915/intel_drv.h | 1 +
> > drivers/gpu/drm/i915/intel_psr.c | 25 +++--
> > 2 files changed, 24 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > b/drivers/gpu/drm/i915/intel_drv.h
> > index 578346b8d7e2..9cb2b8afdd3e 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -1920,6 +1920,7 @@ void intel_psr_compute_config(struct intel_dp
> > *intel_dp,
> > struct intel_crtc_state
> > *crtc_state);
> > void intel_psr_irq_control(struct drm_i915_private *dev_priv, bool
> > debug);
> > void intel_psr_irq_handler(struct drm_i915_private *dev_priv, u32
> > psr_iir);
> > +int intel_psr_wait_for_idle(struct drm_i915_private *dev_priv);
> >
> > /* intel_runtime_pm.c */
> > int intel_power_domains_init(struct drm_i915_private *);
> > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > b/drivers/gpu/drm/i915/intel_psr.c
> > index aea81ace854b..41e6962923ae 100644
> > --- a/drivers/gpu/drm/i915/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > @@ -757,7 +757,28 @@ void intel_psr_disable(struct intel_dp
> > *intel_dp,
> > cancel_work_sync(_priv->psr.work);
> > }
> >
> > -static bool psr_wait_for_idle(struct drm_i915_private *dev_priv)
> > +int intel_psr_wait_for_idle(struct drm_i915_private *dev_priv)
> > +{
> > + i915_reg_t reg;
> > + u32 mask;
> > +
> I think a comment here explaining why the lockless access is correct
> is
> justified here.
>
> >
> > + if (dev_priv->psr.psr2_enabled) {
> > + reg = EDP_PSR2_STATUS;
> > + mask = EDP_PSR2_STATUS_STATE_MASK;
> > + } else {
> > + reg = EDP_PSR_STATUS;
> > + mask = EDP_PSR_STATUS_STATE_MASK;
> > + }
> > +
> > + /*
> > + * The 25 msec timeout accounts for a frame @ 60Hz
> > refresh rate,
> > + * exit training an aux handshake time.
> > + */
> So this goes boom if the panel is running at e.g. 50Hz? Please either
> calculate this from the current mode (but that's a bit tricky, due to
> DRRS), or go with a more defensive timeout. Also small typo,
> s/an/and/.
>
> Would also be good to have numbers for the exit training/aux
> handshake
> time.
bspec says exit should be compelete in "one full frame time (1/refresh
rate), plus SRD exit training time (max of 6ms), plus SRD aux channel
handshake (max of 1.5ms)."
> -Daniel
>
> >
> > + return intel_wait_for_register(dev_priv, reg, mask,
> > + EDP_PSR_STATUS_STATE_IDLE,
> > 25);
> > +}
> > +
> > +static bool __psr_wait_for_idle_locked(struct drm_i915_private
> > *dev_priv)
> > {
> > struct intel_dp *intel_dp;
> > i915_reg_t reg;
> > @@ -803,7 +824,7 @@ static void intel_psr_work(struct work_struct
> > *work)
> > * PSR might take some time to get fully disabled
> > * and be ready for re-enable.
> > */
> > - if (!psr_wait_for_idle(dev_priv))
> > + if (!__psr_wait_for_idle_locked(dev_priv))
> > goto unlock;
> >
> > /*
> > --
> > 2.13.5
> >
> > ___
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
___
Intel-gfx mailing list
Re: [Intel-gfx] [PATCHv2] lib/ratelimit: Lockless ratelimiting
On Tue, Jun 26, 2018 at 8:46 PM, Dmitry Safonov wrote:
> On Tue, 2018-06-26 at 20:04 +0300, Andy Shevchenko wrote
>> > #define RATELIMIT_STATE_INIT(name, interval_init, burst_init)
>> > {\
>> > - .lock =
>> > __RAW_SPIN_LOCK_UNLOCKED(name.lock), \
>>
>> name is now redundant, isn't it?
>
> It is. Worth to split on the second patch or keep callers changes in
> this patch?
For me sounds like a part of this change, though weakly tighten to the
main purpose.
Otherwise in the middle of the series you introduce some bogus stuff
(not sure if compiler or some static analyzers would warn about it).
>> > @@ -42,9 +41,10 @@ static inline void ratelimit_state_init(struct
>> > ratelimit_state *rs,
>> > {
>> > memset(rs, 0, sizeof(*rs));
>> >
>> > - raw_spin_lock_init(>lock);
>> > rs->interval= interval;
>> > rs->burst = burst;
>> > + atomic_set(>printed, 0);
>> > + atomic_set(>missed, 0);
>>
>> Can it be
>>
>> *rs = RATELIMIT_STATE_INIT(interval, burst);
>>
>> ?
>>
>> (Yes, the '(struct ratelimit_state)' has to be added to macro to
>> allow this)
>
> Sure.
This part, by the way, potentially can be split into preparatory
patch. Please, double check if it possible to do this way.
>> > - if (rs->missed) {
>> > + if ((missed = atomic_xchg(>missed, 0)))
>>
>> Perhaps
>>
>> missed = ...
>> if (missed)
>>
>> ?
>
> Ok, will change - checkpatch has warned me, but I thought it's just a
> preference than a rule.
In general, yes and no. In this case it would increase readability and
assignment inside conditionals is not the best practice.
>> Instead of casting, perhaps
>>
>> int missed = ...
>>
>> I think you already has a guard against going it below zero. Or I
>> missed something?
>
> No, I do:
> atomic_add_unless(>missed, 1, -1);
>
> So, it's guard against overflow, but not against negative.
> That's why I do print it as unsigned.
Hmm...
If you increment the variable, it would become 2^n, then 2^n + 1, ...
which in unsigned form quite far from -1.
So, this check is against revolving the value.
Otherwise you are using atomic_t as unsigned type indeed.
But in case of use you assign signed to unsigned which would not
overflow, so, the casting is superfluous.
(and I would rather go with unsigned int type instead of unsigned if
it fits style of the module)
--
With Best Regards,
Andy Shevchenko
___
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Second attempt at fixing the fb-helper .best_encoder() mess
== Series Details == Series: drm: Second attempt at fixing the fb-helper .best_encoder() mess URL : https://patchwork.freedesktop.org/series/45422/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4381 -> Patchwork_9428 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/45422/revisions/1/mbox/ == Changes == No changes found == Participating hosts (44 -> 39) == Missing(5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u == Build changes == * Linux: CI_DRM_4381 -> Patchwork_9428 CI_DRM_4381: ed0d219201c3fd3eb430b712d6ceb51b423daefc @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9428: 03e3457fbf755417391ae680b5ad5e2f7fced9b3 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 03e3457fbf75 drm/tilcdc: Use drm_for_each_connector_encoder_ids() d955c57fd754 drm/radeon: Use drm_for_each_connector_encoder_ids() f1b7ac77b2fc drm/nouveau: Use drm_for_each_connector_encoder_ids() 5665f4e07eb7 drm/msm: Use drm_for_each_connector_encoder_ids() 80d66565fb4e drm/amdgpu: Use drm_for_each_connector_encoder_ids() 111eeb2a13e6 drm: Add drm_for_each_connector_encoder_ids() b75ca3e84ab2 drm/i915: Nuke intel_mst_best_encoder() eebb696c2139 drm/fb-helper: Eliminate the .best_encoder() usage == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9428/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915/icp: Add Interrupt Support
From: Zanoni, Paulo R
Sent: Monday, June 25, 2018 4:17 PM
To: Srivatsa, Anusha; intel-gfx@lists.freedesktop.org
Cc: Pandiyan, Dhinakaran
Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915/icp: Add Interrupt Support
Em Qua, 2018-06-20 às 14:36 -0700, Anusha Srivatsa escreveu:
> This patch addresses Interrupts from south display engine (SDE).
>
> ICP has two registers - SHOTPLUG_CTL_DDI and SHOTPLUG_CTL_TC.
> Introduce these registers and their intended values.
>
> Introduce icp_irq_handler().
>
> v2:
> - remove redundant register defines.(Lucas)
> - Change register names to be more consistent with
> previous platforms (Lucas)
>
> Cc: Lucas De Marchi
> Cc: Paulo Zanoni
> Cc: Dhinakaran Pandiyan
> Cc: Ville Syrjala
> Signed-off-by: Anusha Srivatsa
> [Paulo: coding style bikesheds and rebases].
> Signed-off-by: Paulo Zanoni
> ---
> drivers/gpu/drm/i915/i915_irq.c | 134
> +++-
> drivers/gpu/drm/i915/i915_reg.h | 40
> 2 files changed, 172 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c
> b/drivers/gpu/drm/i915/i915_irq.c
> index 46aaef5..7a7c4a2 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -122,6 +122,15 @@ static const u32 hpd_gen11[HPD_NUM_PINS] = {
> [HPD_PORT_F] = GEN11_TC4_HOTPLUG | GEN11_TBT4_HOTPLUG
> };
>
> +static const u32 hpd_icp[HPD_NUM_PINS] = {
> + [HPD_PORT_A] = SDE_DDIA_HOTPLUG_ICP,
> + [HPD_PORT_B] = SDE_DDIB_HOTPLUG_ICP,
> + [HPD_PORT_C] = SDE_TC1_HOTPLUG_ICP,
> + [HPD_PORT_D] = SDE_TC2_HOTPLUG_ICP,
> + [HPD_PORT_E] = SDE_TC3_HOTPLUG_ICP,
> + [HPD_PORT_F] = SDE_TC4_HOTPLUG_ICP
> +};
> +
> /* IIR can theoretically queue up two events. Be paranoid. */
> #define GEN8_IRQ_RESET_NDX(type, which) do { \
> I915_WRITE(GEN8_##type##_IMR(which), 0x); \
> @@ -1586,6 +1595,34 @@ static bool bxt_port_hotplug_long_detect(enum
> port port, u32 val)
> }
> }
>
> +static bool icp_ddi_port_hotplug_long_detect(enum port port, u32
> val)
> +{
> + switch (port) {
> + case PORT_A:
> + return val & ICP_DDIA_HPD_LONG_DETECT;
> + case PORT_B:
> + return val & ICP_DDIB_HPD_LONG_DETECT;
> + default:
> + return false;
> + }
> +}
> +
> +static bool icp_tc_port_hotplug_long_detect(enum port port, u32 val)
> +{
> + switch (port) {
> + case PORT_C:
> + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC1);
> + case PORT_D:
> + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC2);
> + case PORT_E:
> + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC3);
> + case PORT_F:
> + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC4);
> + default:
> + return false;
> + }
> +}
> +
> static bool spt_port_hotplug2_long_detect(enum port port, u32 val)
> {
> switch (port) {
> @@ -2385,6 +2422,43 @@ static void cpt_irq_handler(struct
> drm_i915_private *dev_priv, u32 pch_iir)
> cpt_serr_int_handler(dev_priv);
> }
>
> +static void icp_irq_handler(struct drm_i915_private *dev_priv, u32
> pch_iir)
> +{
> + u32 ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP;
> + u32 tc_hotplug_trigger = pch_iir & SDE_TC_MASK_ICP;
> + u32 pin_mask = 0, long_mask = 0;
> +
> + if (ddi_hotplug_trigger) {
> + u32 dig_hotplug_reg;
> +
> + dig_hotplug_reg = I915_READ(SHOTPLUG_CTL_DDI);
> + I915_WRITE(SHOTPLUG_CTL_DDI, dig_hotplug_reg);
> +
> + intel_get_hpd_pins(dev_priv, _mask, _mask,
> +ddi_hotplug_trigger,
> +dig_hotplug_reg, hpd_icp,
> +icp_ddi_port_hotplug_long_detect)
> ;
> + }
> +
> + if (tc_hotplug_trigger) {
> + u32 dig_hotplug_reg;
> +
> + dig_hotplug_reg = I915_READ(SHOTPLUG_CTL_TC);
> + I915_WRITE(SHOTPLUG_CTL_TC, dig_hotplug_reg);
> +
> + intel_get_hpd_pins(dev_priv, _mask, _mask,
> +tc_hotplug_trigger,
> +dig_hotplug_reg, hpd_icp,
> +icp_tc_port_hotplug_long_detect);
> + }
> +
> + if (pin_mask)
> + intel_hpd_irq_handler(dev_priv, pin_mask,
> long_mask);
> +
> + if (pch_iir & SDE_GMBUS_ICP)
> + gmbus_irq_handler(dev_priv);
> +}
> +
> static void spt_irq_handler(struct drm_i915_private *dev_priv, u32
> pch_iir)
> {
> u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_SPT &
> @@ -2804,8 +2878,11 @@ gen8_de_irq_handler(struct drm_i915_private
> *dev_priv, u32 master_ctl)
> I915_WRITE(SDEIIR, iir);
> ret = IRQ_HANDLED;
>
> - if (HAS_PCH_SPT(dev_priv) ||
> HAS_PCH_KBP(dev_priv) ||
> - HAS_PCH_CNP(dev_priv))
> + if (HAS_PCH_ICP(dev_priv))
> +
[Intel-gfx] ✓ Fi.CI.IGT: success for lib/ratelimit: Lockless ratelimiting
== Series Details == Series: lib/ratelimit: Lockless ratelimiting URL : https://patchwork.freedesktop.org/series/45416/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4380_full -> Patchwork_9426_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_9426_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_9426_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_9426_full: === IGT changes === Warnings igt@gem_exec_schedule@deep-bsd2: shard-kbl: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_9426_full that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_gtt: shard-apl: PASS -> FAIL (fdo#105347) igt@drv_suspend@shrink: shard-glk: PASS -> FAIL (fdo#106886) igt@gem_softpin@noreloc-s3: shard-kbl: PASS -> INCOMPLETE (fdo#103665) igt@kms_atomic_transition@1x-modeset-transitions-nonblocking: shard-glk: PASS -> FAIL (fdo#105703) igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic: shard-hsw: PASS -> FAIL (fdo#105767) igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size: shard-hsw: PASS -> FAIL (fdo#103355) igt@kms_cursor_legacy@cursor-vs-flip-toggle: shard-kbl: PASS -> FAIL (fdo#103355) igt@kms_flip_tiling@flip-x-tiled: shard-glk: PASS -> FAIL (fdo#103822, fdo#104724) igt@perf@blocking: shard-hsw: PASS -> FAIL (fdo#102252) Possible fixes igt@drv_selftest@live_hangcheck: shard-kbl: DMESG-FAIL (fdo#106947, fdo#106560) -> PASS igt@kms_flip@plain-flip-ts-check-interruptible: shard-glk: FAIL (fdo#100368) -> PASS igt@kms_flip_tiling@flip-to-x-tiled: shard-glk: FAIL (fdo#103822, fdo#104724) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 fdo#103355 https://bugs.freedesktop.org/show_bug.cgi?id=103355 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822 fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724 fdo#105347 https://bugs.freedesktop.org/show_bug.cgi?id=105347 fdo#105703 https://bugs.freedesktop.org/show_bug.cgi?id=105703 fdo#105767 https://bugs.freedesktop.org/show_bug.cgi?id=105767 fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560 fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886 fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4380 -> Patchwork_9426 CI_DRM_4380: e69a5560b14d9c7377744267ffd9963f06734f38 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9426: a8dce76165a9eb3723ba64d789077c655f91c47f @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9426/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Second attempt at fixing the fb-helper .best_encoder() mess
== Series Details == Series: drm: Second attempt at fixing the fb-helper .best_encoder() mess URL : https://patchwork.freedesktop.org/series/45422/ State : warning == Summary == $ dim checkpatch origin/drm-tip eebb696c2139 drm/fb-helper: Eliminate the .best_encoder() usage b75ca3e84ab2 drm/i915: Nuke intel_mst_best_encoder() 111eeb2a13e6 drm: Add drm_for_each_connector_encoder_ids() -:131: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'connector' - possible side-effects? #131: FILE: include/drm/drm_connector.h:1202: +#define drm_for_each_connector_encoder_ids(connector, encoder_id, __i) \ + for ((__i) = 0; (__i) < ARRAY_SIZE((connector)->encoder_ids) && \ +(connector)->encoder_ids[(__i)] != 0; (__i)++) \ + for_each_if((encoder_id) = (connector)->encoder_ids[(__i)]) -:131: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects? #131: FILE: include/drm/drm_connector.h:1202: +#define drm_for_each_connector_encoder_ids(connector, encoder_id, __i) \ + for ((__i) = 0; (__i) < ARRAY_SIZE((connector)->encoder_ids) && \ +(connector)->encoder_ids[(__i)] != 0; (__i)++) \ + for_each_if((encoder_id) = (connector)->encoder_ids[(__i)]) total: 0 errors, 0 warnings, 2 checks, 97 lines checked 80d66565fb4e drm/amdgpu: Use drm_for_each_connector_encoder_ids() 5665f4e07eb7 drm/msm: Use drm_for_each_connector_encoder_ids() f1b7ac77b2fc drm/nouveau: Use drm_for_each_connector_encoder_ids() d955c57fd754 drm/radeon: Use drm_for_each_connector_encoder_ids() 03e3457fbf75 drm/tilcdc: Use drm_for_each_connector_encoder_ids() ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for Makefile: globally enable VLA warning
== Series Details == Series: Makefile: globally enable VLA warning URL : https://patchwork.freedesktop.org/series/45421/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4381 -> Patchwork_9427 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/45421/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_9427 that come from known issues: === IGT changes === Issues hit igt@gem_exec_gttfill@basic: fi-byt-n2820: PASS -> FAIL (fdo#106744) igt@kms_flip@basic-flip-vs-wf_vblank: fi-glk-dsi: PASS -> FAIL (fdo#100368) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: fi-bxt-dsi: PASS -> INCOMPLETE (fdo#103927) fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#106744 https://bugs.freedesktop.org/show_bug.cgi?id=106744 == Participating hosts (44 -> 39) == Missing(5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u == Build changes == * Linux: CI_DRM_4381 -> Patchwork_9427 CI_DRM_4381: ed0d219201c3fd3eb430b712d6ceb51b423daefc @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9427: e40c09ebdd8985f81970f02ada37dc18072c44ee @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == e40c09ebdd89 Makefile: globally enable VLA warning == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9427/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Makefile: globally enable VLA warning
== Series Details == Series: Makefile: globally enable VLA warning URL : https://patchwork.freedesktop.org/series/45421/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: Makefile: globally enable VLA warning - +drivers/gpu/drm/ati_pcigart.c:184:52:expected unsigned int [unsigned] [usertype] +drivers/gpu/drm/ati_pcigart.c:184:52:got restricted __le32 [usertype] +drivers/gpu/drm/ati_pcigart.c:184:52: warning: incorrect type in assignment (different base types) +drivers/gpu/drm/drm_atomic.c:1282:29: warning: expression using sizeof(void) +drivers/gpu/drm/drm_atomic.c:1282:29: warning: expression using sizeof(void) +drivers/gpu/drm/drm_bufs.c:213:45:expected void *handle +drivers/gpu/drm/drm_bufs.c:213:45:got void [noderef] * +drivers/gpu/drm/drm_bufs.c:213:45: warning: incorrect type in assignment (different address spaces) +drivers/gpu/drm/drm_bufs.c:216:45:expected void *handle +drivers/gpu/drm/drm_bufs.c:216:45:got void [noderef] * +drivers/gpu/drm/drm_bufs.c:216:45: warning: incorrect type in assignment (different address spaces) +drivers/gpu/drm/drm_bufs.c:331:36:expected void volatile [noderef] *addr +drivers/gpu/drm/drm_bufs.c:331:36:got void *handle +drivers/gpu/drm/drm_bufs.c:331:36: warning: incorrect type in argument 1 (different address spaces) +drivers/gpu/drm/drm_bufs.c:348:36:expected void volatile [noderef] *addr +drivers/gpu/drm/drm_bufs.c:348:36:got void *handle +drivers/gpu/drm/drm_bufs.c:348:36: warning: incorrect type in argument 1 (different address spaces) +drivers/gpu/drm/drm_bufs.c:514:28:expected void volatile [noderef] *addr +drivers/gpu/drm/drm_bufs.c:514:28:got void *handle +drivers/gpu/drm/drm_bufs.c:514:28: warning: incorrect type in argument 1 (different address spaces) +drivers/gpu/drm/drm_color_mgmt.c:127:16: warning: expression using sizeof(void) +drivers/gpu/drm/drm_color_mgmt.c:127:16: warning: expression using sizeof(void) +drivers/gpu/drm/drm_color_mgmt.c:127:16: warning: expression using sizeof(void) +drivers/gpu/drm/drm_color_mgmt.c:127:16: warning: expression using sizeof(void) +drivers/gpu/drm/drm_color_mgmt.c:127:16: warning: expression using sizeof(void) +drivers/gpu/drm/drm_color_mgmt.c:127:16: warning: expression using sizeof(void) +drivers/gpu/drm/drm_color_mgmt.c:127:16: warning: expression using sizeof(void) +drivers/gpu/drm/drm_color_mgmt.c:127:16: warning: expression using sizeof(void) +drivers/gpu/drm/drm_debugfs_crc.c:332:17:expected restricted __poll_t ( *poll )( ... ) +drivers/gpu/drm/drm_debugfs_crc.c:332:17:got unsigned int ( * )( ... ) +drivers/gpu/drm/drm_debugfs_crc.c:332:17: warning: incorrect type in initializer (different base types) +drivers/gpu/drm/drm_dp_aux_dev.c:157:32: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_aux_dev.c:199:32: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_helper.c:766:27: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_helper.c:914:36: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_helper.c:914:36: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_helper.c:914:36: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_helper.c:914:36: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_helper.c:914:36: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_helper.c:914:36: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_helper.c:914:36: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_helper.c:944:36: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_helper.c:944:36: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_mst_topology.c:1429:26: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_mst_topology.c:1429:26: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_mst_topology.c:1429:26: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_mst_topology.c:1429:26: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_mst_topology.c:1429:26: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_mst_topology.c:1429:26: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_mst_topology.c:1429:26: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_mst_topology.c:1429:26: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_mst_topology.c:1516:18: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_mst_topology.c:1516:18: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_mst_topology.c:2267:15: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_mst_topology.c:2285:23: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_mst_topology.c:2285:23: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_mst_topology.c:2285:23: warning: expression using sizeof(void) +drivers/gpu/drm/drm_dp_mst_topology.c:2285:23: warning: expression
Re: [Intel-gfx] [PATCH v3] drm/i915/ddi: Get AUX power domain for DP main link too
On Tue, Jun 26, 2018 at 10:40:26AM -0700, Paulo Zanoni wrote:
> Em Seg, 2018-06-25 às 16:55 -0700, Souza, Jose escreveu:
> > On Thu, 2018-06-21 at 21:44 +0300, Imre Deak wrote:
> > > So far we got an AUX power domain reference only for the duration
> > > of
> > > DP
> > > AUX transfers. However, the following suggests that we also need
> > > these
> > > for main link functionality:
> > > - The specification doesn't state whether it's needed or not for
> > > main
> > > link functionality, but suggests that these power wells need to
> > > be
> > > enabled already during display core initialization (Sequences to
> > > Initialize Display).
>
> No, the specification states it's needed. Page "Sequences for
> DisplayPort" (the ICL version, of course), step 1.b:
>
> "TC: Note that AUX power is required for running main link."
>
> Same for the HDMI page.
Yes, for ICL MG PHY ports (in all modes) it's clearly stated as I also
wrote it below. The above is about the ICL combo PHY ports and the other
platforms. For those the only hint is that enabling the AUX power wells
is listed as a step in the 'Sequences to Initialize Display".
>
> > > - For PSR we need to keep the AUX power well enabled.
> > > - On ICL combo PHY ports (non-TC) the AUX power well is needed for
> > > link training too: while the port is enabled with a DP link
> > > training
> > > test pattern trying to toggle the AUX power well will time out.
> > > - On ICL MG PHY ports (TC) the AUX power well is needed also for
> > > main
> > > link functionality (both in DP and HDMI modes).
> > > - Windows enables these power wells both for main and AUX lane
> > > functionality.
> > >
> > > Based on the above take an AUX power reference for main link
> > > functionality too. This makes a difference only on GEN10+ (GLK+)
> > > platforms, where we have separate port specific AUX power wells.
> > >
> > > For PSR we still need to distinguish between port A and the other
> > > ports, since on port A DC states must stay enabled for main link
> > > functionality, but DC states must be disabled for driver initiated
> > > AUX transfers. So re-use the corresponding helper from intel_psr.c.
> > >
> > > Since we take now a reference for main link functionality on all DP
> > > ports we can forgo taking the separate power ref for PSR
> > > functionality.
> > >
> > > v2:
> > > - Make sure DC states stay enabled when taking the ref on port A.
> > > (Ville)
> > >
> > > v3: (Ville)
> > > - Fix comment about logic for encoders without a crtc state and
> > > add FIXME note for a simplification to avoid calling
> > > get_power_domains
> > > in such cases.
> > > - Use intel_crtc_has_dp_encoder() instead
> > > !intel_crtc_has_type(HDMI).
> > >
> > > Cc: Ville Syrjälä
> > > Cc: Dhinakaran Pandiyan
> > > Cc: Paulo Zanoni
> > > Signed-off-by: Imre Deak
> >
> > The spec is not clear but this fix the "aux power well" enable
> > timeouts
> > that I was getting in aux B so looks like your interpretation is
> > right.
> >
> > Reviewed-by: José Roberto de Souza
> >
> > > ---
> > > drivers/gpu/drm/i915/intel_ddi.c| 54
> > > ++---
> > > drivers/gpu/drm/i915/intel_display.c| 12 +++-
> > > drivers/gpu/drm/i915/intel_drv.h| 3 +-
> > > drivers/gpu/drm/i915/intel_psr.c| 41 -
> > >
> > > drivers/gpu/drm/i915/intel_runtime_pm.c | 1 +
> > > 5 files changed, 64 insertions(+), 47 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > > b/drivers/gpu/drm/i915/intel_ddi.c
> > > index 044fe1fb9872..0319825b725b 100644
> > > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > > @@ -1983,15 +1983,55 @@ bool intel_ddi_get_hw_state(struct
> > > intel_encoder *encoder,
> > > return ret;
> > > }
> > >
> > > -static u64 intel_ddi_get_power_domains(struct intel_encoder
> > > *encoder)
> > > +static inline enum intel_display_power_domain
> > > +intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
> > > +{
> > > + /* CNL HW requires corresponding AUX IOs to be powered up
> > > for PSR with
> > > + * DC states enabled at the same time, while for driver
> > > initiated AUX
> > > + * transfers we need the same AUX IOs to be powered but
> > > with
> > > DC states
> > > + * disabled. Accordingly use the AUX power domain here
> > > which
> > > leaves DC
> > > + * states enabled.
> > > + * However, for non-A AUX ports the corresponding non-EDP
> > > transcoders
> > > + * would have already enabled power well 2 and DC_OFF.
> > > This
> > > means we can
> > > + * acquire a wider POWER_DOMAIN_AUX_{B,C,D,F} reference
> > > instead of a
> > > + * specific AUX_IO reference without powering up any extra
> > > wells.
> > > + * Note that PSR is enabled only on Port A even though
> > > this
> > > function
> > > + * returns the correct domain for other ports too.
> > > + */
> > > + return intel_dp->aux_ch == AUX_CH_A ?
> > >
Re: [Intel-gfx] [PATCH 2/2] drm/i915: Remove delayed FBC activation.
On Mon, Jun 25, 2018 at 06:37:58PM +0200, Maarten Lankhorst wrote:
> The only time we should start FBC is when we have waited a vblank
> after the atomic update.
What about front buffer tracking? Is this going to leave FBC permanently
disabled unless there are flips/plane updates?
I think there are a few cases we need to consider:
1. plane update which doesn't need fbc disable
2. plane update which needs to disable fbc but can re-enable it after the flip
has happended (eg. need to reallocate the cfb due to plane size/format
change)
3. plane update which needs to disable fbc and can't re-enable it (eg. the new
plane state no longer fbc compatible)
4. front buffer invalidate + flush
HW nuke will handle case 1. Case 2 could do the fbc re-enable after the
post-flip vblank wait. Case 3 would ideally let us move FBC to another
plane (thinking of pre-HSW hardware here). And case 4 must re-enable fbc
after the flush has happened.
> We've already forced a vblank wait by doing
> wait_for_flip_done before intel_post_plane_update(), so we don't need
> to wait a second time before enabling.
>
> Removing the worker simplifies the code and removes possible race
> conditions, like happening in 103167.
>
> Cc: Paulo Zanoni
> Cc: Rodrigo Vivi
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103167
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 5 --
> drivers/gpu/drm/i915/i915_drv.h | 6 --
> drivers/gpu/drm/i915/intel_fbc.c| 96 +
> 3 files changed, 1 insertion(+), 106 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index c400f42a54ec..48a57c0636bf 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1659,11 +1659,6 @@ static int i915_fbc_status(struct seq_file *m, void
> *unused)
> else
> seq_printf(m, "FBC disabled: %s\n", fbc->no_fbc_reason);
>
> - if (fbc->work.scheduled)
> - seq_printf(m, "FBC worker scheduled on vblank %llu, now %llu\n",
> -fbc->work.scheduled_vblank,
> -drm_crtc_vblank_count(>crtc->base));
> -
> if (intel_fbc_is_active(dev_priv)) {
> u32 mask;
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 328d4312c438..9645dcb30454 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -580,12 +580,6 @@ struct intel_fbc {
> unsigned int gen9_wa_cfb_stride;
> } params;
>
> - struct intel_fbc_work {
> - bool scheduled;
> - u64 scheduled_vblank;
> - struct work_struct work;
> - } work;
> -
> const char *no_fbc_reason;
> };
>
> diff --git a/drivers/gpu/drm/i915/intel_fbc.c
> b/drivers/gpu/drm/i915/intel_fbc.c
> index 9f9ea0b5452f..01d1d2088f04 100644
> --- a/drivers/gpu/drm/i915/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/intel_fbc.c
> @@ -399,89 +399,6 @@ bool intel_fbc_is_active(struct drm_i915_private
> *dev_priv)
> return dev_priv->fbc.active;
> }
>
> -static void intel_fbc_work_fn(struct work_struct *__work)
> -{
> - struct drm_i915_private *dev_priv =
> - container_of(__work, struct drm_i915_private, fbc.work.work);
> - struct intel_fbc *fbc = _priv->fbc;
> - struct intel_fbc_work *work = >work;
> - struct intel_crtc *crtc = fbc->crtc;
> - struct drm_vblank_crtc *vblank = _priv->drm.vblank[crtc->pipe];
> -
> - if (drm_crtc_vblank_get(>base)) {
> - /* CRTC is now off, leave FBC deactivated */
> - mutex_lock(>lock);
> - work->scheduled = false;
> - mutex_unlock(>lock);
> - return;
> - }
> -
> -retry:
> - /* Delay the actual enabling to let pageflipping cease and the
> - * display to settle before starting the compression. Note that
> - * this delay also serves a second purpose: it allows for a
> - * vblank to pass after disabling the FBC before we attempt
> - * to modify the control registers.
> - *
> - * WaFbcWaitForVBlankBeforeEnable:ilk,snb
> - *
> - * It is also worth mentioning that since work->scheduled_vblank can be
> - * updated multiple times by the other threads, hitting the timeout is
> - * not an error condition. We'll just end up hitting the "goto retry"
> - * case below.
> - */
> - wait_event_timeout(vblank->queue,
> - drm_crtc_vblank_count(>base) != work->scheduled_vblank,
> - msecs_to_jiffies(50));
> -
> - mutex_lock(>lock);
> -
> - /* Were we cancelled? */
> - if (!work->scheduled)
> - goto out;
> -
> - /* Were we delayed again while this function was sleeping? */
> - if (drm_crtc_vblank_count(>base) == work->scheduled_vblank) {
> - mutex_unlock(>lock);
> - goto retry;
> - }
> -
Re: [Intel-gfx] [PATCH 1/8] drm/fb-helper: Eliminate the .best_encoder() usage
On Tue, Jun 26, 2018 at 1:47 PM, Ville Syrjala
wrote:
> From: Ville Syrjälä
>
> Instead of using the .best_encoder() hook to figure out whether a given
> connector+crtc combo will work, let's instead do what userspace does and
> just iterate over all the encoders for the connector, and then check
> each crtc against each encoder's possible_crtcs bitmask.
>
> Cc: Dhinakaran Pandiyan
> Cc: Harry Wentland
> Cc: Daniel Vetter
> Acked-by: Daniel Vetter
> Suggested-by: Daniel Vetter
> Signed-off-by: Ville Syrjälä
Series is:
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/drm_fb_helper.c | 36 +++-
> 1 file changed, 19 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
> index cab14f253384..61c39cd75a27 100644
> --- a/drivers/gpu/drm/drm_fb_helper.c
> +++ b/drivers/gpu/drm/drm_fb_helper.c
> @@ -2323,6 +2323,23 @@ static bool drm_target_preferred(struct drm_fb_helper
> *fb_helper,
> return true;
> }
>
> +static bool connector_crtc_ok(struct drm_connector *connector,
> + struct drm_crtc *crtc)
> +{
> + int i;
> +
> + for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
> + struct drm_encoder *encoder =
> + drm_encoder_find(connector->dev, NULL,
> +connector->encoder_ids[i]);
> +
> + if (encoder->possible_crtcs & drm_crtc_mask(crtc))
> + return true;
> + }
> +
> + return false;
> +}
> +
> static int drm_pick_crtcs(struct drm_fb_helper *fb_helper,
> struct drm_fb_helper_crtc **best_crtcs,
> struct drm_display_mode **modes,
> @@ -2331,7 +2348,6 @@ static int drm_pick_crtcs(struct drm_fb_helper
> *fb_helper,
> int c, o;
> struct drm_connector *connector;
> const struct drm_connector_helper_funcs *connector_funcs;
> - struct drm_encoder *encoder;
> int my_score, best_score, score;
> struct drm_fb_helper_crtc **crtcs, *crtc;
> struct drm_fb_helper_connector *fb_helper_conn;
> @@ -2362,20 +2378,6 @@ static int drm_pick_crtcs(struct drm_fb_helper
> *fb_helper,
>
> connector_funcs = connector->helper_private;
>
> - /*
> -* If the DRM device implements atomic hooks and ->best_encoder() is
> -* NULL we fallback to the default drm_atomic_helper_best_encoder()
> -* helper.
> -*/
> - if (drm_drv_uses_atomic_modeset(fb_helper->dev) &&
> - !connector_funcs->best_encoder)
> - encoder = drm_atomic_helper_best_encoder(connector);
> - else
> - encoder = connector_funcs->best_encoder(connector);
> -
> - if (!encoder)
> - goto out;
> -
> /*
> * select a crtc for this connector and then attempt to configure
> * remaining connectors
> @@ -2383,7 +2385,7 @@ static int drm_pick_crtcs(struct drm_fb_helper
> *fb_helper,
> for (c = 0; c < fb_helper->crtc_count; c++) {
> crtc = _helper->crtc_info[c];
>
> - if ((encoder->possible_crtcs & (1 << c)) == 0)
> + if (!connector_crtc_ok(connector, crtc->mode_set.crtc))
> continue;
>
> for (o = 0; o < n; o++)
> @@ -2410,7 +2412,7 @@ static int drm_pick_crtcs(struct drm_fb_helper
> *fb_helper,
>sizeof(struct drm_fb_helper_crtc *));
> }
> }
> -out:
> +
> kfree(crtcs);
> return best_score;
> }
> --
> 2.16.4
>
> ___
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[Intel-gfx] [PATCH 8/8] drm/tilcdc: Use drm_for_each_connector_encoder_ids()
From: Ville Syrjälä
Use drm_for_each_connector_encoder_ids() for iterating
connector->encoder_ids[]. A bit more convenient not having
to deal with the implementation details.
Cc: Jyri Sarha
Cc: Tomi Valkeinen
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/tilcdc/tilcdc_external.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_external.c
b/drivers/gpu/drm/tilcdc/tilcdc_external.c
index d651bdd6597e..ed8af21e75b0 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_external.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_external.c
@@ -103,11 +103,12 @@ struct drm_connector
*tilcdc_encoder_find_connector(struct drm_device *ddev,
struct drm_encoder *encoder)
{
struct drm_connector *connector;
+ u32 encoder_id;
int i;
list_for_each_entry(connector, >mode_config.connector_list, head)
- for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++)
- if (connector->encoder_ids[i] == encoder->base.id)
+ drm_for_each_connector_encoder_ids(connector, encoder_id, i)
+ if (encoder_id == encoder->base.id)
return connector;
dev_err(ddev->dev, "No connector found for %s encoder (id %d)\n",
--
2.16.4
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[Intel-gfx] [PATCH 6/8] drm/nouveau: Use drm_for_each_connector_encoder_ids()
From: Ville Syrjälä
Use drm_for_each_connector_encoder_ids() for iterating
connector->encoder_ids[]. A bit more convenient not having
to deal with the implementation details.
Cc: Ben Skeggs
Cc: nouv...@lists.freedesktop.org
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/nouveau/nouveau_connector.c | 20 +++-
1 file changed, 7 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c
b/drivers/gpu/drm/nouveau/nouveau_connector.c
index 7b557c354307..ea12fbbea92e 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.c
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.c
@@ -366,14 +366,11 @@ find_encoder(struct drm_connector *connector, int type)
struct drm_device *dev = connector->dev;
struct nouveau_encoder *nv_encoder;
struct drm_encoder *enc;
- int i, id;
+ u32 encoder_id;
+ int i;
- for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
- id = connector->encoder_ids[i];
- if (!id)
- break;
-
- enc = drm_encoder_find(dev, NULL, id);
+ drm_for_each_connector_encoder_ids(connector, encoder_id, i) {
+ enc = drm_encoder_find(dev, NULL, encoder_id);
if (!enc)
continue;
nv_encoder = nouveau_encoder(enc);
@@ -423,6 +420,7 @@ nouveau_connector_ddc_detect(struct drm_connector
*connector)
struct nouveau_encoder *nv_encoder;
struct drm_encoder *encoder;
int i, panel = -ENODEV;
+ u32 encoder_id;
/* eDP panels need powering on by us (if the VBIOS doesn't default it
* to on) before doing any AUX channel transactions. LVDS panel power
@@ -436,12 +434,8 @@ nouveau_connector_ddc_detect(struct drm_connector
*connector)
}
}
- for (i = 0; nv_encoder = NULL, i < DRM_CONNECTOR_MAX_ENCODER; i++) {
- int id = connector->encoder_ids[i];
- if (id == 0)
- break;
-
- encoder = drm_encoder_find(dev, NULL, id);
+ drm_for_each_connector_encoder_ids(connector, encoder_id, i) {
+ encoder = drm_encoder_find(dev, NULL, encoder_id);
if (!encoder)
continue;
nv_encoder = nouveau_encoder(encoder);
--
2.16.4
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[Intel-gfx] [PATCH 7/8] drm/radeon: Use drm_for_each_connector_encoder_ids()
From: Ville Syrjälä
Use drm_for_each_connector_encoder_ids() for iterating
connector->encoder_ids[]. A bit more convenient not having
to deal with the implementation details.
Cc: Alex Deucher
Cc: "Christian König"
Cc: "David (ChunMing) Zhou"
Cc: Harry Wentland
Cc: amd-...@lists.freedesktop.org
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/radeon/radeon_connectors.c | 63 --
1 file changed, 26 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/radeon/radeon_connectors.c
index 2aea2bdff99b..7fc7e72a075f 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -248,16 +248,13 @@ radeon_connector_update_scratch_regs(struct drm_connector
*connector, enum drm_c
struct drm_encoder *encoder = NULL;
const struct drm_connector_helper_funcs *connector_funcs =
connector->helper_private;
bool connected;
+ u32 encoder_id;
int i;
best_encoder = connector_funcs->best_encoder(connector);
- for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
- if (connector->encoder_ids[i] == 0)
- break;
-
- encoder = drm_encoder_find(connector->dev, NULL,
- connector->encoder_ids[i]);
+ drm_for_each_connector_encoder_ids(connector, encoder_id, i) {
+ encoder = drm_encoder_find(connector->dev, NULL, encoder_id);
if (!encoder)
continue;
@@ -277,13 +274,11 @@ radeon_connector_update_scratch_regs(struct drm_connector
*connector, enum drm_c
static struct drm_encoder *radeon_find_encoder(struct drm_connector
*connector, int encoder_type)
{
struct drm_encoder *encoder;
+ u32 encoder_id;
int i;
- for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
- if (connector->encoder_ids[i] == 0)
- break;
-
- encoder = drm_encoder_find(connector->dev, NULL,
connector->encoder_ids[i]);
+ drm_for_each_connector_encoder_ids(connector, encoder_id, i) {
+ encoder = drm_encoder_find(connector->dev, NULL, encoder_id);
if (!encoder)
continue;
@@ -436,6 +431,7 @@ radeon_connector_analog_encoder_conflict_solve(struct
drm_connector *connector,
struct drm_device *dev = connector->dev;
struct drm_connector *conflict;
struct radeon_connector *radeon_conflict;
+ u32 encoder_id;
int i;
list_for_each_entry(conflict, >mode_config.connector_list, head) {
@@ -443,12 +439,10 @@ radeon_connector_analog_encoder_conflict_solve(struct
drm_connector *connector,
continue;
radeon_conflict = to_radeon_connector(conflict);
- for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
- if (conflict->encoder_ids[i] == 0)
- break;
+ drm_for_each_connector_encoder_ids(conflict, encoder_id, i) {
/* if the IDs match */
- if (conflict->encoder_ids[i] == encoder->base.id) {
+ if (encoder_id == encoder->base.id) {
if (conflict->status !=
connector_status_connected)
continue;
@@ -1256,7 +1250,7 @@ radeon_dvi_detect(struct drm_connector *connector, bool
force)
struct radeon_connector *radeon_connector =
to_radeon_connector(connector);
struct drm_encoder *encoder = NULL;
const struct drm_encoder_helper_funcs *encoder_funcs;
- int i, r;
+ int r;
enum drm_connector_status ret = connector_status_disconnected;
bool dret = false, broken_edid = false;
@@ -1374,12 +1368,12 @@ radeon_dvi_detect(struct drm_connector *connector, bool
force)
/* find analog encoder */
if (radeon_connector->dac_load_detect) {
- for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
- if (connector->encoder_ids[i] == 0)
- break;
+ u32 encoder_id;
+ int i;
+ drm_for_each_connector_encoder_ids(connector, encoder_id, i) {
encoder = drm_encoder_find(connector->dev, NULL,
- connector->encoder_ids[i]);
+ encoder_id);
if (!encoder)
continue;
@@ -1458,15 +1452,13 @@ radeon_dvi_detect(struct drm_connector *connector, bool
force)
/* okay need to be smart in here about which encoder to pick */
static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
{
- int enc_id = connector->encoder_ids[0];
struct radeon_connector *radeon_connector =
[Intel-gfx] [PATCH 2/8] drm/i915: Nuke intel_mst_best_encoder()
From: Ville Syrjälä
With the fb-helper no longer relying on the non-atomic .best_encoder()
we can eliminate the hook from the MST encoder.
Cc: Dhinakaran Pandiyan
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_dp_mst.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
b/drivers/gpu/drm/i915/intel_dp_mst.c
index 5890500a3a8b..0f012fbe34eb 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -403,20 +403,10 @@ static struct drm_encoder
*intel_mst_atomic_best_encoder(struct drm_connector *c
return _dp->mst_encoders[crtc->pipe]->base.base;
}
-static struct drm_encoder *intel_mst_best_encoder(struct drm_connector
*connector)
-{
- struct intel_connector *intel_connector = to_intel_connector(connector);
- struct intel_dp *intel_dp = intel_connector->mst_port;
- if (!intel_dp)
- return NULL;
- return _dp->mst_encoders[0]->base.base;
-}
-
static const struct drm_connector_helper_funcs
intel_dp_mst_connector_helper_funcs = {
.get_modes = intel_dp_mst_get_modes,
.mode_valid = intel_dp_mst_mode_valid,
.atomic_best_encoder = intel_mst_atomic_best_encoder,
- .best_encoder = intel_mst_best_encoder,
.atomic_check = intel_dp_mst_atomic_check,
};
--
2.16.4
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[Intel-gfx] [PATCH 5/8] drm/msm: Use drm_for_each_connector_encoder_ids()
From: Ville Syrjälä
Use drm_for_each_connector_encoder_ids() for iterating
connector->encoder_ids[]. A bit more convenient not having
to deal with the implementation details.
Cc: Rob Clark
Cc: linux-arm-...@vger.kernel.org
Cc: freedr...@lists.freedesktop.org
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/msm/dsi/dsi_manager.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_manager.c
b/drivers/gpu/drm/msm/dsi/dsi_manager.c
index 4cb1cb68878b..26337be9a1ec 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_manager.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c
@@ -751,10 +751,11 @@ struct drm_connector *msm_dsi_manager_ext_bridge_init(u8
id)
connector_list = >mode_config.connector_list;
list_for_each_entry(connector, connector_list, head) {
+ u32 encoder_id;
int i;
- for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
- if (connector->encoder_ids[i] == encoder->base.id)
+ drm_for_each_connector_encoder_ids(connector, encoder_id, i) {
+ if (encoder_id == encoder->base.id)
return connector;
}
}
--
2.16.4
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[Intel-gfx] [PATCH 4/8] drm/amdgpu: Use drm_for_each_connector_encoder_ids()
From: Ville Syrjälä
Use drm_for_each_connector_encoder_ids() for iterating
connector->encoder_ids[]. A bit more convenient not having
to deal with the implementation details.
Cc: Alex Deucher
Cc: "Christian König"
Cc: "David (ChunMing) Zhou"
Cc: Harry Wentland
Cc: amd-...@lists.freedesktop.org
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c | 51 ++
drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 15
2 files changed, 27 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
index 8e66851eb427..dcbe45f6d941 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
@@ -216,16 +216,13 @@ amdgpu_connector_update_scratch_regs(struct drm_connector
*connector,
struct drm_encoder *encoder = NULL;
const struct drm_connector_helper_funcs *connector_funcs =
connector->helper_private;
bool connected;
+ u32 encoder_id;
int i;
best_encoder = connector_funcs->best_encoder(connector);
- for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
- if (connector->encoder_ids[i] == 0)
- break;
-
- encoder = drm_encoder_find(connector->dev, NULL,
- connector->encoder_ids[i]);
+ drm_for_each_connector_encoder_ids(connector, encoder_id, i) {
+ encoder = drm_encoder_find(connector->dev, NULL, encoder_id);
if (!encoder)
continue;
@@ -244,13 +241,11 @@ amdgpu_connector_find_encoder(struct drm_connector
*connector,
int encoder_type)
{
struct drm_encoder *encoder;
+ u32 encoder_id;
int i;
- for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
- if (connector->encoder_ids[i] == 0)
- break;
- encoder = drm_encoder_find(connector->dev, NULL,
- connector->encoder_ids[i]);
+ drm_for_each_connector_encoder_ids(connector, encoder_id, i) {
+ encoder = drm_encoder_find(connector->dev, NULL, encoder_id);
if (!encoder)
continue;
@@ -987,7 +982,7 @@ amdgpu_connector_dvi_detect(struct drm_connector
*connector, bool force)
struct amdgpu_connector *amdgpu_connector =
to_amdgpu_connector(connector);
struct drm_encoder *encoder = NULL;
const struct drm_encoder_helper_funcs *encoder_funcs;
- int i, r;
+ int r;
enum drm_connector_status ret = connector_status_disconnected;
bool dret = false, broken_edid = false;
@@ -1077,11 +1072,11 @@ amdgpu_connector_dvi_detect(struct drm_connector
*connector, bool force)
/* find analog encoder */
if (amdgpu_connector->dac_load_detect) {
- for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
- if (connector->encoder_ids[i] == 0)
- break;
+ u32 encoder_id;
+ int i;
- encoder = drm_encoder_find(connector->dev, NULL,
connector->encoder_ids[i]);
+ drm_for_each_connector_encoder_ids(connector, encoder_id, i) {
+ encoder = drm_encoder_find(connector->dev, NULL,
encoder_id);
if (!encoder)
continue;
@@ -1135,12 +1130,11 @@ amdgpu_connector_dvi_encoder(struct drm_connector
*connector)
int enc_id = connector->encoder_ids[0];
struct amdgpu_connector *amdgpu_connector =
to_amdgpu_connector(connector);
struct drm_encoder *encoder;
+ u32 encoder_id;
int i;
- for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
- if (connector->encoder_ids[i] == 0)
- break;
- encoder = drm_encoder_find(connector->dev, NULL,
connector->encoder_ids[i]);
+ drm_for_each_connector_encoder_ids(connector, encoder_id, i) {
+ encoder = drm_encoder_find(connector->dev, NULL, encoder_id);
if (!encoder)
continue;
@@ -1294,14 +1288,11 @@ u16
amdgpu_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *conn
{
struct drm_encoder *encoder;
struct amdgpu_encoder *amdgpu_encoder;
+ u32 encoder_id;
int i;
- for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
- if (connector->encoder_ids[i] == 0)
- break;
-
- encoder = drm_encoder_find(connector->dev, NULL,
- connector->encoder_ids[i]);
+ drm_for_each_connector_encoder_ids(connector, encoder_id, i) {
+ encoder = drm_encoder_find(connector->dev, NULL, encoder_id);
if (!encoder)
[Intel-gfx] [PATCH 3/8] drm: Add drm_for_each_connector_encoder_ids()
From: Ville Syrjälä
Add a convenience macro for iterating connector->encoder_ids[].
Isolates the users from the implementation details.
Also use ARRAY_SIZE() when populating the array to avoid spreading
knowledge about the array size all over.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_connector.c| 22 ++
drivers/gpu/drm/drm_fb_helper.c| 6 +++---
drivers/gpu/drm/drm_probe_helper.c | 9 +
include/drm/drm_connector.h| 11 +++
4 files changed, 29 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index 2f9ebddd178e..c43646cb8145 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -321,7 +321,7 @@ int drm_mode_connector_attach_encoder(struct drm_connector
*connector,
if (WARN_ON(connector->encoder))
return -EINVAL;
- for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
+ for (i = 0; i < ARRAY_SIZE(connector->encoder_ids); i++) {
if (connector->encoder_ids[i] == 0) {
connector->encoder_ids[i] = encoder->base.id;
return 0;
@@ -1693,6 +1693,7 @@ int drm_mode_getconnector(struct drm_device *dev, void
*data,
int encoders_count = 0;
int ret = 0;
int copied = 0;
+ u32 encoder_id;
int i;
struct drm_mode_modeinfo u_mode;
struct drm_mode_modeinfo __user *mode_ptr;
@@ -1708,22 +1709,19 @@ int drm_mode_getconnector(struct drm_device *dev, void
*data,
if (!connector)
return -ENOENT;
- for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++)
- if (connector->encoder_ids[i] != 0)
- encoders_count++;
+ drm_for_each_connector_encoder_ids(connector, encoder_id, i)
+ encoders_count++;
if ((out_resp->count_encoders >= encoders_count) && encoders_count) {
copied = 0;
encoder_ptr = (uint32_t __user *)(unsigned
long)(out_resp->encoders_ptr);
- for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
- if (connector->encoder_ids[i] != 0) {
- if (put_user(connector->encoder_ids[i],
-encoder_ptr + copied)) {
- ret = -EFAULT;
- goto out;
- }
- copied++;
+
+ drm_for_each_connector_encoder_ids(connector, encoder_id, i) {
+ if (put_user(encoder_id, encoder_ptr + copied)) {
+ ret = -EFAULT;
+ goto out;
}
+ copied++;
}
}
out_resp->count_encoders = encoders_count;
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 61c39cd75a27..e086b08748f4 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -2326,12 +2326,12 @@ static bool drm_target_preferred(struct drm_fb_helper
*fb_helper,
static bool connector_crtc_ok(struct drm_connector *connector,
struct drm_crtc *crtc)
{
+ u32 encoder_id;
int i;
- for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
+ drm_for_each_connector_encoder_ids(connector, encoder_id, i) {
struct drm_encoder *encoder =
- drm_encoder_find(connector->dev, NULL,
-connector->encoder_ids[i]);
+ drm_encoder_find(connector->dev, NULL, encoder_id);
if (encoder->possible_crtcs & drm_crtc_mask(crtc))
return true;
diff --git a/drivers/gpu/drm/drm_probe_helper.c
b/drivers/gpu/drm/drm_probe_helper.c
index 527743394150..0239f76c52fb 100644
--- a/drivers/gpu/drm/drm_probe_helper.c
+++ b/drivers/gpu/drm/drm_probe_helper.c
@@ -88,9 +88,9 @@ drm_mode_validate_pipeline(struct drm_display_mode *mode,
struct drm_connector *connector)
{
struct drm_device *dev = connector->dev;
- uint32_t *ids = connector->encoder_ids;
enum drm_mode_status ret = MODE_OK;
- unsigned int i;
+ u32 encoder_id;
+ int i;
/* Step 1: Validate against connector */
ret = drm_connector_mode_valid(connector, mode);
@@ -98,8 +98,9 @@ drm_mode_validate_pipeline(struct drm_display_mode *mode,
return ret;
/* Step 2: Validate against encoders and crtcs */
- for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
- struct drm_encoder *encoder = drm_encoder_find(dev, NULL,
ids[i]);
+ drm_for_each_connector_encoder_ids(connector, encoder_id, i) {
+ struct drm_encoder *encoder =
+ drm_encoder_find(dev, NULL,
[Intel-gfx] [PATCH 1/8] drm/fb-helper: Eliminate the .best_encoder() usage
From: Ville Syrjälä
Instead of using the .best_encoder() hook to figure out whether a given
connector+crtc combo will work, let's instead do what userspace does and
just iterate over all the encoders for the connector, and then check
each crtc against each encoder's possible_crtcs bitmask.
Cc: Dhinakaran Pandiyan
Cc: Harry Wentland
Cc: Daniel Vetter
Acked-by: Daniel Vetter
Suggested-by: Daniel Vetter
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_fb_helper.c | 36 +++-
1 file changed, 19 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index cab14f253384..61c39cd75a27 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -2323,6 +2323,23 @@ static bool drm_target_preferred(struct drm_fb_helper
*fb_helper,
return true;
}
+static bool connector_crtc_ok(struct drm_connector *connector,
+ struct drm_crtc *crtc)
+{
+ int i;
+
+ for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
+ struct drm_encoder *encoder =
+ drm_encoder_find(connector->dev, NULL,
+connector->encoder_ids[i]);
+
+ if (encoder->possible_crtcs & drm_crtc_mask(crtc))
+ return true;
+ }
+
+ return false;
+}
+
static int drm_pick_crtcs(struct drm_fb_helper *fb_helper,
struct drm_fb_helper_crtc **best_crtcs,
struct drm_display_mode **modes,
@@ -2331,7 +2348,6 @@ static int drm_pick_crtcs(struct drm_fb_helper *fb_helper,
int c, o;
struct drm_connector *connector;
const struct drm_connector_helper_funcs *connector_funcs;
- struct drm_encoder *encoder;
int my_score, best_score, score;
struct drm_fb_helper_crtc **crtcs, *crtc;
struct drm_fb_helper_connector *fb_helper_conn;
@@ -2362,20 +2378,6 @@ static int drm_pick_crtcs(struct drm_fb_helper
*fb_helper,
connector_funcs = connector->helper_private;
- /*
-* If the DRM device implements atomic hooks and ->best_encoder() is
-* NULL we fallback to the default drm_atomic_helper_best_encoder()
-* helper.
-*/
- if (drm_drv_uses_atomic_modeset(fb_helper->dev) &&
- !connector_funcs->best_encoder)
- encoder = drm_atomic_helper_best_encoder(connector);
- else
- encoder = connector_funcs->best_encoder(connector);
-
- if (!encoder)
- goto out;
-
/*
* select a crtc for this connector and then attempt to configure
* remaining connectors
@@ -2383,7 +2385,7 @@ static int drm_pick_crtcs(struct drm_fb_helper *fb_helper,
for (c = 0; c < fb_helper->crtc_count; c++) {
crtc = _helper->crtc_info[c];
- if ((encoder->possible_crtcs & (1 << c)) == 0)
+ if (!connector_crtc_ok(connector, crtc->mode_set.crtc))
continue;
for (o = 0; o < n; o++)
@@ -2410,7 +2412,7 @@ static int drm_pick_crtcs(struct drm_fb_helper *fb_helper,
sizeof(struct drm_fb_helper_crtc *));
}
}
-out:
+
kfree(crtcs);
return best_score;
}
--
2.16.4
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[Intel-gfx] [PATCH 0/8] drm: Second attempt at fixing the fb-helper .best_encoder() mess
From: Ville Syrjälä Daniel pointed out that there should be a way to do what userspace does and not require any .best_encoder() stuff in the fb-helper. So this series does just that. Well, most of the series is actually just extra polish that happened by accident. But the real thing is in there somewhere still :) The not-so-great previous attempt was this thing: https://patchwork.freedesktop.org/series/44864/ Ville Syrjälä (8): drm/fb-helper: Eliminate the .best_encoder() usage drm/i915: Nuke intel_mst_best_encoder() drm: Add drm_for_each_connector_encoder_ids() drm/amdgpu: Use drm_for_each_connector_encoder_ids() drm/msm: Use drm_for_each_connector_encoder_ids() drm/nouveau: Use drm_for_each_connector_encoder_ids() drm/radeon: Use drm_for_each_connector_encoder_ids() drm/tilcdc: Use drm_for_each_connector_encoder_ids() drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c | 51 - drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 15 +++--- drivers/gpu/drm/drm_connector.c| 22 - drivers/gpu/drm/drm_fb_helper.c| 36 --- drivers/gpu/drm/drm_probe_helper.c | 9 ++-- drivers/gpu/drm/i915/intel_dp_mst.c| 10 drivers/gpu/drm/msm/dsi/dsi_manager.c | 5 +- drivers/gpu/drm/nouveau/nouveau_connector.c| 20 +++- drivers/gpu/drm/radeon/radeon_connectors.c | 63 +++--- drivers/gpu/drm/tilcdc/tilcdc_external.c | 5 +- include/drm/drm_connector.h| 11 + 11 files changed, 111 insertions(+), 136 deletions(-) -- 2.16.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCHv2] lib/ratelimit: Lockless ratelimiting
Hi Andy, thanks for the review,
On Tue, 2018-06-26 at 20:04 +0300, Andy Shevchenko wrote
[..]
> > #define RATELIMIT_STATE_INIT(name, interval_init, burst_init)
> > {\
> > - .lock =
> > __RAW_SPIN_LOCK_UNLOCKED(name.lock), \
>
> name is now redundant, isn't it?
It is. Worth to split on the second patch or keep callers changes in
this patch?
> > @@ -42,9 +41,10 @@ static inline void ratelimit_state_init(struct
> > ratelimit_state *rs,
> > {
> > memset(rs, 0, sizeof(*rs));
> >
> > - raw_spin_lock_init(>lock);
> > rs->interval= interval;
> > rs->burst = burst;
> > + atomic_set(>printed, 0);
> > + atomic_set(>missed, 0);
>
> Can it be
>
> *rs = RATELIMIT_STATE_INIT(interval, burst);
>
> ?
>
> (Yes, the '(struct ratelimit_state)' has to be added to macro to
> allow this)
Sure.
> > static inline void ratelimit_state_exit(struct ratelimit_state
> > *rs)
> > {
> > + int missed;
> > +
> > if (!(rs->flags & RATELIMIT_MSG_ON_RELEASE))
> > return;
> >
> > - if (rs->missed) {
> > + if ((missed = atomic_xchg(>missed, 0)))
>
> Perhaps
>
> missed = ...
> if (missed)
>
> ?
Ok, will change - checkpatch has warned me, but I thought it's just a
preference than a rule.
>
> > pr_warn("%s: %d output lines suppressed due to
> > ratelimiting\n",
> > - current->comm, rs->missed);
> > - rs->missed = 0;
> > - }
> > + current->comm, missed);
> > }
> > +static void ratelimit_end_interval(struct ratelimit_state *rs,
> > const char *func)
> > +{
> > + rs->begin = jiffies;
> > +
> > + if (!(rs->flags & RATELIMIT_MSG_ON_RELEASE)) {
> > + unsigned missed = (unsigned)atomic_xchg(
> > >missed, 0);
> > +
> > + if (missed)
> > + pr_warn("%s: %u callbacks suppressed\n",
> > func, missed);
>
> Instead of casting, perhaps
>
> int missed = ...
>
> I think you already has a guard against going it below zero. Or I
> missed something?
No, I do:
atomic_add_unless(>missed, 1, -1);
So, it's guard against overflow, but not against negative.
That's why I do print it as unsigned.
--
Thanks,
Dmitry
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Re: [Intel-gfx] [PATCH v3] drm/i915/ddi: Get AUX power domain for DP main link too
Em Seg, 2018-06-25 às 16:55 -0700, Souza, Jose escreveu:
> On Thu, 2018-06-21 at 21:44 +0300, Imre Deak wrote:
> > So far we got an AUX power domain reference only for the duration
> > of
> > DP
> > AUX transfers. However, the following suggests that we also need
> > these
> > for main link functionality:
> > - The specification doesn't state whether it's needed or not for
> > main
> > link functionality, but suggests that these power wells need to
> > be
> > enabled already during display core initialization (Sequences to
> > Initialize Display).
No, the specification states it's needed. Page "Sequences for
DisplayPort" (the ICL version, of course), step 1.b:
"TC: Note that AUX power is required for running main link."
Same for the HDMI page.
> > - For PSR we need to keep the AUX power well enabled.
> > - On ICL combo PHY ports (non-TC) the AUX power well is needed for
> > link training too: while the port is enabled with a DP link
> > training
> > test pattern trying to toggle the AUX power well will time out.
> > - On ICL MG PHY ports (TC) the AUX power well is needed also for
> > main
> > link functionality (both in DP and HDMI modes).
> > - Windows enables these power wells both for main and AUX lane
> > functionality.
> >
> > Based on the above take an AUX power reference for main link
> > functionality too. This makes a difference only on GEN10+ (GLK+)
> > platforms, where we have separate port specific AUX power wells.
> >
> > For PSR we still need to distinguish between port A and the other
> > ports, since on port A DC states must stay enabled for main link
> > functionality, but DC states must be disabled for driver initiated
> > AUX transfers. So re-use the corresponding helper from intel_psr.c.
> >
> > Since we take now a reference for main link functionality on all DP
> > ports we can forgo taking the separate power ref for PSR
> > functionality.
> >
> > v2:
> > - Make sure DC states stay enabled when taking the ref on port A.
> > (Ville)
> >
> > v3: (Ville)
> > - Fix comment about logic for encoders without a crtc state and
> > add FIXME note for a simplification to avoid calling
> > get_power_domains
> > in such cases.
> > - Use intel_crtc_has_dp_encoder() instead
> > !intel_crtc_has_type(HDMI).
> >
> > Cc: Ville Syrjälä
> > Cc: Dhinakaran Pandiyan
> > Cc: Paulo Zanoni
> > Signed-off-by: Imre Deak
>
> The spec is not clear but this fix the "aux power well" enable
> timeouts
> that I was getting in aux B so looks like your interpretation is
> right.
>
> Reviewed-by: José Roberto de Souza
>
> > ---
> > drivers/gpu/drm/i915/intel_ddi.c| 54
> > ++---
> > drivers/gpu/drm/i915/intel_display.c| 12 +++-
> > drivers/gpu/drm/i915/intel_drv.h| 3 +-
> > drivers/gpu/drm/i915/intel_psr.c| 41 -
> >
> > drivers/gpu/drm/i915/intel_runtime_pm.c | 1 +
> > 5 files changed, 64 insertions(+), 47 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > b/drivers/gpu/drm/i915/intel_ddi.c
> > index 044fe1fb9872..0319825b725b 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -1983,15 +1983,55 @@ bool intel_ddi_get_hw_state(struct
> > intel_encoder *encoder,
> > return ret;
> > }
> >
> > -static u64 intel_ddi_get_power_domains(struct intel_encoder
> > *encoder)
> > +static inline enum intel_display_power_domain
> > +intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp)
> > +{
> > + /* CNL HW requires corresponding AUX IOs to be powered up
> > for PSR with
> > +* DC states enabled at the same time, while for driver
> > initiated AUX
> > +* transfers we need the same AUX IOs to be powered but
> > with
> > DC states
> > +* disabled. Accordingly use the AUX power domain here
> > which
> > leaves DC
> > +* states enabled.
> > +* However, for non-A AUX ports the corresponding non-EDP
> > transcoders
> > +* would have already enabled power well 2 and DC_OFF.
> > This
> > means we can
> > +* acquire a wider POWER_DOMAIN_AUX_{B,C,D,F} reference
> > instead of a
> > +* specific AUX_IO reference without powering up any extra
> > wells.
> > +* Note that PSR is enabled only on Port A even though
> > this
> > function
> > +* returns the correct domain for other ports too.
> > +*/
> > + return intel_dp->aux_ch == AUX_CH_A ?
> > POWER_DOMAIN_AUX_IO_A
> > :
> > + intel_dp-
> > > aux_power_domain;
> >
> > +}
> > +
> > +static u64 intel_ddi_get_power_domains(struct intel_encoder
> > *encoder,
> > + struct intel_crtc_state
> > *crtc_state)
> > {
> > struct intel_digital_port *dig_port =
> > enc_to_dig_port(>base);
> > enum pipe pipe;
> > + u64 domains;
> >
> > - if (intel_ddi_get_hw_state(encoder, ))
> > - return BIT_ULL(dig_port->ddi_io_power_domain);
> > + if
[Intel-gfx] [RFC][PATCH] Makefile: globally enable VLA warning
This is the patch I've got prepared now that fixes for all VLAs have been sent to maintainers (some are still under review/adjustment, but there aren't any unexplored cases left). My intention would be to have this land at the end of the next merge window after all the pending VLA patches have landed. I just wanted to get any feedback here, since it touches a couple areas in the process and I didn't want anyone to be surprised. :) Thanks! -Kees Now that VLAs have been removed from the kernel, enable the VLA warning globally. The only exceptions to this are the KASan an UBSan tests which are explicitly checking that VLAs trigger their respective tests. Signed-off-by: Kees Cook --- Makefile | 3 +++ drivers/gpu/drm/i915/Makefile | 2 +- lib/Makefile | 2 ++ scripts/Makefile.extrawarn| 1 - 4 files changed, 6 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index c9132594860b..3d5013ec4116 100644 --- a/Makefile +++ b/Makefile @@ -778,6 +778,9 @@ NOSTDINC_FLAGS += -nostdinc -isystem $(shell $(CC) -print-file-name=include) # warn about C99 declaration after statement KBUILD_CFLAGS += $(call cc-option,-Wdeclaration-after-statement,) +# VLAs should not be used anywhere in the kernel +KBUILD_CFLAGS += $(call cc-option,-Wvla) + # disable pointer signed / unsigned warnings in gcc 4.0 KBUILD_CFLAGS += $(call cc-disable-warning, pointer-sign) diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 4c6adae23e18..289ab5dc5712 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -12,7 +12,7 @@ # Note the danger in using -Wall -Wextra is that when CI updates gcc we # will most likely get a sudden build breakage... Hopefully we will fix # new warnings before CI updates! -subdir-ccflags-y := -Wall -Wextra -Wvla +subdir-ccflags-y := -Wall -Wextra subdir-ccflags-y += $(call cc-disable-warning, unused-parameter) subdir-ccflags-y += $(call cc-disable-warning, type-limits) subdir-ccflags-y += $(call cc-disable-warning, missing-field-initializers) diff --git a/lib/Makefile b/lib/Makefile index 90dc5520b784..4720e276232e 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -52,7 +52,9 @@ obj-$(CONFIG_TEST_SYSCTL) += test_sysctl.o obj-$(CONFIG_TEST_HASH) += test_hash.o test_siphash.o obj-$(CONFIG_TEST_KASAN) += test_kasan.o CFLAGS_test_kasan.o += -fno-builtin +CFLAGS_test_kasan.o += $(call cc-disable-warning, vla) obj-$(CONFIG_TEST_UBSAN) += test_ubsan.o +CFLAGS_test_ubsan.o += $(call cc-disable-warning, vla) UBSAN_SANITIZE_test_ubsan.o := y obj-$(CONFIG_TEST_KSTRTOX) += test-kstrtox.o obj-$(CONFIG_TEST_LIST_SORT) += test_list_sort.o diff --git a/scripts/Makefile.extrawarn b/scripts/Makefile.extrawarn index 8d5357053f86..24b2fb1d1297 100644 --- a/scripts/Makefile.extrawarn +++ b/scripts/Makefile.extrawarn @@ -52,7 +52,6 @@ warning-3 += -Wpointer-arith warning-3 += -Wredundant-decls warning-3 += -Wswitch-default warning-3 += $(call cc-option, -Wpacked-bitfield-compat) -warning-3 += $(call cc-option, -Wvla) warning := $(warning-$(findstring 1, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS))) warning += $(warning-$(findstring 2, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS))) -- 2.17.1 -- Kees Cook Pixel Security ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/psr: Kill useless function pointers.
On Tue, Jun 26, 2018 at 10:27:49AM +0200, Daniel Vetter wrote:
> On Mon, Jun 25, 2018 at 10:25:36PM -0700, Rodrigo Vivi wrote:
> > At some point we introduced the function pointers
> > on PSR code to help with VLV/CHV separation logic
> > because it had a different HW implementation from PSR.
> >
> > Since all converged to HSW PSR and we dropped the
> > VLV/CHV support, let's also kill the useless function
> > pointers and leave the code cleaner.
> >
> > Cc: Dhinakaran Pandiyan
> > Signed-off-by: Rodrigo Vivi
>
> Yay for removing dead code!
>
> Reviewed-by: Daniel Vetter
thanks, pushed to dinq.
>
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 8 -
> > drivers/gpu/drm/i915/intel_psr.c | 55 +++-
> > 2 files changed, 18 insertions(+), 45 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > b/drivers/gpu/drm/i915/i915_drv.h
> > index 6f08ab310118..2b684f431c60 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -631,14 +631,6 @@ struct i915_psr {
> > bool debug;
> > ktime_t last_entry_attempt;
> > ktime_t last_exit;
> > -
> > - void (*enable_source)(struct intel_dp *,
> > - const struct intel_crtc_state *);
> > - void (*disable_source)(struct intel_dp *,
> > - const struct intel_crtc_state *);
> > - void (*enable_sink)(struct intel_dp *);
> > - void (*activate)(struct intel_dp *);
> > - void (*setup_vsc)(struct intel_dp *, const struct intel_crtc_state *);
> > };
> >
> > enum intel_pch {
> > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > b/drivers/gpu/drm/i915/intel_psr.c
> > index aea81ace854b..bd8e562212f7 100644
> > --- a/drivers/gpu/drm/i915/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > @@ -278,8 +278,8 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
> > }
> > }
> >
> > -static void hsw_psr_setup_vsc(struct intel_dp *intel_dp,
> > - const struct intel_crtc_state *crtc_state)
> > +static void intel_psr_setup_vsc(struct intel_dp *intel_dp,
> > + const struct intel_crtc_state *crtc_state)
> > {
> > struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> > struct drm_i915_private *dev_priv =
> > to_i915(intel_dig_port->base.base.dev);
> > @@ -344,7 +344,7 @@ static void hsw_psr_setup_aux(struct intel_dp *intel_dp)
> > I915_WRITE(EDP_PSR_AUX_CTL, aux_ctl);
> > }
> >
> > -static void hsw_psr_enable_sink(struct intel_dp *intel_dp)
> > +static void intel_psr_enable_sink(struct intel_dp *intel_dp)
> > {
> > struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > struct drm_device *dev = dig_port->base.base.dev;
> > @@ -456,24 +456,6 @@ static void hsw_activate_psr2(struct intel_dp
> > *intel_dp)
> > I915_WRITE(EDP_PSR2_CTL, val);
> > }
> >
> > -static void hsw_psr_activate(struct intel_dp *intel_dp)
> > -{
> > - struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > - struct drm_device *dev = dig_port->base.base.dev;
> > - struct drm_i915_private *dev_priv = to_i915(dev);
> > -
> > - /* On HSW+ after we enable PSR on source it will activate it
> > -* as soon as it match configure idle_frame count. So
> > -* we just actually enable it here on activation time.
> > -*/
> > -
> > - /* psr1 and psr2 are mutually exclusive.*/
> > - if (dev_priv->psr.psr2_enabled)
> > - hsw_activate_psr2(intel_dp);
> > - else
> > - hsw_activate_psr1(intel_dp);
> > -}
> > -
> > static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
> > struct intel_crtc_state *crtc_state)
> > {
> > @@ -583,12 +565,17 @@ static void intel_psr_activate(struct intel_dp
> > *intel_dp)
> > WARN_ON(dev_priv->psr.active);
> > lockdep_assert_held(_priv->psr.lock);
> >
> > - dev_priv->psr.activate(intel_dp);
> > + /* psr1 and psr2 are mutually exclusive.*/
> > + if (dev_priv->psr.psr2_enabled)
> > + hsw_activate_psr2(intel_dp);
> > + else
> > + hsw_activate_psr1(intel_dp);
> > +
> > dev_priv->psr.active = true;
> > }
> >
> > -static void hsw_psr_enable_source(struct intel_dp *intel_dp,
> > - const struct intel_crtc_state *crtc_state)
> > +static void intel_psr_enable_source(struct intel_dp *intel_dp,
> > + const struct intel_crtc_state *crtc_state)
> > {
> > struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > struct drm_device *dev = dig_port->base.base.dev;
> > @@ -666,9 +653,9 @@ void intel_psr_enable(struct intel_dp *intel_dp,
> > dev_priv->psr.psr2_enabled = crtc_state->has_psr2;
> > dev_priv->psr.busy_frontbuffer_bits = 0;
> >
> > - dev_priv->psr.setup_vsc(intel_dp, crtc_state);
> > - dev_priv->psr.enable_sink(intel_dp);
> > - dev_priv->psr.enable_source(intel_dp, crtc_state);
> > +
Re: [Intel-gfx] [PATCHv2] lib/ratelimit: Lockless ratelimiting
On Tue, Jun 26, 2018 at 7:24 PM, Dmitry Safonov wrote:
> Currently ratelimit_state is protected with spin_lock. If the .lock is
> taken at the moment of ___ratelimit() call, the message is suppressed to
> make ratelimiting robust.
>
> That results in the following issue issue:
> CPU0 CPU1
> -- --
> printk_ratelimit() printk_ratelimit()
> | |
> try_spin_lock() try_spin_lock()
> | |
> time_is_before_jiffies() return 0; // suppress
>
> So, concurrent call of ___ratelimit() results in silently suppressing
> one of the messages, regardless if the limit is reached or not.
> And rc->missed is not increased in such case so the issue is covered
> from user.
>
> Convert ratelimiting to use atomic counters and drop spin_lock.
>
> Note: That might be unexpected, but with the first interval of messages
> storm one can print up to burst*2 messages. So, it doesn't guarantee
> that in *any* interval amount of messages is lesser than burst.
> But, that differs lightly from previous behavior where one can start
> burst=5 interval and print 4 messages on the last milliseconds of
> interval + new 5 messages from new interval (totally 9 messages in
> lesser than interval value):
>
>msg0 msg1-msg4 msg0-msg4
> | | |
> | | |
> |--o-o-|-o|--> (t)
> <--->
>Lesser than burst
> #define RATELIMIT_STATE_INIT(name, interval_init, burst_init) {
> \
> - .lock = __RAW_SPIN_LOCK_UNLOCKED(name.lock), \
name is now redundant, isn't it?
> .interval = interval_init,\
> .burst = burst_init, \
> + .printed= ATOMIC_INIT(0), \
> + .missed = ATOMIC_INIT(0), \
> }
>
> #define RATELIMIT_STATE_INIT_DISABLED \
> @@ -42,9 +41,10 @@ static inline void ratelimit_state_init(struct
> ratelimit_state *rs,
> {
> memset(rs, 0, sizeof(*rs));
>
> - raw_spin_lock_init(>lock);
> rs->interval= interval;
> rs->burst = burst;
> + atomic_set(>printed, 0);
> + atomic_set(>missed, 0);
Can it be
*rs = RATELIMIT_STATE_INIT(interval, burst);
?
(Yes, the '(struct ratelimit_state)' has to be added to macro to allow this)
> }
> static inline void ratelimit_state_exit(struct ratelimit_state *rs)
> {
> + int missed;
> +
> if (!(rs->flags & RATELIMIT_MSG_ON_RELEASE))
> return;
>
> - if (rs->missed) {
> + if ((missed = atomic_xchg(>missed, 0)))
Perhaps
missed = ...
if (missed)
?
> pr_warn("%s: %d output lines suppressed due to
> ratelimiting\n",
> - current->comm, rs->missed);
> - rs->missed = 0;
> - }
> + current->comm, missed);
> }
> +static void ratelimit_end_interval(struct ratelimit_state *rs, const char
> *func)
> +{
> + rs->begin = jiffies;
> +
> + if (!(rs->flags & RATELIMIT_MSG_ON_RELEASE)) {
> + unsigned missed = (unsigned)atomic_xchg(>missed, 0);
> +
> + if (missed)
> + pr_warn("%s: %u callbacks suppressed\n", func,
> missed);
Instead of casting, perhaps
int missed = ...
I think you already has a guard against going it below zero. Or I
missed something?
> + }
> +}
--
With Best Regards,
Andy Shevchenko
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for lib/ratelimit: Lockless ratelimiting
== Series Details == Series: lib/ratelimit: Lockless ratelimiting URL : https://patchwork.freedesktop.org/series/45416/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4380 -> Patchwork_9426 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/45416/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_9426 that come from known issues: === IGT changes === Issues hit igt@drv_getparams_basic@basic-subslice-total: fi-skl-6770hq: PASS -> DMESG-WARN (fdo#105541) Possible fixes igt@gem_basic@bad-close: fi-skl-6770hq: DMESG-WARN (fdo#105541) -> PASS fdo#105541 https://bugs.freedesktop.org/show_bug.cgi?id=105541 == Participating hosts (44 -> 39) == Missing(5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u == Build changes == * Linux: CI_DRM_4380 -> Patchwork_9426 CI_DRM_4380: e69a5560b14d9c7377744267ffd9963f06734f38 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9426: a8dce76165a9eb3723ba64d789077c655f91c47f @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == a8dce76165a9 lib/ratelimit: Lockless ratelimiting == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9426/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Block enabling FBC until flips have been completed
== Series Details == Series: series starting with [1/2] drm/i915: Block enabling FBC until flips have been completed URL : https://patchwork.freedesktop.org/series/45349/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4380_full -> Patchwork_9425_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_9425_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_9425_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_9425_full: === IGT changes === Warnings igt@gem_exec_schedule@deep-vebox: shard-kbl: PASS -> SKIP +1 igt@kms_cursor_legacy@basic-flip-before-cursor-legacy: shard-snb: PASS -> SKIP +4 == Known issues == Here are the changes found in Patchwork_9425_full that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_gtt: shard-apl: PASS -> FAIL (fdo#105347) igt@gem_exec_big: shard-hsw: PASS -> INCOMPLETE (fdo#103540) igt@gem_softpin@noreloc-s3: shard-kbl: PASS -> INCOMPLETE (fdo#103665) igt@kms_flip@modeset-vs-vblank-race: shard-glk: PASS -> FAIL (fdo#103060) igt@kms_flip_tiling@flip-x-tiled: shard-glk: PASS -> FAIL (fdo#104724) Possible fixes igt@drv_selftest@live_hangcheck: shard-kbl: DMESG-FAIL (fdo#106947, fdo#106560) -> PASS igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic: shard-glk: FAIL (fdo#105454, fdo#106509) -> PASS igt@kms_flip@plain-flip-ts-check-interruptible: shard-glk: FAIL (fdo#100368) -> PASS +1 igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw: shard-snb: FAIL (fdo#103167, fdo#104724) -> PASS igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc: shard-glk: FAIL (fdo#103167, fdo#104724) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724 fdo#105347 https://bugs.freedesktop.org/show_bug.cgi?id=105347 fdo#105454 https://bugs.freedesktop.org/show_bug.cgi?id=105454 fdo#106509 https://bugs.freedesktop.org/show_bug.cgi?id=106509 fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560 fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4380 -> Patchwork_9425 CI_DRM_4380: e69a5560b14d9c7377744267ffd9963f06734f38 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9425: 7a7381fc1a43aff6a2a1c930b51ba2bfde5ed153 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9425/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for lib/ratelimit: Lockless ratelimiting
== Series Details == Series: lib/ratelimit: Lockless ratelimiting URL : https://patchwork.freedesktop.org/series/45416/ State : warning == Summary == $ dim checkpatch origin/drm-tip a8dce76165a9 lib/ratelimit: Lockless ratelimiting -:74: ERROR:ASSIGN_IN_IF: do not use assignment in if condition #74: FILE: drivers/char/random.c:947: + if ((unseeded_miss = atomic_xchg(_warning.missed, 0))) -:82: ERROR:ASSIGN_IN_IF: do not use assignment in if condition #82: FILE: drivers/char/random.c:950: + if ((urandom_miss = atomic_xchg(_warning.missed, 0))) -:173: ERROR:ASSIGN_IN_IF: do not use assignment in if condition #173: FILE: include/linux/ratelimit.h:67: + if ((missed = atomic_xchg(>missed, 0))) -:195: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #195: FILE: lib/ratelimit.c:21: + unsigned missed = (unsigned)atomic_xchg(>missed, 0); -:195: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #195: FILE: lib/ratelimit.c:21: + unsigned missed = (unsigned)atomic_xchg(>missed, 0); total: 3 errors, 2 warnings, 0 checks, 186 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCHv2] lib/ratelimit: Lockless ratelimiting
Currently ratelimit_state is protected with spin_lock. If the .lock is
taken at the moment of ___ratelimit() call, the message is suppressed to
make ratelimiting robust.
That results in the following issue issue:
CPU0 CPU1
-- --
printk_ratelimit() printk_ratelimit()
| |
try_spin_lock() try_spin_lock()
| |
time_is_before_jiffies() return 0; // suppress
So, concurrent call of ___ratelimit() results in silently suppressing
one of the messages, regardless if the limit is reached or not.
And rc->missed is not increased in such case so the issue is covered
from user.
Convert ratelimiting to use atomic counters and drop spin_lock.
Note: That might be unexpected, but with the first interval of messages
storm one can print up to burst*2 messages. So, it doesn't guarantee
that in *any* interval amount of messages is lesser than burst.
But, that differs lightly from previous behavior where one can start
burst=5 interval and print 4 messages on the last milliseconds of
interval + new 5 messages from new interval (totally 9 messages in
lesser than interval value):
msg0 msg1-msg4 msg0-msg4
| | |
| | |
|--o-o-|-o|--> (t)
<--->
Lesser than burst
Dropped dev/random patch since v1 version:
lkml.kernel.org/r/<20180510125211.12583-1-d...@arista.com>
Cc: Arnd Bergmann
Cc: David Airlie
Cc: Dmitry Safonov <0x7f454...@gmail.com>
Cc: Greg Kroah-Hartman
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: "Theodore Ts'o"
Cc: Thomas Gleixner
Cc: intel-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Dmitry Safonov
---
drivers/char/random.c| 16 ---
drivers/gpu/drm/i915/i915_perf.c | 4 +--
include/linux/ratelimit.h| 24 +---
lib/ratelimit.c | 59 +++-
4 files changed, 50 insertions(+), 53 deletions(-)
diff --git a/drivers/char/random.c b/drivers/char/random.c
index a8fb0020ba5c..ba67ea0dc568 100644
--- a/drivers/char/random.c
+++ b/drivers/char/random.c
@@ -936,24 +936,20 @@ static void crng_reseed(struct crng_state *crng, struct
entropy_store *r)
crng->init_time = jiffies;
spin_unlock_irqrestore(>lock, flags);
if (crng == _crng && crng_init < 2) {
+ int unseeded_miss, urandom_miss;
+
invalidate_batched_entropy();
numa_crng_init();
crng_init = 2;
process_random_ready_list();
wake_up_interruptible(_init_wait);
pr_notice("random: crng init done\n");
- if (unseeded_warning.missed) {
+ if ((unseeded_miss = atomic_xchg(_warning.missed, 0)))
pr_notice("random: %d get_random_xx warning(s) missed "
- "due to ratelimiting\n",
- unseeded_warning.missed);
- unseeded_warning.missed = 0;
- }
- if (urandom_warning.missed) {
+ "due to ratelimiting\n", unseeded_miss);
+ if ((urandom_miss = atomic_xchg(_warning.missed, 0)))
pr_notice("random: %d urandom warning(s) missed "
- "due to ratelimiting\n",
- urandom_warning.missed);
- urandom_warning.missed = 0;
- }
+ "due to ratelimiting\n", urandom_miss);
}
}
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 019bd2d073ad..75f6203f6e8e 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -1317,9 +1317,9 @@ static void i915_oa_stream_destroy(struct
i915_perf_stream *stream)
put_oa_config(dev_priv, stream->oa_config);
- if (dev_priv->perf.oa.spurious_report_rs.missed) {
+ if (atomic_read(_priv->perf.oa.spurious_report_rs.missed)) {
DRM_NOTE("%d spurious OA report notices suppressed due to
ratelimiting\n",
-dev_priv->perf.oa.spurious_report_rs.missed);
+
atomic_read(_priv->perf.oa.spurious_report_rs.missed));
}
}
diff --git a/include/linux/ratelimit.h b/include/linux/ratelimit.h
index 8ddf79e9207a..7b5914e12d5b 100644
--- a/include/linux/ratelimit.h
+++ b/include/linux/ratelimit.h
@@ -4,7 +4,6 @@
#include
#include
-#include
#define DEFAULT_RATELIMIT_INTERVAL (5 * HZ)
#define DEFAULT_RATELIMIT_BURST10
@@ -13,20 +12,20 @@
#define RATELIMIT_MSG_ON_RELEASE BIT(0)
struct ratelimit_state {
- raw_spinlock_t
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/icl: Add power well support
== Series Details == Series: drm/i915/icl: Add power well support URL : https://patchwork.freedesktop.org/series/45409/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4380_full -> Patchwork_9424_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_9424_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_9424_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_9424_full: === IGT changes === Warnings igt@gem_exec_schedule@deep-bsd2: shard-kbl: SKIP -> PASS igt@gem_exec_schedule@deep-vebox: shard-kbl: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_9424_full that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_hangcheck: shard-apl: PASS -> DMESG-FAIL (fdo#106947, fdo#106560) igt@kms_atomic_transition@1x-modeset-transitions-nonblocking: shard-glk: PASS -> FAIL (fdo#105703) igt@kms_flip@2x-flip-vs-expired-vblank: shard-glk: PASS -> FAIL (fdo#105363) igt@kms_flip_tiling@flip-x-tiled: shard-glk: PASS -> FAIL (fdo#103822, fdo#104724) Possible fixes igt@drv_selftest@live_hangcheck: shard-kbl: DMESG-FAIL (fdo#106947, fdo#106560) -> PASS igt@gem_ctx_isolation@rcs0-s3: shard-kbl: INCOMPLETE (fdo#103665) -> PASS igt@kms_flip@plain-flip-ts-check-interruptible: shard-glk: FAIL (fdo#100368) -> PASS +1 igt@kms_flip_tiling@flip-y-tiled: shard-glk: FAIL (fdo#104724) -> PASS Warnings igt@drv_selftest@live_gtt: shard-glk: FAIL (fdo#105347) -> INCOMPLETE (k.org#198133, fdo#103359) fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822 fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724 fdo#105347 https://bugs.freedesktop.org/show_bug.cgi?id=105347 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#105703 https://bugs.freedesktop.org/show_bug.cgi?id=105703 fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560 fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947 k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133 == Participating hosts (5 -> 5) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4380 -> Patchwork_9424 CI_DRM_4380: e69a5560b14d9c7377744267ffd9963f06734f38 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9424: 409dfff082a1aca653c41e87af092e1e12e2673d @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9424/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 2/2] drm/i915/psr: Warn for erroneous enabling of both PSR1 and PSR2.
On Tue, Jun 26, 2018 at 02:05:22AM -0700, Dhinakaran Pandiyan wrote: > Depending whether PSR1 or PSR2 was configured, we print a warning if the > corresponding control mmio indicated PSR was erroneously enabled. As > Chris pointed out, it makes more sense to check for both the mmio's > since we expect neither PSR1 nor PSR2 to be enabled when psr_activate() is > called. > > v2: Read PSR2 control register only on supported platforms (Rodrigo) > > Cc: Rodrigo Vivi > Cc: Chris Wilson > Signed-off-by: Dhinakaran Pandiyan Reviewed-by: Rodrigo Vivi > --- > drivers/gpu/drm/i915/intel_psr.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_psr.c > b/drivers/gpu/drm/i915/intel_psr.c > index 7aa324f0d1f7..f27193310480 100644 > --- a/drivers/gpu/drm/i915/intel_psr.c > +++ b/drivers/gpu/drm/i915/intel_psr.c > @@ -576,10 +576,9 @@ static void intel_psr_activate(struct intel_dp *intel_dp) > struct drm_device *dev = intel_dig_port->base.base.dev; > struct drm_i915_private *dev_priv = to_i915(dev); > > - if (dev_priv->psr.psr2_enabled) > + if (INTEL_GEN(dev_priv) >= 9) > WARN_ON(I915_READ(EDP_PSR2_CTL) & EDP_PSR2_ENABLE); > - else > - WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE); > + WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE); > WARN_ON(dev_priv->psr.active); > lockdep_assert_held(_priv->psr.lock); > > -- > 2.14.1 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm: Pass crtc to .best_encoder()
On 2018-06-26 11:01 AM, Harry Wentland wrote:
> On 2018-06-15 03:52 PM, Ville Syrjala wrote:
>> From: Ville Syrjälä
>>
>> To pick the correct MST encoder i915 wants to know which crtc is going
>> to be feeding us. To that end let's pass the crtc to the .best_encoder()
>> hook. The atomic variant already knows the crtc via the connector state,
>> but the non-atomic hooks is still being used by the fb_helper even on
>> atomic drivers.
>>
>> This allows us to fix up the possible_crtcs bitmask for the i915 MST
>> encoders. We have one encoder for each crtc+port combination, and thus
>> we have to know both the connector and the crtc to pick the right one.
>> This has only worked so far because every MST encoder lied in its
>> possible_crtcs bitmask that they can be driven by any crtc.
>>
>> I took the easy way out and passed NULL as the crtc for all the driver
>> internal uses of .best_encoder() in the amdgpu/radeon drivers. None of
>> the other drivers have such internal uses. The other callers
>> (crtc_helper, atomic_helper, fb_helper) will pass in the proper crtc.
>> but no one besides i915 will currently look at it.
>>
>> Cc: Alex Deucher
>> Cc: "Christian König"
>> Cc: "David (ChunMing) Zhou"
>> Cc: Harry Wentland
>> Cc: amd-...@lists.freedesktop.org
>> Signed-off-by: Ville Syrjälä
>
> amdgpu parts are
> Acked-by: Harry Wentland
>
Upgrading after proper review of the entire patch
Reviewed-by: Harry Wentland
Harry
> Harry
>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c | 33 +
>> drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 3 +-
>> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 7 ++--
>> .../amd/display/amdgpu_dm/amdgpu_dm_mst_types.c| 5 +--
>> drivers/gpu/drm/ast/ast_mode.c | 3 +-
>> drivers/gpu/drm/bochs/bochs_kms.c | 3 +-
>> drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 3 +-
>> drivers/gpu/drm/bridge/tc358767.c | 3 +-
>> drivers/gpu/drm/cirrus/cirrus_mode.c | 5 +--
>> drivers/gpu/drm/drm_atomic_helper.c| 16 ++---
>> drivers/gpu/drm/drm_crtc_helper.c | 3 +-
>> drivers/gpu/drm/drm_fb_helper.c| 41
>> --
>> drivers/gpu/drm/gma500/gma_display.c | 3 +-
>> drivers/gpu/drm/gma500/mdfld_dsi_output.c | 5 +--
>> drivers/gpu/drm/gma500/psb_intel_drv.h | 3 +-
>> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c | 3 +-
>> drivers/gpu/drm/i2c/tda998x_drv.c | 3 +-
>> drivers/gpu/drm/i915/intel_dp_mst.c| 9 +++--
>> drivers/gpu/drm/imx/imx-ldb.c | 5 +--
>> drivers/gpu/drm/imx/imx-tve.c | 5 +--
>> drivers/gpu/drm/imx/parallel-display.c | 5 +--
>> drivers/gpu/drm/mediatek/mtk_hdmi.c| 3 +-
>> drivers/gpu/drm/mgag200/mgag200_mode.c | 5 +--
>> drivers/gpu/drm/msm/dsi/dsi_manager.c | 3 +-
>> drivers/gpu/drm/nouveau/dispnv50/disp.c| 3 +-
>> drivers/gpu/drm/nouveau/nouveau_connector.c| 3 +-
>> drivers/gpu/drm/qxl/qxl_display.c | 3 +-
>> drivers/gpu/drm/radeon/radeon_connectors.c | 40
>> +++--
>> drivers/gpu/drm/radeon/radeon_dp_mst.c | 5 +--
>> drivers/gpu/drm/shmobile/shmob_drm_crtc.c | 3 +-
>> drivers/gpu/drm/tilcdc/tilcdc_panel.c | 5 +--
>> drivers/gpu/drm/tilcdc/tilcdc_tfp410.c | 5 +--
>> drivers/gpu/drm/udl/udl_connector.c| 3 +-
>> drivers/staging/vboxvideo/vbox_mode.c | 5 +--
>> include/drm/drm_atomic_helper.h| 3 +-
>> include/drm/drm_modeset_helper_vtables.h | 6 ++--
>> 36 files changed, 155 insertions(+), 106 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
>> index 8e66851eb427..3dfa50ec2589 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
>> @@ -135,7 +135,8 @@ int amdgpu_connector_get_monitor_bpc(struct
>> drm_connector *connector)
>> else {
>> const struct drm_connector_helper_funcs
>> *connector_funcs =
>> connector->helper_private;
>> -struct drm_encoder *encoder =
>> connector_funcs->best_encoder(connector);
>> +struct drm_encoder *encoder =
>> connector_funcs->best_encoder(connector,
>> +
>> NULL);
>> struct amdgpu_encoder *amdgpu_encoder =
>> to_amdgpu_encoder(encoder);
>> struct amdgpu_encoder_atom_dig *dig =
>> amdgpu_encoder->enc_priv;
>>
>> @@ -218,7 +219,7 @@ amdgpu_connector_update_scratch_regs(struct
>> drm_connector
Re: [Intel-gfx] [PATCH] drm: Pass crtc to .best_encoder()
On Tue, Jun 26, 2018 at 05:23:25PM +0200, Daniel Vetter wrote: > On Fri, Jun 15, 2018 at 10:52:21PM +0300, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > To pick the correct MST encoder i915 wants to know which crtc is going > > to be feeding us. To that end let's pass the crtc to the .best_encoder() > > hook. The atomic variant already knows the crtc via the connector state, > > but the non-atomic hooks is still being used by the fb_helper even on > > atomic drivers. > > Can't we instead fix the fb helpers to use atomic_best_encoder? We'd need a connector state for that. Not sure we want to construct a fake one on demand or something. > Or just > drop that code, userspace doesn't really know any better either and just > needs to figure this out without the help of ->best_encoder, so it should > be possible. I have to admit I don't even remmber how userspace does this. OK, yeah so each connector has a list of encoders and each encoder has the possible_crtcs bitmask. So we should be able to just iterate through all the encoders for the connector. Not sure there couldn't be some some false positives if best_encoder() doesn't quite agree with the answer for some reason. But yeah, this does seem like a nicer option because we can then nuke the extra .best_encoder() hook for i915 mst. Now the question becomes whether I get to review the connecor->encoder_ids[] assignments in every driver. I suppose they should be mostly OK if userspace manages to work. -- Ville Syrjälä Intel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Block enabling FBC until flips have been completed
== Series Details == Series: series starting with [1/2] drm/i915: Block enabling FBC until flips have been completed URL : https://patchwork.freedesktop.org/series/45349/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4380 -> Patchwork_9425 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/45349/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_9425 that come from known issues: === IGT changes === Possible fixes igt@gem_basic@bad-close: fi-skl-6770hq: DMESG-WARN (fdo#105541) -> PASS fdo#105541 https://bugs.freedesktop.org/show_bug.cgi?id=105541 == Participating hosts (44 -> 39) == Missing(5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u == Build changes == * Linux: CI_DRM_4380 -> Patchwork_9425 CI_DRM_4380: e69a5560b14d9c7377744267ffd9963f06734f38 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9425: 7a7381fc1a43aff6a2a1c930b51ba2bfde5ed153 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 7a7381fc1a43 drm/i915: Remove delayed FBC activation. 3f1f970c9d86 drm/i915: Block enabling FBC until flips have been completed == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9425/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm: Pass crtc to .best_encoder()
On Fri, Jun 15, 2018 at 10:52:21PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> To pick the correct MST encoder i915 wants to know which crtc is going
> to be feeding us. To that end let's pass the crtc to the .best_encoder()
> hook. The atomic variant already knows the crtc via the connector state,
> but the non-atomic hooks is still being used by the fb_helper even on
> atomic drivers.
Can't we instead fix the fb helpers to use atomic_best_encoder? Or just
drop that code, userspace doesn't really know any better either and just
needs to figure this out without the help of ->best_encoder, so it should
be possible.
-Daniel
>
> This allows us to fix up the possible_crtcs bitmask for the i915 MST
> encoders. We have one encoder for each crtc+port combination, and thus
> we have to know both the connector and the crtc to pick the right one.
> This has only worked so far because every MST encoder lied in its
> possible_crtcs bitmask that they can be driven by any crtc.
>
> I took the easy way out and passed NULL as the crtc for all the driver
> internal uses of .best_encoder() in the amdgpu/radeon drivers. None of
> the other drivers have such internal uses. The other callers
> (crtc_helper, atomic_helper, fb_helper) will pass in the proper crtc.
> but no one besides i915 will currently look at it.
>
> Cc: Alex Deucher
> Cc: "Christian König"
> Cc: "David (ChunMing) Zhou"
> Cc: Harry Wentland
> Cc: amd-...@lists.freedesktop.org
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c | 33 +
> drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 3 +-
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 7 ++--
> .../amd/display/amdgpu_dm/amdgpu_dm_mst_types.c| 5 +--
> drivers/gpu/drm/ast/ast_mode.c | 3 +-
> drivers/gpu/drm/bochs/bochs_kms.c | 3 +-
> drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 3 +-
> drivers/gpu/drm/bridge/tc358767.c | 3 +-
> drivers/gpu/drm/cirrus/cirrus_mode.c | 5 +--
> drivers/gpu/drm/drm_atomic_helper.c| 16 ++---
> drivers/gpu/drm/drm_crtc_helper.c | 3 +-
> drivers/gpu/drm/drm_fb_helper.c| 41
> --
> drivers/gpu/drm/gma500/gma_display.c | 3 +-
> drivers/gpu/drm/gma500/mdfld_dsi_output.c | 5 +--
> drivers/gpu/drm/gma500/psb_intel_drv.h | 3 +-
> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c | 3 +-
> drivers/gpu/drm/i2c/tda998x_drv.c | 3 +-
> drivers/gpu/drm/i915/intel_dp_mst.c| 9 +++--
> drivers/gpu/drm/imx/imx-ldb.c | 5 +--
> drivers/gpu/drm/imx/imx-tve.c | 5 +--
> drivers/gpu/drm/imx/parallel-display.c | 5 +--
> drivers/gpu/drm/mediatek/mtk_hdmi.c| 3 +-
> drivers/gpu/drm/mgag200/mgag200_mode.c | 5 +--
> drivers/gpu/drm/msm/dsi/dsi_manager.c | 3 +-
> drivers/gpu/drm/nouveau/dispnv50/disp.c| 3 +-
> drivers/gpu/drm/nouveau/nouveau_connector.c| 3 +-
> drivers/gpu/drm/qxl/qxl_display.c | 3 +-
> drivers/gpu/drm/radeon/radeon_connectors.c | 40 +++--
> drivers/gpu/drm/radeon/radeon_dp_mst.c | 5 +--
> drivers/gpu/drm/shmobile/shmob_drm_crtc.c | 3 +-
> drivers/gpu/drm/tilcdc/tilcdc_panel.c | 5 +--
> drivers/gpu/drm/tilcdc/tilcdc_tfp410.c | 5 +--
> drivers/gpu/drm/udl/udl_connector.c| 3 +-
> drivers/staging/vboxvideo/vbox_mode.c | 5 +--
> include/drm/drm_atomic_helper.h| 3 +-
> include/drm/drm_modeset_helper_vtables.h | 6 ++--
> 36 files changed, 155 insertions(+), 106 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
> index 8e66851eb427..3dfa50ec2589 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
> @@ -135,7 +135,8 @@ int amdgpu_connector_get_monitor_bpc(struct drm_connector
> *connector)
> else {
> const struct drm_connector_helper_funcs
> *connector_funcs =
> connector->helper_private;
> - struct drm_encoder *encoder =
> connector_funcs->best_encoder(connector);
> + struct drm_encoder *encoder =
> connector_funcs->best_encoder(connector,
> +
> NULL);
> struct amdgpu_encoder *amdgpu_encoder =
> to_amdgpu_encoder(encoder);
> struct amdgpu_encoder_atom_dig *dig =
> amdgpu_encoder->enc_priv;
>
> @@ -218,7 +219,7 @@ amdgpu_connector_update_scratch_regs(struct drm_connector
> *connector,
> bool
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: Add power well support
== Series Details == Series: drm/i915/icl: Add power well support URL : https://patchwork.freedesktop.org/series/45409/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4380 -> Patchwork_9424 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/45409/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_9424 that come from known issues: === IGT changes === Possible fixes igt@gem_basic@bad-close: fi-skl-6770hq: DMESG-WARN (fdo#105541) -> PASS fdo#105541 https://bugs.freedesktop.org/show_bug.cgi?id=105541 == Participating hosts (44 -> 39) == Missing(5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u == Build changes == * Linux: CI_DRM_4380 -> Patchwork_9424 CI_DRM_4380: e69a5560b14d9c7377744267ffd9963f06734f38 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9424: 409dfff082a1aca653c41e87af092e1e12e2673d @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 409dfff082a1 drm/i915/icl: Add power well support == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9424/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm: Pass crtc to .best_encoder()
On 2018-06-15 03:52 PM, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> To pick the correct MST encoder i915 wants to know which crtc is going
> to be feeding us. To that end let's pass the crtc to the .best_encoder()
> hook. The atomic variant already knows the crtc via the connector state,
> but the non-atomic hooks is still being used by the fb_helper even on
> atomic drivers.
>
> This allows us to fix up the possible_crtcs bitmask for the i915 MST
> encoders. We have one encoder for each crtc+port combination, and thus
> we have to know both the connector and the crtc to pick the right one.
> This has only worked so far because every MST encoder lied in its
> possible_crtcs bitmask that they can be driven by any crtc.
>
> I took the easy way out and passed NULL as the crtc for all the driver
> internal uses of .best_encoder() in the amdgpu/radeon drivers. None of
> the other drivers have such internal uses. The other callers
> (crtc_helper, atomic_helper, fb_helper) will pass in the proper crtc.
> but no one besides i915 will currently look at it.
>
> Cc: Alex Deucher
> Cc: "Christian König"
> Cc: "David (ChunMing) Zhou"
> Cc: Harry Wentland
> Cc: amd-...@lists.freedesktop.org
> Signed-off-by: Ville Syrjälä
amdgpu parts are
Acked-by: Harry Wentland
Harry
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c | 33 +
> drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 3 +-
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 7 ++--
> .../amd/display/amdgpu_dm/amdgpu_dm_mst_types.c| 5 +--
> drivers/gpu/drm/ast/ast_mode.c | 3 +-
> drivers/gpu/drm/bochs/bochs_kms.c | 3 +-
> drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 3 +-
> drivers/gpu/drm/bridge/tc358767.c | 3 +-
> drivers/gpu/drm/cirrus/cirrus_mode.c | 5 +--
> drivers/gpu/drm/drm_atomic_helper.c| 16 ++---
> drivers/gpu/drm/drm_crtc_helper.c | 3 +-
> drivers/gpu/drm/drm_fb_helper.c| 41
> --
> drivers/gpu/drm/gma500/gma_display.c | 3 +-
> drivers/gpu/drm/gma500/mdfld_dsi_output.c | 5 +--
> drivers/gpu/drm/gma500/psb_intel_drv.h | 3 +-
> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c | 3 +-
> drivers/gpu/drm/i2c/tda998x_drv.c | 3 +-
> drivers/gpu/drm/i915/intel_dp_mst.c| 9 +++--
> drivers/gpu/drm/imx/imx-ldb.c | 5 +--
> drivers/gpu/drm/imx/imx-tve.c | 5 +--
> drivers/gpu/drm/imx/parallel-display.c | 5 +--
> drivers/gpu/drm/mediatek/mtk_hdmi.c| 3 +-
> drivers/gpu/drm/mgag200/mgag200_mode.c | 5 +--
> drivers/gpu/drm/msm/dsi/dsi_manager.c | 3 +-
> drivers/gpu/drm/nouveau/dispnv50/disp.c| 3 +-
> drivers/gpu/drm/nouveau/nouveau_connector.c| 3 +-
> drivers/gpu/drm/qxl/qxl_display.c | 3 +-
> drivers/gpu/drm/radeon/radeon_connectors.c | 40 +++--
> drivers/gpu/drm/radeon/radeon_dp_mst.c | 5 +--
> drivers/gpu/drm/shmobile/shmob_drm_crtc.c | 3 +-
> drivers/gpu/drm/tilcdc/tilcdc_panel.c | 5 +--
> drivers/gpu/drm/tilcdc/tilcdc_tfp410.c | 5 +--
> drivers/gpu/drm/udl/udl_connector.c| 3 +-
> drivers/staging/vboxvideo/vbox_mode.c | 5 +--
> include/drm/drm_atomic_helper.h| 3 +-
> include/drm/drm_modeset_helper_vtables.h | 6 ++--
> 36 files changed, 155 insertions(+), 106 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
> index 8e66851eb427..3dfa50ec2589 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
> @@ -135,7 +135,8 @@ int amdgpu_connector_get_monitor_bpc(struct drm_connector
> *connector)
> else {
> const struct drm_connector_helper_funcs
> *connector_funcs =
> connector->helper_private;
> - struct drm_encoder *encoder =
> connector_funcs->best_encoder(connector);
> + struct drm_encoder *encoder =
> connector_funcs->best_encoder(connector,
> +
> NULL);
> struct amdgpu_encoder *amdgpu_encoder =
> to_amdgpu_encoder(encoder);
> struct amdgpu_encoder_atom_dig *dig =
> amdgpu_encoder->enc_priv;
>
> @@ -218,7 +219,7 @@ amdgpu_connector_update_scratch_regs(struct drm_connector
> *connector,
> bool connected;
> int i;
>
> - best_encoder = connector_funcs->best_encoder(connector);
> + best_encoder = connector_funcs->best_encoder(connector, NULL);
>
> for (i = 0; i <
Re: [Intel-gfx] [PATCH] drm/dp: implement EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT
ill uprev by EOD
From: Navare, Manasi D
Sent: Monday, June 25, 2018 5:39 PM
To: Atwood, Matthew S
Cc: intel-gfx@lists.freedesktop.org; Vivi, Rodrigo; ble...@chromium.org;
Zanoni, Paulo R
Subject: Re: [Intel-gfx] [PATCH] drm/dp: implement
EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT
What is the status of this patch?
I am hitting this issue with one of the DP 1.4 sinks where the correct
values of DPCD are present at this new offset of 0x2200 else I see
bad values for REV and Max_link_rate etc..
So we absolutely need this for DP 1.4 sinks.
Manasi
On Wed, May 16, 2018 at 09:33:42AM -0700, matthew.s.atw...@intel.com wrote:
> From: Matt Atwood
>
> According to DP spec (2.9.3.1 of DP 1.4) if
> EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT is set the addresses in DPCD
> 02200h through 0220Fh shall contain the DPRX's true capability. These
> values will match 0h through Fh, except for DPCD_REV,
> MAX_LINK_RATE, DOWN_STREAM_PORT_PRESENT.
>
> Read from DPCD once for all 3 values as this is an expensive operation.
> Spec mentions that all of address space 02200h through 0220Fh should
> contain the right information however currently only 3 values can
> differ.
>
> There is no address space in the intel_dp->dpcd struct for addresses
> 02200h through 0220Fh, and since so much of the data is a identical,
> simply overwrite the values stored in 0h through Fh with the
> values that can be overwritten from addresses 02200h through 0220Fh
>
> Signed-off-by: Matt Atwood
> ---
> drivers/gpu/drm/i915/intel_dp.c | 14 ++
> include/drm/drm_dp_helper.h | 5 +++--
> 2 files changed, 17 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index dde92e4af5d3..899ebc5cece6 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3738,6 +3738,20 @@ intel_dp_read_dpcd(struct intel_dp *intel_dp)
>sizeof(intel_dp->dpcd)) < 0)
> return false; /* aux transfer failed */
>
> + if (intel_dp->dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
> + DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT &&
> + intel_dp->dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14) {
> + uint8_t dpcd_ext[16];
> +
> + if (drm_dp_dpcd_read(_dp->aux, DP_DP13_DPCD_REV,
> + _ext, sizeof(dpcd_ext)) < 0)
> + return false; /* aux transfer failed */
> +
> + intel_dp->dpcd[DP_DPCD_REV] = dpcd_ext[DP_DPCD_REV];
> + intel_dp->dpcd[DP_MAX_LINK_RATE] = dpcd_ext[DP_MAX_LINK_RATE];
> + intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] =
> + dpcd_ext[DP_DOWNSTREAMPORT_PRESENT];
> + }
> DRM_DEBUG_KMS("DPCD: %*ph\n", (int) sizeof(intel_dp->dpcd),
> intel_dp->dpcd);
>
> return intel_dp->dpcd[DP_DPCD_REV] != 0;
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index c01564991a9f..757bd5913f3d 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -123,8 +123,9 @@
> # define DP_FRAMING_CHANGE_CAP (1 << 1)
> # define DP_DPCD_DISPLAY_CONTROL_CAPABLE (1 << 3) /* edp v1.2 or higher
> */
>
> -#define DP_TRAINING_AUX_RD_INTERVAL 0x00e /* XXX 1.2? */
> -# define DP_TRAINING_AUX_RD_MASK0x7F/* XXX 1.2? */
> +#define DP_TRAINING_AUX_RD_INTERVAL 0x00e /* XXX 1.2? */
> +# define DP_TRAINING_AUX_RD_MASK0x7F/* XXX 1.2? */
> +# define DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT (1 << 7)/* XXX 1.2? */
>
> #define DP_ADAPTER_CAP 0x00f /* 1.2 */
> # define DP_FORCE_LOAD_SENSE_CAP (1 << 0)
> --
> 2.17.0
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/icl: Add power well support
== Series Details == Series: drm/i915/icl: Add power well support URL : https://patchwork.freedesktop.org/series/45409/ State : warning == Summary == $ dim checkpatch origin/drm-tip 409dfff082a1 drm/i915/icl: Add power well support -:17: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #17: - Pipe C has its own power well, so we can save some additional power in the -:326: WARNING:BLOCK_COMMENT_STYLE: Block comments should align the * on each line #326: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:1995: + /* + * - transcoder WD -:333: WARNING:BLOCK_COMMENT_STYLE: Block comments should align the * on each line #333: FILE: drivers/gpu/drm/i915/intel_runtime_pm.c:2002: + /* + * - eDP/DSI VDSC total: 0 errors, 3 warnings, 0 checks, 536 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 4/4] drm/i915: enable P010, P012, P016 formats for primary and sprite planes
Op 12-06-18 om 13:16 schreef Juha-Pekka Heikkila: > Enabling of P010, P012 and P016 formats. These formats will > extend NV12 for larger bit depths. > > Signed-off-by: Juha-Pekka Heikkila Patch series looks good. Reviewed-by: Maarten Lankhorst I only wish we had IGT support already, I'll poke upstream pixman/cairo some more about it. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/icl: Add power well support
Add the definition for ICL power wells and their mapping to power
domains. On ICL there are 3 power well control registers, we'll select
the correct one based on higher bits of the power well ID. The offset
for the control and status flags within this register is based on the
lower bits of the ID as on older platforms.
As the DC state programming is also the same as on old platforms we can
reuse the corresponding helpers. For this we mark here the DC-off power
well as shared among multiple platforms.
Other than the above the delta between old platforms and ICL:
- Pipe C has its own power well, so we can save some additional power in the
pipe A+B and (non-eDP) pipe A configurations.
- Power wells for port E/F DDI/AUX IO and Thunderbolt 1-4 AUX IO
v2:
- Rebase on drm-tip after prep patch for this was merged there as
requested by Paulo.
- Actually add the new AUX and DDI power well control regs (Rakshmi)
v3:
- Fix power well register names in code comments
- Add TBT AUX->power well 3 dependency
v4:
- Rebase
v5:
- Detach AUX power wells from the INIT power domain. These power wells
can only be enabled in a TC/TBT connected state and otherwise not
needed during driver initialization.
Cc: Animesh Manna
Cc: Rakshmi Bhatia
Cc: Paulo Zanoni
Signed-off-by: Imre Deak
Reviewed-by: Animesh Manna (v1)
---
drivers/gpu/drm/i915/i915_reg.h | 78 +++-
drivers/gpu/drm/i915/intel_display.h| 4 +
drivers/gpu/drm/i915/intel_runtime_pm.c | 329 +++-
3 files changed, 395 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index caad19f5f557..865b05ce8d76 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1045,13 +1045,13 @@ enum i915_power_well_id {
/*
* HSW/BDW
-* - HSW_PWR_WELL_CTL_DRIVER(0) (status bit: id*2, req bit: id*2+1)
+* - _HSW_PWR_WELL_CTL1-4 (status bit: id*2, req bit: id*2+1)
*/
HSW_DISP_PW_GLOBAL = 15,
/*
* GEN9+
-* - HSW_PWR_WELL_CTL_DRIVER(0) (status bit: id*2, req bit: id*2+1)
+* - _HSW_PWR_WELL_CTL1-4 (status bit: id*2, req bit: id*2+1)
*/
SKL_DISP_PW_MISC_IO = 0,
SKL_DISP_PW_DDI_A_E,
@@ -1075,17 +1075,54 @@ enum i915_power_well_id {
SKL_DISP_PW_2,
/* - custom power wells */
- SKL_DISP_PW_DC_OFF,
BXT_DPIO_CMN_A,
BXT_DPIO_CMN_BC,
- GLK_DPIO_CMN_C, /* 19 */
+ GLK_DPIO_CMN_C, /* 18 */
+
+ /*
+* GEN11+
+* - _HSW_PWR_WELL_CTL1-4
+*(status bit: (id&15)*2, req bit:(id&15)*2+1)
+*/
+ ICL_DISP_PW_1 = 0,
+ ICL_DISP_PW_2,
+ ICL_DISP_PW_3,
+ ICL_DISP_PW_4,
+
+ /*
+* - _HSW_PWR_WELL_CTL_AUX1/2/4
+*(status bit: (id&15)*2, req bit:(id&15)*2+1)
+*/
+ ICL_DISP_PW_AUX_A = 16,
+ ICL_DISP_PW_AUX_B,
+ ICL_DISP_PW_AUX_C,
+ ICL_DISP_PW_AUX_D,
+ ICL_DISP_PW_AUX_E,
+ ICL_DISP_PW_AUX_F,
+
+ ICL_DISP_PW_AUX_TBT1 = 24,
+ ICL_DISP_PW_AUX_TBT2,
+ ICL_DISP_PW_AUX_TBT3,
+ ICL_DISP_PW_AUX_TBT4,
+
+ /*
+* - _HSW_PWR_WELL_CTL_DDI1/2/4
+*(status bit: (id&15)*2, req bit:(id&15)*2+1)
+*/
+ ICL_DISP_PW_DDI_A = 32,
+ ICL_DISP_PW_DDI_B,
+ ICL_DISP_PW_DDI_C,
+ ICL_DISP_PW_DDI_D,
+ ICL_DISP_PW_DDI_E,
+ ICL_DISP_PW_DDI_F, /* 37 */
/*
* Multiple platforms.
* Must start following the highest ID of any platform.
* - custom power wells
*/
- I915_DISP_PW_ALWAYS_ON = 20,
+ SKL_DISP_PW_DC_OFF = 38,
+ I915_DISP_PW_ALWAYS_ON,
};
#define PUNIT_REG_PWRGT_CTRL 0x60
@@ -1679,6 +1716,13 @@ enum i915_power_well_id {
#define IREF1RC_OFFSET_MASK (0xFF << IREF1RC_OFFSET_SHIFT)
#define BXT_PORT_CL1CM_DW10(phy) _BXT_PHY((phy), _PORT_CL1CM_DW10_BC)
+#define _ICL_PORT_CL_DW12_A0x162030
+#define _ICL_PORT_CL_DW12_B0x6C030
+#define ICL_LANE_ENABLE_AUX (1 << 0)
+#define ICL_PORT_CL_DW12(port) _MMIO(_PICK((port), \
+ _ICL_PORT_CL_DW12_A, \
+ _ICL_PORT_CL_DW12_B))
+
#define _PORT_CL1CM_DW28_A 0x162070
#define _PORT_CL1CM_DW28_BC0x6C070
#define OCL1_POWER_DOWN_EN (1 << 23)
@@ -8563,6 +8607,14 @@ enum {
#define _HSW_PWR_WELL_CTL3 0x45408
#define _HSW_PWR_WELL_CTL4 0x4540C
+#define _ICL_PWR_WELL_CTL_AUX1 0x45440
+#define _ICL_PWR_WELL_CTL_AUX2 0x45444
+#define _ICL_PWR_WELL_CTL_AUX4 0x4544C
+
+#define _ICL_PWR_WELL_CTL_DDI1 0x45450
+#define _ICL_PWR_WELL_CTL_DDI2
Re: [Intel-gfx] [PATCH v2 00/12] drm: Add generic fbdev emulation
On Tue, Jun 26, 2018 at 3:41 PM, Noralf Trønnes wrote:
>
> Den 21.06.2018 19.19, skrev Noralf Trønnes:
>>
>>
>> Den 21.06.2018 09.14, skrev Daniel Vetter:
>>>
>>> On Wed, Jun 20, 2018 at 05:28:10PM +0200, Noralf Trønnes wrote:
Den 20.06.2018 15.52, skrev Noralf Trønnes:
>
> Den 20.06.2018 11.34, skrev Daniel Vetter:
>>
>> On Mon, Jun 18, 2018 at 04:17:27PM +0200, Noralf Trønnes wrote:
>>>
>>> This patchset adds generic fbdev emulation for drivers that
>>> supports GEM
>>> based dumb buffers which support .gem_prime_vmap and gem_prime_mmap.
>>> An
>>> API is begun to support in-kernel clients in general.
>>>
>>> Notable changes since version 1:
>>>
>>> - Rework client unregister code. I've used reference counting to
>>> manage
>>> the fact that both the client itself and the driver through
>>> drm_dev_unregister() can release the client. The client is
>>> now released
>>> using drm_client_put() instead of drm_client_free().
>>
>> I started reviewing the reworked client register/unregister stuff,
>> and it
>> looks good, except this kref stuff here for clients. I don't
>> understand
>> why you need this - as long as removal from dev->clientlist is
>> properly
>> protected by the mutex, I don't see how both the client and the
>> device can
>> release the client at the same time. Of course this means that both
>> the
>> device-trigger unregister and the client-triggered unregister must
>> first
>> grab the mutex, remove the client from the list, and only if that
>> was done
>> succesfully, clean up the client. If the client is already removed
>> from
>> the list (i.e. list_empty() is true) then you need to bail out to
>> avoid
>> double-freeing.
>
> I just suck at this :/
>
> Use case:
> Unloading client module at the same time as the device is unplugged.
>>>
>>> Do we really want to be able to unload client modules? Atm you can't
>>> unload the drm fbdev emulation either while a driver is still using it.
>>> Dropping that requirement would make things even simpler (you'd just need
>>> to add an owner field to drm_client and a try_module_get when registering
>>> it, bailing out if that fails).
>>>
>>> What's the use-case you have in mind that requires that you can unload a
>>> client driver module? Does that even work with the shuffling we've done
>>> on
>>> the register side of things?
>>
>>
>> When I first started on this client API, the client could unload itself
>> and I had a sysfs file that would remove clients for a particular
>> drm_device. This would mean that unloading a driver would require clients
>> to be removed first by writing to the sysfs file.
>> Then I started to look at the possibility that the driver could remove
>> clients automatically on driver unload. I have wrecked my brain trying to
>> make it race free, but it gets very complicated as you have shown in your
>> example. So I think we'll just avoid this complexity altogether.
>>
>> So, now the question is, who gets to remove clients. The client or the
>> driver?
>> The common pattern is that clients can come and go on their own choosing.
>> It's what I would expect, that the client can be unloaded.
>> The reason I looked into auto unloading when the driver where going away,
>> was so developers shouldn't have to do the extra step to unload the
>> driver.
>>
>> Now I see a third case, and that's plug/unplug USB devices. If the driver
>> can't remove the client, we can end up with lots hanging drm_device and
>> drm_client_dev instances that have to be removed manually, which is
>> really not an option.
>>
>> So I think we remove clients on driver/device removal. This means that to
>> unload a client, the driver(s) would have to be unloaded first.
>>
>> I'll add an owner field to drm_client_funcs as you suggested and work out
>> the details.
>
>
> Currently drm_client_dev->funcs is optional, but should it be mandatory
> now that drm_client_funcs gets an owner field?
I think because of the unregister callback it makes little sense to
have clients without a function table. But you can also make the
try_module_get conditional on drm_client->funcs, if that makes more
sense to you. No opinion on my side really.
-Daniel
>
> Noralf.
>
>
>>
>> Thanks for helping me get this as simple and straightforward as possible.
>>
>> Noralf.
>>
> The client module calls drm_client_release():
>
> void drm_client_release(struct drm_client_dev *client)
> {
> struct drm_device *dev = client->dev;
>>>
>>> Not sure (without reading your patches again) why we have
>>> drm_client_close
>>> here and ->unregister/drm_client_release below. But the trick is roughly
>>> to do
>>> client = NULL;
>>>
>>> mutex_lock();
>>> client = find_it();
>>> if (client)
>>> list_del();
>>> mute_unlock();
>>>
>>> if (!client)
>>>
Re: [Intel-gfx] [PATCH v2 00/12] drm: Add generic fbdev emulation
Den 21.06.2018 19.19, skrev Noralf Trønnes:
Den 21.06.2018 09.14, skrev Daniel Vetter:
On Wed, Jun 20, 2018 at 05:28:10PM +0200, Noralf Trønnes wrote:
Den 20.06.2018 15.52, skrev Noralf Trønnes:
Den 20.06.2018 11.34, skrev Daniel Vetter:
On Mon, Jun 18, 2018 at 04:17:27PM +0200, Noralf Trønnes wrote:
This patchset adds generic fbdev emulation for drivers that
supports GEM
based dumb buffers which support .gem_prime_vmap and
gem_prime_mmap. An
API is begun to support in-kernel clients in general.
Notable changes since version 1:
- Rework client unregister code. I've used reference counting to
manage
the fact that both the client itself and the driver through
drm_dev_unregister() can release the client. The client is
now released
using drm_client_put() instead of drm_client_free().
I started reviewing the reworked client register/unregister stuff,
and it
looks good, except this kref stuff here for clients. I don't
understand
why you need this - as long as removal from dev->clientlist is
properly
protected by the mutex, I don't see how both the client and the
device can
release the client at the same time. Of course this means that
both the
device-trigger unregister and the client-triggered unregister must
first
grab the mutex, remove the client from the list, and only if that
was done
succesfully, clean up the client. If the client is already removed
from
the list (i.e. list_empty() is true) then you need to bail out to
avoid
double-freeing.
I just suck at this :/
Use case:
Unloading client module at the same time as the device is unplugged.
Do we really want to be able to unload client modules? Atm you can't
unload the drm fbdev emulation either while a driver is still using it.
Dropping that requirement would make things even simpler (you'd just
need
to add an owner field to drm_client and a try_module_get when
registering
it, bailing out if that fails).
What's the use-case you have in mind that requires that you can unload a
client driver module? Does that even work with the shuffling we've
done on
the register side of things?
When I first started on this client API, the client could unload itself
and I had a sysfs file that would remove clients for a particular
drm_device. This would mean that unloading a driver would require clients
to be removed first by writing to the sysfs file.
Then I started to look at the possibility that the driver could remove
clients automatically on driver unload. I have wrecked my brain trying to
make it race free, but it gets very complicated as you have shown in your
example. So I think we'll just avoid this complexity altogether.
So, now the question is, who gets to remove clients. The client or the
driver?
The common pattern is that clients can come and go on their own choosing.
It's what I would expect, that the client can be unloaded.
The reason I looked into auto unloading when the driver where going away,
was so developers shouldn't have to do the extra step to unload the
driver.
Now I see a third case, and that's plug/unplug USB devices. If the driver
can't remove the client, we can end up with lots hanging drm_device and
drm_client_dev instances that have to be removed manually, which is
really not an option.
So I think we remove clients on driver/device removal. This means that to
unload a client, the driver(s) would have to be unloaded first.
I'll add an owner field to drm_client_funcs as you suggested and work out
the details.
Currently drm_client_dev->funcs is optional, but should it be mandatory
now that drm_client_funcs gets an owner field?
Noralf.
Thanks for helping me get this as simple and straightforward as possible.
Noralf.
The client module calls drm_client_release():
void drm_client_release(struct drm_client_dev *client)
{
struct drm_device *dev = client->dev;
Not sure (without reading your patches again) why we have
drm_client_close
here and ->unregister/drm_client_release below. But the trick is roughly
to do
client = NULL;
mutex_lock();
client = find_it();
if (client)
list_del();
mute_unlock();
if (!client)
continue; /* or early return, whatever makes sense */
drm_client_unregister(client);
This way if you race there's:
- only one thread will win, since the removal from the list is locked
- no deadlocks, because the actual cleanup is done outside of the locks
The problem is applying this trick to each situation, since you need to
make sure that you get them all. Since you want to be able to unregister
from 2 different lists, with each their own locks, you need to nest the
above pattern in clever ways. In the client unregister function:
mutex_lock(fbdev_clients_lock);
client = list_first(fbdev_clients_list);
if (client)
list_del();
mutex_lock(client->dev);
if (!list_empty(client->dev_list))
list_del();
else
/* someone else raced us, give up */
client = NULL;
Re: [Intel-gfx] [PATCH v2] drm/i915: Fix assert_plane() warning on bootup with external display
On Mon, Jun 25, 2018 at 05:33:05PM -0700, Azhar Shaikh wrote:
> On KBL, WHL RVPs, booting up with an external display connected, triggers
> below warning, when the BiOS brings up the external display too.
> This warning is not seen during hotplug.
>
> [3.615226] [ cut here ]
> [3.619829] plane 1A assertion failure (expected on, current off)
> [3.632039] WARNING: CPU: 2 PID: 354 at
> drivers/gpu/drm/i915/intel_display.c:1294 assert_plane+0x71/0xbb
> [3.633920] iwlwifi :00:14.3: loaded firmware version 38.c0e03d94.0
> op_mode iwlmvm
> [3.647157] Modules linked in: iwlwifi cfg80211 btusb btrtl btbcm btintel
> bluetooth ecdh_generic
> [3.647163] CPU: 2 PID: 354 Comm: frecon Not tainted
> 4.17.0-rc7-50176-g655af12d39c2 #3
> [3.647165] Hardware name: Intel Corporation CoffeeLake Client
> Platform/WhiskeyLake U DDR4 ERB, BIOS CNLSFWR1.R00.X140.B00.1804040304
> 04/04/2018
> [3.684509] RIP: 0010:assert_plane+0x71/0xbb
> [3.764451] Call Trace:
> [3.766888] intel_atomic_commit_tail+0xa97/0xb77
> [3.771569] intel_atomic_commit+0x26a/0x279
> [3.771572] drm_atomic_helper_set_config+0x5c/0x76
> [3.780670] __drm_mode_set_config_internal+0x66/0x109
> [3.780672] drm_mode_setcrtc+0x4c9/0x5cc
> [3.780674] ? drm_mode_getcrtc+0x162/0x162
> [3.789774] ? drm_mode_getcrtc+0x162/0x162
> [3.798108] drm_ioctl_kernel+0x8d/0xe4
> [3.801926] drm_ioctl+0x27d/0x368
> [3.805311] ? drm_mode_getcrtc+0x162/0x162
> [3.805314] ? selinux_file_ioctl+0x14e/0x199
> [3.805317] vfs_ioctl+0x21/0x2f
> [3.813812] do_vfs_ioctl+0x491/0x4b4
> [3.813813] ? security_file_ioctl+0x37/0x4b
> [3.813816] ksys_ioctl+0x55/0x75
> [3.820672] __x64_sys_ioctl+0x1a/0x1e
> [3.820674] do_syscall_64+0x51/0x5f
> [3.820678] entry_SYSCALL_64_after_hwframe+0x44/0xa9
> [3.828221] RIP: 0033:0x7b5e04953967
> [3.835504] RSP: 002b:7fff2eafb6f8 EFLAGS: 0246 ORIG_RAX:
> 0010
> [3.835505] RAX: ffda RBX: 0002 RCX:
> 7b5e04953967
> [3.835505] RDX: 7fff2eafb730 RSI: c06864a2 RDI:
> 000f
> [3.835506] RBP: 7fff2eafb720 R08: R09:
>
> [3.835507] R10: 0070 R11: 0246 R12:
> 000f
> [3.879988] R13: 56bc9dd7d210 R14: 7fff2eafb730 R15:
> c06864a2
> [3.887081] Code: 48 c7 c7 06 71 a5 be 84 c0 48 c7 c2 06 fd a3 be 48 89 f9
> 48 0f 44 ca 84 db 48 0f 45 d7 48 c7 c7 df d3 a4 be 31 c0 e8 af a0 c0 ff <0f>
> 0b eb 2b 48 c7 c7 06 fd a3 be 84 c0 48 c7 c2 06 71 a5 be 48
> [3.905845] WARNING: CPU: 2 PID: 354 at
> drivers/gpu/drm/i915/intel_display.c:1294 assert_plane+0x71/0xbb
> [3.920964] ---[ end trace dac692f4ac46391a ]---
>
> The warning is seen when mode_setcrtc() is called for pipeB
> during bootup and before we get a mode_setcrtc() for pipeA,
> while doing update_crtcs() in intel_atomic_commit_tail().
> Now since, plane1A is still active after commit, update_crtcs()
> is done for pipeA and eventually update_plane() for plane1A.
>
> intel_plane_state->ctl for plane1A is not updated since set_modecrtc() is
> called for pipeB. So intel_plane_state->ctl for plane 1A will be 0x0.
> So doing an update_plane() for plane1A, will result in clearing
> PLANE_CTL_ENABLE bit, and hence the warning.
>
> To fix this warning, force all active planes to recompute their states
> in probe.
>
> Signed-off-by: Azhar Shaikh
> ---
> Changes in v2:
> - Force all planes to recompute their states.(Ville Syrjälä)
> - Update the commit message
>
> drivers/gpu/drm/i915/intel_display.c | 49
>
> 1 file changed, 49 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 3709fa1b6318..1511d58991cc 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -15092,6 +15092,51 @@ static void intel_update_fdi_pll_freq(struct
> drm_i915_private *dev_priv)
> DRM_DEBUG_DRIVER("FDI PLL freq=%d\n", dev_priv->fdi_pll_freq);
> }
>
> +static void intel_initial_commit(struct drm_device *dev,
> + struct intel_crtc *intel_crtc)
> +{
> + struct drm_atomic_state *state = NULL;
> + struct drm_crtc *crtc = _crtc->base;
> + struct drm_modeset_acquire_ctx ctx;
> + struct drm_crtc_state *crtc_state;
> + int ret;
> +
> + drm_modeset_acquire_init(, 0);
> +
> + state = drm_atomic_state_alloc(dev);
> + if (!state)
> + goto unlock;
> +
> + state->acquire_ctx =
> +
I would put the for_each_crtc() loop here so that a single atomic commit
will take care of all the active pipes.
> + crtc_state = drm_atomic_get_crtc_state(state, crtc);
> + if (IS_ERR(crtc_state))
> + goto out;
> +
> + if (!crtc_state->active)
> + goto out;
> +
