[Intel-gfx] [drm-tip:drm-tip 1685/1713] htmldocs: drivers/gpu/drm/drm_syncobj.c:230: warning: Function parameter or member 'flags' not described in 'drm_syncobj_find_fence'
tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip head: c4fc9e99d838c9b9a3f6bdb6e609b0cf820f9aef commit: 649fdce23cdf516e69aa8c18f4b44c62127f0e83 [1685/1713] drm: add flags to drm_syncobj_find_fence reproduce: make htmldocs All warnings (new ones prefixed by >>): include/net/mac80211.h:977: warning: Function parameter or member 'status.antenna' not described in 'ieee80211_tx_info' include/net/mac80211.h:977: warning: Function parameter or member 'status.tx_time' not described in 'ieee80211_tx_info' include/net/mac80211.h:977: warning: Function parameter or member 'status.is_valid_ack_signal' not described in 'ieee80211_tx_info' include/net/mac80211.h:977: warning: Function parameter or member 'status.status_driver_data' not described in 'ieee80211_tx_info' include/net/mac80211.h:977: warning: Function parameter or member 'driver_rates' not described in 'ieee80211_tx_info' include/net/mac80211.h:977: warning: Function parameter or member 'pad' not described in 'ieee80211_tx_info' include/net/mac80211.h:977: warning: Function parameter or member 'rate_driver_data' not described in 'ieee80211_tx_info' net/mac80211/sta_info.h:588: warning: Function parameter or member 'rx_stats_avg' not described in 'sta_info' net/mac80211/sta_info.h:588: warning: Function parameter or member 'rx_stats_avg.signal' not described in 'sta_info' net/mac80211/sta_info.h:588: warning: Function parameter or member 'rx_stats_avg.chain_signal' not described in 'sta_info' net/mac80211/sta_info.h:588: warning: Function parameter or member 'status_stats.filtered' not described in 'sta_info' net/mac80211/sta_info.h:588: warning: Function parameter or member 'status_stats.retry_failed' not described in 'sta_info' net/mac80211/sta_info.h:588: warning: Function parameter or member 'status_stats.retry_count' not described in 'sta_info' net/mac80211/sta_info.h:588: warning: Function parameter or member 'status_stats.lost_packets' not described in 'sta_info' net/mac80211/sta_info.h:588: warning: Function parameter or member 'status_stats.last_tdls_pkt_time' not described in 'sta_info' net/mac80211/sta_info.h:588: warning: Function parameter or member 'status_stats.msdu_retries' not described in 'sta_info' net/mac80211/sta_info.h:588: warning: Function parameter or member 'status_stats.msdu_failed' not described in 'sta_info' net/mac80211/sta_info.h:588: warning: Function parameter or member 'status_stats.last_ack' not described in 'sta_info' net/mac80211/sta_info.h:588: warning: Function parameter or member 'status_stats.last_ack_signal' not described in 'sta_info' net/mac80211/sta_info.h:588: warning: Function parameter or member 'status_stats.ack_signal_filled' not described in 'sta_info' net/mac80211/sta_info.h:588: warning: Function parameter or member 'status_stats.avg_ack_signal' not described in 'sta_info' net/mac80211/sta_info.h:588: warning: Function parameter or member 'tx_stats.packets' not described in 'sta_info' net/mac80211/sta_info.h:588: warning: Function parameter or member 'tx_stats.bytes' not described in 'sta_info' net/mac80211/sta_info.h:588: warning: Function parameter or member 'tx_stats.last_rate' not described in 'sta_info' net/mac80211/sta_info.h:588: warning: Function parameter or member 'tx_stats.msdu' not described in 'sta_info' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_excl.cb' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_excl.poll' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_excl.active' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_shared.cb' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_shared.poll' not described in 'dma_buf' include/linux/dma-buf.h:304: warning: Function parameter or member 'cb_shared.active' not described in 'dma_buf' include/linux/dma-fence-array.h:54: warning: Function parameter or member 'work' not described in 'dma_fence_array' include/linux/gpio/driver.h:142: warning: Function parameter or member 'request_key' not described in 'gpio_irq_chip' include/linux/iio/hw-consumer.h:1: warning: no structured comments found include/linux/input/sparse-keymap.h:46: warning: Function parameter or member 'sw' not described in 'key_entry' drivers/pci/pci.c:218: warning: Excess function parameter 'p' description in 'pci_dev_str_match_path' include/linux/regulator/driver.h:227: warning: Function parameter or member 'resume' not described in 'regulator_ops' drivers/regulator/core.c:4479: warning: Excess function parameter 'state' description in 'regulator_suspend' arch/s390/include/asm/cio.h:245: warning: Function parameter or member 'esw.esw0' not described in 'irb' arch/s390/include/asm/cio.h:245:
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/atomic_helper: Stop modesets on unregistered connectors harder (rev2)
== Series Details == Series: drm/atomic_helper: Stop modesets on unregistered connectors harder (rev2) URL : https://patchwork.freedesktop.org/series/51041/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4990_full -> Patchwork_10480_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_10480_full that come from known issues: === IGT changes === Issues hit igt@gem_exec_schedule@pi-ringfull-bsd: shard-skl: NOTRUN -> FAIL (fdo#103158) +1 igt@gem_exec_schedule@pi-ringfull-render: shard-glk: NOTRUN -> FAIL (fdo#103158) igt@gem_ppgtt@blt-vs-render-ctxn: shard-skl: NOTRUN -> TIMEOUT (fdo#108039) igt@gem_render_copy_redux@interruptible: shard-kbl: PASS -> INCOMPLETE (fdo#103665, fdo#106650) igt@kms_atomic_transition@1x-modeset-transitions-nonblocking: shard-skl: NOTRUN -> FAIL (fdo#108228) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +2 igt@kms_busy@extended-pageflip-hang-newfb-render-a: shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: shard-hsw: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_ccs@pipe-a-crc-primary-basic: shard-skl: PASS -> FAIL (fdo#107725) igt@kms_cursor_crc@cursor-256x256-onscreen: shard-skl: NOTRUN -> FAIL (fdo#103232) igt@kms_cursor_crc@cursor-64x64-suspend: shard-skl: PASS -> INCOMPLETE (fdo#104108) igt@kms_draw_crc@draw-method-xrgb2101010-pwrite-untiled: shard-skl: NOTRUN -> FAIL (fdo#103184) +1 igt@kms_fbcon_fbt@psr: shard-skl: NOTRUN -> FAIL (fdo#107882) igt@kms_flip@2x-busy-flip-interruptible: shard-glk: PASS -> FAIL (fdo#103257) igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: shard-glk: PASS -> FAIL (fdo#105363) igt@kms_flip@basic-flip-vs-dpms: shard-kbl: PASS -> DMESG-WARN (fdo#103313, fdo#105345) igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-apl: PASS -> FAIL (fdo#102887, fdo#105363) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt: shard-glk: NOTRUN -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbc-stridechange: shard-skl: NOTRUN -> FAIL (fdo#105683) igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-render: shard-skl: NOTRUN -> FAIL (fdo#105682) igt@kms_frontbuffer_tracking@fbcpsr-farfromfence: shard-skl: PASS -> FAIL (fdo#103167) +2 igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite: shard-skl: NOTRUN -> FAIL (fdo#103167) +6 igt@kms_panel_fitting@legacy: shard-skl: NOTRUN -> FAIL (fdo#105456) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: shard-apl: PASS -> DMESG-WARN (fdo#105602, fdo#103558) igt@kms_plane@pixel-format-pipe-b-planes: shard-skl: NOTRUN -> DMESG-FAIL (fdo#103166, fdo#106885) igt@kms_plane@plane-position-covered-pipe-b-planes: shard-glk: NOTRUN -> FAIL (fdo#103166) +1 igt@kms_plane_alpha_blend@pipe-a-alpha-basic: shard-skl: NOTRUN -> FAIL (fdo#108145, fdo#107815) igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: shard-skl: PASS -> FAIL (fdo#108145, fdo#107815) igt@kms_plane_alpha_blend@pipe-b-alpha-7efc: shard-skl: NOTRUN -> FAIL (fdo#108146) igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb: shard-skl: NOTRUN -> FAIL (fdo#108145) +1 igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max: shard-glk: NOTRUN -> FAIL (fdo#108145) igt@kms_rotation_crc@primary-rotation-180: shard-skl: PASS -> FAIL (fdo#103925, fdo#107815) igt@kms_setmode@basic: shard-glk: NOTRUN -> FAIL (fdo#99912) shard-snb: NOTRUN -> FAIL (fdo#99912) igt@kms_sysfs_edid_timing: shard-skl: NOTRUN -> FAIL (fdo#100047) igt@kms_universal_plane@universal-plane-pipe-c-functional: shard-glk: PASS -> FAIL (fdo#103166) igt@pm_rpm@reg-read-ioctl: shard-skl: PASS -> INCOMPLETE (fdo#107807) Possible fixes igt@kms_vblank@pipe-a-ts-continuation-suspend: shard-skl: INCOMPLETE (fdo#104108, fdo#107773) -> PASS igt@pm_rpm@system-suspend-execbuf: shard-skl: INCOMPLETE (fdo#104108, fdo#107807, fdo#107773) -> PASS fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047 fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103166
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915/guc: rename __create/destroy_doorbell
== Series Details == Series: series starting with [1/4] drm/i915/guc: rename __create/destroy_doorbell URL : https://patchwork.freedesktop.org/series/51090/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4991 -> Patchwork_10483 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10483 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10483, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/51090/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10483: === IGT changes === Possible regressions igt@drv_selftest@live_gem: fi-whl-u: PASS -> INCOMPLETE fi-skl-6600u: PASS -> INCOMPLETE fi-cfl-s3: PASS -> INCOMPLETE fi-skl-iommu: PASS -> INCOMPLETE fi-skl-6700k2: PASS -> INCOMPLETE fi-skl-6700hq: PASS -> INCOMPLETE fi-cfl-8109u: PASS -> INCOMPLETE fi-kbl-7500u: PASS -> INCOMPLETE fi-cfl-8700k: PASS -> INCOMPLETE fi-skl-6770hq: PASS -> INCOMPLETE fi-skl-6260u: PASS -> INCOMPLETE fi-kbl-7567u: PASS -> INCOMPLETE fi-kbl-x1275: PASS -> INCOMPLETE fi-kbl-8809g: PASS -> INCOMPLETE fi-kbl-r: PASS -> INCOMPLETE == Known issues == Here are the changes found in Patchwork_10483 that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_gem: fi-skl-gvtdvm: PASS -> INCOMPLETE (fdo#105600) fi-bxt-j4205: PASS -> INCOMPLETE (fdo#103927) igt@gem_exec_suspend@basic-s3: fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718) igt@kms_frontbuffer_tracking@basic: fi-byt-clapper: PASS -> FAIL (fdo#103167) Possible fixes igt@kms_frontbuffer_tracking@basic: fi-hsw-peppy: DMESG-WARN (fdo#102614) -> PASS fi-icl-u2: FAIL (fdo#103167) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS +1 fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#105600 https://bugs.freedesktop.org/show_bug.cgi?id=105600 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 == Participating hosts (40 -> 37) == Additional (1): fi-kbl-guc Missing(4): fi-byt-squawks fi-ilk-m540 fi-bxt-dsi fi-bsw-cyan == Build changes == * Linux: CI_DRM_4991 -> Patchwork_10483 CI_DRM_4991: c4fc9e99d838c9b9a3f6bdb6e609b0cf820f9aef @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4682: 0ac43db33e116b546e5704fe0b4dde21f391e09c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10483: d1732e3157ebe92fefa0541e0392bb8bb8cde8ee @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == d1732e3157eb HAX enable GuC for CI 0b833f0bbd1e drm/i915/guc: do not print drbreg on error 0b8643c82cf6 drm/i915/guc: reserve the doorbell before selecting the cacheline 7ece2bdc16d7 drm/i915/guc: rename __create/destroy_doorbell == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10483/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/guc: rename __create/destroy_doorbell
== Series Details == Series: series starting with [1/4] drm/i915/guc: rename __create/destroy_doorbell URL : https://patchwork.freedesktop.org/series/51090/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7ece2bdc16d7 drm/i915/guc: rename __create/destroy_doorbell 0b8643c82cf6 drm/i915/guc: reserve the doorbell before selecting the cacheline 0b833f0bbd1e drm/i915/guc: do not print drbreg on error -:28: WARNING:LINE_SPACING: Missing a blank line after declarations #28: FILE: drivers/gpu/drm/i915/intel_guc_submission.c:198: + struct drm_i915_private *dev_priv = guc_to_i915(guc); + return I915_READ(GEN8_DRBREGL(db_id)) & GEN8_DRB_VALID; total: 0 errors, 1 warnings, 0 checks, 50 lines checked d1732e3157eb HAX enable GuC for CI -:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one total: 0 errors, 1 warnings, 0 checks, 8 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 4/4] HAX enable GuC for CI
From: Michal Wajdeczko Signed-off-by: Michal Wajdeczko --- drivers/gpu/drm/i915/i915_params.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 7e56c516c815..c681537bcb92 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b/drivers/gpu/drm/i915/i915_params.h @@ -45,7 +45,7 @@ struct drm_printer; param(int, disable_power_well, -1) \ param(int, enable_ips, 1) \ param(int, invert_brightness, 0) \ - param(int, enable_guc, 0) \ + param(int, enable_guc, -1) \ param(int, guc_log_level, -1) \ param(char *, guc_firmware_path, NULL) \ param(char *, huc_firmware_path, NULL) \ -- 2.19.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 3/4] drm/i915/guc: do not print drbreg on error
The only content of the register apart from the valid bit is the lower
part of the physical memory address. If the valid bit is 0 the address
is meaningless, while if it is 1 we don't know which descriptor it came
from (since the doorbell is in an unexpected state) so we can't match it
to an expected value. Since we already print the state of the valid bit,
stop priniting the full register contents as they're just confusing.
While at it, move the checking of the valid bit to a common helper.
Cc: Michal Wajdeczko
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/intel_guc_submission.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c
b/drivers/gpu/drm/i915/intel_guc_submission.c
index 8c3b5a9facee..cba84480dad9 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -192,6 +192,12 @@ static struct guc_doorbell_info *__get_doorbell(struct
intel_guc_client *client)
return client->vaddr + client->doorbell_offset;
}
+static bool __doorbell_valid(struct intel_guc *guc, u16 db_id)
+{
+ struct drm_i915_private *dev_priv = guc_to_i915(guc);
+ return I915_READ(GEN8_DRBREGL(db_id)) & GEN8_DRB_VALID;
+}
+
static void __init_doorbell(struct intel_guc_client *client)
{
struct guc_doorbell_info *doorbell;
@@ -203,7 +209,6 @@ static void __init_doorbell(struct intel_guc_client *client)
static void __fini_doorbell(struct intel_guc_client *client)
{
- struct drm_i915_private *dev_priv = guc_to_i915(client->guc);
struct guc_doorbell_info *doorbell;
u16 db_id = client->doorbell_id;
@@ -214,7 +219,7 @@ static void __fini_doorbell(struct intel_guc_client *client)
* to go to zero after updating db_status before we call the GuC to
* release the doorbell
*/
- if (wait_for_us(!(I915_READ(GEN8_DRBREGL(db_id)) & GEN8_DRB_VALID), 10))
+ if (wait_for_us(!__doorbell_valid(client->guc, db_id), 10))
WARN_ONCE(true, "Doorbell never became invalid after
disable\n");
}
@@ -866,20 +871,17 @@ guc_reset_prepare(struct intel_engine_cs *engine)
/* Check that a doorbell register is in the expected state */
static bool doorbell_ok(struct intel_guc *guc, u16 db_id)
{
- struct drm_i915_private *dev_priv = guc_to_i915(guc);
- u32 drbregl;
bool valid;
GEM_BUG_ON(db_id >= GUC_DOORBELL_INVALID);
- drbregl = I915_READ(GEN8_DRBREGL(db_id));
- valid = drbregl & GEN8_DRB_VALID;
+ valid = __doorbell_valid(guc, db_id);
if (test_bit(db_id, guc->doorbell_bitmap) == valid)
return true;
- DRM_DEBUG_DRIVER("Doorbell %d has unexpected state (0x%x): valid=%s\n",
-db_id, drbregl, yesno(valid));
+ DRM_DEBUG_DRIVER("Doorbell %d has unexpected state: valid=%s\n",
+db_id, yesno(valid));
return false;
}
--
2.19.0
___
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Intel-gfx@lists.freedesktop.org
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[Intel-gfx] [PATCH 2/4] drm/i915/guc: reserve the doorbell before selecting the cacheline
Cacheline selection is only needed if we actually manage to reserve a
doorbell.
Cc: Michal Wajdeczko
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/intel_guc_submission.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c
b/drivers/gpu/drm/i915/intel_guc_submission.c
index b089e5283307..8c3b5a9facee 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -955,6 +955,10 @@ guc_client_alloc(struct drm_i915_private *dev_priv,
}
client->vaddr = vaddr;
+ ret = reserve_doorbell(client);
+ if (ret)
+ goto err_vaddr;
+
client->doorbell_offset = __select_cacheline(guc);
/*
@@ -967,10 +971,6 @@ guc_client_alloc(struct drm_i915_private *dev_priv,
else
client->proc_desc_offset = (GUC_DB_SIZE / 2);
- ret = reserve_doorbell(client);
- if (ret)
- goto err_vaddr;
-
DRM_DEBUG_DRIVER("new priority %u client %p for engine(s) 0x%x:
stage_id %u\n",
priority, client, client->engines, client->stage_id);
DRM_DEBUG_DRIVER("doorbell id %u, cacheline offset 0x%lx\n",
--
2.19.0
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/4] drm/i915/guc: rename __create/destroy_doorbell
The 2 functions don't create or destroy anything, they just update the
doorbell state in memory. Use init and fini instead for clarity.
Cc: Michal Wajdeczko
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/intel_guc_submission.c | 12 ++--
drivers/gpu/drm/i915/selftests/intel_guc.c | 4 ++--
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c
b/drivers/gpu/drm/i915/intel_guc_submission.c
index eae668442ebe..b089e5283307 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -192,7 +192,7 @@ static struct guc_doorbell_info *__get_doorbell(struct
intel_guc_client *client)
return client->vaddr + client->doorbell_offset;
}
-static void __create_doorbell(struct intel_guc_client *client)
+static void __init_doorbell(struct intel_guc_client *client)
{
struct guc_doorbell_info *doorbell;
@@ -201,7 +201,7 @@ static void __create_doorbell(struct intel_guc_client
*client)
doorbell->cookie = 0;
}
-static void __destroy_doorbell(struct intel_guc_client *client)
+static void __fini_doorbell(struct intel_guc_client *client)
{
struct drm_i915_private *dev_priv = guc_to_i915(client->guc);
struct guc_doorbell_info *doorbell;
@@ -226,11 +226,11 @@ static int create_doorbell(struct intel_guc_client
*client)
return -ENODEV; /* internal setup error, should never happen */
__update_doorbell_desc(client, client->doorbell_id);
- __create_doorbell(client);
+ __init_doorbell(client);
ret = __guc_allocate_doorbell(client->guc, client->stage_id);
if (ret) {
- __destroy_doorbell(client);
+ __fini_doorbell(client);
__update_doorbell_desc(client, GUC_DOORBELL_INVALID);
DRM_DEBUG_DRIVER("Couldn't create client %u doorbell: %d\n",
client->stage_id, ret);
@@ -246,7 +246,7 @@ static int destroy_doorbell(struct intel_guc_client *client)
GEM_BUG_ON(!has_doorbell(client));
- __destroy_doorbell(client);
+ __fini_doorbell(client);
ret = __guc_deallocate_doorbell(client->guc, client->stage_id);
if (ret)
DRM_ERROR("Couldn't destroy client %u doorbell: %d\n",
@@ -1087,7 +1087,7 @@ static void __guc_client_disable(struct intel_guc_client
*client)
if (intel_guc_is_alive(client->guc))
destroy_doorbell(client);
else
- __destroy_doorbell(client);
+ __fini_doorbell(client);
guc_stage_desc_fini(client);
guc_proc_desc_fini(client);
diff --git a/drivers/gpu/drm/i915/selftests/intel_guc.c
b/drivers/gpu/drm/i915/selftests/intel_guc.c
index bf27162fb327..c3b6f8d02aa0 100644
--- a/drivers/gpu/drm/i915/selftests/intel_guc.c
+++ b/drivers/gpu/drm/i915/selftests/intel_guc.c
@@ -233,7 +233,7 @@ static int igt_guc_clients(void *args)
unreserve_doorbell(guc->execbuf_client);
- __create_doorbell(guc->execbuf_client);
+ __init_doorbell(guc->execbuf_client);
err = __guc_allocate_doorbell(guc, guc->execbuf_client->stage_id);
if (err != -EIO) {
pr_err("unexpected (err = %d)", err);
@@ -248,7 +248,7 @@ static int igt_guc_clients(void *args)
out_db:
/* clean after test */
- __destroy_doorbell(guc->execbuf_client);
+ __fini_doorbell(guc->execbuf_client);
err = reserve_doorbell(guc->execbuf_client);
if (err) {
pr_err("failed to reserve back the doorbell back\n");
--
2.19.0
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[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/2] drm/i915/guc: fix GuC suspend/resume
== Series Details == Series: series starting with [v2,1/2] drm/i915/guc: fix GuC suspend/resume URL : https://patchwork.freedesktop.org/series/51088/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4991 -> Patchwork_10482 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10482 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10482, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/51088/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10482: === IGT changes === Possible regressions igt@drv_selftest@live_guc: fi-kbl-7567u: PASS -> DMESG-WARN fi-skl-gvtdvm: PASS -> DMESG-WARN fi-skl-iommu: PASS -> DMESG-WARN fi-skl-6260u: PASS -> DMESG-WARN fi-bxt-dsi: PASS -> DMESG-WARN fi-skl-6700k2: PASS -> DMESG-WARN fi-whl-u: PASS -> DMESG-WARN fi-skl-6770hq: PASS -> DMESG-WARN fi-kbl-8809g: PASS -> DMESG-WARN fi-kbl-x1275: PASS -> DMESG-WARN fi-bxt-j4205: PASS -> DMESG-WARN fi-skl-6700hq: PASS -> DMESG-WARN fi-cfl-s3: PASS -> DMESG-WARN fi-cfl-8109u: PASS -> DMESG-WARN fi-kbl-7500u: PASS -> DMESG-WARN fi-cfl-8700k: PASS -> DMESG-WARN igt@drv_selftest@live_hangcheck: fi-kbl-r: PASS -> INCOMPLETE fi-whl-u: PASS -> DMESG-FAIL == Known issues == Here are the changes found in Patchwork_10482 that come from known issues: === IGT changes === Issues hit igt@kms_pipe_crc_basic@read-crc-pipe-a: fi-ilk-650: PASS -> DMESG-WARN (fdo#106387) igt@pm_rpm@module-reload: fi-skl-6600u: PASS -> INCOMPLETE (fdo#107807) Possible fixes igt@kms_frontbuffer_tracking@basic: fi-hsw-peppy: DMESG-WARN (fdo#102614) -> PASS fi-icl-u2: FAIL (fdo#103167) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS +1 fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#106387 https://bugs.freedesktop.org/show_bug.cgi?id=106387 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807 == Participating hosts (40 -> 37) == Additional (1): fi-kbl-guc Missing(4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-snb-2520m == Build changes == * Linux: CI_DRM_4991 -> Patchwork_10482 CI_DRM_4991: c4fc9e99d838c9b9a3f6bdb6e609b0cf820f9aef @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4682: 0ac43db33e116b546e5704fe0b4dde21f391e09c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10482: 6e16f86cee15acffb8e4e2cba6abedbca631630b @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 6e16f86cee15 HAX enable GuC for CI 8971200da2a4 drm/i915/guc: fix GuC suspend/resume == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10482/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/2] drm/i915/guc: fix GuC suspend/resume
== Series Details == Series: series starting with [v2,1/2] drm/i915/guc: fix GuC suspend/resume URL : https://patchwork.freedesktop.org/series/51088/ State : warning == Summary == $ dim checkpatch origin/drm-tip 8971200da2a4 drm/i915/guc: fix GuC suspend/resume -:102: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations #102: FILE: drivers/gpu/drm/i915/intel_guc_fwif.h:695: +}; +#define INTEL_GUC_SLEEP_STATE_INVALID_MASK 0x8000 total: 0 errors, 0 warnings, 1 checks, 73 lines checked 6e16f86cee15 HAX enable GuC for CI -:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one total: 0 errors, 1 warnings, 0 checks, 8 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/cnp+: update to the new RAWCLK_FREQ recommendations
On Tue, Oct 16, 2018 at 04:00:26PM -0700, Paulo Zanoni wrote:
> Em Sex, 2018-10-12 às 15:42 +0300, Ville Syrjälä escreveu:
> > On Thu, Oct 11, 2018 at 05:40:45PM -0700, Paulo Zanoni wrote:
> > > These are the new recommended values provided by our spec (18 -> 19
> > > and 23 -> 24). It seems this should help fixing GMBUS issues. Since
> > > we're doing pretty much the same thing for both CNP and ICP now,
> > > unify
> > > the functions using the ICP version since it's more straightforward
> > > by
> > > just matching the values listed in BSpec instead of recalculating
> > > them.
> >
> > IMO calculating would be better. Would be trivial to see that the
> > values
> > are at least consistent. With four magic numbers you have no choice
> > but
> > to dig up the spec, which is painful. I don't like needless pain that
> > much.
>
> Then I guess our workloads are different. IMHO the code is trivial when
> we can easily see that we set the exact magic values that the spec
> tells us to set. With the formula, you have to do the calculations for
> both frequencies, then you take those values and compare against the
> spec, which is an extra step. Developing without the spec open is
> something that I never even consider.
I am assumed lazy, so for me it is much better if I can put something
side by side and compare. So having it matching with whatever/however
spec is telling us is always better than calculations.
In case spec changes and we get notification it is easier to get and
change values directly.
>
> Anyway, I can submit another version with the cnl model, no problem.
>
> >
> > >
> > > Signed-off-by: Paulo Zanoni
> > > ---
> > > drivers/gpu/drm/i915/i915_reg.h| 1 -
> > > drivers/gpu/drm/i915/intel_cdclk.c | 37 ++--
> > > -
> > > 2 files changed, 6 insertions(+), 32 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > > b/drivers/gpu/drm/i915/i915_reg.h
> > > index 20785417953d..ffd564a8d339 100644
> > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > @@ -7832,7 +7832,6 @@ enum {
> > > #define CNP_RAWCLK_DIV(div) ((div) << 16)
> > > #define CNP_RAWCLK_FRAC_MASK(0xf << 26)
> > > #define CNP_RAWCLK_FRAC(frac) ((frac) << 26)
> > > -#define ICP_RAWCLK_DEN(den) ((den) << 26)
> > > #define ICP_RAWCLK_NUM(num) ((num) << 11)
> > >
> > > #define PCH_DPLL_TMR_CFG_MMIO(0xc6208)
> > > diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
> > > b/drivers/gpu/drm/i915/intel_cdclk.c
> > > index 29075c763428..17d3f13d89db 100644
> > > --- a/drivers/gpu/drm/i915/intel_cdclk.c
> > > +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> > > @@ -2660,48 +2660,25 @@ void intel_update_cdclk(struct
> > > drm_i915_private *dev_priv)
> > > }
> > >
> > > static int cnp_rawclk(struct drm_i915_private *dev_priv)
> > > -{
> > > - u32 rawclk;
> > > - int divider, fraction;
> > > -
> > > - if (I915_READ(SFUSE_STRAP) & SFUSE_STRAP_RAW_FREQUENCY) {
> > > - /* 24 MHz */
> > > - divider = 24000;
> > > - fraction = 0;
> > > - } else {
> > > - /* 19.2 MHz */
> > > - divider = 19000;
> > > - fraction = 200;
> > > - }
> > > -
> > > - rawclk = CNP_RAWCLK_DIV((divider / 1000) - 1);
> > > - if (fraction)
> > > - rawclk |= CNP_RAWCLK_FRAC(DIV_ROUND_CLOSEST(1000,
> > > - fracti
> > > on) - 1);
> > > -
> > > - I915_WRITE(PCH_RAWCLK_FREQ, rawclk);
> > > - return divider + fraction;
> > > -}
> > > -
> > > -static int icp_rawclk(struct drm_i915_private *dev_priv)
> > > {
> > > u32 rawclk;
> > > int divider, numerator, denominator, frequency;
> > >
> > > if (I915_READ(SFUSE_STRAP) & SFUSE_STRAP_RAW_FREQUENCY) {
> > > frequency = 24000;
> > > - divider = 23;
> > > + divider = 24;
> > > numerator = 0;
> > > denominator = 0;
> > > } else {
> > > frequency = 19200;
> > > - divider = 18;
> > > + divider = 19;
> > > numerator = 1;
> > > denominator = 4;
> >
> > These numbers are extremely confusing. The hardware wants the
> > numerator
> > as is but then it wants denominator-1. Which is a but odd. I think
> > I'd
> > move the -1 for the denominator into the macro (or the invocation of
> > the
> > macro, like cnp had). Alternatively we could at least write this as
> > 5-1
> > here, so that the reader has at least some chance to figure out what
> > this means.
> >
> > > }
> > >
> > > - rawclk = CNP_RAWCLK_DIV(divider) |
> > > ICP_RAWCLK_NUM(numerator) |
> > > - ICP_RAWCLK_DEN(denominator);
> > > + rawclk = CNP_RAWCLK_DIV(divider) |
> > > CNP_RAWCLK_FRAC(denominator);
> > > + if (HAS_PCH_ICP(dev_priv))
> > > + rawclk |= ICP_RAWCLK_NUM(numerator);
> > >
> > > I915_WRITE(PCH_RAWCLK_FREQ, rawclk);
> > > return frequency;
> > > @@ -2754,9 +2731,7 @@ static int g4x_hrawclk(struct
> > >
Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Fix Gen9 GuC loading workarounds
On 16/10/18 01:59, Michal Wajdeczko wrote:
In commit 4502e9ec820d ("drm/i915/uc: Unify firmware loading") we
stopped converting errors detected during firmware transfer into
-EAGAIN and this indirectly killed our workarounds for Gen9 GuC.
Reactivate those workarounds by looking for actual -ETIMEDOUT error.
Testcase: igt@drv_selftest@live_hangcheck
Reported-by: Daniele Ceraolo Spurio
References: commit 4502e9ec820d ("drm/i915/uc: Unify firmware loading")
Reviewed-by: Daniele Ceraolo Spurio
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Chris Wilson
---
drivers/gpu/drm/i915/intel_uc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index b1b3e81..b34c318 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -376,7 +376,7 @@ int intel_uc_init_hw(struct drm_i915_private *i915)
intel_guc_init_params(guc);
ret = intel_guc_fw_upload(guc);
- if (ret == 0 || ret != -EAGAIN)
+ if (ret == 0 || ret != -ETIMEDOUT)
break;
DRM_DEBUG_DRIVER("GuC fw load failed: %d; will reset and "
___
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Re: [Intel-gfx] [PATCH] drm/i915/cnp+: update to the new RAWCLK_FREQ recommendations
Em Sex, 2018-10-12 às 15:42 +0300, Ville Syrjälä escreveu:
> On Thu, Oct 11, 2018 at 05:40:45PM -0700, Paulo Zanoni wrote:
> > These are the new recommended values provided by our spec (18 -> 19
> > and 23 -> 24). It seems this should help fixing GMBUS issues. Since
> > we're doing pretty much the same thing for both CNP and ICP now,
> > unify
> > the functions using the ICP version since it's more straightforward
> > by
> > just matching the values listed in BSpec instead of recalculating
> > them.
>
> IMO calculating would be better. Would be trivial to see that the
> values
> are at least consistent. With four magic numbers you have no choice
> but
> to dig up the spec, which is painful. I don't like needless pain that
> much.
Then I guess our workloads are different. IMHO the code is trivial when
we can easily see that we set the exact magic values that the spec
tells us to set. With the formula, you have to do the calculations for
both frequencies, then you take those values and compare against the
spec, which is an extra step. Developing without the spec open is
something that I never even consider.
Anyway, I can submit another version with the cnl model, no problem.
>
> >
> > Signed-off-by: Paulo Zanoni
> > ---
> > drivers/gpu/drm/i915/i915_reg.h| 1 -
> > drivers/gpu/drm/i915/intel_cdclk.c | 37 ++--
> > -
> > 2 files changed, 6 insertions(+), 32 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h
> > index 20785417953d..ffd564a8d339 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -7832,7 +7832,6 @@ enum {
> > #define CNP_RAWCLK_DIV(div) ((div) << 16)
> > #define CNP_RAWCLK_FRAC_MASK (0xf << 26)
> > #define CNP_RAWCLK_FRAC(frac) ((frac) << 26)
> > -#define ICP_RAWCLK_DEN(den) ((den) << 26)
> > #define ICP_RAWCLK_NUM(num) ((num) << 11)
> >
> > #define PCH_DPLL_TMR_CFG_MMIO(0xc6208)
> > diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
> > b/drivers/gpu/drm/i915/intel_cdclk.c
> > index 29075c763428..17d3f13d89db 100644
> > --- a/drivers/gpu/drm/i915/intel_cdclk.c
> > +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> > @@ -2660,48 +2660,25 @@ void intel_update_cdclk(struct
> > drm_i915_private *dev_priv)
> > }
> >
> > static int cnp_rawclk(struct drm_i915_private *dev_priv)
> > -{
> > - u32 rawclk;
> > - int divider, fraction;
> > -
> > - if (I915_READ(SFUSE_STRAP) & SFUSE_STRAP_RAW_FREQUENCY) {
> > - /* 24 MHz */
> > - divider = 24000;
> > - fraction = 0;
> > - } else {
> > - /* 19.2 MHz */
> > - divider = 19000;
> > - fraction = 200;
> > - }
> > -
> > - rawclk = CNP_RAWCLK_DIV((divider / 1000) - 1);
> > - if (fraction)
> > - rawclk |= CNP_RAWCLK_FRAC(DIV_ROUND_CLOSEST(1000,
> > - fracti
> > on) - 1);
> > -
> > - I915_WRITE(PCH_RAWCLK_FREQ, rawclk);
> > - return divider + fraction;
> > -}
> > -
> > -static int icp_rawclk(struct drm_i915_private *dev_priv)
> > {
> > u32 rawclk;
> > int divider, numerator, denominator, frequency;
> >
> > if (I915_READ(SFUSE_STRAP) & SFUSE_STRAP_RAW_FREQUENCY) {
> > frequency = 24000;
> > - divider = 23;
> > + divider = 24;
> > numerator = 0;
> > denominator = 0;
> > } else {
> > frequency = 19200;
> > - divider = 18;
> > + divider = 19;
> > numerator = 1;
> > denominator = 4;
>
> These numbers are extremely confusing. The hardware wants the
> numerator
> as is but then it wants denominator-1. Which is a but odd. I think
> I'd
> move the -1 for the denominator into the macro (or the invocation of
> the
> macro, like cnp had). Alternatively we could at least write this as
> 5-1
> here, so that the reader has at least some chance to figure out what
> this means.
>
> > }
> >
> > - rawclk = CNP_RAWCLK_DIV(divider) |
> > ICP_RAWCLK_NUM(numerator) |
> > -ICP_RAWCLK_DEN(denominator);
> > + rawclk = CNP_RAWCLK_DIV(divider) |
> > CNP_RAWCLK_FRAC(denominator);
> > + if (HAS_PCH_ICP(dev_priv))
> > + rawclk |= ICP_RAWCLK_NUM(numerator);
> >
> > I915_WRITE(PCH_RAWCLK_FREQ, rawclk);
> > return frequency;
> > @@ -2754,9 +2731,7 @@ static int g4x_hrawclk(struct
> > drm_i915_private *dev_priv)
> > */
> > void intel_update_rawclk(struct drm_i915_private *dev_priv)
> > {
> > - if (HAS_PCH_ICP(dev_priv))
> > - dev_priv->rawclk_freq = icp_rawclk(dev_priv);
> > - else if (HAS_PCH_CNP(dev_priv))
> > + if (HAS_PCH_CNP(dev_priv) || HAS_PCH_ICP(dev_priv))
> > dev_priv->rawclk_freq = cnp_rawclk(dev_priv);
> > else if (HAS_PCH_SPLIT(dev_priv))
> > dev_priv->rawclk_freq = pch_rawclk(dev_priv);
> > --
> > 2.14.4
> >
> >
Re: [Intel-gfx] [PATCH 02/11] drm/i915: remove padding from struct skl_wm_level
On Tue, Oct 16, 2018 at 03:01:24PM -0700, Paulo Zanoni wrote:
> This reduces the size of struct skl_wm_level from 6 to 4, which
> reduces the size of struct skl_plane_wm from 104 to 70, which reduces
> the size of struct skl_pipe_wm from 524 to 356. A reduction of 168
> padding bytes per pipe. This will increase even more the next time we
> bump I915_MAX_PLANES.
>
> Signed-off-by: Paulo Zanoni
For completeness:
$ pahole -s -C skl_wm_level drivers/gpu/drm/i915/i915.o
struct skl_wm_level {
bool plane_en; /* 0 1 */
/* XXX 1 byte hole, try to pack */
uint16_t plane_res_b; /* 2 2 */
uint8_tplane_res_l; /* 4 1 */
/* size: 6, cachelines: 1, members: 3 */
/* sum members: 4, holes: 1, sum holes: 1 */
/* padding: 1 */
/* last cacheline: 6 bytes */
};
So yes, this removes the padding and hole that are there due to alignment.
Reviewed-by: Lucas De Marchi
Lucas De Marchi
> ---
> drivers/gpu/drm/i915/i915_drv.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 3017ef037fed..3616b718b5d2 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1243,9 +1243,9 @@ struct skl_ddb_values {
> };
>
> struct skl_wm_level {
> - bool plane_en;
> uint16_t plane_res_b;
> uint8_t plane_res_l;
> + bool plane_en;
> };
>
> /* Stores plane specific WM parameters */
> --
> 2.14.4
>
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for More watermarks improvements
Em Ter, 2018-10-16 às 22:39 +, Patchwork escreveu: > == Series Details == > > Series: More watermarks improvements > URL : https://patchwork.freedesktop.org/series/51086/ > State : failure > > == Summary == > > = CI Bug Log - changes from CI_DRM_4990 -> Patchwork_10481 = > > == Summary - FAILURE == > > Serious unknown changes coming with Patchwork_10481 absolutely need > to be > verified manually. > > If you think the reported changes have nothing to do with the > changes > introduced in Patchwork_10481, please notify your bug team to allow > them > to document this new failure mode, which will reduce false > positives in CI. > > External URL: https://patchwork.freedesktop.org/api/1.0/series/5108 > 6/revisions/1/mbox/ > > == Possible new issues == > > Here are the unknown changes that may have been introduced in > Patchwork_10481: > > === IGT changes === > > Possible regressions > > igt@pm_rpm@module-reload: > fi-glk-j4005: PASS -> DMESG-FAIL EDID shows invalid data after module reload, triggering error during mode comparison in the subtest. Hard to think how this series could cause that. > > > == Known issues == > > Here are the changes found in Patchwork_10481 that come from known > issues: > > === IGT changes === > > Issues hit > > igt@gem_exec_suspend@basic-s3: > fi-kbl-soraka: NOTRUN -> INCOMPLETE (fdo#107859, > fdo#107774, fdo#107556) > > igt@kms_flip@basic-flip-vs-dpms: > fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000, fdo#106097) > > igt@kms_flip@basic-plain-flip: > fi-ilk-650: PASS -> DMESG-WARN (fdo#106387) +2 > > igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: > fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362) > > > Possible fixes > > igt@drv_module_reload@basic-reload: > fi-glk-j4005: DMESG-WARN (fdo#106248, fdo#106725) -> PASS > > igt@drv_selftest@live_hangcheck: > fi-icl-u2: INCOMPLETE (fdo#108315) -> PASS > > igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: > fi-glk-j4005: FAIL (fdo#106765) -> PASS > > igt@kms_flip@basic-flip-vs-dpms: > fi-hsw-4770r: DMESG-WARN (fdo#105602) -> PASS > > igt@kms_flip@basic-flip-vs-wf_vblank: > fi-glk-j4005: FAIL (fdo#100368) -> PASS > > igt@kms_flip@basic-plain-flip: > fi-glk-j4005: DMESG-WARN (fdo#106097) -> PASS > > igt@kms_frontbuffer_tracking@basic: > fi-icl-u2: FAIL (fdo#103167) -> PASS > fi-byt-clapper: FAIL (fdo#103167) -> PASS > > > fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 > fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 > fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 > fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 > fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000 > fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097 > fdo#106248 https://bugs.freedesktop.org/show_bug.cgi?id=106248 > fdo#106387 https://bugs.freedesktop.org/show_bug.cgi?id=106387 > fdo#106725 https://bugs.freedesktop.org/show_bug.cgi?id=106725 > fdo#106765 https://bugs.freedesktop.org/show_bug.cgi?id=106765 > fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 > fdo#107556 https://bugs.freedesktop.org/show_bug.cgi?id=107556 > fdo#107774 https://bugs.freedesktop.org/show_bug.cgi?id=107774 > fdo#107859 https://bugs.freedesktop.org/show_bug.cgi?id=107859 > fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315 > > > == Participating hosts (46 -> 38) == > > Additional (1): fi-kbl-soraka > Missing(9): fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 fi-skl-guc > fi-byt-squawks fi-bsw-cyan fi-apl-guc fi-pnv-d510 fi-kbl-7560u > > > == Build changes == > > * Linux: CI_DRM_4990 -> Patchwork_10481 > > CI_DRM_4990: 0bd34d92e9a27784cb988a300619f497ca0e99ec @ > git://anongit.freedesktop.org/gfx-ci/linux > IGT_4681: 959d6f95cb1344e0c0dace5b236e17755826fac1 @ > git://anongit.freedesktop.org/xorg/app/intel-gpu-tools > Patchwork_10481: 4a4d7716aeaa870a7d0aaa1e541706cb919096cd @ > git://anongit.freedesktop.org/gfx-ci/linux > > > == Linux commits == > > 4a4d7716aeaa drm/i915: pass dev_priv instead of cstate to > skl_compute_transition_wm() > 03f7a31192d8 drm/i915: add pipe_htotal to struct skl_wm_params > e541090ceec3 drm/i915: make skl_needs_memory_bw_wa() take dev_priv > instead of state > c801352ac21a drm/i915: reorganize the error message for invalid > watermarks > 52262264df7e drm/i915: move ddb_blocks to be a watermark parameter > b6f917785676 drm/i915: refactor skl_write_plane_wm() > 10134ecdb23d drm/i915: simplify wm->is_planar assignment > 20ce35c3029a drm/i915: remove useless memset() for watermarks > parameters > 7d4eced125cf drm/i915: fix handling of invisible planes in watermarks > code >
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm: Get ref on CRTC commit object when waiting for flip_done
== Series Details == Series: drm: Get ref on CRTC commit object when waiting for flip_done URL : https://patchwork.freedesktop.org/series/51079/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4990_full -> Patchwork_10479_full = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10479_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10479_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10479_full: === IGT changes === Possible regressions igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: shard-skl: PASS -> FAIL == Known issues == Here are the changes found in Patchwork_10479_full that come from known issues: === IGT changes === Issues hit igt@gem_exec_schedule@pi-ringfull-blt: shard-skl: NOTRUN -> FAIL (fdo#103158) igt@gem_exec_schedule@pi-ringfull-render: shard-glk: NOTRUN -> FAIL (fdo#103158) igt@gem_ppgtt@blt-vs-render-ctx0: shard-skl: NOTRUN -> TIMEOUT (fdo#108039) igt@gem_ppgtt@blt-vs-render-ctxn: shard-kbl: PASS -> INCOMPLETE (fdo#103665, fdo#106023) igt@kms_atomic_transition@1x-modeset-transitions-nonblocking: shard-skl: NOTRUN -> FAIL (fdo#108228) igt@kms_busy@extended-modeset-hang-newfb-render-b: shard-hsw: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_cursor_crc@cursor-256x256-random: shard-apl: PASS -> FAIL (fdo#103232) +2 igt@kms_cursor_crc@cursor-256x256-suspend: shard-skl: NOTRUN -> FAIL (fdo#103191, fdo#103232) igt@kms_cursor_crc@cursor-64x64-suspend: shard-glk: PASS -> FAIL (fdo#103232) igt@kms_cursor_legacy@pipe-c-forked-move: shard-apl: PASS -> INCOMPLETE (fdo#103927) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt: shard-skl: NOTRUN -> FAIL (fdo#105682) +1 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: shard-apl: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move: shard-skl: NOTRUN -> FAIL (fdo#103167) +4 igt@kms_plane@pixel-format-pipe-a-planes: shard-skl: NOTRUN -> DMESG-FAIL (fdo#103166, fdo#106885) igt@kms_plane@plane-position-covered-pipe-b-planes: shard-glk: NOTRUN -> FAIL (fdo#103166) +1 igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max: shard-glk: NOTRUN -> FAIL (fdo#108145) +2 igt@kms_plane_alpha_blend@pipe-c-alpha-basic: shard-skl: NOTRUN -> FAIL (fdo#107815, fdo#108145) igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: shard-skl: NOTRUN -> FAIL (fdo#108145) +3 igt@kms_rotation_crc@exhaust-fences: shard-skl: NOTRUN -> DMESG-WARN (fdo#105748) Possible fixes igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-glk: FAIL (fdo#105363) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: shard-glk: FAIL (fdo#103167) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: shard-apl: FAIL (fdo#103167) -> PASS igt@kms_vblank@pipe-a-ts-continuation-suspend: shard-skl: INCOMPLETE (fdo#104108, fdo#107773) -> PASS igt@perf@short-reads: shard-skl: FAIL (fdo#103183) -> PASS igt@pm_rpm@dpms-mode-unset-non-lpsp: shard-skl: INCOMPLETE (fdo#107807) -> SKIP Warnings igt@pm_backlight@fade_with_suspend: shard-skl: FAIL (fdo#107847) -> INCOMPLETE (fdo#107773) fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103183 https://bugs.freedesktop.org/show_bug.cgi?id=103183 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#105682 https://bugs.freedesktop.org/show_bug.cgi?id=105682 fdo#105748 https://bugs.freedesktop.org/show_bug.cgi?id=105748 fdo#106023
[Intel-gfx] [PATCH v2 1/2] drm/i915/guc: fix GuC suspend/resume
The ENTER/EXIT_S_STATE actions queue the save/restore operation in GuC
FW and then return, so waiting on the H2G is not enough to guarantee
GuC is done.
When all the processing is done, GuC writes 0 to scratch register 14,
so we can poll on that. Note that GuC does not ensure that the value
in the register is different from 0 while the action is in progress
so we need to take care of that ourselves as well.
v2: improve comment, return early on GuC error and improve error
message (Michal)
Cc: Chris Wilson
Cc: Michal Wajdeczko
Signed-off-by: Daniele Ceraolo Spurio
Acked-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_guc.c | 42 +--
drivers/gpu/drm/i915/intel_guc_fwif.h | 7 +
2 files changed, 47 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 230aea69385d..4c61eb94527a 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -521,6 +521,44 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32
rsa_offset)
return intel_guc_send(guc, action, ARRAY_SIZE(action));
}
+/*
+ * The ENTER/EXIT_S_STATE actions queue the save/restore operation in GuC FW
and
+ * then return, so waiting on the H2G is not enough to guarantee GuC is done.
+ * When all the processing is done, GuC writes INTEL_GUC_SLEEP_STATE_SUCCESS to
+ * scratch register 14, so we can poll on that. Note that GuC does not ensure
+ * that the value in the register is different from
+ * INTEL_GUC_SLEEP_STATE_SUCCESS while the action is in progress so we need to
+ * take care of that ourselves as well.
+ */
+static int guc_sleep_state_action(struct intel_guc *guc,
+ const u32 *action, u32 len)
+{
+ struct drm_i915_private *dev_priv = guc_to_i915(guc);
+ int ret;
+ u32 status;
+
+ I915_WRITE(SOFT_SCRATCH(14), INTEL_GUC_SLEEP_STATE_INVALID_MASK);
+
+ ret = intel_guc_send(guc, action, len);
+ if (ret)
+ return ret;
+
+ ret = __intel_wait_for_register(dev_priv, SOFT_SCRATCH(14),
+ INTEL_GUC_SLEEP_STATE_INVALID_MASK,
+ 0, 0, 10, );
+ if (ret)
+ return ret;
+
+ if (status != INTEL_GUC_SLEEP_STATE_SUCCESS) {
+ DRM_ERROR("GuC failed to change sleep state. "
+ "action=0x%x, err=%u\n",
+ action[0], status);
+ return -EIO;
+ }
+
+ return 0;
+}
+
/**
* intel_guc_suspend() - notify GuC entering suspend state
* @guc: the guc
@@ -533,7 +571,7 @@ int intel_guc_suspend(struct intel_guc *guc)
intel_guc_ggtt_offset(guc, guc->shared_data)
};
- return intel_guc_send(guc, data, ARRAY_SIZE(data));
+ return guc_sleep_state_action(guc, data, ARRAY_SIZE(data));
}
/**
@@ -571,7 +609,7 @@ int intel_guc_resume(struct intel_guc *guc)
intel_guc_ggtt_offset(guc, guc->shared_data)
};
- return intel_guc_send(guc, data, ARRAY_SIZE(data));
+ return guc_sleep_state_action(guc, data, ARRAY_SIZE(data));
}
/**
diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h
b/drivers/gpu/drm/i915/intel_guc_fwif.h
index 8382d591c784..1a853cc627e3 100644
--- a/drivers/gpu/drm/i915/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
@@ -687,6 +687,13 @@ enum intel_guc_report_status {
INTEL_GUC_REPORT_STATUS_COMPLETE = 0x4,
};
+enum intel_guc_sleep_state_status {
+ INTEL_GUC_SLEEP_STATE_SUCCESS = 0x0,
+ INTEL_GUC_SLEEP_STATE_PREEMPT_TO_IDLE_FAILED = 0x1,
+ INTEL_GUC_SLEEP_STATE_ENGINE_RESET_FAILED = 0x2
+};
+#define INTEL_GUC_SLEEP_STATE_INVALID_MASK 0x8000
+
#define GUC_LOG_CONTROL_LOGGING_ENABLED(1 << 0)
#define GUC_LOG_CONTROL_VERBOSITY_SHIFT4
#define GUC_LOG_CONTROL_VERBOSITY_MASK (0xF << GUC_LOG_CONTROL_VERBOSITY_SHIFT)
--
2.19.0
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 2/2] HAX enable GuC for CI
From: Michal Wajdeczko Signed-off-by: Michal Wajdeczko --- drivers/gpu/drm/i915/i915_params.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 7e56c516c815..c681537bcb92 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b/drivers/gpu/drm/i915/i915_params.h @@ -45,7 +45,7 @@ struct drm_printer; param(int, disable_power_well, -1) \ param(int, enable_ips, 1) \ param(int, invert_brightness, 0) \ - param(int, enable_guc, 0) \ + param(int, enable_guc, -1) \ param(int, guc_log_level, -1) \ param(char *, guc_firmware_path, NULL) \ param(char *, huc_firmware_path, NULL) \ -- 2.19.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for More watermarks improvements
== Series Details == Series: More watermarks improvements URL : https://patchwork.freedesktop.org/series/51086/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4990 -> Patchwork_10481 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10481 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10481, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/51086/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10481: === IGT changes === Possible regressions igt@pm_rpm@module-reload: fi-glk-j4005: PASS -> DMESG-FAIL == Known issues == Here are the changes found in Patchwork_10481 that come from known issues: === IGT changes === Issues hit igt@gem_exec_suspend@basic-s3: fi-kbl-soraka: NOTRUN -> INCOMPLETE (fdo#107859, fdo#107774, fdo#107556) igt@kms_flip@basic-flip-vs-dpms: fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000, fdo#106097) igt@kms_flip@basic-plain-flip: fi-ilk-650: PASS -> DMESG-WARN (fdo#106387) +2 igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362) Possible fixes igt@drv_module_reload@basic-reload: fi-glk-j4005: DMESG-WARN (fdo#106248, fdo#106725) -> PASS igt@drv_selftest@live_hangcheck: fi-icl-u2: INCOMPLETE (fdo#108315) -> PASS igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: fi-glk-j4005: FAIL (fdo#106765) -> PASS igt@kms_flip@basic-flip-vs-dpms: fi-hsw-4770r: DMESG-WARN (fdo#105602) -> PASS igt@kms_flip@basic-flip-vs-wf_vblank: fi-glk-j4005: FAIL (fdo#100368) -> PASS igt@kms_flip@basic-plain-flip: fi-glk-j4005: DMESG-WARN (fdo#106097) -> PASS igt@kms_frontbuffer_tracking@basic: fi-icl-u2: FAIL (fdo#103167) -> PASS fi-byt-clapper: FAIL (fdo#103167) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000 fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097 fdo#106248 https://bugs.freedesktop.org/show_bug.cgi?id=106248 fdo#106387 https://bugs.freedesktop.org/show_bug.cgi?id=106387 fdo#106725 https://bugs.freedesktop.org/show_bug.cgi?id=106725 fdo#106765 https://bugs.freedesktop.org/show_bug.cgi?id=106765 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107556 https://bugs.freedesktop.org/show_bug.cgi?id=107556 fdo#107774 https://bugs.freedesktop.org/show_bug.cgi?id=107774 fdo#107859 https://bugs.freedesktop.org/show_bug.cgi?id=107859 fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315 == Participating hosts (46 -> 38) == Additional (1): fi-kbl-soraka Missing(9): fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 fi-skl-guc fi-byt-squawks fi-bsw-cyan fi-apl-guc fi-pnv-d510 fi-kbl-7560u == Build changes == * Linux: CI_DRM_4990 -> Patchwork_10481 CI_DRM_4990: 0bd34d92e9a27784cb988a300619f497ca0e99ec @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4681: 959d6f95cb1344e0c0dace5b236e17755826fac1 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10481: 4a4d7716aeaa870a7d0aaa1e541706cb919096cd @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 4a4d7716aeaa drm/i915: pass dev_priv instead of cstate to skl_compute_transition_wm() 03f7a31192d8 drm/i915: add pipe_htotal to struct skl_wm_params e541090ceec3 drm/i915: make skl_needs_memory_bw_wa() take dev_priv instead of state c801352ac21a drm/i915: reorganize the error message for invalid watermarks 52262264df7e drm/i915: move ddb_blocks to be a watermark parameter b6f917785676 drm/i915: refactor skl_write_plane_wm() 10134ecdb23d drm/i915: simplify wm->is_planar assignment 20ce35c3029a drm/i915: remove useless memset() for watermarks parameters 7d4eced125cf drm/i915: fix handling of invisible planes in watermarks code 6165f4257098 drm/i915: remove padding from struct skl_wm_level 6a8c3f3d3663 drm/i915: don't apply Display WAs 1125 and 1126 to GLK/CNL+ == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10481/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More watermarks improvements
Em Ter, 2018-10-16 às 22:21 +, Patchwork escreveu:
> == Series Details ==
>
> Series: More watermarks improvements
> URL : https://patchwork.freedesktop.org/series/51086/
> State : warning
>
> == Summary ==
>
> $ dim checkpatch origin/drm-tip
> 6a8c3f3d3663 drm/i915: don't apply Display WAs 1125 and 1126 to
> GLK/CNL+
> 6165f4257098 drm/i915: remove padding from struct skl_wm_level
> -:25: CHECK:BOOL_MEMBER: Avoid using bool structure members because
> of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/
> 384
> #25: FILE: drivers/gpu/drm/i915/i915_drv.h:1248:
> + bool plane_en;
>
> total: 0 errors, 0 warnings, 1 checks, 10 lines checked
That won't save us anything in this specific case, and it's not our
usual coding standard. If we conclude i915.ko should go this way, I'd
be happy to comply. Maintainers?
> 7d4eced125cf drm/i915: fix handling of invisible planes in watermarks
> code
> -:41: CHECK:BOOL_MEMBER: Avoid using bool structure members because
> of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/
> 384
> #41: FILE: drivers/gpu/drm/i915/i915_drv.h:1253:
> + bool plane_visible;
The rest of the struct also uses bools like this. If we go this route,
we should probably change the whole struct.
>
> total: 0 errors, 0 warnings, 1 checks, 52 lines checked
> 20ce35c3029a drm/i915: remove useless memset() for watermarks
> parameters
> 10134ecdb23d drm/i915: simplify wm->is_planar assignment
> b6f917785676 drm/i915: refactor skl_write_plane_wm()
> -:8: ERROR:GIT_COMMIT_ID: Please use git commit description style
> 'commit <12+ chars of sha1> ("")' - ie: 'commit
> 9e44b180f81b ("drm/i915: don't write PLANE_BUF_CFG twice every
> time")'
> #8:
> 9e44b180f81b ("drm/i915: don't write PLANE_BUF_CFG twice every time")
Well, I used that description style, but it's in the middle of a
paragraph so the word "commit" is in the line above. If that's not what
you're asking, then I don't know.
>
> -:16: WARNING:BAD_SIGN_OFF: Non-standard signature: Requested-by:
> #16:
> Requested-by: Matt Roper
Is this really undesirable?
>
> total: 1 errors, 1 warnings, 0 checks, 41 lines checked
> 52262264df7e drm/i915: move ddb_blocks to be a watermark parameter
> c801352ac21a drm/i915: reorganize the error message for invalid
> watermarks
> e541090ceec3 drm/i915: make skl_needs_memory_bw_wa() take dev_priv
> instead of state
> 03f7a31192d8 drm/i915: add pipe_htotal to struct skl_wm_params
> 4a4d7716aeaa drm/i915: pass dev_priv instead of cstate to
> skl_compute_transition_wm()
>
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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for More watermarks improvements
== Series Details == Series: More watermarks improvements URL : https://patchwork.freedesktop.org/series/51086/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: don't apply Display WAs 1125 and 1126 to GLK/CNL+ Okay! Commit: drm/i915: remove padding from struct skl_wm_level Okay! Commit: drm/i915: fix handling of invisible planes in watermarks code -drivers/gpu/drm/i915/selftests/../i915_drv.h:3725:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3726:16: warning: expression using sizeof(void) Commit: drm/i915: remove useless memset() for watermarks parameters Okay! Commit: drm/i915: simplify wm->is_planar assignment Okay! Commit: drm/i915: refactor skl_write_plane_wm() Okay! Commit: drm/i915: move ddb_blocks to be a watermark parameter -drivers/gpu/drm/i915/selftests/../i915_drv.h:3726:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3727:16: warning: expression using sizeof(void) Commit: drm/i915: reorganize the error message for invalid watermarks Okay! Commit: drm/i915: make skl_needs_memory_bw_wa() take dev_priv instead of state Okay! Commit: drm/i915: add pipe_htotal to struct skl_wm_params -drivers/gpu/drm/i915/selftests/../i915_drv.h:3727:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3728:16: warning: expression using sizeof(void) Commit: drm/i915: pass dev_priv instead of cstate to skl_compute_transition_wm() Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t 4/5] tests/kms_atomic: Add a new test case for FB_DAMAGE_CLIPS plane property
Some simple test cases to use FB_DAMAGE_CLIPS plane property.
Signed-off-by: Deepak Rawat
---
lib/igt_kms.c | 1 +
lib/igt_kms.h | 1 +
tests/kms_atomic.c | 260 +
3 files changed, 262 insertions(+)
diff --git a/lib/igt_kms.c b/lib/igt_kms.c
index 6e499f48..7a3ce2f6 100644
--- a/lib/igt_kms.c
+++ b/lib/igt_kms.c
@@ -177,6 +177,7 @@ const char * const
igt_plane_prop_names[IGT_NUM_PLANE_PROPS] = {
[IGT_PLANE_COLOR_RANGE] = "COLOR_RANGE",
[IGT_PLANE_PIXEL_BLEND_MODE] = "pixel blend mode",
[IGT_PLANE_ALPHA] = "alpha",
+ [IGT_PLANE_FB_DAMAGE_CLIPS] = "FB_DAMAGE_CLIPS",
};
const char * const igt_crtc_prop_names[IGT_NUM_CRTC_PROPS] = {
diff --git a/lib/igt_kms.h b/lib/igt_kms.h
index cbfcced9..e1c9a6a5 100644
--- a/lib/igt_kms.h
+++ b/lib/igt_kms.h
@@ -269,6 +269,7 @@ enum igt_atomic_plane_properties {
IGT_PLANE_COLOR_RANGE,
IGT_PLANE_PIXEL_BLEND_MODE,
IGT_PLANE_ALPHA,
+ IGT_PLANE_FB_DAMAGE_CLIPS,
IGT_NUM_PLANE_PROPS
};
diff --git a/tests/kms_atomic.c b/tests/kms_atomic.c
index 3aad2d9a..20dfc978 100644
--- a/tests/kms_atomic.c
+++ b/tests/kms_atomic.c
@@ -56,6 +56,24 @@
IGT_TEST_DESCRIPTION("Test atomic modesetting API");
+/* signed32 drm_mode_rect declared here for use with drm damage for page-flip
*/
+struct damage_rect {
+ int x1;
+ int y1;
+ int x2;
+ int y2;
+};
+
+static inline int damage_rect_width(struct damage_rect *r)
+{
+ return r->x2 - r->x1;
+}
+
+static inline int damage_rect_height(struct damage_rect *r)
+{
+ return r->y2 - r->y1;
+}
+
enum kms_atomic_check_relax {
ATOMIC_RELAX_NONE = 0,
CRTC_RELAX_MODE = (1 << 0),
@@ -835,6 +853,240 @@ static void atomic_invalid_params(igt_pipe_t *pipe,
do_ioctl_err(display->drm_fd, DRM_IOCTL_MODE_ATOMIC, , EFAULT);
}
+static void atomic_plane_damage(igt_pipe_t *pipe, igt_plane_t *plane, struct
igt_fb *fb)
+{
+ struct damage_rect *damage;
+ struct igt_fb fb_1;
+ struct igt_fb fb_2;
+ cairo_t *cr_1;
+ cairo_t *cr_2;
+
+ damage = malloc(sizeof(*damage) * 2);
+ igt_assert(damage);
+
+ /* Color fb with white rect at center */
+ igt_create_color_fb(pipe->display->drm_fd, fb->width, fb->height,
+ fb->drm_format, I915_TILING_NONE, 0.2, 0.2, 0.2,
+ _1);
+ cr_1 = igt_get_cairo_ctx(pipe->display->drm_fd, _1);
+ igt_paint_color(cr_1, fb->width/4, fb->height/4, fb->width/2,
+ fb->height/2, 1.0, 1.0, 1.0);
+ igt_put_cairo_ctx(pipe->display->drm_fd, _1, cr_1);
+
+ /*
+* Flip the primary plane to new color fb using atomic API and check the
+* state.
+*/
+ igt_plane_set_fb(plane, _1);
+ crtc_commit(pipe, plane, COMMIT_ATOMIC, ATOMIC_RELAX_NONE);
+
+ /*
+* Change the color of top left clip from center and issue plane update
+* with damage and verify the state.
+*/
+ damage[0].x1 = 0;
+ damage[0].y1 = 0;
+ damage[0].x2 = fb->width/2;
+ damage[0].y2 = fb->height/2;
+
+ cr_1 = igt_get_cairo_ctx(pipe->display->drm_fd, _1);
+ igt_paint_color(cr_1, damage[0].x1, damage[0].y1,
+ damage_rect_width([0]),
+ damage_rect_height([0]), 1.0, 0, 0);
+ igt_put_cairo_ctx(pipe->display->drm_fd, _1, cr_1);
+
+ igt_plane_set_fb(plane, _1);
+ igt_plane_replace_prop_blob(plane, IGT_PLANE_FB_DAMAGE_CLIPS, damage,
+ sizeof(*damage));
+ crtc_commit(pipe, plane, COMMIT_ATOMIC, ATOMIC_RELAX_NONE);
+
+ /*
+* Change the color of top left and bottom right clip from center and
+* issue plane update with damage and verify the state.
+*/
+ damage[0].x1 = 0;
+ damage[0].y1 = 0;
+ damage[0].x2 = fb->width/2;
+ damage[0].y2 = fb->height/2;
+
+ damage[1].x1 = fb->width/2;
+ damage[1].y1 = fb->height/2;
+ damage[1].x2 = fb->width;
+ damage[1].y2 = fb->height;
+
+ cr_1 = igt_get_cairo_ctx(pipe->display->drm_fd, _1);
+ igt_paint_color(cr_1, damage[0].x1, damage[0].y1,
+ damage_rect_width([0]),
+ damage_rect_height([0]), 1.0, 0, 1.0);
+ igt_paint_color(cr_1, damage[1].x1, damage[1].y1,
+ damage_rect_width([1]),
+ damage_rect_height([1]), 0, 0, 1.0);
+ igt_put_cairo_ctx(pipe->display->drm_fd, _1, cr_1);
+
+ igt_plane_set_fb(plane, _1);
+ igt_plane_replace_prop_blob(plane, IGT_PLANE_FB_DAMAGE_CLIPS, damage,
+ sizeof(*damage) * 2);
+ crtc_commit(pipe, plane, COMMIT_ATOMIC, ATOMIC_RELAX_NONE);
+
+ /*
+* Issue a plane update with damage on a seperate fb with damage to
+* upper right clip from center.
+*/
[Intel-gfx] [PATCH i-g-t 5/5] tests/kms_selftest: Integrate kernel selftest test-drm_modeset
Call kernel selftest module test-drm_modeset for testing KMS.
v2:
- Add test alphabetically.
- Add test to meson build.
v3: Rename to kms_selftest.
Signed-off-by: Deepak Rawat
---
tests/Makefile.sources| 1 +
tests/igt_command_line.sh | 2 +-
tests/kms_selftest.c | 10 ++
tests/meson.build | 1 +
4 files changed, 13 insertions(+), 1 deletion(-)
create mode 100644 tests/kms_selftest.c
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 001f1a2b..cdf5a7e1 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -202,6 +202,7 @@ TESTS_progs = \
kms_pwrite_crc \
kms_rmfb \
kms_rotation_crc \
+ kms_selftest \
kms_setmode \
kms_sysfs_edid_timing \
kms_tv_load_detect \
diff --git a/tests/igt_command_line.sh b/tests/igt_command_line.sh
index 8285ba62..a4ec3f95 100755
--- a/tests/igt_command_line.sh
+++ b/tests/igt_command_line.sh
@@ -90,7 +90,7 @@ check_test ()
# Subtest enumeration of kernel selftest launchers depends
# on the running kernel. If selftests are not enabled,
# they will output nothing and exit with 0.
- if [ "$testname" != "drv_selftest" -a "$testname" != "drm_mm"
]; then
+ if [ "$testname" != "drv_selftest" -a "$testname" != "drm_mm"
-a "$testname" != "kms_selftest" ]; then
fail $test
fi
fi
diff --git a/tests/kms_selftest.c b/tests/kms_selftest.c
new file mode 100644
index ..f61ddd99
--- /dev/null
+++ b/tests/kms_selftest.c
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#include "igt.h"
+#include "igt_kmod.h"
+
+IGT_TEST_DESCRIPTION("Basic sanity check of KMS selftests.");
+
+igt_main
+{
+ igt_kselftests("test-drm_modeset", NULL, NULL, NULL);
+}
diff --git a/tests/meson.build b/tests/meson.build
index 697ff515..d74eb109 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -177,6 +177,7 @@ test_progs = [
'kms_pwrite_crc',
'kms_rmfb',
'kms_rotation_crc',
+ 'kms_selftest',
'kms_setmode',
'kms_sysfs_edid_timing',
'kms_tv_load_detect',
--
2.17.1
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[Intel-gfx] [PATCH i-g-t 3/5] lib: Don't call igt_require_fb_modifiers() when no modifier
vmwgfx and amdgpu doesn't support fb modifiers, yet kms_addfb() requires
modifier support. Since many tests don't need this to run, the
requirement can be made less broad.
Therefore, tighten the requirement to cases where modifiers are actually
needed.
v2:
* In create_fb() calls to kms_addfb(), remove the modifier flag iff the
driver doesn't support modifiers and the modifer is 0
* Don't modify the flag in kms_addfb().
Signed-off-by: Deepak Rawat
Signed-off-by: Leo Li
---
lib/igt_fb.c | 7 +--
lib/ioctl_wrappers.c | 24 +++-
lib/ioctl_wrappers.h | 1 +
3 files changed, 21 insertions(+), 11 deletions(-)
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 1bb6d324..5dca1cfa 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -913,6 +913,7 @@ igt_create_fb_with_bo_size(int fd, int width, int height,
/* FIXME allow the caller to pass these in */
enum igt_color_encoding color_encoding = IGT_COLOR_YCBCR_BT709;
enum igt_color_range color_range = IGT_COLOR_YCBCR_LIMITED_RANGE;
+ uint32_t flags = 0;
fb_init(fb, fd, width, height, format, tiling,
color_encoding, color_range);
@@ -931,11 +932,13 @@ igt_create_fb_with_bo_size(int fd, int width, int height,
igt_debug("%s(handle=%d, pitch=%d)\n",
__func__, fb->gem_handle, fb->strides[0]);
+ if (fb->tiling || igt_has_fb_modifiers(fd))
+ flags = LOCAL_DRM_MODE_FB_MODIFIERS;
+
do_or_die(__kms_addfb(fb->fd, fb->gem_handle,
fb->width, fb->height,
fb->drm_format, fb->tiling,
- fb->strides, fb->offsets, fb->num_planes,
- LOCAL_DRM_MODE_FB_MODIFIERS,
+ fb->strides, fb->offsets, fb->num_planes, flags,
>fb_id));
return fb->fb_id;
diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index 0929c43f..10d32bec 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -1646,13 +1646,7 @@ void prime_sync_end(int dma_buf_fd, bool write)
do_ioctl(dma_buf_fd, LOCAL_DMA_BUF_IOCTL_SYNC, _end);
}
-/**
- * igt_require_fb_modifiers:
- * @fd: Open DRM file descriptor.
- *
- * Requires presence of DRM_CAP_ADDFB2_MODIFIERS.
- */
-void igt_require_fb_modifiers(int fd)
+bool igt_has_fb_modifiers(int fd)
{
static bool has_modifiers, cap_modifiers_tested;
@@ -1666,7 +1660,18 @@ void igt_require_fb_modifiers(int fd)
cap_modifiers_tested = true;
}
- igt_require(has_modifiers);
+ return has_modifiers;
+}
+
+/**
+ * igt_require_fb_modifiers:
+ * @fd: Open DRM file descriptor.
+ *
+ * Requires presence of DRM_CAP_ADDFB2_MODIFIERS.
+ */
+void igt_require_fb_modifiers(int fd)
+{
+ igt_require(igt_has_fb_modifiers(fd));
}
int __kms_addfb(int fd, uint32_t handle,
@@ -1678,7 +1683,8 @@ int __kms_addfb(int fd, uint32_t handle,
struct drm_mode_fb_cmd2 f;
int ret, i;
- igt_require_fb_modifiers(fd);
+ if (flags & DRM_MODE_FB_MODIFIERS)
+ igt_require_fb_modifiers(fd);
memset(, 0, sizeof(f));
diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
index c4e1956c..b22b36b0 100644
--- a/lib/ioctl_wrappers.h
+++ b/lib/ioctl_wrappers.h
@@ -227,6 +227,7 @@ struct local_drm_mode_fb_cmd2 {
#define LOCAL_DRM_CAP_ADDFB2_MODIFIERS 0x10
+bool igt_has_fb_modifiers(int fd);
void igt_require_fb_modifiers(int fd);
/**
--
2.17.1
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[Intel-gfx] [PATCH i-g-t 1/5] lib/igt_fb: Call dumb_destroy ioctl in case of dumb buffers
vmwgfx does not support GEM interface so calling gem_close on vmwgfx
results in error.
v2: Use drmIoctl with error when ioctl() failed.
v3: Seperate ioctl wrapper.
Signed-off-by: Deepak Rawat
---
lib/igt_fb.c | 5 -
lib/igt_kms.c | 22 ++
lib/igt_kms.h | 1 +
3 files changed, 27 insertions(+), 1 deletion(-)
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 35be2e88..335ece69 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -2121,7 +2121,10 @@ void igt_remove_fb(int fd, struct igt_fb *fb)
cairo_surface_destroy(fb->cairo_surface);
do_or_die(drmModeRmFB(fd, fb->fb_id));
- gem_close(fd, fb->gem_handle);
+ if (fb->is_dumb)
+ kmstest_dumb_destroy(fd, fb->gem_handle);
+ else
+ gem_close(fd, fb->gem_handle);
fb->fb_id = 0;
}
diff --git a/lib/igt_kms.c b/lib/igt_kms.c
index b2cbaa11..6e499f48 100644
--- a/lib/igt_kms.c
+++ b/lib/igt_kms.c
@@ -641,6 +641,28 @@ void *kmstest_dumb_map_buffer(int fd, uint32_t handle,
uint64_t size,
return ptr;
}
+static int __kmstest_dumb_destroy(int fd, uint32_t handle)
+{
+ struct drm_mode_destroy_dumb arg = { handle };
+ int err = 0;
+
+ if (drmIoctl(fd, DRM_IOCTL_MODE_DESTROY_DUMB, ))
+ err = -errno;
+
+ errno = 0;
+ return err;
+}
+
+/**
+ * kmstest_dumb_destroy:
+ * @fd: Opened drm file descriptor
+ * @handle: Offset in the file referred to by fd
+ */
+void kmstest_dumb_destroy(int fd, uint32_t handle)
+{
+ igt_assert_eq(__kmstest_dumb_destroy(fd, handle), 0);
+}
+
/*
* Returns: the previous mode, or KD_GRAPHICS if no /dev/tty0 was
* found and nothing was done.
diff --git a/lib/igt_kms.h b/lib/igt_kms.h
index 38fa944e..cbfcced9 100644
--- a/lib/igt_kms.h
+++ b/lib/igt_kms.h
@@ -222,6 +222,7 @@ uint32_t kmstest_dumb_create(int fd, int width, int height,
int bpp,
void *kmstest_dumb_map_buffer(int fd, uint32_t handle, uint64_t size,
unsigned prot);
+void kmstest_dumb_destroy(int fd, uint32_t handle);
void kmstest_wait_for_pageflip(int fd);
unsigned int kmstest_get_vblank(int fd, int pipe, unsigned int flags);
void igt_assert_plane_visible(int fd, enum pipe pipe, bool visibility);
--
2.17.1
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[Intel-gfx] [PATCH i-g-t 2/5] lib/igt_fb: Check for cairo surface success
For vmwgfx cairo surface creation fails due to stride mismatch, add a igt_require_f() for surface. v2: Check for surface creation failure. Signed-off-by: Deepak Rawat --- lib/igt_fb.c | 4 1 file changed, 4 insertions(+) diff --git a/lib/igt_fb.c b/lib/igt_fb.c index 335ece69..1bb6d324 100644 --- a/lib/igt_fb.c +++ b/lib/igt_fb.c @@ -1433,6 +1433,10 @@ static void create_cairo_surface__gtt(int fd, struct igt_fb *fb) cairo_image_surface_create_for_data(ptr, drm_format_to_cairo(fb->drm_format), fb->width, fb->height, fb->strides[0]); + igt_require_f(cairo_surface_status(fb->cairo_surface) == CAIRO_STATUS_SUCCESS, + "Unable to create a cairo surface: %s\n", + cairo_status_to_string(cairo_surface_status(fb->cairo_surface))); + fb->domain = I915_GEM_DOMAIN_GTT; cairo_surface_set_user_data(fb->cairo_surface, -- 2.17.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More watermarks improvements
== Series Details ==
Series: More watermarks improvements
URL : https://patchwork.freedesktop.org/series/51086/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
6a8c3f3d3663 drm/i915: don't apply Display WAs 1125 and 1126 to GLK/CNL+
6165f4257098 drm/i915: remove padding from struct skl_wm_level
-:25: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible
alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#25: FILE: drivers/gpu/drm/i915/i915_drv.h:1248:
+ bool plane_en;
total: 0 errors, 0 warnings, 1 checks, 10 lines checked
7d4eced125cf drm/i915: fix handling of invisible planes in watermarks code
-:41: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible
alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#41: FILE: drivers/gpu/drm/i915/i915_drv.h:1253:
+ bool plane_visible;
total: 0 errors, 0 warnings, 1 checks, 52 lines checked
20ce35c3029a drm/i915: remove useless memset() for watermarks parameters
10134ecdb23d drm/i915: simplify wm->is_planar assignment
b6f917785676 drm/i915: refactor skl_write_plane_wm()
-:8: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 9e44b180f81b ("drm/i915: don't
write PLANE_BUF_CFG twice every time")'
#8:
9e44b180f81b ("drm/i915: don't write PLANE_BUF_CFG twice every time")
-:16: WARNING:BAD_SIGN_OFF: Non-standard signature: Requested-by:
#16:
Requested-by: Matt Roper
total: 1 errors, 1 warnings, 0 checks, 41 lines checked
52262264df7e drm/i915: move ddb_blocks to be a watermark parameter
c801352ac21a drm/i915: reorganize the error message for invalid watermarks
e541090ceec3 drm/i915: make skl_needs_memory_bw_wa() take dev_priv instead of
state
03f7a31192d8 drm/i915: add pipe_htotal to struct skl_wm_params
4a4d7716aeaa drm/i915: pass dev_priv instead of cstate to
skl_compute_transition_wm()
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[Intel-gfx] ✓ Fi.CI.IGT: success for shmem, drm/i915: Mark pinned shmemfs pages as unevictable
== Series Details == Series: shmem, drm/i915: Mark pinned shmemfs pages as unevictable URL : https://patchwork.freedesktop.org/series/51078/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4990_full -> Patchwork_10478_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_10478_full that come from known issues: === IGT changes === Issues hit igt@gem_exec_schedule@pi-ringfull-bsd: shard-skl: NOTRUN -> FAIL (fdo#103158) +1 igt@gem_exec_schedule@pi-ringfull-render: shard-glk: NOTRUN -> FAIL (fdo#103158) igt@gem_ppgtt@blt-vs-render-ctxn: shard-kbl: PASS -> INCOMPLETE (fdo#106023, fdo#103665) shard-skl: NOTRUN -> TIMEOUT (fdo#108039) igt@kms_atomic_transition@1x-modeset-transitions-nonblocking: shard-skl: NOTRUN -> FAIL (fdo#108228) igt@kms_busy@extended-modeset-hang-newfb-render-a: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +2 igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: shard-hsw: NOTRUN -> DMESG-WARN (fdo#107956) +2 igt@kms_cursor_crc@cursor-128x128-suspend: shard-apl: PASS -> FAIL (fdo#103232, fdo#103191) +1 igt@kms_cursor_crc@cursor-256x256-onscreen: shard-skl: NOTRUN -> FAIL (fdo#103232) igt@kms_cursor_legacy@all-pipes-forked-move: shard-apl: PASS -> INCOMPLETE (fdo#103927) igt@kms_draw_crc@draw-method-xrgb2101010-pwrite-untiled: shard-skl: NOTRUN -> FAIL (fdo#103184) +1 igt@kms_fbcon_fbt@psr: shard-skl: NOTRUN -> FAIL (fdo#107882) igt@kms_flip@flip-vs-expired-vblank: shard-glk: PASS -> FAIL (fdo#105363, fdo#102887) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt: shard-skl: NOTRUN -> FAIL (fdo#105682) +2 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: shard-apl: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbc-stridechange: shard-skl: NOTRUN -> FAIL (fdo#105683) igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite: shard-skl: NOTRUN -> FAIL (fdo#103167) +4 igt@kms_panel_fitting@legacy: shard-skl: NOTRUN -> FAIL (fdo#105456) igt@kms_plane@pixel-format-pipe-b-planes: shard-skl: NOTRUN -> DMESG-FAIL (fdo#106885, fdo#103166) +1 igt@kms_plane_alpha_blend@pipe-a-alpha-basic: shard-skl: NOTRUN -> FAIL (fdo#108145, fdo#107815) igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max: shard-glk: NOTRUN -> FAIL (fdo#108145) igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: shard-skl: NOTRUN -> FAIL (fdo#108145) +1 igt@kms_plane_alpha_blend@pipe-b-alpha-7efc: shard-skl: NOTRUN -> FAIL (fdo#108146) igt@kms_plane_multiple@atomic-pipe-b-tiling-yf: shard-glk: NOTRUN -> FAIL (fdo#103166) igt@kms_setmode@basic: shard-apl: PASS -> FAIL (fdo#99912) shard-snb: NOTRUN -> FAIL (fdo#99912) igt@kms_sysfs_edid_timing: shard-skl: NOTRUN -> FAIL (fdo#100047) igt@kms_universal_plane@universal-plane-pipe-c-functional: shard-glk: PASS -> FAIL (fdo#103166) Possible fixes igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-glk: FAIL (fdo#105363) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: shard-apl: FAIL (fdo#103167) -> PASS igt@kms_vblank@pipe-a-ts-continuation-suspend: shard-skl: INCOMPLETE (fdo#107773, fdo#104108) -> PASS +1 igt@pm_rpm@system-suspend-execbuf: shard-skl: INCOMPLETE (fdo#107773, fdo#107807, fdo#104108) -> PASS fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047 fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#105456 https://bugs.freedesktop.org/show_bug.cgi?id=105456 fdo#105682 https://bugs.freedesktop.org/show_bug.cgi?id=105682 fdo#105683
[Intel-gfx] [PATCH 03/11] drm/i915: fix handling of invisible planes in watermarks code
Before the patch, if a plane was not visible,
skl_compute_plane_wm_params() would return early without writing
anything to the wm_params struct. This would leave garbage in the
struct since it is not previously zeroed, and then we would later
check for wm_params.is_planar, which could be true due to the usage of
uninitialized memory. This would lead us to calculate the zeroed
watermarks for the second inexistent plane and mark the plane as a
planar plane. Then later this check would affect our decisions in
skl_write_plane_wm().
I can't see how this would lead to a noticeable bug in our code, but
it leads us to calculate watermarks for every level + transition
watermarks, twice (due to the is_planar bug). So the fix saves us a
lot of instructions.
This problem was found when I decided to add a DRM_ERROR for the
currently unsupported planar formats on ICL: kms_cursor_legacy would
trigger the error message without using planar formats.
So the fix we adopt in this patch is to create a new watermark
parameter called plane_visible and use it to avoid computing the
watermarks for invisible planes later. We also remove the checks that
are now made redundant by it.
Testcase: igt/kms_cursor_legacy/nonblocking-modeset-vs-cursor-atomic
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 15 ++-
2 files changed, 7 insertions(+), 9 deletions(-)
The error message mentioned above isd the one added by patch 06 of the
series.
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3616b718b5d2..4b1e8471609b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1250,6 +1250,7 @@ struct skl_wm_level {
/* Stores plane specific WM parameters */
struct skl_wm_params {
+ bool plane_visible;
bool x_tiled, y_tiled;
bool rc_surface;
bool is_planar;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 18157c6ee126..9043ffe40ce8 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4532,7 +4532,8 @@ skl_compute_plane_wm_params(const struct drm_i915_private
*dev_priv,
to_intel_atomic_state(cstate->base.state);
bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state);
- if (!intel_wm_plane_visible(cstate, intel_pstate))
+ wp->plane_visible = intel_wm_plane_visible(cstate, intel_pstate);
+ if (!wp->plane_visible)
return 0;
/* only NV12 format has two planes */
@@ -4645,8 +4646,7 @@ static int skl_compute_plane_wm(const struct
drm_i915_private *dev_priv,
bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state);
uint32_t min_disp_buf_needed;
- if (latency == 0 ||
- !intel_wm_plane_visible(cstate, intel_pstate)) {
+ if (latency == 0) {
result->plane_en = false;
return 0;
}
@@ -4805,9 +4805,6 @@ skl_compute_wm_levels(const struct drm_i915_private
*dev_priv,
enum plane_id intel_plane_id = intel_plane->id;
int ret;
- if (WARN_ON(!intel_pstate->base.fb))
- return -EINVAL;
-
ddb_blocks = plane_id ?
skl_ddb_entry_size(>uv_plane[pipe][intel_plane_id]) :
skl_ddb_entry_size(>plane[pipe][intel_plane_id]);
@@ -4876,9 +4873,6 @@ static void skl_compute_transition_wm(struct
intel_crtc_state *cstate,
const uint16_t trans_amount = 10; /* This is configurable amount */
uint16_t wm0_sel_res_b, trans_offset_b, res_blocks;
- if (!cstate->base.active)
- goto exit;
-
/* Transition WM are not recommended by HW team for GEN9 */
if (INTEL_GEN(dev_priv) <= 9)
goto exit;
@@ -4965,6 +4959,9 @@ static int skl_build_pipe_wm(struct intel_crtc_state
*cstate,
if (ret)
return ret;
+ if (!wm_params.plane_visible)
+ continue;
+
ret = skl_compute_wm_levels(dev_priv, ddb, cstate,
intel_pstate, _params, wm, 0);
if (ret)
--
2.14.4
___
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[Intel-gfx] [PATCH 10/11] drm/i915: add pipe_htotal to struct skl_wm_params
With this one here we can finally drop the intel state structures from
the functions that compute watermark values: they all rely on struct
skl_wm_params now. This should help the watermarks code be a little
more clear on its intent and also match the spec a little bit more
with the carefully chosen names for its parameters.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 20
2 files changed, 9 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b32d680d9bf0..4712eaea9744 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1254,6 +1254,7 @@ struct skl_wm_params {
bool x_tiled, y_tiled;
bool rc_surface;
bool is_planar;
+ uint32_t pipe_htotal;
uint32_t width;
uint16_t ddb_blocks;
uint8_t cpp;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d101c542f10d..b01f3d807ff6 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4549,6 +4549,8 @@ skl_compute_plane_wm_params(const struct drm_i915_private
*dev_priv,
fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
wp->is_planar = fb->format->format == DRM_FORMAT_NV12;
+ wp->pipe_htotal = cstate->base.adjusted_mode.crtc_htotal;
+
if (plane->id == PLANE_CURSOR) {
wp->width = intel_pstate->base.crtc_w;
} else {
@@ -4630,7 +4632,6 @@ skl_compute_plane_wm_params(const struct drm_i915_private
*dev_priv,
}
static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
- struct intel_crtc_state *cstate,
int level,
const struct skl_wm_params *wp,
const struct skl_wm_level *result_prev,
@@ -4659,17 +4660,15 @@ static int skl_compute_plane_wm(const struct
drm_i915_private *dev_priv,
method1 = skl_wm_method1(dev_priv, wp->plane_pixel_rate,
wp->cpp, latency, wp->dbuf_block_size);
- method2 = skl_wm_method2(wp->plane_pixel_rate,
-cstate->base.adjusted_mode.crtc_htotal,
+ method2 = skl_wm_method2(wp->plane_pixel_rate, wp->pipe_htotal,
latency,
wp->plane_blocks_per_line);
if (wp->y_tiled) {
selected_result = max_fixed16(method2, wp->y_tile_minimum);
} else {
- if ((wp->cpp * cstate->base.adjusted_mode.crtc_htotal /
-wp->dbuf_block_size < 1) &&
-(wp->plane_bytes_per_line / wp->dbuf_block_size < 1)) {
+ if ((wp->cpp * wp->pipe_htotal / wp->dbuf_block_size < 1) &&
+ (wp->plane_bytes_per_line / wp->dbuf_block_size < 1)) {
selected_result = method2;
} else if (wp->ddb_blocks >=
fixed16_to_u32_round_up(wp->plane_blocks_per_line)) {
@@ -4782,7 +4781,6 @@ static int skl_compute_plane_wm(const struct
drm_i915_private *dev_priv,
static int
skl_compute_wm_levels(const struct drm_i915_private *dev_priv,
- struct intel_crtc_state *cstate,
const struct skl_wm_params *wm_params,
struct skl_plane_wm *wm,
int plane_id)
@@ -4802,7 +4800,6 @@ skl_compute_wm_levels(const struct drm_i915_private
*dev_priv,
result_prev = plane_id ? >uv_wm[0] : >wm[0];
ret = skl_compute_plane_wm(dev_priv,
- cstate,
level,
wm_params,
result_prev,
@@ -4937,8 +4934,7 @@ static int skl_build_pipe_wm(struct intel_crtc_state
*cstate,
if (!wm_params.plane_visible)
continue;
- ret = skl_compute_wm_levels(dev_priv, cstate, _params, wm,
- 0);
+ ret = skl_compute_wm_levels(dev_priv, _params, wm, 0);
if (ret) {
DRM_DEBUG_KMS("[PLANE:%d:%s] failed to compute
watermark levels\n",
plane->base.id, plane->name);
@@ -4956,8 +4952,8 @@ static int skl_build_pipe_wm(struct intel_crtc_state
*cstate,
if (ret)
return ret;
- ret = skl_compute_wm_levels(dev_priv, cstate,
- _params, wm, 1);
+ ret = skl_compute_wm_levels(dev_priv, _params, wm,
+ 1);
if (ret) {
[Intel-gfx] [PATCH 09/11] drm/i915: make skl_needs_memory_bw_wa() take dev_priv instead of state
The function only really needs dev_priv to make its decision. If we
ever need more, we can change it again. But then, in this case we
should make needs_memory_bw_wa be a variable inside struct
skl_wm_params so we won't need to keep passing intel states deep
inside pure watermark value calculation functions.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 14 --
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 1290efc64869..d101c542f10d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3599,10 +3599,8 @@ static u8 intel_enabled_dbuf_slices_num(struct
drm_i915_private *dev_priv)
* FIXME: We still don't have the proper code detect if we need to apply the
WA,
* so assume we'll always need it in order to avoid underruns.
*/
-static bool skl_needs_memory_bw_wa(struct intel_atomic_state *state)
+static bool skl_needs_memory_bw_wa(const struct drm_i915_private *dev_priv)
{
- struct drm_i915_private *dev_priv = to_i915(state->base.dev);
-
if (IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv))
return true;
@@ -3765,7 +3763,7 @@ bool intel_can_enable_sagv(struct drm_atomic_state *state)
latency = dev_priv->wm.skl_latency[level];
- if (skl_needs_memory_bw_wa(intel_state) &&
+ if (skl_needs_memory_bw_wa(dev_priv) &&
plane->base.state->fb->modifier ==
I915_FORMAT_MOD_X_TILED)
latency += 15;
@@ -4530,9 +4528,7 @@ skl_compute_plane_wm_params(const struct drm_i915_private
*dev_priv,
const struct drm_framebuffer *fb = pstate->fb;
enum pipe pipe = to_intel_crtc(cstate->base.crtc)->pipe;
uint32_t interm_pbpl;
- struct intel_atomic_state *state =
- to_intel_atomic_state(cstate->base.state);
- bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state);
+ bool apply_memory_bw_wa = skl_needs_memory_bw_wa(dev_priv);
wp->plane_visible = intel_wm_plane_visible(cstate, intel_pstate);
if (!wp->plane_visible)
@@ -4644,9 +4640,7 @@ static int skl_compute_plane_wm(const struct
drm_i915_private *dev_priv,
uint_fixed_16_16_t method1, method2;
uint_fixed_16_16_t selected_result;
uint32_t res_blocks, res_lines;
- struct intel_atomic_state *state =
- to_intel_atomic_state(cstate->base.state);
- bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state);
+ bool apply_memory_bw_wa = skl_needs_memory_bw_wa(dev_priv);
uint32_t min_disp_buf_needed;
if (latency == 0) {
--
2.14.4
___
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[Intel-gfx] [PATCH 08/11] drm/i915: reorganize the error message for invalid watermarks
Print a more generic "failed to compute watermark levels" whenever any
of skl_compute_wm_levels() fail, and print only the specific error
message for the specific cases. This allows us to stop passing pstate
everywhere, making the watermarks computation code a little less
dependent on random intel state structs.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 27 ---
1 file changed, 12 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 4053f4a68657..1290efc64869 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4635,13 +4635,11 @@ skl_compute_plane_wm_params(const struct
drm_i915_private *dev_priv,
static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
struct intel_crtc_state *cstate,
- const struct intel_plane_state *intel_pstate,
int level,
const struct skl_wm_params *wp,
const struct skl_wm_level *result_prev,
struct skl_wm_level *result /* out */)
{
- const struct drm_plane_state *pstate = _pstate->base;
uint32_t latency = dev_priv->wm.skl_latency[level];
uint_fixed_16_16_t method1, method2;
uint_fixed_16_16_t selected_result;
@@ -4763,11 +4761,7 @@ static int skl_compute_plane_wm(const struct
drm_i915_private *dev_priv,
if (level) {
return 0;
} else {
- struct drm_plane *plane = pstate->plane;
-
- DRM_DEBUG_KMS("Requested display configuration exceeds
system watermark limitations\n");
- DRM_DEBUG_KMS("[PLANE:%d:%s] blocks required = %u/%u,
lines required = %u/31\n",
- plane->base.id, plane->name,
+ DRM_DEBUG_KMS("Requested display configuration exceeds
system watermark limitations: blocks required = %u/%u, lines required =
%u/31\n",
res_blocks, wp->ddb_blocks, res_lines);
return -EINVAL;
}
@@ -4795,7 +4789,6 @@ static int skl_compute_plane_wm(const struct
drm_i915_private *dev_priv,
static int
skl_compute_wm_levels(const struct drm_i915_private *dev_priv,
struct intel_crtc_state *cstate,
- const struct intel_plane_state *intel_pstate,
const struct skl_wm_params *wm_params,
struct skl_plane_wm *wm,
int plane_id)
@@ -4816,7 +4809,6 @@ skl_compute_wm_levels(const struct drm_i915_private
*dev_priv,
ret = skl_compute_plane_wm(dev_priv,
cstate,
- intel_pstate,
level,
wm_params,
result_prev,
@@ -4951,10 +4943,13 @@ static int skl_build_pipe_wm(struct intel_crtc_state
*cstate,
if (!wm_params.plane_visible)
continue;
- ret = skl_compute_wm_levels(dev_priv, cstate,
- intel_pstate, _params, wm, 0);
- if (ret)
+ ret = skl_compute_wm_levels(dev_priv, cstate, _params, wm,
+ 0);
+ if (ret) {
+ DRM_DEBUG_KMS("[PLANE:%d:%s] failed to compute
watermark levels\n",
+ plane->base.id, plane->name);
return ret;
+ }
skl_compute_transition_wm(cstate, _params, >wm[0],
>trans_wm);
@@ -4968,10 +4963,12 @@ static int skl_build_pipe_wm(struct intel_crtc_state
*cstate,
return ret;
ret = skl_compute_wm_levels(dev_priv, cstate,
- intel_pstate, _params,
- wm, 1);
- if (ret)
+ _params, wm, 1);
+ if (ret) {
+ DRM_DEBUG_KMS("[PLANE:%d:%s] failed to compute
planar watermark levels\n",
+ plane->base.id, plane->name);
return ret;
+ }
}
}
--
2.14.4
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[Intel-gfx] [PATCH 04/11] drm/i915: remove useless memset() for watermarks parameters
The skl_compute_plane_wm_params() already completely sets the contents
of its struct, or returns plane_visible=0 or returns an error code.
There's no need to memset() it at this point for the same reason we
don't zero-initialize it up when dealing with plane 0.
If we want to keep the memset "just to be safe", then we should also
zero initialize it when we use it for plane 0.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 9043ffe40ce8..d1dd3ae408f9 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4972,7 +4972,6 @@ static int skl_build_pipe_wm(struct intel_crtc_state
*cstate,
/* uv plane watermarks must also be validated for NV12/Planar */
if (wm_params.is_planar) {
- memset(_params, 0, sizeof(struct skl_wm_params));
wm->is_planar = true;
ret = skl_compute_plane_wm_params(dev_priv, cstate,
--
2.14.4
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[Intel-gfx] [PATCH 00/11] More watermarks improvements
Except for maybe patch 1, I don't believe this series will allow us to close any real bugs, but at least it should make the code more readable. Please notice that we removed more lines than we added :). Thanks, Paulo Paulo Zanoni (11): drm/i915: don't apply Display WAs 1125 and 1126 to GLK/CNL+ drm/i915: remove padding from struct skl_wm_level drm/i915: fix handling of invisible planes in watermarks code drm/i915: remove useless memset() for watermarks parameters drm/i915: simplify wm->is_planar assignment drm/i915: refactor skl_write_plane_wm() drm/i915: move ddb_blocks to be a watermark parameter drm/i915: reorganize the error message for invalid watermarks drm/i915: make skl_needs_memory_bw_wa() take dev_priv instead of state drm/i915: add pipe_htotal to struct skl_wm_params drm/i915: pass dev_priv instead of cstate to skl_compute_transition_wm() drivers/gpu/drm/i915/i915_drv.h | 5 +- drivers/gpu/drm/i915/intel_pm.c | 198 ++-- 2 files changed, 92 insertions(+), 111 deletions(-) -- 2.14.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 06/11] drm/i915: refactor skl_write_plane_wm()
Its control flow is not as easy to follow as it could be. We recently
even had a double register write that went unnoticed until commit
9e44b180f81b ("drm/i915: don't write PLANE_BUF_CFG twice every time")
fixed it. The return statement in the middle along with the fact that
it's on a void function really doesn't help readability IMHO.
Refactor the function so that the first level of checks is per
platform and the second level is for planar planes. IMHO that makes
the code much more readable.
Requested-by: Matt Roper
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 33 -
1 file changed, 20 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 7fd344b81d66..f388bfa99a97 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5033,21 +5033,28 @@ static void skl_write_plane_wm(struct intel_crtc
*intel_crtc,
skl_write_wm_level(dev_priv, PLANE_WM_TRANS(pipe, plane_id),
>trans_wm);
- /* FIXME: add proper NV12 support for ICL. */
- if (INTEL_GEN(dev_priv) >= 11)
- return skl_ddb_entry_write(dev_priv,
- PLANE_BUF_CFG(pipe, plane_id),
- >plane[pipe][plane_id]);
- if (wm->is_planar) {
- skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id),
- >uv_plane[pipe][plane_id]);
+ if (INTEL_GEN(dev_priv) >= 11) {
+ /* FIXME: add proper NV12 support for ICL. */
+ if (wm->is_planar)
+ DRM_ERROR("No DDB support for planar formats yet\n");
+
skl_ddb_entry_write(dev_priv,
- PLANE_NV12_BUF_CFG(pipe, plane_id),
- >plane[pipe][plane_id]);
+ PLANE_BUF_CFG(pipe, plane_id),
+ >plane[pipe][plane_id]);
} else {
- skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id),
- >plane[pipe][plane_id]);
- I915_WRITE(PLANE_NV12_BUF_CFG(pipe, plane_id), 0x0);
+ if (wm->is_planar) {
+ skl_ddb_entry_write(dev_priv,
+ PLANE_BUF_CFG(pipe, plane_id),
+ >uv_plane[pipe][plane_id]);
+ skl_ddb_entry_write(dev_priv,
+ PLANE_NV12_BUF_CFG(pipe, plane_id),
+ >plane[pipe][plane_id]);
+ } else {
+ skl_ddb_entry_write(dev_priv,
+ PLANE_BUF_CFG(pipe, plane_id),
+ >plane[pipe][plane_id]);
+ I915_WRITE(PLANE_NV12_BUF_CFG(pipe, plane_id), 0x0);
+ }
}
}
--
2.14.4
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[Intel-gfx] [PATCH 07/11] drm/i915: move ddb_blocks to be a watermark parameter
The goal of struct skl_wm_params is to cache every watermark
parameter so the other functions can just use them without worrying
about the appropriate place to fetch each parameter requested by the
spec, and without having to recompute parameters that are used in
different steps of the calculation.
The ddb_blocks parameter is one that is used by both the the plane
watermarks and the transition watermarks. Move ddb_blocks to the
parameter struct so we can simplify the code.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 44 -
2 files changed, 18 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4b1e8471609b..b32d680d9bf0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1255,6 +1255,7 @@ struct skl_wm_params {
bool rc_surface;
bool is_planar;
uint32_t width;
+ uint16_t ddb_blocks;
uint8_t cpp;
uint32_t plane_pixel_rate;
uint32_t y_min_scanlines;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f388bfa99a97..4053f4a68657 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4522,11 +4522,13 @@ static int
skl_compute_plane_wm_params(const struct drm_i915_private *dev_priv,
struct intel_crtc_state *cstate,
const struct intel_plane_state *intel_pstate,
+ const struct skl_ddb_allocation *ddb,
struct skl_wm_params *wp, int plane_id)
{
struct intel_plane *plane = to_intel_plane(intel_pstate->base.plane);
const struct drm_plane_state *pstate = _pstate->base;
const struct drm_framebuffer *fb = pstate->fb;
+ enum pipe pipe = to_intel_crtc(cstate->base.crtc)->pipe;
uint32_t interm_pbpl;
struct intel_atomic_state *state =
to_intel_atomic_state(cstate->base.state);
@@ -4624,13 +4626,16 @@ skl_compute_plane_wm_params(const struct
drm_i915_private *dev_priv,
wp->linetime_us = fixed16_to_u32_round_up(
intel_get_linetime_us(cstate));
+ wp->ddb_blocks = plane_id ?
+skl_ddb_entry_size(>uv_plane[pipe][plane->id]) :
+skl_ddb_entry_size(>plane[pipe][plane->id]);
+
return 0;
}
static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
struct intel_crtc_state *cstate,
const struct intel_plane_state *intel_pstate,
- uint16_t ddb_allocation,
int level,
const struct skl_wm_params *wp,
const struct skl_wm_level *result_prev,
@@ -4674,7 +4679,7 @@ static int skl_compute_plane_wm(const struct
drm_i915_private *dev_priv,
wp->dbuf_block_size < 1) &&
(wp->plane_bytes_per_line / wp->dbuf_block_size < 1)) {
selected_result = method2;
- } else if (ddb_allocation >=
+ } else if (wp->ddb_blocks >=
fixed16_to_u32_round_up(wp->plane_blocks_per_line)) {
if (INTEL_GEN(dev_priv) == 9 &&
!IS_GEMINILAKE(dev_priv))
@@ -4747,8 +4752,8 @@ static int skl_compute_plane_wm(const struct
drm_i915_private *dev_priv,
}
if ((level > 0 && res_lines > 31) ||
- res_blocks >= ddb_allocation ||
- min_disp_buf_needed >= ddb_allocation) {
+ res_blocks >= wp->ddb_blocks ||
+ min_disp_buf_needed >= wp->ddb_blocks) {
result->plane_en = false;
/*
@@ -4763,7 +4768,7 @@ static int skl_compute_plane_wm(const struct
drm_i915_private *dev_priv,
DRM_DEBUG_KMS("Requested display configuration exceeds
system watermark limitations\n");
DRM_DEBUG_KMS("[PLANE:%d:%s] blocks required = %u/%u,
lines required = %u/31\n",
plane->base.id, plane->name,
- res_blocks, ddb_allocation, res_lines);
+ res_blocks, wp->ddb_blocks, res_lines);
return -EINVAL;
}
}
@@ -4789,26 +4794,15 @@ static int skl_compute_plane_wm(const struct
drm_i915_private *dev_priv,
static int
skl_compute_wm_levels(const struct drm_i915_private *dev_priv,
- struct skl_ddb_allocation *ddb,
struct intel_crtc_state *cstate,
const struct intel_plane_state *intel_pstate,
const struct skl_wm_params *wm_params,
struct skl_plane_wm *wm,
[Intel-gfx] [PATCH 11/11] drm/i915: pass dev_priv instead of cstate to skl_compute_transition_wm()
Stop passing modeset state structures to functions that should work
only with the skl_wm_params. The only use for cstate there was to
reach dev_priv, so pass it directly.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index b01f3d807ff6..dac26133 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4836,13 +4836,11 @@ skl_compute_linetime_wm(struct intel_crtc_state *cstate)
return linetime_wm;
}
-static void skl_compute_transition_wm(struct intel_crtc_state *cstate,
+static void skl_compute_transition_wm(const struct drm_i915_private *dev_priv,
struct skl_wm_params *wp,
struct skl_wm_level *wm_l0,
struct skl_wm_level *trans_wm /* out */)
{
- struct drm_device *dev = cstate->base.crtc->dev;
- const struct drm_i915_private *dev_priv = to_i915(dev);
uint16_t trans_min, trans_y_tile_min;
const uint16_t trans_amount = 10; /* This is configurable amount */
uint16_t wm0_sel_res_b, trans_offset_b, res_blocks;
@@ -4941,7 +4939,7 @@ static int skl_build_pipe_wm(struct intel_crtc_state
*cstate,
return ret;
}
- skl_compute_transition_wm(cstate, _params, >wm[0],
+ skl_compute_transition_wm(dev_priv, _params, >wm[0],
>trans_wm);
/* uv plane watermarks must also be validated for NV12/Planar */
--
2.14.4
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[Intel-gfx] [PATCH 05/11] drm/i915: simplify wm->is_planar assignment
We're currently doing it in two different ways, none of them based on
the wm_params struct. Both places are correct, so I chose to keep the
one in skl_compute_wm_levels() since it's the function that sets the
other values for the same struct. But I'm open to better suggestions
on the place to assign it.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d1dd3ae408f9..7fd344b81d66 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4832,8 +4832,7 @@ skl_compute_wm_levels(const struct drm_i915_private
*dev_priv,
return ret;
}
- if (intel_pstate->base.fb->format->format == DRM_FORMAT_NV12)
- wm->is_planar = true;
+ wm->is_planar = wm_params->is_planar;
return 0;
}
@@ -4972,8 +4971,6 @@ static int skl_build_pipe_wm(struct intel_crtc_state
*cstate,
/* uv plane watermarks must also be validated for NV12/Planar */
if (wm_params.is_planar) {
- wm->is_planar = true;
-
ret = skl_compute_plane_wm_params(dev_priv, cstate,
intel_pstate,
_params, 1);
--
2.14.4
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[Intel-gfx] [PATCH 02/11] drm/i915: remove padding from struct skl_wm_level
This reduces the size of struct skl_wm_level from 6 to 4, which
reduces the size of struct skl_plane_wm from 104 to 70, which reduces
the size of struct skl_pipe_wm from 524 to 356. A reduction of 168
padding bytes per pipe. This will increase even more the next time we
bump I915_MAX_PLANES.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3017ef037fed..3616b718b5d2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1243,9 +1243,9 @@ struct skl_ddb_values {
};
struct skl_wm_level {
- bool plane_en;
uint16_t plane_res_b;
uint8_t plane_res_l;
+ bool plane_en;
};
/* Stores plane specific WM parameters */
--
2.14.4
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[Intel-gfx] [PATCH 01/11] drm/i915: don't apply Display WAs 1125 and 1126 to GLK/CNL+
BSpec does not show these WAs as applicable to GLK, and for CNL it
only shows them applicable for a super early pre-production stepping
we shouldn't be caring about anymore. Remove these so we can avoid
them on ICL too.
Cc: Matt Roper
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 43 ++---
1 file changed, 23 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 67a4d0735291..18157c6ee126 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4696,28 +4696,31 @@ static int skl_compute_plane_wm(const struct
drm_i915_private *dev_priv,
res_lines = div_round_up_fixed16(selected_result,
wp->plane_blocks_per_line);
- /* Display WA #1125: skl,bxt,kbl,glk */
- if (level == 0 && wp->rc_surface)
- res_blocks += fixed16_to_u32_round_up(wp->y_tile_minimum);
+ if (IS_GEN9(dev_priv) && !IS_GEMINILAKE(dev_priv)) {
+ /* Display WA #1125: skl,bxt,kbl */
+ if (level == 0 && wp->rc_surface)
+ res_blocks +=
+ fixed16_to_u32_round_up(wp->y_tile_minimum);
+
+ /* Display WA #1126: skl,bxt,kbl */
+ if (level >= 1 && level <= 7) {
+ if (wp->y_tiled) {
+ res_blocks +=
+ fixed16_to_u32_round_up(wp->y_tile_minimum);
+ res_lines += wp->y_min_scanlines;
+ } else {
+ res_blocks++;
+ }
- /* Display WA #1126: skl,bxt,kbl,glk */
- if (level >= 1 && level <= 7) {
- if (wp->y_tiled) {
- res_blocks += fixed16_to_u32_round_up(
- wp->y_tile_minimum);
- res_lines += wp->y_min_scanlines;
- } else {
- res_blocks++;
+ /*
+* Make sure result blocks for higher latency levels are
+* atleast as high as level below the current level.
+* Assumption in DDB algorithm optimization for special
+* cases. Also covers Display WA #1125 for RC.
+*/
+ if (result_prev->plane_res_b > res_blocks)
+ res_blocks = result_prev->plane_res_b;
}
-
- /*
-* Make sure result blocks for higher latency levels are atleast
-* as high as level below the current level.
-* Assumption in DDB algorithm optimization for special cases.
-* Also covers Display WA #1125 for RC.
-*/
- if (result_prev->plane_res_b > res_blocks)
- res_blocks = result_prev->plane_res_b;
}
if (INTEL_GEN(dev_priv) >= 11) {
--
2.14.4
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gen9+: Fix initial readout for Y tiled framebuffers
== Series Details == Series: drm/i915/gen9+: Fix initial readout for Y tiled framebuffers URL : https://patchwork.freedesktop.org/series/51075/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4990_full -> Patchwork_10477_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_10477_full that come from known issues: === IGT changes === Issues hit igt@gem_exec_await@wide-contexts: shard-skl: PASS -> FAIL (fdo#106680) igt@gem_ppgtt@blt-vs-render-ctxn: shard-skl: NOTRUN -> TIMEOUT (fdo#108039) igt@kms_atomic_transition@1x-modeset-transitions-nonblocking: shard-skl: NOTRUN -> FAIL (fdo#108228) igt@kms_busy@extended-modeset-hang-newfb-render-a: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: shard-hsw: NOTRUN -> DMESG-WARN (fdo#107956) +2 igt@kms_cursor_crc@cursor-256x256-suspend: shard-skl: NOTRUN -> FAIL (fdo#103191, fdo#103232) igt@kms_cursor_crc@cursor-256x85-sliding: shard-apl: PASS -> FAIL (fdo#103232) igt@kms_cursor_crc@cursor-64x64-suspend: shard-skl: PASS -> INCOMPLETE (fdo#104108) igt@kms_draw_crc@draw-method-xrgb2101010-pwrite-untiled: shard-skl: NOTRUN -> FAIL (fdo#103184) +2 igt@kms_flip@blocking-absolute-wf_vblank: shard-kbl: PASS -> DMESG-WARN (fdo#105345) igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-skl: PASS -> FAIL (fdo#105363) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff: shard-skl: NOTRUN -> FAIL (fdo#105682) +1 igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move: shard-skl: NOTRUN -> FAIL (fdo#103167) +4 igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max: shard-glk: NOTRUN -> FAIL (fdo#108145) +1 igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: shard-skl: NOTRUN -> FAIL (fdo#108145) +3 igt@kms_setmode@basic: shard-apl: PASS -> FAIL (fdo#99912) igt@pm_rpm@gem-mmap-cpu: shard-skl: PASS -> INCOMPLETE (fdo#107807) Possible fixes igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: shard-glk: FAIL (fdo#103167) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108 fdo#105345 https://bugs.freedesktop.org/show_bug.cgi?id=105345 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#105682 https://bugs.freedesktop.org/show_bug.cgi?id=105682 fdo#106680 https://bugs.freedesktop.org/show_bug.cgi?id=106680 fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#108039 https://bugs.freedesktop.org/show_bug.cgi?id=108039 fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145 fdo#108228 https://bugs.freedesktop.org/show_bug.cgi?id=108228 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (6 -> 6) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4990 -> Patchwork_10477 CI_DRM_4990: 0bd34d92e9a27784cb988a300619f497ca0e99ec @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4681: 959d6f95cb1344e0c0dace5b236e17755826fac1 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10477: 030f7e7d682d65b11f75afd2a5e128e2b839130c @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10477/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v5 19/28] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
On Tue, Oct 16, 2018 at 02:04:21PM -0700, Manasi Navare wrote:
> On Tue, Oct 16, 2018 at 10:45:55PM +0300, Ville Syrjälä wrote:
> > On Tue, Oct 16, 2018 at 12:42:05PM -0700, Manasi Navare wrote:
> > > On Tue, Oct 16, 2018 at 10:19:06PM +0300, Ville Syrjälä wrote:
> > > > On Tue, Oct 16, 2018 at 10:01:11PM +0300, Ville Syrjälä wrote:
> > > > > On Fri, Oct 05, 2018 at 04:22:57PM -0700, Manasi Navare wrote:
> > > > > > On Icelake, a separate power well PG2 is created for
> > > > > > VDSC engine used for eDP/MIPI DSI. This patch adds a new
> > > > > > display power domain for Power well 2.
> > > > > >
> > > > > > v2:
> > > > > > * Fix the power well mismatch CI error (Ville)
> > > > > > * Rename as VDSC_PIPE_A (Imre)
> > > > > > * Fix a whitespace (Anusha)
> > > > > > * Fix Comments (Imre)
> > > > > >
> > > > > > Cc: Ville Syrjala
> > > > > > Cc: Rodrigo Vivi
> > > > > > Cc: Imre Deak
> > > > > > Signed-off-by: Manasi Navare
> > > > > > ---
> > > > > > drivers/gpu/drm/i915/intel_display.h| 1 +
> > > > > > drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +++-
> > > > > > 2 files changed, 4 insertions(+), 1 deletion(-)
> > > > > >
> > > > > > diff --git a/drivers/gpu/drm/i915/intel_display.h
> > > > > > b/drivers/gpu/drm/i915/intel_display.h
> > > > > > index 9eaba1bccae8..4c513169960c 100644
> > > > > > --- a/drivers/gpu/drm/i915/intel_display.h
> > > > > > +++ b/drivers/gpu/drm/i915/intel_display.h
> > > > > > @@ -256,6 +256,7 @@ enum intel_display_power_domain {
> > > > > > POWER_DOMAIN_MODESET,
> > > > > > POWER_DOMAIN_GT_IRQ,
> > > > > > POWER_DOMAIN_INIT,
> > > > > > + POWER_DOMAIN_VDSC_PIPE_A,
> > > > >
> > > > > I'd probably put it next to the other pipe related power domains.
> > > > > So maybe after POWER_DOMAIN_PIPE_C_PANEL_FITTER.
> > > > >
> > > > > And to match the current naming pattern it should be called
> > > > > POWER_DOMAIN_PIPE_A_VDSC.
> > > >
> > > > Hmm. We could also give it an alias TRANSCODER_EDP_VDSC. Making
> > > > it an alias would avoid wasting yet another bit, but would make
> > > > the code easier to understand as we wouldn't have to add comments
> > > > explaining why we use a PIPE_A_VDSC power domain based on the
> > > > usage of the EDP transcoder.
> > > >
> > >
> > > So you are suggesting adding an alias TRANSCODER_EDP_VDSC for
> > > POWER_DOMAIN_PIPE_A_VDSC?
> > > But how does it avoid wasting another bit, since we would still have
> > > POWER_DOMAIN_PIPE_A_VDSC as a field
> > > in enum power domains right?
> >
> > enum ... {
> > ...
> > POWER_DOMAIN_PIPE_A_VDSC,
> > POWER_DOMAIN_TRANSCODER_EDP_VDSC = POWER_DOMAIN_PIPE_A_VDSC,
> > ...
> > };
>
> Why keep the POWER_DOMAIN_PIPE_A_VDSC name at all? Just for using it for
> *something*..?
>
> Manasi
>
Ok final consensus is to name it as POWER_DOMAIN_TRANSCODER_EDP_VDSC as per the
IRC discusion.
Manasi
> >
> > --
> > Ville Syrjälä
> > Intel
> > ___
> > dri-devel mailing list
> > dri-de...@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/dri-devel
> ___
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/atomic_helper: Stop modesets on unregistered connectors harder (rev2)
== Series Details == Series: drm/atomic_helper: Stop modesets on unregistered connectors harder (rev2) URL : https://patchwork.freedesktop.org/series/51041/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4990 -> Patchwork_10480 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/51041/revisions/2/mbox/ == Known issues == Here are the changes found in Patchwork_10480 that come from known issues: === IGT changes === Issues hit igt@gem_exec_suspend@basic-s3: fi-kbl-soraka: NOTRUN -> INCOMPLETE (fdo#107556, fdo#107774, fdo#107859) igt@kms_flip@basic-flip-vs-dpms: fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000) igt@pm_rpm@module-reload: fi-glk-j4005: PASS -> DMESG-WARN (fdo#107726) Possible fixes igt@drv_selftest@live_hangcheck: fi-icl-u2: INCOMPLETE (fdo#108315) -> PASS igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: fi-glk-j4005: FAIL (fdo#106765) -> PASS igt@kms_flip@basic-flip-vs-dpms: fi-hsw-4770r: DMESG-WARN (fdo#105602) -> PASS igt@kms_flip@basic-plain-flip: fi-glk-j4005: DMESG-WARN (fdo#106097) -> PASS igt@kms_frontbuffer_tracking@basic: fi-icl-u2: FAIL (fdo#103167) -> PASS fi-byt-clapper: FAIL (fdo#103167) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000 fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097 fdo#106765 https://bugs.freedesktop.org/show_bug.cgi?id=106765 fdo#107556 https://bugs.freedesktop.org/show_bug.cgi?id=107556 fdo#107726 https://bugs.freedesktop.org/show_bug.cgi?id=107726 fdo#107774 https://bugs.freedesktop.org/show_bug.cgi?id=107774 fdo#107859 https://bugs.freedesktop.org/show_bug.cgi?id=107859 fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315 == Participating hosts (46 -> 41) == Additional (1): fi-kbl-soraka Missing(6): fi-ilk-m540 fi-hsw-4200u fi-skl-guc fi-byt-squawks fi-bsw-cyan fi-kbl-7560u == Build changes == * Linux: CI_DRM_4990 -> Patchwork_10480 CI_DRM_4990: 0bd34d92e9a27784cb988a300619f497ca0e99ec @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4681: 959d6f95cb1344e0c0dace5b236e17755826fac1 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10480: 060289b50a40ec037671fcc15eec17fbf00c304f @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 060289b50a40 drm/atomic_helper: Stop modesets on unregistered connectors harder == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10480/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v5 19/28] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
On Tue, Oct 16, 2018 at 10:45:55PM +0300, Ville Syrjälä wrote:
> On Tue, Oct 16, 2018 at 12:42:05PM -0700, Manasi Navare wrote:
> > On Tue, Oct 16, 2018 at 10:19:06PM +0300, Ville Syrjälä wrote:
> > > On Tue, Oct 16, 2018 at 10:01:11PM +0300, Ville Syrjälä wrote:
> > > > On Fri, Oct 05, 2018 at 04:22:57PM -0700, Manasi Navare wrote:
> > > > > On Icelake, a separate power well PG2 is created for
> > > > > VDSC engine used for eDP/MIPI DSI. This patch adds a new
> > > > > display power domain for Power well 2.
> > > > >
> > > > > v2:
> > > > > * Fix the power well mismatch CI error (Ville)
> > > > > * Rename as VDSC_PIPE_A (Imre)
> > > > > * Fix a whitespace (Anusha)
> > > > > * Fix Comments (Imre)
> > > > >
> > > > > Cc: Ville Syrjala
> > > > > Cc: Rodrigo Vivi
> > > > > Cc: Imre Deak
> > > > > Signed-off-by: Manasi Navare
> > > > > ---
> > > > > drivers/gpu/drm/i915/intel_display.h| 1 +
> > > > > drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +++-
> > > > > 2 files changed, 4 insertions(+), 1 deletion(-)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/i915/intel_display.h
> > > > > b/drivers/gpu/drm/i915/intel_display.h
> > > > > index 9eaba1bccae8..4c513169960c 100644
> > > > > --- a/drivers/gpu/drm/i915/intel_display.h
> > > > > +++ b/drivers/gpu/drm/i915/intel_display.h
> > > > > @@ -256,6 +256,7 @@ enum intel_display_power_domain {
> > > > > POWER_DOMAIN_MODESET,
> > > > > POWER_DOMAIN_GT_IRQ,
> > > > > POWER_DOMAIN_INIT,
> > > > > + POWER_DOMAIN_VDSC_PIPE_A,
> > > >
> > > > I'd probably put it next to the other pipe related power domains.
> > > > So maybe after POWER_DOMAIN_PIPE_C_PANEL_FITTER.
> > > >
> > > > And to match the current naming pattern it should be called
> > > > POWER_DOMAIN_PIPE_A_VDSC.
> > >
> > > Hmm. We could also give it an alias TRANSCODER_EDP_VDSC. Making
> > > it an alias would avoid wasting yet another bit, but would make
> > > the code easier to understand as we wouldn't have to add comments
> > > explaining why we use a PIPE_A_VDSC power domain based on the
> > > usage of the EDP transcoder.
> > >
> >
> > So you are suggesting adding an alias TRANSCODER_EDP_VDSC for
> > POWER_DOMAIN_PIPE_A_VDSC?
> > But how does it avoid wasting another bit, since we would still have
> > POWER_DOMAIN_PIPE_A_VDSC as a field
> > in enum power domains right?
>
> enum ... {
> ...
> POWER_DOMAIN_PIPE_A_VDSC,
> POWER_DOMAIN_TRANSCODER_EDP_VDSC = POWER_DOMAIN_PIPE_A_VDSC,
> ...
> };
Why keep the POWER_DOMAIN_PIPE_A_VDSC name at all? Just for using it for
*something*..?
Manasi
>
> --
> Ville Syrjälä
> Intel
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
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Re: [Intel-gfx] [PATCH v5 20/28] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling
On Tue, Oct 16, 2018 at 12:58:24PM -0700, Srivatsa, Anusha wrote:
>
>
> >-Original Message-
> >From: Navare, Manasi D
> >Sent: Friday, October 5, 2018 4:23 PM
> >To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
> >Cc: Navare, Manasi D ; Jani Nikula
> >; Ville Syrjala ;
> >Srivatsa, Anusha
> >Subject: [PATCH v5 20/28] drm/i915/dp: Configure i915 Picture parameter Set
> >registers during DSC enabling
> >
> >After encoder->pre_enable() hook, after link training sequence is completed,
> >PPS
> >registers for DSC encoder are configured using the DSC state parameters in
> >intel_crtc_state as part of DSC enabling routine in the source. DSC enabling
> >routine is called after
> >encoder->pre_enable() before enbaling the pipe and after
> >compression is enabled on the sink.
> >
> >v3:
> >* Configure Pic_width/2 for each VDSC engine when two VDSC engines per pipe
> >are used (Manasi)
> >* Add DSC slice_row_per_frame in PPS16 (Manasi)
> >
> >v2:
> >* Enable PG2 power well for VDSC on eDP
> >
> >Cc: Jani Nikula
> >Cc: Ville Syrjala
> >Cc: Anusha Srivatsa
> >Signed-off-by: Manasi Navare
>
>
> >---
> > drivers/gpu/drm/i915/i915_drv.h | 2 +
> > drivers/gpu/drm/i915/intel_display.c | 6 +
> > drivers/gpu/drm/i915/intel_vdsc.c| 418 +++
> > 3 files changed, 426 insertions(+)
> >
> >diff --git a/drivers/gpu/drm/i915/i915_drv.h
> >b/drivers/gpu/drm/i915/i915_drv.h
> >index 93e57b271d3b..b49985f5d08c 100644
> >--- a/drivers/gpu/drm/i915/i915_drv.h
> >+++ b/drivers/gpu/drm/i915/i915_drv.h
> >@@ -3506,6 +3506,8 @@ extern void intel_rps_mark_interactive(struct
> >drm_i915_private *i915,
> >bool interactive);
> > extern bool intel_set_memory_cxsr(struct drm_i915_private *dev_priv,
> > bool enable);
> >+extern void intel_dsc_enable(struct intel_encoder *encoder,
> >+ struct intel_crtc_state *crtc_state);
> >
> > int i915_reg_read_ioctl(struct drm_device *dev, void *data,
> > struct drm_file *file);
> >diff --git a/drivers/gpu/drm/i915/intel_display.c
> >b/drivers/gpu/drm/i915/intel_display.c
> >index 4ebf7c83085c..f7cb41775c57 100644
> >--- a/drivers/gpu/drm/i915/intel_display.c
> >+++ b/drivers/gpu/drm/i915/intel_display.c
> >@@ -5480,6 +5480,12 @@ static void intel_encoders_pre_enable(struct
> >drm_crtc *crtc,
> >
> > if (encoder->pre_enable)
> > encoder->pre_enable(encoder, crtc_state, conn_state);
> >+
> >+/*
> >+ * Enable and Configure Display Stream Compression in the
> >source
> >+ * if enabled in intel_crtc_state.
> >+ */
> >+intel_dsc_enable(encoder, crtc_state);
> > }
> > }
> >
> >diff --git a/drivers/gpu/drm/i915/intel_vdsc.c
> >b/drivers/gpu/drm/i915/intel_vdsc.c
> >index 594196a9d0f4..1f2b5dc82f16 100644
> >--- a/drivers/gpu/drm/i915/intel_vdsc.c
> >+++ b/drivers/gpu/drm/i915/intel_vdsc.c
> >@@ -580,3 +580,421 @@ int intel_dp_compute_dsc_params(struct intel_dp
> >*intel_dp,
> >
> > return 0;
> > }
> >+
> >+static void intel_configure_pps_for_dsc_encoder(struct intel_encoder
> >*encoder,
> >+struct intel_crtc_state
> >*crtc_state) {
> >+struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
> >+struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> >+struct drm_dsc_config *vdsc_cfg = _state->dp_dsc_cfg;
> >+enum pipe pipe = crtc->pipe;
> >+u32 pps_val = 0;
> >+u32 rc_buf_thresh_dword[4];
> >+u32 rc_range_params_dword[8];
> >+u8 num_vdsc_instances = (crtc_state->dsc_params.dsc_split) ? 2 : 1;
> >+int i = 0;
> >+
> >+/* Populate PICTURE_PARAMETER_SET_0 registers */
> >+pps_val = DSC_VER_MAJ | vdsc_cfg->dsc_version_minor <<
> >+DSC_VER_MIN_SHIFT |
> >+vdsc_cfg->bits_per_component << DSC_BPC_SHIFT |
> >+vdsc_cfg->line_buf_depth << DSC_LINE_BUF_DEPTH_SHIFT;
> >+if (vdsc_cfg->block_pred_enable)
> >+pps_val |= DSC_BLOCK_PREDICTION;
> >+else
> >+pps_val &= ~DSC_BLOCK_PREDICTION;
> >+if (vdsc_cfg->convert_rgb)
> >+pps_val |= DSC_COLOR_SPACE_CONVERSION;
> >+else
> >+pps_val &= ~DSC_COLOR_SPACE_CONVERSION;
> >+if (vdsc_cfg->enable422)
> >+pps_val |= DSC_422_ENABLE;
> >+else
> >+pps_val &= ~DSC_422_ENABLE;
> >+if (vdsc_cfg->vbr_enable)
> >+pps_val |= DSC_VBR_ENABLE;
> >+else
> >+pps_val &= ~DSC_VBR_ENABLE;
> >+
> >+DRM_INFO("PPS0 = 0x%08x\n", pps_val);
> >+if (encoder->type == INTEL_OUTPUT_EDP) {
> >+I915_WRITE(DSCA_PICTURE_PARAMETER_SET_0, pps_val);
> >+/*
> >+ * If 2 VDSC instances are needed, configure PPS for second
> >+ * VDSC
> >+ */
> >+if (crtc_state->dsc_params.dsc_split)
> >+
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Use i915_gem_object_get_dma_address() to populate rotated vmas
== Series Details == Series: drm/i915: Use i915_gem_object_get_dma_address() to populate rotated vmas URL : https://patchwork.freedesktop.org/series/51072/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4990_full -> Patchwork_10476_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_10476_full that come from known issues: === IGT changes === Issues hit igt@gem_cpu_reloc@full: shard-skl: NOTRUN -> INCOMPLETE (fdo#108073) igt@gem_exec_schedule@pi-ringfull-bsd: shard-skl: NOTRUN -> FAIL (fdo#103158) +2 igt@gem_ppgtt@blt-vs-render-ctx0: shard-skl: NOTRUN -> TIMEOUT (fdo#108039) igt@kms_busy@extended-modeset-hang-newfb-render-a: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +2 igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: shard-snb: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: shard-hsw: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_cursor_crc@cursor-256x256-onscreen: shard-skl: NOTRUN -> FAIL (fdo#103232) igt@kms_fbcon_fbt@psr: shard-skl: NOTRUN -> FAIL (fdo#107882) igt@kms_frontbuffer_tracking@fbc-stridechange: shard-skl: NOTRUN -> FAIL (fdo#105683) igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite: shard-skl: NOTRUN -> FAIL (fdo#103167) igt@kms_panel_fitting@legacy: shard-skl: NOTRUN -> FAIL (fdo#105456) igt@kms_plane@pixel-format-pipe-b-planes: shard-skl: NOTRUN -> DMESG-FAIL (fdo#103166, fdo#106885) +1 igt@kms_plane@plane-position-covered-pipe-b-planes: shard-glk: NOTRUN -> FAIL (fdo#103166) +1 igt@kms_plane_alpha_blend@pipe-a-alpha-basic: shard-skl: NOTRUN -> FAIL (fdo#107815, fdo#108145) +1 igt@kms_plane_alpha_blend@pipe-b-alpha-7efc: shard-skl: NOTRUN -> FAIL (fdo#108146) igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max: shard-glk: NOTRUN -> FAIL (fdo#108145) +1 igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb: shard-skl: NOTRUN -> FAIL (fdo#108145) +1 igt@kms_rotation_crc@exhaust-fences: shard-skl: NOTRUN -> DMESG-WARN (fdo#105748) igt@kms_setmode@basic: shard-snb: NOTRUN -> FAIL (fdo#99912) igt@kms_sysfs_edid_timing: shard-skl: NOTRUN -> FAIL (fdo#100047) igt@perf@oa-exponents: shard-kbl: PASS -> INCOMPLETE (fdo#103665) igt@pm_rpm@modeset-non-lpsp-stress: shard-skl: SKIP -> INCOMPLETE (fdo#107807) Possible fixes igt@gem_softpin@noreloc-s3: shard-skl: INCOMPLETE (fdo#107773, fdo#104108) -> PASS igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c: shard-skl: DMESG-WARN (fdo#107956) -> PASS igt@pm_rpm@dpms-mode-unset-non-lpsp: shard-skl: INCOMPLETE (fdo#107807) -> SKIP igt@pm_rpm@system-suspend-execbuf: shard-skl: INCOMPLETE (fdo#107773, fdo#104108, fdo#107807) -> PASS fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047 fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108 fdo#105456 https://bugs.freedesktop.org/show_bug.cgi?id=105456 fdo#105683 https://bugs.freedesktop.org/show_bug.cgi?id=105683 fdo#105748 https://bugs.freedesktop.org/show_bug.cgi?id=105748 fdo#106885 https://bugs.freedesktop.org/show_bug.cgi?id=106885 fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773 fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807 fdo#107815 https://bugs.freedesktop.org/show_bug.cgi?id=107815 fdo#107882 https://bugs.freedesktop.org/show_bug.cgi?id=107882 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#108039 https://bugs.freedesktop.org/show_bug.cgi?id=108039 fdo#108073 https://bugs.freedesktop.org/show_bug.cgi?id=108073 fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145 fdo#108146 https://bugs.freedesktop.org/show_bug.cgi?id=108146 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (6 -> 6) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4990 -> Patchwork_10476 CI_DRM_4990: 0bd34d92e9a27784cb988a300619f497ca0e99ec @
[Intel-gfx] [PATCH v2] drm/atomic_helper: Stop modesets on unregistered connectors harder
Unfortunately, it appears our fix in:
commit b5d29843d8ef ("drm/atomic_helper: Allow DPMS On<->Off changes
for unregistered connectors")
Which attempted to work around the problems introduced by:
commit 4d80273976bf ("drm/atomic_helper: Disallow new modesets on
unregistered connectors")
Is still not the right solution, as modesets can still be triggered
outside of drm_atomic_set_crtc_for_connector().
So in order to fix this, while still being careful that we don't break
modesets that a driver may perform before being registered with
userspace, we replace connector->registered with a tristate member,
connector->registration_state. This allows us to keep track of whether
or not a connector is still initializing and hasn't been exposed to
userspace, is currently registered and exposed to userspace, or has been
legitimately removed from the system after having once been present.
Using this info, we can prevent userspace from performing new modesets
on unregistered connectors while still allowing the driver to perform
modesets on unregistered connectors before the driver has finished being
registered.
Changes since v1:
- Fix WARN_ON() in drm_connector_cleanup() that CI caught with this
patchset in igt@drv_module_reload@basic-reload-inject and
igt@drv_module_reload@basic-reload by checking if the connector is
registered instead of unregistered, as calling drm_connector_cleanup()
on a connector that hasn't been registered with userspace yet should
stay valid.
- Remove unregistered_connector_check(), and just go back to what we
were doing before in commit 4d80273976bf ("drm/atomic_helper: Disallow
new modesets on unregistered connectors") except replacing
READ_ONCE(connector->registered) with drm_connector_is_unregistered().
This gets rid of the behavior of allowing DPMS On<->Off, but that should
be fine as it's more consistent with the UAPI we had before - danvet
- s/drm_connector_unregistered/drm_connector_is_unregistered/ - danvet
- Update documentation, fix some typos.
Fixes: b5d29843d8ef ("drm/atomic_helper: Allow DPMS On<->Off changes for
unregistered connectors")
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Rodrigo Vivi
Cc: sta...@vger.kernel.org
Cc: David Airlie
Signed-off-by: Lyude Paul
---
drivers/gpu/drm/drm_atomic_helper.c | 21 -
drivers/gpu/drm/drm_atomic_uapi.c | 21 -
drivers/gpu/drm/drm_connector.c | 11 +++--
drivers/gpu/drm/i915/intel_dp_mst.c | 8 ++--
include/drm/drm_connector.h | 71 -
5 files changed, 99 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index 6f66777dca4b..ee6b2987a3c7 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -319,6 +319,26 @@ update_connector_routing(struct drm_atomic_state *state,
return 0;
}
+ crtc_state = drm_atomic_get_new_crtc_state(state,
+ new_connector_state->crtc);
+ /*
+* For compatibility with legacy users, we want to make sure that
+* we allow DPMS On->Off modesets on unregistered connectors. Modesets
+* which would result in anything else must be considered invalid, to
+* avoid turning on new displays on dead connectors.
+*
+* Since the connector can be unregistered at any point during an
+* atomic check or commit, this is racy. But that's OK: all we care
+* about is ensuring that userspace can't do anything but shut off the
+* display on a connector that was destroyed after its been notified,
+* not before.
+*/
+ if (drm_connector_is_unregistered(connector) && crtc_state->active) {
+ DRM_DEBUG_ATOMIC("[CONNECTOR:%d:%s] is not registered\n",
+connector->base.id, connector->name);
+ return -EINVAL;
+ }
+
funcs = connector->helper_private;
if (funcs->atomic_best_encoder)
@@ -363,7 +383,6 @@ update_connector_routing(struct drm_atomic_state *state,
set_best_encoder(state, new_connector_state, new_encoder);
- crtc_state = drm_atomic_get_new_crtc_state(state,
new_connector_state->crtc);
crtc_state->connectors_changed = true;
DRM_DEBUG_ATOMIC("[CONNECTOR:%d:%s] using [ENCODER:%d:%s] on
[CRTC:%d:%s]\n",
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c
b/drivers/gpu/drm/drm_atomic_uapi.c
index a22d6f269b07..d5b7f315098c 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -299,27 +299,6 @@ drm_atomic_set_crtc_for_connector(struct
drm_connector_state *conn_state,
struct drm_connector *connector = conn_state->connector;
struct drm_crtc_state *crtc_state;
- /*
-* For compatibility with legacy users, we want to make sure that
-* we allow DPMS On<->Off modesets on unregistered connectors, since
Re: [Intel-gfx] [PATCH 01/10] drm/i915: Remove crtc->config dereference from drrs_ctl
On Thu, Oct 11, 2018 at 12:04:48PM +0200, Maarten Lankhorst wrote:
> Wait for idle, and iterate over connectors instead of encoders.
> With this information we know crtc->state is the actual state,
> and we can enable/disable drrs safely.
>
> Signed-off-by: Maarten Lankhorst
Looks sensible
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 54 ++---
> 1 file changed, 42 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index f42e93b71e67..b04d5ade5a15 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -4661,20 +4661,45 @@ static int i915_drrs_ctl_set(void *data, u64 val)
> {
> struct drm_i915_private *dev_priv = data;
> struct drm_device *dev = _priv->drm;
> - struct intel_crtc *intel_crtc;
> - struct intel_encoder *encoder;
> - struct intel_dp *intel_dp;
> + struct intel_crtc *crtc;
>
> if (INTEL_GEN(dev_priv) < 7)
> return -ENODEV;
>
> - drm_modeset_lock_all(dev);
> - for_each_intel_crtc(dev, intel_crtc) {
> - if (!intel_crtc->base.state->active ||
> - !intel_crtc->config->has_drrs)
> - continue;
> + for_each_intel_crtc(dev, crtc) {
> + struct drm_connector_list_iter conn_iter;
> + struct intel_crtc_state *crtc_state;
> + struct drm_connector *connector;
> + struct drm_crtc_commit *commit;
> + int ret;
> +
> + ret = drm_modeset_lock_single_interruptible(>base.mutex);
> + if (ret)
> + return ret;
> +
> + crtc_state = to_intel_crtc_state(crtc->base.state);
> +
> + if (!crtc_state->base.active ||
> + !crtc_state->has_drrs)
> + goto out;
>
> - for_each_encoder_on_crtc(dev, _crtc->base, encoder) {
> + commit = crtc_state->base.commit;
> + if (commit) {
> + ret =
> wait_for_completion_interruptible(>hw_done);
> + if (ret)
> + goto out;
> + }
> +
> + drm_connector_list_iter_begin(dev, _iter);
> + drm_for_each_connector_iter(connector, _iter) {
> + struct intel_encoder *encoder;
> + struct intel_dp *intel_dp;
> +
> + if (!(crtc_state->base.connector_mask &
> + drm_connector_mask(connector)))
> + continue;
> +
> + encoder = intel_attached_encoder(connector);
> if (encoder->type != INTEL_OUTPUT_EDP)
> continue;
>
> @@ -4684,13 +4709,18 @@ static int i915_drrs_ctl_set(void *data, u64 val)
> intel_dp = enc_to_intel_dp(>base);
> if (val)
> intel_edp_drrs_enable(intel_dp,
> - intel_crtc->config);
> + crtc_state);
> else
> intel_edp_drrs_disable(intel_dp,
> - intel_crtc->config);
> +crtc_state);
> }
> + drm_connector_list_iter_end(_iter);
> +
> +out:
> + drm_modeset_unlock(>base.mutex);
> + if (ret)
> + return ret;
> }
> - drm_modeset_unlock_all(dev);
>
> return 0;
> }
> --
> 2.19.0
>
> ___
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
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Re: [Intel-gfx] [PATCH v5 20/28] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling
>-Original Message-
>From: Navare, Manasi D
>Sent: Friday, October 5, 2018 4:23 PM
>To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
>Cc: Navare, Manasi D ; Jani Nikula
>; Ville Syrjala ;
>Srivatsa, Anusha
>Subject: [PATCH v5 20/28] drm/i915/dp: Configure i915 Picture parameter Set
>registers during DSC enabling
>
>After encoder->pre_enable() hook, after link training sequence is completed,
>PPS
>registers for DSC encoder are configured using the DSC state parameters in
>intel_crtc_state as part of DSC enabling routine in the source. DSC enabling
>routine is called after
>encoder->pre_enable() before enbaling the pipe and after
>compression is enabled on the sink.
>
>v3:
>* Configure Pic_width/2 for each VDSC engine when two VDSC engines per pipe
>are used (Manasi)
>* Add DSC slice_row_per_frame in PPS16 (Manasi)
>
>v2:
>* Enable PG2 power well for VDSC on eDP
>
>Cc: Jani Nikula
>Cc: Ville Syrjala
>Cc: Anusha Srivatsa
>Signed-off-by: Manasi Navare
>---
> drivers/gpu/drm/i915/i915_drv.h | 2 +
> drivers/gpu/drm/i915/intel_display.c | 6 +
> drivers/gpu/drm/i915/intel_vdsc.c| 418 +++
> 3 files changed, 426 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>index 93e57b271d3b..b49985f5d08c 100644
>--- a/drivers/gpu/drm/i915/i915_drv.h
>+++ b/drivers/gpu/drm/i915/i915_drv.h
>@@ -3506,6 +3506,8 @@ extern void intel_rps_mark_interactive(struct
>drm_i915_private *i915,
> bool interactive);
> extern bool intel_set_memory_cxsr(struct drm_i915_private *dev_priv,
> bool enable);
>+extern void intel_dsc_enable(struct intel_encoder *encoder,
>+ struct intel_crtc_state *crtc_state);
>
> int i915_reg_read_ioctl(struct drm_device *dev, void *data,
> struct drm_file *file);
>diff --git a/drivers/gpu/drm/i915/intel_display.c
>b/drivers/gpu/drm/i915/intel_display.c
>index 4ebf7c83085c..f7cb41775c57 100644
>--- a/drivers/gpu/drm/i915/intel_display.c
>+++ b/drivers/gpu/drm/i915/intel_display.c
>@@ -5480,6 +5480,12 @@ static void intel_encoders_pre_enable(struct
>drm_crtc *crtc,
>
> if (encoder->pre_enable)
> encoder->pre_enable(encoder, crtc_state, conn_state);
>+
>+ /*
>+ * Enable and Configure Display Stream Compression in the
>source
>+ * if enabled in intel_crtc_state.
>+ */
>+ intel_dsc_enable(encoder, crtc_state);
> }
> }
>
>diff --git a/drivers/gpu/drm/i915/intel_vdsc.c
>b/drivers/gpu/drm/i915/intel_vdsc.c
>index 594196a9d0f4..1f2b5dc82f16 100644
>--- a/drivers/gpu/drm/i915/intel_vdsc.c
>+++ b/drivers/gpu/drm/i915/intel_vdsc.c
>@@ -580,3 +580,421 @@ int intel_dp_compute_dsc_params(struct intel_dp
>*intel_dp,
>
> return 0;
> }
>+
>+static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder,
>+ struct intel_crtc_state
>*crtc_state) {
>+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
>+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>+ struct drm_dsc_config *vdsc_cfg = _state->dp_dsc_cfg;
>+ enum pipe pipe = crtc->pipe;
>+ u32 pps_val = 0;
>+ u32 rc_buf_thresh_dword[4];
>+ u32 rc_range_params_dword[8];
>+ u8 num_vdsc_instances = (crtc_state->dsc_params.dsc_split) ? 2 : 1;
>+ int i = 0;
>+
>+ /* Populate PICTURE_PARAMETER_SET_0 registers */
>+ pps_val = DSC_VER_MAJ | vdsc_cfg->dsc_version_minor <<
>+ DSC_VER_MIN_SHIFT |
>+ vdsc_cfg->bits_per_component << DSC_BPC_SHIFT |
>+ vdsc_cfg->line_buf_depth << DSC_LINE_BUF_DEPTH_SHIFT;
>+ if (vdsc_cfg->block_pred_enable)
>+ pps_val |= DSC_BLOCK_PREDICTION;
>+ else
>+ pps_val &= ~DSC_BLOCK_PREDICTION;
>+ if (vdsc_cfg->convert_rgb)
>+ pps_val |= DSC_COLOR_SPACE_CONVERSION;
>+ else
>+ pps_val &= ~DSC_COLOR_SPACE_CONVERSION;
>+ if (vdsc_cfg->enable422)
>+ pps_val |= DSC_422_ENABLE;
>+ else
>+ pps_val &= ~DSC_422_ENABLE;
>+ if (vdsc_cfg->vbr_enable)
>+ pps_val |= DSC_VBR_ENABLE;
>+ else
>+ pps_val &= ~DSC_VBR_ENABLE;
>+
>+ DRM_INFO("PPS0 = 0x%08x\n", pps_val);
>+ if (encoder->type == INTEL_OUTPUT_EDP) {
>+ I915_WRITE(DSCA_PICTURE_PARAMETER_SET_0, pps_val);
>+ /*
>+ * If 2 VDSC instances are needed, configure PPS for second
>+ * VDSC
>+ */
>+ if (crtc_state->dsc_params.dsc_split)
>+ I915_WRITE(DSCC_PICTURE_PARAMETER_SET_0,
>pps_val);
>+ } else {
>+ I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_0(pipe),
>pps_val);
>+ if (crtc_state->dsc_params.dsc_split)
>+
>
Re: [Intel-gfx] [PATCH v5 19/28] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
On Tue, Oct 16, 2018 at 12:42:05PM -0700, Manasi Navare wrote:
> On Tue, Oct 16, 2018 at 10:19:06PM +0300, Ville Syrjälä wrote:
> > On Tue, Oct 16, 2018 at 10:01:11PM +0300, Ville Syrjälä wrote:
> > > On Fri, Oct 05, 2018 at 04:22:57PM -0700, Manasi Navare wrote:
> > > > On Icelake, a separate power well PG2 is created for
> > > > VDSC engine used for eDP/MIPI DSI. This patch adds a new
> > > > display power domain for Power well 2.
> > > >
> > > > v2:
> > > > * Fix the power well mismatch CI error (Ville)
> > > > * Rename as VDSC_PIPE_A (Imre)
> > > > * Fix a whitespace (Anusha)
> > > > * Fix Comments (Imre)
> > > >
> > > > Cc: Ville Syrjala
> > > > Cc: Rodrigo Vivi
> > > > Cc: Imre Deak
> > > > Signed-off-by: Manasi Navare
> > > > ---
> > > > drivers/gpu/drm/i915/intel_display.h| 1 +
> > > > drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +++-
> > > > 2 files changed, 4 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/intel_display.h
> > > > b/drivers/gpu/drm/i915/intel_display.h
> > > > index 9eaba1bccae8..4c513169960c 100644
> > > > --- a/drivers/gpu/drm/i915/intel_display.h
> > > > +++ b/drivers/gpu/drm/i915/intel_display.h
> > > > @@ -256,6 +256,7 @@ enum intel_display_power_domain {
> > > > POWER_DOMAIN_MODESET,
> > > > POWER_DOMAIN_GT_IRQ,
> > > > POWER_DOMAIN_INIT,
> > > > + POWER_DOMAIN_VDSC_PIPE_A,
> > >
> > > I'd probably put it next to the other pipe related power domains.
> > > So maybe after POWER_DOMAIN_PIPE_C_PANEL_FITTER.
> > >
> > > And to match the current naming pattern it should be called
> > > POWER_DOMAIN_PIPE_A_VDSC.
> >
> > Hmm. We could also give it an alias TRANSCODER_EDP_VDSC. Making
> > it an alias would avoid wasting yet another bit, but would make
> > the code easier to understand as we wouldn't have to add comments
> > explaining why we use a PIPE_A_VDSC power domain based on the
> > usage of the EDP transcoder.
> >
>
> So you are suggesting adding an alias TRANSCODER_EDP_VDSC for
> POWER_DOMAIN_PIPE_A_VDSC?
> But how does it avoid wasting another bit, since we would still have
> POWER_DOMAIN_PIPE_A_VDSC as a field
> in enum power domains right?
enum ... {
...
POWER_DOMAIN_PIPE_A_VDSC,
POWER_DOMAIN_TRANSCODER_EDP_VDSC = POWER_DOMAIN_PIPE_A_VDSC,
...
};
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH v5 19/28] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
On Tue, Oct 16, 2018 at 10:19:06PM +0300, Ville Syrjälä wrote:
> On Tue, Oct 16, 2018 at 10:01:11PM +0300, Ville Syrjälä wrote:
> > On Fri, Oct 05, 2018 at 04:22:57PM -0700, Manasi Navare wrote:
> > > On Icelake, a separate power well PG2 is created for
> > > VDSC engine used for eDP/MIPI DSI. This patch adds a new
> > > display power domain for Power well 2.
> > >
> > > v2:
> > > * Fix the power well mismatch CI error (Ville)
> > > * Rename as VDSC_PIPE_A (Imre)
> > > * Fix a whitespace (Anusha)
> > > * Fix Comments (Imre)
> > >
> > > Cc: Ville Syrjala
> > > Cc: Rodrigo Vivi
> > > Cc: Imre Deak
> > > Signed-off-by: Manasi Navare
> > > ---
> > > drivers/gpu/drm/i915/intel_display.h| 1 +
> > > drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +++-
> > > 2 files changed, 4 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_display.h
> > > b/drivers/gpu/drm/i915/intel_display.h
> > > index 9eaba1bccae8..4c513169960c 100644
> > > --- a/drivers/gpu/drm/i915/intel_display.h
> > > +++ b/drivers/gpu/drm/i915/intel_display.h
> > > @@ -256,6 +256,7 @@ enum intel_display_power_domain {
> > > POWER_DOMAIN_MODESET,
> > > POWER_DOMAIN_GT_IRQ,
> > > POWER_DOMAIN_INIT,
> > > + POWER_DOMAIN_VDSC_PIPE_A,
> >
> > I'd probably put it next to the other pipe related power domains.
> > So maybe after POWER_DOMAIN_PIPE_C_PANEL_FITTER.
> >
> > And to match the current naming pattern it should be called
> > POWER_DOMAIN_PIPE_A_VDSC.
>
> Hmm. We could also give it an alias TRANSCODER_EDP_VDSC. Making
> it an alias would avoid wasting yet another bit, but would make
> the code easier to understand as we wouldn't have to add comments
> explaining why we use a PIPE_A_VDSC power domain based on the
> usage of the EDP transcoder.
>
So you are suggesting adding an alias TRANSCODER_EDP_VDSC for
POWER_DOMAIN_PIPE_A_VDSC?
But how does it avoid wasting another bit, since we would still have
POWER_DOMAIN_PIPE_A_VDSC as a field
in enum power domains right?
Manasi
> The only slightly confusing piece would be
> intel_display_power_domain_str() as that would have to reuturn
> a string with both names perhaps?
>
> >
> > >
> > > POWER_DOMAIN_NUM,
> > > };
> > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > index 3cf8533e0834..3ed0a3a1015a 100644
> > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > @@ -146,6 +146,8 @@ intel_display_power_domain_str(enum
> > > intel_display_power_domain domain)
> > > return "MODESET";
> > > case POWER_DOMAIN_GT_IRQ:
> > > return "GT_IRQ";
> > > + case POWER_DOMAIN_VDSC_PIPE_A:
> > > + return "VDSC_PIPE_A";
> > > default:
> > > MISSING_CASE(domain);
> > > return "?";
> > > @@ -1971,9 +1973,9 @@ void intel_display_power_put(struct
> > > drm_i915_private *dev_priv,
> > >*/
> > > #define ICL_PW_2_POWER_DOMAINS ( \
> > > ICL_PW_3_POWER_DOMAINS |\
> > > + BIT_ULL(POWER_DOMAIN_VDSC_PIPE_A) | \
> > > BIT_ULL(POWER_DOMAIN_INIT))
> > > /*
> > > - * - eDP/DSI VDSC
> > >* - KVMR (HW control)
> > >*/
> > > #define ICL_DISPLAY_DC_OFF_POWER_DOMAINS ( \
> > > --
> > > 2.18.0
> >
> > --
> > Ville Syrjälä
> > Intel
>
> --
> Ville Syrjälä
> Intel
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Re: [Intel-gfx] [PATCH v5 19/28] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
On Tue, Oct 16, 2018 at 12:19:24PM -0700, Manasi Navare wrote:
> Thanks for your review comments.
>
> On Tue, Oct 16, 2018 at 10:01:11PM +0300, Ville Syrjälä wrote:
> > On Fri, Oct 05, 2018 at 04:22:57PM -0700, Manasi Navare wrote:
> > > On Icelake, a separate power well PG2 is created for
> > > VDSC engine used for eDP/MIPI DSI. This patch adds a new
> > > display power domain for Power well 2.
> > >
> > > v2:
> > > * Fix the power well mismatch CI error (Ville)
> > > * Rename as VDSC_PIPE_A (Imre)
> > > * Fix a whitespace (Anusha)
> > > * Fix Comments (Imre)
> > >
> > > Cc: Ville Syrjala
> > > Cc: Rodrigo Vivi
> > > Cc: Imre Deak
> > > Signed-off-by: Manasi Navare
> > > ---
> > > drivers/gpu/drm/i915/intel_display.h| 1 +
> > > drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +++-
> > > 2 files changed, 4 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_display.h
> > > b/drivers/gpu/drm/i915/intel_display.h
> > > index 9eaba1bccae8..4c513169960c 100644
> > > --- a/drivers/gpu/drm/i915/intel_display.h
> > > +++ b/drivers/gpu/drm/i915/intel_display.h
> > > @@ -256,6 +256,7 @@ enum intel_display_power_domain {
> > > POWER_DOMAIN_MODESET,
> > > POWER_DOMAIN_GT_IRQ,
> > > POWER_DOMAIN_INIT,
> > > + POWER_DOMAIN_VDSC_PIPE_A,
> >
> > I'd probably put it next to the other pipe related power domains.
> > So maybe after POWER_DOMAIN_PIPE_C_PANEL_FITTER.
> >
> > And to match the current naming pattern it should be called
> > POWER_DOMAIN_PIPE_A_VDSC.
>
> Okay will make these changes in the next rev.
> With these changes, can I consider your r-b?
The slight rename+move I'd like to see. I'll leave it up to you
whether to pursue the aliasing TRANSCODER_EDP_VDSC idea.
>
> Regards
> Manasi
>
> >
> > >
> > > POWER_DOMAIN_NUM,
> > > };
> > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > index 3cf8533e0834..3ed0a3a1015a 100644
> > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > @@ -146,6 +146,8 @@ intel_display_power_domain_str(enum
> > > intel_display_power_domain domain)
> > > return "MODESET";
> > > case POWER_DOMAIN_GT_IRQ:
> > > return "GT_IRQ";
> > > + case POWER_DOMAIN_VDSC_PIPE_A:
> > > + return "VDSC_PIPE_A";
> > > default:
> > > MISSING_CASE(domain);
> > > return "?";
> > > @@ -1971,9 +1973,9 @@ void intel_display_power_put(struct
> > > drm_i915_private *dev_priv,
> > >*/
> > > #define ICL_PW_2_POWER_DOMAINS ( \
> > > ICL_PW_3_POWER_DOMAINS |\
> > > + BIT_ULL(POWER_DOMAIN_VDSC_PIPE_A) | \
> > > BIT_ULL(POWER_DOMAIN_INIT))
> > > /*
> > > - * - eDP/DSI VDSC
> > >* - KVMR (HW control)
> > >*/
> > > #define ICL_DISPLAY_DC_OFF_POWER_DOMAINS ( \
> > > --
> > > 2.18.0
> >
> > --
> > Ville Syrjälä
> > Intel
--
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Re: [Intel-gfx] [PATCH v5 26/28] drm/i915/dsc: Enable and disable appropriate power wells for VDSC
On Fri, Oct 05, 2018 at 04:23:04PM -0700, Manasi Navare wrote:
> A separate power well 2 (PG2) is required for VDSC on eDP transcoder
> whereas all other transcoders use the power wells associated with the
> transcoders for VDSC.
> This patch adds a helper to obtain correct power domain depending on
> transcoder being used and enables/disables the power wells during
> VDSC enabling/disabling.
>
> Suggested-by: Ville Syrjala
> Cc: Ville Syrjala
> Cc: Imre Deak
> Cc: Rodrigo Vivi
> Signed-off-by: Manasi Navare
> ---
> drivers/gpu/drm/i915/intel_vdsc.c | 25 +
> 1 file changed, 25 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_vdsc.c
> b/drivers/gpu/drm/i915/intel_vdsc.c
> index 4963e80a87f0..d2b4601459c3 100644
> --- a/drivers/gpu/drm/i915/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/intel_vdsc.c
> @@ -581,6 +581,23 @@ int intel_dp_compute_dsc_params(struct intel_dp
> *intel_dp,
> return 0;
> }
>
> +static enum intel_display_power_domain
> +intel_dsc_get_power_domains(struct intel_crtc_state *crtc_state)
crtc_state can be const.
> +{
> + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +
> + /*
> + * On ICL+ PW2/ POWER_DOMAIN_VDSC_PIPE_A is required for
Tabs fail in this comment.
> + * VDSC/joining for eDP transcoder.
> + * For any other transcoder, VDSC/joining uses the power well
> associated
> + * with the pipe/transcoder in use.
The one thing I'd like the comment to explain is why the power
domain is called PIPE_A_something but we pick it based on the
transcoder.
Maybe?
/*
* Only the eDP/DSI VDSC (ICL) and the pipe A VDSC (*something*)
* have their own power well. For the other VDSCs another
* reference for the transcoder (ICL) or pipe (*something*) will
* suffice.
*
* To avoid wasting power domain bits we reuse the PIPE_A_VDSC
* power domain for both the eDP/DSI VDSC (ICL) and the
* pipe A VDSC (*something*).
*/
Not sure if we can fill the *something* yet :)
Or maybe with the aliasing TRANSCODER_EDP_VDSC idea we
wouldn't really need to explain so much So maybe just
something simpler like
/*
* Only eDP/DSI VDSC has its own power well. For the other
* VDSCs another reference on the transcoder power domain
* will suffice.
*/
and then we'd add the same comment with s/transcoder/pipe/ for
the next platform.
Anyways, just thinking out loud. If you want you can go with
what you have with the const/tabs fixed.
Reviewed-by: Ville Syrjälä
> + */
> + if (cpu_transcoder == TRANSCODER_EDP)
> + return POWER_DOMAIN_VDSC_PIPE_A;
> + else
> + return POWER_DOMAIN_TRANSCODER(cpu_transcoder);
> +}
> +
> static void intel_configure_pps_for_dsc_encoder(struct intel_encoder
> *encoder,
> struct intel_crtc_state
> *crtc_state)
> {
> @@ -1019,6 +1036,10 @@ void intel_dsc_enable(struct intel_encoder *encoder,
> if (!crtc_state->dsc_params.compression_enable)
> return;
>
> + /* Enable Power wells for VDSC/joining */
> + intel_display_power_get(dev_priv,
> + intel_dsc_get_power_domains(crtc_state));
> +
> intel_configure_pps_for_dsc_encoder(encoder, crtc_state);
>
> intel_dp_send_dsc_pps_sdp(encoder, crtc_state);
> @@ -1073,4 +1094,8 @@ void intel_dsc_disable(struct intel_encoder *encoder,
> RIGHT_BRANCH_VDSC_ENABLE);
> I915_WRITE(dss_ctl2_reg, dss_ctl2_val);
>
> + /* Disable Power wells for VDSC/joining */
> + intel_display_power_put(dev_priv,
> + intel_dsc_get_power_domains(old_crtc_state));
> +
> }
> --
> 2.18.0
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH v5 19/28] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
On Tue, Oct 16, 2018 at 10:01:11PM +0300, Ville Syrjälä wrote:
> On Fri, Oct 05, 2018 at 04:22:57PM -0700, Manasi Navare wrote:
> > On Icelake, a separate power well PG2 is created for
> > VDSC engine used for eDP/MIPI DSI. This patch adds a new
> > display power domain for Power well 2.
> >
> > v2:
> > * Fix the power well mismatch CI error (Ville)
> > * Rename as VDSC_PIPE_A (Imre)
> > * Fix a whitespace (Anusha)
> > * Fix Comments (Imre)
> >
> > Cc: Ville Syrjala
> > Cc: Rodrigo Vivi
> > Cc: Imre Deak
> > Signed-off-by: Manasi Navare
> > ---
> > drivers/gpu/drm/i915/intel_display.h| 1 +
> > drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +++-
> > 2 files changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.h
> > b/drivers/gpu/drm/i915/intel_display.h
> > index 9eaba1bccae8..4c513169960c 100644
> > --- a/drivers/gpu/drm/i915/intel_display.h
> > +++ b/drivers/gpu/drm/i915/intel_display.h
> > @@ -256,6 +256,7 @@ enum intel_display_power_domain {
> > POWER_DOMAIN_MODESET,
> > POWER_DOMAIN_GT_IRQ,
> > POWER_DOMAIN_INIT,
> > + POWER_DOMAIN_VDSC_PIPE_A,
>
> I'd probably put it next to the other pipe related power domains.
> So maybe after POWER_DOMAIN_PIPE_C_PANEL_FITTER.
>
> And to match the current naming pattern it should be called
> POWER_DOMAIN_PIPE_A_VDSC.
Hmm. We could also give it an alias TRANSCODER_EDP_VDSC. Making
it an alias would avoid wasting yet another bit, but would make
the code easier to understand as we wouldn't have to add comments
explaining why we use a PIPE_A_VDSC power domain based on the
usage of the EDP transcoder.
The only slightly confusing piece would be
intel_display_power_domain_str() as that would have to reuturn
a string with both names perhaps?
>
> >
> > POWER_DOMAIN_NUM,
> > };
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index 3cf8533e0834..3ed0a3a1015a 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > @@ -146,6 +146,8 @@ intel_display_power_domain_str(enum
> > intel_display_power_domain domain)
> > return "MODESET";
> > case POWER_DOMAIN_GT_IRQ:
> > return "GT_IRQ";
> > + case POWER_DOMAIN_VDSC_PIPE_A:
> > + return "VDSC_PIPE_A";
> > default:
> > MISSING_CASE(domain);
> > return "?";
> > @@ -1971,9 +1973,9 @@ void intel_display_power_put(struct drm_i915_private
> > *dev_priv,
> > */
> > #define ICL_PW_2_POWER_DOMAINS ( \
> > ICL_PW_3_POWER_DOMAINS |\
> > + BIT_ULL(POWER_DOMAIN_VDSC_PIPE_A) | \
> > BIT_ULL(POWER_DOMAIN_INIT))
> > /*
> > -* - eDP/DSI VDSC
> > * - KVMR (HW control)
> > */
> > #define ICL_DISPLAY_DC_OFF_POWER_DOMAINS ( \
> > --
> > 2.18.0
>
> --
> Ville Syrjälä
> Intel
--
Ville Syrjälä
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Re: [Intel-gfx] [PATCH v5 19/28] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
Thanks for your review comments.
On Tue, Oct 16, 2018 at 10:01:11PM +0300, Ville Syrjälä wrote:
> On Fri, Oct 05, 2018 at 04:22:57PM -0700, Manasi Navare wrote:
> > On Icelake, a separate power well PG2 is created for
> > VDSC engine used for eDP/MIPI DSI. This patch adds a new
> > display power domain for Power well 2.
> >
> > v2:
> > * Fix the power well mismatch CI error (Ville)
> > * Rename as VDSC_PIPE_A (Imre)
> > * Fix a whitespace (Anusha)
> > * Fix Comments (Imre)
> >
> > Cc: Ville Syrjala
> > Cc: Rodrigo Vivi
> > Cc: Imre Deak
> > Signed-off-by: Manasi Navare
> > ---
> > drivers/gpu/drm/i915/intel_display.h| 1 +
> > drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +++-
> > 2 files changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.h
> > b/drivers/gpu/drm/i915/intel_display.h
> > index 9eaba1bccae8..4c513169960c 100644
> > --- a/drivers/gpu/drm/i915/intel_display.h
> > +++ b/drivers/gpu/drm/i915/intel_display.h
> > @@ -256,6 +256,7 @@ enum intel_display_power_domain {
> > POWER_DOMAIN_MODESET,
> > POWER_DOMAIN_GT_IRQ,
> > POWER_DOMAIN_INIT,
> > + POWER_DOMAIN_VDSC_PIPE_A,
>
> I'd probably put it next to the other pipe related power domains.
> So maybe after POWER_DOMAIN_PIPE_C_PANEL_FITTER.
>
> And to match the current naming pattern it should be called
> POWER_DOMAIN_PIPE_A_VDSC.
Okay will make these changes in the next rev.
With these changes, can I consider your r-b?
Regards
Manasi
>
> >
> > POWER_DOMAIN_NUM,
> > };
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index 3cf8533e0834..3ed0a3a1015a 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > @@ -146,6 +146,8 @@ intel_display_power_domain_str(enum
> > intel_display_power_domain domain)
> > return "MODESET";
> > case POWER_DOMAIN_GT_IRQ:
> > return "GT_IRQ";
> > + case POWER_DOMAIN_VDSC_PIPE_A:
> > + return "VDSC_PIPE_A";
> > default:
> > MISSING_CASE(domain);
> > return "?";
> > @@ -1971,9 +1973,9 @@ void intel_display_power_put(struct drm_i915_private
> > *dev_priv,
> > */
> > #define ICL_PW_2_POWER_DOMAINS ( \
> > ICL_PW_3_POWER_DOMAINS |\
> > + BIT_ULL(POWER_DOMAIN_VDSC_PIPE_A) | \
> > BIT_ULL(POWER_DOMAIN_INIT))
> > /*
> > -* - eDP/DSI VDSC
> > * - KVMR (HW control)
> > */
> > #define ICL_DISPLAY_DC_OFF_POWER_DOMAINS ( \
> > --
> > 2.18.0
>
> --
> Ville Syrjälä
> Intel
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Re: [Intel-gfx] [PATCH 2/2] drm/i915: Mark pinned shmemfs pages as unevictable
On Tue 16-10-18 19:31:06, Chris Wilson wrote: > Quoting Michal Hocko (2018-10-16 19:21:55) > > On Wed 17-10-18 01:43:00, Kuo-Hsin Yang wrote: > > > The i915 driver use shmemfs to allocate backing storage for gem objects. > > > These shmemfs pages can be pinned (increased ref count) by > > > shmem_read_mapping_page_gfp(). When a lot of pages are pinned, vmscan > > > wastes a lot of time scanning these pinned pages. Mark these pinned > > > pages as unevictable to speed up vmscan. > > > > I would squash the two patches into the single one. One more thing > > though. One more thing to be careful about here. Unless I miss something > > such a page is not migrateable so it shouldn't be allocated from a > > movable zone. Does mapping_gfp_constraint contains __GFP_MOVABLE? If > > yes, we want to drop it as well. Other than that the patch makes sense > > with my very limited knowlege of the i915 code of course. > > They are not migrateable today. But we have proposed hooking up > .migratepage and setting __GFP_MOVABLE which would then include unlocking > the mapping at migrate time. if the mapping_gfp doesn't include __GFP_MOVABLE today then there is no issue I've had in mind. -- Michal Hocko SUSE Labs ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v5 19/28] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
On Fri, Oct 05, 2018 at 04:22:57PM -0700, Manasi Navare wrote:
> On Icelake, a separate power well PG2 is created for
> VDSC engine used for eDP/MIPI DSI. This patch adds a new
> display power domain for Power well 2.
>
> v2:
> * Fix the power well mismatch CI error (Ville)
> * Rename as VDSC_PIPE_A (Imre)
> * Fix a whitespace (Anusha)
> * Fix Comments (Imre)
>
> Cc: Ville Syrjala
> Cc: Rodrigo Vivi
> Cc: Imre Deak
> Signed-off-by: Manasi Navare
> ---
> drivers/gpu/drm/i915/intel_display.h| 1 +
> drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +++-
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.h
> b/drivers/gpu/drm/i915/intel_display.h
> index 9eaba1bccae8..4c513169960c 100644
> --- a/drivers/gpu/drm/i915/intel_display.h
> +++ b/drivers/gpu/drm/i915/intel_display.h
> @@ -256,6 +256,7 @@ enum intel_display_power_domain {
> POWER_DOMAIN_MODESET,
> POWER_DOMAIN_GT_IRQ,
> POWER_DOMAIN_INIT,
> + POWER_DOMAIN_VDSC_PIPE_A,
I'd probably put it next to the other pipe related power domains.
So maybe after POWER_DOMAIN_PIPE_C_PANEL_FITTER.
And to match the current naming pattern it should be called
POWER_DOMAIN_PIPE_A_VDSC.
>
> POWER_DOMAIN_NUM,
> };
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 3cf8533e0834..3ed0a3a1015a 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -146,6 +146,8 @@ intel_display_power_domain_str(enum
> intel_display_power_domain domain)
> return "MODESET";
> case POWER_DOMAIN_GT_IRQ:
> return "GT_IRQ";
> + case POWER_DOMAIN_VDSC_PIPE_A:
> + return "VDSC_PIPE_A";
> default:
> MISSING_CASE(domain);
> return "?";
> @@ -1971,9 +1973,9 @@ void intel_display_power_put(struct drm_i915_private
> *dev_priv,
>*/
> #define ICL_PW_2_POWER_DOMAINS ( \
> ICL_PW_3_POWER_DOMAINS |\
> + BIT_ULL(POWER_DOMAIN_VDSC_PIPE_A) | \
> BIT_ULL(POWER_DOMAIN_INIT))
> /*
> - * - eDP/DSI VDSC
>* - KVMR (HW control)
>*/
> #define ICL_DISPLAY_DC_OFF_POWER_DOMAINS ( \
> --
> 2.18.0
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/guc: fix GuC suspend/resume
On Tue, 16 Oct 2018 19:15:19 +0200, Daniele Ceraolo Spurio
wrote:
On 10/16/2018 2:21 AM, Daniel Vetter wrote:
On Tue, Oct 16, 2018 at 1:44 AM Daniele Ceraolo Spurio
wrote:
On 15/10/18 15:47, Patchwork wrote:
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: fix GuC
suspend/resume
URL : https://patchwork.freedesktop.org/series/51033/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4984 -> Patchwork_10464 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_10464 absolutely
need to be
verified manually.
If you think the reported changes have nothing to do with the
changes
introduced in Patchwork_10464, please notify your bug team to
allow them
to document this new failure mode, which will reduce false
positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/51033/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in
Patchwork_10464:
=== IGT changes ===
Possible regressions
igt@drv_selftest@live_execlists:
fi-skl-6700hq: PASS -> INCOMPLETE
Log seem to be cut for this one. Since it is stopping inside
live_preempt_smoke it is probably a known issue that Chris mentioned.
Can't reproduce on my skylake even with the test in a loop.
igt@drv_selftest@live_guc:
fi-kbl-7567u: PASS -> DMESG-WARN
fi-skl-6600u: PASS -> DMESG-WARN
fi-skl-gvtdvm: PASS -> DMESG-WARN
fi-skl-iommu: PASS -> DMESG-WARN
fi-skl-6260u: PASS -> DMESG-WARN
fi-bxt-dsi: PASS -> DMESG-WARN
fi-skl-6700k2: PASS -> DMESG-WARN
fi-whl-u: PASS -> DMESG-WARN
fi-skl-6770hq: PASS -> DMESG-WARN
fi-kbl-7560u: PASS -> DMESG-WARN
fi-kbl-8809g: PASS -> DMESG-WARN
fi-kbl-r: PASS -> DMESG-WARN
fi-kbl-x1275: PASS -> DMESG-WARN
fi-bxt-j4205: PASS -> DMESG-WARN
fi-cfl-s3: PASS -> DMESG-WARN
fi-cfl-8109u: PASS -> DMESG-WARN
fi-kbl-7500u: PASS -> DMESG-WARN
fi-cfl-8700k: PASS -> DMESG-WARN
These are all:
[drm:intel_guc_send_mmio [i915]] *ERROR* MMIO: GuC action 0x10 failed
with error -5 0xf000f000
Which is not a real failure since the test is triggering it on purpose
You still need to make them shut up. dmesg errors should only be used
for stuff we really don't expect. E.g. gpu hangs provoked by igt also
don't result in dmesg errors/warnings and failed tests.
-Daniel
I wasn't trying to imply that we don't care that we have a failure or
that we shouldn't make it shut up, just that it is not a regression
introduced by this patch, because it doesn't even get near that code. I
recall that there was a small discussion in the past about how to
silence this, I'll try to dig it up and see if there was an agreed
solution.
Preferred solution was to remove negative GuC tests from i915 selftests.
Note that this "low level" error message is our guard that we are always
correctly communicating with the GuC, no silent drop of unexpected GuC
errors.
GuC negative testing shall be done by the fw team.
Michal
Daniele
igt@drv_selftest@live_hangcheck:
fi-skl-gvtdvm: PASS -> DMESG-FAIL
<7> [464.966238] [drm:guc_fw_xfer [i915]] GuC status 0x20
<3> [464.966361] [drm:guc_fw_xfer [i915]] *ERROR* GuC firmware xfer
error -110
This looks like GuC is stuck very early in the boot flow (even before
the RSA check). On SKL there are known issues that could cause this and
we should reset GuC and retry, but we aren't. Looks like we indirectly
stopped applying WaEnableuKernelHeaderValidFix and
WaEnableGuCBootHashCheckNotSet by not returning -EAGAIN from
intel_guc_fw_upload in any case. Michal?
Thanks,
Daniele
== Known issues ==
Here are the changes found in Patchwork_10464 that come from
known issues:
=== IGT changes ===
Issues hit
igt@drv_selftest@live_guc:
{fi-apl-guc}: NOTRUN -> DMESG-WARN (fdo#107258)
igt@gem_exec_suspend@basic-s4-devices:
fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
fi-snb-2520m: PASS -> DMESG-FAIL (fdo#103713)
igt@kms_setmode@basic-clone-single-crtc:
fi-snb-2520m: PASS -> DMESG-WARN (fdo#103713)
igt@pm_backlight@basic-brightness:
fi-snb-2520m: PASS -> INCOMPLETE (fdo#103713)
Possible fixes
igt@drv_selftest@live_gem:
{fi-apl-guc}: INCOMPLETE (fdo#106693) -> PASS
igt@kms_frontbuffer_tracking@basic:
fi-byt-clapper: FAIL (fdo#103167) -> PASS
{name}: This element is suppressed. This means it is ignored when
computing
the status of the difference (SUCCESS, WARNING, or
[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Get ref on CRTC commit object when waiting for flip_done
== Series Details == Series: drm: Get ref on CRTC commit object when waiting for flip_done URL : https://patchwork.freedesktop.org/series/51079/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4990 -> Patchwork_10479 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/51079/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10479 that come from known issues: === IGT changes === Issues hit igt@gem_exec_suspend@basic-s3: fi-kbl-soraka: NOTRUN -> INCOMPLETE (fdo#107556, fdo#107774, fdo#107859) fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718) igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: fi-glk-j4005: PASS -> FAIL (fdo#106765) igt@kms_flip@basic-flip-vs-modeset: fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362) igt@pm_rpm@module-reload: fi-glk-j4005: PASS -> DMESG-WARN (fdo#107726) Possible fixes igt@drv_selftest@live_hangcheck: fi-icl-u2: INCOMPLETE (fdo#108315) -> PASS igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: fi-glk-j4005: FAIL (fdo#106765) -> PASS igt@kms_flip@basic-flip-vs-dpms: fi-hsw-4770r: DMESG-WARN (fdo#105602) -> PASS igt@kms_flip@basic-plain-flip: fi-glk-j4005: DMESG-WARN (fdo#106097) -> PASS igt@kms_frontbuffer_tracking@basic: fi-byt-clapper: FAIL (fdo#103167) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000 fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097 fdo#106765 https://bugs.freedesktop.org/show_bug.cgi?id=106765 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107556 https://bugs.freedesktop.org/show_bug.cgi?id=107556 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 fdo#107726 https://bugs.freedesktop.org/show_bug.cgi?id=107726 fdo#107774 https://bugs.freedesktop.org/show_bug.cgi?id=107774 fdo#107859 https://bugs.freedesktop.org/show_bug.cgi?id=107859 fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315 == Participating hosts (46 -> 43) == Additional (2): fi-kbl-soraka fi-icl-u Missing(5): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-pnv-d510 == Build changes == * Linux: CI_DRM_4990 -> Patchwork_10479 CI_DRM_4990: 0bd34d92e9a27784cb988a300619f497ca0e99ec @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4681: 959d6f95cb1344e0c0dace5b236e17755826fac1 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10479: 6539ec3e48f48b93523ef4a79072e715d195051f @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 6539ec3e48f4 drm: Get ref on CRTC commit object when waiting for flip_done == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10479/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915: Ensure _print_param() builds with Clang
On Tue, Oct 16, 2018 at 8:18 AM Chris Wilson wrote: > > Quoting Jani Nikula (2018-10-16 13:29:37) > > When building the kernel with Clang with defconfig and CONFIG_64BIT > > disabled, vmlinux fails to link because of the BUILD_BUG in > > _print_param. > > > > ld: drivers/gpu/drm/i915/i915_params.o: in function `i915_params_dump': > > i915_params.c:(.text+0x56): undefined reference to > > `__compiletime_assert_191' > > > > This function is semantically invalid unless the code is first inlined > > then constant folded, which doesn't work for Clang because semantic > > analysis happens before optimization/inlining. > > > > [The above written by Nathan Chancellor ] > > > > Use WARN_ONCE() instead of BUILD_BUG() to avoid the problem. The > > WARN_ONCE() should get optimized away unless there's a type that's not > > handled by _print_param(). > > > > References: https://github.com/ClangBuiltLinux/linux/issues/191 > > References: > > 20181009171401.14980-1-natechancellor@gmail.com">http://mid.mail-archive.com/20181009171401.14980-1-natechancellor@gmail.com > > Cc: Nick Desaulniers > > Cc: Nathan Chancellor > > Cc: Chris Wilson > > Reported-by: Nick Desaulniers > > Reported-by: Nathan Chancellor > > Signed-off-by: Jani Nikula > > Fair enough, > Reviewed-by: Chris Wilson > -Chris Thanks for the fix, we appreciate it! Reviewed-by: Nick Desaulniers -- Thanks, ~Nick Desaulniers ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] drm/i915: Ensure intel_engine_init_execlist() builds with Clang
On Tue, Oct 16, 2018 at 8:35 AM Stephen Boyd wrote: > > Quoting Jani Nikula (2018-10-16 05:29:38) > > Clang build with UBSAN enabled leads to the following build error: I'm overjoyed that you're testing this configuration! If you find more bugs, we're happy to help triage if you let us know about them here: https://github.com/ClangBuiltLinux/linux/issues. > > > > drivers/gpu/drm/i915/intel_engine_cs.o: In function > > `intel_engine_init_execlist': > > drivers/gpu/drm/i915/intel_engine_cs.c:411: undefined reference to > > `__compiletime_assert_411' > > > > Again, for this to work the code would first need to be inlined and then > > constant folded, which doesn't work for Clang because semantic analysis > > happens before optimization/inlining. Yep. > > > > Use GEM_BUG_ON() instead of BUILD_BUG_ON(). > > > > v2: Use is_power_of_2() from log2.h (Chris) > > > > References: > > 20181015203410.155997-1-swboyd@chromium.org">http://mid.mail-archive.com/20181015203410.155997-1-swboyd@chromium.org > > Reported-by: Stephen Boyd > > Tested-by: Stephen Boyd Reviewed-by: Nick Desaulniers -- Thanks, ~Nick Desaulniers ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] drm/i915: Mark pinned shmemfs pages as unevictable
Quoting Michal Hocko (2018-10-16 19:21:55) > On Wed 17-10-18 01:43:00, Kuo-Hsin Yang wrote: > > The i915 driver use shmemfs to allocate backing storage for gem objects. > > These shmemfs pages can be pinned (increased ref count) by > > shmem_read_mapping_page_gfp(). When a lot of pages are pinned, vmscan > > wastes a lot of time scanning these pinned pages. Mark these pinned > > pages as unevictable to speed up vmscan. > > I would squash the two patches into the single one. One more thing > though. One more thing to be careful about here. Unless I miss something > such a page is not migrateable so it shouldn't be allocated from a > movable zone. Does mapping_gfp_constraint contains __GFP_MOVABLE? If > yes, we want to drop it as well. Other than that the patch makes sense > with my very limited knowlege of the i915 code of course. They are not migrateable today. But we have proposed hooking up .migratepage and setting __GFP_MOVABLE which would then include unlocking the mapping at migrate time. Fwiw, the shmem_unlock_mapping() call feels quite expensive, almost nullifying the advantage gained from not walking the lists in reclaim. I'll have better numbers in a couple of days. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Get ref on CRTC commit object when waiting for flip_done
== Series Details == Series: drm: Get ref on CRTC commit object when waiting for flip_done URL : https://patchwork.freedesktop.org/series/51079/ State : warning == Summary == $ dim checkpatch origin/drm-tip 6539ec3e48f4 drm: Get ref on CRTC commit object when waiting for flip_done -:13: WARNING:TYPO_SPELLING: 'preemptable' may be misspelled - perhaps 'preemptible'? #13: Worker W becomes preemptable when waiting for flip_done to complete. At total: 0 errors, 1 warnings, 0 checks, 57 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for shmem, drm/i915: Mark pinned shmemfs pages as unevictable
== Series Details == Series: shmem, drm/i915: Mark pinned shmemfs pages as unevictable URL : https://patchwork.freedesktop.org/series/51078/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4990 -> Patchwork_10478 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/51078/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10478 that come from known issues: === IGT changes === Issues hit igt@gem_exec_suspend@basic-s4-devices: fi-glk-j4005: PASS -> DMESG-WARN (fdo#105719) igt@kms_flip@basic-flip-vs-dpms: fi-skl-6700hq: PASS -> DMESG-WARN (fdo#105998) igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence: fi-byt-clapper: PASS -> FAIL (fdo#107362, fdo#103191) igt@kms_pipe_crc_basic@read-crc-pipe-c-frame-sequence: fi-glk-j4005: PASS -> DMESG-WARN (fdo#106097) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-cfl-8109u: PASS -> INCOMPLETE (fdo#108126, fdo#106070) fi-icl-u: NOTRUN -> INCOMPLETE (fdo#107713) igt@pm_rpm@module-reload: fi-glk-j4005: PASS -> DMESG-WARN (fdo#107726) Possible fixes igt@drv_selftest@live_hangcheck: fi-icl-u2: INCOMPLETE (fdo#108315) -> PASS igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: fi-glk-j4005: FAIL (fdo#106765) -> PASS igt@kms_flip@basic-flip-vs-dpms: fi-hsw-4770r: DMESG-WARN (fdo#105602) -> PASS igt@kms_flip@basic-plain-flip: fi-glk-j4005: DMESG-WARN (fdo#106097) -> PASS igt@kms_frontbuffer_tracking@basic: fi-icl-u2: FAIL (fdo#103167) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#105719 https://bugs.freedesktop.org/show_bug.cgi?id=105719 fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998 fdo#106070 https://bugs.freedesktop.org/show_bug.cgi?id=106070 fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097 fdo#106765 https://bugs.freedesktop.org/show_bug.cgi?id=106765 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107713 https://bugs.freedesktop.org/show_bug.cgi?id=107713 fdo#107726 https://bugs.freedesktop.org/show_bug.cgi?id=107726 fdo#108126 https://bugs.freedesktop.org/show_bug.cgi?id=108126 fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315 == Participating hosts (46 -> 43) == Additional (1): fi-icl-u Missing(4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u == Build changes == * Linux: CI_DRM_4990 -> Patchwork_10478 CI_DRM_4990: 0bd34d92e9a27784cb988a300619f497ca0e99ec @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4681: 959d6f95cb1344e0c0dace5b236e17755826fac1 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10478: c2dbef879ec3ecd799fbbda3343f699fec620ec3 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == c2dbef879ec3 drm/i915: Mark pinned shmemfs pages as unevictable 559de4911136 shmem: export shmem_unlock_mapping == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10478/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] drm/i915: Mark pinned shmemfs pages as unevictable
On Wed 17-10-18 01:43:00, Kuo-Hsin Yang wrote: > The i915 driver use shmemfs to allocate backing storage for gem objects. > These shmemfs pages can be pinned (increased ref count) by > shmem_read_mapping_page_gfp(). When a lot of pages are pinned, vmscan > wastes a lot of time scanning these pinned pages. Mark these pinned > pages as unevictable to speed up vmscan. I would squash the two patches into the single one. One more thing though. One more thing to be careful about here. Unless I miss something such a page is not migrateable so it shouldn't be allocated from a movable zone. Does mapping_gfp_constraint contains __GFP_MOVABLE? If yes, we want to drop it as well. Other than that the patch makes sense with my very limited knowlege of the i915 code of course. -- Michal Hocko SUSE Labs ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Use i915_gem_object_get_dma_address() to populate rotated vmas
On Tue, Oct 16, 2018 at 06:54:59PM +0100, Tvrtko Ursulin wrote:
>
> On 16/10/2018 16:04, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Replace the kvmalloc_array() with i915_gem_object_get_dma_address() when
> > populating rotated vmas. One random access mechanism ought to be enough
> > for everyone?
> >
> > To calculate the size of the radix tree I think we can do
> > something like this (assuming 64bit pointers):
> > num_pages = obj_size / 4096
> > tree_height = ceil(log64(num_pages))
> > num_nodes = sum(64^n, n, 0, tree_height-1)
> > tree_size = num_nodes * 576
>
> For 1920x1080x4 I get around 19k in real life - does that match your
> math?
The math assumes the second level of tree is fully populated so
gives me ~37KiB. In this case we have only 2025 pages so we should
only need 33 nodes in total instead of the full 65. 33*576 is ~19KiB.
> For something like two UHD screens with double buffering I guess
> that's around 4 * 2 * 2 = 16 times more, which is perhaps a worst case
> setup? So ~300KiB permanently pinned and likely not used post first pin
> to display. If that is OK with you then you have my ack for the patch.
I think I'm OK with it. And Chris can optimize it later ;)
If we're really short on memory the shrinker should be able to get
rid of this when it's going to swap out the pages. For any fb that's
not currently pinned that is.
> Or a review if you can live with some delay.
>
> Regards,
>
> Tvrtko
>
> > If we compare that with the object size we should get a relative
> > overhead of around .2% to 1% for reasonable sized objects,
> > which framebuffers tend to be.
> >
> > Cc: Chris Wilson
> > Cc: Tvrtko Ursulin
> > Suggested-by: Chris Wilson
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/i915/i915_gem_gtt.c | 31 ++---
> > 1 file changed, 6 insertions(+), 25 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
> > b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > index 29ca9007a704..98d9a1eb1ed2 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > @@ -3637,7 +3637,7 @@ void i915_gem_restore_gtt_mappings(struct
> > drm_i915_private *dev_priv)
> > }
> >
> > static struct scatterlist *
> > -rotate_pages(const dma_addr_t *in, unsigned int offset,
> > +rotate_pages(struct drm_i915_gem_object *obj, unsigned int offset,
> > unsigned int width, unsigned int height,
> > unsigned int stride,
> > struct sg_table *st, struct scatterlist *sg)
> > @@ -3646,7 +3646,7 @@ rotate_pages(const dma_addr_t *in, unsigned int
> > offset,
> > unsigned int src_idx;
> >
> > for (column = 0; column < width; column++) {
> > - src_idx = stride * (height - 1) + column;
> > + src_idx = stride * (height - 1) + column + offset;
> > for (row = 0; row < height; row++) {
> > st->nents++;
> > /* We don't need the pages, but need to initialize
> > @@ -3654,7 +3654,8 @@ rotate_pages(const dma_addr_t *in, unsigned int
> > offset,
> > * The only thing we need are DMA addresses.
> > */
> > sg_set_page(sg, NULL, I915_GTT_PAGE_SIZE, 0);
> > - sg_dma_address(sg) = in[offset + src_idx];
> > + sg_dma_address(sg) =
> > + i915_gem_object_get_dma_address(obj, src_idx);
> > sg_dma_len(sg) = I915_GTT_PAGE_SIZE;
> > sg = sg_next(sg);
> > src_idx -= stride;
> > @@ -3668,22 +3669,11 @@ static noinline struct sg_table *
> > intel_rotate_pages(struct intel_rotation_info *rot_info,
> >struct drm_i915_gem_object *obj)
> > {
> > - const unsigned long n_pages = obj->base.size / I915_GTT_PAGE_SIZE;
> > unsigned int size = intel_rotation_info_size(rot_info);
> > - struct sgt_iter sgt_iter;
> > - dma_addr_t dma_addr;
> > - unsigned long i;
> > - dma_addr_t *page_addr_list;
> > struct sg_table *st;
> > struct scatterlist *sg;
> > int ret = -ENOMEM;
> > -
> > - /* Allocate a temporary list of source pages for random access. */
> > - page_addr_list = kvmalloc_array(n_pages,
> > - sizeof(dma_addr_t),
> > - GFP_KERNEL);
> > - if (!page_addr_list)
> > - return ERR_PTR(ret);
> > + int i;
> >
> > /* Allocate target SG list. */
> > st = kmalloc(sizeof(*st), GFP_KERNEL);
> > @@ -3694,29 +3684,20 @@ intel_rotate_pages(struct intel_rotation_info
> > *rot_info,
> > if (ret)
> > goto err_sg_alloc;
> >
> > - /* Populate source page list from the object. */
> > - i = 0;
> > - for_each_sgt_dma(dma_addr, sgt_iter, obj->mm.pages)
> > - page_addr_list[i++] = dma_addr;
> > -
> > - GEM_BUG_ON(i != n_pages);
> > st->nents = 0;
> > sg = st->sgl;
> >
> >
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: rename and move intel_get_pipe_from_connector()
== Series Details == Series: drm/i915: rename and move intel_get_pipe_from_connector() URL : https://patchwork.freedesktop.org/series/51071/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4988_full -> Patchwork_10475_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_10475_full that come from known issues: === IGT changes === Issues hit igt@drv_suspend@shrink: shard-skl: NOTRUN -> INCOMPLETE (fdo#106886) igt@gem_exec_await@wide-contexts: shard-skl: PASS -> FAIL (fdo#106680) igt@gem_exec_schedule@pi-ringfull-blt: shard-skl: NOTRUN -> FAIL (fdo#103158) igt@gem_exec_schedule@pi-ringfull-bsd: shard-glk: NOTRUN -> FAIL (fdo#103158) igt@kms_available_modes_crc@available_mode_test_crc: shard-apl: PASS -> FAIL (fdo#106641) igt@kms_busy@extended-modeset-hang-newfb-render-b: shard-snb: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_busy@extended-pageflip-hang-newfb-render-a: shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) +3 igt@kms_cursor_crc@cursor-128x128-suspend: shard-glk: NOTRUN -> FAIL (fdo#103232) igt@kms_cursor_crc@cursor-256x256-random: shard-apl: PASS -> FAIL (fdo#103232) +2 igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic: shard-glk: NOTRUN -> FAIL (fdo#105454) igt@kms_fbcon_fbt@psr-suspend: shard-skl: NOTRUN -> FAIL (fdo#107882) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt: shard-glk: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: shard-apl: PASS -> FAIL (fdo#103167) +1 igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-wc: shard-glk: NOTRUN -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbc-stridechange: shard-skl: NOTRUN -> FAIL (fdo#105683) igt@kms_plane@pixel-format-pipe-a-planes: shard-skl: NOTRUN -> DMESG-FAIL (fdo#103166, fdo#106885) shard-glk: NOTRUN -> FAIL (fdo#103166) igt@kms_plane_alpha_blend@pipe-a-alpha-7efc: shard-skl: NOTRUN -> FAIL (fdo#108145, fdo#107815) igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb: shard-glk: NOTRUN -> FAIL (fdo#108145) +2 shard-skl: NOTRUN -> FAIL (fdo#108145) +1 igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: shard-skl: NOTRUN -> FAIL (fdo#108146) +1 igt@kms_plane_multiple@atomic-pipe-a-tiling-yf: shard-apl: PASS -> FAIL (fdo#103166) igt@kms_setmode@basic: shard-hsw: NOTRUN -> FAIL (fdo#99912) shard-snb: NOTRUN -> FAIL (fdo#99912) igt@pm_backlight@fade_with_suspend: shard-skl: NOTRUN -> FAIL (fdo#107847) igt@pm_rpm@system-suspend: shard-skl: PASS -> INCOMPLETE (fdo#104108, fdo#107807) Possible fixes igt@drv_suspend@shrink: shard-glk: INCOMPLETE (k.org#198133, fdo#103359, fdo#106886) -> PASS igt@kms_cursor_crc@cursor-256x85-onscreen: shard-apl: FAIL (fdo#103232) -> PASS +1 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: shard-apl: FAIL (fdo#103167) -> PASS fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359 fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108 fdo#105454 https://bugs.freedesktop.org/show_bug.cgi?id=105454 fdo#105683 https://bugs.freedesktop.org/show_bug.cgi?id=105683 fdo#106641 https://bugs.freedesktop.org/show_bug.cgi?id=106641 fdo#106680 https://bugs.freedesktop.org/show_bug.cgi?id=106680 fdo#106885 https://bugs.freedesktop.org/show_bug.cgi?id=106885 fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886 fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807 fdo#107815 https://bugs.freedesktop.org/show_bug.cgi?id=107815 fdo#107847 https://bugs.freedesktop.org/show_bug.cgi?id=107847 fdo#107882 https://bugs.freedesktop.org/show_bug.cgi?id=107882 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145 fdo#108146 https://bugs.freedesktop.org/show_bug.cgi?id=108146 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133 == Participating hosts (6 ->
Re: [Intel-gfx] [PATCH] drm/i915/gen9+: Fix initial readout for Y tiled framebuffers
On Tue, Oct 16, 2018 at 07:00:11PM +0300, Imre Deak wrote:
> If BIOS configured a Y tiled FB we failed to set up the backing object
> tiling accordingly, leading to a lack of GT fence installed and a
> garbled console.
>
> The problem was bisected to
> commit 011f22eb545a ("drm/i915: Do NOT skip the first 4k of stolen memory for
> pre-allocated buffers v2")
> but it just revealed a pre-existing issue.
>
> Kudos to Ville who suspected a missing fence looking at the corruption
> on the screen.
>
> Cc: Ville Syrjälä
> Cc: Mika Westerberg
> Cc: Hans de Goede
> Cc: ron...@innovation.ch
> Cc:
> Reported-by: Mika Westerberg
> Reported-by: ron...@innovation.ch
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108264
> Fixes: bc8d7dffacb1 ("drm/i915/skl: Provide a Skylake version of
> get_plane_config()")
> Signed-off-by: Imre Deak
lgtm
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/intel_display.c | 25 +++--
> 1 file changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index a2e729fa8d64..3d34b98c4634 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2674,6 +2674,17 @@ intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
> if (size_aligned * 2 > dev_priv->stolen_usable_size)
> return false;
>
> + switch (fb->modifier) {
> + case DRM_FORMAT_MOD_LINEAR:
> + case I915_FORMAT_MOD_X_TILED:
> + case I915_FORMAT_MOD_Y_TILED:
> + break;
> + default:
> + DRM_DEBUG_DRIVER("Unsupported modifier for initial FB:
> 0x%llx\n",
> + fb->modifier);
> + return false;
> + }
> +
> mutex_lock(>struct_mutex);
> obj = i915_gem_object_create_stolen_for_preallocated(dev_priv,
>base_aligned,
> @@ -2683,8 +2694,17 @@ intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
> if (!obj)
> return false;
>
> - if (plane_config->tiling == I915_TILING_X)
> - obj->tiling_and_stride = fb->pitches[0] | I915_TILING_X;
> + switch (plane_config->tiling) {
> + case I915_TILING_NONE:
> + break;
> + case I915_TILING_X:
> + case I915_TILING_Y:
> + obj->tiling_and_stride = fb->pitches[0] | plane_config->tiling;
> + break;
> + default:
> + MISSING_CASE(plane_config->tiling);
> + return false;
> + }
>
> mode_cmd.pixel_format = fb->format->format;
> mode_cmd.width = fb->width;
> @@ -8827,6 +8847,7 @@ skylake_get_initial_plane_config(struct intel_crtc
> *crtc,
> fb->modifier = I915_FORMAT_MOD_X_TILED;
> break;
> case PLANE_CTL_TILED_Y:
> + plane_config->tiling = I915_TILING_Y;
> if (val & PLANE_CTL_RENDER_DECOMPRESSION_ENABLE)
> fb->modifier = I915_FORMAT_MOD_Y_TILED_CCS;
> else
> --
> 2.13.2
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH] drm/i915: Use i915_gem_object_get_dma_address() to populate rotated vmas
On 16/10/2018 16:04, Ville Syrjala wrote:
From: Ville Syrjälä
Replace the kvmalloc_array() with i915_gem_object_get_dma_address() when
populating rotated vmas. One random access mechanism ought to be enough
for everyone?
To calculate the size of the radix tree I think we can do
something like this (assuming 64bit pointers):
num_pages = obj_size / 4096
tree_height = ceil(log64(num_pages))
num_nodes = sum(64^n, n, 0, tree_height-1)
tree_size = num_nodes * 576
For 1920x1080x4 I get around 19k in real life - does that match your
math? For something like two UHD screens with double buffering I guess
that's around 4 * 2 * 2 = 16 times more, which is perhaps a worst case
setup? So ~300KiB permanently pinned and likely not used post first pin
to display. If that is OK with you then you have my ack for the patch.
Or a review if you can live with some delay.
Regards,
Tvrtko
If we compare that with the object size we should get a relative
overhead of around .2% to 1% for reasonable sized objects,
which framebuffers tend to be.
Cc: Chris Wilson
Cc: Tvrtko Ursulin
Suggested-by: Chris Wilson
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 31 ++---
1 file changed, 6 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 29ca9007a704..98d9a1eb1ed2 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -3637,7 +3637,7 @@ void i915_gem_restore_gtt_mappings(struct
drm_i915_private *dev_priv)
}
static struct scatterlist *
-rotate_pages(const dma_addr_t *in, unsigned int offset,
+rotate_pages(struct drm_i915_gem_object *obj, unsigned int offset,
unsigned int width, unsigned int height,
unsigned int stride,
struct sg_table *st, struct scatterlist *sg)
@@ -3646,7 +3646,7 @@ rotate_pages(const dma_addr_t *in, unsigned int offset,
unsigned int src_idx;
for (column = 0; column < width; column++) {
- src_idx = stride * (height - 1) + column;
+ src_idx = stride * (height - 1) + column + offset;
for (row = 0; row < height; row++) {
st->nents++;
/* We don't need the pages, but need to initialize
@@ -3654,7 +3654,8 @@ rotate_pages(const dma_addr_t *in, unsigned int offset,
* The only thing we need are DMA addresses.
*/
sg_set_page(sg, NULL, I915_GTT_PAGE_SIZE, 0);
- sg_dma_address(sg) = in[offset + src_idx];
+ sg_dma_address(sg) =
+ i915_gem_object_get_dma_address(obj, src_idx);
sg_dma_len(sg) = I915_GTT_PAGE_SIZE;
sg = sg_next(sg);
src_idx -= stride;
@@ -3668,22 +3669,11 @@ static noinline struct sg_table *
intel_rotate_pages(struct intel_rotation_info *rot_info,
struct drm_i915_gem_object *obj)
{
- const unsigned long n_pages = obj->base.size / I915_GTT_PAGE_SIZE;
unsigned int size = intel_rotation_info_size(rot_info);
- struct sgt_iter sgt_iter;
- dma_addr_t dma_addr;
- unsigned long i;
- dma_addr_t *page_addr_list;
struct sg_table *st;
struct scatterlist *sg;
int ret = -ENOMEM;
-
- /* Allocate a temporary list of source pages for random access. */
- page_addr_list = kvmalloc_array(n_pages,
- sizeof(dma_addr_t),
- GFP_KERNEL);
- if (!page_addr_list)
- return ERR_PTR(ret);
+ int i;
/* Allocate target SG list. */
st = kmalloc(sizeof(*st), GFP_KERNEL);
@@ -3694,29 +3684,20 @@ intel_rotate_pages(struct intel_rotation_info *rot_info,
if (ret)
goto err_sg_alloc;
- /* Populate source page list from the object. */
- i = 0;
- for_each_sgt_dma(dma_addr, sgt_iter, obj->mm.pages)
- page_addr_list[i++] = dma_addr;
-
- GEM_BUG_ON(i != n_pages);
st->nents = 0;
sg = st->sgl;
for (i = 0 ; i < ARRAY_SIZE(rot_info->plane); i++) {
- sg = rotate_pages(page_addr_list, rot_info->plane[i].offset,
+ sg = rotate_pages(obj, rot_info->plane[i].offset,
rot_info->plane[i].width,
rot_info->plane[i].height,
rot_info->plane[i].stride, st, sg);
}
- kvfree(page_addr_list);
-
return st;
err_sg_alloc:
kfree(st);
err_st_alloc:
- kvfree(page_addr_list);
DRM_DEBUG_DRIVER("Failed to create rotated mapping for object size %zu! (%ux%u tiles, %u pages)\n",
obj->base.size, rot_info->plane[0].width,
rot_info->plane[0].height, size);
[Intel-gfx] [PATCH v2] drm: Get ref on CRTC commit object when waiting for flip_done
From: Leo Li
This fixes a general protection fault, caused by accessing the contents
of a flip_done completion object that has already been freed. It occurs
due to the preemption of a non-blocking commit worker thread W by
another commit thread X. X continues to clear its atomic state at the
end, destroying the CRTC commit object that W still needs. Switching
back to W and accessing the commit objects then leads to bad results.
Worker W becomes preemptable when waiting for flip_done to complete. At
this point, a frequently occurring commit thread X can take over. Here's
an example where W is a worker thread that flips on both CRTCs, and X
does a legacy cursor update on both CRTCs:
...
1. W does flip work
2. W runs commit_hw_done()
3. W waits for flip_done on CRTC 1
4. > flip_done for CRTC 1 completes
5. W finishes waiting for CRTC 1
6. W waits for flip_done on CRTC 2
7. > Preempted by X
8. > flip_done for CRTC 2 completes
9. X atomic_check: hw_done and flip_done are complete on all CRTCs
10. X updates cursor on both CRTCs
11. X destroys atomic state
12. X done
13. > Switch back to W
14. W waits for flip_done on CRTC 2
15. W raises general protection fault
The error looks like so:
general protection fault: [#1] PREEMPT SMP PTI
**snip**
Call Trace:
lock_acquire+0xa2/0x1b0
_raw_spin_lock_irq+0x39/0x70
wait_for_completion_timeout+0x31/0x130
drm_atomic_helper_wait_for_flip_done+0x64/0x90 [drm_kms_helper]
amdgpu_dm_atomic_commit_tail+0xcae/0xdd0 [amdgpu]
commit_tail+0x3d/0x70 [drm_kms_helper]
process_one_work+0x212/0x650
worker_thread+0x49/0x420
kthread+0xfb/0x130
ret_from_fork+0x3a/0x50
Modules linked in: x86_pkg_temp_thermal amdgpu(O) chash(O)
gpu_sched(O) drm_kms_helper(O) syscopyarea sysfillrect sysimgblt
fb_sys_fops ttm(O) drm(O)
Note that i915 has this issue masked, since hw_done is signaled after
waiting for flip_done. Doing so will block the cursor update from
happening until hw_done is signaled, preventing the cursor commit from
destroying the state.
v2: The reference on the commit object needs to be obtained before
hw_done() is signaled, since that's the point where another commit
is allowed to modify the state. Assuming that the
new_crtc_state->commit object still exists within flip_done() is
incorrect.
Fix by getting a reference in setup_commit(), and releasing it
during default_clear().
Signed-off-by: Leo Li
---
drivers/gpu/drm/drm_atomic.c| 5 +
drivers/gpu/drm/drm_atomic_helper.c | 12
include/drm/drm_atomic.h| 11 +++
3 files changed, 24 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 3eb061e..12ae917 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -174,6 +174,11 @@ void drm_atomic_state_default_clear(struct
drm_atomic_state *state)
state->crtcs[i].state = NULL;
state->crtcs[i].old_state = NULL;
state->crtcs[i].new_state = NULL;
+
+ if (state->crtcs[i].commit) {
+ drm_crtc_commit_put(state->crtcs[i].commit);
+ state->crtcs[i].commit = NULL;
+ }
}
for (i = 0; i < config->num_total_plane; i++) {
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index 80be74d..1bb4c31 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -1408,15 +1408,16 @@ EXPORT_SYMBOL(drm_atomic_helper_wait_for_vblanks);
void drm_atomic_helper_wait_for_flip_done(struct drm_device *dev,
struct drm_atomic_state *old_state)
{
- struct drm_crtc_state *new_crtc_state;
struct drm_crtc *crtc;
int i;
- for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
- struct drm_crtc_commit *commit = new_crtc_state->commit;
+ for (i = 0; i < dev->mode_config.num_crtc; i++) {
+ struct drm_crtc_commit *commit = old_state->crtcs[i].commit;
int ret;
- if (!commit)
+ crtc = old_state->crtcs[i].ptr;
+
+ if (!crtc || !commit)
continue;
ret = wait_for_completion_timeout(>flip_done, 10 * HZ);
@@ -1934,6 +1935,9 @@ int drm_atomic_helper_setup_commit(struct
drm_atomic_state *state,
drm_crtc_commit_get(commit);
commit->abort_completion = true;
+
+ state->crtcs[i].commit = commit;
+ drm_crtc_commit_get(commit);
}
for_each_oldnew_connector_in_state(state, conn, old_conn_state,
new_conn_state, i) {
diff --git a/include/drm/drm_atomic.h b/include/drm/drm_atomic.h
index da9d95a..1e71315 100644
--- a/include/drm/drm_atomic.h
[Intel-gfx] [PATCH 1/2] shmem: export shmem_unlock_mapping
By exporting this function, drivers can mark/unmark a shmemfs address
space as unevictable in the following way: 1. mark an address space as
unevictable with mapping_set_unevictable(), pages in the address space
will be moved to unevictable list in vmscan. 2. mark an address space
evictable with mapping_clear_unevictable(), and move these pages back to
evictable list with shmem_unlock_mapping().
Signed-off-by: Kuo-Hsin Yang
---
Documentation/vm/unevictable-lru.rst | 4 +++-
mm/shmem.c | 2 ++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/vm/unevictable-lru.rst
b/Documentation/vm/unevictable-lru.rst
index fdd84cb8d511..a812fb55136d 100644
--- a/Documentation/vm/unevictable-lru.rst
+++ b/Documentation/vm/unevictable-lru.rst
@@ -143,7 +143,7 @@ using a number of wrapper functions:
Query the address space, and return true if it is completely
unevictable.
-These are currently used in two places in the kernel:
+These are currently used in three places in the kernel:
(1) By ramfs to mark the address spaces of its inodes when they are created,
and this mark remains for the life of the inode.
@@ -154,6 +154,8 @@ These are currently used in two places in the kernel:
swapped out; the application must touch the pages manually if it wants to
ensure they're in memory.
+ (3) By the i915 driver to mark pinned address space until it's unpinned.
+
Detecting Unevictable Pages
---
diff --git a/mm/shmem.c b/mm/shmem.c
index 446942677cd4..d1ce34c09df6 100644
--- a/mm/shmem.c
+++ b/mm/shmem.c
@@ -786,6 +786,7 @@ void shmem_unlock_mapping(struct address_space *mapping)
cond_resched();
}
}
+EXPORT_SYMBOL_GPL(shmem_unlock_mapping);
/*
* Remove range of pages and swap entries from radix tree, and free them.
@@ -3874,6 +3875,7 @@ int shmem_lock(struct file *file, int lock, struct
user_struct *user)
void shmem_unlock_mapping(struct address_space *mapping)
{
}
+EXPORT_SYMBOL_GPL(shmem_unlock_mapping);
#ifdef CONFIG_MMU
unsigned long shmem_get_unmapped_area(struct file *file,
--
2.19.1.331.ge82ca0e54c-goog
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[Intel-gfx] [PATCH 2/2] drm/i915: Mark pinned shmemfs pages as unevictable
The i915 driver use shmemfs to allocate backing storage for gem objects.
These shmemfs pages can be pinned (increased ref count) by
shmem_read_mapping_page_gfp(). When a lot of pages are pinned, vmscan
wastes a lot of time scanning these pinned pages. Mark these pinned
pages as unevictable to speed up vmscan.
Signed-off-by: Kuo-Hsin Yang
---
drivers/gpu/drm/i915/i915_gem.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index fcc73a6ab503..e0ff5b736128 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2390,6 +2390,7 @@ i915_gem_object_put_pages_gtt(struct drm_i915_gem_object
*obj,
{
struct sgt_iter sgt_iter;
struct page *page;
+ struct address_space *mapping;
__i915_gem_object_release_shmem(obj, pages, true);
@@ -2409,6 +2410,10 @@ i915_gem_object_put_pages_gtt(struct drm_i915_gem_object
*obj,
}
obj->mm.dirty = false;
+ mapping = file_inode(obj->base.filp)->i_mapping;
+ mapping_clear_unevictable(mapping);
+ shmem_unlock_mapping(mapping);
+
sg_free_table(pages);
kfree(pages);
}
@@ -2551,6 +2556,7 @@ static int i915_gem_object_get_pages_gtt(struct
drm_i915_gem_object *obj)
* Fail silently without starting the shrinker
*/
mapping = obj->base.filp->f_mapping;
+ mapping_set_unevictable(mapping);
noreclaim = mapping_gfp_constraint(mapping, ~__GFP_RECLAIM);
noreclaim |= __GFP_NORETRY | __GFP_NOWARN;
@@ -2664,6 +2670,8 @@ static int i915_gem_object_get_pages_gtt(struct
drm_i915_gem_object *obj)
err_pages:
for_each_sgt_page(page, sgt_iter, st)
put_page(page);
+ mapping_clear_unevictable(mapping);
+ shmem_unlock_mapping(mapping);
sg_free_table(st);
kfree(st);
--
2.19.1.331.ge82ca0e54c-goog
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[Intel-gfx] [PATCH 0/2] shmem, drm/i915: Mark pinned shmemfs pages as unevictable
When a graphics heavy application is running, i915 driver may pin a lot of shmemfs pages and vmscan slows down significantly by scanning these pinned pages. This patch is an alternative to the patch by Chris Wilson [1]. As i915 driver pins all pages in an address space, marking an address space as unevictable is sufficient to solve this issue. [1]: https://patchwork.kernel.org/patch/9768741/ Kuo-Hsin Yang (2): shmem: export shmem_unlock_mapping drm/i915: Mark pinned shmemfs pages as unevictable Documentation/vm/unevictable-lru.rst | 4 +++- drivers/gpu/drm/i915/i915_gem.c | 8 mm/shmem.c | 2 ++ 3 files changed, 13 insertions(+), 1 deletion(-) -- 2.19.1.331.ge82ca0e54c-goog ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gen9+: Fix initial readout for Y tiled framebuffers
== Series Details == Series: drm/i915/gen9+: Fix initial readout for Y tiled framebuffers URL : https://patchwork.freedesktop.org/series/51075/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4990 -> Patchwork_10477 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/51075/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10477 that come from known issues: === IGT changes === Issues hit igt@drv_module_reload@basic-no-display: fi-glk-j4005: PASS -> DMESG-WARN (fdo#105719) igt@gem_exec_suspend@basic-s3: fi-kbl-soraka: NOTRUN -> INCOMPLETE (fdo#107859, fdo#107774, fdo#107556) igt@pm_rpm@module-reload: fi-glk-j4005: PASS -> DMESG-WARN (fdo#107726, fdo#106097) Possible fixes igt@drv_selftest@live_hangcheck: fi-icl-u2: INCOMPLETE (fdo#108315) -> PASS igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: fi-glk-j4005: FAIL (fdo#106765) -> PASS igt@kms_flip@basic-flip-vs-dpms: fi-hsw-4770r: DMESG-WARN (fdo#105602) -> PASS igt@kms_flip@basic-flip-vs-wf_vblank: fi-glk-j4005: FAIL (fdo#100368) -> PASS igt@kms_flip@basic-plain-flip: fi-glk-j4005: DMESG-WARN (fdo#106097) -> PASS igt@kms_frontbuffer_tracking@basic: fi-icl-u2: FAIL (fdo#103167) -> PASS fi-byt-clapper: FAIL (fdo#103167) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#105719 https://bugs.freedesktop.org/show_bug.cgi?id=105719 fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097 fdo#106765 https://bugs.freedesktop.org/show_bug.cgi?id=106765 fdo#107556 https://bugs.freedesktop.org/show_bug.cgi?id=107556 fdo#107726 https://bugs.freedesktop.org/show_bug.cgi?id=107726 fdo#107774 https://bugs.freedesktop.org/show_bug.cgi?id=107774 fdo#107859 https://bugs.freedesktop.org/show_bug.cgi?id=107859 fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315 == Participating hosts (46 -> 42) == Additional (2): fi-kbl-soraka fi-icl-u Missing(6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-apl-guc fi-pnv-d510 == Build changes == * Linux: CI_DRM_4990 -> Patchwork_10477 CI_DRM_4990: 0bd34d92e9a27784cb988a300619f497ca0e99ec @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4681: 959d6f95cb1344e0c0dace5b236e17755826fac1 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10477: 030f7e7d682d65b11f75afd2a5e128e2b839130c @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 030f7e7d682d drm/i915/gen9+: Fix initial readout for Y tiled framebuffers == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10477/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: split out display quirks to a new file
== Series Details == Series: series starting with [1/2] drm/i915: split out display quirks to a new file URL : https://patchwork.freedesktop.org/series/51070/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4988_full -> Patchwork_10474_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10474_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10474_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10474_full: === IGT changes === Warnings igt@perf_pmu@rc6: shard-kbl: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_10474_full that come from known issues: === IGT changes === Issues hit igt@drv_suspend@debugfs-reader: shard-skl: PASS -> INCOMPLETE (fdo#104108) igt@drv_suspend@shrink: shard-apl: PASS -> INCOMPLETE (fdo#106886, fdo#103927) igt@gem_exec_schedule@pi-ringfull-blt: shard-skl: NOTRUN -> FAIL (fdo#103158) igt@gem_exec_schedule@pi-ringfull-bsd: shard-glk: NOTRUN -> FAIL (fdo#103158) igt@kms_available_modes_crc@available_mode_test_crc: shard-apl: PASS -> FAIL (fdo#106641) igt@kms_busy@extended-modeset-hang-newfb-render-b: shard-snb: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: shard-hsw: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_cursor_crc@cursor-256x256-random: shard-apl: PASS -> FAIL (fdo#103232) +2 igt@kms_fbcon_fbt@psr-suspend: shard-skl: NOTRUN -> FAIL (fdo#107882) igt@kms_flip@dpms-vs-vblank-race: shard-kbl: PASS -> DMESG-WARN (fdo#103313, fdo#105345) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt: shard-apl: PASS -> FAIL (fdo#103167) +2 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: shard-glk: PASS -> FAIL (fdo#103167) +2 igt@kms_frontbuffer_tracking@fbc-stridechange: shard-skl: NOTRUN -> FAIL (fdo#105683) igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-move: shard-snb: SKIP -> INCOMPLETE (fdo#105411) igt@kms_plane@pixel-format-pipe-a-planes: shard-skl: NOTRUN -> DMESG-FAIL (fdo#106885, fdo#103166) igt@kms_plane_alpha_blend@pipe-a-alpha-7efc: shard-skl: NOTRUN -> FAIL (fdo#107815, fdo#108145) igt@kms_plane_alpha_blend@pipe-a-alpha-transparant-fb: shard-glk: NOTRUN -> FAIL (fdo#108145) igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb: shard-skl: NOTRUN -> FAIL (fdo#108145) +2 igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: shard-skl: NOTRUN -> FAIL (fdo#108146) +1 igt@kms_plane_multiple@atomic-pipe-a-tiling-yf: shard-apl: PASS -> FAIL (fdo#103166) igt@kms_plane_multiple@atomic-pipe-b-tiling-y: shard-glk: PASS -> FAIL (fdo#103166) igt@kms_setmode@basic: shard-hsw: NOTRUN -> FAIL (fdo#99912) shard-kbl: PASS -> FAIL (fdo#99912) shard-snb: NOTRUN -> FAIL (fdo#99912) igt@pm_backlight@fade_with_suspend: shard-skl: NOTRUN -> FAIL (fdo#107847) Possible fixes igt@kms_busy@extended-pageflip-hang-newfb-render-a: shard-apl: DMESG-WARN (fdo#107956) -> PASS igt@kms_color@pipe-a-ctm-green-to-red: shard-skl: FAIL -> PASS igt@kms_cursor_crc@cursor-256x85-onscreen: shard-apl: FAIL (fdo#103232) -> PASS +1 igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled: shard-skl: FAIL (fdo#103184) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: shard-apl: FAIL (fdo#103167) -> PASS igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-gtt: shard-glk: FAIL (fdo#103167) -> PASS igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: shard-skl: FAIL (fdo#107815, fdo#108145) -> PASS igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: shard-apl: FAIL (fdo#103166) -> PASS +1 fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103313
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gen9+: Fix initial readout for Y tiled framebuffers
== Series Details ==
Series: drm/i915/gen9+: Fix initial readout for Y tiled framebuffers
URL : https://patchwork.freedesktop.org/series/51075/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
030f7e7d682d drm/i915/gen9+: Fix initial readout for Y tiled framebuffers
-:14: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#14:
commit 011f22eb545a ("drm/i915: Do NOT skip the first 4k of stolen memory for
pre-allocated buffers v2")
total: 0 errors, 1 warnings, 0 checks, 43 lines checked
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/guc: fix GuC suspend/resume
On 10/16/2018 2:21 AM, Daniel Vetter wrote:
On Tue, Oct 16, 2018 at 1:44 AM Daniele Ceraolo Spurio
wrote:
On 15/10/18 15:47, Patchwork wrote:
== Series Details ==
Series: series starting with [1/2] drm/i915/guc: fix GuC suspend/resume
URL : https://patchwork.freedesktop.org/series/51033/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4984 -> Patchwork_10464 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_10464 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10464, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/51033/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in
Patchwork_10464:
=== IGT changes ===
Possible regressions
igt@drv_selftest@live_execlists:
fi-skl-6700hq: PASS -> INCOMPLETE
Log seem to be cut for this one. Since it is stopping inside
live_preempt_smoke it is probably a known issue that Chris mentioned.
Can't reproduce on my skylake even with the test in a loop.
igt@drv_selftest@live_guc:
fi-kbl-7567u: PASS -> DMESG-WARN
fi-skl-6600u: PASS -> DMESG-WARN
fi-skl-gvtdvm: PASS -> DMESG-WARN
fi-skl-iommu: PASS -> DMESG-WARN
fi-skl-6260u: PASS -> DMESG-WARN
fi-bxt-dsi: PASS -> DMESG-WARN
fi-skl-6700k2: PASS -> DMESG-WARN
fi-whl-u: PASS -> DMESG-WARN
fi-skl-6770hq: PASS -> DMESG-WARN
fi-kbl-7560u: PASS -> DMESG-WARN
fi-kbl-8809g: PASS -> DMESG-WARN
fi-kbl-r: PASS -> DMESG-WARN
fi-kbl-x1275: PASS -> DMESG-WARN
fi-bxt-j4205: PASS -> DMESG-WARN
fi-cfl-s3: PASS -> DMESG-WARN
fi-cfl-8109u: PASS -> DMESG-WARN
fi-kbl-7500u: PASS -> DMESG-WARN
fi-cfl-8700k: PASS -> DMESG-WARN
These are all:
[drm:intel_guc_send_mmio [i915]] *ERROR* MMIO: GuC action 0x10 failed
with error -5 0xf000f000
Which is not a real failure since the test is triggering it on purpose
You still need to make them shut up. dmesg errors should only be used
for stuff we really don't expect. E.g. gpu hangs provoked by igt also
don't result in dmesg errors/warnings and failed tests.
-Daniel
I wasn't trying to imply that we don't care that we have a failure or
that we shouldn't make it shut up, just that it is not a regression
introduced by this patch, because it doesn't even get near that code. I
recall that there was a small discussion in the past about how to
silence this, I'll try to dig it up and see if there was an agreed solution.
Daniele
igt@drv_selftest@live_hangcheck:
fi-skl-gvtdvm: PASS -> DMESG-FAIL
<7> [464.966238] [drm:guc_fw_xfer [i915]] GuC status 0x20
<3> [464.966361] [drm:guc_fw_xfer [i915]] *ERROR* GuC firmware xfer
error -110
This looks like GuC is stuck very early in the boot flow (even before
the RSA check). On SKL there are known issues that could cause this and
we should reset GuC and retry, but we aren't. Looks like we indirectly
stopped applying WaEnableuKernelHeaderValidFix and
WaEnableGuCBootHashCheckNotSet by not returning -EAGAIN from
intel_guc_fw_upload in any case. Michal?
Thanks,
Daniele
== Known issues ==
Here are the changes found in Patchwork_10464 that come from known issues:
=== IGT changes ===
Issues hit
igt@drv_selftest@live_guc:
{fi-apl-guc}: NOTRUN -> DMESG-WARN (fdo#107258)
igt@gem_exec_suspend@basic-s4-devices:
fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
fi-snb-2520m: PASS -> DMESG-FAIL (fdo#103713)
igt@kms_setmode@basic-clone-single-crtc:
fi-snb-2520m: PASS -> DMESG-WARN (fdo#103713)
igt@pm_backlight@basic-brightness:
fi-snb-2520m: PASS -> INCOMPLETE (fdo#103713)
Possible fixes
igt@drv_selftest@live_gem:
{fi-apl-guc}: INCOMPLETE (fdo#106693) -> PASS
igt@kms_frontbuffer_tracking@basic:
fi-byt-clapper: FAIL (fdo#103167) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#106693 https://bugs.freedesktop.org/show_bug.cgi?id=106693
fdo#107258 https://bugs.freedesktop.org/show_bug.cgi?id=107258
fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
== Participating hosts (53 -> 47) ==
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Use i915_gem_object_get_dma_address() to populate rotated vmas
== Series Details == Series: drm/i915: Use i915_gem_object_get_dma_address() to populate rotated vmas URL : https://patchwork.freedesktop.org/series/51072/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4990 -> Patchwork_10476 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/51072/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10476 that come from known issues: === IGT changes === Issues hit igt@gem_exec_suspend@basic-s3: fi-kbl-soraka: NOTRUN -> INCOMPLETE (fdo#107556, fdo#107859, fdo#107774) igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b: fi-byt-clapper: PASS -> FAIL (fdo#107362) igt@pm_rpm@module-reload: fi-glk-j4005: PASS -> DMESG-WARN (fdo#107726) Possible fixes igt@drv_selftest@live_hangcheck: fi-icl-u2: INCOMPLETE (fdo#108315) -> PASS igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: fi-glk-j4005: FAIL (fdo#106765) -> PASS igt@kms_flip@basic-flip-vs-dpms: fi-hsw-4770r: DMESG-WARN (fdo#105602) -> PASS igt@kms_flip@basic-plain-flip: fi-glk-j4005: DMESG-WARN (fdo#106097) -> PASS igt@kms_frontbuffer_tracking@basic: fi-icl-u2: FAIL (fdo#103167) -> PASS fi-byt-clapper: FAIL (fdo#103167) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097 fdo#106765 https://bugs.freedesktop.org/show_bug.cgi?id=106765 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107556 https://bugs.freedesktop.org/show_bug.cgi?id=107556 fdo#107726 https://bugs.freedesktop.org/show_bug.cgi?id=107726 fdo#107774 https://bugs.freedesktop.org/show_bug.cgi?id=107774 fdo#107859 https://bugs.freedesktop.org/show_bug.cgi?id=107859 fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315 == Participating hosts (46 -> 44) == Additional (2): fi-kbl-soraka fi-icl-u Missing(4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u == Build changes == * Linux: CI_DRM_4990 -> Patchwork_10476 CI_DRM_4990: 0bd34d92e9a27784cb988a300619f497ca0e99ec @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4681: 959d6f95cb1344e0c0dace5b236e17755826fac1 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10476: 250009151f8d3d9243a6ba13953c1c86a3f38360 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 250009151f8d drm/i915: Use i915_gem_object_get_dma_address() to populate rotated vmas == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10476/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Use i915_gem_object_get_dma_address() to populate rotated vmas
== Series Details == Series: drm/i915: Use i915_gem_object_get_dma_address() to populate rotated vmas URL : https://patchwork.freedesktop.org/series/51072/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Use i915_gem_object_get_dma_address() to populate rotated vmas -./include/linux/mm.h:592:13: error: undefined identifier '__builtin_mul_overflow' -./include/linux/mm.h:592:13: warning: call with no type! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: fix GuC suspend/resume
On 10/16/2018 3:26 AM, Michal Wajdeczko wrote:
On Tue, 16 Oct 2018 00:10:08 +0200, Daniele Ceraolo Spurio
wrote:
The ENTER/EXIT_S_STATE actions queue the save/restore operation in GuC
FW and then return, so waiting on the H2H is not enough to guarantee
GuC is done.
When all the processing is done, GuC writes 0 to scratch register 14,
so we can poll on that. Note that GuC does not ensure that the value
in the register is different from 0 while the action is in progress
so we need to take care of that ourselves as well.
Cc: Chris Wilson
Cc: Michal Wajdeczko
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/intel_guc.c | 28 +--
drivers/gpu/drm/i915/intel_guc_fwif.h | 6 ++
2 files changed, 32 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc.c
b/drivers/gpu/drm/i915/intel_guc.c
index 230aea69385d..f238cd7a9dcf 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -521,6 +521,30 @@ int intel_guc_auth_huc(struct intel_guc *guc,
u32 rsa_offset)
return intel_guc_send(guc, action, ARRAY_SIZE(action));
}
+/*
+ * The ENTER/EXIT_S_STATE actions queue the save/restore operation
in GuC FW and
+ * then return, so waiting on the H2H is not enough to guarantee GuC
is done.
+ * When all the processing is done, GuC writes 0 to scratch register
14, so we
s/writes 0/writes INTEL_GUC_SLEEP_STATE_SUCCESS ?
+ * can poll on that. Note that GuC does not ensure that the value in
the
+ * register is different from 0 while the action is in progress so
we need to
+ * take care of that ourselves as well.
+ */
+static int guc_sleep_state_action(struct intel_guc *guc,
+ const u32 *action, u32 len)
+{
+ struct drm_i915_private *dev_priv = guc_to_i915(guc);
+ int ret;
+
+ I915_WRITE(SOFT_SCRATCH(14), ~0x0);
Do we want to add dedicated name for that scratch register?
As I replied on your patch, the register is used for other purposes in
other actions so I don't think it is a good idea to rename it.
Also, as GuC is using scratch[14] then we need to remove it from our send
register pool - patch is here [1]
+
+ ret = intel_guc_send(guc, action, len);
+ if (ret)
+ return ret;
+
+ return intel_wait_for_register(dev_priv, SOFT_SCRATCH(14), ~0x0,
+ INTEL_GUC_SLEEP_STATE_SUCCESS, 10);
Maybe it is worth to use __intel_wait_for_register() and print sleep
state error code in case of failure ? And do we really need to wait
full 10ms for SUCCESS if GuC already has reported PREEMPT_TO_IDLE_FAILED
or ENGINE_RESET_FAILED ?
u32 state;
ret = __intel_wait_for_register(dev_priv, SOFT_SCRATCH(14),
0x8000,
0, 10, );
if (ret)
return ret;
if (status != INTEL_GUC_SLEEP_STATE_SUCCESS) {
DRM_ERROR("... %u\n", state);
return -EIO;
}
return 0;
It should be impossible for us to get PREEMPT_TO_IDLE_FAILED or
ENGINE_RESET_FAILED because those only come in play if guc_suspend() is
called while there are outstanding request inside GuC. However, no real
downsides in going with your solution either so I'll do the changes ;)
+}
+
/**
* intel_guc_suspend() - notify GuC entering suspend state
* @guc: the guc
@@ -533,7 +557,7 @@ int intel_guc_suspend(struct intel_guc *guc)
intel_guc_ggtt_offset(guc, guc->shared_data)
};
- return intel_guc_send(guc, data, ARRAY_SIZE(data));
+ return guc_sleep_state_action(guc, data, ARRAY_SIZE(data));
}
/**
@@ -571,7 +595,7 @@ int intel_guc_resume(struct intel_guc *guc)
intel_guc_ggtt_offset(guc, guc->shared_data)
};
- return intel_guc_send(guc, data, ARRAY_SIZE(data));
+ return guc_sleep_state_action(guc, data, ARRAY_SIZE(data));
}
/**
diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h
b/drivers/gpu/drm/i915/intel_guc_fwif.h
index 8382d591c784..b0eb5aabe0a7 100644
--- a/drivers/gpu/drm/i915/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
@@ -687,6 +687,12 @@ enum intel_guc_report_status {
INTEL_GUC_REPORT_STATUS_COMPLETE = 0x4,
};
+enum intel_guc_sleep_state_status {
+ INTEL_GUC_SLEEP_STATE_SUCCESS = 0x0,
+ INTEL_GUC_SLEEP_STATE_PREEMPT_TO_IDLE_FAILED = 0x1,
+ INTEL_GUC_SLEEP_STATE_ENGINE_RESET_FAILED = 0x2
as we waiting for state change, maybe we should explicitly define
INTEL_GUC_SLEEP_STATE_INVALID_MASK = 0x8000,
and use it in __intel_wait_for_register ?
ack
+};
+
#define GUC_LOG_CONTROL_LOGGING_ENABLED (1 << 0)
#define GUC_LOG_CONTROL_VERBOSITY_SHIFT 4
#define GUC_LOG_CONTROL_VERBOSITY_MASK (0xF <<
GUC_LOG_CONTROL_VERBOSITY_SHIFT)
Note for you while I'm it: I've been told that the gen11 GuC FW has a
simplified and improved flow for suspend/resume, so some changes will be
required in your series. Not sure about the details.
Thanks,
Daniele
Thanks,
Michal
[1] https://patchwork.freedesktop.org/patch/256921/
Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Limit number of scratch registers used for H2G
On 10/16/2018 4:44 AM, Chris Wilson wrote: Quoting Michal Wajdeczko (2018-10-16 10:42:06) We wrongly assumed that GuC is only using last scratch register for G2H messages, but in fact it is also using register [14] to report sleep state status. Remove that register from our H2G send registers pool. I'll leave it up to you and Daniele to work out if it is being exclusively used for this purpose or if it is just part of the response for the suspend/resume message. -Chris AFAICS in the GuC FW, the same register is reused for other purposes in other actions (that we don't use/need), but always as a GuC to host response. No message from host to guc uses more than 8 registers and the GuC FW itself uses an 8-element array to store the H2G message, so we could reduce our send array to just 8 regs. The GEM_BUG_ON() in guc_send_reg() would avoid troubles if a command requiring more than 8 register was added later, but I'd say that's extremely unlikely since the old SKL FW is not getting any major updates and the new one uses CT buffers so we don't care about the registers. Daniele ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 04/18] drm/selftest: Add drm damage helper selftest
>
> On Tue, Oct 16, 2018 at 02:21:17PM +0200, Daniel Vetter wrote:
> > On Mon, Oct 15, 2018 at 04:11:41PM +, Deepak Singh Rawat wrote:
> > > > On Wed, Oct 10, 2018 at 05:16:43PM -0700, Deepak Rawat wrote:
> > > > > Selftest for drm damage helper iterator functions.
> > > > >
> > > > > Cc: ville.syrj...@linux.intel.com
> > > > > Cc: Daniel Vetter
> > > > > Cc: Pekka Paalanen
> > > > > Cc: Daniel Stone
> > > > > Cc: intel-gfx@lists.freedesktop.org
> > > > > Cc: igt-...@lists.freedesktop.org
> > > > > Cc: petri.latv...@intel.com
> > > > > Cc: ch...@chris-wilson.co.uk
> > > > > Signed-off-by: Deepak Rawat
> > > > > ---
> > > > > drivers/gpu/drm/selftests/Makefile| 3 +-
> > > > > .../selftests/drm_damage_helper_selftests.h | 22 +
> > > > > .../drm/selftests/test-drm_damage_helper.c| 844
> > > > ++
> > > > > 3 files changed, 868 insertions(+), 1 deletion(-)
> > > > > create mode 100644
> > > > drivers/gpu/drm/selftests/drm_damage_helper_selftests.h
> > > > > create mode 100644 drivers/gpu/drm/selftests/test-
> > > > drm_damage_helper.c
> > > > >
> > > > > diff --git a/drivers/gpu/drm/selftests/Makefile
> > > > b/drivers/gpu/drm/selftests/Makefile
> > > > > index 9fc349fa18e9..88ac216f5962 100644
> > > > > --- a/drivers/gpu/drm/selftests/Makefile
> > > > > +++ b/drivers/gpu/drm/selftests/Makefile
> > > > > @@ -1 +1,2 @@
> > > > > -obj-$(CONFIG_DRM_DEBUG_SELFTEST) += test-drm_mm.o test-
> drm-
> > > > helper.o
> > > > > +obj-$(CONFIG_DRM_DEBUG_SELFTEST) += test-drm_mm.o test-
> drm-
> > > > helper.o \
> > > > > + test-drm_damage_helper.o
> > > >
> > > > With the testcase intagrated into the test-drm-helper.ko module, for
> > > > patches 1-4 in this series:
> > > >
> > > > Reviewed-by: Daniel Vetter
> > > >
> > > > Obviously needs some adjusting on the igt side too, since we seem to
> be
> > > > missing the igt scaffolding for tests-drm-helper.ko.
> > > > -Daniel
> > >
> > > Hi Daniel,
> > >
> > > Thanks for the review. I am a little confused here. Should we have single
> > > kernel module for drm plane helper selftest and damage helper selftest?
> > > Also shall I rename the kernel selfttest to kms_*?
> > >
> > > For user-space igt test it should be it makes sense to rename to
> kms_selftets?
> >
> > Since I went back on this way too many times:
> > - igt should be called kms_selftest. Please work together with igt
> > maintainers (Arek and Petri), since we also need to update the CI
> > building infrastructure to make sure it updates the list of subtests
> > implemented by the kernel.
> >
> > - Kernel module I'd call test-drm_modeset.ko. That kernel module can then
> > include the existing test-drm-helper.c (could probably rename to
> > test-drm_plane_helper.c for clarity) and your new damage helper (named
> > test-drm_damage_helper.c for consistency).
> >
> > Does that make sense to everyone?
>
> I was trying to add some selftests, as well here [1], with that in
> mind, I think it makes sense to have just one module, call it
> "test-drm_modeset" or whatever and separate the tests source code base
> on whatever core functionality they are testing.
>
> Besides compiling everything together, probably some stuff will have
> to move out of test-drm-helper.c into some common header. For example
> this "FAIL/FAIL_ON" macros
>
Hi,
Thanks for your input. I have similar change in mind after suggestion from
Daniel. Below is initial draft I did yesterday, will move common code to
a common header.
I hope this aligns with what you are doing.
---
drivers/gpu/drm/selftests/Makefile| 4 ++-
.../gpu/drm/selftests/drm_helper_selftests.c | 27 +++
.../gpu/drm/selftests/drm_helper_selftests.h | 15 +--
...-helper.c => drm_plane_helper_selftests.c} | 16 ---
.../selftests/drm_plane_helper_selftests.h| 9 +++
5 files changed, 51 insertions(+), 20 deletions(-)
create mode 100644 drivers/gpu/drm/selftests/drm_helper_selftests.c
rename drivers/gpu/drm/selftests/{test-drm-helper.c =>
drm_plane_helper_selftests.c} (96%)
create mode 100644 drivers/gpu/drm/selftests/drm_plane_helper_selftests.h
diff --git a/drivers/gpu/drm/selftests/Makefile
b/drivers/gpu/drm/selftests/Makefile
index 9fc349fa18e9..560117d64658 100644
--- a/drivers/gpu/drm/selftests/Makefile
+++ b/drivers/gpu/drm/selftests/Makefile
@@ -1 +1,3 @@
-obj-$(CONFIG_DRM_DEBUG_SELFTEST) += test-drm_mm.o test-drm-helper.o
+test-drm_helper-y := drm_helper_selftests.o drm_plane_helper_selftests.o
+
+obj-$(CONFIG_DRM_DEBUG_SELFTEST) += test-drm_mm.o test-drm_helper.o
diff --git a/drivers/gpu/drm/selftests/drm_helper_selftests.c
b/drivers/gpu/drm/selftests/drm_helper_selftests.c
new file mode 100644
index ..873db462fa35
--- /dev/null
+++ b/drivers/gpu/drm/selftests/drm_helper_selftests.c
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Test cases for the drm_kms_helper functions
+ */
+
+#include
+
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/icl: dsi enabling (rev2)
== Series Details == Series: drm/i915/icl: dsi enabling (rev2) URL : https://patchwork.freedesktop.org/series/51011/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4987_full -> Patchwork_10473_full = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10473_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10473_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10473_full: === IGT changes === Possible regressions igt@kms_color@pipe-a-ctm-green-to-red: shard-skl: PASS -> FAIL Warnings igt@pm_rc6_residency@rc6-accuracy: shard-kbl: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_10473_full that come from known issues: === IGT changes === Issues hit igt@debugfs_test@read_all_entries_display_off: shard-skl: PASS -> INCOMPLETE (fdo#104108) igt@kms_busy@extended-modeset-hang-newfb-render-a: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: shard-hsw: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-pageflip-hang-newfb-render-a: shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) +3 igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: shard-snb: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: shard-kbl: PASS -> DMESG-WARN (fdo#107956) igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic: shard-glk: NOTRUN -> FAIL (fdo#106509, fdo#105454) igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-xtiled: shard-skl: PASS -> FAIL (fdo#103184) igt@kms_fbcon_fbt@fbc-suspend: shard-apl: PASS -> INCOMPLETE (fdo#103927) +1 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: shard-apl: PASS -> FAIL (fdo#103167) +1 igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-gtt: shard-glk: NOTRUN -> FAIL (fdo#103167) +1 igt@kms_plane@pixel-format-pipe-a-planes: shard-glk: NOTRUN -> FAIL (fdo#103166) igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb: shard-glk: NOTRUN -> FAIL (fdo#108145) +2 igt@kms_plane_multiple@atomic-pipe-a-tiling-x: shard-apl: PASS -> FAIL (fdo#103166) igt@pm_rpm@debugfs-read: shard-skl: PASS -> INCOMPLETE (fdo#107807) Possible fixes igt@kms_chv_cursor_fail@pipe-a-256x256-bottom-edge: shard-skl: FAIL (fdo#104671) -> PASS +1 igt@kms_cursor_crc@cursor-128x128-suspend: shard-apl: FAIL (fdo#103191, fdo#103232) -> PASS igt@kms_cursor_crc@cursor-size-change: shard-glk: FAIL (fdo#103232) -> PASS +1 igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-cpu: shard-glk: FAIL (fdo#103167) -> PASS igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-render: shard-skl: FAIL (fdo#105682) -> PASS igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt: shard-skl: FAIL (fdo#103167) -> PASS +2 igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: shard-apl: DMESG-WARN (fdo#105602, fdo#103558) -> PASS +1 igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: shard-apl: FAIL (fdo#103166) -> PASS igt@kms_setmode@basic: shard-apl: FAIL (fdo#99912) -> PASS fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108 fdo#104671 https://bugs.freedesktop.org/show_bug.cgi?id=104671 fdo#105454 https://bugs.freedesktop.org/show_bug.cgi?id=105454 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#105682 https://bugs.freedesktop.org/show_bug.cgi?id=105682 fdo#106509 https://bugs.freedesktop.org/show_bug.cgi?id=106509 fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
Re: [Intel-gfx] [PATCH v2] drm/i915/icl: Introduce new macros to get combophy registers
On Mon, Oct 15, 2018 at 07:35:17PM -0700, Lucas De Marchi wrote:
> combo-phy register instances are at same offset from base for each
> combo-phy port, i.e.
>
> Port A base offset: 0x16200
> Port B base offset: 0x6C000
>
> All the other addresses for both ports can be derived by calculating
> offset to these base addresses.
>
> PORT_CL_DW_OFFSET 0x0
> PORT_CL_DW 0 + x * 4
>
> PORT_COMP_OFFSET 0x100
> PORT_COMP_DW 0x100 + x * 4
>
> PORT_PCS_AUX_OFFSET 0x300
> PORT_PCS_GRP_OFFSET 0x600
> PORT_PCS_LN_OFFSET 0x800 + y * 0x100
>
> PORT_TX_AUX_OFFSET 0x380
> PORT_TX_GRP_OFFSET 0x680
> PORT_TX_LN_OFFSET0x880 + y * 0x100
>
> And inside each PORT_TX_[AUX|GRP|LN] we add `dw * 4`.
>
> Based on original patch by Mahesh Kumar .
>
> v2: make port, dw and ln arguments follow the order in
> register's name
>
> Signed-off-by: Lucas De Marchi
> Signed-off-by: Mahesh Kumar
> Cc: Rodrigo Vivi
> Reviewed-by: Rodrigo Vivi
Series pushed to dinq. Thanks
> ---
> drivers/gpu/drm/i915/i915_reg.h | 163
> 1 file changed, 59 insertions(+), 104 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 1fe81dd76734..590574e1ffa7 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1658,20 +1658,21 @@ enum i915_power_well_id {
> /*
> * CNL/ICL Port/COMBO-PHY Registers
> */
> +#define _ICL_COMBOPHY_A 0x162000
> +#define _ICL_COMBOPHY_B 0x6C000
> +#define _ICL_COMBOPHY(port) _PICK(port, _ICL_COMBOPHY_A, \
> + _ICL_COMBOPHY_B)
> +
> /* CNL/ICL Port CL_DW registers */
> -#define CNL_PORT_CL1CM_DW5 _MMIO(0x162014)
> -#define _ICL_PORT_CL_DW5_A 0x162014
> -#define _ICL_PORT_CL_DW5_B 0x6C014
> -#define ICL_PORT_CL_DW5(port)_MMIO_PORT(port, _ICL_PORT_CL_DW5_A, \
> - _ICL_PORT_CL_DW5_B)
> +#define _ICL_PORT_CL_DW(dw, port)(_ICL_COMBOPHY(port) + \
> + 4 * (dw))
> +
> +#define CNL_PORT_CL1CM_DW5 _MMIO(0x162014)
> +#define ICL_PORT_CL_DW5(port)_MMIO(_ICL_PORT_CL_DW(5, port))
> #define CL_POWER_DOWN_ENABLE (1 << 4)
> #define SUS_CLOCK_CONFIG (3 << 0)
>
> -#define _CNL_PORT_CL_DW10_A 0x162028
> -#define _ICL_PORT_CL_DW10_B 0x6c028
> -#define ICL_PORT_CL_DW10(port) _MMIO_PORT(port,\
> -_CNL_PORT_CL_DW10_A, \
> -_ICL_PORT_CL_DW10_B)
> +#define ICL_PORT_CL_DW10(port) _MMIO(_ICL_PORT_CL_DW(10, port))
> #define PG_SEQ_DELAY_OVERRIDE_MASK (3 << 25)
> #define PG_SEQ_DELAY_OVERRIDE_SHIFT 25
> #define PG_SEQ_DELAY_OVERRIDE_ENABLE(1 << 24)
> @@ -1687,31 +1688,23 @@ enum i915_power_well_id {
> #define PWR_DOWN_LN_MASK(0xf << 4)
> #define PWR_DOWN_LN_SHIFT 4
>
> -#define _ICL_PORT_CL_DW12_A 0x162030
> -#define _ICL_PORT_CL_DW12_B 0x6C030
> +#define ICL_PORT_CL_DW12(port) _MMIO(_ICL_PORT_CL_DW(12, port))
> #define ICL_LANE_ENABLE_AUX(1 << 0)
> -#define ICL_PORT_CL_DW12(port) _MMIO_PORT((port),
> \
> -_ICL_PORT_CL_DW12_A, \
> -_ICL_PORT_CL_DW12_B)
>
> /* CNL/ICL Port COMP_DW registers */
> +#define _ICL_PORT_COMP 0x100
> +#define _ICL_PORT_COMP_DW(dw, port) (_ICL_COMBOPHY(port) + \
> + _ICL_PORT_COMP + 4 * (dw))
> +
> #define CNL_PORT_COMP_DW0_MMIO(0x162100)
> -#define _ICL_PORT_COMP_DW0_A 0x162100
> -#define _ICL_PORT_COMP_DW0_B 0x6C100
> -#define ICL_PORT_COMP_DW0(port) _MMIO_PORT(port,
> _ICL_PORT_COMP_DW0_A, \
> - _ICL_PORT_COMP_DW0_B)
> +#define ICL_PORT_COMP_DW0(port) _MMIO(_ICL_PORT_COMP_DW(0,
> port))
> #define COMP_INIT (1 << 31)
>
> #define CNL_PORT_COMP_DW1_MMIO(0x162104)
> -#define _ICL_PORT_COMP_DW1_A 0x162104
> -#define _ICL_PORT_COMP_DW1_B 0x6C104
> -#define ICL_PORT_COMP_DW1(port) _MMIO_PORT(port,
> _ICL_PORT_COMP_DW1_A, \
> - _ICL_PORT_COMP_DW1_B)
> +#define ICL_PORT_COMP_DW1(port) _MMIO(_ICL_PORT_COMP_DW(1,
> port))
> +
> #define CNL_PORT_COMP_DW3_MMIO(0x16210c)
> -#define _ICL_PORT_COMP_DW3_A 0x16210C
> -#define _ICL_PORT_COMP_DW3_B 0x6C10C
> -#define ICL_PORT_COMP_DW3(port) _MMIO_PORT(port,
> _ICL_PORT_COMP_DW3_A, \
> - _ICL_PORT_COMP_DW3_B)
>
Re: [Intel-gfx] [PATCH v3 04/18] drm/selftest: Add drm damage helper selftest
> > > Obviously needs some adjusting on the igt side too, since we seem to be > > > missing the igt scaffolding for tests-drm-helper.ko. > > > -Daniel > > > > Hi Daniel, > > > > Thanks for the review. I am a little confused here. Should we have single > > kernel module for drm plane helper selftest and damage helper selftest? > > Also shall I rename the kernel selfttest to kms_*? > > > > For user-space igt test it should be it makes sense to rename to > kms_selftets? > > Since I went back on this way too many times: > - igt should be called kms_selftest. Please work together with igt > maintainers (Arek and Petri), since we also need to update the CI > building infrastructure to make sure it updates the list of subtests > implemented by the kernel. > > - Kernel module I'd call test-drm_modeset.ko. That kernel module can then > include the existing test-drm-helper.c (could probably rename to > test-drm_plane_helper.c for clarity) and your new damage helper (named > test-drm_damage_helper.c for consistency). > > Does that make sense to everyone? > Yes it makes sense to me and in fact I had similar changes in mind. And, since existing plane selftest are not invoked from igt it's safe to rename kernel module. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/gen9+: Fix initial readout for Y tiled framebuffers
If BIOS configured a Y tiled FB we failed to set up the backing object
tiling accordingly, leading to a lack of GT fence installed and a
garbled console.
The problem was bisected to
commit 011f22eb545a ("drm/i915: Do NOT skip the first 4k of stolen memory for
pre-allocated buffers v2")
but it just revealed a pre-existing issue.
Kudos to Ville who suspected a missing fence looking at the corruption
on the screen.
Cc: Ville Syrjälä
Cc: Mika Westerberg
Cc: Hans de Goede
Cc: ron...@innovation.ch
Cc:
Reported-by: Mika Westerberg
Reported-by: ron...@innovation.ch
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108264
Fixes: bc8d7dffacb1 ("drm/i915/skl: Provide a Skylake version of
get_plane_config()")
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_display.c | 25 +++--
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index a2e729fa8d64..3d34b98c4634 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2674,6 +2674,17 @@ intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
if (size_aligned * 2 > dev_priv->stolen_usable_size)
return false;
+ switch (fb->modifier) {
+ case DRM_FORMAT_MOD_LINEAR:
+ case I915_FORMAT_MOD_X_TILED:
+ case I915_FORMAT_MOD_Y_TILED:
+ break;
+ default:
+ DRM_DEBUG_DRIVER("Unsupported modifier for initial FB:
0x%llx\n",
+fb->modifier);
+ return false;
+ }
+
mutex_lock(>struct_mutex);
obj = i915_gem_object_create_stolen_for_preallocated(dev_priv,
base_aligned,
@@ -2683,8 +2694,17 @@ intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
if (!obj)
return false;
- if (plane_config->tiling == I915_TILING_X)
- obj->tiling_and_stride = fb->pitches[0] | I915_TILING_X;
+ switch (plane_config->tiling) {
+ case I915_TILING_NONE:
+ break;
+ case I915_TILING_X:
+ case I915_TILING_Y:
+ obj->tiling_and_stride = fb->pitches[0] | plane_config->tiling;
+ break;
+ default:
+ MISSING_CASE(plane_config->tiling);
+ return false;
+ }
mode_cmd.pixel_format = fb->format->format;
mode_cmd.width = fb->width;
@@ -8827,6 +8847,7 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc,
fb->modifier = I915_FORMAT_MOD_X_TILED;
break;
case PLANE_CTL_TILED_Y:
+ plane_config->tiling = I915_TILING_Y;
if (val & PLANE_CTL_RENDER_DECOMPRESSION_ENABLE)
fb->modifier = I915_FORMAT_MOD_Y_TILED_CCS;
else
--
2.13.2
___
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: rename and move intel_get_pipe_from_connector()
== Series Details == Series: drm/i915: rename and move intel_get_pipe_from_connector() URL : https://patchwork.freedesktop.org/series/51071/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4988 -> Patchwork_10475 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/51071/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10475 that come from known issues: === IGT changes === Issues hit igt@gem_exec_store@basic-vebox: fi-glk-j4005: PASS -> DMESG-WARN (fdo#105719) igt@kms_flip@basic-flip-vs-dpms: fi-hsw-4770r: PASS -> DMESG-WARN (fdo#105602) igt@kms_frontbuffer_tracking@basic: fi-hsw-peppy: PASS -> DMESG-WARN (fdo#102614) igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: fi-glk-j4005: PASS -> FAIL (fdo#106211) igt@pm_rpm@module-reload: fi-glk-j4005: PASS -> DMESG-WARN (fdo#107726) Possible fixes igt@drv_selftest@live_hangcheck: fi-icl-u2: INCOMPLETE (fdo#108315) -> PASS igt@kms_flip@basic-flip-vs-modeset: fi-glk-j4005: DMESG-WARN (fdo#106000) -> PASS +1 igt@kms_frontbuffer_tracking@basic: fi-byt-clapper: FAIL (fdo#103167) -> PASS igt@kms_setmode@basic-clone-single-crtc: fi-ilk-650: DMESG-WARN (fdo#106387) -> PASS fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#105719 https://bugs.freedesktop.org/show_bug.cgi?id=105719 fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000 fdo#106211 https://bugs.freedesktop.org/show_bug.cgi?id=106211 fdo#106387 https://bugs.freedesktop.org/show_bug.cgi?id=106387 fdo#107726 https://bugs.freedesktop.org/show_bug.cgi?id=107726 fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315 == Participating hosts (45 -> 43) == Additional (3): fi-byt-j1900 fi-icl-u fi-pnv-d510 Missing(5): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-snb-2520m == Build changes == * Linux: CI_DRM_4988 -> Patchwork_10475 CI_DRM_4988: b7cd53d7617dc3b3899f5c74a829c51f0fef6d18 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4680: 27fa97d16294af9c9c42fd81b030a73e4aa2e7c3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10475: bd522cdadae0511922cd2d8d0d83ac49f7695a0a @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == bd522cdadae0 drm/i915: rename and move intel_get_pipe_from_connector() == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10475/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] drm/i915: Ensure intel_engine_init_execlist() builds with Clang
Quoting Jani Nikula (2018-10-16 05:29:38) > Clang build with UBSAN enabled leads to the following build error: > > drivers/gpu/drm/i915/intel_engine_cs.o: In function > `intel_engine_init_execlist': > drivers/gpu/drm/i915/intel_engine_cs.c:411: undefined reference to > `__compiletime_assert_411' > > Again, for this to work the code would first need to be inlined and then > constant folded, which doesn't work for Clang because semantic analysis > happens before optimization/inlining. > > Use GEM_BUG_ON() instead of BUILD_BUG_ON(). > > v2: Use is_power_of_2() from log2.h (Chris) > > References: > 20181015203410.155997-1-swboyd@chromium.org">http://mid.mail-archive.com/20181015203410.155997-1-swboyd@chromium.org > Reported-by: Stephen Boyd Tested-by: Stephen Boyd ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: split out display quirks to a new file
== Series Details == Series: series starting with [1/2] drm/i915: split out display quirks to a new file URL : https://patchwork.freedesktop.org/series/51070/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4988 -> Patchwork_10474 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/51070/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10474 that come from known issues: === IGT changes === Issues hit igt@pm_rpm@basic-rte: fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000) Possible fixes igt@drv_selftest@live_hangcheck: fi-icl-u2: INCOMPLETE (fdo#108315) -> PASS igt@kms_flip@basic-flip-vs-modeset: fi-glk-j4005: DMESG-WARN (fdo#106000) -> PASS +1 igt@kms_frontbuffer_tracking@basic: fi-byt-clapper: FAIL (fdo#103167) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS igt@kms_setmode@basic-clone-single-crtc: fi-ilk-650: DMESG-WARN (fdo#106387) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000 fdo#106387 https://bugs.freedesktop.org/show_bug.cgi?id=106387 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315 == Participating hosts (45 -> 40) == Additional (4): fi-byt-j1900 fi-icl-u fi-gdg-551 fi-pnv-d510 Missing(9): fi-kbl-soraka fi-cnl-u fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-cfl-s3 fi-skl-6700hq fi-kbl-r == Build changes == * Linux: CI_DRM_4988 -> Patchwork_10474 CI_DRM_4988: b7cd53d7617dc3b3899f5c74a829c51f0fef6d18 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4680: 27fa97d16294af9c9c42fd81b030a73e4aa2e7c3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10474: 060721358ca165c2ddc541a60bc2a5adb4bae900 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 060721358ca1 drm/i915/quirks: pass dev_priv instead of drm dev to quirk code fab3a4d687b6 drm/i915: split out display quirks to a new file == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10474/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915: Ensure _print_param() builds with Clang
Quoting Jani Nikula (2018-10-16 13:29:37) > When building the kernel with Clang with defconfig and CONFIG_64BIT > disabled, vmlinux fails to link because of the BUILD_BUG in > _print_param. > > ld: drivers/gpu/drm/i915/i915_params.o: in function `i915_params_dump': > i915_params.c:(.text+0x56): undefined reference to > `__compiletime_assert_191' > > This function is semantically invalid unless the code is first inlined > then constant folded, which doesn't work for Clang because semantic > analysis happens before optimization/inlining. > > [The above written by Nathan Chancellor ] > > Use WARN_ONCE() instead of BUILD_BUG() to avoid the problem. The > WARN_ONCE() should get optimized away unless there's a type that's not > handled by _print_param(). > > References: https://github.com/ClangBuiltLinux/linux/issues/191 > References: > 20181009171401.14980-1-natechancellor@gmail.com">http://mid.mail-archive.com/20181009171401.14980-1-natechancellor@gmail.com > Cc: Nick Desaulniers > Cc: Nathan Chancellor > Cc: Chris Wilson > Reported-by: Nick Desaulniers > Reported-by: Nathan Chancellor > Signed-off-by: Jani Nikula Fair enough, Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] drm/i915: Ensure intel_engine_init_execlist() builds with Clang
Quoting Jani Nikula (2018-10-16 13:29:38) > Clang build with UBSAN enabled leads to the following build error: > > drivers/gpu/drm/i915/intel_engine_cs.o: In function > `intel_engine_init_execlist': > drivers/gpu/drm/i915/intel_engine_cs.c:411: undefined reference to > `__compiletime_assert_411' > > Again, for this to work the code would first need to be inlined and then > constant folded, which doesn't work for Clang because semantic analysis > happens before optimization/inlining. > > Use GEM_BUG_ON() instead of BUILD_BUG_ON(). > > v2: Use is_power_of_2() from log2.h (Chris) > > References: > 20181015203410.155997-1-swboyd@chromium.org">http://mid.mail-archive.com/20181015203410.155997-1-swboyd@chromium.org > Reported-by: Stephen Boyd > Cc: Stephen Boyd > Cc: Chris Wilson > Signed-off-by: Jani Nikula Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: rename and move intel_get_pipe_from_connector()
On Tue, Oct 16, 2018 at 05:50:44PM +0300, Jani Nikula wrote:
> Rename intel_get_pipe_from_connector() to intel_connector_get_pipe() and
> move it near its connector function friends in intel_connector.c. No
> functional changes.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/intel_connector.c | 12
> drivers/gpu/drm/i915/intel_display.c | 12
> drivers/gpu/drm/i915/intel_drv.h | 3 +--
> drivers/gpu/drm/i915/intel_panel.c | 2 +-
> 4 files changed, 14 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_connector.c
> b/drivers/gpu/drm/i915/intel_connector.c
> index 598d5cb9b657..18e370f607bc 100644
> --- a/drivers/gpu/drm/i915/intel_connector.c
> +++ b/drivers/gpu/drm/i915/intel_connector.c
> @@ -147,6 +147,18 @@ bool intel_connector_get_hw_state(struct intel_connector
> *connector)
> return encoder->get_hw_state(encoder, );
> }
>
> +enum pipe intel_connector_get_pipe(struct intel_connector *connector)
> +{
> + struct drm_device *dev = connector->base.dev;
> +
> + WARN_ON(!drm_modeset_is_locked(>mode_config.connection_mutex));
> +
> + if (!connector->base.state->crtc)
> + return INVALID_PIPE;
> +
> + return to_intel_crtc(connector->base.state->crtc)->pipe;
> +}
This thing is a bit racy when it comes to nonblocking modesets.
Perhaps we should track the pipe internally alongside
backight.enabled?
Anyways, patch seems ok so
Reviewed-by: Ville Syrjälä
> +
> /**
> * intel_connector_update_modes - update connector from edid
> * @connector: DRM connector device to use
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index a2e729fa8d64..cbcd0760ffbc 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -13900,18 +13900,6 @@ static int intel_crtc_init(struct drm_i915_private
> *dev_priv, enum pipe pipe)
> return ret;
> }
>
> -enum pipe intel_get_pipe_from_connector(struct intel_connector *connector)
> -{
> - struct drm_device *dev = connector->base.dev;
> -
> - WARN_ON(!drm_modeset_is_locked(>mode_config.connection_mutex));
> -
> - if (!connector->base.state->crtc)
> - return INVALID_PIPE;
> -
> - return to_intel_crtc(connector->base.state->crtc)->pipe;
> -}
> -
> int intel_get_pipe_from_crtc_id_ioctl(struct drm_device *dev, void *data,
> struct drm_file *file)
> {
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 7cc20e297eeb..5e63511a4ef8 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1534,8 +1534,6 @@ intel_encoder_current_mode(struct intel_encoder
> *encoder);
> bool intel_port_is_tc(struct drm_i915_private *dev_priv, enum port port);
> enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv,
> enum port port);
> -
> -enum pipe intel_get_pipe_from_connector(struct intel_connector *connector);
> int intel_get_pipe_from_crtc_id_ioctl(struct drm_device *dev, void *data,
> struct drm_file *file_priv);
> enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private
> *dev_priv,
> @@ -1694,6 +1692,7 @@ void intel_connector_unregister(struct drm_connector
> *connector);
> void intel_connector_attach_encoder(struct intel_connector *connector,
> struct intel_encoder *encoder);
> bool intel_connector_get_hw_state(struct intel_connector *connector);
> +enum pipe intel_connector_get_pipe(struct intel_connector *connector);
> int intel_connector_update_modes(struct drm_connector *connector,
>struct edid *edid);
> int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter
> *adapter);
> diff --git a/drivers/gpu/drm/i915/intel_panel.c
> b/drivers/gpu/drm/i915/intel_panel.c
> index 20582cfed491..ad88008f8dd0 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -505,7 +505,7 @@ static u32 _vlv_get_backlight(struct drm_i915_private
> *dev_priv, enum pipe pipe)
> static u32 vlv_get_backlight(struct intel_connector *connector)
> {
> struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> - enum pipe pipe = intel_get_pipe_from_connector(connector);
> + enum pipe pipe = intel_connector_get_pipe(connector);
>
> return _vlv_get_backlight(dev_priv, pipe);
> }
> --
> 2.11.0
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] drm/i915/quirks: pass dev_priv instead of drm dev to quirk code
Quoting Jani Nikula (2018-10-16 16:09:34) > On Tue, 16 Oct 2018, Chris Wilson wrote: > > Quoting Jani Nikula (2018-10-16 15:42:28) > >> Pass the type we want to simplify. No functional changes. > > > > But is there any reason to use dev_priv here? > > You mean as opposed to "i915"? I guess I can reroll with that if you > like. Aye, more s/dev_priv/i915/ and soon the tide will turn. Mwhahaha. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915: split out display quirks to a new file
On Tue, 16 Oct 2018, Chris Wilson wrote: > Quoting Jani Nikula (2018-10-16 15:42:27) >> Reduce intel_display.c by splitting out intel_quirks.c. No functional >> changes. >> >> Signed-off-by: Jani Nikula > > I was thinking intel_display_quirks, but it is dev_priv->quirks so that > seems over specific. Yeah, looks like you're even using dev_priv->quirks in gem code, although it's not being initialized by the code at hand. BR, Jani. > > Reviewed-by: Chris Wilson > -Chris -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] drm/i915: Ensure intel_engine_init_execlist() builds with Clang
On Tue, Oct 16, 2018 at 03:29:38PM +0300, Jani Nikula wrote: > Clang build with UBSAN enabled leads to the following build error: > > drivers/gpu/drm/i915/intel_engine_cs.o: In function > `intel_engine_init_execlist': > drivers/gpu/drm/i915/intel_engine_cs.c:411: undefined reference to > `__compiletime_assert_411' > > Again, for this to work the code would first need to be inlined and then > constant folded, which doesn't work for Clang because semantic analysis > happens before optimization/inlining. > > Use GEM_BUG_ON() instead of BUILD_BUG_ON(). > > v2: Use is_power_of_2() from log2.h (Chris) > > References: > 20181015203410.155997-1-swboyd@chromium.org">http://mid.mail-archive.com/20181015203410.155997-1-swboyd@chromium.org > Reported-by: Stephen Boyd > Cc: Stephen Boyd > Cc: Chris Wilson > Signed-off-by: Jani Nikula > --- Tested-by: Nathan Chancellor > drivers/gpu/drm/i915/intel_engine_cs.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c > b/drivers/gpu/drm/i915/intel_engine_cs.c > index f27dbe26bcc1..bc793b0c8806 100644 > --- a/drivers/gpu/drm/i915/intel_engine_cs.c > +++ b/drivers/gpu/drm/i915/intel_engine_cs.c > @@ -466,7 +466,7 @@ static void intel_engine_init_execlist(struct > intel_engine_cs *engine) > struct intel_engine_execlists * const execlists = >execlists; > > execlists->port_mask = 1; > - BUILD_BUG_ON_NOT_POWER_OF_2(execlists_num_ports(execlists)); > + GEM_BUG_ON(!is_power_of_2(execlists_num_ports(execlists))); > GEM_BUG_ON(execlists_num_ports(execlists) > EXECLIST_MAX_PORTS); > > execlists->queue_priority = INT_MIN; > -- > 2.11.0 > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915: Ensure _print_param() builds with Clang
On Tue, Oct 16, 2018 at 03:29:37PM +0300, Jani Nikula wrote: > When building the kernel with Clang with defconfig and CONFIG_64BIT > disabled, vmlinux fails to link because of the BUILD_BUG in > _print_param. > > ld: drivers/gpu/drm/i915/i915_params.o: in function `i915_params_dump': > i915_params.c:(.text+0x56): undefined reference to > `__compiletime_assert_191' > > This function is semantically invalid unless the code is first inlined > then constant folded, which doesn't work for Clang because semantic > analysis happens before optimization/inlining. > > [The above written by Nathan Chancellor ] > > Use WARN_ONCE() instead of BUILD_BUG() to avoid the problem. The > WARN_ONCE() should get optimized away unless there's a type that's not > handled by _print_param(). > > References: https://github.com/ClangBuiltLinux/linux/issues/191 > References: > 20181009171401.14980-1-natechancellor@gmail.com">http://mid.mail-archive.com/20181009171401.14980-1-natechancellor@gmail.com > Cc: Nick Desaulniers > Cc: Nathan Chancellor > Cc: Chris Wilson > Reported-by: Nick Desaulniers > Reported-by: Nathan Chancellor > Signed-off-by: Jani Nikula Tested-by: Nathan Chancellor Thanks for the quick turnaround and help getting this fixed, Jani! > --- > drivers/gpu/drm/i915/i915_params.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_params.c > b/drivers/gpu/drm/i915/i915_params.c > index bd6bd8879cab..8d71886b5f03 100644 > --- a/drivers/gpu/drm/i915/i915_params.c > +++ b/drivers/gpu/drm/i915/i915_params.c > @@ -184,7 +184,8 @@ static __always_inline void _print_param(struct > drm_printer *p, > else if (!__builtin_strcmp(type, "char *")) > drm_printf(p, "i915.%s=%s\n", name, *(const char **)x); > else > - BUILD_BUG(); > + WARN_ONCE(1, "no printer defined for param type %s (i915.%s)\n", > + type, name); > } > > /** > -- > 2.11.0 > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] drm/i915/quirks: pass dev_priv instead of drm dev to quirk code
On Tue, 16 Oct 2018, Chris Wilson wrote: > Quoting Jani Nikula (2018-10-16 15:42:28) >> Pass the type we want to simplify. No functional changes. > > But is there any reason to use dev_priv here? You mean as opposed to "i915"? I guess I can reroll with that if you like. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Use i915_gem_object_get_dma_address() to populate rotated vmas
From: Ville Syrjälä
Replace the kvmalloc_array() with i915_gem_object_get_dma_address() when
populating rotated vmas. One random access mechanism ought to be enough
for everyone?
To calculate the size of the radix tree I think we can do
something like this (assuming 64bit pointers):
num_pages = obj_size / 4096
tree_height = ceil(log64(num_pages))
num_nodes = sum(64^n, n, 0, tree_height-1)
tree_size = num_nodes * 576
If we compare that with the object size we should get a relative
overhead of around .2% to 1% for reasonable sized objects,
which framebuffers tend to be.
Cc: Chris Wilson
Cc: Tvrtko Ursulin
Suggested-by: Chris Wilson
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 31 ++---
1 file changed, 6 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 29ca9007a704..98d9a1eb1ed2 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -3637,7 +3637,7 @@ void i915_gem_restore_gtt_mappings(struct
drm_i915_private *dev_priv)
}
static struct scatterlist *
-rotate_pages(const dma_addr_t *in, unsigned int offset,
+rotate_pages(struct drm_i915_gem_object *obj, unsigned int offset,
unsigned int width, unsigned int height,
unsigned int stride,
struct sg_table *st, struct scatterlist *sg)
@@ -3646,7 +3646,7 @@ rotate_pages(const dma_addr_t *in, unsigned int offset,
unsigned int src_idx;
for (column = 0; column < width; column++) {
- src_idx = stride * (height - 1) + column;
+ src_idx = stride * (height - 1) + column + offset;
for (row = 0; row < height; row++) {
st->nents++;
/* We don't need the pages, but need to initialize
@@ -3654,7 +3654,8 @@ rotate_pages(const dma_addr_t *in, unsigned int offset,
* The only thing we need are DMA addresses.
*/
sg_set_page(sg, NULL, I915_GTT_PAGE_SIZE, 0);
- sg_dma_address(sg) = in[offset + src_idx];
+ sg_dma_address(sg) =
+ i915_gem_object_get_dma_address(obj, src_idx);
sg_dma_len(sg) = I915_GTT_PAGE_SIZE;
sg = sg_next(sg);
src_idx -= stride;
@@ -3668,22 +3669,11 @@ static noinline struct sg_table *
intel_rotate_pages(struct intel_rotation_info *rot_info,
struct drm_i915_gem_object *obj)
{
- const unsigned long n_pages = obj->base.size / I915_GTT_PAGE_SIZE;
unsigned int size = intel_rotation_info_size(rot_info);
- struct sgt_iter sgt_iter;
- dma_addr_t dma_addr;
- unsigned long i;
- dma_addr_t *page_addr_list;
struct sg_table *st;
struct scatterlist *sg;
int ret = -ENOMEM;
-
- /* Allocate a temporary list of source pages for random access. */
- page_addr_list = kvmalloc_array(n_pages,
- sizeof(dma_addr_t),
- GFP_KERNEL);
- if (!page_addr_list)
- return ERR_PTR(ret);
+ int i;
/* Allocate target SG list. */
st = kmalloc(sizeof(*st), GFP_KERNEL);
@@ -3694,29 +3684,20 @@ intel_rotate_pages(struct intel_rotation_info *rot_info,
if (ret)
goto err_sg_alloc;
- /* Populate source page list from the object. */
- i = 0;
- for_each_sgt_dma(dma_addr, sgt_iter, obj->mm.pages)
- page_addr_list[i++] = dma_addr;
-
- GEM_BUG_ON(i != n_pages);
st->nents = 0;
sg = st->sgl;
for (i = 0 ; i < ARRAY_SIZE(rot_info->plane); i++) {
- sg = rotate_pages(page_addr_list, rot_info->plane[i].offset,
+ sg = rotate_pages(obj, rot_info->plane[i].offset,
rot_info->plane[i].width,
rot_info->plane[i].height,
rot_info->plane[i].stride, st, sg);
}
- kvfree(page_addr_list);
-
return st;
err_sg_alloc:
kfree(st);
err_st_alloc:
- kvfree(page_addr_list);
DRM_DEBUG_DRIVER("Failed to create rotated mapping for object size %zu!
(%ux%u tiles, %u pages)\n",
obj->base.size, rot_info->plane[0].width,
rot_info->plane[0].height, size);
--
2.18.1
___
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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: split out display quirks to a new file
== Series Details == Series: series starting with [1/2] drm/i915: split out display quirks to a new file URL : https://patchwork.freedesktop.org/series/51070/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: split out display quirks to a new file +./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000 becomes 0) Commit: drm/i915/quirks: pass dev_priv instead of drm dev to quirk code Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: split out display quirks to a new file
== Series Details == Series: series starting with [1/2] drm/i915: split out display quirks to a new file URL : https://patchwork.freedesktop.org/series/51070/ State : warning == Summary == $ dim checkpatch origin/drm-tip fab3a4d687b6 drm/i915: split out display quirks to a new file -:225: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #225: new file mode 100644 -:245: WARNING:LINE_SPACING: Missing a blank line after declarations #245: FILE: drivers/gpu/drm/i915/intel_quirks.c:16: + struct drm_i915_private *dev_priv = to_i915(dev); + dev_priv->quirks |= QUIRK_LVDS_SSC_DISABLE; -:256: WARNING:LINE_SPACING: Missing a blank line after declarations #256: FILE: drivers/gpu/drm/i915/intel_quirks.c:27: + struct drm_i915_private *dev_priv = to_i915(dev); + dev_priv->quirks |= QUIRK_INVERT_BRIGHTNESS; -:264: WARNING:LINE_SPACING: Missing a blank line after declarations #264: FILE: drivers/gpu/drm/i915/intel_quirks.c:35: + struct drm_i915_private *dev_priv = to_i915(dev); + dev_priv->quirks |= QUIRK_BACKLIGHT_PRESENT; total: 0 errors, 4 warnings, 0 checks, 373 lines checked 060721358ca1 drm/i915/quirks: pass dev_priv instead of drm dev to quirk code ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
