Re: [Intel-gfx] [PATCH 2/2] drm/i915: Mark pinned shmemfs pages as unevictable
Quoting Chris Wilson (2018-10-16 19:31:06)
> Fwiw, the shmem_unlock_mapping() call feels quite expensive, almost
> nullifying the advantage gained from not walking the lists in reclaim.
> I'll have better numbers in a couple of days.
Using a test ("igt/benchmarks/gem_syslatency -t 120 -b -m" on kbl)
consisting of cycletest with a background load of trying to allocate +
populate 2MiB (to hit thp) while catting all files to /dev/null, the
result of using mapping_set_unevictable is mixed.
Each test run consists of running cycletest for 120s measuring the mean
and maximum wakeup latency and then repeating that 120 times.
x baseline-mean.txt # no i915 activity
+ tip-mean.txt # current stock i915 with a continuous load
++
| x + |
| x + |
|xx + |
|xx + |
|xx + |
|xx ++ |
|xx+++ |
|xx+++ |
|xx+++ |
|xx+++ |
|xx+++ |
|xx |
|xx + |
|xx ++ |
|xx ++ |
|xx ++ |
|xx ++ |
|xx ++ |
|xx +++ + |
|xx + |
|xx ++ |
|xx+++ + + |
|xx+++ + + + + + +++|
| A |
||__M_A_||
++
N Min MaxMedian AvgStddev
x 120 359.153 876.915 863.548 778.80319 186.15875
+ 120 2475.318 73172.303 7666.812 9579.4671 9552.865
Our target then is 863us, but currently i915 adds 7ms of uninterruptable
delay on hitting the shrinker.
x baseline-mean.txt
+ mapping-mean.txt # applying the mapping_set_evictable patch
* tip-mean.txt
++
| x * + |
| x * + |
|xx * + |
|xx * + |
|xx * + |
|xx ** + |
|xx*** ++|
|xx*** ++|
|xx*** ++|
|xx*** ++|
|xx*** ++|
|xx + ++|
|xx *+ ++++|
|xx **+ ++++|
|xx **+ ++ + ++|
|xx **+ ++ + ++|
|xx **+ ++ |
|xx **+ ++ |
|xx *** *+ |
|xx *+ +|
|xx **+ +|
|xx***+*+* |
|xx***+*+* * + * * ***|
| A
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add ppgtt to GVT GEM context
== Series Details == Series: drm/i915: Add ppgtt to GVT GEM context URL : https://patchwork.freedesktop.org/series/51156/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5000 -> Patchwork_10500 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/51156/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10500 that come from known issues: === IGT changes === Issues hit igt@kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence: fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362) +1 igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-cfl-8109u: PASS -> INCOMPLETE (fdo#108126, fdo#106070) fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#106070 https://bugs.freedesktop.org/show_bug.cgi?id=106070 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#108126 https://bugs.freedesktop.org/show_bug.cgi?id=108126 == Participating hosts (47 -> 39) == Missing(8): fi-kbl-soraka fi-ilk-m540 fi-icl-u fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-kbl-7560u == Build changes == * Linux: CI_DRM_5000 -> Patchwork_10500 CI_DRM_5000: b9543c130d4f6edd76ec98090c46044ba6d9493e @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10500: 5ad4fca13845ed1ad82ce75c7b9831f67ff210f5 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 5ad4fca13845 drm/i915: Add ppgtt to GVT GEM context == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10500/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add ppgtt to GVT GEM context
== Series Details ==
Series: drm/i915: Add ppgtt to GVT GEM context
URL : https://patchwork.freedesktop.org/series/51156/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5ad4fca13845 drm/i915: Add ppgtt to GVT GEM context
-:54: CHECK:BRACES: braces {} should be used on all arms of this statement
#54: FILE: drivers/gpu/drm/i915/gvt/scheduler.c:348:
+ if (mm->ppgtt_mm.root_entry_type == GTT_TYPE_PPGTT_ROOT_L4_ENTRY)
[...]
+ else {
[...]
-:56: CHECK:BRACES: Unbalanced braces around else statement
#56: FILE: drivers/gpu/drm/i915/gvt/scheduler.c:350:
+ else {
total: 0 errors, 0 warnings, 2 checks, 49 lines checked
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[Intel-gfx] [PATCH] drm/i915: Add ppgtt to GVT GEM context
Currently the guest couldn't boot up under GVT-g environment as the
following call trace exists:
[ 272.504762] BUG: unable to handle kernel NULL pointer dereference at
0100
[ 272.504834] Call Trace:
[ 272.504852] execlists_context_pin+0x2b2/0x520 [i915]
[ 272.504869] intel_gvt_scan_and_shadow_workload+0x50/0x4d0 [i915]
[ 272.504887] intel_vgpu_create_workload+0x3e2/0x570 [i915]
[ 272.504901] intel_vgpu_submit_execlist+0xc0/0x2a0 [i915]
[ 272.504916] elsp_mmio_write+0xc7/0x130 [i915]
[ 272.504930] intel_vgpu_mmio_reg_rw+0x24a/0x4c0 [i915]
[ 272.504944] intel_vgpu_emulate_mmio_write+0xac/0x240 [i915]
[ 272.504947] intel_vgpu_rw+0x22d/0x270 [kvmgt]
[ 272.504949] intel_vgpu_write+0x164/0x1f0 [kvmgt]
GVT GEM context is created by i915_gem_context_create_gvt() which
doesn't allocate ppgtt. So GVT GEM context structure doesn't have
a valid i915_hw_ppgtt.
This patch create ppgtt table at GVT GEM context creation, then assign
shadow ppgtt's root table address to this ppgtt when shadow ppgtt will
be used on GPU. So GVT GEM context has valid ppgtt address. But note
that this ppgtt only contain valid ppgtt root table address, the table
entry in this ppgtt structure are invalid.
Fixes:4a3d3f6785be("drm/i915: Match code to comment and enforce ppgtt for
execlists")
Signed-off-by: Xiong Zhang
Reviewed-by: Zhenyu Wang
---
drivers/gpu/drm/i915/gvt/scheduler.c| 29 +
drivers/gpu/drm/i915/i915_gem_context.c | 2 +-
2 files changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c
b/drivers/gpu/drm/i915/gvt/scheduler.c
index ea34003..b7e0529 100644
--- a/drivers/gpu/drm/i915/gvt/scheduler.c
+++ b/drivers/gpu/drm/i915/gvt/scheduler.c
@@ -334,6 +334,29 @@ static void release_shadow_wa_ctx(struct
intel_shadow_wa_ctx *wa_ctx)
i915_gem_object_put(wa_ctx->indirect_ctx.obj);
}
+static int set_context_ppgtt_from_shadow(struct intel_vgpu_workload *workload,
+struct i915_gem_context *ctx)
+{
+ struct intel_vgpu_mm *mm = workload->shadow_mm;
+ struct i915_hw_ppgtt *ppgtt = ctx->ppgtt;
+ int i = 0;
+
+ if (mm->type != INTEL_GVT_MM_PPGTT ||
+ !mm->ppgtt_mm.shadowed)
+ return -1;
+
+ if (mm->ppgtt_mm.root_entry_type == GTT_TYPE_PPGTT_ROOT_L4_ENTRY)
+ px_dma(&ppgtt->pml4) = mm->ppgtt_mm.shadow_pdps[0];
+ else {
+ for (i = 0; i < GVT_RING_CTX_NR_PDPS; i++) {
+ px_dma(ppgtt->pdp.page_directory[i]) =
+ mm->ppgtt_mm.shadow_pdps[i];
+ }
+ }
+
+ return 0;
+}
+
/**
* intel_gvt_scan_and_shadow_workload - audit the workload by scanning and
* shadow it as well, include ringbuffer,wa_ctx and ctx.
@@ -358,6 +381,12 @@ int intel_gvt_scan_and_shadow_workload(struct
intel_vgpu_workload *workload)
if (workload->req)
return 0;
+ ret = set_context_ppgtt_from_shadow(workload, shadow_ctx);
+ if (ret < 0) {
+ gvt_vgpu_err("workload shadow ppgtt isn't ready\n");
+ return ret;
+ }
+
/* pin shadow context by gvt even the shadow context will be pinned
* when i915 alloc request. That is because gvt will update the guest
* context from shadow context when workload is completed, and at that
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
index 8cbe580..b97963d 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -457,7 +457,7 @@ i915_gem_context_create_gvt(struct drm_device *dev)
if (ret)
return ERR_PTR(ret);
- ctx = __create_hw_context(to_i915(dev), NULL);
+ ctx = i915_gem_create_context(to_i915(dev), NULL);
if (IS_ERR(ctx))
goto out;
--
2.7.4
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[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/6] drm/i915/guc: drop negative doorbell alloc selftest
== Series Details == Series: series starting with [v2,1/6] drm/i915/guc: drop negative doorbell alloc selftest URL : https://patchwork.freedesktop.org/series/51153/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_5000 -> Patchwork_10499 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10499 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10499, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/51153/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10499: === IGT changes === Possible regressions igt@drv_selftest@live_execlists: fi-whl-u: PASS -> DMESG-WARN == Known issues == Here are the changes found in Patchwork_10499 that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_execlists: fi-apl-guc: PASS -> INCOMPLETE (fdo#106693) igt@kms_frontbuffer_tracking@basic: fi-hsw-peppy: PASS -> DMESG-WARN (fdo#102614) fi-icl-u2: PASS -> FAIL (fdo#103167) igt@pm_rpm@module-reload: fi-glk-j4005: PASS -> FAIL (fdo#108338) igt@prime_vgem@basic-fence-flip: fi-cfl-8700k: PASS -> FAIL (fdo#104008) Possible fixes igt@drv_selftest@live_guc: fi-apl-guc: DMESG-WARN (fdo#107258) -> SKIP igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b: fi-byt-clapper: FAIL (fdo#107362) -> PASS fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008 fdo#106693 https://bugs.freedesktop.org/show_bug.cgi?id=106693 fdo#107258 https://bugs.freedesktop.org/show_bug.cgi?id=107258 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#108338 https://bugs.freedesktop.org/show_bug.cgi?id=108338 == Participating hosts (47 -> 38) == Missing(9): fi-kbl-soraka fi-ilk-m540 fi-icl-u fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-pnv-d510 fi-kbl-7560u == Build changes == * Linux: CI_DRM_5000 -> Patchwork_10499 CI_DRM_5000: b9543c130d4f6edd76ec98090c46044ba6d9493e @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10499: c16382c643579a54b64aeb78ded9afd75c3a16a9 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == c16382c64357 HAX enable GuC for CI 5c042442b76f drm/i915/guc: fix comment about fallback to execlists 40055de181e2 drm/i915/guc: doorbell checking cleanup 7f1415dbb6bb drm/i915/guc: reserve the doorbell before selecting the cacheline 39bc0cc1f17e drm/i915/guc: rename __create/destroy_doorbell fa13f8331474 drm/i915/guc: drop negative doorbell alloc selftest == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10499/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/6] drm/i915/guc: drop negative doorbell alloc selftest
== Series Details ==
Series: series starting with [v2,1/6] drm/i915/guc: drop negative doorbell
alloc selftest
URL : https://patchwork.freedesktop.org/series/51153/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
fa13f8331474 drm/i915/guc: drop negative doorbell alloc selftest
39bc0cc1f17e drm/i915/guc: rename __create/destroy_doorbell
7f1415dbb6bb drm/i915/guc: reserve the doorbell before selecting the cacheline
40055de181e2 drm/i915/guc: doorbell checking cleanup
5c042442b76f drm/i915/guc: fix comment about fallback to execlists
-:6: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 121981fafe69 ("drm/i915/guc:
Combine enable_guc_loading|submission modparams")'
#6:
We stopped supporting fallback to execlists in commit 121981fafe69
total: 1 errors, 0 warnings, 0 checks, 10 lines checked
c16382c64357 HAX enable GuC for CI
-:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
total: 0 errors, 1 warnings, 0 checks, 8 lines checked
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Re: [Intel-gfx] [PATCH] drm/i915/icl: Fix signal_levels
On Wed, Oct 17, 2018 at 03:09:54PM -0700, Manasi Navare wrote:
> On Wed, Oct 17, 2018 at 02:56:52PM -0700, Rodrigo Vivi wrote:
> > Since when it was introduced we forgot to add
> > this case so ICL was using a wrong signal_levels
> > as reference.
> >
> > Fixes: fb5c8e9d4350 ("drm/i915/icl: Implement voltage swing programming
> > sequence for Combo PHY DDI")
> > Cc: José Roberto de Souza
> > Cc: Manasi Navare
> > Signed-off-by: Rodrigo Vivi
>
> yep this was missed indeed. The bxt_signal_levels() has a case for
> IS_ICELAKE() but
> that was never getting called. Thanks for fixing this.
>
> Reviewed-by: Manasi Navare
pushed to dinq, thanks
>
> Manasi
>
> > ---
> > drivers/gpu/drm/i915/intel_dp.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > b/drivers/gpu/drm/i915/intel_dp.c
> > index 1f098e509143..3384a9bbdafd 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -3790,7 +3790,7 @@ intel_dp_set_signal_levels(struct intel_dp *intel_dp)
> > uint32_t signal_levels, mask = 0;
> > uint8_t train_set = intel_dp->train_set[0];
> >
> > - if (IS_GEN9_LP(dev_priv) || IS_CANNONLAKE(dev_priv)) {
> > + if (IS_GEN9_LP(dev_priv) || INTEL_GEN(dev_priv) >= 10) {
> > signal_levels = bxt_signal_levels(intel_dp);
> > } else if (HAS_DDI(dev_priv)) {
> > signal_levels = ddi_signal_levels(intel_dp);
> > --
> > 2.19.1
> >
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[Intel-gfx] [PATCH v2 1/6] drm/i915/guc: drop negative doorbell alloc selftest
The test requires driver tweaks to avoid causing error messages
on intentionally-triggered errors and to stop accessing non
existing register. However, this is a pure GuC FW interface test
and should be covered by FW validation, so it isn't really worth
tweaking the driver for it and we're better off dropping it instead.
Testing the driver running out of doorbells is already covered by
igt_guc_doorbells
Suggested-by: Michal Wajdeczko
Cc: Michal Wajdeczko
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/selftests/intel_guc.c | 42 --
1 file changed, 42 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/intel_guc.c
b/drivers/gpu/drm/i915/selftests/intel_guc.c
index bf27162fb327..464f7d5defad 100644
--- a/drivers/gpu/drm/i915/selftests/intel_guc.c
+++ b/drivers/gpu/drm/i915/selftests/intel_guc.c
@@ -217,48 +217,6 @@ static int igt_guc_clients(void *args)
if (err)
goto out;
- /*
-* Negative test - a client with no doorbell (invalid db id).
-* After destroying the doorbell, the db id is changed to
-* GUC_DOORBELL_INVALID and the firmware will reject any attempt to
-* allocate a doorbell with an invalid id (db has to be reserved before
-* allocation).
-*/
- destroy_doorbell(guc->execbuf_client);
- if (client_doorbell_in_sync(guc->execbuf_client)) {
- pr_err("destroy db did not work\n");
- err = -EINVAL;
- goto out;
- }
-
- unreserve_doorbell(guc->execbuf_client);
-
- __create_doorbell(guc->execbuf_client);
- err = __guc_allocate_doorbell(guc, guc->execbuf_client->stage_id);
- if (err != -EIO) {
- pr_err("unexpected (err = %d)", err);
- goto out_db;
- }
-
- if (!available_dbs(guc, guc->execbuf_client->priority)) {
- pr_err("doorbell not available when it should\n");
- err = -EIO;
- goto out_db;
- }
-
-out_db:
- /* clean after test */
- __destroy_doorbell(guc->execbuf_client);
- err = reserve_doorbell(guc->execbuf_client);
- if (err) {
- pr_err("failed to reserve back the doorbell back\n");
- }
- err = create_doorbell(guc->execbuf_client);
- if (err) {
- pr_err("recreate doorbell failed\n");
- goto out;
- }
-
out:
/*
* Leave clean state for other test, plus the driver always destroy the
--
2.19.0
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[Intel-gfx] [PATCH v2 5/6] drm/i915/guc: fix comment about fallback to execlists
We stopped supporting fallback to execlists in commit 121981fafe69
(drm/i915/guc: Combine enable_guc_loading|submission modparams). We
do instead reset and retry in some cases, depending on the workarounds
required by the platform.
Cc: Michal Wajdeczko
Cc: Chris Wilson
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/intel_guc_fw.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c
b/drivers/gpu/drm/i915/intel_guc_fw.c
index a9e6fcce467c..e722bbc1fa1d 100644
--- a/drivers/gpu/drm/i915/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
@@ -217,8 +217,8 @@ static int guc_wait_ucode(struct intel_guc *guc)
* NB: Docs recommend not using the interrupt for completion.
* Measurements indicate this should take no more than 20ms, so a
* timeout here indicates that the GuC has failed and is unusable.
-* (Higher levels of the driver will attempt to fall back to
-* execlist mode if this happens.)
+* (Higher levels of the driver may decide to reset the GuC and
+* attempt the ucode load again if this happens.)
*/
ret = wait_for(guc_ready(guc, &status), 100);
DRM_DEBUG_DRIVER("GuC status %#x\n", status);
--
2.19.0
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[Intel-gfx] [PATCH v2 4/6] drm/i915/guc: doorbell checking cleanup
A collection of very small cleanups/improvements around doorbell checking
that do not deserve their own patch:
- Move doorbell-related HW defs to intel_guc_reg.h
- use GUC_NUM_DOORBELLS instead of GUC_DOORBELL_INVALID where
appropriate
- do not stop on error in guc_verify_doorbells
- do not print drbreg on error: the only content of the register
apart from the valid bit is the lower part of the physical memory
address, which we can't use even if valid because we don't know
which descriptor it came from (since the doorbell is in an unexpected
state)
- Move the checking of doorbell valid bit to a common helper.
v2: add more cleanups (move defs, use GUC_NUM_DOORBELLS, don't stop in
guc_verify_doorbells) (Michal)
Cc: Michal Wajdeczko
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/intel_guc_fwif.h | 6 ++---
drivers/gpu/drm/i915/intel_guc_reg.h| 4 +++
drivers/gpu/drm/i915/intel_guc_submission.c | 27 -
3 files changed, 22 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h
b/drivers/gpu/drm/i915/intel_guc_fwif.h
index d1bbaba6e012..427c621f3e72 100644
--- a/drivers/gpu/drm/i915/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
@@ -23,6 +23,8 @@
#ifndef _INTEL_GUC_FWIF_H
#define _INTEL_GUC_FWIF_H
+#include "intel_guc_reg.h"
+
#define GUC_CLIENT_PRIORITY_KMD_HIGH 0
#define GUC_CLIENT_PRIORITY_HIGH 1
#define GUC_CLIENT_PRIORITY_KMD_NORMAL 2
@@ -59,9 +61,6 @@
#define WQ_RING_TAIL_MAX 0x7FF /* 2^11 QWords */
#define WQ_RING_TAIL_MASK (WQ_RING_TAIL_MAX << WQ_RING_TAIL_SHIFT)
-#define GUC_DOORBELL_ENABLED 1
-#define GUC_DOORBELL_DISABLED 0
-
#define GUC_STAGE_DESC_ATTR_ACTIVE BIT(0)
#define GUC_STAGE_DESC_ATTR_PENDING_DB BIT(1)
#define GUC_STAGE_DESC_ATTR_KERNEL BIT(2)
@@ -233,7 +232,6 @@ union guc_doorbell_qw {
u64 value_qw;
} __packed;
-#define GUC_NUM_DOORBELLS 256
#define GUC_DOORBELL_INVALID (GUC_NUM_DOORBELLS)
#define GUC_DB_SIZE(PAGE_SIZE)
diff --git a/drivers/gpu/drm/i915/intel_guc_reg.h
b/drivers/gpu/drm/i915/intel_guc_reg.h
index d86084742a4a..f438ee81dd1e 100644
--- a/drivers/gpu/drm/i915/intel_guc_reg.h
+++ b/drivers/gpu/drm/i915/intel_guc_reg.h
@@ -104,6 +104,10 @@
#define GUC_SEND_INTERRUPT _MMIO(0xc4c8)
#define GUC_SEND_TRIGGER (1<<0)
+#define GUC_NUM_DOORBELLS 256
+#define GUC_DOORBELL_ENABLED 1
+#define GUC_DOORBELL_DISABLED 0
+
#define GEN8_DRBREGL(x)_MMIO(0x1000 + (x) * 8)
#define GEN8_DRB_VALID (1<<0)
#define GEN8_DRBREGU(x)_MMIO(0x1000 + (x) * 8 + 4)
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c
b/drivers/gpu/drm/i915/intel_guc_submission.c
index 8c3b5a9facee..b11d5eefcc88 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -192,6 +192,14 @@ static struct guc_doorbell_info *__get_doorbell(struct
intel_guc_client *client)
return client->vaddr + client->doorbell_offset;
}
+static bool __doorbell_valid(struct intel_guc *guc, u16 db_id)
+{
+ struct drm_i915_private *dev_priv = guc_to_i915(guc);
+
+ GEM_BUG_ON(db_id >= GUC_NUM_DOORBELLS);
+ return I915_READ(GEN8_DRBREGL(db_id)) & GEN8_DRB_VALID;
+}
+
static void __init_doorbell(struct intel_guc_client *client)
{
struct guc_doorbell_info *doorbell;
@@ -203,7 +211,6 @@ static void __init_doorbell(struct intel_guc_client *client)
static void __fini_doorbell(struct intel_guc_client *client)
{
- struct drm_i915_private *dev_priv = guc_to_i915(client->guc);
struct guc_doorbell_info *doorbell;
u16 db_id = client->doorbell_id;
@@ -214,7 +221,7 @@ static void __fini_doorbell(struct intel_guc_client *client)
* to go to zero after updating db_status before we call the GuC to
* release the doorbell
*/
- if (wait_for_us(!(I915_READ(GEN8_DRBREGL(db_id)) & GEN8_DRB_VALID), 10))
+ if (wait_for_us(!__doorbell_valid(client->guc, db_id), 10))
WARN_ONCE(true, "Doorbell never became invalid after
disable\n");
}
@@ -866,20 +873,17 @@ guc_reset_prepare(struct intel_engine_cs *engine)
/* Check that a doorbell register is in the expected state */
static bool doorbell_ok(struct intel_guc *guc, u16 db_id)
{
- struct drm_i915_private *dev_priv = guc_to_i915(guc);
- u32 drbregl;
bool valid;
- GEM_BUG_ON(db_id >= GUC_DOORBELL_INVALID);
+ GEM_BUG_ON(db_id >= GUC_NUM_DOORBELLS);
- drbregl = I915_READ(GEN8_DRBREGL(db_id));
- valid = drbregl & GEN8_DRB_VALID;
+ valid = __doorbell_valid(guc, db_id);
if (test_bit(db_id, guc->doorbell_bitmap) == valid)
return true;
- DRM_DEBUG_DRIVER("Doorbell %d has unexpected state (0x%x): valid=%s\n",
-
[Intel-gfx] [PATCH v2 2/6] drm/i915/guc: rename __create/destroy_doorbell
The 2 functions don't create or destroy anything, they just update the
doorbell state in memory. Use init and fini instead for clarity.
Cc: Michal Wajdeczko
Reviewed-by: Michal Wajdeczko
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/intel_guc_submission.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c
b/drivers/gpu/drm/i915/intel_guc_submission.c
index eae668442ebe..b089e5283307 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -192,7 +192,7 @@ static struct guc_doorbell_info *__get_doorbell(struct
intel_guc_client *client)
return client->vaddr + client->doorbell_offset;
}
-static void __create_doorbell(struct intel_guc_client *client)
+static void __init_doorbell(struct intel_guc_client *client)
{
struct guc_doorbell_info *doorbell;
@@ -201,7 +201,7 @@ static void __create_doorbell(struct intel_guc_client
*client)
doorbell->cookie = 0;
}
-static void __destroy_doorbell(struct intel_guc_client *client)
+static void __fini_doorbell(struct intel_guc_client *client)
{
struct drm_i915_private *dev_priv = guc_to_i915(client->guc);
struct guc_doorbell_info *doorbell;
@@ -226,11 +226,11 @@ static int create_doorbell(struct intel_guc_client
*client)
return -ENODEV; /* internal setup error, should never happen */
__update_doorbell_desc(client, client->doorbell_id);
- __create_doorbell(client);
+ __init_doorbell(client);
ret = __guc_allocate_doorbell(client->guc, client->stage_id);
if (ret) {
- __destroy_doorbell(client);
+ __fini_doorbell(client);
__update_doorbell_desc(client, GUC_DOORBELL_INVALID);
DRM_DEBUG_DRIVER("Couldn't create client %u doorbell: %d\n",
client->stage_id, ret);
@@ -246,7 +246,7 @@ static int destroy_doorbell(struct intel_guc_client *client)
GEM_BUG_ON(!has_doorbell(client));
- __destroy_doorbell(client);
+ __fini_doorbell(client);
ret = __guc_deallocate_doorbell(client->guc, client->stage_id);
if (ret)
DRM_ERROR("Couldn't destroy client %u doorbell: %d\n",
@@ -1087,7 +1087,7 @@ static void __guc_client_disable(struct intel_guc_client
*client)
if (intel_guc_is_alive(client->guc))
destroy_doorbell(client);
else
- __destroy_doorbell(client);
+ __fini_doorbell(client);
guc_stage_desc_fini(client);
guc_proc_desc_fini(client);
--
2.19.0
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[Intel-gfx] [PATCH v2 3/6] drm/i915/guc: reserve the doorbell before selecting the cacheline
Cacheline selection is only needed if we actually manage to reserve a
doorbell.
Cc: Michal Wajdeczko
Reviewed-by: Michal Wajdeczko
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/intel_guc_submission.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c
b/drivers/gpu/drm/i915/intel_guc_submission.c
index b089e5283307..8c3b5a9facee 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -955,6 +955,10 @@ guc_client_alloc(struct drm_i915_private *dev_priv,
}
client->vaddr = vaddr;
+ ret = reserve_doorbell(client);
+ if (ret)
+ goto err_vaddr;
+
client->doorbell_offset = __select_cacheline(guc);
/*
@@ -967,10 +971,6 @@ guc_client_alloc(struct drm_i915_private *dev_priv,
else
client->proc_desc_offset = (GUC_DB_SIZE / 2);
- ret = reserve_doorbell(client);
- if (ret)
- goto err_vaddr;
-
DRM_DEBUG_DRIVER("new priority %u client %p for engine(s) 0x%x:
stage_id %u\n",
priority, client, client->engines, client->stage_id);
DRM_DEBUG_DRIVER("doorbell id %u, cacheline offset 0x%lx\n",
--
2.19.0
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[Intel-gfx] [PATCH v2 6/6] HAX enable GuC for CI
From: Michal Wajdeczko Signed-off-by: Michal Wajdeczko --- drivers/gpu/drm/i915/i915_params.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 7e56c516c815..c681537bcb92 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b/drivers/gpu/drm/i915/i915_params.h @@ -45,7 +45,7 @@ struct drm_printer; param(int, disable_power_well, -1) \ param(int, enable_ips, 1) \ param(int, invert_brightness, 0) \ - param(int, enable_guc, 0) \ + param(int, enable_guc, -1) \ param(int, guc_log_level, -1) \ param(char *, guc_firmware_path, NULL) \ param(char *, huc_firmware_path, NULL) \ -- 2.19.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/icl: Fix signal_levels
== Series Details == Series: drm/i915/icl: Fix signal_levels URL : https://patchwork.freedesktop.org/series/51143/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5000_full -> Patchwork_10496_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_10496_full that come from known issues: === IGT changes === Issues hit igt@drv_suspend@shrink: shard-glk: PASS -> INCOMPLETE (fdo#103359, k.org#198133, fdo#106886) igt@gem_exec_await@wide-contexts: shard-apl: PASS -> FAIL (fdo#106680) igt@kms_busy@extended-modeset-hang-newfb-render-a: shard-hsw: PASS -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: shard-skl: PASS -> DMESG-WARN (fdo#107956) igt@kms_ccs@pipe-b-crc-sprite-planes-basic: shard-glk: PASS -> FAIL (fdo#108145) igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic: shard-glk: PASS -> FAIL (fdo#105454, fdo#106509) igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: shard-glk: PASS -> FAIL (fdo#105363) +1 igt@kms_flip@wf_vblank-ts-check: shard-hsw: PASS -> DMESG-WARN (fdo#102614) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: shard-glk: PASS -> FAIL (fdo#103167) igt@kms_plane_multiple@atomic-pipe-a-tiling-x: shard-apl: PASS -> FAIL (fdo#103166) +1 shard-glk: PASS -> FAIL (fdo#103166) igt@kms_setmode@basic: shard-hsw: PASS -> FAIL (fdo#99912) Possible fixes igt@drv_suspend@fence-restore-untiled: shard-kbl: INCOMPLETE (fdo#103665) -> PASS igt@gem_userptr_blits@readonly-unsync: shard-skl: INCOMPLETE (fdo#108074) -> PASS igt@kms_available_modes_crc@available_mode_test_crc: shard-apl: FAIL (fdo#106641) -> PASS igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c: shard-kbl: DMESG-WARN (fdo#107956) -> PASS igt@kms_flip@flip-vs-expired-vblank: shard-glk: FAIL (fdo#105363, fdo#102887) -> PASS igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-skl: FAIL (fdo#105363) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: shard-apl: FAIL (fdo#103167) -> PASS igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-render: shard-glk: DMESG-FAIL (fdo#106538) -> PASS igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-blt: shard-snb: INCOMPLETE (fdo#105411) -> SKIP igt@kms_plane@plane-position-covered-pipe-c-planes: shard-glk: FAIL (fdo#103166) -> PASS +1 igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: shard-apl: FAIL (fdo#103166) -> PASS +1 igt@kms_setmode@basic: shard-apl: FAIL (fdo#99912) -> PASS shard-kbl: FAIL (fdo#99912) -> PASS igt@kms_vblank@pipe-b-ts-continuation-idle-hang: shard-glk: DMESG-WARN (fdo#106538, fdo#105763) -> PASS +2 fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411 fdo#105454 https://bugs.freedesktop.org/show_bug.cgi?id=105454 fdo#105763 https://bugs.freedesktop.org/show_bug.cgi?id=105763 fdo#106509 https://bugs.freedesktop.org/show_bug.cgi?id=106509 fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538 fdo#106641 https://bugs.freedesktop.org/show_bug.cgi?id=106641 fdo#106680 https://bugs.freedesktop.org/show_bug.cgi?id=106680 fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#108074 https://bugs.freedesktop.org/show_bug.cgi?id=108074 fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133 == Participating hosts (6 -> 6) == No changes in participating hosts == Build changes == * Linux: CI_DRM_5000 -> Patchwork_10496 CI_DRM_5000: b9543c130d4f6edd76ec98090c46044ba6d9493e @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10496: ad59f668675c0e61dfd162d7d799be8eb5e154f3 @ git://anongit.freedesktop.org/gfx-ci/linux p
Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/guc: Limit number of scratch registers used for H2G
On 17/10/18 13:05, Michal Wajdeczko wrote:
We wrongly assumed that GuC is only using last scratch register
for G2H messages, but in fact it is also using register [14] to
report sleep state status. Remove that register from our H2G
send registers pool.
v2: No message from host to GuC uses more than 8 registers and
the GuC FW itself uses an 8-element array to store the H2G message,
so we may reduce our send array to just 8 registers (Daniele)
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Chris Wilson
---
drivers/gpu/drm/i915/intel_guc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 4c61eb9..390ae7e 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -50,7 +50,8 @@ void intel_guc_init_send_regs(struct intel_guc *guc)
unsigned int i;
guc->send_regs.base = i915_mmio_reg_offset(SOFT_SCRATCH(0));
- guc->send_regs.count = SOFT_SCRATCH_COUNT - 1;
+ guc->send_regs.count = 8;
+ GEM_BUG_ON(guc->send_regs.count > SOFT_SCRATCH_COUNT);
With the info about no command using more than 8 regs added to the code
as a comment:
Reviewed-by: Daniele Ceraolo Spurio
nitpick: if we add a define instead of using "8" directly we can ditch
the GEM_BUG_ON in favor of a BUILD_BUG_ON. If you do that, the comment
probably belongs with the define.
Thanks,
Daniele
for (i = 0; i < guc->send_regs.count; i++) {
fw_domains |= intel_uncore_forcewake_for_reg(dev_priv,
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Re: [Intel-gfx] [PATCH] drm/i915/guc: Propagate the fw xfer timeout
On Thu, 18 Oct 2018 01:09:19 +0200, Daniele Ceraolo Spurio
wrote:
On 17/10/18 13:29, Chris Wilson wrote:
Propagate the timeout on transferring the fw back to the caller where it
may act upon it, usually by restarting the xfer before failing.
Did you see any case where we failed the xfer and didn't get a timeout
out of guc_wait_ucode? that'd be quite weird
Anyway, definitely better and cleaner than before:
Reviewed-by: Daniele Ceraolo Spurio
small nitpick below
Testcase: igt/drv_selftest/live_hangcheck
Signed-off-by: Chris Wilson
Cc: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/intel_guc_fw.c | 23 ++-
1 file changed, 6 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c
b/drivers/gpu/drm/i915/intel_guc_fw.c
index a9e6fcce467c..b68a05892dab 100644
--- a/drivers/gpu/drm/i915/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
@@ -125,22 +125,17 @@ static void guc_prepare_xfer(struct intel_guc
*guc)
}
/* Copy RSA signature from the fw image to HW for verification */
-static int guc_xfer_rsa(struct intel_guc *guc, struct i915_vma *vma)
+static void guc_xfer_rsa(struct intel_guc *guc, struct i915_vma *vma)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
- struct intel_uc_fw *guc_fw = &guc->fw;
- struct sg_table *sg = vma->pages;
u32 rsa[UOS_RSA_SCRATCH_COUNT];
int i;
- if (sg_pcopy_to_buffer(sg->sgl, sg->nents, rsa, sizeof(rsa),
- guc_fw->rsa_offset) != sizeof(rsa))
- return -EINVAL;
+ sg_pcopy_to_buffer(vma->pages->sgl, vma->pages->nents,
+ rsa, sizeof(rsa), guc->fw.rsa_offset);
for (i = 0; i < UOS_RSA_SCRATCH_COUNT; i++)
I915_WRITE(UOS_RSA_SCRATCH(i), rsa[i]);
-
- return 0;
}
/*
@@ -251,17 +246,11 @@ static int guc_fw_xfer(struct intel_uc_fw
*guc_fw, struct i915_vma *vma)
* by the DMA engine in one operation, whereas the RSA signature is
* loaded via MMIO.
*/
- ret = guc_xfer_rsa(guc, vma);
- if (ret)
- DRM_WARN("GuC firmware signature xfer error %d\n", ret);
+ guc_xfer_rsa(guc, vma);
ret = guc_xfer_ucode(guc, vma);
- if (ret)
- DRM_WARN("GuC firmware code xfer error %d\n", ret);
-
- ret = guc_wait_ucode(guc);
- if (ret)
- DRM_ERROR("GuC firmware xfer error %d\n", ret);
With the logs gone we don't have any more error message to understand
where exactly we hit issue (xfer vs wait_ucode). We do have debug logs
printing the status that would give the info, but might be worth
retaining at least 1 error-level log.
+1 for leaving error-level logs (here or at helper functions)
also, please let CI re-run this patch with GuC enabled ;)
Michal
Daniele
+ if (ret == 0)
+ ret = guc_wait_ucode(guc);
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/hdmi: Detect HDMI 2.0 monitors using multiple EDID capabilities
== Series Details ==
Series: drm/i915/hdmi: Detect HDMI 2.0 monitors using multiple EDID capabilities
URL : https://patchwork.freedesktop.org/series/51150/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M] drivers/gpu/drm/i915/intel_hdmi.o
drivers/gpu/drm/i915/intel_hdmi.c: In function ‘is_hdmi2’:
drivers/gpu/drm/i915/intel_hdmi.c:481:16: error: ‘const struct
intel_crtc_state’ has no member named ‘ycbcr420’
crtc_state->ycbcr420 || vdb_mode || cmdb_mode) {
^~
scripts/Makefile.build:305: recipe for target
'drivers/gpu/drm/i915/intel_hdmi.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_hdmi.o] Error 1
scripts/Makefile.build:546: recipe for target 'drivers/gpu/drm/i915' failed
make[3]: *** [drivers/gpu/drm/i915] Error 2
scripts/Makefile.build:546: recipe for target 'drivers/gpu/drm' failed
make[2]: *** [drivers/gpu/drm] Error 2
scripts/Makefile.build:546: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
Makefile:1052: recipe for target 'drivers' failed
make: *** [drivers] Error 2
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[Intel-gfx] [PATCH] drm/i915/hdmi: Detect HDMI 2.0 monitors using multiple EDID capabilities
From: Clint Taylor
HDMI 2.0 monitors may not support SCDC and still be able to accept VICs
above 63. Use multiple EDID capbilities to determine if the SINK is
actually an HDMI 2.0 device. The QD980B HDMI 2.0 Analyzer generates unique
EDIDs during CTS tests that don't contain a HDMI Forum VSDB if the block is
not used during the test. The current HDMI AVI infoframe code only uses the
SCDC supported information in the HDMI Forum VSDB to determine if the sink
is HDMI 2.0. This patch adds checks for YCbCr420 Deep Color, YCbCR420 VDB,
YCBCR420 CMDB capabilities, and pipe is YCbCr420 to the existing SCDC
supported check to Infer SINK is HDMI 2.0.
HDMI 2.0 CTS HF1-51 test fails on the QD980B.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107894
Cc: Ville Syrjälä
Cc: Shashank Sharma
Signed-off-by: Clint Taylor
---
drivers/gpu/drm/i915/intel_hdmi.c | 32 +++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index 2c53efc..6913806 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -458,6 +458,34 @@ static void intel_write_infoframe(struct intel_encoder
*encoder,
frame->any.type, buffer, len);
}
+static bool is_hdmi2(const struct drm_connector *connector,
+ const struct intel_crtc_state *crtc_state)
+{
+ bool hdmi2 = false;
+ bool vdb_mode = false;
+ bool cmdb_mode = false;
+ int i = 0;
+
+ /* check VDB bits for HDMI 2.0 mode */
+ for (i = 0; i < BITS_TO_LONGS(128); i++)
+ if (connector->display_info.hdmi.y420_vdb_modes[i])
+ vdb_mode = true;
+
+ /* check CMDB bits for HDMI 2.0 mode */
+ for (i = 0; i < BITS_TO_LONGS(128); i++)
+ if (connector->display_info.hdmi.y420_cmdb_modes[i])
+ cmdb_mode = true;
+
+ if (connector->display_info.hdmi.scdc.supported ||
+ connector->display_info.hdmi.y420_dc_modes ||
+ crtc_state->ycbcr420 || vdb_mode || cmdb_mode) {
+ DRM_DEBUG_KMS("Inferred HDMI2 sink present\n");
+ hdmi2 = true;
+ }
+
+ return hdmi2;
+}
+
static void intel_hdmi_set_avi_infoframe(struct intel_encoder *encoder,
const struct intel_crtc_state
*crtc_state,
const struct drm_connector_state
*conn_state)
@@ -466,10 +494,12 @@ static void intel_hdmi_set_avi_infoframe(struct
intel_encoder *encoder,
const struct drm_display_mode *adjusted_mode =
&crtc_state->base.adjusted_mode;
struct drm_connector *connector = &intel_hdmi->attached_connector->base;
- bool is_hdmi2_sink = connector->display_info.hdmi.scdc.supported;
+ bool is_hdmi2_sink = false;
union hdmi_infoframe frame;
int ret;
+ is_hdmi2_sink = is_hdmi2(connector, crtc_state);
+
ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
adjusted_mode,
is_hdmi2_sink);
--
1.9.1
___
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Re: [Intel-gfx] [PATCH] drm/i915/guc: Propagate the fw xfer timeout
On 17/10/18 13:29, Chris Wilson wrote:
Propagate the timeout on transferring the fw back to the caller where it
may act upon it, usually by restarting the xfer before failing.
Did you see any case where we failed the xfer and didn't get a timeout
out of guc_wait_ucode? that'd be quite weird
Anyway, definitely better and cleaner than before:
Reviewed-by: Daniele Ceraolo Spurio
small nitpick below
Testcase: igt/drv_selftest/live_hangcheck
Signed-off-by: Chris Wilson
Cc: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/intel_guc_fw.c | 23 ++-
1 file changed, 6 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c
b/drivers/gpu/drm/i915/intel_guc_fw.c
index a9e6fcce467c..b68a05892dab 100644
--- a/drivers/gpu/drm/i915/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
@@ -125,22 +125,17 @@ static void guc_prepare_xfer(struct intel_guc *guc)
}
/* Copy RSA signature from the fw image to HW for verification */
-static int guc_xfer_rsa(struct intel_guc *guc, struct i915_vma *vma)
+static void guc_xfer_rsa(struct intel_guc *guc, struct i915_vma *vma)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
- struct intel_uc_fw *guc_fw = &guc->fw;
- struct sg_table *sg = vma->pages;
u32 rsa[UOS_RSA_SCRATCH_COUNT];
int i;
- if (sg_pcopy_to_buffer(sg->sgl, sg->nents, rsa, sizeof(rsa),
- guc_fw->rsa_offset) != sizeof(rsa))
- return -EINVAL;
+ sg_pcopy_to_buffer(vma->pages->sgl, vma->pages->nents,
+ rsa, sizeof(rsa), guc->fw.rsa_offset);
for (i = 0; i < UOS_RSA_SCRATCH_COUNT; i++)
I915_WRITE(UOS_RSA_SCRATCH(i), rsa[i]);
-
- return 0;
}
/*
@@ -251,17 +246,11 @@ static int guc_fw_xfer(struct intel_uc_fw *guc_fw, struct
i915_vma *vma)
* by the DMA engine in one operation, whereas the RSA signature is
* loaded via MMIO.
*/
- ret = guc_xfer_rsa(guc, vma);
- if (ret)
- DRM_WARN("GuC firmware signature xfer error %d\n", ret);
+ guc_xfer_rsa(guc, vma);
ret = guc_xfer_ucode(guc, vma);
- if (ret)
- DRM_WARN("GuC firmware code xfer error %d\n", ret);
-
- ret = guc_wait_ucode(guc);
- if (ret)
- DRM_ERROR("GuC firmware xfer error %d\n", ret);
With the logs gone we don't have any more error message to understand
where exactly we hit issue (xfer vs wait_ucode). We do have debug logs
printing the status that would give the info, but might be worth
retaining at least 1 error-level log.
Daniele
+ if (ret == 0)
+ ret = guc_wait_ucode(guc);
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/drm_vblank: Change EINVAL by the correct errno
== Series Details == Series: drm/drm_vblank: Change EINVAL by the correct errno URL : https://patchwork.freedesktop.org/series/51147/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_5000 -> Patchwork_10497 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10497 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10497, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/51147/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10497: === IGT changes === Possible regressions igt@kms_frontbuffer_tracking@basic: fi-skl-6700hq: PASS -> INCOMPLETE igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-apl-guc: PASS -> DMESG-WARN == Known issues == Here are the changes found in Patchwork_10497 that come from known issues: === IGT changes === Issues hit igt@drv_module_reload@basic-reload: fi-glk-j4005: PASS -> DMESG-WARN (fdo#106248, fdo#106725) igt@kms_flip@basic-flip-vs-modeset: fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000) igt@kms_pipe_crc_basic@hang-read-crc-pipe-b: fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362) igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: fi-glk-j4005: PASS -> DMESG-WARN (fdo#106238) igt@pm_rpm@module-reload: fi-glk-j4005: PASS -> FAIL (fdo#104767) Possible fixes igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b: fi-byt-clapper: FAIL (fdo#107362) -> PASS fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#104767 https://bugs.freedesktop.org/show_bug.cgi?id=104767 fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000 fdo#106238 https://bugs.freedesktop.org/show_bug.cgi?id=106238 fdo#106248 https://bugs.freedesktop.org/show_bug.cgi?id=106248 fdo#106725 https://bugs.freedesktop.org/show_bug.cgi?id=106725 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 == Participating hosts (47 -> 40) == Missing(7): fi-kbl-soraka fi-ilk-m540 fi-icl-u fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-kbl-7560u == Build changes == * Linux: CI_DRM_5000 -> Patchwork_10497 CI_DRM_5000: b9543c130d4f6edd76ec98090c46044ba6d9493e @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10497: f8c2d1bc25298648a77037bae78aa806676c1135 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == f8c2d1bc2529 drm/drm_vblank: Change EINVAL by the correct errno == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10497/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [FOR CI] drm/drm_vblank: Change EINVAL by the correct errno
For historical reason, the function drm_wait_vblank_ioctl always return -EINVAL if something gets wrong. This scenario limits the flexibility for the userspace make detailed verification of the problem and take some action. In particular, the validation of “if (!dev->irq_enabled)” in the drm_wait_vblank_ioctl is responsible for checking if the driver support vblank or not. If the driver does not support VBlank, the function drm_wait_vblank_ioctl returns EINVAL which does not represent the real issue; this patch changes this behavior by return EOPNOTSUPP. Additionally, some operations are unsupported by this function, and returns EINVAL; this patch also changes the return value to EOPNOTSUPP in this case. Lastly, the function drm_wait_vblank_ioctl is invoked by libdrm, which is used by many compositors; because of this, it is important to check if this change breaks any compositor. In this sense, the following projects were examined: * Drm-hwcomposer * Kwin * Sway * Wlroots * Wayland-core * Weston * Xorg (67 different drivers) For each repository the verification happened in three steps: * Update the main branch * Look for any occurrence "drmWaitVBlank" with the command: git grep -n "drmWaitVBlank" * Look in the git history of the project with the command: git log -SdrmWaitVBlank Finally, none of the above projects validate the use of EINVAL which make safe, at least for these projects, to change the return values. Change since V2: Daniel Vetter and Chris Wilson - Replace ENOTTY by EOPNOTSUPP - Return EINVAL if the parameters are wrong Signed-off-by: Rodrigo Siqueira --- drivers/gpu/drm/drm_vblank.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_vblank.c b/drivers/gpu/drm/drm_vblank.c index 98e091175921..80f5a3bb427e 100644 --- a/drivers/gpu/drm/drm_vblank.c +++ b/drivers/gpu/drm/drm_vblank.c @@ -1533,10 +1533,10 @@ int drm_wait_vblank_ioctl(struct drm_device *dev, void *data, unsigned int flags, pipe, high_pipe; if (!dev->irq_enabled) - return -EINVAL; + return -EOPNOTSUPP; if (vblwait->request.type & _DRM_VBLANK_SIGNAL) - return -EINVAL; + return -EOPNOTSUPP; if (vblwait->request.type & ~(_DRM_VBLANK_TYPES_MASK | _DRM_VBLANK_FLAGS_MASK | -- 2.19.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: Fix signal_levels
== Series Details == Series: drm/i915/icl: Fix signal_levels URL : https://patchwork.freedesktop.org/series/51143/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5000 -> Patchwork_10496 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/51143/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10496 that come from known issues: === IGT changes === Issues hit igt@drv_module_reload@basic-reload: fi-glk-j4005: PASS -> DMESG-WARN (fdo#106248, fdo#106725) igt@gem_exec_suspend@basic-s3: fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718) igt@kms_flip@basic-flip-vs-wf_vblank: fi-glk-j4005: PASS -> FAIL (fdo#100368) igt@prime_vgem@basic-fence-flip: fi-cfl-8700k: PASS -> FAIL (fdo#104008) Possible fixes igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b: fi-byt-clapper: FAIL (fdo#107362) -> PASS fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008 fdo#106248 https://bugs.freedesktop.org/show_bug.cgi?id=106248 fdo#106725 https://bugs.freedesktop.org/show_bug.cgi?id=106725 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 == Participating hosts (47 -> 40) == Missing(7): fi-kbl-soraka fi-ilk-m540 fi-icl-u fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-kbl-7560u == Build changes == * Linux: CI_DRM_5000 -> Patchwork_10496 CI_DRM_5000: b9543c130d4f6edd76ec98090c46044ba6d9493e @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10496: ad59f668675c0e61dfd162d7d799be8eb5e154f3 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == ad59f668675c drm/i915/icl: Fix signal_levels == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10496/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc: Propagate the fw xfer timeout
== Series Details == Series: drm/i915/guc: Propagate the fw xfer timeout URL : https://patchwork.freedesktop.org/series/51140/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5000_full -> Patchwork_10495_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_10495_full that come from known issues: === IGT changes === Issues hit igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing: shard-apl: PASS -> DMESG-WARN (fdo#105602, fdo#103558) +3 igt@kms_busy@extended-modeset-hang-newfb-render-a: shard-hsw: PASS -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: shard-skl: PASS -> DMESG-WARN (fdo#107956) igt@kms_ccs@pipe-a-crc-sprite-planes-basic: shard-skl: NOTRUN -> FAIL (fdo#107725, fdo#108145) igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic: shard-glk: PASS -> FAIL (fdo#105454, fdo#106509) igt@kms_fbcon_fbt@fbc-suspend: shard-kbl: PASS -> FAIL (fdo#103375, fdo#105682) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: shard-glk: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-render: shard-skl: NOTRUN -> FAIL (fdo#103167) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: shard-kbl: PASS -> FAIL (fdo#103375) igt@kms_plane_alpha_blend@pipe-b-alpha-transparant-fb: shard-skl: NOTRUN -> FAIL (fdo#108145) igt@kms_plane_multiple@atomic-pipe-a-tiling-x: shard-apl: PASS -> FAIL (fdo#103166) +2 igt@kms_plane_multiple@atomic-pipe-a-tiling-y: shard-glk: PASS -> FAIL (fdo#103166) +2 igt@kms_setmode@basic: shard-hsw: PASS -> FAIL (fdo#99912) igt@perf@polling: shard-hsw: PASS -> FAIL (fdo#102252) Possible fixes igt@drv_suspend@fence-restore-untiled: shard-kbl: INCOMPLETE (fdo#103665) -> PASS igt@gem_userptr_blits@readonly-unsync: shard-skl: INCOMPLETE (fdo#108074) -> PASS igt@kms_atomic_transition@1x-modeset-transitions-fencing: shard-skl: FAIL (fdo#108470) -> PASS igt@kms_available_modes_crc@available_mode_test_crc: shard-apl: FAIL (fdo#106641) -> PASS igt@kms_color@pipe-c-ctm-max: shard-skl: FAIL (fdo#108147) -> PASS igt@kms_cursor_crc@cursor-128x128-suspend: shard-apl: FAIL (fdo#103232, fdo#103191) -> PASS igt@kms_cursor_crc@cursor-64x64-suspend: shard-skl: INCOMPLETE (fdo#104108) -> PASS igt@kms_draw_crc@draw-method-xrgb-pwrite-untiled: shard-skl: FAIL (fdo#108472) -> PASS igt@kms_flip@flip-vs-expired-vblank: shard-glk: FAIL (fdo#102887, fdo#105363) -> PASS igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-skl: FAIL (fdo#105363) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: shard-apl: FAIL (fdo#103167) -> PASS igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-render: shard-glk: DMESG-FAIL (fdo#106538) -> PASS igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-gtt: shard-skl: FAIL (fdo#103167) -> PASS igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-blt: shard-snb: INCOMPLETE (fdo#105411) -> SKIP igt@kms_plane@plane-position-covered-pipe-c-planes: shard-glk: FAIL (fdo#103166) -> PASS +1 igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: shard-skl: FAIL (fdo#107815, fdo#108145) -> PASS igt@kms_plane_multiple@atomic-pipe-a-tiling-y: shard-apl: FAIL (fdo#103166) -> PASS igt@kms_setmode@basic: shard-kbl: FAIL (fdo#99912) -> PASS igt@kms_vblank@pipe-b-ts-continuation-idle-hang: shard-glk: DMESG-WARN (fdo#105763, fdo#106538) -> PASS +2 Warnings igt@kms_available_modes_crc@available_mode_test_crc: shard-glk: FAIL (fdo#106641) -> DMESG-FAIL (fdo#106538) fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375 fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108 fdo#105363 https://bugs
Re: [Intel-gfx] [PATCH v2 1/6] drm/i915/icl: Add WaEnable32PlaneMode
>-Original Message-
>From: Sripada, Radhakrishna
>Sent: Thursday, October 4, 2018 11:30 AM
>To: intel-gfx@lists.freedesktop.org
>Cc: Sripada, Radhakrishna ; Chris Wilson
>; Thierry, Michel ; Ausmus,
>James ; Srivatsa, Anusha
>
>Subject: [PATCH v2 1/6] drm/i915/icl: Add WaEnable32PlaneMode
>
>Gen11 Display suports 32 planes in total. Enable the new format in context
>status
>to be used and expanded to 32 planes.
>
>V2: Move the WA to display WA's(Chris)
>
>Cc: Chris Wilson
>Cc: Michel Thierry
>Cc: James Ausmus
>Cc: Anusha Srivatsa
>Signed-off-by: Radhakrishna Sripada
Reviewed-by: Anusha Srivatsa
>---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_pm.c | 4
> 2 files changed, 5 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>index a71c507cfb9b..4fb8e9eef312 100644
>--- a/drivers/gpu/drm/i915/i915_reg.h
>+++ b/drivers/gpu/drm/i915/i915_reg.h
>@@ -2573,6 +2573,7 @@ enum i915_power_well_id {
> /* chicken reg for WaConextSwitchWithConcurrentTLBInvalidate */ #define
>GEN9_CSFE_CHICKEN1_RCS _MMIO(0x20D4)
> #define GEN9_PREEMPT_GPGPU_SYNC_SWITCH_DISABLE (1 << 2)
>+#define GEN11_ENABLE_32_PLANE_MODE (1 << 7)
>
> /* WaClearTdlStateAckDirtyBits */
> #define GEN8_STATE_ACK_MMIO(0x20F0)
>diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>index 1392aa56a55a..d4a464246760 100644
>--- a/drivers/gpu/drm/i915/intel_pm.c
>+++ b/drivers/gpu/drm/i915/intel_pm.c
>@@ -8734,6 +8734,10 @@ static void icl_init_clock_gating(struct
>drm_i915_private *dev_priv)
> /* This is not an Wa. Enable to reduce Sampler power */
> I915_WRITE(GEN10_DFR_RATIO_EN_AND_CHICKEN,
> I915_READ(GEN10_DFR_RATIO_EN_AND_CHICKEN) &
>~DFR_DISABLE);
>+
>+ /* WaEnable32PlaneMode:icl */
>+ I915_WRITE(GEN9_CSFE_CHICKEN1_RCS,
>+ _MASKED_BIT_ENABLE(GEN11_ENABLE_32_PLANE_MODE));
> }
>
> static void cnp_init_clock_gating(struct drm_i915_private *dev_priv)
>--
>2.9.3
___
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Re: [Intel-gfx] [PATCH] drm/i915/icl: Fix signal_levels
On Wed, Oct 17, 2018 at 02:56:52PM -0700, Rodrigo Vivi wrote:
> Since when it was introduced we forgot to add
> this case so ICL was using a wrong signal_levels
> as reference.
>
> Fixes: fb5c8e9d4350 ("drm/i915/icl: Implement voltage swing programming
> sequence for Combo PHY DDI")
> Cc: José Roberto de Souza
> Cc: Manasi Navare
> Signed-off-by: Rodrigo Vivi
yep this was missed indeed. The bxt_signal_levels() has a case for IS_ICELAKE()
but
that was never getting called. Thanks for fixing this.
Reviewed-by: Manasi Navare
Manasi
> ---
> drivers/gpu/drm/i915/intel_dp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 1f098e509143..3384a9bbdafd 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3790,7 +3790,7 @@ intel_dp_set_signal_levels(struct intel_dp *intel_dp)
> uint32_t signal_levels, mask = 0;
> uint8_t train_set = intel_dp->train_set[0];
>
> - if (IS_GEN9_LP(dev_priv) || IS_CANNONLAKE(dev_priv)) {
> + if (IS_GEN9_LP(dev_priv) || INTEL_GEN(dev_priv) >= 10) {
> signal_levels = bxt_signal_levels(intel_dp);
> } else if (HAS_DDI(dev_priv)) {
> signal_levels = ddi_signal_levels(intel_dp);
> --
> 2.19.1
>
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[Intel-gfx] [PATCH] drm/i915/icl: Fix signal_levels
Since when it was introduced we forgot to add
this case so ICL was using a wrong signal_levels
as reference.
Fixes: fb5c8e9d4350 ("drm/i915/icl: Implement voltage swing programming
sequence for Combo PHY DDI")
Cc: José Roberto de Souza
Cc: Manasi Navare
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 1f098e509143..3384a9bbdafd 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3790,7 +3790,7 @@ intel_dp_set_signal_levels(struct intel_dp *intel_dp)
uint32_t signal_levels, mask = 0;
uint8_t train_set = intel_dp->train_set[0];
- if (IS_GEN9_LP(dev_priv) || IS_CANNONLAKE(dev_priv)) {
+ if (IS_GEN9_LP(dev_priv) || INTEL_GEN(dev_priv) >= 10) {
signal_levels = bxt_signal_levels(intel_dp);
} else if (HAS_DDI(dev_priv)) {
signal_levels = ddi_signal_levels(intel_dp);
--
2.19.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 2/6] drm/i915/icl: Implement Display WA_1405510057
>-Original Message- >From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of >Radhakrishna Sripada >Sent: Thursday, October 4, 2018 11:30 AM >To: intel-gfx@lists.freedesktop.org >Cc: Vivi, Rodrigo ; Zanoni, Paulo R > >Subject: [Intel-gfx] [PATCH v2 2/6] drm/i915/icl: Implement Display >WA_1405510057 > >Display WA_1405510057 asks to not enable YUV 420 HDMI 10bpc when >horizontal blank size mod 8 reminder is 2. > >Cc: James Ausmus >Cc: Paulo Zanoni >Cc: Rodrigo Vivi >Cc: Ville Syrjälä >Signed-off-by: Radhakrishna Sripada Reviewed-by: Anusha Srivatsa >--- > drivers/gpu/drm/i915/intel_hdmi.c | 10 +- > 1 file changed, 9 insertions(+), 1 deletion(-) > >diff --git a/drivers/gpu/drm/i915/intel_hdmi.c >b/drivers/gpu/drm/i915/intel_hdmi.c >index 454f570275e9..fa6b39420e69 100644 >--- a/drivers/gpu/drm/i915/intel_hdmi.c >+++ b/drivers/gpu/drm/i915/intel_hdmi.c >@@ -1592,6 +1592,8 @@ static bool hdmi_deep_color_possible(const struct >intel_crtc_state *crtc_state, > struct drm_atomic_state *state = crtc_state->base.state; > struct drm_connector_state *connector_state; > struct drm_connector *connector; >+ const struct drm_display_mode *adjusted_mode = >+ &crtc_state->base.adjusted_mode; > int i; > > if (HAS_GMCH_DISPLAY(dev_priv)) >@@ -1640,7 +1642,13 @@ static bool hdmi_deep_color_possible(const struct >intel_crtc_state *crtc_state, > > /* Display WA #1139: glk */ > if (bpc == 12 && IS_GLK_REVID(dev_priv, 0, GLK_REVID_A1) && >- crtc_state->base.adjusted_mode.htotal > 5460) >+ adjusted_mode->htotal > 5460) >+ return false; >+ >+ /* Display Wa_1405510057:icl */ >+ if (crtc_state->ycbcr420 && bpc == 10 && IS_ICELAKE(dev_priv) && >+ (adjusted_mode->crtc_hblank_end - >+ adjusted_mode->crtc_hblank_start) % 8 == 2) > return false; > > return true; >-- >2.9.3 > >___ >Intel-gfx mailing list >Intel-gfx@lists.freedesktop.org >https://lists.freedesktop.org/mailman/listinfo/intel-gfx ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/huc: Normalize HuC status returned by I915_PARAM_HAS_HUC (rev2)
== Series Details == Series: drm/i915/huc: Normalize HuC status returned by I915_PARAM_HAS_HUC (rev2) URL : https://patchwork.freedesktop.org/series/51060/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5000_full -> Patchwork_10493_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10493_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10493_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10493_full: === IGT changes === Warnings igt@perf_pmu@rc6: shard-kbl: PASS -> SKIP == Known issues == Here are the changes found in Patchwork_10493_full that come from known issues: === IGT changes === Issues hit igt@gem_ctx_isolation@vcs0-s3: shard-skl: PASS -> INCOMPLETE (fdo#107773, fdo#104108) igt@gem_linear_blits@interruptible: shard-apl: PASS -> INCOMPLETE (fdo#103927) igt@kms_busy@extended-modeset-hang-newfb-render-a: shard-hsw: PASS -> DMESG-WARN (fdo#107956) igt@kms_ccs@pipe-a-crc-sprite-planes-basic: shard-skl: NOTRUN -> FAIL (fdo#107725, fdo#108145) igt@kms_ccs@pipe-b-crc-sprite-planes-basic: shard-glk: PASS -> FAIL (fdo#108145) igt@kms_color@pipe-a-legacy-gamma: shard-apl: PASS -> FAIL (fdo#104782, fdo#108145) igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic: shard-glk: PASS -> FAIL (fdo#105454, fdo#106509) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt: shard-apl: PASS -> FAIL (fdo#103167) +1 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: shard-glk: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-render: shard-skl: NOTRUN -> FAIL (fdo#103167) igt@kms_plane_multiple@atomic-pipe-a-tiling-x: shard-glk: PASS -> FAIL (fdo#103166) +1 igt@kms_plane_multiple@atomic-pipe-c-tiling-y: shard-apl: PASS -> FAIL (fdo#103166) igt@kms_setmode@basic: shard-hsw: PASS -> FAIL (fdo#99912) Possible fixes igt@drv_suspend@fence-restore-untiled: shard-kbl: INCOMPLETE (fdo#103665) -> PASS igt@kms_atomic_transition@1x-modeset-transitions: shard-skl: FAIL (fdo#108470) -> PASS +1 igt@kms_available_modes_crc@available_mode_test_crc: shard-apl: FAIL (fdo#106641) -> PASS igt@kms_cursor_crc@cursor-128x128-suspend: shard-apl: FAIL (fdo#103232, fdo#103191) -> PASS igt@kms_draw_crc@draw-method-xrgb-pwrite-untiled: shard-skl: FAIL (fdo#108472) -> PASS igt@kms_flip@flip-vs-expired-vblank: shard-glk: FAIL (fdo#102887, fdo#105363) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: shard-apl: FAIL (fdo#103167) -> PASS igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu: shard-glk: FAIL (fdo#103167) -> PASS igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-render: shard-glk: DMESG-FAIL (fdo#106538) -> PASS igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite: shard-skl: FAIL (fdo#105682) -> PASS igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-gtt: shard-skl: FAIL (fdo#103167) -> PASS +2 igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-blt: shard-snb: INCOMPLETE (fdo#105411) -> SKIP igt@kms_plane@plane-position-covered-pipe-a-planes: shard-glk: FAIL (fdo#103166) -> PASS +2 igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: shard-skl: FAIL (fdo#107815, fdo#108145) -> PASS igt@kms_plane_multiple@atomic-pipe-a-tiling-y: shard-apl: FAIL (fdo#103166) -> PASS igt@kms_setmode@basic: shard-apl: FAIL (fdo#99912) -> PASS igt@kms_vblank@pipe-b-ts-continuation-idle-hang: shard-glk: DMESG-WARN (fdo#105763, fdo#106538) -> PASS +2 Warnings igt@kms_fbcon_fbt@psr-suspend: shard-skl: FAIL (fdo#107882) -> INCOMPLETE (fdo#107773, fdo#104108) fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#103927 htt
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Propagate the fw xfer timeout
== Series Details == Series: drm/i915/guc: Propagate the fw xfer timeout URL : https://patchwork.freedesktop.org/series/51140/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5000 -> Patchwork_10495 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/51140/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10495 that come from known issues: === IGT changes === Issues hit igt@kms_flip@basic-flip-vs-dpms: fi-skl-6700hq: PASS -> DMESG-WARN (fdo#105998) igt@kms_frontbuffer_tracking@basic: fi-icl-u2: PASS -> FAIL (fdo#103167) Possible fixes igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b: fi-byt-clapper: FAIL (fdo#107362) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 == Participating hosts (47 -> 38) == Missing(9): fi-kbl-soraka fi-ilk-m540 fi-icl-u fi-hsw-4200u fi-byt-j1900 fi-byt-squawks fi-bsw-cyan fi-pnv-d510 fi-kbl-7560u == Build changes == * Linux: CI_DRM_5000 -> Patchwork_10495 CI_DRM_5000: b9543c130d4f6edd76ec98090c46044ba6d9493e @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10495: c4abf98c4adb62eb18f400a2fb498477e6864af3 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == c4abf98c4adb drm/i915/guc: Propagate the fw xfer timeout == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10495/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/2] drm/i915/guc: Limit number of scratch registers used for H2G
== Series Details == Series: series starting with [v2,1/2] drm/i915/guc: Limit number of scratch registers used for H2G URL : https://patchwork.freedesktop.org/series/51137/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_5000 -> Patchwork_10494 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10494 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10494, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/51137/revisions/1/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10494: === IGT changes === Possible regressions igt@drv_selftest@live_guc: fi-kbl-7567u: PASS -> DMESG-WARN fi-skl-6600u: PASS -> DMESG-WARN fi-skl-gvtdvm: PASS -> DMESG-WARN fi-skl-iommu: PASS -> DMESG-WARN fi-skl-6260u: PASS -> DMESG-WARN fi-bxt-dsi: PASS -> DMESG-WARN fi-skl-6700k2: PASS -> DMESG-WARN fi-whl-u: PASS -> DMESG-WARN fi-skl-6770hq: PASS -> DMESG-WARN fi-kbl-8809g: PASS -> DMESG-WARN fi-kbl-x1275: PASS -> DMESG-WARN fi-bxt-j4205: PASS -> DMESG-WARN fi-skl-6700hq: PASS -> DMESG-WARN fi-cfl-8109u: PASS -> DMESG-WARN fi-kbl-7500u: PASS -> DMESG-WARN fi-cfl-8700k: PASS -> DMESG-WARN igt@drv_selftest@live_hangcheck: fi-kbl-r: PASS -> INCOMPLETE fi-cfl-s3: PASS -> INCOMPLETE == Known issues == Here are the changes found in Patchwork_10494 that come from known issues: === IGT changes === Issues hit igt@drv_module_reload@basic-reload: fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718) igt@kms_pipe_crc_basic@read-crc-pipe-a: fi-byt-clapper: PASS -> FAIL (fdo#107362) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-byt-clapper: PASS -> FAIL (fdo#107362, fdo#103191) Possible fixes igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b: fi-byt-clapper: FAIL (fdo#107362) -> PASS fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 == Participating hosts (47 -> 39) == Missing(8): fi-kbl-soraka fi-ilk-m540 fi-icl-u fi-hsw-4200u fi-byt-j1900 fi-byt-squawks fi-bsw-cyan fi-kbl-7560u == Build changes == * Linux: CI_DRM_5000 -> Patchwork_10494 CI_DRM_5000: b9543c130d4f6edd76ec98090c46044ba6d9493e @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10494: 4d93c7675bc7d5ba85123b68c00f253ec6aa133f @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 4d93c7675bc7 HAX: Enable GuC for CI 0a7c2abb67b7 drm/i915/guc: Limit number of scratch registers used for H2G == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10494/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RFC] GuC firmware versioning change
>-Original Message- >From: Mcgee, Jeff >Sent: Friday, October 12, 2018 2:33 PM >To: Vivi, Rodrigo >Cc: intel-gfx@lists.freedesktop.org; Srivatsa, Anusha >; Spotswood, John A >; joonas.lahti...@linux.intel.com >Subject: Re: [RFC] GuC firmware versioning change > >On Fri, Oct 12, 2018 at 01:51:46PM -0700, Rodrigo Vivi wrote: >> On Fri, Oct 12, 2018 at 01:24:30PM -0700, Jeff McGee wrote: >> > The GuC firmware team is proposing a change to the firmware versioning >scheme. >> > The goal is to more accurately track the firmware interface to help >> > users manage dependencies on that interface. The proposed scheme is >> > based on semver.org with some additions to handle branching. >> > >> > The proposed version number would have 4 fields: >BASE.MAJOR.MINOR.PATCH. >> > Contrast this with the 2 fields in the current version number: MAJOR.MINOR. >> > Side note, the current firmware encodes a BRANCH and CLIENT number >> > as well, but they have not been needed by i915. So a firmware >> > released with the proposed scheme would be named >> > _guc_ver___.bin >> > (ex: skl_guc_ver1_5_4_7.bin) instead of the current >> > _guc_ver_.bin (ex: skl_guc_ver9_33.bin). >> > >> > The BASE number is an ID that is used to identify a set of releases >> > in which the MAJOR.MINOR.PATCH semantics are consistent. In other >> > words, two releases from the same BASE can be compared via their >> > MAJOR.MINOR.PATCH to infer their relationship as described below. >> > Two releases from a different BASE cannot be reliably compared. The >> > BASE number facilitates arbitrary branching which can create >> > duplicate and/or disconnected MAJOR.MINOR.PATCH versions. This type >> > of branching is expected to be rare, and so BASE will rarely change. When a >new BASE is created, the MAJOR.MINOR.PATCH reset to starting values. >> >> Could you please clarify a bit what BASE means? >> What would be a different BASE? >> > >The BASE number supports general branching that would cause version number >conflicts. Branching for firmware releases is not desirable, but it is a >practical >reality. Therefore the versioning scheme must accomodate it. Let's say that a >high-priority request is made to put specific updates on an old release that >said >customer is locked on. Those updates could include any sort of change including >interface change. Then we have a sequence like below: > >v1.1.0.0 v1.1.0.1 v1.1.0.2 v1.1.0.3 v1.1.1.0 >O--O--O--O--O > \ >\ > \ > O--O > v2.1.1.0 v2.1.1.1 > >You can see that if we don't have a BASE number that changes from 1 to 2, then >we end up with duplicated v1.1.0 along the different branches which are not the >same. As I wrote, this should be a very rare scenario, but it can happen. Maybe >upstream will always be supplied with releases from the "main" BASE, and you >can ignore this field, but it needs to be there for other firmware >distributions. >-Jeff > >> > >> > The MAJOR number conforms to the major in semver.org. It increments >> > on a backwards incompatible change of the interface. It resets to 1 >> > on a change of BASE. The MAJOR number basically works the same >> > between the current and proposed versioning schemes. >> > >> > The MINOR number conforms to the minor in semver.org. It increments >> > on a backwards compatible change of the interface (new interfaces >> > that are optional to use). It will also increment on substantial new >> > internal functionality that doesn't affect the interface but should >> > be called out to the user. It resets to >> > 0 on a change of MAJOR. The MINOR number in the current versioning >> > scheme increments on any backwards compatible change. The proposed >> > versioning scheme breaks this into the MINOR number just described and the >PATCH number below. >> > >> > The PATCH number conforms to the patch in semver.org. It increments >> > on a backwards compatible internal change, usually a bug fix. It >> > resets to 0 on a change of MINOR. >> >> I like the idea of MAJOR.MINOR.PATCH following semver.org. >> >> I think if we remove the BASE out of picture and just use semver >> clear, but maybe it is just because I didn't quite understand BASE. >> >> > >> > The MAJOR.MINOR collectively define the interface version. Because >> > the MINOR may also increment on a substantial internal change, it >> > doesn't always mark an interface change, e.g. 4.5 and 4.6 may have >> > identical interfaces. But the determination of interface >> > compatibility is unchanged, e.g. 4.6 is always backwards compatible with >> > 4.5. >> > >> > Each MAJOR.MINOR may continue to receive internal fixes along a >> > branch even after the main branch for that BASE has moved on to another >MAJOR.MINOR. >> > Releases from these fix-only branches increment only the PATCH >> > number on that MAJOR.MINOR, and ther
Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/guc: fix GuC suspend/resume
Quoting Michal Wajdeczko (2018-10-17 17:40:50) > On Wed, 17 Oct 2018 00:46:47 +0200, Daniele Ceraolo Spurio > wrote: > > > The ENTER/EXIT_S_STATE actions queue the save/restore operation in GuC > > FW and then return, so waiting on the H2G is not enough to guarantee > > GuC is done. > > When all the processing is done, GuC writes 0 to scratch register 14, > > so we can poll on that. Note that GuC does not ensure that the value > > in the register is different from 0 while the action is in progress > > so we need to take care of that ourselves as well. > > > > v2: improve comment, return early on GuC error and improve error > > message (Michal) > > > > Cc: Chris Wilson > > Cc: Michal Wajdeczko > > Signed-off-by: Daniele Ceraolo Spurio > > Acked-by: Chris Wilson > > --- > > Reviewed-by: Michal Wajdeczko Applied, thanks for the fix and review. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/guc: Propagate the fw xfer timeout
Propagate the timeout on transferring the fw back to the caller where it
may act upon it, usually by restarting the xfer before failing.
Testcase: igt/drv_selftest/live_hangcheck
Signed-off-by: Chris Wilson
Cc: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/intel_guc_fw.c | 23 ++-
1 file changed, 6 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c
b/drivers/gpu/drm/i915/intel_guc_fw.c
index a9e6fcce467c..b68a05892dab 100644
--- a/drivers/gpu/drm/i915/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
@@ -125,22 +125,17 @@ static void guc_prepare_xfer(struct intel_guc *guc)
}
/* Copy RSA signature from the fw image to HW for verification */
-static int guc_xfer_rsa(struct intel_guc *guc, struct i915_vma *vma)
+static void guc_xfer_rsa(struct intel_guc *guc, struct i915_vma *vma)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
- struct intel_uc_fw *guc_fw = &guc->fw;
- struct sg_table *sg = vma->pages;
u32 rsa[UOS_RSA_SCRATCH_COUNT];
int i;
- if (sg_pcopy_to_buffer(sg->sgl, sg->nents, rsa, sizeof(rsa),
- guc_fw->rsa_offset) != sizeof(rsa))
- return -EINVAL;
+ sg_pcopy_to_buffer(vma->pages->sgl, vma->pages->nents,
+ rsa, sizeof(rsa), guc->fw.rsa_offset);
for (i = 0; i < UOS_RSA_SCRATCH_COUNT; i++)
I915_WRITE(UOS_RSA_SCRATCH(i), rsa[i]);
-
- return 0;
}
/*
@@ -251,17 +246,11 @@ static int guc_fw_xfer(struct intel_uc_fw *guc_fw, struct
i915_vma *vma)
* by the DMA engine in one operation, whereas the RSA signature is
* loaded via MMIO.
*/
- ret = guc_xfer_rsa(guc, vma);
- if (ret)
- DRM_WARN("GuC firmware signature xfer error %d\n", ret);
+ guc_xfer_rsa(guc, vma);
ret = guc_xfer_ucode(guc, vma);
- if (ret)
- DRM_WARN("GuC firmware code xfer error %d\n", ret);
-
- ret = guc_wait_ucode(guc);
- if (ret)
- DRM_ERROR("GuC firmware xfer error %d\n", ret);
+ if (ret == 0)
+ ret = guc_wait_ucode(guc);
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
--
2.19.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/huc: Normalize HuC status returned by I915_PARAM_HAS_HUC (rev2)
== Series Details == Series: drm/i915/huc: Normalize HuC status returned by I915_PARAM_HAS_HUC (rev2) URL : https://patchwork.freedesktop.org/series/51060/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5000 -> Patchwork_10493 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/51060/revisions/2/mbox/ == Known issues == Here are the changes found in Patchwork_10493 that come from known issues: === IGT changes === Possible fixes igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b: fi-byt-clapper: FAIL (fdo#107362) -> PASS fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 == Participating hosts (47 -> 41) == Missing(6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-u == Build changes == * Linux: CI_DRM_5000 -> Patchwork_10493 CI_DRM_5000: b9543c130d4f6edd76ec98090c46044ba6d9493e @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10493: 3d5d2a65a73d149fd04235fb8e89e6da32e834a3 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 3d5d2a65a73d drm/i915/huc: Normalize HuC status returned by I915_PARAM_HAS_HUC == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10493/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PULL] drm-misc-next-fixes
Hi Dave, Just one quirk this week, things are shaping up nicely for the upcoming merge window! drm-misc-next-fixes-2018-10-17: - Add quirk to fix orientation of Acer One 10 (S1003) panel (Hans) Cc: Hans de Goede Cheers, Sean The following changes since commit 7372fd049aa8836310f84da5f82dc9eb146915c8: MAINTAINERS: Add Maxime Ripard as drm-misc maintainer (2018-10-09 16:16:54 -0400) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-next-fixes-2018-10-17 for you to fetch changes up to 0e8afefd5da4875ddea9aa4ad17a2540a2bf9736: drm: panel-orientation-quirks: Add quirk for Acer One 10 (S1003) (2018-10-17 14:17:38 +0200) - Add quirk to fix orientation of Acer One 10 (S1003) panel (Hans) Cc: Hans de Goede Hans de Goede (1): drm: panel-orientation-quirks: Add quirk for Acer One 10 (S1003) drivers/gpu/drm/drm_panel_orientation_quirks.c | 14 +- 1 file changed, 13 insertions(+), 1 deletion(-) -- Sean Paul, Software Engineer, Google / Chromium OS ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 2/2] HAX: Enable GuC for CI
GuC is disabled by default. Enable it. Signed-off-by: Michal Wajdeczko --- drivers/gpu/drm/i915/i915_params.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 7e56c51..c681537 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b/drivers/gpu/drm/i915/i915_params.h @@ -45,7 +45,7 @@ param(int, disable_power_well, -1) \ param(int, enable_ips, 1) \ param(int, invert_brightness, 0) \ - param(int, enable_guc, 0) \ + param(int, enable_guc, -1) \ param(int, guc_log_level, -1) \ param(char *, guc_firmware_path, NULL) \ param(char *, huc_firmware_path, NULL) \ -- 1.9.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 1/2] drm/i915/guc: Limit number of scratch registers used for H2G
We wrongly assumed that GuC is only using last scratch register
for G2H messages, but in fact it is also using register [14] to
report sleep state status. Remove that register from our H2G
send registers pool.
v2: No message from host to GuC uses more than 8 registers and
the GuC FW itself uses an 8-element array to store the H2G message,
so we may reduce our send array to just 8 registers (Daniele)
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Chris Wilson
---
drivers/gpu/drm/i915/intel_guc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 4c61eb9..390ae7e 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -50,7 +50,8 @@ void intel_guc_init_send_regs(struct intel_guc *guc)
unsigned int i;
guc->send_regs.base = i915_mmio_reg_offset(SOFT_SCRATCH(0));
- guc->send_regs.count = SOFT_SCRATCH_COUNT - 1;
+ guc->send_regs.count = 8;
+ GEM_BUG_ON(guc->send_regs.count > SOFT_SCRATCH_COUNT);
for (i = 0; i < guc->send_regs.count; i++) {
fw_domains |= intel_uncore_forcewake_for_reg(dev_priv,
--
1.9.1
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[Intel-gfx] [PATCH v2] drm/i915/huc: Normalize HuC status returned by I915_PARAM_HAS_HUC
In response for I915_PARAM_HAS_HUC we are returning value that
indicates if HuC firmware was loaded and verified. However, our
previously used positive value was based on specific register bit
which is about to change on future platform. Let's normalize our
return values to 0 and 1 before clients will start to use Gen9 value.
v2: use bool for implicit conversion (Chris)
Signed-off-by: Michal Wajdeczko
Cc: Michal Winiarski
Cc: Joonas Lahtinen
Cc: Haihao Xiang
Reviewed-by: Michał Winiarski #1
Cc: Chris Wilson
---
drivers/gpu/drm/i915/intel_huc.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
index 37ef540d..bc27b69 100644
--- a/drivers/gpu/drm/i915/intel_huc.c
+++ b/drivers/gpu/drm/i915/intel_huc.c
@@ -108,13 +108,14 @@ int intel_huc_auth(struct intel_huc *huc)
* This function reads status register to verify if HuC
* firmware was successfully loaded.
*
- * Returns positive value if HuC firmware is loaded and verified
- * and -ENODEV if HuC is not present.
+ * Returns: 1 if HuC firmware is loaded and verified,
+ * 0 if HuC firmware is not loaded and -ENODEV if HuC
+ * is not present on this platform.
*/
int intel_huc_check_status(struct intel_huc *huc)
{
struct drm_i915_private *dev_priv = huc_to_i915(huc);
- u32 status;
+ bool status;
if (!HAS_HUC(dev_priv))
return -ENODEV;
--
1.9.1
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Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915/guc: rename __create/destroy_doorbell (rev2)
On 17/10/18 12:10, Patchwork wrote: == Series Details == Series: series starting with [1/4] drm/i915/guc: rename __create/destroy_doorbell (rev2) URL : https://patchwork.freedesktop.org/series/51090/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_5000 -> Patchwork_10492 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10492 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10492, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/51090/revisions/2/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10492: === IGT changes === Possible regressions igt@drv_selftest@live_execlists: fi-skl-iommu: PASS -> INCOMPLETE igt@drv_selftest@live_guc: fi-kbl-7567u: PASS -> INCOMPLETE fi-skl-6600u: PASS -> INCOMPLETE fi-skl-6260u: PASS -> INCOMPLETE fi-skl-6700k2: PASS -> INCOMPLETE fi-whl-u: PASS -> INCOMPLETE fi-skl-6770hq: PASS -> INCOMPLETE fi-kbl-7560u: PASS -> INCOMPLETE fi-kbl-8809g: PASS -> INCOMPLETE fi-kbl-r: PASS -> INCOMPLETE fi-kbl-x1275: PASS -> INCOMPLETE fi-skl-6700hq: PASS -> INCOMPLETE fi-cfl-s3: PASS -> INCOMPLETE fi-cfl-8109u: PASS -> INCOMPLETE fi-kbl-7500u: PASS -> INCOMPLETE fi-cfl-8700k: PASS -> INCOMPLETE This is the invalid doorbell selfest trying to poll a doorbell register that doesn't exist, now caught because of the new BUG_ON. Given that it is a pure GuC FW interface test I don't think it is worth updating the code to detect the invalid case and act on it, so I'm just going to remove it as Michal suggested. We do have coverage for the i915 code running out of doorbells in the guc_doorbells selftest. Daniele igt@drv_selftest@live_hangcheck: fi-skl-6600u: PASS -> DMESG-WARN == Known issues == Here are the changes found in Patchwork_10492 that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_guc: fi-skl-gvtdvm: PASS -> INCOMPLETE (fdo#105600) fi-bxt-dsi: PASS -> INCOMPLETE (fdo#103927) fi-bxt-j4205: PASS -> INCOMPLETE (fdo#103927) igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a: fi-byt-clapper: PASS -> FAIL (fdo#107362) Possible fixes igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b: fi-byt-clapper: FAIL (fdo#107362) -> PASS Warnings igt@drv_selftest@live_guc: fi-apl-guc: DMESG-WARN (fdo#107258) -> INCOMPLETE (fdo#106693) fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#105600 https://bugs.freedesktop.org/show_bug.cgi?id=105600 fdo#106693 https://bugs.freedesktop.org/show_bug.cgi?id=106693 fdo#107258 https://bugs.freedesktop.org/show_bug.cgi?id=107258 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 == Participating hosts (47 -> 41) == Missing(6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-u == Build changes == * Linux: CI_DRM_5000 -> Patchwork_10492 CI_DRM_5000: b9543c130d4f6edd76ec98090c46044ba6d9493e @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10492: 880bdc1de4f866988489380c18c9a051f3ab01d7 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 880bdc1de4f8 HAX enable GuC for CI 61e396e88d17 drm/i915/guc: doorbell checking cleanup 641964fa483b drm/i915/guc: reserve the doorbell before selecting the cacheline f79da532bd81 drm/i915/guc: rename __create/destroy_doorbell == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10492/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915/guc: rename __create/destroy_doorbell (rev2)
== Series Details == Series: series starting with [1/4] drm/i915/guc: rename __create/destroy_doorbell (rev2) URL : https://patchwork.freedesktop.org/series/51090/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_5000 -> Patchwork_10492 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10492 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10492, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/51090/revisions/2/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10492: === IGT changes === Possible regressions igt@drv_selftest@live_execlists: fi-skl-iommu: PASS -> INCOMPLETE igt@drv_selftest@live_guc: fi-kbl-7567u: PASS -> INCOMPLETE fi-skl-6600u: PASS -> INCOMPLETE fi-skl-6260u: PASS -> INCOMPLETE fi-skl-6700k2: PASS -> INCOMPLETE fi-whl-u: PASS -> INCOMPLETE fi-skl-6770hq: PASS -> INCOMPLETE fi-kbl-7560u: PASS -> INCOMPLETE fi-kbl-8809g: PASS -> INCOMPLETE fi-kbl-r: PASS -> INCOMPLETE fi-kbl-x1275: PASS -> INCOMPLETE fi-skl-6700hq: PASS -> INCOMPLETE fi-cfl-s3: PASS -> INCOMPLETE fi-cfl-8109u: PASS -> INCOMPLETE fi-kbl-7500u: PASS -> INCOMPLETE fi-cfl-8700k: PASS -> INCOMPLETE igt@drv_selftest@live_hangcheck: fi-skl-6600u: PASS -> DMESG-WARN == Known issues == Here are the changes found in Patchwork_10492 that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_guc: fi-skl-gvtdvm: PASS -> INCOMPLETE (fdo#105600) fi-bxt-dsi: PASS -> INCOMPLETE (fdo#103927) fi-bxt-j4205: PASS -> INCOMPLETE (fdo#103927) igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a: fi-byt-clapper: PASS -> FAIL (fdo#107362) Possible fixes igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b: fi-byt-clapper: FAIL (fdo#107362) -> PASS Warnings igt@drv_selftest@live_guc: fi-apl-guc: DMESG-WARN (fdo#107258) -> INCOMPLETE (fdo#106693) fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#105600 https://bugs.freedesktop.org/show_bug.cgi?id=105600 fdo#106693 https://bugs.freedesktop.org/show_bug.cgi?id=106693 fdo#107258 https://bugs.freedesktop.org/show_bug.cgi?id=107258 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 == Participating hosts (47 -> 41) == Missing(6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-u == Build changes == * Linux: CI_DRM_5000 -> Patchwork_10492 CI_DRM_5000: b9543c130d4f6edd76ec98090c46044ba6d9493e @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10492: 880bdc1de4f866988489380c18c9a051f3ab01d7 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 880bdc1de4f8 HAX enable GuC for CI 61e396e88d17 drm/i915/guc: doorbell checking cleanup 641964fa483b drm/i915/guc: reserve the doorbell before selecting the cacheline f79da532bd81 drm/i915/guc: rename __create/destroy_doorbell == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10492/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm: Get ref on CRTC commit object when waiting for flip_done
== Series Details == Series: drm: Get ref on CRTC commit object when waiting for flip_done URL : https://patchwork.freedesktop.org/series/51079/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4998_full -> Patchwork_10491_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_10491_full that come from known issues: === IGT changes === Issues hit igt@gem_exec_schedule@pi-ringfull-blt: shard-skl: NOTRUN -> FAIL (fdo#103158) igt@kms_atomic@plane_primary_legacy: shard-kbl: PASS -> DMESG-WARN (fdo#105602, fdo#103558) +11 igt@kms_atomic_transition@1x-modeset-transitions: shard-skl: NOTRUN -> FAIL (fdo#108470) +1 igt@kms_available_modes_crc@available_mode_test_crc: shard-apl: PASS -> FAIL (fdo#106641) igt@kms_busy@extended-modeset-hang-newfb-render-c: shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: shard-skl: PASS -> DMESG-WARN (fdo#107956) igt@kms_color@pipe-a-ctm-blue-to-red: shard-skl: NOTRUN -> FAIL (fdo#107201) igt@kms_cursor_crc@cursor-256x256-suspend: shard-skl: NOTRUN -> FAIL (fdo#103232, fdo#103191) igt@kms_cursor_legacy@cursora-vs-flipa-toggle: shard-glk: PASS -> DMESG-WARN (fdo#105763, fdo#106538) igt@kms_flip@2x-flip-vs-expired-vblank: shard-glk: PASS -> FAIL (fdo#105363) igt@kms_flip@plain-flip-fb-recreate: shard-skl: PASS -> FAIL (fdo#100368) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt: shard-glk: PASS -> FAIL (fdo#103167) igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt: shard-skl: NOTRUN -> FAIL (fdo#103167, fdo#105682) igt@kms_frontbuffer_tracking@fbcpsr-stridechange: shard-skl: NOTRUN -> FAIL (fdo#105683) igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-gtt: shard-skl: NOTRUN -> FAIL (fdo#103167) +3 igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes: shard-kbl: PASS -> DMESG-WARN (fdo#105602, fdo#103558, fdo#103841, fdo#105079) igt@kms_plane_alpha_blend@pipe-a-alpha-7efc: shard-skl: NOTRUN -> FAIL (fdo#108145, fdo#107815) +1 igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max: shard-apl: NOTRUN -> FAIL (fdo#108145) igt@kms_plane_multiple@atomic-pipe-b-tiling-x: shard-glk: PASS -> FAIL (fdo#103166) +2 igt@pm_rpm@gem-execbuf-stress: shard-skl: PASS -> INCOMPLETE (fdo#107807, fdo#107803) igt@pm_rpm@modeset-non-lpsp: shard-skl: SKIP -> INCOMPLETE (fdo#107807) igt@testdisplay: shard-apl: PASS -> INCOMPLETE (fdo#103927) Possible fixes igt@gem_pwrite_pread@uncached-pwrite-blt-gtt_mmap-performance: shard-apl: INCOMPLETE (fdo#103927) -> PASS igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-skl: FAIL (fdo#105363) -> PASS igt@kms_flip@flip-vs-modeset-interruptible: shard-kbl: DMESG-WARN (fdo#105602, fdo#103558) -> PASS +3 igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu: shard-glk: FAIL (fdo#103167) -> PASS igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-render: shard-glk: DMESG-FAIL (fdo#106538) -> PASS igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes: shard-skl: INCOMPLETE (fdo#104108, fdo#107773) -> PASS igt@kms_plane@plane-position-covered-pipe-a-planes: shard-glk: FAIL (fdo#103166) -> PASS igt@kms_plane_multiple@atomic-pipe-a-tiling-x: shard-apl: FAIL (fdo#103166) -> PASS +1 igt@kms_vblank@pipe-b-ts-continuation-idle-hang: shard-glk: DMESG-WARN (fdo#105763, fdo#106538) -> PASS +1 Warnings igt@kms_fbcon_fbt@psr-suspend: shard-skl: INCOMPLETE (fdo#104108, fdo#107773) -> FAIL (fdo#107882) fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558 fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/guc: rename __create/destroy_doorbell (rev2)
== Series Details == Series: series starting with [1/4] drm/i915/guc: rename __create/destroy_doorbell (rev2) URL : https://patchwork.freedesktop.org/series/51090/ State : warning == Summary == $ dim checkpatch origin/drm-tip f79da532bd81 drm/i915/guc: rename __create/destroy_doorbell 641964fa483b drm/i915/guc: reserve the doorbell before selecting the cacheline 61e396e88d17 drm/i915/guc: doorbell checking cleanup 880bdc1de4f8 HAX enable GuC for CI -:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one total: 0 errors, 1 warnings, 0 checks, 8 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RFC] drm/i915/guc: New GuC stage descriptors
On 2018-10-12 20:25, Daniele Ceraolo Spurio wrote:
With the new interface, GuC now requires every lrc to be registered in
one of the stage descriptors, which have been re-designed so that each
descriptor can store up to 64 lrc per class (i.e. equal to the possible
SW counter values).
Similarly to what happened with the previous legacy design, it is possible
to have a single "proxy" descriptor that owns the workqueue and the
doorbell and use it for all submission. To distinguish the proxy
descriptors from the one used for lrc storage, the latter have been
called "principal". A descriptor can't be both a proxy and a principal
at the same time; to enforce this, since we only use 1 proxy descriptor
per client, we reserve enough descriptor from the bottom of the pool to
be used as proxy and leave the others as principals. For simplicity, we
currently map context IDs 1:1 to principal descriptors, but we could
have more contexts in flight if needed by using the SW counter.
Does this have any influence on the concept of "default context" used by
UMDs?
Or is this completely separate?
Note that the lrcs need to be mapped in the principal descriptor until
guc is done with them. This means that we can't release the HW id when
the user app closes the ctx because it might still be in flight with GuC
and that we need to be careful when unpinning because the fact that the
s/the//
a request on the next context has completed doesn't mean that GuC is
done processing the first one. See in-code comments for details.
NOTE: GuC is not going to look at lrcs that are not in flight, so we
could potentially skip the unpinning steps. However, the unpinnig steps
perform extra correctness check so better keep them until we're sure
that the flow is solid.
Based on an initial patch by Oscar Mateo.
RFC: this will be sent as part of the updated series once we have
the gen9 FW with the new interface, but since the flow is
significantly different compared to the previous version I'd like
to gather some early feedback to make sure there aren't any major
issues.
Signed-off-by: Daniele Ceraolo Spurio
Signed-off-by: Michal Wajdeczko
Cc: Chris Wilson
Cc: Michel Thierry
Cc: Michal Winiarski
Cc: Tomasz Lis
---
drivers/gpu/drm/i915/i915_debugfs.c | 30 +-
drivers/gpu/drm/i915/i915_drv.h | 5 +-
drivers/gpu/drm/i915/i915_gem_context.c | 9 +-
drivers/gpu/drm/i915/intel_guc.h| 14 +-
drivers/gpu/drm/i915/intel_guc_fwif.h | 73 +++--
drivers/gpu/drm/i915/intel_guc_submission.c | 346 +++-
drivers/gpu/drm/i915/intel_lrc.c| 18 +-
drivers/gpu/drm/i915/intel_lrc.h| 7 +
drivers/gpu/drm/i915/selftests/intel_guc.c | 4 +-
9 files changed, 360 insertions(+), 146 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 00c551d3e409..04bbde4a38a6 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2474,11 +2474,10 @@ static int i915_guc_stage_pool(struct seq_file *m, void
*data)
seq_printf(m, "GuC stage descriptor %u:\n", index);
seq_printf(m, "\tIndex: %u\n", desc->stage_id);
+ seq_printf(m, "\tProxy Index: %u\n", desc->proxy_id);
seq_printf(m, "\tAttribute: 0x%x\n", desc->attribute);
seq_printf(m, "\tPriority: %d\n", desc->priority);
seq_printf(m, "\tDoorbell id: %d\n", desc->db_id);
- seq_printf(m, "\tEngines used: 0x%x\n",
- desc->engines_used);
seq_printf(m, "\tDoorbell trigger phy: 0x%llx, cpu: 0x%llx, uK:
0x%x\n",
desc->db_trigger_phy,
desc->db_trigger_cpu,
@@ -2490,18 +2489,21 @@ static int i915_guc_stage_pool(struct seq_file *m, void
*data)
seq_putc(m, '\n');
for_each_engine_masked(engine, dev_priv, client->engines, tmp) {
- u32 guc_engine_id = engine->guc_id;
- struct guc_execlist_context *lrc =
- &desc->lrc[guc_engine_id];
-
- seq_printf(m, "\t%s LRC:\n", engine->name);
- seq_printf(m, "\t\tContext desc: 0x%x\n",
- lrc->context_desc);
- seq_printf(m, "\t\tContext id: 0x%x\n",
lrc->context_id);
- seq_printf(m, "\t\tLRCA: 0x%x\n", lrc->ring_lrca);
- seq_printf(m, "\t\tRing begin: 0x%x\n",
lrc->ring_begin);
- seq_printf(m, "\t\tRing end: 0x%x\n", lrc->ring_end);
- seq_putc(m, '\n');
+ u8 class = engine->class;
+ u8 inst = engine->instance;
+
+ if (desc->lrc_alloc_map[class].bitmap & BIT(inst)) {
+ struct guc_execlist_context *lrc =
+
[Intel-gfx] [PATCH v2] drm/i915/guc: doorbell checking cleanup
A collection of very small cleanups/improvements around doorbell checking
that do not deserve their own patch:
- Move doorbell-related HW defs to intel_guc_reg.h
- use GUC_NUM_DOORBELLS instead of GUC_DOORBELL_INVALID where
appropriate
- do not stop on error in guc_verify_doorbells
- do not print drbreg on error: the only content of the register
apart from the valid bit is the lower part of the physical memory
address, which we can't use even if valid because we don't know
which descriptor it came from (since the doorbell is in an unexpected
state)
- Move the checking of doorbell valid bit to a common helper.
v2: add more cleanups (move defs, use GUC_NUM_DOORBELLS, don't stop in
guc_verify_doorbells) (Michal)
Cc: Michal Wajdeczko
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/intel_guc_fwif.h | 6 ++---
drivers/gpu/drm/i915/intel_guc_reg.h| 4 +++
drivers/gpu/drm/i915/intel_guc_submission.c | 27 -
3 files changed, 22 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h
b/drivers/gpu/drm/i915/intel_guc_fwif.h
index 1a853cc627e3..9cb41f6a0924 100644
--- a/drivers/gpu/drm/i915/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
@@ -23,6 +23,8 @@
#ifndef _INTEL_GUC_FWIF_H
#define _INTEL_GUC_FWIF_H
+#include "intel_guc_reg.h"
+
#define GUC_CLIENT_PRIORITY_KMD_HIGH 0
#define GUC_CLIENT_PRIORITY_HIGH 1
#define GUC_CLIENT_PRIORITY_KMD_NORMAL 2
@@ -59,9 +61,6 @@
#define WQ_RING_TAIL_MAX 0x7FF /* 2^11 QWords */
#define WQ_RING_TAIL_MASK (WQ_RING_TAIL_MAX << WQ_RING_TAIL_SHIFT)
-#define GUC_DOORBELL_ENABLED 1
-#define GUC_DOORBELL_DISABLED 0
-
#define GUC_STAGE_DESC_ATTR_ACTIVE BIT(0)
#define GUC_STAGE_DESC_ATTR_PENDING_DB BIT(1)
#define GUC_STAGE_DESC_ATTR_KERNEL BIT(2)
@@ -233,7 +232,6 @@ union guc_doorbell_qw {
u64 value_qw;
} __packed;
-#define GUC_NUM_DOORBELLS 256
#define GUC_DOORBELL_INVALID (GUC_NUM_DOORBELLS)
#define GUC_DB_SIZE(PAGE_SIZE)
diff --git a/drivers/gpu/drm/i915/intel_guc_reg.h
b/drivers/gpu/drm/i915/intel_guc_reg.h
index d86084742a4a..f438ee81dd1e 100644
--- a/drivers/gpu/drm/i915/intel_guc_reg.h
+++ b/drivers/gpu/drm/i915/intel_guc_reg.h
@@ -104,6 +104,10 @@
#define GUC_SEND_INTERRUPT _MMIO(0xc4c8)
#define GUC_SEND_TRIGGER (1<<0)
+#define GUC_NUM_DOORBELLS 256
+#define GUC_DOORBELL_ENABLED 1
+#define GUC_DOORBELL_DISABLED 0
+
#define GEN8_DRBREGL(x)_MMIO(0x1000 + (x) * 8)
#define GEN8_DRB_VALID (1<<0)
#define GEN8_DRBREGU(x)_MMIO(0x1000 + (x) * 8 + 4)
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c
b/drivers/gpu/drm/i915/intel_guc_submission.c
index 8c3b5a9facee..b11d5eefcc88 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -192,6 +192,14 @@ static struct guc_doorbell_info *__get_doorbell(struct
intel_guc_client *client)
return client->vaddr + client->doorbell_offset;
}
+static bool __doorbell_valid(struct intel_guc *guc, u16 db_id)
+{
+ struct drm_i915_private *dev_priv = guc_to_i915(guc);
+
+ GEM_BUG_ON(db_id >= GUC_NUM_DOORBELLS);
+ return I915_READ(GEN8_DRBREGL(db_id)) & GEN8_DRB_VALID;
+}
+
static void __init_doorbell(struct intel_guc_client *client)
{
struct guc_doorbell_info *doorbell;
@@ -203,7 +211,6 @@ static void __init_doorbell(struct intel_guc_client *client)
static void __fini_doorbell(struct intel_guc_client *client)
{
- struct drm_i915_private *dev_priv = guc_to_i915(client->guc);
struct guc_doorbell_info *doorbell;
u16 db_id = client->doorbell_id;
@@ -214,7 +221,7 @@ static void __fini_doorbell(struct intel_guc_client *client)
* to go to zero after updating db_status before we call the GuC to
* release the doorbell
*/
- if (wait_for_us(!(I915_READ(GEN8_DRBREGL(db_id)) & GEN8_DRB_VALID), 10))
+ if (wait_for_us(!__doorbell_valid(client->guc, db_id), 10))
WARN_ONCE(true, "Doorbell never became invalid after
disable\n");
}
@@ -866,20 +873,17 @@ guc_reset_prepare(struct intel_engine_cs *engine)
/* Check that a doorbell register is in the expected state */
static bool doorbell_ok(struct intel_guc *guc, u16 db_id)
{
- struct drm_i915_private *dev_priv = guc_to_i915(guc);
- u32 drbregl;
bool valid;
- GEM_BUG_ON(db_id >= GUC_DOORBELL_INVALID);
+ GEM_BUG_ON(db_id >= GUC_NUM_DOORBELLS);
- drbregl = I915_READ(GEN8_DRBREGL(db_id));
- valid = drbregl & GEN8_DRB_VALID;
+ valid = __doorbell_valid(guc, db_id);
if (test_bit(db_id, guc->doorbell_bitmap) == valid)
return true;
- DRM_DEBUG_DRIVER("Doorbell %d has unexpected state (0x%x): valid=%s\n",
-
[Intel-gfx] ✓ Fi.CI.IGT: success for drm: Add shmem GEM library
== Series Details == Series: drm: Add shmem GEM library URL : https://patchwork.freedesktop.org/series/51120/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4998_full -> Patchwork_10490_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10490_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10490_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10490_full: === IGT changes === Warnings igt@perf_pmu@rc6: shard-kbl: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_10490_full that come from known issues: === IGT changes === Issues hit igt@debugfs_test@read_all_entries_display_off: shard-skl: PASS -> INCOMPLETE (fdo#104108) +1 igt@drv_suspend@fence-restore-untiled: shard-kbl: PASS -> INCOMPLETE (fdo#103665) igt@gem_exec_await@wide-contexts: shard-glk: PASS -> FAIL (fdo#106680) igt@gem_exec_schedule@pi-ringfull-blt: shard-skl: NOTRUN -> FAIL (fdo#103158) igt@kms_atomic_transition@1x-modeset-transitions: shard-skl: NOTRUN -> FAIL (fdo#108470) +1 igt@kms_available_modes_crc@available_mode_test_crc: shard-apl: PASS -> FAIL (fdo#106641) igt@kms_busy@extended-modeset-hang-newfb-render-c: shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +1 igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: shard-skl: PASS -> DMESG-WARN (fdo#107956) igt@kms_color@pipe-a-ctm-blue-to-red: shard-skl: NOTRUN -> FAIL (fdo#107201) igt@kms_cursor_crc@cursor-256x256-suspend: shard-skl: NOTRUN -> FAIL (fdo#103232, fdo#103191) igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-ytiled: shard-skl: NOTRUN -> FAIL (fdo#103184) igt@kms_draw_crc@draw-method-xrgb-pwrite-untiled: shard-skl: NOTRUN -> FAIL (fdo#108472) igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: shard-glk: PASS -> FAIL (fdo#105363) igt@kms_frontbuffer_tracking@fbcpsr-stridechange: shard-skl: NOTRUN -> FAIL (fdo#105683) igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-gtt: shard-skl: NOTRUN -> FAIL (fdo#103167) +3 igt@kms_plane@plane-position-covered-pipe-b-planes: shard-apl: PASS -> FAIL (fdo#103166) igt@kms_plane_alpha_blend@pipe-a-alpha-7efc: shard-skl: NOTRUN -> FAIL (fdo#107815, fdo#108145) +1 igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max: shard-apl: NOTRUN -> FAIL (fdo#108145) igt@kms_plane_multiple@atomic-pipe-b-tiling-x: shard-glk: PASS -> FAIL (fdo#103166) Possible fixes igt@gem_pwrite_pread@uncached-pwrite-blt-gtt_mmap-performance: shard-apl: INCOMPLETE (fdo#103927) -> PASS igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: shard-kbl: DMESG-WARN (fdo#107956) -> PASS igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: shard-glk: INCOMPLETE (fdo#103359, k.org#198133) -> PASS igt@kms_flip@flip-vs-expired-vblank: shard-skl: FAIL (fdo#105363) -> PASS +1 igt@kms_flip@flip-vs-modeset-interruptible: shard-kbl: DMESG-WARN (fdo#103558, fdo#105602) -> PASS +3 igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu: shard-glk: FAIL (fdo#103167) -> PASS igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-render: shard-glk: DMESG-FAIL (fdo#106538) -> PASS igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes: shard-skl: INCOMPLETE (fdo#104108, fdo#107773) -> PASS igt@kms_plane@plane-position-covered-pipe-a-planes: shard-glk: FAIL (fdo#103166) -> PASS igt@kms_setmode@basic: shard-kbl: FAIL (fdo#99912) -> PASS igt@kms_vblank@pipe-b-ts-continuation-idle-hang: shard-glk: DMESG-WARN (fdo#105763, fdo#106538) -> PASS +1 fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=1033
[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Get ref on CRTC commit object when waiting for flip_done
== Series Details == Series: drm: Get ref on CRTC commit object when waiting for flip_done URL : https://patchwork.freedesktop.org/series/51079/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4998 -> Patchwork_10491 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/51079/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10491 that come from known issues: === IGT changes === Issues hit igt@drv_module_reload@basic-reload: fi-blb-e6850: NOTRUN -> INCOMPLETE (fdo#107718) igt@drv_selftest@live_gem: fi-apl-guc: NOTRUN -> INCOMPLETE (fdo#106693) igt@drv_selftest@live_hangcheck: fi-kbl-7560u: PASS -> INCOMPLETE (fdo#108044) igt@gem_exec_suspend@basic-s3: fi-kbl-soraka: NOTRUN -> INCOMPLETE (fdo#107774, fdo#107859, fdo#107556) igt@kms_flip@basic-flip-vs-dpms: fi-skl-6700hq: PASS -> DMESG-WARN (fdo#105998) Possible fixes igt@drv_selftest@live_objects: fi-cfl-8109u: INCOMPLETE (fdo#108474) -> PASS igt@gem_exec_suspend@basic-s3: fi-cfl-8109u: DMESG-WARN (fdo#107345) -> PASS +1 igt@kms_flip@basic-flip-vs-modeset: fi-skl-6700hq: DMESG-WARN (fdo#105998) -> PASS igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence: fi-byt-clapper: FAIL (fdo#103191, fdo#107362) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998 fdo#106693 https://bugs.freedesktop.org/show_bug.cgi?id=106693 fdo#107345 https://bugs.freedesktop.org/show_bug.cgi?id=107345 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107556 https://bugs.freedesktop.org/show_bug.cgi?id=107556 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 fdo#107774 https://bugs.freedesktop.org/show_bug.cgi?id=107774 fdo#107859 https://bugs.freedesktop.org/show_bug.cgi?id=107859 fdo#108044 https://bugs.freedesktop.org/show_bug.cgi?id=108044 fdo#108474 https://bugs.freedesktop.org/show_bug.cgi?id=108474 == Participating hosts (45 -> 43) == Additional (2): fi-kbl-soraka fi-apl-guc Missing(4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u == Build changes == * Linux: CI_DRM_4998 -> Patchwork_10491 CI_DRM_4998: a44032bf63ec3acf03e451105d90ee66a7d7f867 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10491: 95be4f6694b4ce2c4baf14fd9a53c5a6ec7ad209 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 95be4f6694b4 drm: Get ref on CRTC commit object when waiting for flip_done == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10491/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 3/4] drm/i915/guc: do not print drbreg on error
On 17/10/18 09:37, Michal Wajdeczko wrote:
On Wed, 17 Oct 2018 02:17:17 +0200, Daniele Ceraolo Spurio
wrote:
The only content of the register apart from the valid bit is the lower
part of the physical memory address. If the valid bit is 0 the address
is meaningless, while if it is 1 we don't know which descriptor it came
from (since the doorbell is in an unexpected state) so we can't match it
to an expected value. Since we already print the state of the valid bit,
stop priniting the full register contents as they're just confusing.
typo in priniting
While at it, move the checking of the valid bit to a common helper.
Cc: Michal Wajdeczko
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/intel_guc_submission.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c
b/drivers/gpu/drm/i915/intel_guc_submission.c
index 8c3b5a9facee..cba84480dad9 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -192,6 +192,12 @@ static struct guc_doorbell_info
*__get_doorbell(struct intel_guc_client *client)
return client->vaddr + client->doorbell_offset;
}
+static bool __doorbell_valid(struct intel_guc *guc, u16 db_id)
+{
+ struct drm_i915_private *dev_priv = guc_to_i915(guc);
should we add GEM_BUG_ON(db_id > GUC_NUM_DOORBELLS) here ?
Can do. I didn't to begin with because we should catch invalid IDs
before we reach here, but an extra debug check won't hurt
+ return I915_READ(GEN8_DRBREGL(db_id)) & GEN8_DRB_VALID;
+}
+
static void __init_doorbell(struct intel_guc_client *client)
{
struct guc_doorbell_info *doorbell;
@@ -203,7 +209,6 @@ static void __init_doorbell(struct
intel_guc_client *client)
static void __fini_doorbell(struct intel_guc_client *client)
{
- struct drm_i915_private *dev_priv = guc_to_i915(client->guc);
struct guc_doorbell_info *doorbell;
u16 db_id = client->doorbell_id;
@@ -214,7 +219,7 @@ static void __fini_doorbell(struct
intel_guc_client *client)
* to go to zero after updating db_status before we call the GuC to
* release the doorbell
*/
- if (wait_for_us(!(I915_READ(GEN8_DRBREGL(db_id)) &
GEN8_DRB_VALID), 10))
+ if (wait_for_us(!__doorbell_valid(client->guc, db_id), 10))
WARN_ONCE(true, "Doorbell never became invalid after
disable\n");
}
@@ -866,20 +871,17 @@ guc_reset_prepare(struct intel_engine_cs *engine)
/* Check that a doorbell register is in the expected state */
static bool doorbell_ok(struct intel_guc *guc, u16 db_id)
{
- struct drm_i915_private *dev_priv = guc_to_i915(guc);
- u32 drbregl;
bool valid;
GEM_BUG_ON(db_id >= GUC_DOORBELL_INVALID);
btw, maybe better to check against GUC_NUM_DOORBELLS ?
GUC_DOORBELL_INVALID looks like a fw defined value
It is, but even in FW it is defined as equal to GUC_NUM_DOORBELLS
and is it ok that we define GUC_NUM_DOORBELLS in intel_guc_fwif.h ?
maybe better place for it is near GEN8_DRBREGL in intel_guc_reg.h
The problem with that is that we'd have to either move
GUC_DOORBELL_INVALID as well or include intel_guc_reg.h from
intel_guc_fwif.h. The latter should be semantically ok I think, since
some aspects of the interface are dependent on HW
- drbregl = I915_READ(GEN8_DRBREGL(db_id));
- valid = drbregl & GEN8_DRB_VALID;
+ valid = __doorbell_valid(guc, db_id);
if (test_bit(db_id, guc->doorbell_bitmap) == valid)
return true;
- DRM_DEBUG_DRIVER("Doorbell %d has unexpected state (0x%x):
valid=%s\n",
- db_id, drbregl, yesno(valid));
+ DRM_DEBUG_DRIVER("Doorbell %d has unexpected state: valid=%s\n",
+ db_id, yesno(valid));
db_id is unsigned so you can use %u (or %hu) for it
ack
return false;
}
later in guc_verify_doorbells() we are stopping after detecting first
mismatched doorbell - maybe we should scan all doorbells to get debug
logs for all unexpected states?
ack
Thanks,
Daniele
with all these nitpicks hopefully accepted,
Reviewed-by: Michal Wajdeczko
Regards,
Michal
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v5 20/28] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling
>-Original Message-
>From: Navare, Manasi D
>Sent: Tuesday, October 16, 2018 2:03 PM
>To: Srivatsa, Anusha
>Cc: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org; Jani
>Nikula
>; Ville Syrjala
>Subject: Re: [PATCH v5 20/28] drm/i915/dp: Configure i915 Picture parameter Set
>registers during DSC enabling
>
>On Tue, Oct 16, 2018 at 12:58:24PM -0700, Srivatsa, Anusha wrote:
>>
>>
>> >-Original Message-
>> >From: Navare, Manasi D
>> >Sent: Friday, October 5, 2018 4:23 PM
>> >To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
>> >Cc: Navare, Manasi D ; Jani Nikula
>> >; Ville Syrjala
>> >; Srivatsa, Anusha
>> >
>> >Subject: [PATCH v5 20/28] drm/i915/dp: Configure i915 Picture
>> >parameter Set registers during DSC enabling
>> >
>> >After encoder->pre_enable() hook, after link training sequence is
>> >completed, PPS registers for DSC encoder are configured using the DSC
>> >state parameters in intel_crtc_state as part of DSC enabling routine
>> >in the source. DSC enabling routine is called after
>> >encoder->pre_enable() before enbaling the pipe and after
>> >compression is enabled on the sink.
>> >
>> >v3:
>> >* Configure Pic_width/2 for each VDSC engine when two VDSC engines
>> >per pipe are used (Manasi)
>> >* Add DSC slice_row_per_frame in PPS16 (Manasi)
>> >
>> >v2:
>> >* Enable PG2 power well for VDSC on eDP
>> >
>> >Cc: Jani Nikula
>> >Cc: Ville Syrjala
>> >Cc: Anusha Srivatsa
>> >Signed-off-by: Manasi Navare
Some comments inline.
>>
>> >---
>> > drivers/gpu/drm/i915/i915_drv.h | 2 +
>> > drivers/gpu/drm/i915/intel_display.c | 6 +
>> > drivers/gpu/drm/i915/intel_vdsc.c| 418 +++
>> > 3 files changed, 426 insertions(+)
>> >
>> >diff --git a/drivers/gpu/drm/i915/i915_drv.h
>> >b/drivers/gpu/drm/i915/i915_drv.h index 93e57b271d3b..b49985f5d08c
>> >100644
>> >--- a/drivers/gpu/drm/i915/i915_drv.h
>> >+++ b/drivers/gpu/drm/i915/i915_drv.h
>> >@@ -3506,6 +3506,8 @@ extern void intel_rps_mark_interactive(struct
>> >drm_i915_private *i915,
>> > bool interactive);
>> > extern bool intel_set_memory_cxsr(struct drm_i915_private *dev_priv,
>> > bool enable);
>> >+extern void intel_dsc_enable(struct intel_encoder *encoder,
>> >+struct intel_crtc_state *crtc_state);
>> >
>> > int i915_reg_read_ioctl(struct drm_device *dev, void *data,
>> >struct drm_file *file);
>> >diff --git a/drivers/gpu/drm/i915/intel_display.c
>> >b/drivers/gpu/drm/i915/intel_display.c
>> >index 4ebf7c83085c..f7cb41775c57 100644
>> >--- a/drivers/gpu/drm/i915/intel_display.c
>> >+++ b/drivers/gpu/drm/i915/intel_display.c
>> >@@ -5480,6 +5480,12 @@ static void intel_encoders_pre_enable(struct
>> >drm_crtc *crtc,
>> >
>> >if (encoder->pre_enable)
>> >encoder->pre_enable(encoder, crtc_state, conn_state);
>> >+
>> >+ /*
>> >+* Enable and Configure Display Stream Compression in the
>> >source
>> >+* if enabled in intel_crtc_state.
>> >+*/
>> >+ intel_dsc_enable(encoder, crtc_state);
>> >}
>> > }
>> >
>> >diff --git a/drivers/gpu/drm/i915/intel_vdsc.c
>> >b/drivers/gpu/drm/i915/intel_vdsc.c
>> >index 594196a9d0f4..1f2b5dc82f16 100644
>> >--- a/drivers/gpu/drm/i915/intel_vdsc.c
>> >+++ b/drivers/gpu/drm/i915/intel_vdsc.c
>> >@@ -580,3 +580,421 @@ int intel_dp_compute_dsc_params(struct intel_dp
>> >*intel_dp,
>> >
>> >return 0;
>> > }
>> >+
>> >+static void intel_configure_pps_for_dsc_encoder(struct intel_encoder
>*encoder,
>> >+ struct intel_crtc_state
>> >*crtc_state) {
>> >+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
>> >+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>> >+ struct drm_dsc_config *vdsc_cfg = &crtc_state->dp_dsc_cfg;
>> >+ enum pipe pipe = crtc->pipe;
>> >+ u32 pps_val = 0;
>> >+ u32 rc_buf_thresh_dword[4];
>> >+ u32 rc_range_params_dword[8];
>> >+ u8 num_vdsc_instances = (crtc_state->dsc_params.dsc_split) ? 2 : 1;
>> >+ int i = 0;
>> >+
>> >+ /* Populate PICTURE_PARAMETER_SET_0 registers */
>> >+ pps_val = DSC_VER_MAJ | vdsc_cfg->dsc_version_minor <<
>> >+ DSC_VER_MIN_SHIFT |
>> >+ vdsc_cfg->bits_per_component << DSC_BPC_SHIFT |
>> >+ vdsc_cfg->line_buf_depth << DSC_LINE_BUF_DEPTH_SHIFT;
>> >+ if (vdsc_cfg->block_pred_enable)
>> >+ pps_val |= DSC_BLOCK_PREDICTION;
>> >+ else
>> >+ pps_val &= ~DSC_BLOCK_PREDICTION;
>> >+ if (vdsc_cfg->convert_rgb)
>> >+ pps_val |= DSC_COLOR_SPACE_CONVERSION;
>> >+ else
>> >+ pps_val &= ~DSC_COLOR_SPACE_CONVERSION;
>> >+ if (vdsc_cfg->enable422)
>> >+ pps_val |= DSC_422_ENABLE;
>> >+ else
>> >+ pps_val &= ~DSC_422_ENABLE;
>> >+ if (vdsc_cfg->vbr_enable)
>> >+ pps_val |= DSC_VBR_ENABLE;
>> >+ e
Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/guc: fix GuC suspend/resume
On Wed, 17 Oct 2018 00:46:47 +0200, Daniele Ceraolo Spurio wrote: The ENTER/EXIT_S_STATE actions queue the save/restore operation in GuC FW and then return, so waiting on the H2G is not enough to guarantee GuC is done. When all the processing is done, GuC writes 0 to scratch register 14, so we can poll on that. Note that GuC does not ensure that the value in the register is different from 0 while the action is in progress so we need to take care of that ourselves as well. v2: improve comment, return early on GuC error and improve error message (Michal) Cc: Chris Wilson Cc: Michal Wajdeczko Signed-off-by: Daniele Ceraolo Spurio Acked-by: Chris Wilson --- Reviewed-by: Michal Wajdeczko Michal ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 3/4] drm/i915/guc: do not print drbreg on error
On Wed, 17 Oct 2018 02:17:17 +0200, Daniele Ceraolo Spurio
wrote:
The only content of the register apart from the valid bit is the lower
part of the physical memory address. If the valid bit is 0 the address
is meaningless, while if it is 1 we don't know which descriptor it came
from (since the doorbell is in an unexpected state) so we can't match it
to an expected value. Since we already print the state of the valid bit,
stop priniting the full register contents as they're just confusing.
typo in priniting
While at it, move the checking of the valid bit to a common helper.
Cc: Michal Wajdeczko
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/intel_guc_submission.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c
b/drivers/gpu/drm/i915/intel_guc_submission.c
index 8c3b5a9facee..cba84480dad9 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -192,6 +192,12 @@ static struct guc_doorbell_info
*__get_doorbell(struct intel_guc_client *client)
return client->vaddr + client->doorbell_offset;
}
+static bool __doorbell_valid(struct intel_guc *guc, u16 db_id)
+{
+ struct drm_i915_private *dev_priv = guc_to_i915(guc);
should we add GEM_BUG_ON(db_id > GUC_NUM_DOORBELLS) here ?
+ return I915_READ(GEN8_DRBREGL(db_id)) & GEN8_DRB_VALID;
+}
+
static void __init_doorbell(struct intel_guc_client *client)
{
struct guc_doorbell_info *doorbell;
@@ -203,7 +209,6 @@ static void __init_doorbell(struct intel_guc_client
*client)
static void __fini_doorbell(struct intel_guc_client *client)
{
- struct drm_i915_private *dev_priv = guc_to_i915(client->guc);
struct guc_doorbell_info *doorbell;
u16 db_id = client->doorbell_id;
@@ -214,7 +219,7 @@ static void __fini_doorbell(struct intel_guc_client
*client)
* to go to zero after updating db_status before we call the GuC to
* release the doorbell
*/
- if (wait_for_us(!(I915_READ(GEN8_DRBREGL(db_id)) & GEN8_DRB_VALID),
10))
+ if (wait_for_us(!__doorbell_valid(client->guc, db_id), 10))
WARN_ONCE(true, "Doorbell never became invalid after
disable\n");
}
@@ -866,20 +871,17 @@ guc_reset_prepare(struct intel_engine_cs *engine)
/* Check that a doorbell register is in the expected state */
static bool doorbell_ok(struct intel_guc *guc, u16 db_id)
{
- struct drm_i915_private *dev_priv = guc_to_i915(guc);
- u32 drbregl;
bool valid;
GEM_BUG_ON(db_id >= GUC_DOORBELL_INVALID);
btw, maybe better to check against GUC_NUM_DOORBELLS ?
GUC_DOORBELL_INVALID looks like a fw defined value
and is it ok that we define GUC_NUM_DOORBELLS in intel_guc_fwif.h ?
maybe better place for it is near GEN8_DRBREGL in intel_guc_reg.h
- drbregl = I915_READ(GEN8_DRBREGL(db_id));
- valid = drbregl & GEN8_DRB_VALID;
+ valid = __doorbell_valid(guc, db_id);
if (test_bit(db_id, guc->doorbell_bitmap) == valid)
return true;
- DRM_DEBUG_DRIVER("Doorbell %d has unexpected state (0x%x): valid=%s\n",
-db_id, drbregl, yesno(valid));
+ DRM_DEBUG_DRIVER("Doorbell %d has unexpected state: valid=%s\n",
+db_id, yesno(valid));
db_id is unsigned so you can use %u (or %hu) for it
return false;
}
later in guc_verify_doorbells() we are stopping after detecting first
mismatched doorbell - maybe we should scan all doorbells to get debug
logs for all unexpected states?
with all these nitpicks hopefully accepted,
Reviewed-by: Michal Wajdeczko
Regards,
Michal
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm: Get ref on CRTC commit object when waiting for flip_done
Hi, > -Original Message- > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of > Li, Sun peng (Leo) > Sent: keskiviikko 17. lokakuuta 2018 17.39 > To: intel-gfx@lists.freedesktop.org > Cc: Li, Sun peng (Leo) ; Daniel Vetter > ; Wentland, Harry > Subject: Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm: Get ref on CRTC commit > object when waiting for flip_done > > > > On 2018-10-16 06:48 PM, Patchwork wrote: > > == Series Details == > > > > Series: drm: Get ref on CRTC commit object when waiting for flip_done > > URL : https://patchwork.freedesktop.org/series/51079/ > > State : failure > > > > == Summary == > > > > = CI Bug Log - changes from CI_DRM_4990_full -> Patchwork_10479_full = > > > > == Summary - FAILURE == > > > >Serious unknown changes coming with Patchwork_10479_full absolutely need > > to be > >verified manually. > > > >If you think the reported changes have nothing to do with the changes > >introduced in Patchwork_10479_full, please notify your bug team to allow > > them > >to document this new failure mode, which will reduce false positives in > > CI. > > > > > > > > == Possible new issues == > > > >Here are the unknown changes that may have been introduced in > > Patchwork_10479_full: > > > >=== IGT changes === > > > > Possible regressions > > > > igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: > >shard-skl: PASS -> FAIL > > > > I can't seem to reproduce this, here's what I've done: > > * Running on a skylake i5-6600 > * Single 4k display via DP > * System is imaged to the commits specified in '== Build changes ==' > * Ran '# ./kms_cursor_legacy --run-subtest flip-vs-cursor-atomictransitions- > varying-size' > > Maybe I'm missing something? Might be just test problem, let-s re-run to see. > > Leo Br, Jani Saarinen Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo > > > > > == Known issues == > > > >Here are the changes found in Patchwork_10479_full that come from known > issues: > > > >=== IGT changes === > > > > Issues hit > > > > igt@gem_exec_schedule@pi-ringfull-blt: > >shard-skl: NOTRUN -> FAIL (fdo#103158) > > > > igt@gem_exec_schedule@pi-ringfull-render: > >shard-glk: NOTRUN -> FAIL (fdo#103158) > > > > igt@gem_ppgtt@blt-vs-render-ctx0: > >shard-skl: NOTRUN -> TIMEOUT (fdo#108039) > > > > igt@gem_ppgtt@blt-vs-render-ctxn: > >shard-kbl: PASS -> INCOMPLETE (fdo#103665, fdo#106023) > > > > igt@kms_atomic_transition@1x-modeset-transitions-nonblocking: > >shard-skl: NOTRUN -> FAIL (fdo#108228) > > > > igt@kms_busy@extended-modeset-hang-newfb-render-b: > >shard-hsw: NOTRUN -> DMESG-WARN (fdo#107956) +1 > > > > igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: > >shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) +1 > > > > igt@kms_cursor_crc@cursor-256x256-random: > >shard-apl: PASS -> FAIL (fdo#103232) +2 > > > > igt@kms_cursor_crc@cursor-256x256-suspend: > >shard-skl: NOTRUN -> FAIL (fdo#103191, fdo#103232) > > > > igt@kms_cursor_crc@cursor-64x64-suspend: > >shard-glk: PASS -> FAIL (fdo#103232) > > > > igt@kms_cursor_legacy@pipe-c-forked-move: > >shard-apl: PASS -> INCOMPLETE (fdo#103927) > > > > igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt: > >shard-skl: NOTRUN -> FAIL (fdo#105682) +1 > > > > igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: > >shard-apl: PASS -> FAIL (fdo#103167) > > > > igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move: > >shard-skl: NOTRUN -> FAIL (fdo#103167) +4 > > > > igt@kms_plane@pixel-format-pipe-a-planes: > >shard-skl: NOTRUN -> DMESG-FAIL (fdo#103166, fdo#106885) > > > > igt@kms_plane@plane-position-covered-pipe-b-planes: > >shard-glk: NOTRUN -> FAIL (fdo#103166) +1 > > > > igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max: > >shard-glk: NOTRUN -> FAIL (fdo#108145) +2 > > > > igt@kms_plane_alpha_blend@pipe-c-alpha-basic: > >shard-skl: NOTRUN -> FAIL (fdo#107815, fdo#108145) > > > > igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: > >shard-skl: NOTRUN -> FAIL (fdo#108145) +3 > > > > igt@kms_rotation_crc@exhaust-fences: > >shard-skl: NOTRUN -> DMESG-WARN (fdo#105748) > > > > > > Possible fixes > > > > igt@kms_flip@flip-vs-expired-vblank-interruptible: > >shard-glk: FAIL (fdo#105363) -> PASS > > > > igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: > >shard-glk: FAIL (fdo#103167) -> PASS > > > > igt@kms_frontbuffer_tra
Re: [Intel-gfx] [PATCH 2/4] drm/i915/guc: reserve the doorbell before selecting the cacheline
On Wed, 17 Oct 2018 02:17:16 +0200, Daniele Ceraolo Spurio wrote: Cacheline selection is only needed if we actually manage to reserve a doorbell. Cc: Michal Wajdeczko Signed-off-by: Daniele Ceraolo Spurio --- Reviewed-by: Michal Wajdeczko ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/4] drm/i915/guc: rename __create/destroy_doorbell
On Wed, 17 Oct 2018 02:17:15 +0200, Daniele Ceraolo Spurio wrote: The 2 functions don't create or destroy anything, they just update the doorbell state in memory. Use init and fini instead for clarity. Cc: Michal Wajdeczko Signed-off-by: Daniele Ceraolo Spurio --- Reviewed-by: Michal Wajdeczko ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v5 4/5] drm: Add library for shmem backed GEM objects
On Wed, Oct 17, 2018 at 03:04:53PM +0200, Noralf Trønnes wrote:
> This adds a library for shmem backed GEM objects.
>
> v5:
> - Drop drm_gem_shmem_prime_mmap() (Daniel Vetter)
> - drm_gem_shmem_mmap(): Subtract drm_vma_node_start() to get the real
> vma->vm_pgoff
> - drm_gem_shmem_fault(): Use vmf->pgoff now that vma->vm_pgoff is correct
>
> v4:
> - Drop cache modes (Thomas Hellstrom)
> - Add a GEM attached vtable
>
> v3:
> - Grammar (Sam Ravnborg)
> - s/drm_gem_shmem_put_pages_unlocked/drm_gem_shmem_put_pages_locked/
> (Sam Ravnborg)
> - Add debug output in error path (Sam Ravnborg)
>
> Signed-off-by: Noralf Trønnes
> ---
> Documentation/gpu/drm-kms-helpers.rst | 12 +
> drivers/gpu/drm/Kconfig| 6 +
> drivers/gpu/drm/Makefile | 1 +
> drivers/gpu/drm/drm_gem_shmem_helper.c | 551
> +
> include/drm/drm_gem_shmem_helper.h | 153 +
> 5 files changed, 723 insertions(+)
> create mode 100644 drivers/gpu/drm/drm_gem_shmem_helper.c
> create mode 100644 include/drm/drm_gem_shmem_helper.h
>
> diff --git a/Documentation/gpu/drm-kms-helpers.rst
> b/Documentation/gpu/drm-kms-helpers.rst
> index 4b4dc236ef6f..8305d3566928 100644
> --- a/Documentation/gpu/drm-kms-helpers.rst
> +++ b/Documentation/gpu/drm-kms-helpers.rst
> @@ -335,3 +335,15 @@ Legacy CRTC/Modeset Helper Functions Reference
>
> .. kernel-doc:: drivers/gpu/drm/drm_crtc_helper.c
> :export:
> +
> +SHMEM GEM Helper Reference
> +==
> +
> +.. kernel-doc:: drivers/gpu/drm/drm_gem_shmem_helper.c
> + :doc: overview
> +
> +.. kernel-doc:: include/drm/drm_gem_shmem_helper.h
> + :internal:
> +
> +.. kernel-doc:: drivers/gpu/drm/drm_gem_shmem_helper.c
> + :export:
This doesn't make sense here imo - put them right next to the cma helpers
in drm-mm.rst instead?
> diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
> index 736b7e67e4ec..46090a36f52e 100644
> --- a/drivers/gpu/drm/Kconfig
> +++ b/drivers/gpu/drm/Kconfig
> @@ -157,6 +157,12 @@ config DRM_KMS_CMA_HELPER
> help
> Choose this if you need the KMS CMA helper functions
>
> +config DRM_GEM_SHMEM_HELPER
> + bool
> + depends on DRM
> + help
> + Choose this if you need the GEM shmem helper functions
> +
> config DRM_VM
> bool
> depends on DRM && MMU
> diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
> index 576ba985e138..8733ceb41292 100644
> --- a/drivers/gpu/drm/Makefile
> +++ b/drivers/gpu/drm/Makefile
> @@ -25,6 +25,7 @@ drm-$(CONFIG_DRM_LIB_RANDOM) += lib/drm_random.o
> drm-$(CONFIG_DRM_VM) += drm_vm.o
> drm-$(CONFIG_COMPAT) += drm_ioc32.o
> drm-$(CONFIG_DRM_GEM_CMA_HELPER) += drm_gem_cma_helper.o
> +drm-$(CONFIG_DRM_GEM_SHMEM_HELPER) += drm_gem_shmem_helper.o
> drm-$(CONFIG_PCI) += ati_pcigart.o
> drm-$(CONFIG_DRM_PANEL) += drm_panel.o
> drm-$(CONFIG_OF) += drm_of.o
> diff --git a/drivers/gpu/drm/drm_gem_shmem_helper.c
> b/drivers/gpu/drm/drm_gem_shmem_helper.c
> new file mode 100644
> index ..c4eec51d3282
> --- /dev/null
> +++ b/drivers/gpu/drm/drm_gem_shmem_helper.c
> @@ -0,0 +1,551 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright 2018 Noralf Trønnes
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +/**
> + * DOC: overview
> + *
> + * This library provides helpers for GEM objects backed by shmem buffers
> + * allocated using anonymous pageable memory.
Would be neat to insert a link to the cma version here (and to the gem
version in the cma helpers) and spend a few words on when to use each.
> + */
> +
> +static const struct drm_gem_object_funcs drm_gem_shmem_funcs = {
> + .free = drm_gem_shmem_free_object,
> + .print_info = drm_gem_shmem_print_info,
> + .pin = drm_gem_shmem_pin,
> + .unpin = drm_gem_shmem_unpin,
> + .get_sg_table = drm_gem_shmem_get_sg_table,
> + .vmap = drm_gem_shmem_vmap,
> + .vunmap = drm_gem_shmem_vunmap,
> + .vm_ops = &drm_gem_shmem_vm_ops,
> +};
> +
> +/**
> + * drm_gem_shmem_create - Allocate an object with the given size
> + * @dev: DRM device
> + * @size: Size of the object to allocate
> + *
> + * This function creates a shmem GEM object.
> + *
> + * Returns:
> + * A struct drm_gem_shmem_object * on success or an ERR_PTR()-encoded
> negative
> + * error code on failure.
> + */
> +struct drm_gem_shmem_object *drm_gem_shmem_create(struct drm_device *dev,
> size_t size)
> +{
> + struct drm_gem_shmem_object *shmem;
> + struct drm_gem_object *obj;
> + int ret;
> +
> + size = PAGE_ALIGN(size);
> +
> + if (dev->driver->gem_create_object)
> + obj = dev->driver->gem_create_object(dev, size);
> + else
> + obj = kzalloc(sizeof(*shmem), GFP_KERNEL);
> + if (!obj)
> + return ERR_PTR(-ENOMEM);
> +
> + if (!obj->funcs)
> + obj->func
Re: [Intel-gfx] [PATCH v5 2/5] drm/prime: Add drm_gem_prime_mmap()
On Wed, Oct 17, 2018 at 03:04:51PM +0200, Noralf Trønnes wrote:
> Add a generic PRIME GEM mmap function.
>
> Suggested-by: Daniel Vetter
> Signed-off-by: Noralf Trønnes
> ---
> drivers/gpu/drm/drm_prime.c | 37 +
> include/drm/drm_prime.h | 1 +
> 2 files changed, 38 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
> index ba6c7e02a2ae..42abf98c1d4a 100644
> --- a/drivers/gpu/drm/drm_prime.c
> +++ b/drivers/gpu/drm/drm_prime.c
> @@ -651,6 +651,43 @@ int drm_gem_prime_handle_to_fd(struct drm_device *dev,
> }
> EXPORT_SYMBOL(drm_gem_prime_handle_to_fd);
>
> +/**
> + * drm_gem_prime_mmap - PRIME mmap function for GEM drivers
> + * @obj: GEM object
> + * @vma: Virtual address range
> + *
> + * This function sets up a userspace mapping for PRIME exported buffers using
> + * the same codepath that is used for regular GEM buffer mapping on the DRM
> fd.
> + * The fake GEM offset is added to vma->vm_pgoff and &drm_driver->fops->mmap
> is
> + * called to set up the mapping.
> + *
> + * Drivers can use this as their &drm_driver->gem_prime_mmap callback.
s/->/./ for the kerneldoc.
Otherwise looks good to me, Reviewed-by: Daniel Vetter
We indeed can't make this the default because only dumb buffers are
guaranteed to be coherent, other mmap implementations might not be. And
for those the driver must provide the right begin/end_cpu_access callbacks
in the dma_buf_ops structure.
Also, would be neat if we could slightly demidlayer the helpers here, so
that it's less of an all-or-nothing decisions. But that's for another
time.
-Daniel
> + */
> +int drm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct
> *vma)
> +{
> + /* Used by drm_gem_mmap() to lookup the GEM object */
> + struct drm_file priv = {
> + .minor = obj->dev->primary,
> + };
> + struct file fil = {
> + .private_data = &priv,
> + };
> + int ret;
> +
> + ret = drm_vma_node_allow(&obj->vma_node, &priv);
> + if (ret)
> + return ret;
> +
> + vma->vm_pgoff += drm_vma_node_start(&obj->vma_node);
> +
> + ret = obj->dev->driver->fops->mmap(&fil, vma);
> +
> + drm_vma_node_revoke(&obj->vma_node, &priv);
> +
> + return ret;
> +}
> +EXPORT_SYMBOL(drm_gem_prime_mmap);
> +
> /**
> * drm_gem_prime_import_dev - core implementation of the import callback
> * @dev: drm_device to import into
> diff --git a/include/drm/drm_prime.h b/include/drm/drm_prime.h
> index e2032fbc0f08..b03731a3f079 100644
> --- a/include/drm/drm_prime.h
> +++ b/include/drm/drm_prime.h
> @@ -70,6 +70,7 @@ struct dma_buf *drm_gem_prime_export(struct drm_device *dev,
> int drm_gem_prime_handle_to_fd(struct drm_device *dev,
> struct drm_file *file_priv, uint32_t handle,
> uint32_t flags,
> int *prime_fd);
> +int drm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct
> *vma);
> struct drm_gem_object *drm_gem_prime_import(struct drm_device *dev,
> struct dma_buf *dma_buf);
>
> --
> 2.15.1
>
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck
== Series Details == Series: drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck URL : https://patchwork.freedesktop.org/series/51114/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4996_full -> Patchwork_10488_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10488_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10488_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10488_full: === IGT changes === Warnings igt@perf_pmu@rc6: shard-kbl: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_10488_full that come from known issues: === IGT changes === Issues hit igt@gem_exec_await@wide-contexts: shard-glk: PASS -> FAIL (fdo#106680) igt@gem_softpin@noreloc-s3: shard-skl: PASS -> INCOMPLETE (fdo#107773, fdo#104108) igt@gem_userptr_blits@readonly-unsync: shard-skl: PASS -> INCOMPLETE (fdo#108074) igt@kms_atomic_transition@1x-modeset-transitions-fencing: shard-skl: PASS -> FAIL (fdo#108470) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) igt@kms_ccs@pipe-b-crc-sprite-planes-basic: shard-glk: PASS -> FAIL (fdo#108145) igt@kms_color@pipe-a-ctm-blue-to-red: shard-skl: PASS -> FAIL (fdo#107201) igt@kms_color@pipe-a-legacy-gamma: shard-apl: PASS -> FAIL (fdo#108145, fdo#104782) igt@kms_cursor_crc@cursor-128x128-suspend: shard-apl: PASS -> FAIL (fdo#103232, fdo#103191) igt@kms_cursor_crc@cursor-128x42-sliding: shard-glk: PASS -> FAIL (fdo#103232) +1 igt@kms_cursor_crc@cursor-256x256-random: shard-apl: PASS -> FAIL (fdo#103232) igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt: shard-apl: PASS -> FAIL (fdo#103167) +1 igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-gtt: shard-skl: PASS -> FAIL (fdo#103167) igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: shard-skl: PASS -> FAIL (fdo#108145, fdo#107815) igt@kms_plane_alpha_blend@pipe-b-alpha-transparant-fb: shard-skl: NOTRUN -> FAIL (fdo#108145) igt@kms_plane_multiple@atomic-pipe-b-tiling-x: shard-glk: PASS -> FAIL (fdo#103166) +1 igt@pm_rpm@pm-caching: shard-skl: PASS -> INCOMPLETE (fdo#107807) Possible fixes igt@drv_suspend@fence-restore-untiled: shard-kbl: INCOMPLETE (fdo#103665) -> PASS igt@kms_cursor_crc@cursor-256x85-sliding: shard-glk: FAIL (fdo#103232) -> PASS igt@kms_cursor_crc@cursor-64x64-suspend: shard-skl: INCOMPLETE (fdo#104108) -> PASS igt@kms_flip@flip-vs-expired-vblank-interruptible: shard-skl: FAIL (fdo#105363) -> PASS igt@kms_plane@plane-position-covered-pipe-b-planes: shard-glk: FAIL (fdo#103166) -> PASS igt@kms_plane_multiple@atomic-pipe-a-tiling-y: shard-apl: FAIL (fdo#103166) -> PASS igt@kms_setmode@basic: shard-hsw: FAIL (fdo#99912) -> PASS fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108 fdo#104782 https://bugs.freedesktop.org/show_bug.cgi?id=104782 fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 fdo#106680 https://bugs.freedesktop.org/show_bug.cgi?id=106680 fdo#107201 https://bugs.freedesktop.org/show_bug.cgi?id=107201 fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773 fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807 fdo#107815 https://bugs.freedesktop.org/show_bug.cgi?id=107815 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#108074 https://bugs.freedesktop.org/show_bug.cgi?id=108074 fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145 fdo#108470 https://bugs.freedesktop.org/show_bug.cgi?id=108470 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (6 -> 6) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4996 -> Patchwork_10488 CI_DRM_4996: 3e17cf0ad3733a3d67045393727066bbd011b69d @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e
Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm: Get ref on CRTC commit object when waiting for flip_done
On 2018-10-16 06:48 PM, Patchwork wrote: > == Series Details == > > Series: drm: Get ref on CRTC commit object when waiting for flip_done > URL : https://patchwork.freedesktop.org/series/51079/ > State : failure > > == Summary == > > = CI Bug Log - changes from CI_DRM_4990_full -> Patchwork_10479_full = > > == Summary - FAILURE == > >Serious unknown changes coming with Patchwork_10479_full absolutely need > to be >verified manually. > >If you think the reported changes have nothing to do with the changes >introduced in Patchwork_10479_full, please notify your bug team to allow > them >to document this new failure mode, which will reduce false positives in CI. > > > > == Possible new issues == > >Here are the unknown changes that may have been introduced in > Patchwork_10479_full: > >=== IGT changes === > > Possible regressions > > igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: >shard-skl: PASS -> FAIL > I can't seem to reproduce this, here's what I've done: * Running on a skylake i5-6600 * Single 4k display via DP * System is imaged to the commits specified in '== Build changes ==' * Ran '# ./kms_cursor_legacy --run-subtest flip-vs-cursor-atomictransitions-varying-size' Maybe I'm missing something? Leo > > == Known issues == > >Here are the changes found in Patchwork_10479_full that come from known > issues: > >=== IGT changes === > > Issues hit > > igt@gem_exec_schedule@pi-ringfull-blt: >shard-skl: NOTRUN -> FAIL (fdo#103158) > > igt@gem_exec_schedule@pi-ringfull-render: >shard-glk: NOTRUN -> FAIL (fdo#103158) > > igt@gem_ppgtt@blt-vs-render-ctx0: >shard-skl: NOTRUN -> TIMEOUT (fdo#108039) > > igt@gem_ppgtt@blt-vs-render-ctxn: >shard-kbl: PASS -> INCOMPLETE (fdo#103665, fdo#106023) > > igt@kms_atomic_transition@1x-modeset-transitions-nonblocking: >shard-skl: NOTRUN -> FAIL (fdo#108228) > > igt@kms_busy@extended-modeset-hang-newfb-render-b: >shard-hsw: NOTRUN -> DMESG-WARN (fdo#107956) +1 > > igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: >shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) +1 > > igt@kms_cursor_crc@cursor-256x256-random: >shard-apl: PASS -> FAIL (fdo#103232) +2 > > igt@kms_cursor_crc@cursor-256x256-suspend: >shard-skl: NOTRUN -> FAIL (fdo#103191, fdo#103232) > > igt@kms_cursor_crc@cursor-64x64-suspend: >shard-glk: PASS -> FAIL (fdo#103232) > > igt@kms_cursor_legacy@pipe-c-forked-move: >shard-apl: PASS -> INCOMPLETE (fdo#103927) > > igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt: >shard-skl: NOTRUN -> FAIL (fdo#105682) +1 > > igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: >shard-apl: PASS -> FAIL (fdo#103167) > > igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move: >shard-skl: NOTRUN -> FAIL (fdo#103167) +4 > > igt@kms_plane@pixel-format-pipe-a-planes: >shard-skl: NOTRUN -> DMESG-FAIL (fdo#103166, fdo#106885) > > igt@kms_plane@plane-position-covered-pipe-b-planes: >shard-glk: NOTRUN -> FAIL (fdo#103166) +1 > > igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max: >shard-glk: NOTRUN -> FAIL (fdo#108145) +2 > > igt@kms_plane_alpha_blend@pipe-c-alpha-basic: >shard-skl: NOTRUN -> FAIL (fdo#107815, fdo#108145) > > igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: >shard-skl: NOTRUN -> FAIL (fdo#108145) +3 > > igt@kms_rotation_crc@exhaust-fences: >shard-skl: NOTRUN -> DMESG-WARN (fdo#105748) > > > Possible fixes > > igt@kms_flip@flip-vs-expired-vblank-interruptible: >shard-glk: FAIL (fdo#105363) -> PASS > > igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: >shard-glk: FAIL (fdo#103167) -> PASS > > igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: >shard-apl: FAIL (fdo#103167) -> PASS > > igt@kms_vblank@pipe-a-ts-continuation-suspend: >shard-skl: INCOMPLETE (fdo#104108, fdo#107773) -> PASS > > igt@perf@short-reads: >shard-skl: FAIL (fdo#103183) -> PASS > > igt@pm_rpm@dpms-mode-unset-non-lpsp: >shard-skl: INCOMPLETE (fdo#107807) -> SKIP > > > Warnings > > igt@pm_backlight@fade_with_suspend: >shard-skl: FAIL (fdo#107847) -> INCOMPLETE (fdo#107773) > > >fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 >fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 >fdo
[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Add shmem GEM library
== Series Details == Series: drm: Add shmem GEM library URL : https://patchwork.freedesktop.org/series/51120/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4998 -> Patchwork_10490 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/51120/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10490 that come from known issues: === IGT changes === Issues hit igt@gem_exec_suspend@basic-s3: fi-kbl-soraka: NOTRUN -> INCOMPLETE (fdo#107859, fdo#107774, fdo#107556) igt@kms_pipe_crc_basic@hang-read-crc-pipe-b: fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362) igt@pm_rpm@module-reload: fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000) igt@prime_vgem@basic-fence-flip: fi-cfl-8700k: PASS -> FAIL (fdo#104008) Possible fixes igt@drv_selftest@live_objects: fi-cfl-8109u: INCOMPLETE -> PASS igt@gem_exec_suspend@basic-s3: fi-cfl-8109u: DMESG-WARN (fdo#107345) -> PASS +1 igt@kms_flip@basic-flip-vs-modeset: fi-skl-6700hq: DMESG-WARN (fdo#105998) -> PASS igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence: fi-byt-clapper: FAIL (fdo#103191, fdo#107362) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008 fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998 fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000 fdo#107345 https://bugs.freedesktop.org/show_bug.cgi?id=107345 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107556 https://bugs.freedesktop.org/show_bug.cgi?id=107556 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 fdo#107774 https://bugs.freedesktop.org/show_bug.cgi?id=107774 fdo#107859 https://bugs.freedesktop.org/show_bug.cgi?id=107859 == Participating hosts (45 -> 42) == Additional (1): fi-kbl-soraka Missing(4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u == Build changes == * Linux: CI_DRM_4998 -> Patchwork_10490 CI_DRM_4998: a44032bf63ec3acf03e451105d90ee66a7d7f867 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10490: 593b702cf1af25accdb63a18d1b7c70e1e6ebc71 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 593b702cf1af drm/tinydrm: Switch from CMA to shmem buffers d2ed5244c5f6 drm: Add library for shmem backed GEM objects cebeed8e2a08 drm/gem: Add drm_gem_object_funcs 26dcb4c0c861 drm/prime: Add drm_gem_prime_mmap() fe745f1947c0 drm/driver: Add defaults for .gem_prime_export/import callbacks == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10490/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Add shmem GEM library
== Series Details == Series: drm: Add shmem GEM library URL : https://patchwork.freedesktop.org/series/51120/ State : warning == Summary == $ dim checkpatch origin/drm-tip fe745f1947c0 drm/driver: Add defaults for .gem_prime_export/import callbacks 26dcb4c0c861 drm/prime: Add drm_gem_prime_mmap() cebeed8e2a08 drm/gem: Add drm_gem_object_funcs d2ed5244c5f6 drm: Add library for shmem backed GEM objects -:79: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #79: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 738 lines checked 593b702cf1af drm/tinydrm: Switch from CMA to shmem buffers ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/icl: dsi enabling (rev2)
== Series Details == Series: drm/i915/icl: dsi enabling (rev2) URL : https://patchwork.freedesktop.org/series/51011/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4995_full -> Patchwork_10486_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_10486_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10486_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10486_full: === IGT changes === Warnings igt@perf_pmu@rc6: shard-kbl: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_10486_full that come from known issues: === IGT changes === Issues hit igt@drv_suspend@shrink: shard-apl: PASS -> INCOMPLETE (fdo#103927, fdo#106886) igt@gem_exec_schedule@pi-ringfull-blt: shard-skl: NOTRUN -> FAIL (fdo#103158) igt@gem_exec_schedule@pi-ringfull-bsd: shard-apl: NOTRUN -> FAIL (fdo#103158) igt@kms_color@pipe-a-legacy-gamma: shard-apl: PASS -> FAIL (fdo#104782, fdo#108145) igt@kms_cursor_legacy@cursora-vs-flipa-toggle: shard-glk: PASS -> DMESG-WARN (fdo#105763, fdo#106538) igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite: shard-apl: SKIP -> INCOMPLETE (fdo#103927) igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-blt: shard-snb: SKIP -> INCOMPLETE (fdo#105411) igt@kms_plane@plane-position-covered-pipe-b-planes: shard-glk: PASS -> FAIL (fdo#103166) +3 igt@testdisplay: shard-glk: PASS -> INCOMPLETE (fdo#103359, k.org#198133) Possible fixes igt@kms_atomic_interruptible@legacy-cursor: shard-kbl: DMESG-WARN (fdo#108473) -> PASS igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: shard-hsw: DMESG-WARN (fdo#107956) -> PASS igt@kms_ccs@pipe-b-crc-sprite-planes-basic: shard-glk: FAIL (fdo#108145) -> PASS igt@kms_cursor_crc@cursor-128x42-sliding: shard-glk: FAIL (fdo#103232) -> PASS +1 igt@kms_flip@flip-vs-modeset-interruptible: shard-kbl: DMESG-WARN (fdo#103313) -> PASS +2 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt: shard-apl: FAIL (fdo#103167) -> PASS +1 igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu: shard-glk: FAIL (fdo#103167) -> PASS +1 igt@kms_plane@plane-position-covered-pipe-a-planes: shard-glk: FAIL (fdo#103166) -> PASS igt@kms_plane_lowres@pipe-b-tiling-none: shard-kbl: DMESG-WARN (fdo#105345, fdo#103313) -> PASS igt@kms_plane_multiple@atomic-pipe-a-tiling-x: shard-apl: FAIL (fdo#103166) -> PASS +3 fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313 fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#104782 https://bugs.freedesktop.org/show_bug.cgi?id=104782 fdo#105345 https://bugs.freedesktop.org/show_bug.cgi?id=105345 fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411 fdo#105763 https://bugs.freedesktop.org/show_bug.cgi?id=105763 fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538 fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145 fdo#108473 https://bugs.freedesktop.org/show_bug.cgi?id=108473 k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133 == Participating hosts (6 -> 6) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4995 -> Patchwork_10486 CI_DRM_4995: 54f2281117133d77122fe452af3ea0bd5b6161aa @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10486: 77756b23dbf159cd95e7379afb52a211d31e41bb @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10486/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http
[Intel-gfx] [PATCH v5 4/5] drm: Add library for shmem backed GEM objects
This adds a library for shmem backed GEM objects.
v5:
- Drop drm_gem_shmem_prime_mmap() (Daniel Vetter)
- drm_gem_shmem_mmap(): Subtract drm_vma_node_start() to get the real
vma->vm_pgoff
- drm_gem_shmem_fault(): Use vmf->pgoff now that vma->vm_pgoff is correct
v4:
- Drop cache modes (Thomas Hellstrom)
- Add a GEM attached vtable
v3:
- Grammar (Sam Ravnborg)
- s/drm_gem_shmem_put_pages_unlocked/drm_gem_shmem_put_pages_locked/
(Sam Ravnborg)
- Add debug output in error path (Sam Ravnborg)
Signed-off-by: Noralf Trønnes
---
Documentation/gpu/drm-kms-helpers.rst | 12 +
drivers/gpu/drm/Kconfig| 6 +
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/drm_gem_shmem_helper.c | 551 +
include/drm/drm_gem_shmem_helper.h | 153 +
5 files changed, 723 insertions(+)
create mode 100644 drivers/gpu/drm/drm_gem_shmem_helper.c
create mode 100644 include/drm/drm_gem_shmem_helper.h
diff --git a/Documentation/gpu/drm-kms-helpers.rst
b/Documentation/gpu/drm-kms-helpers.rst
index 4b4dc236ef6f..8305d3566928 100644
--- a/Documentation/gpu/drm-kms-helpers.rst
+++ b/Documentation/gpu/drm-kms-helpers.rst
@@ -335,3 +335,15 @@ Legacy CRTC/Modeset Helper Functions Reference
.. kernel-doc:: drivers/gpu/drm/drm_crtc_helper.c
:export:
+
+SHMEM GEM Helper Reference
+==
+
+.. kernel-doc:: drivers/gpu/drm/drm_gem_shmem_helper.c
+ :doc: overview
+
+.. kernel-doc:: include/drm/drm_gem_shmem_helper.h
+ :internal:
+
+.. kernel-doc:: drivers/gpu/drm/drm_gem_shmem_helper.c
+ :export:
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 736b7e67e4ec..46090a36f52e 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -157,6 +157,12 @@ config DRM_KMS_CMA_HELPER
help
Choose this if you need the KMS CMA helper functions
+config DRM_GEM_SHMEM_HELPER
+ bool
+ depends on DRM
+ help
+ Choose this if you need the GEM shmem helper functions
+
config DRM_VM
bool
depends on DRM && MMU
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 576ba985e138..8733ceb41292 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -25,6 +25,7 @@ drm-$(CONFIG_DRM_LIB_RANDOM) += lib/drm_random.o
drm-$(CONFIG_DRM_VM) += drm_vm.o
drm-$(CONFIG_COMPAT) += drm_ioc32.o
drm-$(CONFIG_DRM_GEM_CMA_HELPER) += drm_gem_cma_helper.o
+drm-$(CONFIG_DRM_GEM_SHMEM_HELPER) += drm_gem_shmem_helper.o
drm-$(CONFIG_PCI) += ati_pcigart.o
drm-$(CONFIG_DRM_PANEL) += drm_panel.o
drm-$(CONFIG_OF) += drm_of.o
diff --git a/drivers/gpu/drm/drm_gem_shmem_helper.c
b/drivers/gpu/drm/drm_gem_shmem_helper.c
new file mode 100644
index ..c4eec51d3282
--- /dev/null
+++ b/drivers/gpu/drm/drm_gem_shmem_helper.c
@@ -0,0 +1,551 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2018 Noralf Trønnes
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+/**
+ * DOC: overview
+ *
+ * This library provides helpers for GEM objects backed by shmem buffers
+ * allocated using anonymous pageable memory.
+ */
+
+static const struct drm_gem_object_funcs drm_gem_shmem_funcs = {
+ .free = drm_gem_shmem_free_object,
+ .print_info = drm_gem_shmem_print_info,
+ .pin = drm_gem_shmem_pin,
+ .unpin = drm_gem_shmem_unpin,
+ .get_sg_table = drm_gem_shmem_get_sg_table,
+ .vmap = drm_gem_shmem_vmap,
+ .vunmap = drm_gem_shmem_vunmap,
+ .vm_ops = &drm_gem_shmem_vm_ops,
+};
+
+/**
+ * drm_gem_shmem_create - Allocate an object with the given size
+ * @dev: DRM device
+ * @size: Size of the object to allocate
+ *
+ * This function creates a shmem GEM object.
+ *
+ * Returns:
+ * A struct drm_gem_shmem_object * on success or an ERR_PTR()-encoded negative
+ * error code on failure.
+ */
+struct drm_gem_shmem_object *drm_gem_shmem_create(struct drm_device *dev,
size_t size)
+{
+ struct drm_gem_shmem_object *shmem;
+ struct drm_gem_object *obj;
+ int ret;
+
+ size = PAGE_ALIGN(size);
+
+ if (dev->driver->gem_create_object)
+ obj = dev->driver->gem_create_object(dev, size);
+ else
+ obj = kzalloc(sizeof(*shmem), GFP_KERNEL);
+ if (!obj)
+ return ERR_PTR(-ENOMEM);
+
+ if (!obj->funcs)
+ obj->funcs = &drm_gem_shmem_funcs;
+
+ ret = drm_gem_object_init(dev, obj, size);
+ if (ret)
+ goto err_free;
+
+ ret = drm_gem_create_mmap_offset(obj);
+ if (ret)
+ goto err_release;
+
+ shmem = to_drm_gem_shmem_obj(obj);
+ mutex_init(&shmem->pages_lock);
+ mutex_init(&shmem->vmap_lock);
+
+ return shmem;
+
+err_release:
+ drm_gem_object_release(obj);
+err_free:
+ kfree(shmem);
+
+ return ERR_PTR(ret);
+}
+EXPORT_SYMBOL_GPL(drm_gem_shmem_create);
+
+/**
+ * drm_gem_shm
[Intel-gfx] [PATCH v5 5/5] drm/tinydrm: Switch from CMA to shmem buffers
This move makes tinydrm useful for more drivers. tinydrm doesn't need
continuous memory, but at the time it was convenient to use the CMA
library. The spi core can do dma on is_vmalloc() addresses making this
possible.
Cc: David Lechner
Signed-off-by: Noralf Trønnes
Acked-by: David Lechner
Tested-by: David Lechner
---
drivers/gpu/drm/tinydrm/Kconfig| 2 +-
drivers/gpu/drm/tinydrm/core/tinydrm-core.c| 92 +++---
drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c | 5 ++
drivers/gpu/drm/tinydrm/ili9225.c | 14 ++--
drivers/gpu/drm/tinydrm/ili9341.c | 6 +-
drivers/gpu/drm/tinydrm/mi0283qt.c | 6 +-
drivers/gpu/drm/tinydrm/mipi-dbi.c | 38 ---
drivers/gpu/drm/tinydrm/repaper.c | 24 +++
drivers/gpu/drm/tinydrm/st7586.c | 15 +++--
drivers/gpu/drm/tinydrm/st7735r.c | 6 +-
include/drm/tinydrm/tinydrm.h | 36 +++---
11 files changed, 91 insertions(+), 153 deletions(-)
diff --git a/drivers/gpu/drm/tinydrm/Kconfig b/drivers/gpu/drm/tinydrm/Kconfig
index 16f4b5c91f1b..aa0cabba5ace 100644
--- a/drivers/gpu/drm/tinydrm/Kconfig
+++ b/drivers/gpu/drm/tinydrm/Kconfig
@@ -2,7 +2,7 @@ menuconfig DRM_TINYDRM
tristate "Support for simple displays"
depends on DRM
select DRM_KMS_HELPER
- select DRM_KMS_CMA_HELPER
+ select DRM_GEM_SHMEM_HELPER
help
Choose this option if you have a tinydrm supported display.
If M is selected the module will be called tinydrm.
diff --git a/drivers/gpu/drm/tinydrm/core/tinydrm-core.c
b/drivers/gpu/drm/tinydrm/core/tinydrm-core.c
index 255341ee4eb9..38ba361d1af2 100644
--- a/drivers/gpu/drm/tinydrm/core/tinydrm-core.c
+++ b/drivers/gpu/drm/tinydrm/core/tinydrm-core.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -23,7 +24,7 @@
*
* It is based on &drm_simple_display_pipe coupled with a &drm_connector which
* has only one fixed &drm_display_mode. The framebuffers are backed by the
- * cma helper and have support for framebuffer flushing (dirty).
+ * shmem buffers and have support for framebuffer flushing (dirty).
* fbdev support is also included.
*
*/
@@ -37,84 +38,41 @@
*/
/**
- * tinydrm_gem_cma_prime_import_sg_table - Produce a CMA GEM object from
- * another driver's scatter/gather table of pinned pages
- * @drm: DRM device to import into
- * @attach: DMA-BUF attachment
- * @sgt: Scatter/gather table of pinned pages
+ * tinydrm_fb_destroy - Destroy framebuffer
+ * @fb: Framebuffer
*
- * This function imports a scatter/gather table exported via DMA-BUF by
- * another driver using drm_gem_cma_prime_import_sg_table(). It sets the
- * kernel virtual address on the CMA object. Drivers should use this as their
- * &drm_driver->gem_prime_import_sg_table callback if they need the virtual
- * address. tinydrm_gem_cma_free_object() should be used in combination with
- * this function.
- *
- * Returns:
- * A pointer to a newly created GEM object or an ERR_PTR-encoded negative
- * error code on failure.
+ * This function unmaps the virtual address on the backing buffer and destroys
the framebuffer.
+ * Drivers should use this as their &drm_framebuffer_funcs->destroy callback.
*/
-struct drm_gem_object *
-tinydrm_gem_cma_prime_import_sg_table(struct drm_device *drm,
- struct dma_buf_attachment *attach,
- struct sg_table *sgt)
+void tinydrm_fb_destroy(struct drm_framebuffer *fb)
{
- struct drm_gem_cma_object *cma_obj;
- struct drm_gem_object *obj;
- void *vaddr;
+ struct drm_gem_object *gem = drm_gem_fb_get_obj(fb, 0);
+ struct drm_gem_shmem_object *shmem = to_drm_gem_shmem_obj(gem);
- vaddr = dma_buf_vmap(attach->dmabuf);
- if (!vaddr) {
- DRM_ERROR("Failed to vmap PRIME buffer\n");
- return ERR_PTR(-ENOMEM);
- }
-
- obj = drm_gem_cma_prime_import_sg_table(drm, attach, sgt);
- if (IS_ERR(obj)) {
- dma_buf_vunmap(attach->dmabuf, vaddr);
- return obj;
- }
-
- cma_obj = to_drm_gem_cma_obj(obj);
- cma_obj->vaddr = vaddr;
-
- return obj;
+ drm_gem_vunmap(gem, shmem->vaddr);
+ drm_gem_fb_destroy(fb);
}
-EXPORT_SYMBOL(tinydrm_gem_cma_prime_import_sg_table);
-
-/**
- * tinydrm_gem_cma_free_object - Free resources associated with a CMA GEM
- * object
- * @gem_obj: GEM object to free
- *
- * This function frees the backing memory of the CMA GEM object, cleans up the
- * GEM object state and frees the memory used to store the object itself using
- * drm_gem_cma_free_object(). It also handles PRIME buffers which has the
kernel
- * virtual address set by tinydrm_gem_cma_prime_import_sg_table(). Drivers
- * can use this as their &drm_driver->gem_free_object_u
Re: [Intel-gfx] [PATCH v2] drm/i915: GEM_WARN_ON considered harmful
On 2018-10-12 08:31, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
GEM_WARN_ON currently has dangerous semantics where it is completely
compiled out on !GEM_DEBUG builds. This can leave users who expect it to
be more like a WARN_ON, just without a warning in non-debug builds, in
complete ignorance.
Another gotcha with it is that it cannot be used as a statement. Which is
again different from a standard kernel WARN_ON.
This patch fixes both problems by making it behave as one would expect.
It can now be used both as an expression and as statement, and also the
condition evaluates properly in all builds - code under the conditional
will therefore not unexpectedly disappear.
To satisfy call sites which really want the code under the conditional to
completely disappear, we add GEM_DEBUG_WARN_ON and convert some of the
callers to it. This one can also be used as both expression and statement.
From the above it follows GEM_DEBUG_WARN_ON should be used in situations
where we are certain the condition will be hit during development, but at
a place in code where error can be handled to the benefit of not crashing
the machine.
GEM_WARN_ON on the other hand should be used where condition may happen in
production and we just want to distinguish the level of debugging output
emitted between the production and debug build.
v2:
* Dropped BUG_ON hunk.
I have to agree with the need to "fix" GEM_WARN_ON() - ran into not
realizing the difference to WARN_ON() myself. And while nobody likes
multiplying variants of macros, I can't disagree with the need of having
DEBUG-only version as well.
Reviewed-by: Tomasz Lis
Signed-off-by: Tvrtko Ursulin
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Matthew Auld
Cc: Mika Kuoppala
Cc: Tomasz Lis
---
drivers/gpu/drm/i915/i915_gem.h | 4 +++-
drivers/gpu/drm/i915/i915_vma.c | 8
drivers/gpu/drm/i915/intel_engine_cs.c | 8
drivers/gpu/drm/i915/intel_lrc.c | 6 +++---
drivers/gpu/drm/i915/intel_workarounds.c | 2 +-
5 files changed, 15 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.h b/drivers/gpu/drm/i915/i915_gem.h
index 599c4f6eb1ea..b0e4b976880c 100644
--- a/drivers/gpu/drm/i915/i915_gem.h
+++ b/drivers/gpu/drm/i915/i915_gem.h
@@ -47,17 +47,19 @@ struct drm_i915_private;
#define GEM_DEBUG_DECL(var) var
#define GEM_DEBUG_EXEC(expr) expr
#define GEM_DEBUG_BUG_ON(expr) GEM_BUG_ON(expr)
+#define GEM_DEBUG_WARN_ON(expr) GEM_WARN_ON(expr)
#else
#define GEM_SHOW_DEBUG() (0)
#define GEM_BUG_ON(expr) BUILD_BUG_ON_INVALID(expr)
-#define GEM_WARN_ON(expr) (BUILD_BUG_ON_INVALID(expr), 0)
+#define GEM_WARN_ON(expr) ({ unlikely(!!(expr)); })
#define GEM_DEBUG_DECL(var)
#define GEM_DEBUG_EXEC(expr) do { } while (0)
#define GEM_DEBUG_BUG_ON(expr)
+#define GEM_DEBUG_WARN_ON(expr) ({ BUILD_BUG_ON_INVALID(expr); 0; })
#endif
#if IS_ENABLED(CONFIG_DRM_I915_TRACE_GEM)
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 31efc971a3a8..82652c3d1bed 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -305,12 +305,12 @@ int i915_vma_bind(struct i915_vma *vma, enum
i915_cache_level cache_level,
GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
GEM_BUG_ON(vma->size > vma->node.size);
- if (GEM_WARN_ON(range_overflows(vma->node.start,
- vma->node.size,
- vma->vm->total)))
+ if (GEM_DEBUG_WARN_ON(range_overflows(vma->node.start,
+ vma->node.size,
+ vma->vm->total)))
return -ENODEV;
- if (GEM_WARN_ON(!flags))
+ if (GEM_DEBUG_WARN_ON(!flags))
return -EINVAL;
bind_flags = 0;
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c
b/drivers/gpu/drm/i915/intel_engine_cs.c
index f27dbe26bcc1..78e42c0825d2 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -273,13 +273,13 @@ intel_engine_setup(struct drm_i915_private *dev_priv,
BUILD_BUG_ON(MAX_ENGINE_CLASS >= BIT(GEN11_ENGINE_CLASS_WIDTH));
BUILD_BUG_ON(MAX_ENGINE_INSTANCE >= BIT(GEN11_ENGINE_INSTANCE_WIDTH));
- if (GEM_WARN_ON(info->class > MAX_ENGINE_CLASS))
+ if (GEM_DEBUG_WARN_ON(info->class > MAX_ENGINE_CLASS))
return -EINVAL;
- if (GEM_WARN_ON(info->instance > MAX_ENGINE_INSTANCE))
+ if (GEM_DEBUG_WARN_ON(info->instance > MAX_ENGINE_INSTANCE))
return -EINVAL;
- if (GEM_WARN_ON(dev_priv->engine_class[info->class][info->instance]))
+ if
(GEM_DEBUG_WARN_ON(dev_priv->engine_class[info->class][info->instance]))
return -EINVAL;
GEM_BUG_ON(dev_priv->engine[id]);
@@ -402,7 +402,7 @@ int intel_engines_init(struct drm_i915_private *dev_priv)
err = -EINVAL;
err_id
[Intel-gfx] [PATCH v5 0/5] drm: Add shmem GEM library
This patchset adds a library for shmem backed GEM objects and makes use of it in tinydrm. Daniel suggested that I make a generic mmap function for GEM PRIME. I wondered if I could make it the default for drm_driver->gem_prime_mmap so I looked at all the drivers that don't set that callback: - armada, i915, omap and udl has their own dmabuf implementations. - nouveau and radeon use drm_gem_prime_export(), but don't set the ->gem_prime_mmap callback. Making it default would change the behaviour of those last two so I let it be. I'm cc'ing intel-gfx to have the CI look at the core changes I've made. I can't exercise all the codepaths using vc4 and tinydrm. Noralf. Changes since version 4: - Add drm_gem_prime_mmap() (Daniel Vetter) - Drop drm_gem_object_funcs->prime_mmap - drm_gem_shmem_mmap(): Subtract drm_vma_node_start() to get the real vma->vm_pgoff - drm_gem_shmem_fault(): Use vmf->pgoff now that vma->vm_pgoff is correct Changes since version 3: - Drop cache modes (Thomas Hellstrom) - Add a GEM object attached vtable Changes since version 2: - Grammar (Sam Ravnborg) - s/drm_gem_shmem_put_pages_unlocked/drm_gem_shmem_put_pages_locked/ (Sam Ravnborg) - Add debug ouput in error path (Sam Ravnborg) Changes since version 1: - Fix missing argument in docs (kbuild test robot) - Fix: sparse: expression using sizeof(void) (kbuild test robot) - Rebasing gave a new checkpatch warning, so I changed to bitfields: CHECK: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384 #834: FILE: include/drm/drm_gem_shmem_helper.h:84: + bool pages_mark_dirty_on_put; #841: FILE: include/drm/drm_gem_shmem_helper.h:91: + bool pages_mark_accessed_on_put; Noralf Trønnes (5): drm/driver: Add defaults for .gem_prime_export/import callbacks drm/prime: Add drm_gem_prime_mmap() drm/gem: Add drm_gem_object_funcs drm: Add library for shmem backed GEM objects drm/tinydrm: Switch from CMA to shmem buffers Documentation/gpu/drm-kms-helpers.rst | 12 + Documentation/gpu/todo.rst | 7 + drivers/gpu/drm/Kconfig| 6 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/drm_client.c | 12 +- drivers/gpu/drm/drm_gem.c | 109 - drivers/gpu/drm/drm_gem_shmem_helper.c | 551 + drivers/gpu/drm/drm_prime.c| 79 +++- drivers/gpu/drm/tinydrm/Kconfig| 2 +- drivers/gpu/drm/tinydrm/core/tinydrm-core.c| 92 ++--- drivers/gpu/drm/tinydrm/core/tinydrm-helpers.c | 5 + drivers/gpu/drm/tinydrm/ili9225.c | 14 +- drivers/gpu/drm/tinydrm/ili9341.c | 6 +- drivers/gpu/drm/tinydrm/mi0283qt.c | 6 +- drivers/gpu/drm/tinydrm/mipi-dbi.c | 38 +- drivers/gpu/drm/tinydrm/repaper.c | 24 +- drivers/gpu/drm/tinydrm/st7586.c | 15 +- drivers/gpu/drm/tinydrm/st7735r.c | 6 +- include/drm/drm_drv.h | 4 + include/drm/drm_gem.h | 131 ++ include/drm/drm_gem_shmem_helper.h | 153 +++ include/drm/drm_prime.h| 1 + include/drm/tinydrm/tinydrm.h | 36 +- 23 files changed, 1122 insertions(+), 188 deletions(-) create mode 100644 drivers/gpu/drm/drm_gem_shmem_helper.c create mode 100644 include/drm/drm_gem_shmem_helper.h -- 2.15.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 3/5] drm/gem: Add drm_gem_object_funcs
This adds an optional function table on GEM objects.
The main benefit is for drivers that support more than one type of
memory (shmem,vram,cma) for their buffers depending on the hardware it
runs on. With the callbacks attached to the GEM object itself, it is
easier to have core helpers for the the various buffer types. The driver
only has to make the decision about buffer type on GEM object creation
and all other callbacks can be handled by the chosen helper.
drm_driver->gem_prime_res_obj has not been added since there's a todo to
put a reservation_object into drm_gem_object.
v2: Drop drm_gem_object_funcs->prime_mmap in favour of
drm_gem_prime_mmap() (Daniel Vetter)
v1:
- drm_gem_object_funcs.map -> .prime_map let it only do PRIME mmap like
the function it superseeds (Daniel Vetter)
- Flip around the if ladders and make obj->funcs the first choice
highlighting the fact that this the new default way of doing it
(Daniel Vetter)
Signed-off-by: Noralf Trønnes
Acked-by: Daniel Vetter
---
drivers/gpu/drm/drm_client.c | 12 ++--
drivers/gpu/drm/drm_gem.c| 109 ---
drivers/gpu/drm/drm_prime.c | 34 ++-
include/drm/drm_gem.h| 131 +++
4 files changed, 252 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/drm_client.c b/drivers/gpu/drm/drm_client.c
index 17d9a64e885e..eca7331762e4 100644
--- a/drivers/gpu/drm/drm_client.c
+++ b/drivers/gpu/drm/drm_client.c
@@ -80,8 +80,7 @@ int drm_client_new(struct drm_device *dev, struct
drm_client_dev *client,
{
int ret;
- if (!drm_core_check_feature(dev, DRIVER_MODESET) ||
- !dev->driver->dumb_create || !dev->driver->gem_prime_vmap)
+ if (!drm_core_check_feature(dev, DRIVER_MODESET) ||
!dev->driver->dumb_create)
return -EOPNOTSUPP;
if (funcs && !try_module_get(funcs->owner))
@@ -212,8 +211,7 @@ static void drm_client_buffer_delete(struct
drm_client_buffer *buffer)
{
struct drm_device *dev = buffer->client->dev;
- if (buffer->vaddr && dev->driver->gem_prime_vunmap)
- dev->driver->gem_prime_vunmap(buffer->gem, buffer->vaddr);
+ drm_gem_vunmap(buffer->gem, buffer->vaddr);
if (buffer->gem)
drm_gem_object_put_unlocked(buffer->gem);
@@ -266,9 +264,9 @@ drm_client_buffer_create(struct drm_client_dev *client, u32
width, u32 height, u
* fd_install step out of the driver backend hooks, to make that
* final step optional for internal users.
*/
- vaddr = dev->driver->gem_prime_vmap(obj);
- if (!vaddr) {
- ret = -ENOMEM;
+ vaddr = drm_gem_vmap(obj);
+ if (IS_ERR(vaddr)) {
+ ret = PTR_ERR(vaddr);
goto err_delete;
}
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index 512078ebd97b..8b55ece97967 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -257,7 +257,9 @@ drm_gem_object_release_handle(int id, void *ptr, void *data)
struct drm_gem_object *obj = ptr;
struct drm_device *dev = obj->dev;
- if (dev->driver->gem_close_object)
+ if (obj->funcs && obj->funcs->close)
+ obj->funcs->close(obj, file_priv);
+ else if (dev->driver->gem_close_object)
dev->driver->gem_close_object(obj, file_priv);
if (drm_core_check_feature(dev, DRIVER_PRIME))
@@ -410,7 +412,11 @@ drm_gem_handle_create_tail(struct drm_file *file_priv,
if (ret)
goto err_remove;
- if (dev->driver->gem_open_object) {
+ if (obj->funcs && obj->funcs->open) {
+ ret = obj->funcs->open(obj, file_priv);
+ if (ret)
+ goto err_revoke;
+ } else if (dev->driver->gem_open_object) {
ret = dev->driver->gem_open_object(obj, file_priv);
if (ret)
goto err_revoke;
@@ -835,7 +841,9 @@ drm_gem_object_free(struct kref *kref)
container_of(kref, struct drm_gem_object, refcount);
struct drm_device *dev = obj->dev;
- if (dev->driver->gem_free_object_unlocked) {
+ if (obj->funcs) {
+ obj->funcs->free(obj);
+ } else if (dev->driver->gem_free_object_unlocked) {
dev->driver->gem_free_object_unlocked(obj);
} else if (dev->driver->gem_free_object) {
WARN_ON(!mutex_is_locked(&dev->struct_mutex));
@@ -864,13 +872,13 @@ drm_gem_object_put_unlocked(struct drm_gem_object *obj)
dev = obj->dev;
- if (dev->driver->gem_free_object_unlocked) {
- kref_put(&obj->refcount, drm_gem_object_free);
- } else {
+ if (dev->driver->gem_free_object) {
might_lock(&dev->struct_mutex);
if (kref_put_mutex(&obj->refcount, drm_gem_object_free,
&dev->struct_mutex))
[Intel-gfx] [PATCH v5 2/5] drm/prime: Add drm_gem_prime_mmap()
Add a generic PRIME GEM mmap function.
Suggested-by: Daniel Vetter
Signed-off-by: Noralf Trønnes
---
drivers/gpu/drm/drm_prime.c | 37 +
include/drm/drm_prime.h | 1 +
2 files changed, 38 insertions(+)
diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index ba6c7e02a2ae..42abf98c1d4a 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -651,6 +651,43 @@ int drm_gem_prime_handle_to_fd(struct drm_device *dev,
}
EXPORT_SYMBOL(drm_gem_prime_handle_to_fd);
+/**
+ * drm_gem_prime_mmap - PRIME mmap function for GEM drivers
+ * @obj: GEM object
+ * @vma: Virtual address range
+ *
+ * This function sets up a userspace mapping for PRIME exported buffers using
+ * the same codepath that is used for regular GEM buffer mapping on the DRM fd.
+ * The fake GEM offset is added to vma->vm_pgoff and &drm_driver->fops->mmap is
+ * called to set up the mapping.
+ *
+ * Drivers can use this as their &drm_driver->gem_prime_mmap callback.
+ */
+int drm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma)
+{
+ /* Used by drm_gem_mmap() to lookup the GEM object */
+ struct drm_file priv = {
+ .minor = obj->dev->primary,
+ };
+ struct file fil = {
+ .private_data = &priv,
+ };
+ int ret;
+
+ ret = drm_vma_node_allow(&obj->vma_node, &priv);
+ if (ret)
+ return ret;
+
+ vma->vm_pgoff += drm_vma_node_start(&obj->vma_node);
+
+ ret = obj->dev->driver->fops->mmap(&fil, vma);
+
+ drm_vma_node_revoke(&obj->vma_node, &priv);
+
+ return ret;
+}
+EXPORT_SYMBOL(drm_gem_prime_mmap);
+
/**
* drm_gem_prime_import_dev - core implementation of the import callback
* @dev: drm_device to import into
diff --git a/include/drm/drm_prime.h b/include/drm/drm_prime.h
index e2032fbc0f08..b03731a3f079 100644
--- a/include/drm/drm_prime.h
+++ b/include/drm/drm_prime.h
@@ -70,6 +70,7 @@ struct dma_buf *drm_gem_prime_export(struct drm_device *dev,
int drm_gem_prime_handle_to_fd(struct drm_device *dev,
struct drm_file *file_priv, uint32_t handle,
uint32_t flags,
int *prime_fd);
+int drm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
struct drm_gem_object *drm_gem_prime_import(struct drm_device *dev,
struct dma_buf *dma_buf);
--
2.15.1
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[Intel-gfx] [PATCH v5 1/5] drm/driver: Add defaults for .gem_prime_export/import callbacks
The majority of drivers use drm_gem_prime_export() and
drm_gem_prime_import() for these callbacks so let's make them the
default.
Signed-off-by: Noralf Trønnes
Acked-by: Daniel Vetter
---
Documentation/gpu/todo.rst | 7 +++
drivers/gpu/drm/drm_prime.c | 10 --
include/drm/drm_drv.h | 4
3 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst
index 5c9d86c962af..abc31956ef15 100644
--- a/Documentation/gpu/todo.rst
+++ b/Documentation/gpu/todo.rst
@@ -234,6 +234,13 @@ efficient.
Contact: Daniel Vetter
+Defaults for .gem_prime_import and export
+-
+
+Most drivers don't need to set drm_driver->gem_prime_import and
+->gem_prime_export now that drm_gem_prime_import() and drm_gem_prime_export()
+are the default.
+
Core refactorings
=
diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index 8d54d51a6b6b..ba6c7e02a2ae 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -529,7 +529,10 @@ static struct dma_buf *export_and_register_object(struct
drm_device *dev,
return dmabuf;
}
- dmabuf = dev->driver->gem_prime_export(dev, obj, flags);
+ if (dev->driver->gem_prime_export)
+ dmabuf = dev->driver->gem_prime_export(dev, obj, flags);
+ else
+ dmabuf = drm_gem_prime_export(dev, obj, flags);
if (IS_ERR(dmabuf)) {
/* normally the created dma-buf takes ownership of the ref,
* but if that fails then drop the ref
@@ -762,7 +765,10 @@ int drm_gem_prime_fd_to_handle(struct drm_device *dev,
/* never seen this one, need to import */
mutex_lock(&dev->object_name_lock);
- obj = dev->driver->gem_prime_import(dev, dma_buf);
+ if (dev->driver->gem_prime_import)
+ obj = dev->driver->gem_prime_import(dev, dma_buf);
+ else
+ obj = drm_gem_prime_import(dev, dma_buf);
if (IS_ERR(obj)) {
ret = PTR_ERR(obj);
goto out_unlock;
diff --git a/include/drm/drm_drv.h b/include/drm/drm_drv.h
index 3199ef70c007..dbb2f6ad184a 100644
--- a/include/drm/drm_drv.h
+++ b/include/drm/drm_drv.h
@@ -471,6 +471,8 @@ struct drm_driver {
* @gem_prime_export:
*
* export GEM -> dmabuf
+*
+* This defaults to drm_gem_prime_export() if not set.
*/
struct dma_buf * (*gem_prime_export)(struct drm_device *dev,
struct drm_gem_object *obj, int flags);
@@ -478,6 +480,8 @@ struct drm_driver {
* @gem_prime_import:
*
* import dmabuf -> GEM
+*
+* This defaults to drm_gem_prime_import() if not set.
*/
struct drm_gem_object * (*gem_prime_import)(struct drm_device *dev,
struct dma_buf *dma_buf);
--
2.15.1
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Re: [Intel-gfx] [PATCH 01/10] drm/i915: Remove crtc->config dereference from drrs_ctl
Op 16-10-18 om 22:13 schreef Ville Syrjälä: > On Thu, Oct 11, 2018 at 12:04:48PM +0200, Maarten Lankhorst wrote: >> Wait for idle, and iterate over connectors instead of encoders. >> With this information we know crtc->state is the actual state, >> and we can enable/disable drrs safely. >> >> Signed-off-by: Maarten Lankhorst > Looks sensible > > Reviewed-by: Ville Syrjälä Thanks, pushed. ~Maarten ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/quirks: pass dev_priv instead of drm dev to quirk code
== Series Details == Series: drm/i915/quirks: pass dev_priv instead of drm dev to quirk code URL : https://patchwork.freedesktop.org/series/5/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4995_full -> Patchwork_10485_full = == Summary - SUCCESS == No regressions found. == Known issues == Here are the changes found in Patchwork_10485_full that come from known issues: === IGT changes === Issues hit igt@drv_suspend@shrink: shard-skl: PASS -> INCOMPLETE (fdo#106886) igt@gem_exec_fence@basic-wait-all: shard-apl: PASS -> INCOMPLETE (fdo#103927) igt@gem_exec_schedule@pi-ringfull-blt: shard-skl: NOTRUN -> FAIL (fdo#103158) igt@gem_exec_schedule@pi-ringfull-bsd: shard-apl: NOTRUN -> FAIL (fdo#103158) igt@kms_atomic_transition@plane-all-modeset-transition: shard-hsw: PASS -> DMESG-WARN (fdo#102614) igt@kms_cursor_crc@cursor-256x85-sliding: shard-apl: PASS -> FAIL (fdo#103232) igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-render: shard-glk: PASS -> DMESG-FAIL (fdo#106538) igt@kms_setmode@basic: shard-kbl: PASS -> FAIL (fdo#99912) igt@kms_vblank@pipe-b-ts-continuation-idle-hang: shard-glk: PASS -> DMESG-WARN (fdo#105763, fdo#106538) +1 igt@pm_rpm@pc8-residency: shard-skl: SKIP -> INCOMPLETE (fdo#107807) Possible fixes igt@gem_userptr_blits@readonly-unsync: shard-skl: INCOMPLETE (fdo#108074) -> PASS igt@kms_atomic_interruptible@legacy-cursor: shard-kbl: DMESG-WARN (fdo#108473) -> PASS igt@kms_atomic_transition@1x-modeset-transitions: shard-skl: FAIL (fdo#108470) -> PASS igt@kms_available_modes_crc@available_mode_test_crc: shard-apl: FAIL (fdo#106641) -> PASS igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: shard-glk: DMESG-WARN (fdo#107956) -> PASS igt@kms_color@pipe-c-ctm-max: shard-skl: FAIL (fdo#108147) -> PASS igt@kms_flip@flip-vs-modeset-interruptible: shard-kbl: DMESG-WARN (fdo#103313) -> PASS +2 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt: shard-glk: FAIL (fdo#103167) -> PASS +1 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt: shard-apl: FAIL (fdo#103167) -> PASS +2 igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite: shard-skl: FAIL (fdo#103167) -> PASS +1 igt@kms_plane_lowres@pipe-b-tiling-none: shard-kbl: DMESG-WARN (fdo#105345, fdo#103313) -> PASS igt@kms_plane_multiple@atomic-pipe-a-tiling-x: shard-apl: FAIL (fdo#103166) -> PASS +1 fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#105345 https://bugs.freedesktop.org/show_bug.cgi?id=105345 fdo#105763 https://bugs.freedesktop.org/show_bug.cgi?id=105763 fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538 fdo#106641 https://bugs.freedesktop.org/show_bug.cgi?id=106641 fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886 fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#108074 https://bugs.freedesktop.org/show_bug.cgi?id=108074 fdo#108147 https://bugs.freedesktop.org/show_bug.cgi?id=108147 fdo#108470 https://bugs.freedesktop.org/show_bug.cgi?id=108470 fdo#108473 https://bugs.freedesktop.org/show_bug.cgi?id=108473 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (6 -> 6) == No changes in participating hosts == Build changes == * Linux: CI_DRM_4995 -> Patchwork_10485 CI_DRM_4995: 54f2281117133d77122fe452af3ea0bd5b6161aa @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10485: 329db538051ac65ec980cef352d143e6d9e1a273 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10485/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for Enabling the IGT for HDCP1.4 (rev2)
== Series Details == Series: Enabling the IGT for HDCP1.4 (rev2) URL : https://patchwork.freedesktop.org/series/51113/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4996 -> Patchwork_10489 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10489 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10489, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/51113/revisions/2/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10489: === IGT changes === Possible regressions igt@debugfs_test@read_all_entries: fi-skl-iommu: PASS -> DMESG-WARN fi-icl-u2: PASS -> DMESG-WARN fi-bdw-5557u: PASS -> DMESG-WARN fi-skl-guc: PASS -> DMESG-WARN fi-glk-j4005: PASS -> DMESG-WARN fi-cfl-8700k: PASS -> DMESG-WARN fi-cfl-guc: PASS -> DMESG-WARN == Known issues == Here are the changes found in Patchwork_10489 that come from known issues: === IGT changes === Issues hit igt@gem_exec_suspend@basic-s3: fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: fi-skl-6700k2: PASS -> INCOMPLETE (fdo#105524, fdo#104108, k.org#199541) Possible fixes igt@drv_selftest@live_evict: fi-bsw-kefka: DMESG-WARN (fdo#107709) -> PASS igt@gem_exec_suspend@basic-s3: fi-icl-u: INCOMPLETE (fdo#107713) -> PASS fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108 fdo#105524 https://bugs.freedesktop.org/show_bug.cgi?id=105524 fdo#107709 https://bugs.freedesktop.org/show_bug.cgi?id=107709 fdo#107713 https://bugs.freedesktop.org/show_bug.cgi?id=107713 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 k.org#199541 https://bugzilla.kernel.org/show_bug.cgi?id=199541 == Participating hosts (46 -> 40) == Additional (1): fi-pnv-d510 Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-apl-guc fi-kbl-7560u == Build changes == * Linux: CI_DRM_4996 -> Patchwork_10489 CI_DRM_4996: 3e17cf0ad3733a3d67045393727066bbd011b69d @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10489: 2ff23417eff1eac516483734a849ef6cd66087ad @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 2ff23417eff1 drm/i915/debugfs: sinks hdcp capabilities ec4e94da3fb4 drm/i915: hdcp_check_link only on CP_IRQ d67eef5dae72 drm/i915: Detect the hdcp capability of sink and src 36a7205c44aa drm/i915: Pullout the bksv read and validation == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10489/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 2/4] drm/i915: Detect the hdcp capability of sink and src
Implements a function to detect the sink and src's hdcp1.4
capabilities.
v2:
const qualifier is maintained at init.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_hdcp.c | 33 +++--
2 files changed, 28 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index b2ca9f278b36..b97d32bb7ff4 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1956,6 +1956,7 @@ int intel_hdcp_enable(struct intel_connector *connector);
int intel_hdcp_disable(struct intel_connector *connector);
int intel_hdcp_check_link(struct intel_connector *connector);
bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port);
+bool intel_hdcp_capable(struct intel_connector *connector);
/* intel_psr.c */
#define CAN_PSR(dev_priv) (HAS_PSR(dev_priv) && dev_priv->psr.sink_support)
diff --git a/drivers/gpu/drm/i915/intel_hdcp.c
b/drivers/gpu/drm/i915/intel_hdcp.c
index 20908ff018e6..deca5581cde3 100644
--- a/drivers/gpu/drm/i915/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/intel_hdcp.c
@@ -17,6 +17,12 @@
#define KEY_LOAD_TRIES 5
static
+struct intel_digital_port *conn_to_dig_port(struct intel_connector *connector)
+{
+ return enc_to_dig_port(&intel_attached_encoder(&connector->base)->base);
+}
+
+static
bool intel_hdcp_is_ksv_valid(u8 *ksv)
{
int i, ones = 0;
@@ -51,6 +57,27 @@ int intel_hdcp_read_valid_bksv(struct intel_digital_port
*intel_dig_port,
return 0;
}
+/* Is HDCP1.4 capable on Platform and Sink */
+bool intel_hdcp_capable(struct intel_connector *connector)
+{
+ struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
+ const struct intel_hdcp_shim *shim = connector->hdcp_shim;
+ bool capable = false;
+ u8 bksv[5];
+
+ if (!shim)
+ return capable;
+
+ if (shim->hdcp_capable) {
+ shim->hdcp_capable(intel_dig_port, &capable);
+ } else {
+ if (!intel_hdcp_read_valid_bksv(intel_dig_port, shim, bksv))
+ capable = true;
+ }
+
+ return capable;
+}
+
static int intel_hdcp_poll_ksv_fifo(struct intel_digital_port *intel_dig_port,
const struct intel_hdcp_shim *shim)
{
@@ -632,12 +659,6 @@ static int intel_hdcp_auth(struct intel_digital_port
*intel_dig_port,
return 0;
}
-static
-struct intel_digital_port *conn_to_dig_port(struct intel_connector *connector)
-{
- return enc_to_dig_port(&intel_attached_encoder(&connector->base)->base);
-}
-
static int _intel_hdcp_disable(struct intel_connector *connector)
{
struct drm_i915_private *dev_priv = connector->base.dev->dev_private;
--
2.7.4
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck
== Series Details == Series: drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck URL : https://patchwork.freedesktop.org/series/51114/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4996 -> Patchwork_10488 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/51114/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10488 that come from known issues: === IGT changes === Issues hit igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b: fi-byt-clapper: PASS -> FAIL (fdo#107362) Possible fixes igt@drv_selftest@live_evict: fi-bsw-kefka: DMESG-WARN (fdo#107709) -> PASS igt@gem_exec_suspend@basic-s3: fi-icl-u: INCOMPLETE (fdo#107713) -> PASS fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107709 https://bugs.freedesktop.org/show_bug.cgi?id=107709 fdo#107713 https://bugs.freedesktop.org/show_bug.cgi?id=107713 == Participating hosts (46 -> 41) == Additional (1): fi-pnv-d510 Missing(6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-snb-2520m == Build changes == * Linux: CI_DRM_4996 -> Patchwork_10488 CI_DRM_4996: 3e17cf0ad3733a3d67045393727066bbd011b69d @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10488: 536cb6ed03908392878d5a02923d4702d0bfba81 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 536cb6ed0390 drm/i915/intel_dsi: Read back pclk set by GOP and use that as pclk v2 671e7f756caa drm/i915/intel_dsi: Move initialization of encoder variables up a bit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10488/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck
== Series Details == Series: drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck URL : https://patchwork.freedesktop.org/series/51114/ State : warning == Summary == $ dim checkpatch origin/drm-tip 671e7f756caa drm/i915/intel_dsi: Move initialization of encoder variables up a bit -:39: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Hans de Goede ' total: 0 errors, 1 warnings, 0 checks, 18 lines checked 536cb6ed0390 drm/i915/intel_dsi: Read back pclk set by GOP and use that as pclk v2 -:57: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Hans de Goede ' total: 0 errors, 1 warnings, 0 checks, 30 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for Enabling the IGT for HDCP1.4
== Series Details == Series: Enabling the IGT for HDCP1.4 URL : https://patchwork.freedesktop.org/series/51113/ State : failure == Summary == CALLscripts/checksyscalls.sh DESCEND objtool CHK include/generated/compile.h CC [M] drivers/gpu/drm/i915/intel_hdcp.o drivers/gpu/drm/i915/intel_hdcp.c: In function ‘intel_hdcp_capable’: drivers/gpu/drm/i915/intel_hdcp.c:64:33: error: initialization discards ‘const’ qualifier from pointer target type [-Werror=discarded-qualifiers] struct intel_hdcp_shim *shim = connector->hdcp_shim; ^ cc1: all warnings being treated as errors scripts/Makefile.build:305: recipe for target 'drivers/gpu/drm/i915/intel_hdcp.o' failed make[4]: *** [drivers/gpu/drm/i915/intel_hdcp.o] Error 1 scripts/Makefile.build:546: recipe for target 'drivers/gpu/drm/i915' failed make[3]: *** [drivers/gpu/drm/i915] Error 2 scripts/Makefile.build:546: recipe for target 'drivers/gpu/drm' failed make[2]: *** [drivers/gpu/drm] Error 2 scripts/Makefile.build:546: recipe for target 'drivers/gpu' failed make[1]: *** [drivers/gpu] Error 2 Makefile:1052: recipe for target 'drivers' failed make: *** [drivers] Error 2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 1/2] drm/i915/intel_dsi: Move initialization of encoder variables up a bit
Move the initialization of encoder variables a bit higher inside the intel_dsi_init() function. So that can call intel_encoder_current_mode() from intel_dsi_vbt_init(). This is a preparation patch for reading back the GOP configured pclk from intel_dsi_vbt_init(). Signed-off-by: Hans de Goede --- drivers/gpu/drm/i915/vlv_dsi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c index bafeb2a19b90..55951b4a036c 100644 --- a/drivers/gpu/drm/i915/vlv_dsi.c +++ b/drivers/gpu/drm/i915/vlv_dsi.c @@ -1773,6 +1773,9 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv) intel_connector->get_hw_state = intel_connector_get_hw_state; intel_encoder->port = port; + intel_encoder->type = INTEL_OUTPUT_DSI; + intel_encoder->power_domain = POWER_DOMAIN_PORT_DSI; + intel_encoder->cloneable = 0; /* * On BYT/CHV, pipe A maps to MIPI DSI port A, pipe B maps to MIPI DSI @@ -1824,9 +1827,6 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv) } } - intel_encoder->type = INTEL_OUTPUT_DSI; - intel_encoder->power_domain = POWER_DOMAIN_PORT_DSI; - intel_encoder->cloneable = 0; drm_connector_init(dev, connector, &intel_dsi_connector_funcs, DRM_MODE_CONNECTOR_DSI); -- 2.19.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 2/2] drm/i915/intel_dsi: Read back pclk set by GOP and use that as pclk v2
On BYT and CHT the GOP sometimes initializes the pclk at a (slightly)
different frequency then the pclk which we've calculated.
This commit makes the DSI code read-back the pclk set by the GOP and
if that is within a reasonable margin of the calculated pclk, uses
that instead.
This fixes the first modeset being a full modeset instead of a
fast modeset on systems where the GOP pclk is different.
Changes in v2:
-Use intel_encoder_current_mode() to get the pclk setup by the GOP
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/i915/intel_dsi_vbt.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dsi_vbt.c
b/drivers/gpu/drm/i915/intel_dsi_vbt.c
index ac83d6b89ae0..3387b187105c 100644
--- a/drivers/gpu/drm/i915/intel_dsi_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_vbt.c
@@ -506,6 +506,7 @@ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16
panel_id)
struct mipi_config *mipi_config = dev_priv->vbt.dsi.config;
struct mipi_pps_data *pps = dev_priv->vbt.dsi.pps;
struct drm_display_mode *mode = dev_priv->vbt.lfp_lvds_vbt_mode;
+ struct drm_display_mode *curr;
u32 bpp;
u32 tlpx_ns, extra_byte_count, bitrate, tlpx_ui;
u32 ui_num, ui_den;
@@ -583,6 +584,23 @@ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16
panel_id)
} else
burst_mode_ratio = 100;
+ /*
+* On BYT / CRC the GOP sometimes picks a slightly different pclk,
+* read back the GOP configured pclk and prefer it over ours.
+*/
+ if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+ curr = intel_encoder_current_mode(&intel_dsi->base);
+ if (curr) {
+ DRM_DEBUG_KMS("Calculated pclk %d GOP %d\n",
+ pclk, curr->clock);
+ if (curr->clock >= (pclk * 9 / 10) &&
+ curr->clock <= (pclk * 11 / 10))
+ pclk = curr->clock;
+
+ kfree(curr);
+ }
+ }
+
intel_dsi->burst_mode_ratio = burst_mode_ratio;
intel_dsi->pclk = pclk;
--
2.19.0
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[Intel-gfx] [PATCH v2 0/2] drm/i915/intel_dsi: Read back pclk set by GOP and use that as plck
Hi All, I've send v1 of this a while ago. Unfortunately I did not have time to respin this until now. This version uses intel_encoder_current_mode() as suggested in the discussion of v1. This allows dropping 2 of the 4 original patches and makes the remaining patches quite small :) Regards, Hans ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 3/4] drm/i915: hdcp_check_link only on CP_IRQ
HDCP check link is invoked only on CP_IRQ detection, instead of all
short pulses.
v3:
No Changes.
v4:
Added sean in cc and collected the reviewed-by received.
v5:
No Change.
v6:
No Change.
v7:
No Change.
v8:
Rebased.
Signed-off-by: Ramalingam C
cc: Sean Paul
Reviewed-by: Uma Shankar
Reviewed-by: Sean Paul
---
drivers/gpu/drm/i915/intel_dp.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 1f098e509143..27377bf8105c 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4530,8 +4530,11 @@ static void intel_dp_check_service_irq(struct intel_dp
*intel_dp)
if (val & DP_AUTOMATED_TEST_REQUEST)
intel_dp_handle_test_request(intel_dp);
- if (val & (DP_CP_IRQ | DP_SINK_SPECIFIC_IRQ))
- DRM_DEBUG_DRIVER("CP or sink specific irq unhandled\n");
+ if (val & DP_CP_IRQ)
+ intel_hdcp_check_link(intel_dp->attached_connector);
+
+ if (val & DP_SINK_SPECIFIC_IRQ)
+ DRM_DEBUG_DRIVER("Sink specific irq unhandled\n");
}
/*
@@ -5694,9 +5697,6 @@ intel_dp_hpd_pulse(struct intel_digital_port
*intel_dig_port, bool long_hpd)
handled = intel_dp_short_pulse(intel_dp);
- /* Short pulse can signify loss of hdcp authentication */
- intel_hdcp_check_link(intel_dp->attached_connector);
-
if (!handled)
goto put_power;
}
--
2.7.4
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[Intel-gfx] [PATCH 2/4] drm/i915: Detect the hdcp capability of sink and src
Implements a function to detect the sink and src's hdcp1.4
capabilities.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_hdcp.c | 33 +++--
2 files changed, 28 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index b2ca9f278b36..b97d32bb7ff4 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1956,6 +1956,7 @@ int intel_hdcp_enable(struct intel_connector *connector);
int intel_hdcp_disable(struct intel_connector *connector);
int intel_hdcp_check_link(struct intel_connector *connector);
bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port);
+bool intel_hdcp_capable(struct intel_connector *connector);
/* intel_psr.c */
#define CAN_PSR(dev_priv) (HAS_PSR(dev_priv) && dev_priv->psr.sink_support)
diff --git a/drivers/gpu/drm/i915/intel_hdcp.c
b/drivers/gpu/drm/i915/intel_hdcp.c
index 20908ff018e6..f0ca6d5557a3 100644
--- a/drivers/gpu/drm/i915/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/intel_hdcp.c
@@ -17,6 +17,12 @@
#define KEY_LOAD_TRIES 5
static
+struct intel_digital_port *conn_to_dig_port(struct intel_connector *connector)
+{
+ return enc_to_dig_port(&intel_attached_encoder(&connector->base)->base);
+}
+
+static
bool intel_hdcp_is_ksv_valid(u8 *ksv)
{
int i, ones = 0;
@@ -51,6 +57,27 @@ int intel_hdcp_read_valid_bksv(struct intel_digital_port
*intel_dig_port,
return 0;
}
+/* Is HDCP1.4 capable on Platform and Sink */
+bool intel_hdcp_capable(struct intel_connector *connector)
+{
+ struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
+ struct intel_hdcp_shim *shim = connector->hdcp_shim;
+ bool capable = false;
+ u8 bksv[5];
+
+ if (!shim)
+ return capable;
+
+ if (shim->hdcp_capable) {
+ shim->hdcp_capable(intel_dig_port, &capable);
+ } else {
+ if (!intel_hdcp_read_valid_bksv(intel_dig_port, shim, bksv))
+ capable = true;
+ }
+
+ return capable;
+}
+
static int intel_hdcp_poll_ksv_fifo(struct intel_digital_port *intel_dig_port,
const struct intel_hdcp_shim *shim)
{
@@ -632,12 +659,6 @@ static int intel_hdcp_auth(struct intel_digital_port
*intel_dig_port,
return 0;
}
-static
-struct intel_digital_port *conn_to_dig_port(struct intel_connector *connector)
-{
- return enc_to_dig_port(&intel_attached_encoder(&connector->base)->base);
-}
-
static int _intel_hdcp_disable(struct intel_connector *connector)
{
struct drm_i915_private *dev_priv = connector->base.dev->dev_private;
--
2.7.4
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[Intel-gfx] [PATCH 4/4] drm/i915/debugfs: sinks hdcp capabilities
debugfs entry for providing the hdcp capabilities of the sinks
connected to the HDCP capable connectors.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/i915_debugfs.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 5f3c639522fa..d89df0b8b7fb 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2210,6 +2210,36 @@ static const char *rps_power_to_str(unsigned int power)
return strings[power];
}
+static int i915_sinks_hdcp_capabilities(struct seq_file *m, void *unused)
+{
+ struct drm_i915_private *dev_priv = node_to_i915(m->private);
+ struct drm_device *dev = &dev_priv->drm;
+ struct intel_connector *connector;
+ struct drm_connector_list_iter conn_iter;
+ bool is_hdcp14;
+
+ drm_connector_list_iter_begin(dev, &conn_iter);
+ for_each_intel_connector_iter(connector, &conn_iter) {
+ if (connector->base.status != connector_status_connected)
+ continue;
+
+ /* HDCP is supported by connector */
+ if (!connector->hdcp_shim)
+ continue;
+
+ /* Detect sink's HDCP1.4 capability */
+ is_hdcp14 = intel_hdcp_capable(connector);
+
+ seq_printf(m, "%s:%d HDCP version: ", connector->base.name,
+ connector->base.base.id);
+ seq_printf(m, "%s ", !is_hdcp14 ? "None" : "HDCP1.4");
+ seq_puts(m, "\n");
+ }
+ drm_connector_list_iter_end(&conn_iter);
+
+ return 0;
+}
+
static int i915_rps_boost_info(struct seq_file *m, void *data)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -4805,6 +4835,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_sseu_status", i915_sseu_status, 0},
{"i915_drrs_status", i915_drrs_status, 0},
{"i915_rps_boost_info", i915_rps_boost_info, 0},
+ {"i915_sinks_hdcp_capabilities", i915_sinks_hdcp_capabilities, 0},
};
#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
--
2.7.4
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[Intel-gfx] [PATCH 1/4] drm/i915: Pullout the bksv read and validation
For reusability purpose, this patch implements the hdcp1.4 bksv's
read and validation as a functions.
For detecting the HDMI panel's HDCP capability this fucntions will be
used.
v2:
Rebased.
v3:
No Changes.
v4:
inline tag is removed with modified error msg.
v5:
No Changes.
v6:
No Changes.
v7:
Realigned the code.
Signed-off-by: Ramalingam C
Reviewed-by: Sean Paul
---
drivers/gpu/drm/i915/intel_hdcp.c | 62 ---
1 file changed, 38 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_hdcp.c
b/drivers/gpu/drm/i915/intel_hdcp.c
index 26e48fc95543..20908ff018e6 100644
--- a/drivers/gpu/drm/i915/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/intel_hdcp.c
@@ -16,6 +16,41 @@
#define KEY_LOAD_TRIES 5
+static
+bool intel_hdcp_is_ksv_valid(u8 *ksv)
+{
+ int i, ones = 0;
+ /* KSV has 20 1's and 20 0's */
+ for (i = 0; i < DRM_HDCP_KSV_LEN; i++)
+ ones += hweight8(ksv[i]);
+ if (ones != 20)
+ return false;
+
+ return true;
+}
+
+static
+int intel_hdcp_read_valid_bksv(struct intel_digital_port *intel_dig_port,
+ const struct intel_hdcp_shim *shim, u8 *bksv)
+{
+ int ret, i, tries = 2;
+
+ /* HDCP spec states that we must retry the bksv if it is invalid */
+ for (i = 0; i < tries; i++) {
+ ret = shim->read_bksv(intel_dig_port, bksv);
+ if (ret)
+ return ret;
+ if (intel_hdcp_is_ksv_valid(bksv))
+ break;
+ }
+ if (i == tries) {
+ DRM_ERROR("Bksv is invalid\n");
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
static int intel_hdcp_poll_ksv_fifo(struct intel_digital_port *intel_dig_port,
const struct intel_hdcp_shim *shim)
{
@@ -168,18 +203,6 @@ u32 intel_hdcp_get_repeater_ctl(struct intel_digital_port
*intel_dig_port)
}
static
-bool intel_hdcp_is_ksv_valid(u8 *ksv)
-{
- int i, ones = 0;
- /* KSV has 20 1's and 20 0's */
- for (i = 0; i < DRM_HDCP_KSV_LEN; i++)
- ones += hweight8(ksv[i]);
- if (ones != 20)
- return false;
- return true;
-}
-
-static
int intel_hdcp_validate_v_prime(struct intel_digital_port *intel_dig_port,
const struct intel_hdcp_shim *shim,
u8 *ksv_fifo, u8 num_downstream, u8 *bstatus)
@@ -527,18 +550,9 @@ static int intel_hdcp_auth(struct intel_digital_port
*intel_dig_port,
memset(&bksv, 0, sizeof(bksv));
- /* HDCP spec states that we must retry the bksv if it is invalid */
- for (i = 0; i < tries; i++) {
- ret = shim->read_bksv(intel_dig_port, bksv.shim);
- if (ret)
- return ret;
- if (intel_hdcp_is_ksv_valid(bksv.shim))
- break;
- }
- if (i == tries) {
- DRM_ERROR("HDCP failed, Bksv is invalid\n");
- return -ENODEV;
- }
+ ret = intel_hdcp_read_valid_bksv(intel_dig_port, shim, bksv.shim);
+ if (ret < 0)
+ return ret;
I915_WRITE(PORT_HDCP_BKSVLO(port), bksv.reg[0]);
I915_WRITE(PORT_HDCP_BKSVHI(port), bksv.reg[1]);
--
2.7.4
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[Intel-gfx] [PATCH 0/4] Enabling the IGT for HDCP1.4
Adding a debugfs entry for detecting the valid HDCP sinks to perform kms_content_protection. In case of dummy HDMI/DP sinks(EDID whisperers without any parsers) IGT will skip the HDCP test on that connector instead of failing it. Hence false alarm are avoided. For serving above purpose this series has pulled out few changes from "Implement HDCP2.2" series under review at https://patchwork.freedesktop.org/series/38254/ "drm/i915: hdcp_check_link only on CP_IRQ" is just a improvement patch for HDCP1.4. Already received the reviewed-by from Sean Paul. Ramalingam C (4): drm/i915: Pullout the bksv read and validation drm/i915: Detect the hdcp capability of sink and src drm/i915: hdcp_check_link only on CP_IRQ drm/i915/debugfs: sinks hdcp capabilities drivers/gpu/drm/i915/i915_debugfs.c | 31 drivers/gpu/drm/i915/intel_dp.c | 10 ++-- drivers/gpu/drm/i915/intel_drv.h| 1 + drivers/gpu/drm/i915/intel_hdcp.c | 95 + 4 files changed, 102 insertions(+), 35 deletions(-) -- 2.7.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: dsi enabling (rev2)
== Series Details == Series: drm/i915/icl: dsi enabling (rev2) URL : https://patchwork.freedesktop.org/series/51011/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4995 -> Patchwork_10486 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/51011/revisions/2/mbox/ == Known issues == Here are the changes found in Patchwork_10486 that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_hangcheck: fi-icl-u: PASS -> INCOMPLETE (fdo#108315) igt@kms_frontbuffer_tracking@basic: fi-icl-u2: PASS -> FAIL (fdo#103167) igt@kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence: fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362) Possible fixes igt@drv_selftest@live_hangcheck: fi-kbl-7560u: INCOMPLETE (fdo#108044) -> PASS igt@kms_flip@basic-flip-vs-modeset: fi-skl-6700hq: DMESG-WARN (fdo#105998) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#108044 https://bugs.freedesktop.org/show_bug.cgi?id=108044 fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315 == Participating hosts (46 -> 42) == Additional (1): fi-pnv-d510 Missing(5): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan == Build changes == * Linux: CI_DRM_4995 -> Patchwork_10486 CI_DRM_4995: 54f2281117133d77122fe452af3ea0bd5b6161aa @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10486: 77756b23dbf159cd95e7379afb52a211d31e41bb @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 77756b23dbf1 drm/i915/icl: Turn ON panel backlight 1c32080b780f drm/i915/icl: Ensure all cmd/data disptached to panel e127dd920d4c drm/i915/icl: Wait for header/payload credits release 548a139f5f39 drm/i915/icl: Power on DSI panel de595aced252 drm/i915/icl: Set max return packet size for DSI panel ceccb56049de drm/i915/icl: Define DSI panel programming registers 84bfd208073a drm/i915/icl: Enable DSI transcoders db56c3a6111b drm/i915/icl: Define TRANS_CONF register for DSI 71a178875a37 drm/i915/icl: Configure DSI transcoder timings a3128e344e49 drm/i915/icl: Define DSI transcoder timing registers 563acc8957df drm/i915/icl: Program TRANS_DDI_FUNC_CTL registers 4effa0a65f78 drm/i915/icl: Define TRANS_DDI_FUNC_CTL DSI registers cc0a0db6d765 drm/i915/icl: Configure DSI transcoders 190f8e155498 drm/i915/icl: Define TRANS_DSI_FUNC_CONF register aaddb12846e7 drm/i915/icl: Add macros for MMIO of DSI transcoder registers 3e59c4c21a59 drm/i915/icl: Get DSI transcoder for a given port 914a8a8a1c8f drm/i915/icl: Program TA_TIMING_PARAM registers f8fa35845dbc drm/i915/icl: Program DSI clock and data lane timing params 64d22dff235d drm/i915/icl: Make common DSI functions available eb89224c27f6 drm/i915/dsi: abstract intel_dsi_tlpx_ns() 12e0bd55c174 drm/i915/dsi: abstract dphy parameter init 675f0426321d drm/i915/dsi: refactor bitrate calculations in intel_dsi_vbt_init() f6f1e7f158e5 drm/i915: make encoder enable and disable hooks optional == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10486/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gen9+: Fix initial readout for Y tiled framebuffers
On Tue, Oct 16, 2018 at 09:26:05PM +, Patchwork wrote: > == Series Details == > > Series: drm/i915/gen9+: Fix initial readout for Y tiled framebuffers > URL : https://patchwork.freedesktop.org/series/51075/ > State : success Pushed to -dinq, thanks for the report, review and testing. > > == Summary == > > = CI Bug Log - changes from CI_DRM_4990_full -> Patchwork_10477_full = > > == Summary - SUCCESS == > > No regressions found. > > > > == Known issues == > > Here are the changes found in Patchwork_10477_full that come from known > issues: > > === IGT changes === > > Issues hit > > igt@gem_exec_await@wide-contexts: > shard-skl: PASS -> FAIL (fdo#106680) > > igt@gem_ppgtt@blt-vs-render-ctxn: > shard-skl: NOTRUN -> TIMEOUT (fdo#108039) > > igt@kms_atomic_transition@1x-modeset-transitions-nonblocking: > shard-skl: NOTRUN -> FAIL (fdo#108228) > > igt@kms_busy@extended-modeset-hang-newfb-render-a: > shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +1 > > igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: > shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) > > igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b: > shard-hsw: NOTRUN -> DMESG-WARN (fdo#107956) +2 > > igt@kms_cursor_crc@cursor-256x256-suspend: > shard-skl: NOTRUN -> FAIL (fdo#103191, fdo#103232) > > igt@kms_cursor_crc@cursor-256x85-sliding: > shard-apl: PASS -> FAIL (fdo#103232) > > igt@kms_cursor_crc@cursor-64x64-suspend: > shard-skl: PASS -> INCOMPLETE (fdo#104108) > > igt@kms_draw_crc@draw-method-xrgb2101010-pwrite-untiled: > shard-skl: NOTRUN -> FAIL (fdo#103184) +2 > > igt@kms_flip@blocking-absolute-wf_vblank: > shard-kbl: PASS -> DMESG-WARN (fdo#105345) > > igt@kms_flip@flip-vs-expired-vblank-interruptible: > shard-skl: PASS -> FAIL (fdo#105363) > > igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff: > shard-skl: NOTRUN -> FAIL (fdo#105682) +1 > > igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move: > shard-skl: NOTRUN -> FAIL (fdo#103167) +4 > > igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max: > shard-glk: NOTRUN -> FAIL (fdo#108145) +1 > > igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: > shard-skl: NOTRUN -> FAIL (fdo#108145) +3 > > igt@kms_setmode@basic: > shard-apl: PASS -> FAIL (fdo#99912) > > igt@pm_rpm@gem-mmap-cpu: > shard-skl: PASS -> INCOMPLETE (fdo#107807) > > > Possible fixes > > igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: > shard-glk: FAIL (fdo#103167) -> PASS > > > fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 > fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184 > fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 > fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 > fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108 > fdo#105345 https://bugs.freedesktop.org/show_bug.cgi?id=105345 > fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 > fdo#105682 https://bugs.freedesktop.org/show_bug.cgi?id=105682 > fdo#106680 https://bugs.freedesktop.org/show_bug.cgi?id=106680 > fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807 > fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 > fdo#108039 https://bugs.freedesktop.org/show_bug.cgi?id=108039 > fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145 > fdo#108228 https://bugs.freedesktop.org/show_bug.cgi?id=108228 > fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 > > > == Participating hosts (6 -> 6) == > > No changes in participating hosts > > > == Build changes == > > * Linux: CI_DRM_4990 -> Patchwork_10477 > > CI_DRM_4990: 0bd34d92e9a27784cb988a300619f497ca0e99ec @ > git://anongit.freedesktop.org/gfx-ci/linux > IGT_4681: 959d6f95cb1344e0c0dace5b236e17755826fac1 @ > git://anongit.freedesktop.org/xorg/app/intel-gpu-tools > Patchwork_10477: 030f7e7d682d65b11f75afd2a5e128e2b839130c @ > git://anongit.freedesktop.org/gfx-ci/linux > piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ > git://anongit.freedesktop.org/piglit > > == Logs == > > For more details see: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10477/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/quirks: pass dev_priv instead of drm dev to quirk code
== Series Details == Series: drm/i915/quirks: pass dev_priv instead of drm dev to quirk code URL : https://patchwork.freedesktop.org/series/5/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4995 -> Patchwork_10485 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/5/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10485 that come from known issues: === IGT changes === Issues hit igt@kms_flip@basic-flip-vs-dpms: fi-skl-6700hq: PASS -> DMESG-WARN (fdo#105998) igt@kms_flip@basic-flip-vs-modeset: fi-hsw-4770r: PASS -> DMESG-WARN (fdo#105602) Possible fixes igt@drv_selftest@live_hangcheck: fi-kbl-7560u: INCOMPLETE (fdo#108044) -> PASS igt@kms_flip@basic-flip-vs-modeset: fi-skl-6700hq: DMESG-WARN (fdo#105998) -> PASS fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602 fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998 fdo#108044 https://bugs.freedesktop.org/show_bug.cgi?id=108044 == Participating hosts (46 -> 42) == Missing(4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u == Build changes == * Linux: CI_DRM_4995 -> Patchwork_10485 CI_DRM_4995: 54f2281117133d77122fe452af3ea0bd5b6161aa @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10485: 329db538051ac65ec980cef352d143e6d9e1a273 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 329db538051a drm/i915/quirks: pass dev_priv instead of drm dev to quirk code == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10485/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2] drm/i915/quirks: pass dev_priv instead of drm dev to quirk code
Quoting Jani Nikula (2018-10-17 10:35:39) > Pass the type we want to simplify. No functional changes. > > v2: s/dev_priv/i915/g (Chris) > > Cc: Chris Wilson > Signed-off-by: Jani Nikula Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915: split out display quirks to a new file
On Tue, 16 Oct 2018, Chris Wilson wrote: > Quoting Jani Nikula (2018-10-16 15:42:27) >> Reduce intel_display.c by splitting out intel_quirks.c. No functional >> changes. >> >> Signed-off-by: Jani Nikula > > I was thinking intel_display_quirks, but it is dev_priv->quirks so that > seems over specific. > > Reviewed-by: Chris Wilson Thanks for the review, pushed 1/2 and sent v2 of 2/2. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2] drm/i915/quirks: pass dev_priv instead of drm dev to quirk code
Pass the type we want to simplify. No functional changes.
v2: s/dev_priv/i915/g (Chris)
Cc: Chris Wilson
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
drivers/gpu/drm/i915/intel_drv.h | 2 +-
drivers/gpu/drm/i915/intel_quirks.c | 39 +++-
3 files changed, 18 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 3999d02cd18c..8b569e17662b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -14914,7 +14914,7 @@ int intel_modeset_init(struct drm_device *dev)
INIT_WORK(&dev_priv->atomic_helper.free_work,
intel_atomic_helper_free_state_worker);
- intel_init_quirks(dev);
+ intel_init_quirks(dev_priv);
intel_init_pm(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index b5d6f6887c13..0e9a926fca04 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1982,7 +1982,7 @@ int intel_psr_wait_for_idle(const struct intel_crtc_state
*new_crtc_state,
u32 *out_value);
/* intel_quirks.c */
-void intel_init_quirks(struct drm_device *dev);
+void intel_init_quirks(struct drm_i915_private *dev_priv);
/* intel_runtime_pm.c */
int intel_power_domains_init(struct drm_i915_private *);
diff --git a/drivers/gpu/drm/i915/intel_quirks.c
b/drivers/gpu/drm/i915/intel_quirks.c
index a41dd552e399..ec2b0fc92b8b 100644
--- a/drivers/gpu/drm/i915/intel_quirks.c
+++ b/drivers/gpu/drm/i915/intel_quirks.c
@@ -10,10 +10,9 @@
/*
* Some machines (Lenovo U160) do not work with SSC on LVDS for some reason
*/
-static void quirk_ssc_force_disable(struct drm_device *dev)
+static void quirk_ssc_force_disable(struct drm_i915_private *i915)
{
- struct drm_i915_private *dev_priv = to_i915(dev);
- dev_priv->quirks |= QUIRK_LVDS_SSC_DISABLE;
+ i915->quirks |= QUIRK_LVDS_SSC_DISABLE;
DRM_INFO("applying lvds SSC disable quirk\n");
}
@@ -21,29 +20,25 @@ static void quirk_ssc_force_disable(struct drm_device *dev)
* A machine (e.g. Acer Aspire 5734Z) may need to invert the panel backlight
* brightness value
*/
-static void quirk_invert_brightness(struct drm_device *dev)
+static void quirk_invert_brightness(struct drm_i915_private *i915)
{
- struct drm_i915_private *dev_priv = to_i915(dev);
- dev_priv->quirks |= QUIRK_INVERT_BRIGHTNESS;
+ i915->quirks |= QUIRK_INVERT_BRIGHTNESS;
DRM_INFO("applying inverted panel brightness quirk\n");
}
/* Some VBT's incorrectly indicate no backlight is present */
-static void quirk_backlight_present(struct drm_device *dev)
+static void quirk_backlight_present(struct drm_i915_private *i915)
{
- struct drm_i915_private *dev_priv = to_i915(dev);
- dev_priv->quirks |= QUIRK_BACKLIGHT_PRESENT;
+ i915->quirks |= QUIRK_BACKLIGHT_PRESENT;
DRM_INFO("applying backlight present quirk\n");
}
/* Toshiba Satellite P50-C-18C requires T12 delay to be min 800ms
* which is 300 ms greater than eDP spec T12 min.
*/
-static void quirk_increase_t12_delay(struct drm_device *dev)
+static void quirk_increase_t12_delay(struct drm_i915_private *i915)
{
- struct drm_i915_private *dev_priv = to_i915(dev);
-
- dev_priv->quirks |= QUIRK_INCREASE_T12_DELAY;
+ i915->quirks |= QUIRK_INCREASE_T12_DELAY;
DRM_INFO("Applying T12 delay quirk\n");
}
@@ -51,11 +46,9 @@ static void quirk_increase_t12_delay(struct drm_device *dev)
* GeminiLake NUC HDMI outputs require additional off time
* this allows the onboard retimer to correctly sync to signal
*/
-static void quirk_increase_ddi_disabled_time(struct drm_device *dev)
+static void quirk_increase_ddi_disabled_time(struct drm_i915_private *i915)
{
- struct drm_i915_private *dev_priv = to_i915(dev);
-
- dev_priv->quirks |= QUIRK_INCREASE_DDI_DISABLED_TIME;
+ i915->quirks |= QUIRK_INCREASE_DDI_DISABLED_TIME;
DRM_INFO("Applying Increase DDI Disabled quirk\n");
}
@@ -63,12 +56,12 @@ struct intel_quirk {
int device;
int subsystem_vendor;
int subsystem_device;
- void (*hook)(struct drm_device *dev);
+ void (*hook)(struct drm_i915_private *i915);
};
/* For systems that don't have a meaningful PCI subdevice/subvendor ID */
struct intel_dmi_quirk {
- void (*hook)(struct drm_device *dev);
+ void (*hook)(struct drm_i915_private *i915);
const struct dmi_system_id (*dmi_id_list)[];
};
@@ -154,9 +147,9 @@ static struct intel_quirk intel_quirks[] = {
{ 0x3184, 0x1849, 0x2212, quirk_increase_ddi_disabled_time },
};
-void intel_init_quirks(struct drm_device *dev)
+void intel_init_quirks(struct drm_i915_private *i915)
{
- struct pci_dev *d = dev->pdev;
+ struct pci_dev *d = i915->drm.pdev;
int i;
for (i = 0; i < ARRA
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915/fbdev: Use an ordinary worker to avoid async deadlock
== Series Details ==
Series: series starting with [1/4] drm/i915/fbdev: Use an ordinary worker to
avoid async deadlock
URL : https://patchwork.freedesktop.org/series/51000/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4995 -> Patchwork_10484 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_10484 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10484, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/51000/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_10484:
=== IGT changes ===
Possible regressions
igt@debugfs_test@read_all_entries:
fi-ilk-650: PASS -> DMESG-WARN
igt@drv_selftest@live_gtt:
fi-kbl-7500u: PASS -> DMESG-WARN +18
igt@drv_selftest@live_objects:
fi-skl-6770hq: PASS -> DMESG-WARN +18
igt@pm_rpm@module-reload:
fi-bsw-kefka: PASS -> DMESG-WARN
fi-bsw-n3050: PASS -> DMESG-WARN
Warnings
igt@core_prop_blob@basic:
fi-kbl-soraka: PASS -> SKIP
{fi-apl-guc}: PASS -> SKIP
igt@kms_addfb_basic@addfb25-modifier-no-flag:
fi-cfl-guc: PASS -> SKIP +76
igt@kms_addfb_basic@addfb25-y-tiled:
fi-kbl-r: PASS -> SKIP +80
igt@kms_addfb_basic@bad-pitch-32:
fi-whl-u: PASS -> SKIP +80
igt@kms_addfb_basic@bad-pitch-63:
fi-kbl-7567u: PASS -> SKIP +76
igt@kms_addfb_basic@basic-y-tiled:
fi-cfl-8109u: PASS -> SKIP +76
fi-cfl-s3: PASS -> SKIP +80
igt@kms_addfb_basic@invalid-get-prop-any:
fi-skl-6600u: PASS -> SKIP +80
fi-ivb-3770:PASS -> SKIP +77
fi-kbl-7560u: PASS -> SKIP +80
igt@kms_addfb_basic@invalid-set-prop:
fi-hsw-4770:PASS -> SKIP +79
igt@kms_addfb_basic@no-handle:
fi-cfl-8700k: PASS -> SKIP +76
igt@kms_addfb_basic@too-high:
fi-glk-j4005: PASS -> SKIP +76
igt@kms_addfb_basic@unused-modifier:
fi-bdw-5557u: PASS -> SKIP +75
fi-kbl-8809g: PASS -> SKIP +38
fi-kbl-guc: PASS -> SKIP +39
igt@kms_addfb_basic@unused-offsets:
fi-bwr-2160:PASS -> SKIP +66
fi-blb-e6850: PASS -> SKIP +66
igt@kms_addfb_basic@unused-pitches:
fi-kbl-x1275: PASS -> SKIP +39
fi-skl-gvtdvm: PASS -> SKIP +74
igt@kms_chamelium@hdmi-crc-fast:
fi-skl-6700k2: PASS -> SKIP +80
igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size:
fi-skl-guc: PASS -> SKIP +76
igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size:
fi-bsw-n3050: PASS -> SKIP +60
igt@kms_flip@basic-flip-vs-dpms:
fi-ilk-650: PASS -> SKIP +70
fi-skl-6770hq: PASS -> SKIP +76
igt@kms_flip@basic-flip-vs-modeset:
fi-cnl-u: PASS -> SKIP +80
igt@kms_flip@basic-flip-vs-wf_vblank:
fi-skl-6260u: PASS -> SKIP +76
igt@kms_force_connector_basic@force-edid:
fi-snb-2520m: PASS -> SKIP +70
igt@kms_pipe_crc_basic@hang-read-crc-pipe-b:
fi-bxt-j4205: PASS -> SKIP +76
igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
fi-elk-e7500: PASS -> SKIP +66
igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b:
fi-bsw-kefka: PASS -> SKIP +68
igt@kms_pipe_crc_basic@read-crc-pipe-b:
fi-byt-clapper: PASS -> SKIP +68
igt@kms_pipe_crc_basic@read-crc-pipe-c-frame-sequence:
fi-bxt-dsi: PASS -> SKIP +76
igt@kms_psr@sprite_plane_onoff:
fi-skl-6700hq: PASS -> SKIP +79
igt@pm_rpm@basic-rte:
fi-skl-iommu: PASS -> SKIP +76
igt@prime_vgem@basic-fence-flip:
fi-hsw-4770r: PASS -> SKIP +75
fi-kbl-7500u: PASS -> SKIP +79
fi-icl-u2: PASS -> SKIP +81
== Known issues ==
Here are the changes found in Patchwork_10484 that come from known issues:
=== IGT changes ===
Issues hit
igt@debugfs_test@read_all_entries:
{fi-apl-guc}: PASS -> INCOMPLETE (fdo#106693) +1
Possible fixes
igt@drv_selftest@live_hangcheck:
fi-kbl-7560u: INCOMPLETE (fdo#108044) -> PASS
igt@kms_chamelium@common-hpd-after-suspend:
fi-kbl-7500u: DMESG-WARN (fdo#105602, fdo#102505, fdo#105079) ->
SKIP
igt@kms_flip@basic-flip-vs-modeset:
fi-skl-6700hq: DMESG-WARN (fdo#105998) -> SKIP
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#102505 https://bugs.freedesktop
Re: [Intel-gfx] [RFC v1 00/31] kunit: Introducing KUnit, the Linux kernel unit testing framework
On Tue, Oct 16, 2018 at 04:50:49PM -0700, Brendan Higgins wrote: > This patch set proposes KUnit, a lightweight unit testing and mocking > framework for the Linux kernel. > > Unlike Autotest and kselftest, KUnit is a true unit testing framework; > it does not require installing the kernel on a test machine or in a VM > and does not require tests to be written in userspace running on a host > kernel. Additionally, KUnit is fast: From invocation to completion KUnit > can run several dozen tests in under a second. Currently, the entire > KUnit test suite for KUnit runs in under a second from the initial > invocation (build time excluded). > > KUnit is heavily inspired by JUnit, Python's unittest.mock, and > Googletest/Googlemock for C++. KUnit provides facilities for defining > unit test cases, grouping related test cases into test suites, providing > common infrastructure for running tests, mocking, spying, and much more. > > ## What's so special about unit testing? > > A unit test is supposed to test a single unit of code in isolation, > hence the name. There should be no dependencies outside the control of > the test; this means no external dependencies, which makes tests orders > of magnitudes faster. Likewise, since there are no external dependencies, > there are no hoops to jump through to run the tests. Additionally, this > makes unit tests deterministic: a failing unit test always indicates a > problem. Finally, because unit tests necessarily have finer granularity, > they are able to test all code paths easily solving the classic problem > of difficulty in exercising error handling code. > > ## Is KUnit trying to replace other testing frameworks for the kernel? > > No. Most existing tests for the Linux kernel are end-to-end tests, which > have their place. A well tested system has lots of unit tests, a > reasonable number of integration tests, and some end-to-end tests. KUnit > is just trying to address the unit test space which is currently not > being addressed. > > ## More information on KUnit > > There is a bunch of documentation near the end of this patch set that > describes how to use KUnit and best practices for writing unit tests. > For convenience I am hosting the compiled docs here: > https://google.github.io/kunit-docs/third_party/kernel/docs/ We've started our own unit test framework (very early, and not any real infrastructure yet) under drivers/gpu/drm/selftests. They're all meant to test functions and small pieces of functionality of our libraries in isolation, without any need for a real (or virtual) gpu driver. It kinda integrates both with kselftests and with our graphics test suite, but directly running tests using UML as part of the build process sounds much, much better. Having proper and standardized infrastructure for kernel unit tests sounds terrific. In other words: I want. Please keep dri-de...@lists.freedesktop.org in the loop on future versions. Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2] shmem, drm/i915: mark pinned shmemfs pages as unevictable
The i915 driver uses shmemfs to allocate backing storage for gem
objects. These shmemfs pages can be pinned (increased ref count) by
shmem_read_mapping_page_gfp(). When a lot of pages are pinned, vmscan
wastes a lot of time scanning these pinned pages. In some extreme case,
all pages in the inactive anon lru are pinned, and only the inactive
anon lru is scanned due to inactive_ratio, the system cannot swap and
invokes the oom-killer. Mark these pinned pages as unevictable to speed
up vmscan.
By exporting shmem_unlock_mapping, drivers can: 1. mark a shmemfs
address space as unevictable with mapping_set_unevictable(), pages in
the address space will be moved to unevictable list in vmscan. 2. mark
an address space as evictable with mapping_clear_unevictable(), and move
these pages back to evictable list with shmem_unlock_mapping().
This patch was inspired by Chris Wilson's change [1].
[1]: https://patchwork.kernel.org/patch/9768741/
Signed-off-by: Kuo-Hsin Yang
---
Changes for v2:
Squashed the two patches.
Documentation/vm/unevictable-lru.rst | 4 +++-
drivers/gpu/drm/i915/i915_gem.c | 8
mm/shmem.c | 2 ++
3 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/Documentation/vm/unevictable-lru.rst
b/Documentation/vm/unevictable-lru.rst
index fdd84cb8d511..a812fb55136d 100644
--- a/Documentation/vm/unevictable-lru.rst
+++ b/Documentation/vm/unevictable-lru.rst
@@ -143,7 +143,7 @@ using a number of wrapper functions:
Query the address space, and return true if it is completely
unevictable.
-These are currently used in two places in the kernel:
+These are currently used in three places in the kernel:
(1) By ramfs to mark the address spaces of its inodes when they are created,
and this mark remains for the life of the inode.
@@ -154,6 +154,8 @@ These are currently used in two places in the kernel:
swapped out; the application must touch the pages manually if it wants to
ensure they're in memory.
+ (3) By the i915 driver to mark pinned address space until it's unpinned.
+
Detecting Unevictable Pages
---
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index fcc73a6ab503..e0ff5b736128 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2390,6 +2390,7 @@ i915_gem_object_put_pages_gtt(struct drm_i915_gem_object
*obj,
{
struct sgt_iter sgt_iter;
struct page *page;
+ struct address_space *mapping;
__i915_gem_object_release_shmem(obj, pages, true);
@@ -2409,6 +2410,10 @@ i915_gem_object_put_pages_gtt(struct drm_i915_gem_object
*obj,
}
obj->mm.dirty = false;
+ mapping = file_inode(obj->base.filp)->i_mapping;
+ mapping_clear_unevictable(mapping);
+ shmem_unlock_mapping(mapping);
+
sg_free_table(pages);
kfree(pages);
}
@@ -2551,6 +2556,7 @@ static int i915_gem_object_get_pages_gtt(struct
drm_i915_gem_object *obj)
* Fail silently without starting the shrinker
*/
mapping = obj->base.filp->f_mapping;
+ mapping_set_unevictable(mapping);
noreclaim = mapping_gfp_constraint(mapping, ~__GFP_RECLAIM);
noreclaim |= __GFP_NORETRY | __GFP_NOWARN;
@@ -2664,6 +2670,8 @@ static int i915_gem_object_get_pages_gtt(struct
drm_i915_gem_object *obj)
err_pages:
for_each_sgt_page(page, sgt_iter, st)
put_page(page);
+ mapping_clear_unevictable(mapping);
+ shmem_unlock_mapping(mapping);
sg_free_table(st);
kfree(st);
diff --git a/mm/shmem.c b/mm/shmem.c
index 446942677cd4..d1ce34c09df6 100644
--- a/mm/shmem.c
+++ b/mm/shmem.c
@@ -786,6 +786,7 @@ void shmem_unlock_mapping(struct address_space *mapping)
cond_resched();
}
}
+EXPORT_SYMBOL_GPL(shmem_unlock_mapping);
/*
* Remove range of pages and swap entries from radix tree, and free them.
@@ -3874,6 +3875,7 @@ int shmem_lock(struct file *file, int lock, struct
user_struct *user)
void shmem_unlock_mapping(struct address_space *mapping)
{
}
+EXPORT_SYMBOL_GPL(shmem_unlock_mapping);
#ifdef CONFIG_MMU
unsigned long shmem_get_unmapped_area(struct file *file,
--
2.19.1.331.ge82ca0e54c-goog
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Re: [Intel-gfx] [PATCH] drm/i915/huc: Normalize HuC status returned by I915_PARAM_HAS_HUC
Quoting Michal Wajdeczko (2018-10-16 12:34:14)
> In response for I915_PARAM_HAS_HUC we are returning value that
> indicates if HuC firmware was loaded and verified. However, our
> previously used positive value was based on specific register bit
> which is about to change on future platform. Let's normalize our
> return values to 0 and 1 before clients will start to use Gen9 value.
>
> Signed-off-by: Michal Wajdeczko
> Cc: Michal Winiarski
> Cc: Joonas Lahtinen
> Cc: Haihao Xiang
> ---
> drivers/gpu/drm/i915/intel_huc.c | 9 +
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_huc.c
> b/drivers/gpu/drm/i915/intel_huc.c
> index 37ef540d..46498aa 100644
> --- a/drivers/gpu/drm/i915/intel_huc.c
> +++ b/drivers/gpu/drm/i915/intel_huc.c
> @@ -108,8 +108,9 @@ int intel_huc_auth(struct intel_huc *huc)
> * This function reads status register to verify if HuC
> * firmware was successfully loaded.
> *
> - * Returns positive value if HuC firmware is loaded and verified
> - * and -ENODEV if HuC is not present.
> + * Returns: 1 if HuC firmware is loaded and verified,
> + * 0 if HuC firmware is not loaded and -ENODEV if HuC
> + * is not present on this platform.
> */
> int intel_huc_check_status(struct intel_huc *huc)
> {
> @@ -120,8 +121,8 @@ int intel_huc_check_status(struct intel_huc *huc)
> return -ENODEV;
>
> intel_runtime_pm_get(dev_priv);
> - status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
> + status = I915_READ(HUC_STATUS2);
> intel_runtime_pm_put(dev_priv);
>
> - return status;
> + return status & HUC_FW_VERIFIED ? 1 : 0;
Wouldn't it have been simpler to just change
u32 status
to
bool status
Then I wouldn't even have to look at a ternary for a boolean.
-Chris
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Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Fix Gen9 GuC loading workarounds
Quoting Daniele Ceraolo Spurio (2018-10-17 00:03:38)
>
>
> On 16/10/18 01:59, Michal Wajdeczko wrote:
> > In commit 4502e9ec820d ("drm/i915/uc: Unify firmware loading") we
> > stopped converting errors detected during firmware transfer into
> > -EAGAIN and this indirectly killed our workarounds for Gen9 GuC.
> > Reactivate those workarounds by looking for actual -ETIMEDOUT error.
> >
> > Testcase: igt@drv_selftest@live_hangcheck
> > Reported-by: Daniele Ceraolo Spurio
> > References: commit 4502e9ec820d ("drm/i915/uc: Unify firmware loading")
>
> Reviewed-by: Daniele Ceraolo Spurio
Thanks for the fix and review, pushed.
-Chris
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Re: [Intel-gfx] [PATCH 2/2] drm/i915: Ensure intel_engine_init_execlist() builds with Clang
On Tue, 16 Oct 2018, Nick Desaulniers wrote: > On Tue, Oct 16, 2018 at 8:35 AM Stephen Boyd wrote: >> >> Quoting Jani Nikula (2018-10-16 05:29:38) >> > Clang build with UBSAN enabled leads to the following build error: > > I'm overjoyed that you're testing this configuration! If you find more > bugs, we're happy to help triage if you let us know about them here: > https://github.com/ClangBuiltLinux/linux/issues. Everyone, thanks for the patches/reports, reviews, and testing! These two have now been pushed to drm-intel-next-queued; due to timing they're expected to land upstream in the merge window for v4.21 i.e. not the imminent one. (So much for the quick turnaround! ;) Also glad to connect you all here. :) So I don't mind making small concessions to Clang build such as these in the interest of gaining better static analysis. Our (i915) own pre-merge build testing uses primarily gcc and sparse, with a bunch of extra flags (see the top of drivers/gpu/drm/i915/Makefile), but I'm not sure about adding Clang to the mix anytime soon. Without a tight and constant feedback loop new issues will pop up though. Maybe we'll spot inline function use in constant expressions in review, maybe we don't. I'm sure there are other Clang specific issues. Do you have any plans for setting up something like the 0day? Without the feedback loop I think you'll take one step back for every two steps you progress... BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
