Cacheline selection is only needed if we actually manage to reserve a
doorbell.

Cc: Michal Wajdeczko <michal.wajdec...@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdec...@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>
---
 drivers/gpu/drm/i915/intel_guc_submission.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c 
b/drivers/gpu/drm/i915/intel_guc_submission.c
index b089e5283307..8c3b5a9facee 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -955,6 +955,10 @@ guc_client_alloc(struct drm_i915_private *dev_priv,
        }
        client->vaddr = vaddr;
 
+       ret = reserve_doorbell(client);
+       if (ret)
+               goto err_vaddr;
+
        client->doorbell_offset = __select_cacheline(guc);
 
        /*
@@ -967,10 +971,6 @@ guc_client_alloc(struct drm_i915_private *dev_priv,
        else
                client->proc_desc_offset = (GUC_DB_SIZE / 2);
 
-       ret = reserve_doorbell(client);
-       if (ret)
-               goto err_vaddr;
-
        DRM_DEBUG_DRIVER("new priority %u client %p for engine(s) 0x%x: 
stage_id %u\n",
                         priority, client, client->engines, client->stage_id);
        DRM_DEBUG_DRIVER("doorbell id %u, cacheline offset 0x%lx\n",
-- 
2.19.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to