Re: [Intel-gfx] Specific resolution without monitor

2012-05-19 Thread paulo louro

Hey Carl,
I had the same problem as you.
So i wanted my MediaCenter to start up at for example 15h just before i get 
home. But since my TV and my AV receiver where in standby the resolution 
detected by the drm driver as always wrong. So to by pass this i have changed a 
bit intel drm driver and hard coded my TV EDID data directly into the driver. 
This ways every time the MC starts up it thinks is connected to the PC and 
setups the right resolution. 
Now this is not a simple thing to do since you will need to compile the linux 
kernel, you can also only compile the drm driver/module for sure but i dont 
know how to do that 
So what i did was, with some linux software, named edid grab or read or 
something, i extracted my TV edid in HEX format. Then i changed the function 
drm_do_get_edid inside the drm_edid.c file located at the linux 
kernel/drivers/gpu/drm/  to ignore the i2c bus and to use the edid i defined 
inside my block1 byte array. Also needed to comment out some code, since EDID 
something comes in multiple messages. Below you can find my modifications.

I hope this help you out. Maybe this is not the right way of doing it, but it 
worked for me. I´m not and expert on DRM or I915 driver, just wanted to make it 
worked so i hard coded it all. You can always improve and maybe add the 
function of reading the EDID from a file like the NVIDIA driver has. 


static u8 *drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter 
*adapter){   int i, j = 0, valid_extensions = 0; u8 *block, *new;   
 u8 block1[256] = 
{0x00,0xff,0xff,0xff,0xff,0xff,0xff,0x00,0x34,0xa9,0xa4,0xa0,0x01,0x01,0x01,0x01,
 
0x00,0x14,0x01,0x03,0x80,0x00,0x00,0x78,0x0a,0xda,0xff,0xa3,0x58,0x4a,0xa2,0x29,

0x17,0x49,0x4b,0x00,0x00,0x00,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,

0x01,0x01,0x01,0x01,0x01,0x01,0x02,0x3a,0x80,0xd0,0x72,0x38,0x2d,0x40,0x10,0x2c,

0x45,0x80,0xba,0x88,0x21,0x00,0x00,0x1e,0x02,0x3a,0x80,0x18,0x71,0x38,0x2d,0x40,

0x58,0x2c,0x45,0x00,0xba,0x88,0x21,0x00,0x00,0x1e,0x00,0x00,0x00,0xfc,0x00,0x50,

0x61,0x6e,0x61,0x73,0x6f,0x6e,0x69,0x63,0x2d,0x54,0x56,0x0a,0x00,0x00,0x00,0xfd,

0x00,0x17,0x3d,0x0f,0x44,0x0f,0x00,0x0a,0x20,0x20,0x20,0x20,0x20,0x20,0x01,0xd3,

0x02,0x03,0x36,0x72,0x50,0x9f,0x90,0x14,0x05,0x20,0x13,0x04,0x12,0x03,0x11,0x02,

0x16,0x07,0x15,0x06,0x01,0x23,0x09,0x07,0x01,0x78,0x03,0x0c,0x00,0x10,0x00,0xb8,

0x26,0x2f,0xc0,0x0a,0x81,0x49,0xff,0xfc,0x06,0x16,0x08,0x00,0x18,0x00,0x00,0x00,

0x00,0x00,0xe3,0x05,0x1f,0x01,0x01,0x1d,0x80,0xd0,0x72,0x1c,0x16,0x20,0x10,0x2c,

0x25,0x80,0xba,0x88,0x21,0x00,0x00,0x9e,0x01,0x1d,0x80,0x18,0x71,0x1c,0x16,0x20,

0x58,0x2c,0x25,0x00,0xba,0x88,0x21,0x00,0x00,0x9e,0x01,0x1d,0x00,0xbc,0x52,0xd0,

0x1e,0x20,0xb8,0x28,0x55,0x40,0xba,0x88,0x21,0x00,0x00,0x1e,0x01,0x1d,0x00,0x72,

0x51,0xd0,0x1e,0x20,0x6e,0x28,0x55,0x00,0xba,0x88,0x21,0x00,0x00,0x1e,0x00,0xb6};
//if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)   //  
return NULL;
if ((block = kmalloc(EDID_LENGTH*2, GFP_KERNEL)) == NULL)   
return NULL;
/* base block fetch */  //for (i = 0; i  4; i++) { //  
if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))  //  
goto out;   //  if (drm_edid_block_valid(block))//  
break;  //  if (i == 0  drm_edid_is_zero(block, EDID_LENGTH)) {   //  
connector-null_edid_counter++; //  goto carp;  //  
}   //} //if (i == 4)   //  goto carp;
//DRM_DEBUG_KMS(DUMP EDID START\n);   //for(i = 0 ; i  EDID_LENGTH; 
i += 16 )//  
DRM_DEBUG_KMS(0x%x,0x%x,0x%x,0x%x,0x%x,0x%x,0x%x,0x%x,0x%x,0x%x,0x%x,0x%x,0x%x,0x%x,0x%x,0x%x\n,block[i],block[i+1],block[i+2],block[i+3],block[i+4],block[i+5],block[i+6],block[i+7],block[i+8],block[i+9],block[i+10],block[i+11],block[i+12],block[i+13],block[i+14],block[i+15]);
 //DRM_DEBUG_KMS(\nDUMP EDID END\n);
DRM_DEBUG_KMS(Overwriting EDID\n);//DRM_DEBUG_KMS(EDID_LENGTH: 
%d\n,EDID_LENGTH);
for(i = 0; i  256; i++)block[i]=block1[i]; 
return block;
/* if there's no extensions, we're done */  if (block[0x7e] == 0)   
return block;
new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL); 
if (!new)   goto out;   block = new;
for (j = 1; j = block[0x7e]; j++) {for (i = 0; i  4; i++) 
{   if (drm_do_probe_ddc_edid(adapter,  
  block + (valid_extensions + 1) * EDID_LENGTH, 
  j, EDID_LENGTH))  goto out;   
if (drm_edid_block_valid(block + (valid_extensions + 

[Intel-gfx] [intel-gfx] i915 - AV receiver reports no RGB input, colors look strange

2012-01-30 Thread paulo louro

Hello all,
Once more i came to you guys, requesting help for a problem on the i915 drivers.
For testing the new interlace mode on kernel 3.3.0-RC1+, i compiled the kernel 
source.  But when running it the colors on the TV look strange. 
Maybe some one can see some strange stuff on my intel register, when running at 
1080p 50hz.
Here is the diff between a bad (strange colors on TV/ AV says no RGB mode) and 
a good mode from kernel 3.0.0-12-generic ubuntu
root@SERVER:/# diff bad.txt good.txt 34c34   DSPASURF: 
0x0104d000---   DSPASURF: 0x0084c00070c70   
PCH_DREF_CONTROL: 0x0400 (cpu source disable, ssc_source disable, 
nonspread_source enable, superspread_source disable, ssc4_mode downspread, ssc1 
disable, ssc4 disable)---   PCH_DREF_CONTROL: 0x1402 (cpu 
source disable, ssc_source enable, nonspread_source enable, superspread_source 
disable, ssc4_mode downspread, ssc1 enable, ssc4 disable)

Thanks,--Paulo Louro  ___
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Re: [Intel-gfx] [Working on 3.0.0-12] RGB Problem with Intel i915 driver, i3 2010T, RGB color output over HDMI

2012-01-25 Thread paulo louro

Hello all again,
This problem is new to kernel 3.2.0-rc6, here is the diff between the bad and 
good register dump. I tried to correct the register but without any luck...
Marked with  is not working kernel 3.2.0Marked with  works. kernel 3.0.0-12 / 
also works fine in LiveCD of Ubuntu 11.10

GEN6_INSTDONE_1: 0xGEN6_INSTDONE_2: 
0x---GEN6_INSTDONE_1: 0xfffe
GEN6_INSTDONE_2: 0x31c31   DSPACNTR: 0xd8004000 
(enabled)---   DSPACNTR: 0xd8004400 (enabled)34c34
   DSPASURF: 0x00064000---   DSPASURF: 
0x0665d00070c70   PCH_DREF_CONTROL: 0x0400 (cpu source 
disable, ssc_source disable, nonspread_source enable, superspread_source 
disable, ssc4_mode downspread, ssc1 disable, ssc4 disable)---   
PCH_DREF_CONTROL: 0x1400 (cpu source disable, ssc_source enable, 
nonspread_source enable, superspread_source disable, ssc4_mode downspread, ssc1 
disable, ssc4 disable)79,80c79,80   PCH_FPA0: 0x00021007 
(n = 2, m1 = 16, m2 = 7)   PCH_FPA1: 0x00021007 (n = 2, m1 
= 16, m2 = 7)---   PCH_FPA0: 0x00c21007 (n = 2, m1 = 16, 
m2 = 7)   PCH_FPA1: 0x00c21007 (n = 2, m1 = 16, m2 = 7)
From: paulo_lo...@msn.com
To: intel-gfx@lists.freedesktop.org
Subject: RE: [Intel-gfx] RGB Problem with Intel i915 driver, i3 2010T, RGB 
color output over HDMI
Date: Tue, 24 Jan 2012 15:24:04 +







Hello all,
This e-mail is a continuation of my previews one regarding HDMI modeline output 
problems. So far with the help of Rodrigo Vivi i have manage to output the 
1920x1080p@60hz mode over HDMI to my AV receiver. (To fix my previews problem i 
inserted the EDID frame directly inside drm_edid.c file. So i dont read EDID 
from the AV i2c bus anymore. So the mode is always set correctly.)
The issue now is that the AV reports that the signal is not in RGB mode and the 
image shows some strange colors, specially on the white color (showing like 
greens).
Does any one has any idea if this is a problem on the EDID or inside drm/i915? 
All comments and help are very appreciated.-- Paulo Louro


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Re: [Intel-gfx] [PROBLEM FOUND] Problem No HDMI when AV/TV in standby mode

2012-01-25 Thread paulo louro

An update on this issue.
The registers VSYNCSHIFT PIPEACONF and TRANSACONF are been set to interlace 
mode at GRUB startup.
Test:
Boot computer with AV/TV in standby.Force GRUB to show menu selection.Turn on 
AV/TV and select PC HDMI while in GRUB menu.GRUB shows up with 1080i 50hz.
So is it GRUB setting the mode or the BIOS? This may happen to me since my AV 
is telling via EDID that the preferred mode is interlaced?

-- Paulo Louro

 Date: Tue, 24 Jan 2012 23:28:36 +0100
 From: dan...@ffwll.ch
 To: paulo_lo...@msn.com
 CC: intel-gfx@lists.freedesktop.org
 Subject: Re: [Intel-gfx] [PROBLEM FOUND] Problem No HDMI when AV/TV in 
 standby mode
 
 On Tue, Jan 24, 2012 at 10:03:57PM +, paulo louro wrote:
  
  Very ugly hack, 
  In file ---  intel_display.c function ---   
  ironlake_crtc_mode_set
  temp = I915_READ(_TRANSACONF);  I915_WRITE(_TRANSACONF,  temp  
  ~(721)); 
  I915_WRITE( 0x60028, 0x);   //VSYNCSHIFT_A— Vertical Sync Shift 
  Register   This register needs to be 0x for progressive mode 
  I915_WRITE(PIPECONF(pipe), pipeconf);   POSTING_READ(PIPECONF(pipe));
  In file ---  i915_reg.h #define   
  PIPECONF_INTERLACE_W_FIELD_INDICATION(7  21)  // ( 6  21)  
  Not sure why the PIPECONF MASK is 110 and not 111, from intel pdf 000b  
  Progressive Fetch / Progressive display / 001b PF-ID Progressive Fetch / 
  Interlaced display (HDMI) Requires panel fitting to be enabled 
 
 Wohoo, this is awesome. Can you maybe go right ahead and create a patch
 for this? Should be nothing more than checking for an interlaced mode and
 banging the right values into these registers ...
 
 Yours, Daniel
 -- 
 Daniel Vetter
 Mail: dan...@ffwll.ch
 Mobile: +41 (0)79 365 57 48
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Re: [Intel-gfx] RGB Problem with Intel i915 driver, i3 2010T, RGB color output over HDMI

2012-01-24 Thread paulo louro

Hello all,
This e-mail is a continuation of my previews one regarding HDMI modeline output 
problems. So far with the help of Rodrigo Vivi i have manage to output the 
1920x1080p@60hz mode over HDMI to my AV receiver. (To fix my previews problem i 
inserted the EDID frame directly inside drm_edid.c file. So i dont read EDID 
from the AV i2c bus anymore. So the mode is always set correctly.)
The issue now is that the AV reports that the signal is not in RGB mode and the 
image shows some strange colors, specially on the white color (showing like 
greens).
Does any one has any idea if this is a problem on the EDID or inside drm/i915? 
All comments and help are very appreciated.-- Paulo Louro


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Re: [Intel-gfx] [PROBLEM FOUND] Problem No HDMI when AV/TV in standby mode

2012-01-24 Thread paulo louro

Very ugly hack, 
In file ---  intel_display.c function ---   
ironlake_crtc_mode_set
temp = I915_READ(_TRANSACONF);  I915_WRITE(_TRANSACONF,  temp  
~(721)); 
I915_WRITE( 0x60028, 0x);   //VSYNCSHIFT_A— Vertical Sync Shift 
Register   This register needs to be 0x for progressive mode 
I915_WRITE(PIPECONF(pipe), pipeconf);   POSTING_READ(PIPECONF(pipe));
In file ---  i915_reg.h #define   
PIPECONF_INTERLACE_W_FIELD_INDICATION(7  21)  // ( 6  21)  
Not sure why the PIPECONF MASK is 110 and not 111, from intel pdf 000b  
Progressive Fetch / Progressive display / 001b PF-ID Progressive Fetch / 
Interlaced display (HDMI) Requires panel fitting to be enabled 

Next will be to solve the RGB problem i have.

From: paulo_lo...@msn.com
To: intel-gfx@lists.freedesktop.org
Date: Tue, 24 Jan 2012 20:38:57 +
Subject: Re: [Intel-gfx] [PROBLEM FOUND] Problem No HDMI when AV/TV in standby 
mode







Hello all,
I think i have found why there is a problem with my Onkyo AV when the TV/AV are 
in standby mode.
I run the following test.
Boot PC with AV/TV in standby and dump intel registers to a file TEST1Boot PC 
with AV/TV on and dump intel register to file TEST2Using the diff to find the 
difference between both files i found the following:
root@SERVER:~# diff test1 test214c14  PIPEACONF: 
0xc020 (enabled, active, 8bpc)---  PIPEACONF: 
0xc000 (enabled, active, 8bpc)21c21   VSYNCSHIFT_A: 
0x038c---   VSYNCSHIFT_A: 0x125c125   
  TRANSACONF: 0xc060 (enable, active)--- 
TRANSACONF: 0xc000 (enable, active)
So register PIPEACONF, VSYNCSHIFT_A and TRANSACONF are different. By checking 
intel documentation i found that this registers are responsibly for setting up 
the progressive/interleave mode. As so im thinking that this registers are not 
being reinitialize or cleaned. 
Is this possible? 
Since im up for one more test i used intel_reg_read/write to modified the 
registers and correct the values, to my surprise after writing to all the 
register the AV shows my desktop correctly.
My other question is if they need to be reinitialized where in the code shall 
this be done? I'm up for writing a small patch to fix this issue, just need 
some one to point me on the right direction.
Thanks--Paulo Louro





  

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[Intel-gfx] Problem Intel i915 driver, i3 2010T, HDMI output modes problems

2012-01-03 Thread paulo louro
 clock 
  67.5KHzv: height 1080 start 1084 end 1089 total 1125   clock  
 60.0Hz  1920x1080 (0xb9)  148.5MHz +HSync +VSync +preferredh: width  
1920 start 2448 end 2492 total 2640 skew0 clock   56.2KHzv: height 
1080 start 1084 end 1089 total 1125   clock   50.0Hz  1920x1080 (0xba)  
148.5MHz +HSync +VSynch: width  1920 start 2008 end 2052 total 2200 
skew0 clock   67.5KHzv: height 1080 start 1084 end 1089 total 1125  
 clock   60.0Hz  720x576 (0x43)   27.0MHzh: width   720 start  
732 end  796 total  864 skew0 clock   31.2KHzv: height  576 start  
581 end  586 total  625   clock   50.0Hz

If i select for example mode 0xb9 or 0xba, i lose the image (splitted image of 
gnome), and get a black screen. Once more for 50hz the AV-Receiver reports 
100Hz and for 60Hz reports 120Hz.   

This is like somehow the modes are being multiplied all the time by a factor of 
2. 
I also have tried to use i915.modeset=0 on grub. This makes Xorg fail to start 
saying that no monitor was detected, then i can rmmod i915 and modprobe i915 
modeset = 1,  service lightdm start.   And we are back again with the same 
problem..
What ever if i leave my TV and Receiver ON and turn on the PC, then everything 
works without a problem.
The idea is to boot ubuntu that in this case is my Home Server, and leave it 
running since morning. Then when comming home the PC is already booted and into 
XBMC ready for my Girlfriend to watch some TV over XBMC liveTV 

From the start i thank you for your time.--Paulo Louro


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