The ring initialization will differ a bit in upcoming generations, and
this split will prepare the code for what's needed.

This patch also fixes a bug introduced in:
commit 99433931950f33039d9e1a52b4ed9af3f1b58e84
Author: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Date:   Tue Jan 22 14:12:17 2013 +0200

    drm/i915: use gem_set_seqno() on hardware init

After doing the extraction, the bad error handling became obvious.  I
acknowledge that this should be two patches, but it's a pretty
small/trivial patch. If requested, I can certainly do the fix as a
distinct patch.

Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Signed-off-by: Ben Widawsky <b...@bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_gem.c | 53 ++++++++++++++++++++++++++---------------
 1 file changed, 34 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index d746177..82cc23e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3922,22 +3922,11 @@ intel_enable_blt(struct drm_device *dev)
        return true;
 }
 
-int
-i915_gem_init_hw(struct drm_device *dev)
+static int i915_gem_init_rings(struct drm_device *dev)
 {
-       drm_i915_private_t *dev_priv = dev->dev_private;
+       struct drm_i915_private *dev_priv = dev->dev_private;
        int ret;
 
-       if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt())
-               return -EIO;
-
-       if (IS_HASWELL(dev) && (I915_READ(0x120010) == 1))
-               I915_WRITE(0x9008, I915_READ(0x9008) | 0xf0000);
-
-       i915_gem_l3_remap(dev);
-
-       i915_gem_init_swizzling(dev);
-
        ret = intel_init_render_ring_buffer(dev);
        if (ret)
                return ret;
@@ -3956,6 +3945,38 @@ i915_gem_init_hw(struct drm_device *dev)
 
        ret = i915_gem_set_seqno(dev, ((u32)~0 - 0x1000));
        if (ret)
+               goto cleanup_blt_ring;
+
+       return 0;
+
+cleanup_blt_ring:
+       intel_init_blt_ring_buffer(&dev_priv->ring[BCS]);
+cleanup_bsd_ring:
+       intel_cleanup_ring_buffer(&dev_priv->ring[VCS]);
+cleanup_render_ring:
+       intel_cleanup_ring_buffer(&dev_priv->ring[RCS]);
+
+       return ret;
+}
+
+int
+i915_gem_init_hw(struct drm_device *dev)
+{
+       drm_i915_private_t *dev_priv = dev->dev_private;
+       int ret;
+
+       if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt())
+               return -EIO;
+
+       if (IS_HASWELL(dev) && (I915_READ(0x120010) == 1))
+               I915_WRITE(0x9008, I915_READ(0x9008) | 0xf0000);
+
+       i915_gem_l3_remap(dev);
+
+       i915_gem_init_swizzling(dev);
+
+       ret = i915_gem_init_rings(dev);
+       if (ret)
                return ret;
 
        /*
@@ -3966,12 +3987,6 @@ i915_gem_init_hw(struct drm_device *dev)
        i915_gem_init_ppgtt(dev);
 
        return 0;
-
-cleanup_bsd_ring:
-       intel_cleanup_ring_buffer(&dev_priv->ring[VCS]);
-cleanup_render_ring:
-       intel_cleanup_ring_buffer(&dev_priv->ring[RCS]);
-       return ret;
 }
 
 int i915_gem_init(struct drm_device *dev)
-- 
1.8.1.2

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