Re: [Intel-gfx] [PATCH i-g-t 2/2] tests/pm_sseu: Create new test pm_sseu

2015-03-18 Thread Jeff McGee 
On Thu, Mar 12, 2015 at 12:09:50PM +, Thomas Wood wrote:
 On 10 March 2015 at 21:17,  jeff.mc...@intel.com wrote:
  From: Jeff McGee jeff.mc...@intel.com
 
  New test pm_sseu is intended for any subtest related to the
  slice/subslice/EU power gating feature. The sole initial subtest,
  'full-enable', confirms that the slice/subslice/EU state is at
  full enablement when the render engine is active. Starting with
  Gen9 SKL, the render power gating feature can leave SSEU in a
  partially enabled state upon resumption of render work unless
  explicit action is taken.
 
 Please add a short description to the test using the
 IGT_TEST_DESCRIPTION macro, so that it is included in the
 documentation and help output.
 

Hi Thomas. I have posted v2 patches to address this and your other comments.
Can you please have a second look? Thanks
-Jeff
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[Intel-gfx] [PATCH i-g-t 2/2] tests/pm_sseu: Create new test pm_sseu

2015-03-12 Thread jeff . mcgee 
From: Jeff McGee jeff.mc...@intel.com

New test pm_sseu is intended for any subtest related to the
slice/subslice/EU power gating feature. The sole initial subtest,
'full-enable', confirms that the slice/subslice/EU state is at
full enablement when the render engine is active. Starting with
Gen9 SKL, the render power gating feature can leave SSEU in a
partially enabled state upon resumption of render work unless
explicit action is taken.

Signed-off-by: Jeff McGee jeff.mc...@intel.com
---
 tests/.gitignore   |   1 +
 tests/Makefile.sources |   1 +
 tests/pm_sseu.c| 373 +
 3 files changed, 375 insertions(+)
 create mode 100644 tests/pm_sseu.c

diff --git a/tests/.gitignore b/tests/.gitignore
index 7b4dd94..23094ce 100644
--- a/tests/.gitignore
+++ b/tests/.gitignore
@@ -144,6 +144,7 @@ pm_psr
 pm_rc6_residency
 pm_rpm
 pm_rps
+pm_sseu
 prime_nv_api
 prime_nv_pcopy
 prime_nv_test
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 51e8376..74106c0 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -82,6 +82,7 @@ TESTS_progs_M = \
pm_rpm \
pm_rps \
pm_rc6_residency \
+   pm_sseu \
prime_self_import \
template \
$(NULL)
diff --git a/tests/pm_sseu.c b/tests/pm_sseu.c
new file mode 100644
index 000..45aeef3
--- /dev/null
+++ b/tests/pm_sseu.c
@@ -0,0 +1,373 @@
+/*
+ * Copyright © 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *Jeff McGee jeff.mc...@intel.com
+ */
+
+#include fcntl.h
+#include unistd.h
+#include string.h
+#include errno.h
+#include time.h
+#include drmtest.h
+#include i915_drm.h
+#include intel_io.h
+#include intel_bufmgr.h
+#include intel_batchbuffer.h
+#include intel_chipset.h
+#include ioctl_wrappers.h
+#include igt_debugfs.h
+#include media_spin.h
+
+static double
+to_dt(const struct timespec *start, const struct timespec *end)
+{
+   double dt;
+
+   dt = (end-tv_sec - start-tv_sec) * 1e3;
+   dt += (end-tv_nsec - start-tv_nsec) * 1e-6;
+
+   return dt;
+}
+
+struct status {
+   struct {
+   int slice_total;
+   int subslice_total;
+   int subslice_per;
+   int eu_total;
+   int eu_per;
+   bool has_slice_pg;
+   bool has_subslice_pg;
+   bool has_eu_pg;
+   } info;
+   struct {
+   int slice_total;
+   int subslice_total;
+   int subslice_per;
+   int eu_total;
+   int eu_per;
+   } hw;
+};
+
+#define DBG_STATUS_BUF_SIZE 4096
+
+struct {
+   int init;
+   int status_fd;
+   char status_buf[DBG_STATUS_BUF_SIZE];
+} dbg;
+
+static void
+dbg_get_status_section(const char *title, char **first, char **last)
+{
+   char *pos;
+
+   *first = strstr(dbg.status_buf, title);
+   igt_assert(*first != NULL);
+
+   pos = *first;
+   do {
+   pos = strchr(pos, '\n');
+   igt_assert(pos != NULL);
+   pos++;
+   } while (*pos == ' '); /* lines in the section begin with a space */
+   *last = pos - 1;
+}
+
+static int
+dbg_get_int(const char *first, const char *last, const char *name)
+{
+   char *pos;
+
+   pos = strstr(first, name);
+   igt_assert(pos != NULL);
+   pos = strstr(pos, :);
+   igt_assert(pos != NULL);
+   pos += 2;
+   igt_assert(pos  last);
+
+   return strtol(pos, pos, 10);
+}
+
+static bool
+dbg_get_bool(const char *first, const char *last, const char *name)
+{
+   char *pos;
+
+   pos = strstr(first, name);
+   igt_assert(pos != NULL);
+   pos = strstr(pos, :);
+   igt_assert(pos != NULL);
+   pos += 2;
+   igt_assert(pos  last);
+
+   if (*pos == 'y')
+   return true;
+   if (*pos == 'n')
+

Re: [Intel-gfx] [PATCH i-g-t 2/2] tests/pm_sseu: Create new test pm_sseu

2015-03-12 Thread Thomas Wood 
On 10 March 2015 at 21:17,  jeff.mc...@intel.com wrote:
 From: Jeff McGee jeff.mc...@intel.com

 New test pm_sseu is intended for any subtest related to the
 slice/subslice/EU power gating feature. The sole initial subtest,
 'full-enable', confirms that the slice/subslice/EU state is at
 full enablement when the render engine is active. Starting with
 Gen9 SKL, the render power gating feature can leave SSEU in a
 partially enabled state upon resumption of render work unless
 explicit action is taken.

Please add a short description to the test using the
IGT_TEST_DESCRIPTION macro, so that it is included in the
documentation and help output.


 Signed-off-by: Jeff McGee jeff.mc...@intel.com
 ---
  tests/.gitignore   |   1 +
  tests/Makefile.sources |   1 +
  tests/pm_sseu.c| 373 
 +
  3 files changed, 375 insertions(+)
  create mode 100644 tests/pm_sseu.c

 diff --git a/tests/.gitignore b/tests/.gitignore
 index 7b4dd94..23094ce 100644
 --- a/tests/.gitignore
 +++ b/tests/.gitignore
 @@ -144,6 +144,7 @@ pm_psr
  pm_rc6_residency
  pm_rpm
  pm_rps
 +pm_sseu
  prime_nv_api
  prime_nv_pcopy
  prime_nv_test
 diff --git a/tests/Makefile.sources b/tests/Makefile.sources
 index 51e8376..74106c0 100644
 --- a/tests/Makefile.sources
 +++ b/tests/Makefile.sources
 @@ -82,6 +82,7 @@ TESTS_progs_M = \
 pm_rpm \
 pm_rps \
 pm_rc6_residency \
 +   pm_sseu \
 prime_self_import \
 template \
 $(NULL)
 diff --git a/tests/pm_sseu.c b/tests/pm_sseu.c
 new file mode 100644
 index 000..45aeef3
 --- /dev/null
 +++ b/tests/pm_sseu.c
 @@ -0,0 +1,373 @@
 +/*
 + * Copyright © 2015 Intel Corporation
 + *
 + * Permission is hereby granted, free of charge, to any person obtaining a
 + * copy of this software and associated documentation files (the Software),
 + * to deal in the Software without restriction, including without limitation
 + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 + * and/or sell copies of the Software, and to permit persons to whom the
 + * Software is furnished to do so, subject to the following conditions:
 + *
 + * The above copyright notice and this permission notice (including the next
 + * paragraph) shall be included in all copies or substantial portions of the
 + * Software.
 + *
 + * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
 DEALINGS
 + * IN THE SOFTWARE.
 + *
 + * Authors:
 + *Jeff McGee jeff.mc...@intel.com
 + */
 +
 +#include fcntl.h
 +#include unistd.h
 +#include string.h
 +#include errno.h
 +#include time.h
 +#include drmtest.h
 +#include i915_drm.h
 +#include intel_io.h
 +#include intel_bufmgr.h
 +#include intel_batchbuffer.h
 +#include intel_chipset.h
 +#include ioctl_wrappers.h
 +#include igt_debugfs.h
 +#include media_spin.h
 +
 +static double
 +to_dt(const struct timespec *start, const struct timespec *end)
 +{
 +   double dt;
 +
 +   dt = (end-tv_sec - start-tv_sec) * 1e3;
 +   dt += (end-tv_nsec - start-tv_nsec) * 1e-6;
 +
 +   return dt;
 +}
 +
 +struct status {
 +   struct {
 +   int slice_total;
 +   int subslice_total;
 +   int subslice_per;
 +   int eu_total;
 +   int eu_per;
 +   bool has_slice_pg;
 +   bool has_subslice_pg;
 +   bool has_eu_pg;
 +   } info;
 +   struct {
 +   int slice_total;
 +   int subslice_total;
 +   int subslice_per;
 +   int eu_total;
 +   int eu_per;
 +   } hw;
 +};
 +
 +#define DBG_STATUS_BUF_SIZE 4096
 +
 +struct {
 +   int init;
 +   int status_fd;
 +   char status_buf[DBG_STATUS_BUF_SIZE];
 +} dbg;
 +
 +static void
 +dbg_get_status_section(const char *title, char **first, char **last)
 +{
 +   char *pos;
 +
 +   *first = strstr(dbg.status_buf, title);
 +   igt_assert(*first != NULL);
 +
 +   pos = *first;
 +   do {
 +   pos = strchr(pos, '\n');
 +   igt_assert(pos != NULL);
 +   pos++;
 +   } while (*pos == ' '); /* lines in the section begin with a space */
 +   *last = pos - 1;
 +}
 +
 +static int
 +dbg_get_int(const char *first, const char *last, const char *name)
 +{
 +   char *pos;
 +
 +   pos = strstr(first, name);
 +   igt_assert(pos != NULL);
 +   pos = strstr(pos, :);
 +   igt_assert(pos != NULL);
 +   pos += 2;
 +   igt_assert(pos  last);
 +
 +   return strtol(pos, pos, 10);
 +}
 +
 +static bool