From: Brad Volkin <bradley.d.vol...@intel.com>
Signed-off-by: Brad Volkin <bradley.d.vol...@intel.com>
---
drivers/gpu/drm/i915/i915_cmd_parser.c | 30 +++++++++++++++++++-----------
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +-
3 files changed, 21 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c
b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 8481ef0..b3525ce 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -581,6 +581,25 @@ finish:
return (u32*)addr;
}
+int i915_needs_cmd_parser(struct intel_ring_buffer *ring)
+{
+ drm_i915_private_t *dev_priv =
+ (drm_i915_private_t *)ring->dev->dev_private;
+
+ /* No command tables indicates a platform without parsing */
+ if (!ring->cmd_tables)
+ return 0;
+
+ /* XXX: VLV is Gen7 and therefore has cmd_tables, but has PPGTT
+ * disabled. That will cause all of the parser's PPGTT checks to
+ * fail. For now, disable parsing when PPGTT is off.
+ */
+ if(!dev_priv->mm.aliasing_ppgtt)
+ return 0;
+
+ return i915_enable_cmd_parser;
+}
+
#define LENGTH_BIAS 2
int i915_parse_cmds(struct intel_ring_buffer *ring,
@@ -590,17 +609,6 @@ int i915_parse_cmds(struct intel_ring_buffer *ring,
int ret = 0;
u32 *cmd, *batch_base, *batch_end;
struct drm_i915_cmd_descriptor default_desc = { 0 };
- drm_i915_private_t *dev_priv =
- (drm_i915_private_t *)ring->dev->dev_private;
-
- /* XXX: this breaks VLV, which is Gen7, but no PPGTT
- * Replace with better checks for when to call i915_parse_cmds?
- */
- WARN_ON(!dev_priv->mm.aliasing_ppgtt);
-
- /* No command tables currently indicates a platform without parsing */
- if (!ring->cmd_tables)
- return 0;
batch_base = vmap_batch(batch_obj);
if (!batch_base) {
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 161d9cd..e7fc31c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2412,6 +2412,7 @@ const char *i915_cache_level_str(int type);
/* i915_cmd_parser.c */
void i915_cmd_parser_init_ring(struct intel_ring_buffer *ring);
+int i915_needs_cmd_parser(struct intel_ring_buffer *ring);
int i915_parse_cmds(struct intel_ring_buffer *ring,
struct drm_i915_gem_object *batch_obj,
u32 batch_start_offset);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 06975c7..7b1453e 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1143,7 +1143,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
}
batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
- if (i915_enable_cmd_parser && !(flags & I915_DISPATCH_SECURE)) {
+ if (i915_needs_cmd_parser(ring) && !(flags & I915_DISPATCH_SECURE)) {
ret = i915_parse_cmds(ring,
batch_obj,
args->batch_start_offset);
--
1.8.4.4
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