Hey Dave,
I think this is a bad merge:
The patch c43ce12328df: "drm/i915: Use per object locking in execbuf,
v12." from Aug 19, 2020, leads to the following static checker
warning:
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1459 __reloc_entry_gpu()
warn: signedness bug returning '(-35)'
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
1440 static bool __reloc_entry_gpu(struct i915_execbuffer *eb,
^^^^
This should be int.
1441 struct i915_vma *vma,
1442 u64 offset,
1443 u64 target_addr)
1444 {
1445 const unsigned int gen = eb->reloc_cache.gen;
1446 unsigned int len;
1447 u32 *batch;
1448 u64 addr;
1449
1450 if (gen >= 8)
1451 len = offset & 7 ? 8 : 5;
1452 else if (gen >= 4)
1453 len = 4;
1454 else
1455 len = 3;
1456
1457 batch = reloc_gpu(eb, vma, len);
1458 if (batch == ERR_PTR(-EDEADLK))
1459 return (s64)-EDEADLK;
No need for this cast, btw.
1460 else if (IS_ERR(batch))
1461 return false;
1462
1463 addr = gen8_canonical_addr(vma->node.start + offset);
1464 if (gen >= 8) {
1465 if (offset & 7) {
1466 *batch++ = MI_STORE_DWORD_IMM_GEN4;
1467 *batch++ = lower_32_bits(addr);
1468 *batch++ = upper_32_bits(addr);
1469 *batch++ = lower_32_bits(target_addr);
1470
1471 addr = gen8_canonical_addr(addr + 4);
1472
1473 *batch++ = MI_STORE_DWORD_IMM_GEN4;
1474 *batch++ = lower_32_bits(addr);
1475 *batch++ = upper_32_bits(addr);
regards,
dan carpenter
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