Re: [Kicad-developers] Bad Error in footprint (Not picked up by DRC)
On 9/15/2015 12:19 PM, Dan Walmsley wrote: > Is this the right place to report problems with footprints. > > In "Capacitors_Elko_ThroughHole:Elko_vert_20x10mm_RM5" > > There is a + symbol that is in the silkscreen, and also in the copper layer. This is definitely a bug in the footprint. Please file an issue on our footprint library repo at https://github.com/KiCad/Capacitors_Elko_ThroughHole.pretty > > When we saw our Gerber file it was shorting 2 nets together and the DRC > had not picked this up. > > 1) What is the best process to change all the footprints at once for our > board? Use the "Change Footprints" dialog which can be accessed through the footprint edit properties dialog. > 2) Should I file a bug to suggest that DRC includes copper from > footprint in the DRC? This is a known issue with DRC. It does not check clearances for text on copper layers. This is something on the radar for the next development cycle. > > Thanks > > Dan > > > ___ > Mailing list: https://launchpad.net/~kicad-developers > Post to : kicad-developers@lists.launchpad.net > Unsubscribe : https://launchpad.net/~kicad-developers > More help : https://help.launchpad.net/ListHelp > ___ Mailing list: https://launchpad.net/~kicad-developers Post to : kicad-developers@lists.launchpad.net Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
Re: [Kicad-developers] Bad Error in footprint (Not picked up by DRC)
On Tue, Sep 15, 2015 at 04:19:16PM +, Dan Walmsley wrote: > Is this the right place to report problems with footprints. > In "Capacitors_Elko_ThroughHole:Elko_vert_20x10mm_RM5" > There is a + symbol that is in the silkscreen, and also in the copper layer. How should silk short a copper trace? It's not recommended, but usually silk is trimmed by the solder mask (either during gerber generation or by the manufacturer) If, instead, the module contains entities/text on copper *this is by design* (of pcbnew, not of the module). Entities on copper on modules are not checked against copper on board, for two reasons: - It's quite difficult to check copper text for conflicts - You *need* copper in modules to do things like equipotential bonding or other tricks like these done by the microwave tools Either way there is (should be:P) a big fat warning when creating the module and choosing a copper layer; I'd say that module needs to be fixed (not a problem in pcbnew but in the library module) BTW that is the kind of error detected when comparing the gerbers against the D356 netlist at the CAM stage (if you're lucky to have the check done, of course...) -- Lorenzo Marcantonio Logos Srl ___ Mailing list: https://launchpad.net/~kicad-developers Post to : kicad-developers@lists.launchpad.net Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
